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a04f2d9d3a
Patch from Lennert Buytenhek The original version of the chip docs had the PW and SU fields in the slowport write timing control register accidentally reversed. This is mentioned in the errata (documentation change #4) and fixed in newer docs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>