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a081a9d6f5
This fixes FDO bug #28375, it's kind of regression, so quite important to have it for .35. V2: Fix on RV770+ as well. All other chipsets have only one clock mode per state. V3: I'm out of luck today. Grepped for voltage in r*.c and missed evergreen. agd5f: rebased Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com> |
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