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a448a28589
drivers/mfd/ucb1x00-core.c:555: error: static declaration of 'ucb1x00_class' follows non-static declaration drivers/mfd/ucb1x00.h:109: error: previous declaration of 'ucb1x00_class' was here Since ucb1x00_class isn't used by anything, remove the extern declaration and the symbol export. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
664 lines
16 KiB
C
664 lines
16 KiB
C
/*
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* linux/drivers/mfd/ucb1x00-core.c
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*
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* Copyright (C) 2001 Russell King, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* The UCB1x00 core driver provides basic services for handling IO,
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* the ADC, interrupts, and accessing registers. It is designed
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* such that everything goes through this layer, thereby providing
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* a consistent locking methodology, as well as allowing the drivers
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* to be used on other non-MCP-enabled hardware platforms.
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*
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* Note that all locks are private to this file. Nothing else may
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* touch them.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <asm/dma.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include "ucb1x00.h"
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static DECLARE_MUTEX(ucb1x00_sem);
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static LIST_HEAD(ucb1x00_drivers);
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static LIST_HEAD(ucb1x00_devices);
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/**
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* ucb1x00_io_set_dir - set IO direction
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* @ucb: UCB1x00 structure describing chip
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* @in: bitfield of IO pins to be set as inputs
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* @out: bitfield of IO pins to be set as outputs
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*
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* Set the IO direction of the ten general purpose IO pins on
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* the UCB1x00 chip. The @in bitfield has priority over the
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* @out bitfield, in that if you specify a pin as both input
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* and output, it will end up as an input.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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* This function takes a spinlock, disabling interrupts.
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*/
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void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
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{
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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ucb->io_dir |= out;
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ucb->io_dir &= ~in;
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ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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}
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/**
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* ucb1x00_io_write - set or clear IO outputs
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* @ucb: UCB1x00 structure describing chip
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* @set: bitfield of IO pins to set to logic '1'
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* @clear: bitfield of IO pins to set to logic '0'
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*
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* Set the IO output state of the specified IO pins. The value
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* is retained if the pins are subsequently configured as inputs.
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* The @clear bitfield has priority over the @set bitfield -
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* outputs will be cleared.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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* This function takes a spinlock, disabling interrupts.
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*/
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void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
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{
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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ucb->io_out |= set;
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ucb->io_out &= ~clear;
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ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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}
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/**
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* ucb1x00_io_read - read the current state of the IO pins
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* @ucb: UCB1x00 structure describing chip
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*
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* Return a bitfield describing the logic state of the ten
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* general purpose IO pins.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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* This function does not take any semaphores or spinlocks.
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*/
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unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
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{
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return ucb1x00_reg_read(ucb, UCB_IO_DATA);
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}
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/*
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* UCB1300 data sheet says we must:
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* 1. enable ADC => 5us (including reference startup time)
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* 2. select input => 51*tsibclk => 4.3us
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* 3. start conversion => 102*tsibclk => 8.5us
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* (tsibclk = 1/11981000)
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* Period between SIB 128-bit frames = 10.7us
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*/
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/**
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* ucb1x00_adc_enable - enable the ADC converter
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* @ucb: UCB1x00 structure describing chip
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*
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* Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
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* Any code wishing to use the ADC converter must call this
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* function prior to using it.
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*
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* This function takes the ADC semaphore to prevent two or more
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* concurrent uses, and therefore may sleep. As a result, it
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* can only be called from process context, not interrupt
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* context.
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*
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* You should release the ADC as soon as possible using
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* ucb1x00_adc_disable.
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*/
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void ucb1x00_adc_enable(struct ucb1x00 *ucb)
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{
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down(&ucb->adc_sem);
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ucb->adc_cr |= UCB_ADC_ENA;
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ucb1x00_enable(ucb);
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
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}
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/**
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* ucb1x00_adc_read - read the specified ADC channel
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* @ucb: UCB1x00 structure describing chip
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* @adc_channel: ADC channel mask
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* @sync: wait for syncronisation pulse.
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*
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* Start an ADC conversion and wait for the result. Note that
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* synchronised ADC conversions (via the ADCSYNC pin) must wait
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* until the trigger is asserted and the conversion is finished.
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*
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* This function currently spins waiting for the conversion to
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* complete (2 frames max without sync).
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*
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* If called for a synchronised ADC conversion, it may sleep
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* with the ADC semaphore held.
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*/
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unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
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{
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unsigned int val;
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if (sync)
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adc_channel |= UCB_ADC_SYNC_ENA;
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
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for (;;) {
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val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
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if (val & UCB_ADC_DAT_VAL)
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break;
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/* yield to other processes */
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(1);
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}
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return UCB_ADC_DAT(val);
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}
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/**
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* ucb1x00_adc_disable - disable the ADC converter
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* @ucb: UCB1x00 structure describing chip
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*
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* Disable the ADC converter and release the ADC semaphore.
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*/
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void ucb1x00_adc_disable(struct ucb1x00 *ucb)
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{
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ucb->adc_cr &= ~UCB_ADC_ENA;
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
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ucb1x00_disable(ucb);
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up(&ucb->adc_sem);
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}
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/*
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* UCB1x00 Interrupt handling.
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*
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* The UCB1x00 can generate interrupts when the SIBCLK is stopped.
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* Since we need to read an internal register, we must re-enable
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* SIBCLK to talk to the chip. We leave the clock running until
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* we have finished processing all interrupts from the chip.
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*/
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static irqreturn_t ucb1x00_irq(int irqnr, void *devid, struct pt_regs *regs)
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{
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struct ucb1x00 *ucb = devid;
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struct ucb1x00_irq *irq;
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unsigned int isr, i;
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ucb1x00_enable(ucb);
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isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
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for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)
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if (isr & 1 && irq->fn)
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irq->fn(i, irq->devid);
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ucb1x00_disable(ucb);
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return IRQ_HANDLED;
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}
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/**
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* ucb1x00_hook_irq - hook a UCB1x00 interrupt
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* @ucb: UCB1x00 structure describing chip
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* @idx: interrupt index
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* @fn: function to call when interrupt is triggered
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* @devid: device id to pass to interrupt handler
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*
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* Hook the specified interrupt. You can only register one handler
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* for each interrupt source. The interrupt source is not enabled
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* by this function; use ucb1x00_enable_irq instead.
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*
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* Interrupt handlers will be called with other interrupts enabled.
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*
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* Returns zero on success, or one of the following errors:
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* -EINVAL if the interrupt index is invalid
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* -EBUSY if the interrupt has already been hooked
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*/
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int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid)
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{
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struct ucb1x00_irq *irq;
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int ret = -EINVAL;
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if (idx < 16) {
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irq = ucb->irq_handler + idx;
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ret = -EBUSY;
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spin_lock_irq(&ucb->lock);
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if (irq->fn == NULL) {
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irq->devid = devid;
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irq->fn = fn;
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ret = 0;
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}
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spin_unlock_irq(&ucb->lock);
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}
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return ret;
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}
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/**
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* ucb1x00_enable_irq - enable an UCB1x00 interrupt source
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* @ucb: UCB1x00 structure describing chip
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* @idx: interrupt index
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* @edges: interrupt edges to enable
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*
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* Enable the specified interrupt to trigger on %UCB_RISING,
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* %UCB_FALLING or both edges. The interrupt should have been
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* hooked by ucb1x00_hook_irq.
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*/
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void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
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{
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unsigned long flags;
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if (idx < 16) {
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spin_lock_irqsave(&ucb->lock, flags);
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ucb1x00_enable(ucb);
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if (edges & UCB_RISING) {
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ucb->irq_ris_enbl |= 1 << idx;
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ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
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}
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if (edges & UCB_FALLING) {
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ucb->irq_fal_enbl |= 1 << idx;
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ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
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}
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ucb1x00_disable(ucb);
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spin_unlock_irqrestore(&ucb->lock, flags);
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}
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}
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/**
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* ucb1x00_disable_irq - disable an UCB1x00 interrupt source
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* @ucb: UCB1x00 structure describing chip
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* @edges: interrupt edges to disable
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*
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* Disable the specified interrupt triggering on the specified
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* (%UCB_RISING, %UCB_FALLING or both) edges.
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*/
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void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
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{
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unsigned long flags;
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if (idx < 16) {
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spin_lock_irqsave(&ucb->lock, flags);
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ucb1x00_enable(ucb);
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if (edges & UCB_RISING) {
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ucb->irq_ris_enbl &= ~(1 << idx);
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ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
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}
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if (edges & UCB_FALLING) {
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ucb->irq_fal_enbl &= ~(1 << idx);
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ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
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}
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ucb1x00_disable(ucb);
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spin_unlock_irqrestore(&ucb->lock, flags);
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}
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}
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/**
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* ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt
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* @ucb: UCB1x00 structure describing chip
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* @idx: interrupt index
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* @devid: device id.
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*
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* Disable the interrupt source and remove the handler. devid must
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* match the devid passed when hooking the interrupt.
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*
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* Returns zero on success, or one of the following errors:
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* -EINVAL if the interrupt index is invalid
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* -ENOENT if devid does not match
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*/
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int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid)
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{
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struct ucb1x00_irq *irq;
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int ret;
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if (idx >= 16)
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goto bad;
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irq = ucb->irq_handler + idx;
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ret = -ENOENT;
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spin_lock_irq(&ucb->lock);
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if (irq->devid == devid) {
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ucb->irq_ris_enbl &= ~(1 << idx);
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ucb->irq_fal_enbl &= ~(1 << idx);
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ucb1x00_enable(ucb);
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ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
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ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
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ucb1x00_disable(ucb);
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irq->fn = NULL;
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irq->devid = NULL;
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ret = 0;
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}
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spin_unlock_irq(&ucb->lock);
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return ret;
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bad:
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printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx);
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return -EINVAL;
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}
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static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)
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{
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struct ucb1x00_dev *dev;
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int ret = -ENOMEM;
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dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);
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if (dev) {
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dev->ucb = ucb;
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dev->drv = drv;
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ret = drv->add(dev);
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if (ret == 0) {
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list_add(&dev->dev_node, &ucb->devs);
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list_add(&dev->drv_node, &drv->devs);
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} else {
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kfree(dev);
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}
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}
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return ret;
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}
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static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)
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{
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dev->drv->remove(dev);
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list_del(&dev->dev_node);
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list_del(&dev->drv_node);
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kfree(dev);
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}
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|
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/*
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* Try to probe our interrupt, rather than relying on lots of
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* hard-coded machine dependencies. For reference, the expected
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* IRQ mappings are:
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*
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* Machine Default IRQ
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* adsbitsy IRQ_GPCIN4
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* cerf IRQ_GPIO_UCB1200_IRQ
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* flexanet IRQ_GPIO_GUI
|
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* freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
|
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* graphicsclient ADS_EXT_IRQ(8)
|
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* graphicsmaster ADS_EXT_IRQ(8)
|
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* lart LART_IRQ_UCB1200
|
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* omnimeter IRQ_GPIO23
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* pfs168 IRQ_GPIO_UCB1300_IRQ
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* simpad IRQ_GPIO_UCB1300_IRQ
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* shannon SHANNON_IRQ_GPIO_IRQ_CODEC
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* yopy IRQ_GPIO_UCB1200_IRQ
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|
*/
|
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static int ucb1x00_detect_irq(struct ucb1x00 *ucb)
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{
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unsigned long mask;
|
|
|
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mask = probe_irq_on();
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if (!mask)
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return NO_IRQ;
|
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|
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/*
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* Enable the ADC interrupt.
|
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*/
|
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ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
|
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ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
|
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
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/*
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* Cause an ADC interrupt.
|
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*/
|
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ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
|
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ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
|
|
|
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/*
|
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* Wait for the conversion to complete.
|
|
*/
|
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while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
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ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
|
|
|
|
/*
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* Disable and clear interrupt.
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|
*/
|
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ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
|
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ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
|
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
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/*
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* Read triggered interrupt.
|
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*/
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return probe_irq_off(mask);
|
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}
|
|
|
|
static int ucb1x00_probe(struct mcp *mcp)
|
|
{
|
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struct ucb1x00 *ucb;
|
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struct ucb1x00_driver *drv;
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unsigned int id;
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int ret = -ENODEV;
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|
|
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mcp_enable(mcp);
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id = mcp_reg_read(mcp, UCB_ID);
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|
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if (id != UCB_ID_1200 && id != UCB_ID_1300) {
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printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
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goto err_disable;
|
|
}
|
|
|
|
ucb = kmalloc(sizeof(struct ucb1x00), GFP_KERNEL);
|
|
ret = -ENOMEM;
|
|
if (!ucb)
|
|
goto err_disable;
|
|
|
|
memset(ucb, 0, sizeof(struct ucb1x00));
|
|
|
|
ucb->cdev.class = &ucb1x00_class;
|
|
ucb->cdev.dev = &mcp->attached_device;
|
|
strlcpy(ucb->cdev.class_id, "ucb1x00", sizeof(ucb->cdev.class_id));
|
|
|
|
spin_lock_init(&ucb->lock);
|
|
spin_lock_init(&ucb->io_lock);
|
|
sema_init(&ucb->adc_sem, 1);
|
|
|
|
ucb->id = id;
|
|
ucb->mcp = mcp;
|
|
ucb->irq = ucb1x00_detect_irq(ucb);
|
|
if (ucb->irq == NO_IRQ) {
|
|
printk(KERN_ERR "UCB1x00: IRQ probe failed\n");
|
|
ret = -ENODEV;
|
|
goto err_free;
|
|
}
|
|
|
|
ret = request_irq(ucb->irq, ucb1x00_irq, 0, "UCB1x00", ucb);
|
|
if (ret) {
|
|
printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",
|
|
ucb->irq, ret);
|
|
goto err_free;
|
|
}
|
|
|
|
set_irq_type(ucb->irq, IRQT_RISING);
|
|
mcp_set_drvdata(mcp, ucb);
|
|
|
|
ret = class_device_register(&ucb->cdev);
|
|
if (ret)
|
|
goto err_irq;
|
|
|
|
INIT_LIST_HEAD(&ucb->devs);
|
|
down(&ucb1x00_sem);
|
|
list_add(&ucb->node, &ucb1x00_devices);
|
|
list_for_each_entry(drv, &ucb1x00_drivers, node) {
|
|
ucb1x00_add_dev(ucb, drv);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
goto out;
|
|
|
|
err_irq:
|
|
free_irq(ucb->irq, ucb);
|
|
err_free:
|
|
kfree(ucb);
|
|
err_disable:
|
|
mcp_disable(mcp);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static void ucb1x00_remove(struct mcp *mcp)
|
|
{
|
|
struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
|
|
struct list_head *l, *n;
|
|
|
|
down(&ucb1x00_sem);
|
|
list_del(&ucb->node);
|
|
list_for_each_safe(l, n, &ucb->devs) {
|
|
struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);
|
|
ucb1x00_remove_dev(dev);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
|
|
free_irq(ucb->irq, ucb);
|
|
class_device_unregister(&ucb->cdev);
|
|
}
|
|
|
|
static void ucb1x00_release(struct class_device *dev)
|
|
{
|
|
struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);
|
|
kfree(ucb);
|
|
}
|
|
|
|
static struct class ucb1x00_class = {
|
|
.name = "ucb1x00",
|
|
.release = ucb1x00_release,
|
|
};
|
|
|
|
int ucb1x00_register_driver(struct ucb1x00_driver *drv)
|
|
{
|
|
struct ucb1x00 *ucb;
|
|
|
|
INIT_LIST_HEAD(&drv->devs);
|
|
down(&ucb1x00_sem);
|
|
list_add(&drv->node, &ucb1x00_drivers);
|
|
list_for_each_entry(ucb, &ucb1x00_devices, node) {
|
|
ucb1x00_add_dev(ucb, drv);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
return 0;
|
|
}
|
|
|
|
void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)
|
|
{
|
|
struct list_head *n, *l;
|
|
|
|
down(&ucb1x00_sem);
|
|
list_del(&drv->node);
|
|
list_for_each_safe(l, n, &drv->devs) {
|
|
struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);
|
|
ucb1x00_remove_dev(dev);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
}
|
|
|
|
static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state)
|
|
{
|
|
struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
|
|
struct ucb1x00_dev *dev;
|
|
|
|
down(&ucb1x00_sem);
|
|
list_for_each_entry(dev, &ucb->devs, dev_node) {
|
|
if (dev->drv->suspend)
|
|
dev->drv->suspend(dev, state);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
return 0;
|
|
}
|
|
|
|
static int ucb1x00_resume(struct mcp *mcp)
|
|
{
|
|
struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
|
|
struct ucb1x00_dev *dev;
|
|
|
|
down(&ucb1x00_sem);
|
|
list_for_each_entry(dev, &ucb->devs, dev_node) {
|
|
if (dev->drv->resume)
|
|
dev->drv->resume(dev);
|
|
}
|
|
up(&ucb1x00_sem);
|
|
return 0;
|
|
}
|
|
|
|
static struct mcp_driver ucb1x00_driver = {
|
|
.drv = {
|
|
.name = "ucb1x00",
|
|
},
|
|
.probe = ucb1x00_probe,
|
|
.remove = ucb1x00_remove,
|
|
.suspend = ucb1x00_suspend,
|
|
.resume = ucb1x00_resume,
|
|
};
|
|
|
|
static int __init ucb1x00_init(void)
|
|
{
|
|
int ret = class_register(&ucb1x00_class);
|
|
if (ret == 0) {
|
|
ret = mcp_driver_register(&ucb1x00_driver);
|
|
if (ret)
|
|
class_unregister(&ucb1x00_class);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void __exit ucb1x00_exit(void)
|
|
{
|
|
mcp_driver_unregister(&ucb1x00_driver);
|
|
class_unregister(&ucb1x00_class);
|
|
}
|
|
|
|
module_init(ucb1x00_init);
|
|
module_exit(ucb1x00_exit);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_io_set_dir);
|
|
EXPORT_SYMBOL(ucb1x00_io_write);
|
|
EXPORT_SYMBOL(ucb1x00_io_read);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_adc_enable);
|
|
EXPORT_SYMBOL(ucb1x00_adc_read);
|
|
EXPORT_SYMBOL(ucb1x00_adc_disable);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_hook_irq);
|
|
EXPORT_SYMBOL(ucb1x00_free_irq);
|
|
EXPORT_SYMBOL(ucb1x00_enable_irq);
|
|
EXPORT_SYMBOL(ucb1x00_disable_irq);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_register_driver);
|
|
EXPORT_SYMBOL(ucb1x00_unregister_driver);
|
|
|
|
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
|
|
MODULE_DESCRIPTION("UCB1x00 core driver");
|
|
MODULE_LICENSE("GPL");
|