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The branch contains: - DT uart handling cleanup - Support for zc706 and zed board - Removal of board compatible string -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlG+ysgACgkQykllyylKDCENewCgk3LUwpMxepV1JOaNBmUJ0A09 jtMAnA395sve+FBxYjfM+nSAmbnl5RYl =KBrZ -----END PGP SIGNATURE----- Merge tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx into next/dt From Michal Simek: arm: Xilinx Zynq dt changes for v3.11 The branch contains: - DT uart handling cleanup - Support for zc706 and zed board - Removal of board compatible string * tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx: arm: dt: zynq: Add support for the zed platform arm: dt: zynq: Add support for the zc706 platform arm: dt: zynq: Use 'status' property for UART nodes arm: zynq: Remove board specific compatibility string clk: zynq: Remove deprecated clock code arm: zynq: Migrate platform to clock controller clk: zynq: Add clock controller driver clk: zynq: Factor out PLL driver Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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mmp | ||
mvebu | ||
mxs | ||
samsung | ||
socfpga | ||
spear | ||
sunxi | ||
tegra | ||
ux500 | ||
versatile | ||
x86 | ||
zynq | ||
clk-axi-clkgen.c | ||
clk-bcm2835.c | ||
clk-composite.c | ||
clk-devres.c | ||
clk-divider.c | ||
clk-fixed-factor.c | ||
clk-fixed-rate.c | ||
clk-gate.c | ||
clk-highbank.c | ||
clk-ls1x.c | ||
clk-max77686.c | ||
clk-mux.c | ||
clk-nomadik.c | ||
clk-prima2.c | ||
clk-si5351.c | ||
clk-si5351.h | ||
clk-twl6040.c | ||
clk-u300.c | ||
clk-vt8500.c | ||
clk-wm831x.c | ||
clk.c | ||
clkdev.c | ||
Kconfig | ||
Makefile |