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9d5a9e7465
This patch also includes the required removal of (unused) inclusion of <asm/a.out.h> <linux/a.out.h>'s in the arch/ code for these architectures. [dwmw2: updated for 2.6.27-rc] Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
202 lines
4.7 KiB
C
202 lines
4.7 KiB
C
/*
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* Software emulation of some PPC instructions for the 8xx core.
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*
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* Copyright (C) 1998 Dan Malek (dmalek@jlc.net)
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*
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* Software floating emuation for the MPC8xx processor. I did this mostly
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* because it was easier than trying to get the libraries compiled for
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* software floating point. The goal is still to get the libraries done,
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* but I lost patience and needed some hacks to at least get init and
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* shells running. The first problem is the setjmp/longjmp that save
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* and restore the floating point registers.
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*
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* For this emulation, our working registers are found on the register
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* save area.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/interrupt.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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/* Eventually we may need a look-up table, but this works for now.
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*/
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#define LFS 48
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#define LFD 50
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#define LFDU 51
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#define STFD 54
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#define STFDU 55
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#define FMR 63
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void print_8xx_pte(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pmd_t *pmd;
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pte_t *pte;
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printk(" pte @ 0x%8lx: ", addr);
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pgd = pgd_offset(mm, addr & PAGE_MASK);
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if (pgd) {
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pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
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addr & PAGE_MASK);
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if (pmd && pmd_present(*pmd)) {
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pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
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if (pte) {
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printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n",
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(long)pgd, (long)pte, (long)pte_val(*pte));
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#define pp ((long)pte_val(*pte))
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printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx "
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"CI: %lx v: %lx\n",
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pp>>12, /* rpn */
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(pp>>10)&3, /* pp */
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(pp>>3)&1, /* small */
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(pp>>2)&1, /* shared */
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(pp>>1)&1, /* cache inhibit */
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pp&1 /* valid */
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);
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#undef pp
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}
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else {
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printk("no pte\n");
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}
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}
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else {
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printk("no pmd\n");
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}
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}
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else {
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printk("no pgd\n");
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}
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}
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int get_8xx_pte(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pmd_t *pmd;
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pte_t *pte;
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int retval = 0;
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pgd = pgd_offset(mm, addr & PAGE_MASK);
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if (pgd) {
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pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
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addr & PAGE_MASK);
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if (pmd && pmd_present(*pmd)) {
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pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
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if (pte) {
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retval = (int)pte_val(*pte);
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}
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}
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}
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return retval;
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}
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/*
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* We return 0 on success, 1 on unimplemented instruction, and EFAULT
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* if a load/store faulted.
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*/
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int Soft_emulate_8xx(struct pt_regs *regs)
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{
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u32 inst, instword;
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u32 flreg, idxreg, disp;
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int retval;
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s16 sdisp;
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u32 *ea, *ip;
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retval = 0;
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instword = *((u32 *)regs->nip);
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inst = instword >> 26;
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flreg = (instword >> 21) & 0x1f;
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idxreg = (instword >> 16) & 0x1f;
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disp = instword & 0xffff;
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ea = (u32 *)(regs->gpr[idxreg] + disp);
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ip = (u32 *)¤t->thread.TS_FPR(flreg);
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switch ( inst )
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{
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case LFD:
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/* this is a 16 bit quantity that is sign extended
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* so use a signed short here -- Cort
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*/
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sdisp = (instword & 0xffff);
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ea = (u32 *)(regs->gpr[idxreg] + sdisp);
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if (copy_from_user(ip, ea, sizeof(double)))
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retval = -EFAULT;
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break;
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case LFDU:
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if (copy_from_user(ip, ea, sizeof(double)))
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retval = -EFAULT;
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else
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regs->gpr[idxreg] = (u32)ea;
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break;
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case LFS:
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sdisp = (instword & 0xffff);
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ea = (u32 *)(regs->gpr[idxreg] + sdisp);
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if (copy_from_user(ip, ea, sizeof(float)))
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retval = -EFAULT;
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break;
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case STFD:
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/* this is a 16 bit quantity that is sign extended
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* so use a signed short here -- Cort
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*/
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sdisp = (instword & 0xffff);
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ea = (u32 *)(regs->gpr[idxreg] + sdisp);
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if (copy_to_user(ea, ip, sizeof(double)))
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retval = -EFAULT;
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break;
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case STFDU:
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if (copy_to_user(ea, ip, sizeof(double)))
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retval = -EFAULT;
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else
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regs->gpr[idxreg] = (u32)ea;
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break;
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case FMR:
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/* assume this is a fp move -- Cort */
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memcpy(ip, ¤t->thread.TS_FPR((instword>>11)&0x1f),
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sizeof(double));
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break;
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default:
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retval = 1;
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printk("Bad emulation %s/%d\n"
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" NIP: %08lx instruction: %08x opcode: %x "
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"A: %x B: %x C: %x code: %x rc: %x\n",
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current->comm,current->pid,
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regs->nip,
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instword,inst,
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(instword>>16)&0x1f,
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(instword>>11)&0x1f,
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(instword>>6)&0x1f,
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(instword>>1)&0x3ff,
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instword&1);
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{
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int pa;
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print_8xx_pte(current->mm,regs->nip);
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pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK;
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pa |= (regs->nip & ~PAGE_MASK);
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pa = (unsigned long)__va(pa);
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printk("Kernel VA for NIP %x ", pa);
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print_8xx_pte(current->mm,pa);
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}
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}
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if (retval == 0)
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regs->nip += 4;
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return retval;
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}
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