mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-21 00:42:16 +00:00
163 lines
3.2 KiB
C
163 lines
3.2 KiB
C
#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware/iomd.h>
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#include <asm/irq.h>
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static void iomd_ack_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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val = iomd_readb(IOMD_IRQMASKA);
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iomd_writeb(val & ~mask, IOMD_IRQMASKA);
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iomd_writeb(mask, IOMD_IRQCLRA);
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}
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static void iomd_mask_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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val = iomd_readb(IOMD_IRQMASKA);
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iomd_writeb(val & ~mask, IOMD_IRQMASKA);
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}
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static void iomd_unmask_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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val = iomd_readb(IOMD_IRQMASKA);
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iomd_writeb(val | mask, IOMD_IRQMASKA);
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}
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static struct irq_chip iomd_a_chip = {
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.ack = iomd_ack_irq_a,
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.mask = iomd_mask_irq_a,
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.unmask = iomd_unmask_irq_a,
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};
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static void iomd_mask_irq_b(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_IRQMASKB);
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iomd_writeb(val & ~mask, IOMD_IRQMASKB);
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}
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static void iomd_unmask_irq_b(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_IRQMASKB);
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iomd_writeb(val | mask, IOMD_IRQMASKB);
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}
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static struct irq_chip iomd_b_chip = {
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.ack = iomd_mask_irq_b,
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.mask = iomd_mask_irq_b,
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.unmask = iomd_unmask_irq_b,
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};
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static void iomd_mask_irq_dma(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_DMAMASK);
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iomd_writeb(val & ~mask, IOMD_DMAMASK);
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}
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static void iomd_unmask_irq_dma(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_DMAMASK);
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iomd_writeb(val | mask, IOMD_DMAMASK);
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}
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static struct irq_chip iomd_dma_chip = {
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.ack = iomd_mask_irq_dma,
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.mask = iomd_mask_irq_dma,
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.unmask = iomd_unmask_irq_dma,
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};
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static void iomd_mask_irq_fiq(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_FIQMASK);
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iomd_writeb(val & ~mask, IOMD_FIQMASK);
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}
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static void iomd_unmask_irq_fiq(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = iomd_readb(IOMD_FIQMASK);
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iomd_writeb(val | mask, IOMD_FIQMASK);
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}
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static struct irq_chip iomd_fiq_chip = {
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.ack = iomd_mask_irq_fiq,
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.mask = iomd_mask_irq_fiq,
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.unmask = iomd_unmask_irq_fiq,
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};
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void __init rpc_init_irq(void)
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{
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unsigned int irq, flags;
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iomd_writeb(0, IOMD_IRQMASKA);
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iomd_writeb(0, IOMD_IRQMASKB);
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iomd_writeb(0, IOMD_FIQMASK);
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iomd_writeb(0, IOMD_DMAMASK);
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for (irq = 0; irq < NR_IRQS; irq++) {
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flags = IRQF_VALID;
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if (irq <= 6 || (irq >= 9 && irq <= 15))
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flags |= IRQF_PROBE;
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if (irq == 21 || (irq >= 16 && irq <= 19) ||
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irq == IRQ_KEYBOARDTX)
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flags |= IRQF_NOAUTOEN;
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switch (irq) {
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case 0 ... 7:
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set_irq_chip(irq, &iomd_a_chip);
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, flags);
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break;
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case 8 ... 15:
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set_irq_chip(irq, &iomd_b_chip);
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, flags);
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break;
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case 16 ... 21:
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set_irq_chip(irq, &iomd_dma_chip);
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, flags);
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break;
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case 64 ... 71:
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set_irq_chip(irq, &iomd_fiq_chip);
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set_irq_flags(irq, IRQF_VALID);
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break;
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}
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}
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init_FIQ();
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}
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