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b82b6cca48
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry method is not set. Otherwise for all the drivers, the time can be correctly measured. Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers for all the states, just invert the logic by replacing it by the flag CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle driver, remove the former flag from all the drivers and invert the logic with this flag in the different governor. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* Copyright (C) 2012-2013 Xilinx
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*
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* CPU idle support for Xilinx Zynq
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*
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* based on arch/arm/mach-at91/cpuidle.c
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* The cpu idle uses wait-for-interrupt and RAM self refresh in order
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* to implement two idle states -
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* #1 wait-for-interrupt
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* #2 wait-for-interrupt and RAM self refresh
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*
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* Maintainer: Michal Simek <michal.simek@xilinx.com>
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*/
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#include <linux/init.h>
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#include <linux/cpuidle.h>
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#include <linux/platform_device.h>
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#include <asm/proc-fns.h>
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#include <asm/cpuidle.h>
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#define ZYNQ_MAX_STATES 2
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/* Actual code that puts the SoC in different idle states */
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static int zynq_enter_idle(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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/* Add code for DDR self refresh start */
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cpu_do_idle();
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return index;
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}
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static struct cpuidle_driver zynq_idle_driver = {
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.name = "zynq_idle",
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.owner = THIS_MODULE,
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.states = {
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ARM_CPUIDLE_WFI_STATE,
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{
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.enter = zynq_enter_idle,
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.exit_latency = 10,
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.target_residency = 10000,
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.name = "RAM_SR",
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.desc = "WFI and RAM Self Refresh",
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},
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},
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.safe_state_index = 0,
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.state_count = ZYNQ_MAX_STATES,
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};
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/* Initialize CPU idle by registering the idle states */
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static int zynq_cpuidle_probe(struct platform_device *pdev)
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{
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pr_info("Xilinx Zynq CpuIdle Driver started\n");
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return cpuidle_register(&zynq_idle_driver, NULL);
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}
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static struct platform_driver zynq_cpuidle_driver = {
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.driver = {
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.name = "cpuidle-zynq",
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.owner = THIS_MODULE,
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},
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.probe = zynq_cpuidle_probe,
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};
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module_platform_driver(zynq_cpuidle_driver);
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