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https://github.com/FEX-Emu/linux.git
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c9c57929d2
Provide a failsafe mechanism to avoid kernel spinning forever at
read_hpet_tsc during early kernel bootup.
This failsafe mechanism was originally introduced in commit
2f7a2a79c3
, but looks like the hpet split
from time.c lost it again.
This reintroduces the failsafe mechanism
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Cc: Jack Steiner <steiner@sgi.com>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
494 lines
11 KiB
C
494 lines
11 KiB
C
#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/mc146818rtc.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <linux/ioport.h>
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#include <linux/acpi.h>
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#include <linux/hpet.h>
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#include <asm/pgtable.h>
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#include <asm/vsyscall.h>
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#include <asm/timex.h>
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#include <asm/hpet.h>
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#define HPET_MASK 0xFFFFFFFF
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#define HPET_SHIFT 22
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/* FSEC = 10^-15 NSEC = 10^-9 */
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#define FSEC_PER_NSEC 1000000
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int nohpet __initdata;
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unsigned long hpet_address;
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unsigned long hpet_period; /* fsecs / HPET clock */
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unsigned long hpet_tick; /* HPET clocks / interrupt */
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int hpet_use_timer; /* Use counter of hpet for time keeping,
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* otherwise PIT
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*/
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#ifdef CONFIG_HPET
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static __init int late_hpet_init(void)
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{
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struct hpet_data hd;
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unsigned int ntimer;
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if (!hpet_address)
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return 0;
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memset(&hd, 0, sizeof(hd));
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ntimer = hpet_readl(HPET_ID);
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ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
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ntimer++;
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/*
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* Register with driver.
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* Timer0 and Timer1 is used by platform.
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*/
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hd.hd_phys_address = hpet_address;
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hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
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hd.hd_nirqs = ntimer;
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hd.hd_flags = HPET_DATA_PLATFORM;
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hpet_reserve_timer(&hd, 0);
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#ifdef CONFIG_HPET_EMULATE_RTC
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hpet_reserve_timer(&hd, 1);
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#endif
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hd.hd_irq[0] = HPET_LEGACY_8254;
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hd.hd_irq[1] = HPET_LEGACY_RTC;
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if (ntimer > 2) {
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struct hpet *hpet;
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struct hpet_timer *timer;
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int i;
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hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
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timer = &hpet->hpet_timers[2];
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for (i = 2; i < ntimer; timer++, i++)
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hd.hd_irq[i] = (timer->hpet_config &
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Tn_INT_ROUTE_CNF_MASK) >>
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Tn_INT_ROUTE_CNF_SHIFT;
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}
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hpet_alloc(&hd);
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return 0;
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}
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fs_initcall(late_hpet_init);
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#endif
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int hpet_timer_stop_set_go(unsigned long tick)
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{
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unsigned int cfg;
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/*
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* Stop the timers and reset the main counter.
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*/
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cfg = hpet_readl(HPET_CFG);
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cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
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hpet_writel(cfg, HPET_CFG);
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hpet_writel(0, HPET_COUNTER);
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hpet_writel(0, HPET_COUNTER + 4);
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/*
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* Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
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* and period also hpet_tick.
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*/
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if (hpet_use_timer) {
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hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
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HPET_TN_32BIT, HPET_T0_CFG);
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hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
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hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
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cfg |= HPET_CFG_LEGACY;
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}
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/*
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* Go!
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*/
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cfg |= HPET_CFG_ENABLE;
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hpet_writel(cfg, HPET_CFG);
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return 0;
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}
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static cycle_t read_hpet(void)
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{
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return (cycle_t)hpet_readl(HPET_COUNTER);
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}
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static cycle_t __vsyscall_fn vread_hpet(void)
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{
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return readl((void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
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}
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struct clocksource clocksource_hpet = {
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.name = "hpet",
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.rating = 250,
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.read = read_hpet,
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.mask = (cycle_t)HPET_MASK,
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.mult = 0, /* set below */
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.shift = HPET_SHIFT,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.vread = vread_hpet,
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};
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int hpet_arch_init(void)
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{
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unsigned int id;
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u64 tmp;
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if (!hpet_address)
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return -1;
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set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
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__set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
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/*
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* Read the period, compute tick and quotient.
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*/
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id = hpet_readl(HPET_ID);
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if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
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return -1;
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hpet_period = hpet_readl(HPET_PERIOD);
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if (hpet_period < 100000 || hpet_period > 100000000)
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return -1;
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hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
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hpet_use_timer = (id & HPET_ID_LEGSUP);
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/*
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* hpet period is in femto seconds per cycle
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* so we need to convert this to ns/cyc units
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* aproximated by mult/2^shift
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*
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* fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
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* fsec/cyc * 1ns/1000000fsec * 2^shift = mult
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* fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
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* (fsec/cyc << shift)/1000000 = mult
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* (hpet_period << shift)/FSEC_PER_NSEC = mult
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*/
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tmp = (u64)hpet_period << HPET_SHIFT;
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do_div(tmp, FSEC_PER_NSEC);
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clocksource_hpet.mult = (u32)tmp;
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clocksource_register(&clocksource_hpet);
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return hpet_timer_stop_set_go(hpet_tick);
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}
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int hpet_reenable(void)
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{
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return hpet_timer_stop_set_go(hpet_tick);
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}
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/*
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* calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
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* it to the HPET timer of known frequency.
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*/
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#define TICK_COUNT 100000000
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#define TICK_MIN 5000
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#define MAX_TRIES 5
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/*
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* Some platforms take periodic SMI interrupts with 5ms duration. Make sure none
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* occurs between the reads of the hpet & TSC.
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*/
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static void __init read_hpet_tsc(int *hpet, int *tsc)
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{
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int tsc1, tsc2, hpet1, i;
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for (i = 0; i < MAX_TRIES; i++) {
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tsc1 = get_cycles_sync();
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hpet1 = hpet_readl(HPET_COUNTER);
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tsc2 = get_cycles_sync();
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if (tsc2 - tsc1 > TICK_MIN)
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break;
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}
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*hpet = hpet1;
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*tsc = tsc2;
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}
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unsigned int __init hpet_calibrate_tsc(void)
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{
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int tsc_start, hpet_start;
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int tsc_now, hpet_now;
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unsigned long flags;
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local_irq_save(flags);
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read_hpet_tsc(&hpet_start, &tsc_start);
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do {
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local_irq_disable();
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read_hpet_tsc(&hpet_now, &tsc_now);
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local_irq_restore(flags);
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} while ((tsc_now - tsc_start) < TICK_COUNT &&
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(hpet_now - hpet_start) < TICK_COUNT);
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return (tsc_now - tsc_start) * 1000000000L
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/ ((hpet_now - hpet_start) * hpet_period / 1000);
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}
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#ifdef CONFIG_HPET_EMULATE_RTC
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/* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
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* is enabled, we support RTC interrupt functionality in software.
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* RTC has 3 kinds of interrupts:
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* 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
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* is updated
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* 2) Alarm Interrupt - generate an interrupt at a specific time of day
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* 3) Periodic Interrupt - generate periodic interrupt, with frequencies
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* 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
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* (1) and (2) above are implemented using polling at a frequency of
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* 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
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* overhead. (DEFAULT_RTC_INT_FREQ)
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* For (3), we use interrupts at 64Hz or user specified periodic
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* frequency, whichever is higher.
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*/
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#include <linux/rtc.h>
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#define DEFAULT_RTC_INT_FREQ 64
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#define RTC_NUM_INTS 1
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static unsigned long UIE_on;
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static unsigned long prev_update_sec;
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static unsigned long AIE_on;
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static struct rtc_time alarm_time;
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static unsigned long PIE_on;
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static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
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static unsigned long PIE_count;
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static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
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static unsigned int hpet_t1_cmp; /* cached comparator register */
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int is_hpet_enabled(void)
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{
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return hpet_address != 0;
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}
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/*
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* Timer 1 for RTC, we do not use periodic interrupt feature,
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* even if HPET supports periodic interrupts on Timer 1.
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* The reason being, to set up a periodic interrupt in HPET, we need to
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* stop the main counter. And if we do that everytime someone diables/enables
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* RTC, we will have adverse effect on main kernel timer running on Timer 0.
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* So, for the time being, simulate the periodic interrupt in software.
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*
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* hpet_rtc_timer_init() is called for the first time and during subsequent
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* interuppts reinit happens through hpet_rtc_timer_reinit().
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*/
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int hpet_rtc_timer_init(void)
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{
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unsigned int cfg, cnt;
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unsigned long flags;
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if (!is_hpet_enabled())
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return 0;
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/*
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* Set the counter 1 and enable the interrupts.
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*/
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if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
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hpet_rtc_int_freq = PIE_freq;
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else
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hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
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local_irq_save(flags);
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cnt = hpet_readl(HPET_COUNTER);
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cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
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hpet_writel(cnt, HPET_T1_CMP);
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hpet_t1_cmp = cnt;
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cfg = hpet_readl(HPET_T1_CFG);
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cfg &= ~HPET_TN_PERIODIC;
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cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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local_irq_restore(flags);
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return 1;
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}
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static void hpet_rtc_timer_reinit(void)
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{
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unsigned int cfg, cnt, ticks_per_int, lost_ints;
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if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
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cfg = hpet_readl(HPET_T1_CFG);
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cfg &= ~HPET_TN_ENABLE;
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hpet_writel(cfg, HPET_T1_CFG);
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return;
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}
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if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
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hpet_rtc_int_freq = PIE_freq;
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else
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hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
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/* It is more accurate to use the comparator value than current count.*/
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ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq;
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hpet_t1_cmp += ticks_per_int;
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hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
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/*
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* If the interrupt handler was delayed too long, the write above tries
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* to schedule the next interrupt in the past and the hardware would
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* not interrupt until the counter had wrapped around.
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* So we have to check that the comparator wasn't set to a past time.
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*/
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cnt = hpet_readl(HPET_COUNTER);
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if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) {
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lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1;
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/* Make sure that, even with the time needed to execute
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* this code, the next scheduled interrupt has been moved
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* back to the future: */
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lost_ints++;
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hpet_t1_cmp += lost_ints * ticks_per_int;
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hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
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if (PIE_on)
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PIE_count += lost_ints;
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if (printk_ratelimit())
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printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
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hpet_rtc_int_freq);
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}
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}
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/*
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* The functions below are called from rtc driver.
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* Return 0 if HPET is not being used.
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* Otherwise do the necessary changes and return 1.
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*/
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int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
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{
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if (!is_hpet_enabled())
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return 0;
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if (bit_mask & RTC_UIE)
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UIE_on = 0;
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if (bit_mask & RTC_PIE)
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PIE_on = 0;
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if (bit_mask & RTC_AIE)
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AIE_on = 0;
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return 1;
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}
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int hpet_set_rtc_irq_bit(unsigned long bit_mask)
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{
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int timer_init_reqd = 0;
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if (!is_hpet_enabled())
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return 0;
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if (!(PIE_on | AIE_on | UIE_on))
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timer_init_reqd = 1;
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if (bit_mask & RTC_UIE) {
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UIE_on = 1;
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}
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if (bit_mask & RTC_PIE) {
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PIE_on = 1;
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PIE_count = 0;
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}
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if (bit_mask & RTC_AIE) {
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AIE_on = 1;
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}
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if (timer_init_reqd)
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hpet_rtc_timer_init();
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return 1;
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}
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int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
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{
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if (!is_hpet_enabled())
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return 0;
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alarm_time.tm_hour = hrs;
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alarm_time.tm_min = min;
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alarm_time.tm_sec = sec;
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return 1;
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}
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int hpet_set_periodic_freq(unsigned long freq)
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{
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if (!is_hpet_enabled())
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return 0;
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PIE_freq = freq;
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PIE_count = 0;
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return 1;
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}
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int hpet_rtc_dropped_irq(void)
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{
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if (!is_hpet_enabled())
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return 0;
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return 1;
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}
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irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct rtc_time curr_time;
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unsigned long rtc_int_flag = 0;
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int call_rtc_interrupt = 0;
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hpet_rtc_timer_reinit();
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if (UIE_on | AIE_on) {
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rtc_get_rtc_time(&curr_time);
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}
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if (UIE_on) {
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if (curr_time.tm_sec != prev_update_sec) {
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/* Set update int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag = RTC_UF;
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prev_update_sec = curr_time.tm_sec;
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}
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}
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if (PIE_on) {
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PIE_count++;
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if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
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/* Set periodic int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag |= RTC_PF;
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PIE_count = 0;
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}
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}
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if (AIE_on) {
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if ((curr_time.tm_sec == alarm_time.tm_sec) &&
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(curr_time.tm_min == alarm_time.tm_min) &&
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(curr_time.tm_hour == alarm_time.tm_hour)) {
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/* Set alarm int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag |= RTC_AF;
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}
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}
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if (call_rtc_interrupt) {
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rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
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rtc_interrupt(rtc_int_flag, dev_id);
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}
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return IRQ_HANDLED;
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}
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#endif
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static int __init nohpet_setup(char *s)
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{
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nohpet = 1;
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return 1;
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}
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__setup("nohpet", nohpet_setup);
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