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While testing Per Forlins MMC speed improvements I noticed a semantic bug in the COH901318 driver: it will write to channel registers in the prep_slave_sg() function, instead of deferring it to later, breaking the assumption from the drivers to be able to queue up new jobs while another job is running. Fix this by storing up the initial register writes in the job descriptors and write them to hardware when we process the descriptor instead. Now the stress tests work. Acked-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com> |
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| .. | ||
| ioat | ||
| ipu | ||
| ppc4xx | ||
| amba-pl08x.c | ||
| at_hdmac_regs.h | ||
| at_hdmac.c | ||
| coh901318_lli.c | ||
| coh901318_lli.h | ||
| coh901318.c | ||
| dmaengine.c | ||
| dmatest.c | ||
| dw_dmac_regs.h | ||
| dw_dmac.c | ||
| ep93xx_dma.c | ||
| fsldma.c | ||
| fsldma.h | ||
| imx-dma.c | ||
| imx-sdma.c | ||
| intel_mid_dma_regs.h | ||
| intel_mid_dma.c | ||
| iop-adma.c | ||
| iovlock.c | ||
| Kconfig | ||
| Makefile | ||
| mpc512x_dma.c | ||
| mv_xor.c | ||
| mv_xor.h | ||
| mxs-dma.c | ||
| pch_dma.c | ||
| pl330.c | ||
| shdma.c | ||
| shdma.h | ||
| ste_dma40_ll.c | ||
| ste_dma40_ll.h | ||
| ste_dma40.c | ||
| timb_dma.c | ||
| TODO | ||
| txx9dmac.c | ||
| txx9dmac.h | ||