linux/arch/arm/mach-davinci
Sekhar Nori bbb33445b9 ARM: davinci: da8xx: fix interrupt handling
CP_INTC code in entry-macro.S code reads SECR1n register to see if
an interrupt was indeed pending. This register is actually marked as
write-only in the OMAP-L138 TRM. Moreover, the code just checks to see
the entire register is non-zero and does not check a specific interrupt
number.

Fix this to use interrupt pending bit in GIPR register for this purpose.
GIPR register is already being read to know the highest priority interrupt
pending.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2012-07-09 16:01:11 +05:30
..
2011-03-29 14:47:57 +02:00
2012-05-26 12:22:27 -07:00
2010-05-13 10:05:29 -07:00
2011-12-05 16:47:15 +05:30
2010-12-11 12:15:53 +02:00