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bbb33445b9
CP_INTC code in entry-macro.S code reads SECR1n register to see if an interrupt was indeed pending. This register is actually marked as write-only in the OMAP-L138 TRM. Moreover, the code just checks to see the entire register is non-zero and does not check a specific interrupt number. Fix this to use interrupt pending bit in GIPR register for this purpose. GIPR register is already being read to know the highest priority interrupt pending. Signed-off-by: Sekhar Nori <nsekhar@ti.com>