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linux/arch/sh/mm
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Stuart Menefy a25bbe1222 sh: Flush executable pages in copy_user_highpage 
This resolves a problem seen when using the Android dynamic linker.
Sometimes the dynamic linker would seg-fault at start up and this
was eventually traced to the handling of a COW fault for a page which
was being modified by the linker. If there was no cache aliasing between
the kernel and the user page, the page was not flushed, leaving the
newly copied data in the D-cache. However when executing instructions
from that page, the I-cache is filled directly from external memory,
rather than the D-cache, and causing garbage to be executed.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-02-15 16:24:31 +09:00
..
alignment.c sh: wire up SET/GET_UNALIGN_CTL. 2010-02-23 12:56:30 +09:00
asids-debugfs.c sh: provide generic arch_debugfs_dir. 2010-09-24 04:04:26 +09:00
cache-debugfs.c sh: provide generic arch_debugfs_dir. 2010-09-24 04:04:26 +09:00
cache-sh2.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh2a.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh3.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh4.c sh: Assume new page cache pages have dirty dcache lines. 2010-12-01 15:39:51 +09:00
cache-sh5.c tree-wide: fix comment/printk typos 2010-11-01 15:38:34 -04:00
cache-sh7705.c sh: Assume new page cache pages have dirty dcache lines. 2010-12-01 15:39:51 +09:00
cache-shx3.c sh: Zero out aliases counter when using SH-X3 hardware assistance. 2010-04-20 15:37:23 +09:00
cache.c sh: Flush executable pages in copy_user_highpage 2011-02-15 16:24:31 +09:00
consistent.c sh: nommu: use 32-bit phys mode. 2010-11-04 12:32:24 +09:00
extable_32.c
extable_64.c
fault_32.c sh: Kill off dangling goto labels from oom-killer rework. 2010-04-26 16:15:17 +09:00
fault_64.c
flush-sh4.c sh: Fix up the SH-5 build with caches enabled. 2009-08-16 01:50:17 +09:00
gup.c sh: lockless get_user_pages_fast() 2010-10-27 16:43:08 +09:00
hugetlbpage.c thp: pte alloc trans splitting 2011-01-13 17:32:40 -08:00
init.c sh: Add a machvec callback for early memblock reservations. 2011-01-11 13:04:57 +09:00
ioremap_fixed.c include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
ioremap.c include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
Kconfig sh: nommu: use 32-bit phys mode. 2010-11-04 12:32:24 +09:00
kmap.c sh: Assume new page cache pages have dirty dcache lines. 2010-12-01 15:39:51 +09:00
Makefile sh: lockless get_user_pages_fast() 2010-10-27 16:43:08 +09:00
mmap.c fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and sh 2009-12-11 06:44:59 -05:00
nommu.c sh: stub __flush_tlb_global() definition for nommu. 2010-08-16 14:53:01 +09:00
numa.c lmb: rename to memblock 2010-07-14 17:14:00 +10:00
pgtable.c include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
pmb.c sh: Fix up PMB locking. 2010-10-14 03:49:15 +09:00
sram.c sh: Provide a generic SRAM pool for tiny memories. 2010-10-15 02:09:00 +09:00
tlb-debugfs.c sh: provide generic arch_debugfs_dir. 2010-09-24 04:04:26 +09:00
tlb-pteaex.c sh: Fix up the SH-3 build for recent TLB changes. 2010-04-02 16:13:27 +09:00
tlb-sh3.c sh: Fix up the SH-3 build for recent TLB changes. 2010-04-02 16:13:27 +09:00
tlb-sh4.c sh: Fix up the SH-3 build for recent TLB changes. 2010-04-02 16:13:27 +09:00
tlb-sh5.c sh: Split out MMUCR.URB based entry wiring in to shared helper. 2010-01-19 15:20:35 +09:00
tlb-urb.c sh: update the TLB replacement counter for entry wiring. 2010-03-26 11:37:16 +09:00
tlbflush_32.c sh: Provide a global TLB flush for U/I-TLB clear. 2010-07-02 15:44:09 +09:00
tlbflush_64.c sh: Provide a global TLB flush for U/I-TLB clear. 2010-07-02 15:44:09 +09:00
uncached.c sh: nommu: use 32-bit phys mode. 2010-11-04 12:32:24 +09:00