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https://github.com/FEX-Emu/linux.git
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be8d1cae07
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
225 lines
5.3 KiB
C
225 lines
5.3 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/kvm_host.h>
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#include <linux/err.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_44x.h>
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#include <asm/kvm_ppc.h>
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#include "44x_tlb.h"
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/* Note: clearing MSR[DE] just means that the debug interrupt will not be
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* delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
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* If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
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* will be delivered as an "imprecise debug event" (which is indicated by
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* DBSR[IDE].
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*/
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static void kvm44x_disable_debug_interrupts(void)
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{
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mtmsr(mfmsr() & ~MSR_DE);
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}
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void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
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{
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kvm44x_disable_debug_interrupts();
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mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
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mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
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mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
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mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
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mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
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mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
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mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
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mtmsr(vcpu->arch.host_msr);
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}
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void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
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{
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struct kvm_guest_debug *dbg = &vcpu->guest_debug;
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u32 dbcr0 = 0;
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vcpu->arch.host_msr = mfmsr();
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kvm44x_disable_debug_interrupts();
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/* Save host debug register state. */
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vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
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vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
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vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
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vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
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vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
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vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
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vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
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/* set registers up for guest */
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if (dbg->bp[0]) {
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mtspr(SPRN_IAC1, dbg->bp[0]);
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dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
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}
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if (dbg->bp[1]) {
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mtspr(SPRN_IAC2, dbg->bp[1]);
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dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
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}
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if (dbg->bp[2]) {
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mtspr(SPRN_IAC3, dbg->bp[2]);
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dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
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}
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if (dbg->bp[3]) {
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mtspr(SPRN_IAC4, dbg->bp[3]);
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dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
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}
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mtspr(SPRN_DBCR0, dbcr0);
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mtspr(SPRN_DBCR1, 0);
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mtspr(SPRN_DBCR2, 0);
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}
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void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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{
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kvmppc_44x_tlb_load(vcpu);
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}
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void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
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{
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kvmppc_44x_tlb_put(vcpu);
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}
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int kvmppc_core_check_processor_compat(void)
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{
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int r;
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if (strcmp(cur_cpu_spec->platform, "ppc440") == 0)
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r = 0;
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else
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r = -ENOTSUPP;
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return r;
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}
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int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
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struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[0];
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int i;
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tlbe->tid = 0;
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tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
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tlbe->word1 = 0;
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tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
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tlbe++;
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tlbe->tid = 0;
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tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
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tlbe->word1 = 0xef600000;
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tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
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| PPC44x_TLB_I | PPC44x_TLB_G;
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/* Since the guest can directly access the timebase, it must know the
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* real timebase frequency. Accordingly, it must see the state of
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* CCR1[TCS]. */
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vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
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for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++)
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vcpu_44x->shadow_refs[i].gtlb_index = -1;
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return 0;
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}
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/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
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int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
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struct kvm_translation *tr)
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{
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int index;
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gva_t eaddr;
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u8 pid;
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u8 as;
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eaddr = tr->linear_address;
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pid = (tr->linear_address >> 32) & 0xff;
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as = (tr->linear_address >> 40) & 0x1;
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index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
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if (index == -1) {
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tr->valid = 0;
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return 0;
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}
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tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
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/* XXX what does "writeable" and "usermode" even mean? */
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tr->valid = 1;
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return 0;
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}
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struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
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{
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struct kvmppc_vcpu_44x *vcpu_44x;
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struct kvm_vcpu *vcpu;
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int err;
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vcpu_44x = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
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if (!vcpu_44x) {
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err = -ENOMEM;
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goto out;
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}
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vcpu = &vcpu_44x->vcpu;
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err = kvm_vcpu_init(vcpu, kvm, id);
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if (err)
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goto free_vcpu;
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return vcpu;
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free_vcpu:
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kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
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out:
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return ERR_PTR(err);
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}
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void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
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kvm_vcpu_uninit(vcpu);
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kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
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}
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static int kvmppc_44x_init(void)
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{
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int r;
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r = kvmppc_booke_init();
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if (r)
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return r;
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return kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), THIS_MODULE);
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}
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static void kvmppc_44x_exit(void)
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{
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kvmppc_booke_exit();
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}
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module_init(kvmppc_44x_init);
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module_exit(kvmppc_44x_exit);
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