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Markos Chandras 6f50c83529 IRQCHIP: irq-mips-gic: Add support for CM3 64-bit timer irqs

CM3 uses a 64-bit counter and compare registers so add support for
them in the GIC counter interrupt.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10648/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2015-08-26 15:23:17 +02:00

acpi

…

asm-generic

mm: clean up per architecture MM hook header files

2015-07-17 16:39:53 -07:00

clocksource

…

crypto

…

drm

drm/edid: add function to help find SADs