mirror of
https://github.com/FEX-Emu/linux.git
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d886cb586f
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
428 lines
13 KiB
C
428 lines
13 KiB
C
/*
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** -----------------------------------------------------------------------------
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**
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** Perle Specialix driver for Linux
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** Ported from existing RIO Driver for SCO sources.
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*
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* (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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**
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** Module : rioinit.c
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** SID : 1.3
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** Last Modified : 11/6/98 10:33:43
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** Retrieved : 11/6/98 10:33:49
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**
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** ident @(#)rioinit.c 1.3
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**
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** -----------------------------------------------------------------------------
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*/
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#ifdef SCCS_LABELS
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static char *_rioinit_c_sccs_ = "@(#)rioinit.c 1.3";
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#endif
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/string.h>
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#include <asm/semaphore.h>
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#include <asm/uaccess.h>
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#include <linux/termios.h>
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#include <linux/serial.h>
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#include <linux/generic_serial.h>
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#include "linux_compat.h"
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#include "pkt.h"
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#include "daemon.h"
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#include "rio.h"
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#include "riospace.h"
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#include "cmdpkt.h"
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#include "map.h"
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#include "rup.h"
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#include "port.h"
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#include "riodrvr.h"
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#include "rioinfo.h"
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#include "func.h"
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#include "errors.h"
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#include "pci.h"
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#include "parmmap.h"
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#include "unixrup.h"
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#include "board.h"
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#include "host.h"
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#include "phb.h"
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#include "link.h"
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#include "cmdblk.h"
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#include "route.h"
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#include "cirrus.h"
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#include "rioioctl.h"
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#include "rio_linux.h"
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int RIOPCIinit(struct rio_info *p, int Mode);
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static int RIOScrub(int, u8 __iomem *, int);
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/**
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** RIOAssignAT :
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**
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** Fill out the fields in the p->RIOHosts structure now we know we know
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** we have a board present.
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**
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** bits < 0 indicates 8 bit operation requested,
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** bits > 0 indicates 16 bit operation.
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*/
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int RIOAssignAT(struct rio_info *p, int Base, void __iomem *virtAddr, int mode)
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{
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int bits;
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struct DpRam __iomem *cardp = (struct DpRam __iomem *)virtAddr;
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if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE))
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bits = BYTE_OPERATION;
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else
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bits = WORD_OPERATION;
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/*
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** Board has passed its scrub test. Fill in all the
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** transient stuff.
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*/
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p->RIOHosts[p->RIONumHosts].Caddr = virtAddr;
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p->RIOHosts[p->RIONumHosts].CardP = virtAddr;
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/*
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** Revision 01 AT host cards don't support WORD operations,
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*/
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if (readb(&cardp->DpRevision) == 01)
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bits = BYTE_OPERATION;
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p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
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p->RIOHosts[p->RIONumHosts].Copy = rio_copy_to_card;
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/* set this later */
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p->RIOHosts[p->RIONumHosts].Slot = -1;
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p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits;
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writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE ,
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&p->RIOHosts[p->RIONumHosts].Control);
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writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
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writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE,
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&p->RIOHosts[p->RIONumHosts].Control);
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writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
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p->RIOHosts[p->RIONumHosts].UniqueNum =
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((readb(&p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
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((readb(&p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
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((readb(&p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
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((readb(&p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);
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p->RIONumHosts++;
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
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return(1);
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}
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static u8 val[] = {
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#ifdef VERY_LONG_TEST
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0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
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0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36,
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#endif
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0xff, 0x00, 0x00 };
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#define TEST_END sizeof(val)
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/*
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** RAM test a board.
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** Nothing too complicated, just enough to check it out.
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*/
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int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, int slot)
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{
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struct DpRam __iomem *DpRam = caddr;
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void __iomem *ram[4];
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int size[4];
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int op, bank;
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int nbanks;
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=%p, slot=%d\n",
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type, DpRam, slot);
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RIOHostReset(type, DpRam, slot);
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/*
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** Scrub the memory. This comes in several banks:
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** DPsram1 - 7000h bytes
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** DPsram2 - 200h bytes
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** DPsram3 - 7000h bytes
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** scratch - 1000h bytes
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*/
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");
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size[0] = DP_SRAM1_SIZE;
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size[1] = DP_SRAM2_SIZE;
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size[2] = DP_SRAM3_SIZE;
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size[3] = DP_SCRATCH_SIZE;
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ram[0] = DpRam->DpSram1;
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ram[1] = DpRam->DpSram2;
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ram[2] = DpRam->DpSram3;
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nbanks = (type == RIO_PCI) ? 3 : 4;
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if (nbanks == 4)
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ram[3] = DpRam->DpScratch;
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if (nbanks == 3) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: %p(0x%x), %p(0x%x), %p(0x%x)\n",
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ram[0], size[0], ram[1], size[1], ram[2], size[2]);
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} else {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: %p(0x%x), %p(0x%x), %p(0x%x), %p(0x%x)\n",
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ram[0], size[0], ram[1], size[1], ram[2], size[2], ram[3], size[3]);
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}
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/*
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** This scrub operation will test for crosstalk between
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** banks. TEST_END is a magic number, and relates to the offset
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** within the 'val' array used by Scrub.
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*/
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for (op=0; op<TEST_END; op++) {
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for (bank=0; bank<nbanks; bank++) {
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if (RIOScrub(op, ram[bank], size[bank]) == RIO_FAIL) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n",
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bank, op);
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return RIO_FAIL;
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}
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}
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}
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rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
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return 0;
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}
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/*
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** Scrub an area of RAM.
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** Define PRETEST and POSTTEST for a more thorough checking of the
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** state of the memory.
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** Call with op set to an index into the above 'val' array to determine
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** which value will be written into memory.
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** Call with op set to zero means that the RAM will not be read and checked
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** before it is written.
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** Call with op not zero, and the RAM will be read and compated with val[op-1]
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** to check that the data from the previous phase was retained.
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*/
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static int RIOScrub(int op, u8 __iomem *ram, int size)
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{
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int off;
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unsigned char oldbyte;
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unsigned char newbyte;
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unsigned char invbyte;
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unsigned short oldword;
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unsigned short newword;
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unsigned short invword;
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unsigned short swapword;
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if (op) {
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oldbyte = val[op-1];
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oldword = oldbyte | (oldbyte<<8);
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} else
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oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
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newbyte = val[op];
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newword = newbyte | (newbyte<<8);
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invbyte = ~newbyte;
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invword = invbyte | (invbyte<<8);
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/*
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** Check that the RAM contains the value that should have been left there
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** by the previous test (not applicable for pass zero)
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*/
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if (op) {
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for (off=0; off<size; off++) {
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if (readb(ram + off) != oldbyte) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
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return RIO_FAIL;
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}
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}
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for (off=0; off<size; off+=2) {
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if (readw(ram + off) != oldword) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword, readw(ram + off));
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
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return RIO_FAIL;
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}
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}
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}
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/*
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** Now write the INVERSE of the test data into every location, using
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** BYTE write operations, first checking before each byte is written
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** that the location contains the old value still, and checking after
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** the write that the location contains the data specified - this is
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** the BYTE read/write test.
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*/
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for (off=0; off<size; off++) {
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if (op && (readb(ram + off) != oldbyte)) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
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return RIO_FAIL;
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}
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writeb(invbyte, ram + off);
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if (readb(ram + off) != invbyte) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, readb(ram + off));
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return RIO_FAIL;
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}
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}
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/*
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** now, use WORD operations to write the test value into every location,
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** check as before that the location contains the previous test value
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** before overwriting, and that it contains the data value written
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** afterwards.
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** This is the WORD operation test.
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*/
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for (off=0; off<size; off+=2) {
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if (readw(ram + off) != invword) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, readw(ram + off));
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
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return RIO_FAIL;
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}
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writew(newword, ram + off);
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if ( readw(ram + off) != newword ) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
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return RIO_FAIL;
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}
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}
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/*
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** now run through the block of memory again, first in byte mode
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** then in word mode, and check that all the locations contain the
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** required test data.
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*/
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for (off=0; off<size; off++) {
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if (readb(ram + off) != newbyte) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
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return RIO_FAIL;
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}
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}
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for (off=0; off<size; off+=2) {
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if (readw(ram + off) != newword ) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
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return RIO_FAIL;
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}
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}
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/*
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** time to check out byte swapping errors
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*/
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swapword = invbyte | (newbyte << 8);
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for (off=0; off<size; off+=2) {
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writeb(invbyte, &ram[off]);
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writeb(newbyte, &ram[off+1]);
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}
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for ( off=0; off<size; off+=2 ) {
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if (readw(ram + off) != swapword) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, readw(ram + off));
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
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return RIO_FAIL;
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}
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writew(~swapword, ram + off);
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}
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for (off=0; off<size; off+=2) {
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if (readb(ram + off) != newbyte) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
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return RIO_FAIL;
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}
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if (readb(ram + off + 1) != invbyte) {
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rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, readb(ram + off + 1));
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return RIO_FAIL;
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}
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writew(newword, ram + off);
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}
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return 0;
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}
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int RIODefaultName(struct rio_info *p, struct Host *HostP, unsigned int UnitId)
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{
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memcpy(HostP->Mapping[UnitId].Name, "UNKNOWN RTA X-XX", 17);
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HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
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if ((UnitId+1) > 9) {
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HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
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HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
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}
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else {
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HostP->Mapping[UnitId].Name[14]='1'+UnitId;
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HostP->Mapping[UnitId].Name[15]=0;
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}
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return 0;
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}
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#define RIO_RELEASE "Linux"
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#define RELEASE_ID "1.0"
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static struct rioVersion stVersion;
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struct rioVersion *RIOVersid(void)
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{
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strlcpy(stVersion.version, "RIO driver for linux V1.0",
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sizeof(stVersion.version));
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strlcpy(stVersion.buildDate, __DATE__,
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sizeof(stVersion.buildDate));
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return &stVersion;
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}
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void RIOHostReset(unsigned int Type, struct DpRam __iomem *DpRamP, unsigned int Slot)
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{
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/*
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** Reset the Tpu
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*/
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rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type);
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switch ( Type ) {
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case RIO_AT:
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rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
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writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE | BYTE_OPERATION |
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SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
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writeb(0xFF, &DpRamP->DpResetTpu);
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udelay(3);
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rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n");
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writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE |
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BYTE_OPERATION | SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
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writeb(0xFF, &DpRamP->DpResetTpu);
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udelay(3);
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break;
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case RIO_PCI:
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rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
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writeb(RIO_PCI_BOOT_FROM_RAM, &DpRamP->DpControl);
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writeb(0xFF, &DpRamP->DpResetInt);
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writeb(0xFF, &DpRamP->DpResetTpu);
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udelay(100);
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break;
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default:
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rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
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break;
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}
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return;
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}
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