Lucas Stach 6ec3240047 clk: tegra: add ac97 controller clock ... AC97 controller clock is hardwired to pll_a_out0. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>		2013-05-20 23:24:34 -07:00
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clk-audio-sync.c
clk-divider.c
clk-periph-gate.c	clk: tegra: Workaround for Tegra114 MSENC problem	2013-04-04 16:10:59 -06:00
clk-periph.c	clk: tegra: Add flags to tegra_clk_periph()	2013-04-04 16:10:56 -06:00
clk-pll-out.c
clk-pll.c	clk: tegra: Add new fields and PLL types for Tegra114	2013-04-04 16:10:52 -06:00
clk-super.c
clk-tegra20.c	clk: tegra: add ac97 controller clock	2013-05-20 23:24:34 -07:00
clk-tegra30.c	ARM: arm-soc driver changes for 3.10	2013-05-04 12:31:18 -07:00
clk-tegra114.c	clk: tegra: fix enum tegra114_clk to match binding	2013-04-04 17:17:14 -06:00
clk.c	clk: tegra: devicetree match for nvidia,tegra114-car	2013-04-04 17:17:13 -06:00
clk.h	clk: tegra: devicetree match for nvidia,tegra114-car	2013-04-04 17:17:13 -06:00
Makefile	clk: tegra: Implement clocks for Tegra114	2013-04-04 17:17:12 -06:00