mirror of
https://github.com/FEX-Emu/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
77 lines
2.2 KiB
C
77 lines
2.2 KiB
C
/*
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* include/asm-ppc/hawk_defs.h
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*
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* Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
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*
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* Author: Mark A. Greer
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* mgreer@mvista.com
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*
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* Modified by Randy Vinson (rvinson@mvista.com)
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*
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* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASMPPC_HAWK_DEFS_H
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#define __ASMPPC_HAWK_DEFS_H
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#include <asm/pci-bridge.h>
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/*
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* The Falcon/Raven and HAWK have 4 sets of registers:
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* 1) PPC Registers which define the mappings from PPC bus to PCI bus,
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* etc.
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* 2) PCI Registers which define the mappings from PCI bus to PPC bus and the
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* MPIC base address.
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* 3) MPIC registers
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* 4) System Memory Controller (SMC) registers.
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*/
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#define HAWK_PCI_CONFIG_ADDR_OFF 0x00000cf8
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#define HAWK_PCI_CONFIG_DATA_OFF 0x00000cfc
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#define HAWK_MPIC_SIZE 0x00040000U
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#define HAWK_SMC_SIZE 0x00001000U
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/*
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* Define PPC register offsets.
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*/
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#define HAWK_PPC_XSADD0_OFF 0x40
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#define HAWK_PPC_XSOFF0_OFF 0x44
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#define HAWK_PPC_XSADD1_OFF 0x48
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#define HAWK_PPC_XSOFF1_OFF 0x4c
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#define HAWK_PPC_XSADD2_OFF 0x50
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#define HAWK_PPC_XSOFF2_OFF 0x54
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#define HAWK_PPC_XSADD3_OFF 0x58
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#define HAWK_PPC_XSOFF3_OFF 0x5c
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/*
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* Define PCI register offsets.
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*/
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#define HAWK_PCI_PSADD0_OFF 0x80
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#define HAWK_PCI_PSOFF0_OFF 0x84
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#define HAWK_PCI_PSADD1_OFF 0x88
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#define HAWK_PCI_PSOFF1_OFF 0x8c
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#define HAWK_PCI_PSADD2_OFF 0x90
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#define HAWK_PCI_PSOFF2_OFF 0x94
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#define HAWK_PCI_PSADD3_OFF 0x98
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#define HAWK_PCI_PSOFF3_OFF 0x9c
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/*
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* Define the System Memory Controller (SMC) register offsets.
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*/
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#define HAWK_SMC_RAM_A_SIZE_REG_OFF 0x10
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#define HAWK_SMC_RAM_B_SIZE_REG_OFF 0x11
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#define HAWK_SMC_RAM_C_SIZE_REG_OFF 0x12
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#define HAWK_SMC_RAM_D_SIZE_REG_OFF 0x13
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#define HAWK_SMC_RAM_E_SIZE_REG_OFF 0xc0 /* HAWK Only */
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#define HAWK_SMC_RAM_F_SIZE_REG_OFF 0xc1 /* HAWK Only */
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#define HAWK_SMC_RAM_G_SIZE_REG_OFF 0xc2 /* HAWK Only */
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#define HAWK_SMC_RAM_H_SIZE_REG_OFF 0xc3 /* HAWK Only */
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#define FALCON_SMC_REG_COUNT 4
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#define HAWK_SMC_REG_COUNT 8
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#endif /* __ASMPPC_HAWK_DEFS_H */
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