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a62e90308f
The previous nuc932 support patches have been discarded by me and because it belongs to another SoCs series named nuc93x,at present, which included nuc931 and nuc932, I think it is better to create a new mach-nuc93x,So I made the patch,and request your advice.Thanks! Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
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* arch/arm/mach-nuc93x/include/mach/regs-irq.h
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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* All rights reserved.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef ___ASM_ARCH_REGS_IRQ_H
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#define ___ASM_ARCH_REGS_IRQ_H
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/* Advance Interrupt Controller (AIC) Registers */
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#define AIC_BA NUC93X_VA_IRQ
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#define REG_AIC_IRQSC (AIC_BA+0x80)
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#define REG_AIC_GEN (AIC_BA+0x84)
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#define REG_AIC_GASR (AIC_BA+0x88)
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#define REG_AIC_GSCR (AIC_BA+0x8C)
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#define REG_AIC_IRSR (AIC_BA+0x100)
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#define REG_AIC_IASR (AIC_BA+0x104)
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#define REG_AIC_ISR (AIC_BA+0x108)
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#define REG_AIC_IPER (AIC_BA+0x10C)
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#define REG_AIC_ISNR (AIC_BA+0x110)
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#define REG_AIC_IMR (AIC_BA+0x114)
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#define REG_AIC_OISR (AIC_BA+0x118)
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#define REG_AIC_MECR (AIC_BA+0x120)
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#define REG_AIC_MDCR (AIC_BA+0x124)
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#define REG_AIC_SSCR (AIC_BA+0x128)
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#define REG_AIC_SCCR (AIC_BA+0x12C)
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#define REG_AIC_EOSCR (AIC_BA+0x130)
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#define AIC_IPER (0x10C)
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#define AIC_ISNR (0x110)
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#endif /* ___ASM_ARCH_REGS_IRQ_H */
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