mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-27 20:07:09 +00:00
ed9b949f55
Make NOMMU-mode work with base addresses other than 0xC0000000 by:
(1) Giving the code that sets up the protection registers the right address
in __sdram_base. Rather than being hard coded to 0xC0000000, the value
of __page_offset is obtained from the linker script.
(2) Eliminate the check in __switch_to() that verifies the current thread
info is in the 0xCxxxxxxx region.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
490 lines
12 KiB
ArmAsm
490 lines
12 KiB
ArmAsm
###############################################################################
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#
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# switch_to.S: context switch operation
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#
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# Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
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# Written by David Howells (dhowells@redhat.com)
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version
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# 2 of the License, or (at your option) any later version.
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#
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###############################################################################
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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#include <asm/processor.h>
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#include <asm/registers.h>
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#include <asm/spr-regs.h>
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.macro LEDS val
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setlos #~\val,gr27
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st gr27,@(gr30,gr0)
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membar
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dcf @(gr30,gr0)
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.endm
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.section .sdata
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.balign 8
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# address of frame 0 (userspace) on current kernel stack
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.globl __kernel_frame0_ptr
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__kernel_frame0_ptr:
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.long init_thread_union + THREAD_SIZE - FRV_FRAME0_SIZE
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# address of current task
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.globl __kernel_current_task
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__kernel_current_task:
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.long init_task
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.section .text
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.balign 4
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###############################################################################
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#
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# struct task_struct *__switch_to(struct thread_struct *prev_thread,
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# struct thread_struct *next_thread,
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# struct task_struct *prev)
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#
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###############################################################################
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.globl __switch_to
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__switch_to:
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# save outgoing process's context
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sethi.p %hi(__switch_back),gr13
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setlo %lo(__switch_back),gr13
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movsg lr,gr12
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stdi gr28,@(gr8,#__THREAD_FRAME)
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sti sp ,@(gr8,#__THREAD_SP)
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sti fp ,@(gr8,#__THREAD_FP)
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stdi gr12,@(gr8,#__THREAD_LR)
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stdi gr16,@(gr8,#__THREAD_GR(16))
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stdi gr18,@(gr8,#__THREAD_GR(18))
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stdi gr20,@(gr8,#__THREAD_GR(20))
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stdi gr22,@(gr8,#__THREAD_GR(22))
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stdi gr24,@(gr8,#__THREAD_GR(24))
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stdi.p gr26,@(gr8,#__THREAD_GR(26))
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or gr8,gr8,gr22
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ldi.p @(gr8,#__THREAD_USER),gr8
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call save_user_regs
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or gr22,gr22,gr8
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# retrieve the new context
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sethi.p %hi(__kernel_frame0_ptr),gr6
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setlo %lo(__kernel_frame0_ptr),gr6
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movsg psr,gr4
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lddi.p @(gr9,#__THREAD_FRAME),gr10
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or gr10,gr10,gr27 ; save prev for the return value
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ldi @(gr11,#4),gr19 ; get new_current->thread_info
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lddi @(gr9,#__THREAD_SP),gr12
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ldi @(gr9,#__THREAD_LR),gr14
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ldi @(gr9,#__THREAD_PC),gr18
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ldi.p @(gr9,#__THREAD_FRAME0),gr7
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# actually switch kernel contexts with ordinary exceptions disabled
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andi gr4,#~PSR_ET,gr5
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movgs gr5,psr
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or.p gr10,gr0,gr28 ; set __frame
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or gr11,gr0,gr29 ; set __current
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or.p gr12,gr0,sp
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or gr13,gr0,fp
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or gr19,gr0,gr15 ; set __current_thread_info
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sti gr7,@(gr6,#0) ; set __kernel_frame0_ptr
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sti gr29,@(gr6,#4) ; set __kernel_current_task
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movgs gr14,lr
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bar
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# jump to __switch_back or ret_from_fork as appropriate
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# - move prev to GR8
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movgs gr4,psr
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jmpl.p @(gr18,gr0)
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or gr27,gr27,gr8
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###############################################################################
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#
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# restore incoming process's context
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# - on entry:
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# - SP, FP, LR, GR15, GR28 and GR29 will have been set up appropriately
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# - GR8 will point to the outgoing task_struct
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# - GR9 will point to the incoming thread_struct
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#
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###############################################################################
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__switch_back:
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lddi @(gr9,#__THREAD_GR(16)),gr16
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lddi @(gr9,#__THREAD_GR(18)),gr18
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lddi @(gr9,#__THREAD_GR(20)),gr20
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lddi @(gr9,#__THREAD_GR(22)),gr22
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lddi @(gr9,#__THREAD_GR(24)),gr24
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lddi @(gr9,#__THREAD_GR(26)),gr26
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# fall through into restore_user_regs()
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ldi.p @(gr9,#__THREAD_USER),gr8
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or gr8,gr8,gr9
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###############################################################################
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#
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# restore extra general regs and FP/Media regs
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# - void *restore_user_regs(const struct user_context *target, void *retval)
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# - on entry:
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# - GR8 will point to the user context to swap in
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# - GR9 will contain the value to be returned in GR8 (prev task on context switch)
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#
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###############################################################################
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.globl restore_user_regs
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restore_user_regs:
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movsg hsr0,gr6
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ori gr6,#HSR0_GRHE|HSR0_FRLE|HSR0_FRHE,gr6
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movgs gr6,hsr0
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movsg hsr0,gr6
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movsg psr,gr7
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ori gr7,#PSR_EF|PSR_EM,gr7
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movgs gr7,psr
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movsg psr,gr7
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srli gr7,#24,gr7
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bar
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lddi @(gr8,#__FPMEDIA_MSR(0)),gr4
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movgs gr4,msr0
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movgs gr5,msr1
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lddfi @(gr8,#__FPMEDIA_ACC(0)),fr16
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lddfi @(gr8,#__FPMEDIA_ACC(2)),fr18
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ldbfi @(gr8,#__FPMEDIA_ACCG(0)),fr20
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ldbfi @(gr8,#__FPMEDIA_ACCG(1)),fr21
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ldbfi @(gr8,#__FPMEDIA_ACCG(2)),fr22
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ldbfi @(gr8,#__FPMEDIA_ACCG(3)),fr23
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mwtacc fr16,acc0
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mwtacc fr17,acc1
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mwtacc fr18,acc2
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mwtacc fr19,acc3
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mwtaccg fr20,accg0
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mwtaccg fr21,accg1
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mwtaccg fr22,accg2
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mwtaccg fr23,accg3
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# some CPUs have extra ACCx and ACCGx regs and maybe FSRx regs
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subicc.p gr7,#0x50,gr0,icc0
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subicc gr7,#0x31,gr0,icc1
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beq icc0,#0,__restore_acc_fr451
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beq icc1,#0,__restore_acc_fr555
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__restore_acc_cont:
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# some CPU's have GR32-GR63
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setlos #HSR0_FRHE,gr4
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andcc gr6,gr4,gr0,icc0
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beq icc0,#1,__restore_skip_gr32_gr63
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lddi @(gr8,#__INT_GR(32)),gr32
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lddi @(gr8,#__INT_GR(34)),gr34
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lddi @(gr8,#__INT_GR(36)),gr36
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lddi @(gr8,#__INT_GR(38)),gr38
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lddi @(gr8,#__INT_GR(40)),gr40
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lddi @(gr8,#__INT_GR(42)),gr42
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lddi @(gr8,#__INT_GR(44)),gr44
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lddi @(gr8,#__INT_GR(46)),gr46
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lddi @(gr8,#__INT_GR(48)),gr48
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lddi @(gr8,#__INT_GR(50)),gr50
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lddi @(gr8,#__INT_GR(52)),gr52
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lddi @(gr8,#__INT_GR(54)),gr54
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lddi @(gr8,#__INT_GR(56)),gr56
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lddi @(gr8,#__INT_GR(58)),gr58
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lddi @(gr8,#__INT_GR(60)),gr60
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lddi @(gr8,#__INT_GR(62)),gr62
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__restore_skip_gr32_gr63:
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# all CPU's have FR0-FR31
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lddfi @(gr8,#__FPMEDIA_FR( 0)),fr0
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lddfi @(gr8,#__FPMEDIA_FR( 2)),fr2
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lddfi @(gr8,#__FPMEDIA_FR( 4)),fr4
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lddfi @(gr8,#__FPMEDIA_FR( 6)),fr6
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lddfi @(gr8,#__FPMEDIA_FR( 8)),fr8
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lddfi @(gr8,#__FPMEDIA_FR(10)),fr10
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lddfi @(gr8,#__FPMEDIA_FR(12)),fr12
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lddfi @(gr8,#__FPMEDIA_FR(14)),fr14
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lddfi @(gr8,#__FPMEDIA_FR(16)),fr16
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lddfi @(gr8,#__FPMEDIA_FR(18)),fr18
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lddfi @(gr8,#__FPMEDIA_FR(20)),fr20
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lddfi @(gr8,#__FPMEDIA_FR(22)),fr22
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lddfi @(gr8,#__FPMEDIA_FR(24)),fr24
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lddfi @(gr8,#__FPMEDIA_FR(26)),fr26
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lddfi @(gr8,#__FPMEDIA_FR(28)),fr28
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lddfi.p @(gr8,#__FPMEDIA_FR(30)),fr30
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# some CPU's have FR32-FR63
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setlos #HSR0_FRHE,gr4
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andcc gr6,gr4,gr0,icc0
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beq icc0,#1,__restore_skip_fr32_fr63
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lddfi @(gr8,#__FPMEDIA_FR(32)),fr32
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lddfi @(gr8,#__FPMEDIA_FR(34)),fr34
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lddfi @(gr8,#__FPMEDIA_FR(36)),fr36
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lddfi @(gr8,#__FPMEDIA_FR(38)),fr38
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lddfi @(gr8,#__FPMEDIA_FR(40)),fr40
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lddfi @(gr8,#__FPMEDIA_FR(42)),fr42
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lddfi @(gr8,#__FPMEDIA_FR(44)),fr44
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lddfi @(gr8,#__FPMEDIA_FR(46)),fr46
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lddfi @(gr8,#__FPMEDIA_FR(48)),fr48
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lddfi @(gr8,#__FPMEDIA_FR(50)),fr50
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lddfi @(gr8,#__FPMEDIA_FR(52)),fr52
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lddfi @(gr8,#__FPMEDIA_FR(54)),fr54
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lddfi @(gr8,#__FPMEDIA_FR(56)),fr56
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lddfi @(gr8,#__FPMEDIA_FR(58)),fr58
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lddfi @(gr8,#__FPMEDIA_FR(60)),fr60
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lddfi @(gr8,#__FPMEDIA_FR(62)),fr62
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__restore_skip_fr32_fr63:
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lddi @(gr8,#__FPMEDIA_FNER(0)),gr4
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movsg fner0,gr4
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movsg fner1,gr5
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or.p gr9,gr9,gr8
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bralr
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# the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...)
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__restore_acc_fr451:
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lddfi @(gr8,#__FPMEDIA_ACC(4)),fr16
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lddfi @(gr8,#__FPMEDIA_ACC(6)),fr18
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ldbfi @(gr8,#__FPMEDIA_ACCG(4)),fr20
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ldbfi @(gr8,#__FPMEDIA_ACCG(5)),fr21
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ldbfi @(gr8,#__FPMEDIA_ACCG(6)),fr22
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ldbfi @(gr8,#__FPMEDIA_ACCG(7)),fr23
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mwtacc fr16,acc8
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mwtacc fr17,acc9
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mwtacc fr18,acc10
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mwtacc fr19,acc11
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mwtaccg fr20,accg8
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mwtaccg fr21,accg9
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mwtaccg fr22,accg10
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mwtaccg fr23,accg11
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bra __restore_acc_cont
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# the FR555 also has ACC4-7/ACCG4-7 regs and an FSR0 reg
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__restore_acc_fr555:
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lddfi @(gr8,#__FPMEDIA_ACC(4)),fr16
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lddfi @(gr8,#__FPMEDIA_ACC(6)),fr18
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ldbfi @(gr8,#__FPMEDIA_ACCG(4)),fr20
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ldbfi @(gr8,#__FPMEDIA_ACCG(5)),fr21
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ldbfi @(gr8,#__FPMEDIA_ACCG(6)),fr22
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ldbfi @(gr8,#__FPMEDIA_ACCG(7)),fr23
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mnop.p
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mwtacc fr16,acc4
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mnop.p
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mwtacc fr17,acc5
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mnop.p
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mwtacc fr18,acc6
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mnop.p
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mwtacc fr19,acc7
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mnop.p
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mwtaccg fr20,accg4
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mnop.p
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mwtaccg fr21,accg5
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mnop.p
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mwtaccg fr22,accg6
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mnop.p
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mwtaccg fr23,accg7
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ldi @(gr8,#__FPMEDIA_FSR(0)),gr4
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movgs gr4,fsr0
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bra __restore_acc_cont
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###############################################################################
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#
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# save extra general regs and FP/Media regs
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# - void save_user_regs(struct user_context *target)
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#
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###############################################################################
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.globl save_user_regs
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save_user_regs:
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movsg hsr0,gr6
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ori gr6,#HSR0_GRHE|HSR0_FRLE|HSR0_FRHE,gr6
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movgs gr6,hsr0
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movsg hsr0,gr6
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movsg psr,gr7
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ori gr7,#PSR_EF|PSR_EM,gr7
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movgs gr7,psr
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movsg psr,gr7
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srli gr7,#24,gr7
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bar
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movsg fner0,gr4
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movsg fner1,gr5
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stdi.p gr4,@(gr8,#__FPMEDIA_FNER(0))
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# some CPU's have GR32-GR63
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setlos #HSR0_GRHE,gr4
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andcc gr6,gr4,gr0,icc0
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beq icc0,#1,__save_skip_gr32_gr63
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stdi gr32,@(gr8,#__INT_GR(32))
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stdi gr34,@(gr8,#__INT_GR(34))
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stdi gr36,@(gr8,#__INT_GR(36))
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stdi gr38,@(gr8,#__INT_GR(38))
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stdi gr40,@(gr8,#__INT_GR(40))
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stdi gr42,@(gr8,#__INT_GR(42))
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stdi gr44,@(gr8,#__INT_GR(44))
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stdi gr46,@(gr8,#__INT_GR(46))
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stdi gr48,@(gr8,#__INT_GR(48))
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stdi gr50,@(gr8,#__INT_GR(50))
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stdi gr52,@(gr8,#__INT_GR(52))
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stdi gr54,@(gr8,#__INT_GR(54))
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stdi gr56,@(gr8,#__INT_GR(56))
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stdi gr58,@(gr8,#__INT_GR(58))
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stdi gr60,@(gr8,#__INT_GR(60))
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stdi gr62,@(gr8,#__INT_GR(62))
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__save_skip_gr32_gr63:
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# all CPU's have FR0-FR31
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stdfi fr0 ,@(gr8,#__FPMEDIA_FR( 0))
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stdfi fr2 ,@(gr8,#__FPMEDIA_FR( 2))
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stdfi fr4 ,@(gr8,#__FPMEDIA_FR( 4))
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stdfi fr6 ,@(gr8,#__FPMEDIA_FR( 6))
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stdfi fr8 ,@(gr8,#__FPMEDIA_FR( 8))
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stdfi fr10,@(gr8,#__FPMEDIA_FR(10))
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stdfi fr12,@(gr8,#__FPMEDIA_FR(12))
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stdfi fr14,@(gr8,#__FPMEDIA_FR(14))
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stdfi fr16,@(gr8,#__FPMEDIA_FR(16))
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stdfi fr18,@(gr8,#__FPMEDIA_FR(18))
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stdfi fr20,@(gr8,#__FPMEDIA_FR(20))
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stdfi fr22,@(gr8,#__FPMEDIA_FR(22))
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stdfi fr24,@(gr8,#__FPMEDIA_FR(24))
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stdfi fr26,@(gr8,#__FPMEDIA_FR(26))
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stdfi fr28,@(gr8,#__FPMEDIA_FR(28))
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stdfi.p fr30,@(gr8,#__FPMEDIA_FR(30))
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# some CPU's have FR32-FR63
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setlos #HSR0_FRHE,gr4
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andcc gr6,gr4,gr0,icc0
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beq icc0,#1,__save_skip_fr32_fr63
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stdfi fr32,@(gr8,#__FPMEDIA_FR(32))
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stdfi fr34,@(gr8,#__FPMEDIA_FR(34))
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stdfi fr36,@(gr8,#__FPMEDIA_FR(36))
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stdfi fr38,@(gr8,#__FPMEDIA_FR(38))
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stdfi fr40,@(gr8,#__FPMEDIA_FR(40))
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stdfi fr42,@(gr8,#__FPMEDIA_FR(42))
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stdfi fr44,@(gr8,#__FPMEDIA_FR(44))
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stdfi fr46,@(gr8,#__FPMEDIA_FR(46))
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stdfi fr48,@(gr8,#__FPMEDIA_FR(48))
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stdfi fr50,@(gr8,#__FPMEDIA_FR(50))
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stdfi fr52,@(gr8,#__FPMEDIA_FR(52))
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stdfi fr54,@(gr8,#__FPMEDIA_FR(54))
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stdfi fr56,@(gr8,#__FPMEDIA_FR(56))
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stdfi fr58,@(gr8,#__FPMEDIA_FR(58))
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stdfi fr60,@(gr8,#__FPMEDIA_FR(60))
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stdfi fr62,@(gr8,#__FPMEDIA_FR(62))
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__save_skip_fr32_fr63:
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mrdacc acc0 ,fr4
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mrdacc acc1 ,fr5
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stdfi.p fr4 ,@(gr8,#__FPMEDIA_ACC(0))
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mrdacc acc2 ,fr6
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mrdacc acc3 ,fr7
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stdfi.p fr6 ,@(gr8,#__FPMEDIA_ACC(2))
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mrdaccg accg0,fr4
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stbfi.p fr4 ,@(gr8,#__FPMEDIA_ACCG(0))
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mrdaccg accg1,fr5
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stbfi.p fr5 ,@(gr8,#__FPMEDIA_ACCG(1))
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mrdaccg accg2,fr6
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stbfi.p fr6 ,@(gr8,#__FPMEDIA_ACCG(2))
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mrdaccg accg3,fr7
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stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(3))
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movsg msr0 ,gr4
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movsg msr1 ,gr5
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stdi gr4 ,@(gr8,#__FPMEDIA_MSR(0))
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# some CPUs have extra ACCx and ACCGx regs and maybe FSRx regs
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subicc.p gr7,#0x50,gr0,icc0
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subicc gr7,#0x31,gr0,icc1
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beq icc0,#0,__save_acc_fr451
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beq icc1,#0,__save_acc_fr555
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__save_acc_cont:
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lddfi @(gr8,#__FPMEDIA_FR(4)),fr4
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lddfi.p @(gr8,#__FPMEDIA_FR(6)),fr6
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bralr
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# the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...)
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__save_acc_fr451:
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mrdacc acc8 ,fr4
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mrdacc acc9 ,fr5
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stdfi.p fr4 ,@(gr8,#__FPMEDIA_ACC(4))
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mrdacc acc10,fr6
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mrdacc acc11,fr7
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stdfi.p fr6 ,@(gr8,#__FPMEDIA_ACC(6))
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mrdaccg accg8,fr4
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stbfi.p fr4 ,@(gr8,#__FPMEDIA_ACCG(4))
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mrdaccg accg9,fr5
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stbfi.p fr5 ,@(gr8,#__FPMEDIA_ACCG(5))
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mrdaccg accg10,fr6
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stbfi.p fr6 ,@(gr8,#__FPMEDIA_ACCG(6))
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mrdaccg accg11,fr7
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stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(7))
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bra __save_acc_cont
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# the FR555 also has ACC4-7/ACCG4-7 regs and an FSR0 reg
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__save_acc_fr555:
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mnop.p
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mrdacc acc4 ,fr4
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mnop.p
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mrdacc acc5 ,fr5
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stdfi fr4 ,@(gr8,#__FPMEDIA_ACC(4))
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mnop.p
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mrdacc acc6 ,fr6
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mnop.p
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mrdacc acc7 ,fr7
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stdfi fr6 ,@(gr8,#__FPMEDIA_ACC(6))
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mnop.p
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mrdaccg accg4,fr4
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stbfi fr4 ,@(gr8,#__FPMEDIA_ACCG(4))
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mnop.p
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mrdaccg accg5,fr5
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stbfi fr5 ,@(gr8,#__FPMEDIA_ACCG(5))
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mnop.p
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mrdaccg accg6,fr6
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stbfi fr6 ,@(gr8,#__FPMEDIA_ACCG(6))
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mnop.p
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mrdaccg accg7,fr7
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stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(7))
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movsg fsr0 ,gr4
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sti gr4 ,@(gr8,#__FPMEDIA_FSR(0))
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bra __save_acc_cont
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