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ce1d43b9a9
linux/arch/mips/alchemy
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Manuel Lauss ce1d43b9a9 MIPS: Alchemy: support multiple GPIO styles in one kernel 
For GPIOLIB=y decide at runtime which gpiochips to register;
in the GPIOLIB=n case, the gpio headers need to be reshuffled
a bit to make multiple implementations coexist peacefully.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2679/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:23 +01:00
..
common MIPS: Alchemy: support multiple GPIO styles in one kernel 2011-10-24 23:34:23 +01:00
devboards MIPS: Alchemy: DB1200: Disable cascade IRQ in handler 2011-09-21 17:53:32 +02:00
gpr MIPS: Alchemy: Rewrite UART setup and constants. 2011-05-19 09:55:45 +01:00
mtx-1 MIPS: Alchemy: Clean up GPIO registers and accessors 2011-05-19 09:55:46 +01:00
xxs1500 MIPS: Alchemy: Rewrite UART setup and constants. 2011-05-19 09:55:45 +01:00
Kconfig MIPS: Alchemy: Add basic support for the GPR board 2010-08-05 13:26:09 +01:00
Platform MIPS: Alchemy: Add basic support for the GPR board 2010-08-05 13:26:09 +01:00