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linux/arch/arm/mach-tegra/board-seaboard.c
Stephen Warren cfeb34ede4 ARM: Tegra: Seaboard: Re-order sdhci device registration 
Ensure the built-in eMMC is always named mmcblk0.

This is important because:

* U-Boot statically assigns MMC device IDs based on controller ID.
* U-Boot assumes that kernel MMC device ID numbering matches U-Boot numbering.
* U-Boot provides a kernel cmdline option e.g. root=/dev/mmcblk0p3 based on
  that numbering.
* The kernel dynamically assigns MMC device IDs based on enumeration order of
  the memory behind the host controller, rather than statically based on host
  controller ID like U-Boot.
* By registering the SDHCI controller for the built-in eMMC first, the
  enumeration of the built-in eMMC is performed first, and hence eMMC gets
  assigned ID 0 just like U-Boot. If the SD slot is filled, it then gets
  assigned ID 1 just like U-Boot.
* If the MMC IDs mismatch, and the system boots from SD card not eMMC, the
  kernel will access the eMMC instead of SD card when attempting to mount
  /dev/mmcblk1p3 as the root fs. If eMMC is not partitioned/formatted, the
  kernel will panic since the root fs can't be mounted. If eMMC is partitioned
  and formatted, the kernel will mount an unexpected filesystem as the root fs.

This change relies on the SDHCI driver performing initial card detection
synchronously during device registration. This is currently the case.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
2011-07-12 20:38:39 -07:00

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/*
* Copyright (c) 2010, 2011 NVIDIA Corporation.
* Copyright (C) 2010, 2011 Google, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/i2c.h>
#include <linux/i2c-tegra.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include <mach/sdhci.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "board.h"
#include "board-seaboard.h"
#include "clock.h"
#include "devices.h"
#include "gpio-names.h"
static struct plat_serial8250_port debug_uart_platform_data[] = {
{
/* Memory and IRQ filled in before registration */
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 216000000,
}, {
.flags = 0,
}
};
static struct platform_device debug_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = debug_uart_platform_data,
},
};
static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
/* name parent rate enabled */
{ "uartb", "pll_p", 216000000, true},
{ "uartd", "pll_p", 216000000, true},
{ NULL, NULL, 0, 0},
};
static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = {
.bus_clk_rate = 400000.
};
static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = {
.bus_clk_rate = 400000,
};
static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = {
.bus_clk_rate = 400000,
};
static struct tegra_i2c_platform_data seaboard_dvc_platform_data = {
.bus_clk_rate = 400000,
};
static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
{
.code = SW_LID,
.gpio = TEGRA_GPIO_LIDSWITCH,
.active_low = 0,
.desc = "Lid",
.type = EV_SW,
.wakeup = 1,
.debounce_interval = 1,
},
{
.code = KEY_POWER,
.gpio = TEGRA_GPIO_POWERKEY,
.active_low = 1,
.desc = "Power",
.type = EV_KEY,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data seaboard_gpio_keys = {
.buttons = seaboard_gpio_keys_buttons,
.nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
};
static struct platform_device seaboard_gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &seaboard_gpio_keys,
}
};
static struct tegra_sdhci_platform_data sdhci_pdata1 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
};
static struct tegra_sdhci_platform_data sdhci_pdata3 = {
.cd_gpio = TEGRA_GPIO_SD2_CD,
.wp_gpio = TEGRA_GPIO_SD2_WP,
.power_gpio = TEGRA_GPIO_SD2_POWER,
};
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
.is_8bit = 1,
};
static struct platform_device *seaboard_devices[] __initdata = {
&debug_uart,
&tegra_pmu_device,
&tegra_sdhci_device4,
&tegra_sdhci_device3,
&tegra_sdhci_device1,
&seaboard_gpio_keys_device,
};
static struct i2c_board_info __initdata isl29018_device = {
I2C_BOARD_INFO("isl29018", 0x44),
.irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
};
static struct i2c_board_info __initdata adt7461_device = {
I2C_BOARD_INFO("adt7461", 0x4c),
};
static void __init seaboard_i2c_init(void)
{
gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
i2c_register_board_info(0, &isl29018_device, 1);
i2c_register_board_info(4, &adt7461_device, 1);
tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data;
tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data;
tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data;
tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data;
platform_device_register(&tegra_i2c_device1);
platform_device_register(&tegra_i2c_device2);
platform_device_register(&tegra_i2c_device3);
platform_device_register(&tegra_i2c_device4);
}
static void __init seaboard_common_init(void)
{
seaboard_pinmux_init();
tegra_clk_init_from_table(seaboard_clk_init_table);
tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
}
static void __init tegra_seaboard_init(void)
{
/* Seaboard uses UARTD for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
debug_uart_platform_data[0].irq = INT_UARTD;
seaboard_common_init();
seaboard_i2c_init();
}
static void __init tegra_kaen_init(void)
{
/* Kaen uses UARTB for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
debug_uart_platform_data[0].irq = INT_UARTB;
seaboard_common_init();
seaboard_i2c_init();
}
static void __init tegra_wario_init(void)
{
/* Wario uses UARTB for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
debug_uart_platform_data[0].irq = INT_UARTB;
seaboard_common_init();
seaboard_i2c_init();
}
MACHINE_START(SEABOARD, "seaboard")
.boot_params = 0x00000100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
.timer = &tegra_timer,
.init_machine = tegra_seaboard_init,
MACHINE_END
MACHINE_START(KAEN, "kaen")
.boot_params = 0x00000100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
.timer = &tegra_timer,
.init_machine = tegra_kaen_init,
MACHINE_END
MACHINE_START(WARIO, "wario")
.boot_params = 0x00000100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
.timer = &tegra_timer,
.init_machine = tegra_wario_init,
MACHINE_END
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