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559d670189
The core files of DSS2. DSS2 commits are split a bit artificially to make the individual commits smaller, and DSS2 doesn't compile properly without the rest of the core commits. This shouldn't be a problem, as no configuration uses DSS2 yet. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
576 lines
15 KiB
C
576 lines
15 KiB
C
/*
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* linux/include/asm-arm/arch-omap/display.h
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*
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* Copyright (C) 2008 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_ARCH_OMAP_DISPLAY_H
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#define __ASM_ARCH_OMAP_DISPLAY_H
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#include <linux/list.h>
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#include <linux/kobject.h>
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#include <linux/device.h>
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#include <asm/atomic.h>
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#define DISPC_IRQ_FRAMEDONE (1 << 0)
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#define DISPC_IRQ_VSYNC (1 << 1)
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#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
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#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
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#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
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#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
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#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
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#define DISPC_IRQ_GFX_END_WIN (1 << 7)
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#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
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#define DISPC_IRQ_OCP_ERR (1 << 9)
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#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
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#define DISPC_IRQ_VID1_END_WIN (1 << 11)
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#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
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#define DISPC_IRQ_VID2_END_WIN (1 << 13)
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#define DISPC_IRQ_SYNC_LOST (1 << 14)
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#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
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#define DISPC_IRQ_WAKEUP (1 << 16)
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struct omap_dss_device;
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struct omap_overlay_manager;
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enum omap_display_type {
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OMAP_DISPLAY_TYPE_NONE = 0,
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OMAP_DISPLAY_TYPE_DPI = 1 << 0,
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OMAP_DISPLAY_TYPE_DBI = 1 << 1,
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OMAP_DISPLAY_TYPE_SDI = 1 << 2,
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OMAP_DISPLAY_TYPE_DSI = 1 << 3,
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OMAP_DISPLAY_TYPE_VENC = 1 << 4,
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};
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enum omap_plane {
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OMAP_DSS_GFX = 0,
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OMAP_DSS_VIDEO1 = 1,
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OMAP_DSS_VIDEO2 = 2
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};
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enum omap_channel {
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OMAP_DSS_CHANNEL_LCD = 0,
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OMAP_DSS_CHANNEL_DIGIT = 1,
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};
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enum omap_color_mode {
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OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
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OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
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OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
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OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
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OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
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OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
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OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
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OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
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OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
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OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
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OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
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OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
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OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
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OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
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OMAP_DSS_COLOR_GFX_OMAP2 =
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OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
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OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
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OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
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OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
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OMAP_DSS_COLOR_VID_OMAP2 =
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OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
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OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
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OMAP_DSS_COLOR_UYVY,
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OMAP_DSS_COLOR_GFX_OMAP3 =
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OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
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OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
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OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
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OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
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OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
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OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
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OMAP_DSS_COLOR_VID1_OMAP3 =
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OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
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OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
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OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
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OMAP_DSS_COLOR_VID2_OMAP3 =
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OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
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OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
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OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
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OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
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OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
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};
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enum omap_lcd_display_type {
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OMAP_DSS_LCD_DISPLAY_STN,
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OMAP_DSS_LCD_DISPLAY_TFT,
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};
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enum omap_dss_load_mode {
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OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
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OMAP_DSS_LOAD_CLUT_ONLY = 1,
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OMAP_DSS_LOAD_FRAME_ONLY = 2,
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OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
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};
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enum omap_dss_trans_key_type {
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OMAP_DSS_COLOR_KEY_GFX_DST = 0,
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OMAP_DSS_COLOR_KEY_VID_SRC = 1,
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};
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enum omap_rfbi_te_mode {
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OMAP_DSS_RFBI_TE_MODE_1 = 1,
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OMAP_DSS_RFBI_TE_MODE_2 = 2,
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};
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enum omap_panel_config {
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OMAP_DSS_LCD_IVS = 1<<0,
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OMAP_DSS_LCD_IHS = 1<<1,
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OMAP_DSS_LCD_IPC = 1<<2,
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OMAP_DSS_LCD_IEO = 1<<3,
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OMAP_DSS_LCD_RF = 1<<4,
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OMAP_DSS_LCD_ONOFF = 1<<5,
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OMAP_DSS_LCD_TFT = 1<<20,
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};
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enum omap_dss_venc_type {
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OMAP_DSS_VENC_TYPE_COMPOSITE,
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OMAP_DSS_VENC_TYPE_SVIDEO,
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};
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enum omap_display_caps {
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OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
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OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
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};
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enum omap_dss_update_mode {
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OMAP_DSS_UPDATE_DISABLED = 0,
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OMAP_DSS_UPDATE_AUTO,
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OMAP_DSS_UPDATE_MANUAL,
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};
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enum omap_dss_display_state {
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OMAP_DSS_DISPLAY_DISABLED = 0,
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OMAP_DSS_DISPLAY_ACTIVE,
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OMAP_DSS_DISPLAY_SUSPENDED,
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};
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/* XXX perhaps this should be removed */
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enum omap_dss_overlay_managers {
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OMAP_DSS_OVL_MGR_LCD,
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OMAP_DSS_OVL_MGR_TV,
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};
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enum omap_dss_rotation_type {
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OMAP_DSS_ROT_DMA = 0,
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OMAP_DSS_ROT_VRFB = 1,
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};
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/* clockwise rotation angle */
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enum omap_dss_rotation_angle {
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OMAP_DSS_ROT_0 = 0,
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OMAP_DSS_ROT_90 = 1,
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OMAP_DSS_ROT_180 = 2,
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OMAP_DSS_ROT_270 = 3,
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};
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enum omap_overlay_caps {
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OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
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OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
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};
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enum omap_overlay_manager_caps {
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OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
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};
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/* RFBI */
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struct rfbi_timings {
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int cs_on_time;
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int cs_off_time;
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int we_on_time;
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int we_off_time;
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int re_on_time;
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int re_off_time;
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int we_cycle_time;
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int re_cycle_time;
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int cs_pulse_width;
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int access_time;
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int clk_div;
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u32 tim[5]; /* set by rfbi_convert_timings() */
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int converted;
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};
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void omap_rfbi_write_command(const void *buf, u32 len);
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void omap_rfbi_read_data(void *buf, u32 len);
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void omap_rfbi_write_data(const void *buf, u32 len);
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void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
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u16 x, u16 y,
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u16 w, u16 h);
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int omap_rfbi_enable_te(bool enable, unsigned line);
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int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
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unsigned hs_pulse_time, unsigned vs_pulse_time,
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int hs_pol_inv, int vs_pol_inv, int extif_div);
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/* DSI */
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void dsi_bus_lock(void);
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void dsi_bus_unlock(void);
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int dsi_vc_dcs_write(int channel, u8 *data, int len);
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int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
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int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
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int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
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int dsi_vc_send_null(int channel);
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int dsi_vc_send_bta_sync(int channel);
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/* Board specific data */
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struct omap_dss_board_info {
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int (*get_last_off_on_transaction_id)(struct device *dev);
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int num_devices;
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struct omap_dss_device **devices;
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struct omap_dss_device *default_device;
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};
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struct omap_video_timings {
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/* Unit: pixels */
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u16 x_res;
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/* Unit: pixels */
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u16 y_res;
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/* Unit: KHz */
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u32 pixel_clock;
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/* Unit: pixel clocks */
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u16 hsw; /* Horizontal synchronization pulse width */
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/* Unit: pixel clocks */
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u16 hfp; /* Horizontal front porch */
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/* Unit: pixel clocks */
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u16 hbp; /* Horizontal back porch */
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/* Unit: line clocks */
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u16 vsw; /* Vertical synchronization pulse width */
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/* Unit: line clocks */
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u16 vfp; /* Vertical front porch */
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/* Unit: line clocks */
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u16 vbp; /* Vertical back porch */
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};
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#ifdef CONFIG_OMAP2_DSS_VENC
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/* Hardcoded timings for tv modes. Venc only uses these to
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* identify the mode, and does not actually use the configs
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* itself. However, the configs should be something that
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* a normal monitor can also show */
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const extern struct omap_video_timings omap_dss_pal_timings;
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const extern struct omap_video_timings omap_dss_ntsc_timings;
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#endif
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struct omap_overlay_info {
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bool enabled;
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u32 paddr;
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void __iomem *vaddr;
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u16 screen_width;
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u16 width;
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u16 height;
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enum omap_color_mode color_mode;
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u8 rotation;
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enum omap_dss_rotation_type rotation_type;
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bool mirror;
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u16 pos_x;
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u16 pos_y;
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u16 out_width; /* if 0, out_width == width */
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u16 out_height; /* if 0, out_height == height */
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u8 global_alpha;
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};
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struct omap_overlay {
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struct kobject kobj;
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struct list_head list;
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/* static fields */
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const char *name;
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int id;
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enum omap_color_mode supported_modes;
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enum omap_overlay_caps caps;
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/* dynamic fields */
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struct omap_overlay_manager *manager;
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struct omap_overlay_info info;
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/* if true, info has been changed, but not applied() yet */
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bool info_dirty;
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int (*set_manager)(struct omap_overlay *ovl,
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struct omap_overlay_manager *mgr);
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int (*unset_manager)(struct omap_overlay *ovl);
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int (*set_overlay_info)(struct omap_overlay *ovl,
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struct omap_overlay_info *info);
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void (*get_overlay_info)(struct omap_overlay *ovl,
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struct omap_overlay_info *info);
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int (*wait_for_go)(struct omap_overlay *ovl);
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};
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struct omap_overlay_manager_info {
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u32 default_color;
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enum omap_dss_trans_key_type trans_key_type;
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u32 trans_key;
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bool trans_enabled;
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bool alpha_enabled;
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};
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struct omap_overlay_manager {
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struct kobject kobj;
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struct list_head list;
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/* static fields */
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const char *name;
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int id;
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enum omap_overlay_manager_caps caps;
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int num_overlays;
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struct omap_overlay **overlays;
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enum omap_display_type supported_displays;
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/* dynamic fields */
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struct omap_dss_device *device;
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struct omap_overlay_manager_info info;
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bool device_changed;
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/* if true, info has been changed but not applied() yet */
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bool info_dirty;
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int (*set_device)(struct omap_overlay_manager *mgr,
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struct omap_dss_device *dssdev);
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int (*unset_device)(struct omap_overlay_manager *mgr);
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int (*set_manager_info)(struct omap_overlay_manager *mgr,
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struct omap_overlay_manager_info *info);
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void (*get_manager_info)(struct omap_overlay_manager *mgr,
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struct omap_overlay_manager_info *info);
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int (*apply)(struct omap_overlay_manager *mgr);
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int (*wait_for_go)(struct omap_overlay_manager *mgr);
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};
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struct omap_dss_device {
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struct device dev;
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enum omap_display_type type;
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union {
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struct {
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u8 data_lines;
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} dpi;
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struct {
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u8 channel;
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u8 data_lines;
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} rfbi;
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struct {
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u8 datapairs;
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} sdi;
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struct {
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u8 clk_lane;
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u8 clk_pol;
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u8 data1_lane;
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u8 data1_pol;
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u8 data2_lane;
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u8 data2_pol;
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struct {
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u16 regn;
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u16 regm;
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u16 regm3;
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u16 regm4;
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u16 lp_clk_div;
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u16 lck_div;
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u16 pck_div;
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} div;
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bool ext_te;
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u8 ext_te_gpio;
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} dsi;
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struct {
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enum omap_dss_venc_type type;
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bool invert_polarity;
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} venc;
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} phy;
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struct {
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struct omap_video_timings timings;
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int acbi; /* ac-bias pin transitions per interrupt */
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/* Unit: line clocks */
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int acb; /* ac-bias pin frequency */
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enum omap_panel_config config;
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u8 recommended_bpp;
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struct omap_dss_device *ctrl;
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} panel;
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struct {
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u8 pixel_size;
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struct rfbi_timings rfbi_timings;
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struct omap_dss_device *panel;
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} ctrl;
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int reset_gpio;
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int max_backlight_level;
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const char *name;
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/* used to match device to driver */
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const char *driver_name;
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void *data;
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struct omap_dss_driver *driver;
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/* helper variable for driver suspend/resume */
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bool activate_after_resume;
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enum omap_display_caps caps;
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struct omap_overlay_manager *manager;
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enum omap_dss_display_state state;
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int (*enable)(struct omap_dss_device *dssdev);
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void (*disable)(struct omap_dss_device *dssdev);
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int (*suspend)(struct omap_dss_device *dssdev);
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int (*resume)(struct omap_dss_device *dssdev);
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void (*get_resolution)(struct omap_dss_device *dssdev,
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u16 *xres, u16 *yres);
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int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
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int (*check_timings)(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings);
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void (*set_timings)(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings);
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void (*get_timings)(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings);
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int (*update)(struct omap_dss_device *dssdev,
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u16 x, u16 y, u16 w, u16 h);
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int (*sync)(struct omap_dss_device *dssdev);
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int (*wait_vsync)(struct omap_dss_device *dssdev);
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int (*set_update_mode)(struct omap_dss_device *dssdev,
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enum omap_dss_update_mode);
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enum omap_dss_update_mode (*get_update_mode)
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(struct omap_dss_device *dssdev);
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int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
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int (*get_te)(struct omap_dss_device *dssdev);
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u8 (*get_rotate)(struct omap_dss_device *dssdev);
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int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
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bool (*get_mirror)(struct omap_dss_device *dssdev);
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int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
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int (*run_test)(struct omap_dss_device *dssdev, int test);
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int (*memory_read)(struct omap_dss_device *dssdev,
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void *buf, size_t size,
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u16 x, u16 y, u16 w, u16 h);
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int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
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u32 (*get_wss)(struct omap_dss_device *dssdev);
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/* platform specific */
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int (*platform_enable)(struct omap_dss_device *dssdev);
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void (*platform_disable)(struct omap_dss_device *dssdev);
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int (*set_backlight)(struct omap_dss_device *dssdev, int level);
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int (*get_backlight)(struct omap_dss_device *dssdev);
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};
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struct omap_dss_driver {
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struct device_driver driver;
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int (*probe)(struct omap_dss_device *);
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void (*remove)(struct omap_dss_device *);
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int (*enable)(struct omap_dss_device *display);
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void (*disable)(struct omap_dss_device *display);
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int (*suspend)(struct omap_dss_device *display);
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int (*resume)(struct omap_dss_device *display);
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int (*run_test)(struct omap_dss_device *display, int test);
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void (*setup_update)(struct omap_dss_device *dssdev,
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u16 x, u16 y, u16 w, u16 h);
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int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
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int (*wait_for_te)(struct omap_dss_device *dssdev);
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u8 (*get_rotate)(struct omap_dss_device *dssdev);
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int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
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bool (*get_mirror)(struct omap_dss_device *dssdev);
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int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
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int (*memory_read)(struct omap_dss_device *dssdev,
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void *buf, size_t size,
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u16 x, u16 y, u16 w, u16 h);
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};
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int omap_dss_register_driver(struct omap_dss_driver *);
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void omap_dss_unregister_driver(struct omap_dss_driver *);
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int omap_dss_register_device(struct omap_dss_device *);
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void omap_dss_unregister_device(struct omap_dss_device *);
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void omap_dss_get_device(struct omap_dss_device *dssdev);
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void omap_dss_put_device(struct omap_dss_device *dssdev);
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#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
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struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
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struct omap_dss_device *omap_dss_find_device(void *data,
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int (*match)(struct omap_dss_device *dssdev, void *data));
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|
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int omap_dss_start_device(struct omap_dss_device *dssdev);
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void omap_dss_stop_device(struct omap_dss_device *dssdev);
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int omap_dss_get_num_overlay_managers(void);
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struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
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int omap_dss_get_num_overlays(void);
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struct omap_overlay *omap_dss_get_overlay(int num);
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|
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typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
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int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
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int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
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int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
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int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
|
|
unsigned long timeout);
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|
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#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
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#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
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#endif
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