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4c18e77f71
Multiple peripherals in SPEAr share common hardware interrupt lines. This patch adds support for a shared irq layer, which registers hardware irqs by itself and exposes virtual irq numbers to peripherals. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/*
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* arch/arm/mach-spear3xx/include/mach/spear300.h
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*
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* SPEAr300 Machine specific definition
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*
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* Copyright (C) 2009 ST Microelectronics
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* Viresh Kumar<viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifdef CONFIG_MACH_SPEAR300
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#ifndef __MACH_SPEAR300_H
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#define __MACH_SPEAR300_H
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/* Base address of various IPs */
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#define SPEAR300_TELECOM_BASE 0x50000000
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#define SPEAR300_TELECOM_SIZE 0x10000000
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/* Interrupt registers offsets and masks */
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#define SPEAR300_TELECOM_REG_SIZE 0x00010000
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#define INT_ENB_MASK_REG 0x54
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#define INT_STS_MASK_REG 0x58
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#define IT_PERS_S_IRQ_MASK (1 << 0)
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#define IT_CHANGE_S_IRQ_MASK (1 << 1)
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#define I2S_IRQ_MASK (1 << 2)
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#define TDM_IRQ_MASK (1 << 3)
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#define CAMERA_L_IRQ_MASK (1 << 4)
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#define CAMERA_F_IRQ_MASK (1 << 5)
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#define CAMERA_V_IRQ_MASK (1 << 6)
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#define KEYBOARD_IRQ_MASK (1 << 7)
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#define GPIO1_IRQ_MASK (1 << 8)
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#define SHIRQ_RAS1_MASK 0x1FF
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#define SPEAR300_CLCD_BASE 0x60000000
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#define SPEAR300_CLCD_SIZE 0x10000000
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#define SPEAR300_SDIO_BASE 0x70000000
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#define SPEAR300_SDIO_SIZE 0x10000000
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#define SPEAR300_NAND_0_BASE 0x80000000
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#define SPEAR300_NAND_0_SIZE 0x04000000
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#define SPEAR300_NAND_1_BASE 0x84000000
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#define SPEAR300_NAND_1_SIZE 0x04000000
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#define SPEAR300_NAND_2_BASE 0x88000000
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#define SPEAR300_NAND_2_SIZE 0x04000000
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#define SPEAR300_NAND_3_BASE 0x8c000000
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#define SPEAR300_NAND_3_SIZE 0x04000000
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#define SPEAR300_NOR_0_BASE 0x90000000
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#define SPEAR300_NOR_0_SIZE 0x01000000
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#define SPEAR300_NOR_1_BASE 0x91000000
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#define SPEAR300_NOR_1_SIZE 0x01000000
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#define SPEAR300_NOR_2_BASE 0x92000000
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#define SPEAR300_NOR_2_SIZE 0x01000000
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#define SPEAR300_NOR_3_BASE 0x93000000
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#define SPEAR300_NOR_3_SIZE 0x01000000
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#define SPEAR300_FSMC_BASE 0x94000000
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#define SPEAR300_FSMC_SIZE 0x05000000
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#define SPEAR300_SOC_CONFIG_BASE 0x99000000
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#define SPEAR300_SOC_CONFIG_SIZE 0x00000008
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#define SPEAR300_KEYBOARD_BASE 0xA0000000
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#define SPEAR300_KEYBOARD_SIZE 0x09000000
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#define SPEAR300_GPIO_BASE 0xA9000000
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#define SPEAR300_GPIO_SIZE 0x07000000
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#endif /* __MACH_SPEAR300_H */
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#endif /* CONFIG_MACH_SPEAR300 */
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