mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-27 20:07:09 +00:00
dba4072a4a
Refactor the PLL programming code to make it useable by the new PLL types introduced by Tegra114. The following changes were done: * Split programming the PLL into updating m,n,p and updating cpcon * Move locking from _update_pll_cpcon() to clk_pll_set_rate() * Introduce _get_pll_mnp() helper * Move check for identical m,n,p values to clk_pll_set_rate() * struct tegra_clk_pll_freq_table will always contain the values as defined by the hardware. * Simplify the arguments to clk_pll_wait_for_lock() * Split _tegra_clk_register_pll() Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
||
|---|---|---|
| .. | ||
| mmp | ||
| mvebu | ||
| mxs | ||
| socfpga | ||
| spear | ||
| sunxi | ||
| tegra | ||
| ux500 | ||
| versatile | ||
| x86 | ||
| clk-axi-clkgen.c | ||
| clk-bcm2835.c | ||
| clk-composite.c | ||
| clk-devres.c | ||
| clk-divider.c | ||
| clk-fixed-factor.c | ||
| clk-fixed-rate.c | ||
| clk-gate.c | ||
| clk-highbank.c | ||
| clk-ls1x.c | ||
| clk-max77686.c | ||
| clk-mux.c | ||
| clk-nomadik.c | ||
| clk-prima2.c | ||
| clk-twl6040.c | ||
| clk-u300.c | ||
| clk-vt8500.c | ||
| clk-wm831x.c | ||
| clk-zynq.c | ||
| clk.c | ||
| clkdev.c | ||
| Kconfig | ||
| Makefile | ||