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b3a8b751c1
The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| .. | ||
| abort-ev4.S | ||
| abort-ev4t.S | ||
| abort-ev5t.S | ||
| abort-ev5tj.S | ||
| abort-ev6.S | ||
| abort-ev7.S | ||
| abort-lv4t.S | ||
| abort-macro.S | ||
| abort-nommu.S | ||
| alignment.c | ||
| cache-l2x0.c | ||
| cache-v3.S | ||
| cache-v4.S | ||
| cache-v4wb.S | ||
| cache-v4wt.S | ||
| cache-v6.S | ||
| cache-v7.S | ||
| consistent.c | ||
| context.c | ||
| copypage-feroceon.S | ||
| copypage-v3.S | ||
| copypage-v4mc.c | ||
| copypage-v4wb.S | ||
| copypage-v4wt.S | ||
| copypage-v6.c | ||
| copypage-xsc3.S | ||
| copypage-xscale.c | ||
| discontig.c | ||
| extable.c | ||
| fault-armv.c | ||
| fault.c | ||
| fault.h | ||
| flush.c | ||
| init.c | ||
| iomap.c | ||
| ioremap.c | ||
| Kconfig | ||
| Makefile | ||
| mm.h | ||
| mmap.c | ||
| mmu.c | ||
| nommu.c | ||
| pgd.c | ||
| proc-arm6_7.S | ||
| proc-arm7tdmi.S | ||
| proc-arm9tdmi.S | ||
| proc-arm720.S | ||
| proc-arm740.S | ||
| proc-arm920.S | ||
| proc-arm922.S | ||
| proc-arm925.S | ||
| proc-arm926.S | ||
| proc-arm940.S | ||
| proc-arm946.S | ||
| proc-arm1020.S | ||
| proc-arm1020e.S | ||
| proc-arm1022.S | ||
| proc-arm1026.S | ||
| proc-feroceon.S | ||
| proc-macros.S | ||
| proc-sa110.S | ||
| proc-sa1100.S | ||
| proc-syms.c | ||
| proc-v6.S | ||
| proc-v7.S | ||
| proc-xsc3.S | ||
| proc-xscale.S | ||
| tlb-v3.S | ||
| tlb-v4.S | ||
| tlb-v4wb.S | ||
| tlb-v4wbi.S | ||
| tlb-v6.S | ||
| tlb-v7.S | ||