Heiko Stuebner dd79c0bea7 clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls ...

Add the new flag to gpll and cpll on rk3188 and similar and to
gpll, cpll and npll on rk3288.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

2014-11-25 09:57:22 +01:00

..

clk-cpu.c

clk: rockchip: add new clock-type for the cpuclk

2014-09-27 17:57:41 +02:00

clk-pll.c

clk: rockchip: add optional sync to pll rate parameters

2014-11-25 09:57:18 +01:00

clk-rk3188.c

clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls

2014-11-25 09:57:22 +01:00

clk-rk3288.c

clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls

2014-11-25 09:57:22 +01:00

clk-rockchip.c

…

clk.c

clk: rockchip: add ability to specify pll-specific flags

2014-11-25 09:57:07 +01:00

clk.h

clk: rockchip: add optional sync to pll rate parameters

2014-11-25 09:57:18 +01:00

Makefile

clk: rockchip: add new clock-type for the cpuclk

2014-09-27 17:57:41 +02:00

softrst.c

clk: rockchip: add reset controller

2014-07-13 12:17:07 -07:00