Lu Zhihe 3d768213a6 edac: x38 fix mchbar high register addr ...

Intel X38 MCHBAR is a 64bits register, base from 0x48, so its higher base
is 0x4C.

Signed-off-by: Lu Zhihe <tombowfly@gmail.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Cc: <stable@kernel.org>		[2.6.30.x]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2009-07-29 19:10:34 -07:00

..

amd64_edac_dbg.c

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amd64_edac_err_types.c

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amd64_edac_inj.c

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amd64_edac.c

amd64_edac: read the right F2 maskoffset reg

2009-07-27 14:42:24 +02:00

amd64_edac.h

amd64_edac: misc small cleanups

2009-06-26 13:06:41 +02:00

amd76x_edac.c

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amd8111_edac.c

edac: add edac_device_alloc_index()

2009-06-18 13:03:56 -07:00

amd8111_edac.h

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amd8131_edac.c

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amd8131_edac.h

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cell_edac.c

edac: add missing __devexit_p()

2009-06-18 13:03:57 -07:00

cpc925_edac.c

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e7xxx_edac.c

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e752x_edac.c

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edac_core.h

edac: add DDR3 memory type for MPC85xx EDAC

2009-06-30 18:55:59 -07:00

edac_device_sysfs.c

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edac_device.c

edac: add edac_device_alloc_index()

2009-06-18 13:03:56 -07:00

edac_mc_sysfs.c

edac: add DDR3 memory type for MPC85xx EDAC

2009-06-30 18:55:59 -07:00

edac_mc.c

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edac_module.c

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edac_module.h

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edac_pci_sysfs.c

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edac_pci.c

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edac_stub.c

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i3000_edac.c

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i5000_edac.c

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i5100_edac.c

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i5400_edac.c

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i82443bxgx_edac.c

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i82860_edac.c

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i82875p_edac.c

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i82975x_edac.c

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Kconfig

edac: Kconfig: fix the meaning of EDAC abbreviation

2009-06-18 13:03:57 -07:00

Makefile

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mpc85xx_edac.c

edac: add DDR3 memory type for MPC85xx EDAC

2009-06-30 18:55:59 -07:00

mpc85xx_edac.h

edac: add DDR3 memory type for MPC85xx EDAC

2009-06-30 18:55:59 -07:00

mv64x60_edac.c

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mv64x60_edac.h

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pasemi_edac.c

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ppc4xx_edac.c

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ppc4xx_edac.h

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r82600_edac.c

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x38_edac.c

edac: x38 fix mchbar high register addr

2009-07-29 19:10:34 -07:00