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e1ef824146
Required by x86. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
727 lines
18 KiB
C
727 lines
18 KiB
C
/*
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* linux/kernel/irq/chip.c
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*
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* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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*
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* This file contains the core interrupt handling code, for irq-chip
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* based architectures.
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*
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* Detailed information is available in Documentation/DocBook/genericirq
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*/
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include "internals.h"
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/**
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* irq_set_chip - set the irq chip for an irq
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* @irq: irq number
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* @chip: pointer to irq chip description structure
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*/
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int irq_set_chip(unsigned int irq, struct irq_chip *chip)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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if (!desc) {
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WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
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return -EINVAL;
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}
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if (!chip)
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chip = &no_irq_chip;
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raw_spin_lock_irqsave(&desc->lock, flags);
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irq_chip_set_defaults(chip);
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desc->irq_data.chip = chip;
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(irq_set_chip);
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/**
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* irq_set_type - set the irq trigger type for an irq
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* @irq: irq number
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* @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
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*/
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int irq_set_irq_type(unsigned int irq, unsigned int type)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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int ret = -ENXIO;
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if (!desc) {
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printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
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return -ENODEV;
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}
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type &= IRQ_TYPE_SENSE_MASK;
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if (type == IRQ_TYPE_NONE)
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return 0;
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chip_bus_lock(desc);
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raw_spin_lock_irqsave(&desc->lock, flags);
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ret = __irq_set_trigger(desc, irq, type);
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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chip_bus_sync_unlock(desc);
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return ret;
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}
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EXPORT_SYMBOL(irq_set_irq_type);
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/**
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* irq_set_handler_data - set irq handler data for an irq
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* @irq: Interrupt number
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* @data: Pointer to interrupt specific data
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*
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* Set the hardware irq controller data for an irq
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*/
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int irq_set_handler_data(unsigned int irq, void *data)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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if (!desc) {
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printk(KERN_ERR
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"Trying to install controller data for IRQ%d\n", irq);
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return -EINVAL;
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}
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raw_spin_lock_irqsave(&desc->lock, flags);
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desc->irq_data.handler_data = data;
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(irq_set_handler_data);
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/**
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* irq_set_msi_desc - set MSI descriptor data for an irq
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* @irq: Interrupt number
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* @entry: Pointer to MSI descriptor data
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*
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* Set the MSI descriptor entry for an irq
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*/
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int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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if (!desc) {
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printk(KERN_ERR
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"Trying to install msi data for IRQ%d\n", irq);
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return -EINVAL;
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}
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raw_spin_lock_irqsave(&desc->lock, flags);
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desc->irq_data.msi_desc = entry;
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if (entry)
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entry->irq = irq;
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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/**
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* irq_set_chip_data - set irq chip data for an irq
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* @irq: Interrupt number
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* @data: Pointer to chip specific data
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*
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* Set the hardware irq chip data for an irq
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*/
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int irq_set_chip_data(unsigned int irq, void *data)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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if (!desc) {
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printk(KERN_ERR
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"Trying to install chip data for IRQ%d\n", irq);
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return -EINVAL;
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}
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if (!desc->irq_data.chip) {
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printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
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return -EINVAL;
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}
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raw_spin_lock_irqsave(&desc->lock, flags);
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desc->irq_data.chip_data = data;
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(irq_set_chip_data);
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struct irq_data *irq_get_irq_data(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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return desc ? &desc->irq_data : NULL;
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}
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EXPORT_SYMBOL_GPL(irq_get_irq_data);
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static void irq_state_clr_disabled(struct irq_desc *desc)
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{
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desc->istate &= ~IRQS_DISABLED;
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irq_compat_clr_disabled(desc);
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}
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static void irq_state_set_disabled(struct irq_desc *desc)
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{
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desc->istate |= IRQS_DISABLED;
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irq_compat_set_disabled(desc);
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}
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static void irq_state_clr_masked(struct irq_desc *desc)
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{
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desc->istate &= ~IRQS_MASKED;
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irq_compat_clr_masked(desc);
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}
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static void irq_state_set_masked(struct irq_desc *desc)
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{
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desc->istate |= IRQS_MASKED;
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irq_compat_set_masked(desc);
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}
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int irq_startup(struct irq_desc *desc)
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{
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irq_state_clr_disabled(desc);
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desc->depth = 0;
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if (desc->irq_data.chip->irq_startup) {
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int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
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irq_state_clr_masked(desc);
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return ret;
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}
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irq_enable(desc);
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return 0;
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}
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void irq_shutdown(struct irq_desc *desc)
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{
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irq_state_set_disabled(desc);
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desc->depth = 1;
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if (desc->irq_data.chip->irq_shutdown)
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desc->irq_data.chip->irq_shutdown(&desc->irq_data);
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if (desc->irq_data.chip->irq_disable)
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desc->irq_data.chip->irq_disable(&desc->irq_data);
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else
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desc->irq_data.chip->irq_mask(&desc->irq_data);
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irq_state_set_masked(desc);
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}
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void irq_enable(struct irq_desc *desc)
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{
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irq_state_clr_disabled(desc);
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if (desc->irq_data.chip->irq_enable)
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desc->irq_data.chip->irq_enable(&desc->irq_data);
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else
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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irq_state_clr_masked(desc);
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}
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void irq_disable(struct irq_desc *desc)
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{
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irq_state_set_disabled(desc);
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if (desc->irq_data.chip->irq_disable) {
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desc->irq_data.chip->irq_disable(&desc->irq_data);
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}
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irq_state_set_masked(desc);
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}
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#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
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/* Temporary migration helpers */
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static void compat_irq_mask(struct irq_data *data)
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{
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data->chip->mask(data->irq);
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}
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static void compat_irq_unmask(struct irq_data *data)
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{
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data->chip->unmask(data->irq);
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}
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static void compat_irq_ack(struct irq_data *data)
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{
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data->chip->ack(data->irq);
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}
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static void compat_irq_mask_ack(struct irq_data *data)
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{
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data->chip->mask_ack(data->irq);
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}
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static void compat_irq_eoi(struct irq_data *data)
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{
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data->chip->eoi(data->irq);
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}
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static void compat_irq_enable(struct irq_data *data)
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{
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data->chip->enable(data->irq);
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}
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static void compat_irq_disable(struct irq_data *data)
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{
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data->chip->disable(data->irq);
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}
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static void compat_irq_shutdown(struct irq_data *data)
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{
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data->chip->shutdown(data->irq);
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}
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static unsigned int compat_irq_startup(struct irq_data *data)
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{
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return data->chip->startup(data->irq);
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}
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static int compat_irq_set_affinity(struct irq_data *data,
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const struct cpumask *dest, bool force)
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{
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return data->chip->set_affinity(data->irq, dest);
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}
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static int compat_irq_set_type(struct irq_data *data, unsigned int type)
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{
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return data->chip->set_type(data->irq, type);
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}
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static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
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{
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return data->chip->set_wake(data->irq, on);
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}
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static int compat_irq_retrigger(struct irq_data *data)
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{
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return data->chip->retrigger(data->irq);
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}
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static void compat_bus_lock(struct irq_data *data)
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{
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data->chip->bus_lock(data->irq);
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}
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static void compat_bus_sync_unlock(struct irq_data *data)
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{
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data->chip->bus_sync_unlock(data->irq);
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}
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#endif
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/*
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* Fixup enable/disable function pointers
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*/
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void irq_chip_set_defaults(struct irq_chip *chip)
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{
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#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
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if (chip->enable)
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chip->irq_enable = compat_irq_enable;
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if (chip->disable)
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chip->irq_disable = compat_irq_disable;
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if (chip->shutdown)
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chip->irq_shutdown = compat_irq_shutdown;
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if (chip->startup)
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chip->irq_startup = compat_irq_startup;
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if (!chip->end)
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chip->end = dummy_irq_chip.end;
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if (chip->bus_lock)
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chip->irq_bus_lock = compat_bus_lock;
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if (chip->bus_sync_unlock)
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chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
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if (chip->mask)
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chip->irq_mask = compat_irq_mask;
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if (chip->unmask)
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chip->irq_unmask = compat_irq_unmask;
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if (chip->ack)
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chip->irq_ack = compat_irq_ack;
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if (chip->mask_ack)
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chip->irq_mask_ack = compat_irq_mask_ack;
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if (chip->eoi)
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chip->irq_eoi = compat_irq_eoi;
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if (chip->set_affinity)
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chip->irq_set_affinity = compat_irq_set_affinity;
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if (chip->set_type)
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chip->irq_set_type = compat_irq_set_type;
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if (chip->set_wake)
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chip->irq_set_wake = compat_irq_set_wake;
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if (chip->retrigger)
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chip->irq_retrigger = compat_irq_retrigger;
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#endif
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}
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static inline void mask_ack_irq(struct irq_desc *desc)
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{
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if (desc->irq_data.chip->irq_mask_ack)
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desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
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else {
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desc->irq_data.chip->irq_mask(&desc->irq_data);
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if (desc->irq_data.chip->irq_ack)
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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}
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irq_state_set_masked(desc);
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}
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void mask_irq(struct irq_desc *desc)
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{
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if (desc->irq_data.chip->irq_mask) {
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desc->irq_data.chip->irq_mask(&desc->irq_data);
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irq_state_set_masked(desc);
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}
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}
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void unmask_irq(struct irq_desc *desc)
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{
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if (desc->irq_data.chip->irq_unmask) {
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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irq_state_clr_masked(desc);
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}
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}
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/*
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* handle_nested_irq - Handle a nested irq from a irq thread
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* @irq: the interrupt number
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*
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* Handle interrupts which are nested into a threaded interrupt
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* handler. The handler function is called inside the calling
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* threads context.
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*/
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void handle_nested_irq(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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struct irqaction *action;
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irqreturn_t action_ret;
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might_sleep();
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raw_spin_lock_irq(&desc->lock);
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kstat_incr_irqs_this_cpu(irq, desc);
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action = desc->action;
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if (unlikely(!action || (desc->istate & IRQS_DISABLED)))
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goto out_unlock;
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irq_compat_set_progress(desc);
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desc->istate |= IRQS_INPROGRESS;
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raw_spin_unlock_irq(&desc->lock);
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action_ret = action->thread_fn(action->irq, action->dev_id);
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if (!noirqdebug)
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note_interrupt(irq, desc, action_ret);
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raw_spin_lock_irq(&desc->lock);
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desc->istate &= ~IRQS_INPROGRESS;
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irq_compat_clr_progress(desc);
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out_unlock:
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raw_spin_unlock_irq(&desc->lock);
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}
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EXPORT_SYMBOL_GPL(handle_nested_irq);
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static bool irq_check_poll(struct irq_desc *desc)
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{
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if (!(desc->istate & IRQS_POLL_INPROGRESS))
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return false;
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return irq_wait_for_poll(desc);
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}
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/**
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* handle_simple_irq - Simple and software-decoded IRQs.
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* @irq: the interrupt number
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* @desc: the interrupt description structure for this irq
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*
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* Simple interrupts are either sent from a demultiplexing interrupt
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* handler or come from hardware, where no interrupt hardware control
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* is necessary.
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*
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* Note: The caller is expected to handle the ack, clear, mask and
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* unmask issues if necessary.
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*/
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void
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handle_simple_irq(unsigned int irq, struct irq_desc *desc)
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{
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raw_spin_lock(&desc->lock);
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if (unlikely(desc->istate & IRQS_INPROGRESS))
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if (!irq_check_poll(desc))
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goto out_unlock;
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desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
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kstat_incr_irqs_this_cpu(irq, desc);
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if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
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goto out_unlock;
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handle_irq_event(desc);
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out_unlock:
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raw_spin_unlock(&desc->lock);
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}
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/**
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* handle_level_irq - Level type irq handler
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* @irq: the interrupt number
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* @desc: the interrupt description structure for this irq
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*
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* Level type interrupts are active as long as the hardware line has
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* the active level. This may require to mask the interrupt and unmask
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* it after the associated handler has acknowledged the device, so the
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* interrupt line is back to inactive.
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*/
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void
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handle_level_irq(unsigned int irq, struct irq_desc *desc)
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{
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raw_spin_lock(&desc->lock);
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mask_ack_irq(desc);
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if (unlikely(desc->istate & IRQS_INPROGRESS))
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if (!irq_check_poll(desc))
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goto out_unlock;
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desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
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kstat_incr_irqs_this_cpu(irq, desc);
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/*
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* If its disabled or no action available
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* keep it masked and get out of here
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*/
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if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
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goto out_unlock;
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handle_irq_event(desc);
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if (!(desc->istate & (IRQS_DISABLED | IRQS_ONESHOT)))
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unmask_irq(desc);
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out_unlock:
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raw_spin_unlock(&desc->lock);
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}
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EXPORT_SYMBOL_GPL(handle_level_irq);
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/**
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* handle_fasteoi_irq - irq handler for transparent controllers
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* @irq: the interrupt number
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* @desc: the interrupt description structure for this irq
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*
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* Only a single callback will be issued to the chip: an ->eoi()
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* call when the interrupt has been serviced. This enables support
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* for modern forms of interrupt handlers, which handle the flow
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* details in hardware, transparently.
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*/
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void
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handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
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{
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raw_spin_lock(&desc->lock);
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if (unlikely(desc->istate & IRQS_INPROGRESS))
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if (!irq_check_poll(desc))
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goto out;
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desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
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kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
/*
|
|
* If its disabled or no action available
|
|
* then mask it and get out of here:
|
|
*/
|
|
if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED))) {
|
|
irq_compat_set_pending(desc);
|
|
desc->istate |= IRQS_PENDING;
|
|
mask_irq(desc);
|
|
goto out;
|
|
}
|
|
handle_irq_event(desc);
|
|
out:
|
|
desc->irq_data.chip->irq_eoi(&desc->irq_data);
|
|
raw_spin_unlock(&desc->lock);
|
|
}
|
|
|
|
/**
|
|
* handle_edge_irq - edge type IRQ handler
|
|
* @irq: the interrupt number
|
|
* @desc: the interrupt description structure for this irq
|
|
*
|
|
* Interrupt occures on the falling and/or rising edge of a hardware
|
|
* signal. The occurence is latched into the irq controller hardware
|
|
* and must be acked in order to be reenabled. After the ack another
|
|
* interrupt can happen on the same source even before the first one
|
|
* is handled by the associated event handler. If this happens it
|
|
* might be necessary to disable (mask) the interrupt depending on the
|
|
* controller hardware. This requires to reenable the interrupt inside
|
|
* of the loop which handles the interrupts which have arrived while
|
|
* the handler was running. If all pending interrupts are handled, the
|
|
* loop is left.
|
|
*/
|
|
void
|
|
handle_edge_irq(unsigned int irq, struct irq_desc *desc)
|
|
{
|
|
raw_spin_lock(&desc->lock);
|
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
|
/*
|
|
* If we're currently running this IRQ, or its disabled,
|
|
* we shouldn't process the IRQ. Mark it pending, handle
|
|
* the necessary masking and go out
|
|
*/
|
|
if (unlikely((desc->istate & (IRQS_DISABLED | IRQS_INPROGRESS) ||
|
|
!desc->action))) {
|
|
if (!irq_check_poll(desc)) {
|
|
irq_compat_set_pending(desc);
|
|
desc->istate |= IRQS_PENDING;
|
|
mask_ack_irq(desc);
|
|
goto out_unlock;
|
|
}
|
|
}
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
/* Start handling the irq */
|
|
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
|
|
|
do {
|
|
if (unlikely(!desc->action)) {
|
|
mask_irq(desc);
|
|
goto out_unlock;
|
|
}
|
|
|
|
/*
|
|
* When another irq arrived while we were handling
|
|
* one, we could have masked the irq.
|
|
* Renable it, if it was not disabled in meantime.
|
|
*/
|
|
if (unlikely(desc->istate & IRQS_PENDING)) {
|
|
if (!(desc->istate & IRQS_DISABLED) &&
|
|
(desc->istate & IRQS_MASKED))
|
|
unmask_irq(desc);
|
|
}
|
|
|
|
handle_irq_event(desc);
|
|
|
|
} while ((desc->istate & IRQS_PENDING) &&
|
|
!(desc->istate & IRQS_DISABLED));
|
|
|
|
out_unlock:
|
|
raw_spin_unlock(&desc->lock);
|
|
}
|
|
|
|
/**
|
|
* handle_percpu_irq - Per CPU local irq handler
|
|
* @irq: the interrupt number
|
|
* @desc: the interrupt description structure for this irq
|
|
*
|
|
* Per CPU interrupts on SMP machines without locking requirements
|
|
*/
|
|
void
|
|
handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
|
|
{
|
|
struct irq_chip *chip = irq_desc_get_chip(desc);
|
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
if (chip->irq_ack)
|
|
chip->irq_ack(&desc->irq_data);
|
|
|
|
handle_irq_event_percpu(desc, desc->action);
|
|
|
|
if (chip->irq_eoi)
|
|
chip->irq_eoi(&desc->irq_data);
|
|
}
|
|
|
|
void
|
|
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
|
|
const char *name)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
unsigned long flags;
|
|
|
|
if (!desc) {
|
|
printk(KERN_ERR
|
|
"Trying to install type control for IRQ%d\n", irq);
|
|
return;
|
|
}
|
|
|
|
if (!handle)
|
|
handle = handle_bad_irq;
|
|
else if (desc->irq_data.chip == &no_irq_chip) {
|
|
printk(KERN_WARNING "Trying to install %sinterrupt handler "
|
|
"for IRQ%d\n", is_chained ? "chained " : "", irq);
|
|
/*
|
|
* Some ARM implementations install a handler for really dumb
|
|
* interrupt hardware without setting an irq_chip. This worked
|
|
* with the ARM no_irq_chip but the check in setup_irq would
|
|
* prevent us to setup the interrupt at all. Switch it to
|
|
* dummy_irq_chip for easy transition.
|
|
*/
|
|
desc->irq_data.chip = &dummy_irq_chip;
|
|
}
|
|
|
|
chip_bus_lock(desc);
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
/* Uninstall? */
|
|
if (handle == handle_bad_irq) {
|
|
if (desc->irq_data.chip != &no_irq_chip)
|
|
mask_ack_irq(desc);
|
|
irq_compat_set_disabled(desc);
|
|
desc->istate |= IRQS_DISABLED;
|
|
desc->depth = 1;
|
|
}
|
|
desc->handle_irq = handle;
|
|
desc->name = name;
|
|
|
|
if (handle != handle_bad_irq && is_chained) {
|
|
irq_settings_set_noprobe(desc);
|
|
irq_settings_set_norequest(desc);
|
|
irq_startup(desc);
|
|
}
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
chip_bus_sync_unlock(desc);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__set_irq_handler);
|
|
|
|
void
|
|
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
|
|
irq_flow_handler_t handle)
|
|
{
|
|
irq_set_chip(irq, chip);
|
|
__set_irq_handler(irq, handle, 0, NULL);
|
|
}
|
|
|
|
void
|
|
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
|
|
irq_flow_handler_t handle, const char *name)
|
|
{
|
|
irq_set_chip(irq, chip);
|
|
__set_irq_handler(irq, handle, 0, name);
|
|
}
|
|
|
|
void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
unsigned long flags;
|
|
|
|
if (!desc)
|
|
return;
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
irq_settings_clr_and_set(desc, clr, set);
|
|
|
|
irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
|
|
IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
|
|
if (irq_settings_has_no_balance_set(desc))
|
|
irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
|
|
if (irq_settings_is_per_cpu(desc))
|
|
irqd_set(&desc->irq_data, IRQD_PER_CPU);
|
|
if (irq_settings_can_move_pcntxt(desc))
|
|
irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
|
|
|
|
irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
}
|