Len Brown e651262477 tools/power turbostat: further decode MSR_IA32_MISC_ENABLE ... Decode MISC_ENABLE.NO_TURBO, also use the #defines in msr-index.h for decoding this register cpu0: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MWAIT TURBO) Although it is not architectural, decode also MSR_IA32_MISC_ENABLE.prefetch-disable (bit-9). documented to be present on: Core, P4, Intel-Xeon reserved on: Atom, Silvermont, Nehalem, SNB, PHI ec. Signed-off-by: Len Brown <len.brown@intel.com>		2017-03-01 00:14:03 -05:00
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turbostat	tools/power turbostat: further decode MSR_IA32_MISC_ENABLE	2017-03-01 00:14:03 -05:00
x86_energy_perf_policy	tools: Allow tools to be installed in a user specified location	2012-11-30 01:09:45 -05:00