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5ce7aba976
* Updates to the ux500 cpufreq code * Moving the u300 DMA controller driver to drivers/dma * Moving versatile express drivers out of arch/arm for sharing with arch/arm64 * Device tree bindings for the OMAP General Purpose Memory Controller There is a simple conflict in drivers/cpufreq/dbx500-cpufreq.c, because the mach/id.h header and the cpu_is_u8500_family() function in it are now gone. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUSaEc2CrR//JCVInAQKROg//V6LrAmewM4ugCLJFOHDsRN5n27QHOnMb 7g1b56OVtwb+Zer9HLAyZyY6MX12JbDTdC53LDWf6CEU8Z3LfdaPNXyDoGwKQMsA cq2qDufcFoVnaAFMO4uxpe/Y/ZuJJTPm+24dviztMp5PIl4gRkgou5w2fRzd7iLk rETnjvDzB1lKrlrTlnEoPemroErX10AhkjGIQ1zkImqlCOUL1Fs+IMui5gUA3I8X S7q+JPMoIjCFUtuG9QV+/PWcY0SnsGJBZiYdh1XGbCiint5Oi/6hawbBtT4L067H HfSsWe+mx8c2B84V0AFOpKcV6v9VYeyxSkmr40yG3laPReGA8CWjjGQj1kIkyY07 1XujeEjbpp4zgaggtv9Jdb7BAPWWopuqMrpGdcuxBWYN7HwiPoseGzJMo3F7D5Ti KBRsBLDoK514oGLZdgh3i/QQZwhFuJRcHdaoqRU0pWNJBKMxAFdfgeKYdNWtB7HA XrtJvANrrIeKin3bbeodlhaHLxlBImarQjqdK85H0nmLs71jNphihDRVe3wNy5Qu OYbVHbf3cIboIQiLYLgiVc4NxypCXzeAB6pCdX/NWee9P2qgDCb0SEI6OcpBftPh di004nMEquomIkoyNSlAZffcxeUrHiFlqSvHWqzuLqLCGRToxaoWUC0ES3qJA321 23zzC9IYF6Y= =R0p0 -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver specific changes from Arnd Bergmann: - Updates to the ux500 cpufreq code - Moving the u300 DMA controller driver to drivers/dma - Moving versatile express drivers out of arch/arm for sharing with arch/arm64 - Device tree bindings for the OMAP General Purpose Memory Controller * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits) ARM: OMAP2+: gpmc: Add device tree documentation for elm handle ARM: OMAP2+: gpmc: add DT bindings for OneNAND ARM: OMAP2+: gpmc-onenand: drop __init annotation mtd: omap-onenand: pass device_node in platform data ARM: OMAP2+: Prevent potential crash if GPMC probe fails ARM: OMAP2+: gpmc: Remove unneeded of_node_put() arm: Move sp810.h to include/linux/amba/ ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs ARM: OMAP: gpmc-nand: drop __init annotation mtd: omap-nand: pass device_node in platform data ARM: OMAP: gpmc: don't create devices from initcall on DT dma: coh901318: cut down on platform data abstraction dma: coh901318: merge header files dma: coh901318: push definitions into driver dma: coh901318: push header down into the DMA subsystem dma: coh901318: skip hard-coded addresses dma: coh901318: remove hardcoded target addresses dma: coh901318: push platform data into driver dma: coh901318: create a proper platform data file ...
175 lines
4.4 KiB
C
175 lines
4.4 KiB
C
/*
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* Copyright (C) STMicroelectronics 2009
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* Copyright (C) ST-Ericsson SA 2010-2012
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*
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* License Terms: GNU General Public License v2
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* Author: Sundar Iyer <sundar.iyer@stericsson.com>
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* Author: Martin Persson <martin.persson@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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static struct cpufreq_frequency_table *freq_table;
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static struct clk *armss_clk;
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static struct freq_attr *dbx500_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static int dbx500_cpufreq_verify_speed(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, freq_table);
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}
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static int dbx500_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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unsigned int idx;
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int ret;
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/* scale the target frequency to one of the extremes supported */
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if (target_freq < policy->cpuinfo.min_freq)
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target_freq = policy->cpuinfo.min_freq;
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if (target_freq > policy->cpuinfo.max_freq)
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target_freq = policy->cpuinfo.max_freq;
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/* Lookup the next frequency */
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if (cpufreq_frequency_table_target(policy, freq_table, target_freq,
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relation, &idx))
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return -EINVAL;
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freqs.old = policy->cur;
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freqs.new = freq_table[idx].frequency;
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if (freqs.old == freqs.new)
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return 0;
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/* pre-change notification */
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for_each_cpu(freqs.cpu, policy->cpus)
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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/* update armss clk frequency */
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ret = clk_set_rate(armss_clk, freqs.new * 1000);
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if (ret) {
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pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n",
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freqs.new * 1000, ret);
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return ret;
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}
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/* post change notification */
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for_each_cpu(freqs.cpu, policy->cpus)
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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return 0;
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}
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static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu)
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{
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int i = 0;
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unsigned long freq = clk_get_rate(armss_clk) / 1000;
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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if (freq <= freq_table[i].frequency)
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return freq_table[i].frequency;
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i++;
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}
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/* We could not find a corresponding frequency. */
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pr_err("dbx500-cpufreq: Failed to find cpufreq speed\n");
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return 0;
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}
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static int __cpuinit dbx500_cpufreq_init(struct cpufreq_policy *policy)
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{
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int res;
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/* get policy fields based on the table */
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res = cpufreq_frequency_table_cpuinfo(policy, freq_table);
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if (!res)
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cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
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else {
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pr_err("dbx500-cpufreq: Failed to read policy table\n");
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return res;
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}
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policy->min = policy->cpuinfo.min_freq;
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policy->max = policy->cpuinfo.max_freq;
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policy->cur = dbx500_cpufreq_getspeed(policy->cpu);
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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/*
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* FIXME : Need to take time measurement across the target()
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* function with no/some/all drivers in the notification
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* list.
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*/
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policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */
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/* policy sharing between dual CPUs */
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cpumask_setall(policy->cpus);
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return 0;
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}
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static struct cpufreq_driver dbx500_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS,
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.verify = dbx500_cpufreq_verify_speed,
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.target = dbx500_cpufreq_target,
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.get = dbx500_cpufreq_getspeed,
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.init = dbx500_cpufreq_init,
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.name = "DBX500",
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.attr = dbx500_cpufreq_attr,
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};
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static int dbx500_cpufreq_probe(struct platform_device *pdev)
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{
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int i = 0;
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freq_table = dev_get_platdata(&pdev->dev);
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if (!freq_table) {
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pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n");
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return -ENODEV;
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}
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armss_clk = clk_get(&pdev->dev, "armss");
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if (IS_ERR(armss_clk)) {
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pr_err("dbx500-cpufreq: Failed to get armss clk\n");
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return PTR_ERR(armss_clk);
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}
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pr_info("dbx500-cpufreq: Available frequencies:\n");
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
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i++;
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}
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return cpufreq_register_driver(&dbx500_cpufreq_driver);
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}
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static struct platform_driver dbx500_cpufreq_plat_driver = {
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.driver = {
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.name = "cpufreq-ux500",
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.owner = THIS_MODULE,
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},
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.probe = dbx500_cpufreq_probe,
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};
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static int __init dbx500_cpufreq_register(void)
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{
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return platform_driver_register(&dbx500_cpufreq_plat_driver);
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}
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device_initcall(dbx500_cpufreq_register);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("cpufreq driver for DBX500");
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