mirror of
https://github.com/FEX-Emu/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
88 lines
1.9 KiB
C
88 lines
1.9 KiB
C
/* cpu-irqs.h: on-CPU peripheral irqs
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*
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* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_CPU_IRQS_H
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#define _ASM_CPU_IRQS_H
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#ifndef __ASSEMBLY__
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#include <asm/irq-routing.h>
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#define IRQ_BASE_CPU (NR_IRQ_ACTIONS_PER_GROUP * 0)
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/* IRQ IDs presented to drivers */
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enum {
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IRQ_CPU__UNUSED = IRQ_BASE_CPU,
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IRQ_CPU_UART0,
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IRQ_CPU_UART1,
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IRQ_CPU_TIMER0,
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IRQ_CPU_TIMER1,
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IRQ_CPU_TIMER2,
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IRQ_CPU_DMA0,
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IRQ_CPU_DMA1,
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IRQ_CPU_DMA2,
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IRQ_CPU_DMA3,
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IRQ_CPU_DMA4,
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IRQ_CPU_DMA5,
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IRQ_CPU_DMA6,
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IRQ_CPU_DMA7,
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IRQ_CPU_EXTERNAL0,
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IRQ_CPU_EXTERNAL1,
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IRQ_CPU_EXTERNAL2,
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IRQ_CPU_EXTERNAL3,
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IRQ_CPU_EXTERNAL4,
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IRQ_CPU_EXTERNAL5,
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IRQ_CPU_EXTERNAL6,
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IRQ_CPU_EXTERNAL7,
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};
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/* IRQ to level mappings */
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#define IRQ_GDBSTUB_LEVEL 15
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#define IRQ_UART_LEVEL 13
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#ifdef CONFIG_GDBSTUB_UART0
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#define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL
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#else
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#define IRQ_UART0_LEVEL IRQ_UART_LEVEL
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#endif
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#ifdef CONFIG_GDBSTUB_UART1
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#define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL
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#else
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#define IRQ_UART1_LEVEL IRQ_UART_LEVEL
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#endif
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#define IRQ_DMA0_LEVEL 14
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#define IRQ_DMA1_LEVEL 14
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#define IRQ_DMA2_LEVEL 14
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#define IRQ_DMA3_LEVEL 14
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#define IRQ_DMA4_LEVEL 14
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#define IRQ_DMA5_LEVEL 14
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#define IRQ_DMA6_LEVEL 14
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#define IRQ_DMA7_LEVEL 14
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#define IRQ_TIMER0_LEVEL 12
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#define IRQ_TIMER1_LEVEL 11
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#define IRQ_TIMER2_LEVEL 10
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#define IRQ_XIRQ0_LEVEL 1
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#define IRQ_XIRQ1_LEVEL 2
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#define IRQ_XIRQ2_LEVEL 3
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#define IRQ_XIRQ3_LEVEL 4
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#define IRQ_XIRQ4_LEVEL 5
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#define IRQ_XIRQ5_LEVEL 6
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#define IRQ_XIRQ6_LEVEL 7
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#define IRQ_XIRQ7_LEVEL 8
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_CPU_IRQS_H */
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