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f2f770d74a
Add Andy Polyakov's optimized assembly and NEON implementations for SHA-256/224. The sha256-armv4.pl script for generating the assembly code is from OpenSSL commit 51f8d095562f36cdaa6893597b5c609e943b0565. Compared to sha256-generic these implementations have the following tcrypt speed improvements on Motorola Nexus 6 (Snapdragon 805): bs b/u sha256-neon sha256-asm 16 16 x1.32 x1.19 64 16 x1.27 x1.15 64 64 x1.36 x1.20 256 16 x1.22 x1.11 256 64 x1.36 x1.19 256 256 x1.59 x1.23 1024 16 x1.21 x1.10 1024 256 x1.65 x1.23 1024 1024 x1.76 x1.25 2048 16 x1.21 x1.10 2048 256 x1.66 x1.23 2048 1024 x1.78 x1.25 2048 2048 x1.79 x1.25 4096 16 x1.20 x1.09 4096 256 x1.66 x1.23 4096 1024 x1.79 x1.26 4096 4096 x1.82 x1.26 8192 16 x1.20 x1.09 8192 256 x1.67 x1.23 8192 1024 x1.80 x1.26 8192 4096 x1.85 x1.28 8192 8192 x1.85 x1.27 Where bs refers to block size and b/u to bytes per update. Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Cc: Andy Polyakov <appro@openssl.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
131 lines
4.1 KiB
Plaintext
131 lines
4.1 KiB
Plaintext
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menuconfig ARM_CRYPTO
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bool "ARM Accelerated Cryptographic Algorithms"
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depends on ARM
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help
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Say Y here to choose from a selection of cryptographic algorithms
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implemented using ARM specific CPU features or instructions.
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if ARM_CRYPTO
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config CRYPTO_SHA1_ARM
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tristate "SHA1 digest algorithm (ARM-asm)"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM assembler.
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config CRYPTO_SHA1_ARM_NEON
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tristate "SHA1 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM NEON assembly, when NEON instructions are
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available.
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config CRYPTO_SHA1_ARM_CE
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tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA2_ARM_CE
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tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA256
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select CRYPTO_HASH
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA256_ARM
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tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
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select CRYPTO_HASH
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using optimized ARM assembler and NEON, when available.
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config CRYPTO_SHA512_ARM_NEON
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tristate "SHA384 and SHA512 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA512
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select CRYPTO_HASH
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help
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using ARM NEON instructions, when available.
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This version of SHA implements a 512 bit hash with 256 bits of
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security against collision attacks.
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This code also includes SHA-384, a 384 bit hash with 192 bits
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of security against collision attacks.
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config CRYPTO_AES_ARM
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tristate "AES cipher algorithms (ARM-asm)"
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depends on ARM
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Use optimized AES assembler routines for ARM platforms.
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AES cipher algorithms (FIPS-197). AES uses the Rijndael
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algorithm.
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Rijndael appears to be consistently a very good performer in
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both hardware and software across a wide range of computing
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environments regardless of its use in feedback or non-feedback
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modes. Its key setup time is excellent, and its key agility is
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good. Rijndael's very low memory requirements make it very well
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suited for restricted-space environments, in which it also
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demonstrates excellent performance. Rijndael's operations are
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among the easiest to defend against power and timing attacks.
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The AES specifies three key sizes: 128, 192 and 256 bits
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See <http://csrc.nist.gov/encryption/aes/> for more information.
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config CRYPTO_AES_ARM_BS
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tristate "Bit sliced AES using NEON instructions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_AES_ARM
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select CRYPTO_ABLK_HELPER
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help
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Use a faster and more secure NEON based implementation of AES in CBC,
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CTR and XTS modes
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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config CRYPTO_AES_ARM_CE
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tristate "Accelerated AES using ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_ABLK_HELPER
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help
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Use an implementation of AES in CBC, CTR and XTS modes that uses
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ARMv8 Crypto Extensions
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config CRYPTO_GHASH_ARM_CE
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tristate "PMULL-accelerated GHASH using ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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help
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions
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endif
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