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e479c60456
The default bits per word setting should be 8 bits, but since most of our devices have been explicitly setting this up, we didn't notice when the default stopped working. At the moment, any default transfers without an explicit bit size setting error out with: bfin-spi bfin-spi.0: transfer: unsupported bits_per_word So in the transfer logic, have a bits_per_word setting of 0 fall into the 8 bit transfer logic. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> |
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| .. | ||
| amba-pl022.c | ||
| ath79_spi.c | ||
| atmel_spi.c | ||
| atmel_spi.h | ||
| au1550_spi.c | ||
| coldfire_qspi.c | ||
| davinci_spi.c | ||
| dw_spi_mid.c | ||
| dw_spi_mmio.c | ||
| dw_spi_pci.c | ||
| dw_spi.c | ||
| dw_spi.h | ||
| ep93xx_spi.c | ||
| Kconfig | ||
| Makefile | ||
| mpc52xx_psc_spi.c | ||
| mpc52xx_spi.c | ||
| mpc512x_psc_spi.c | ||
| omap2_mcspi.c | ||
| omap_spi_100k.c | ||
| omap_uwire.c | ||
| orion_spi.c | ||
| pxa2xx_spi_pci.c | ||
| pxa2xx_spi.c | ||
| spi_altera.c | ||
| spi_bfin5xx.c | ||
| spi_bfin_sport.c | ||
| spi_bitbang_txrx.h | ||
| spi_bitbang.c | ||
| spi_butterfly.c | ||
| spi_fsl_espi.c | ||
| spi_fsl_lib.c | ||
| spi_fsl_lib.h | ||
| spi_fsl_spi.c | ||
| spi_gpio.c | ||
| spi_imx.c | ||
| spi_lm70llp.c | ||
| spi_nuc900.c | ||
| spi_oc_tiny.c | ||
| spi_ppc4xx.c | ||
| spi_s3c24xx_fiq.h | ||
| spi_s3c24xx_fiq.S | ||
| spi_s3c24xx_gpio.c | ||
| spi_s3c24xx.c | ||
| spi_s3c64xx.c | ||
| spi_sh_msiof.c | ||
| spi_sh_sci.c | ||
| spi_sh.c | ||
| spi_stmp.c | ||
| spi_tegra.c | ||
| spi_topcliff_pch.c | ||
| spi_txx9.c | ||
| spi.c | ||
| spidev.c | ||
| ti-ssp-spi.c | ||
| tle62x0.c | ||
| xilinx_spi.c | ||