mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-22 09:22:37 +00:00
f95d47caae
This patch is the meat of the PDA change. This patch makes several related changes: 1: Most significantly, %gs is now used in the kernel. This means that on entry, the old value of %gs is saved away, and it is reloaded with __KERNEL_PDA. 2: entry.S constructs the stack in the shape of struct pt_regs, and this is passed around the kernel so that the process's saved register state can be accessed. Unfortunately struct pt_regs doesn't currently have space for %gs (or %fs). This patch extends pt_regs to add space for gs (no space is allocated for %fs, since it won't be used, and it would just complicate the code in entry.S to work around the space). 3: Because %gs is now saved on the stack like %ds, %es and the integer registers, there are a number of places where it no longer needs to be handled specially; namely context switch, and saving/restoring the register state in a signal context. 4: And since kernel threads run in kernel space and call normal kernel code, they need to be created with their %gs == __KERNEL_PDA. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
72 lines
1.7 KiB
C
72 lines
1.7 KiB
C
#ifndef __I386_SCHED_H
|
|
#define __I386_SCHED_H
|
|
|
|
#include <asm/desc.h>
|
|
#include <asm/atomic.h>
|
|
#include <asm/pgalloc.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
/*
|
|
* Used for LDT copy/destruction.
|
|
*/
|
|
int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
|
|
void destroy_context(struct mm_struct *mm);
|
|
|
|
|
|
static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
|
|
{
|
|
#ifdef CONFIG_SMP
|
|
unsigned cpu = smp_processor_id();
|
|
if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
|
|
per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
|
|
#endif
|
|
}
|
|
|
|
static inline void switch_mm(struct mm_struct *prev,
|
|
struct mm_struct *next,
|
|
struct task_struct *tsk)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
|
|
if (likely(prev != next)) {
|
|
/* stop flush ipis for the previous mm */
|
|
cpu_clear(cpu, prev->cpu_vm_mask);
|
|
#ifdef CONFIG_SMP
|
|
per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
|
|
per_cpu(cpu_tlbstate, cpu).active_mm = next;
|
|
#endif
|
|
cpu_set(cpu, next->cpu_vm_mask);
|
|
|
|
/* Re-load page tables */
|
|
load_cr3(next->pgd);
|
|
|
|
/*
|
|
* load the LDT, if the LDT is different:
|
|
*/
|
|
if (unlikely(prev->context.ldt != next->context.ldt))
|
|
load_LDT_nolock(&next->context);
|
|
}
|
|
#ifdef CONFIG_SMP
|
|
else {
|
|
per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
|
|
BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
|
|
|
|
if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
|
|
/* We were in lazy tlb mode and leave_mm disabled
|
|
* tlb flush IPI delivery. We must reload %cr3.
|
|
*/
|
|
load_cr3(next->pgd);
|
|
load_LDT_nolock(&next->context);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#define deactivate_mm(tsk, mm) \
|
|
asm("movl %0,%%fs": :"r" (0));
|
|
|
|
#define activate_mm(prev, next) \
|
|
switch_mm((prev),(next),NULL)
|
|
|
|
#endif
|