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Drivers for EDAC on Cavium. Supported subsystems are: o CPU primary caches. These are parity protected only, so only error reporting. o Second level cache - ECC protected, provides SECDED. o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will will only initialize if ECC is enabled on a system so is safe to run on non-ECC memory. o PCI: Parity error reporting Since it is very hard to test this sort of code the implementation is very conservative and uses polling where possible for now. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
119 lines
2.6 KiB
C
119 lines
2.6 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/edac.h>
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#include <asm/octeon/cvmx.h>
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#include "edac_core.h"
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#include "edac_module.h"
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#define EDAC_MOD_STR "octeon-l2c"
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static void co_l2c_poll(struct edac_device_ctl_info *l2c)
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{
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union cvmx_l2t_err l2t_err;
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l2t_err.u64 = cvmx_read_csr(CVMX_L2T_ERR);
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if (l2t_err.s.sec_err) {
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edac_device_handle_ce(l2c, 0, 0,
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"Single bit error (corrected)");
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l2t_err.s.sec_err = 1; /* Reset */
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cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64);
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}
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if (l2t_err.s.ded_err) {
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edac_device_handle_ue(l2c, 0, 0,
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"Double bit error (corrected)");
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l2t_err.s.ded_err = 1; /* Reset */
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cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64);
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}
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}
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static int __devinit co_l2c_probe(struct platform_device *pdev)
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{
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struct edac_device_ctl_info *l2c;
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union cvmx_l2t_err l2t_err;
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int res = 0;
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l2c = edac_device_alloc_ctl_info(0, "l2c", 1, NULL, 0, 0,
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NULL, 0, edac_device_alloc_index());
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if (!l2c)
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return -ENOMEM;
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l2c->dev = &pdev->dev;
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platform_set_drvdata(pdev, l2c);
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l2c->dev_name = dev_name(&pdev->dev);
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l2c->mod_name = "octeon-l2c";
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l2c->ctl_name = "octeon_l2c_err";
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l2c->edac_check = co_l2c_poll;
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if (edac_device_add_device(l2c) > 0) {
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pr_err("%s: edac_device_add_device() failed\n", __func__);
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goto err;
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}
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l2t_err.u64 = cvmx_read_csr(CVMX_L2T_ERR);
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l2t_err.s.sec_intena = 0; /* We poll */
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l2t_err.s.ded_intena = 0;
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l2t_err.s.sec_err = 1; /* Clear, just in case */
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l2t_err.s.ded_err = 1;
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cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64);
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return 0;
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err:
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edac_device_free_ctl_info(l2c);
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return res;
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}
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static int co_l2c_remove(struct platform_device *pdev)
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{
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struct edac_device_ctl_info *l2c = platform_get_drvdata(pdev);
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edac_device_del_device(&pdev->dev);
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edac_device_free_ctl_info(l2c);
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return 0;
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}
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static struct platform_driver co_l2c_driver = {
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.probe = co_l2c_probe,
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.remove = co_l2c_remove,
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.driver = {
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.name = "co_l2c_edac",
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}
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};
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static int __init co_edac_init(void)
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{
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int ret;
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ret = platform_driver_register(&co_l2c_driver);
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if (ret)
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pr_warning(EDAC_MOD_STR " EDAC failed to register\n");
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return ret;
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}
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static void __exit co_edac_exit(void)
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{
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platform_driver_unregister(&co_l2c_driver);
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}
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module_init(co_edac_init);
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module_exit(co_edac_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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