Stanimir Varbanov f89117c0f5 dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised ... Currently we write BAM_IRQ_CLR register with zero even when no BAM_IRQ occured. This write has some bad side effects when the BAM instance is for the crypto engine. In case of crypto engine some of the BAM registers are xPU protected and they cannot be controlled by the driver. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Tested-by: Pramod Gurav <gpramod@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2016-04-19 21:11:31 +05:30
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bam_dma.c	dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised	2016-04-19 21:11:31 +05:30
hidma_mgmt_sys.c
hidma_mgmt.c
hidma_mgmt.h
hidma.c	dmaengine: add Qualcomm Technologies HIDMA channel driver	2016-03-11 07:42:30 +05:30
hidma.h	dmaengine: add Qualcomm Technologies HIDMA channel driver	2016-03-11 07:42:30 +05:30
Kconfig	dmaengine: add Qualcomm Technologies HIDMA channel driver	2016-03-11 07:42:30 +05:30
Makefile