John Crispin 61fa969f27 MIPS: lantiq: split up IRQ IM ranges ... Up to now all our SoCs had the 5 IM ranges in a consecutive order. To accomodate the SVIP we need to support IM ranges that are scattered inside the register range. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4237/		2012-08-23 00:08:17 +02:00
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falcon	MIPS: lantiq: split up IRQ IM ranges	2012-08-23 00:08:17 +02:00
xway	MIPS: lantiq: split up IRQ IM ranges	2012-08-23 00:08:17 +02:00
gpio.h	MIPS: lantiq: drop ltq_gpio_request() and gpio_to_irq()	2012-05-21 14:31:50 +01:00
lantiq_platform.h	MIPS: lantiq: remove orphaned code	2012-05-26 19:52:57 +01:00
lantiq.h	MIPS: lantiq: remove orphaned code	2012-05-26 19:52:57 +01:00
war.h	MIPS: Lantiq: Add initial support for Lantiq SoCs	2011-05-19 09:55:41 +01:00