Mike Frysinger fb4b5d3a37 Blackfin: handle BF561 Core B memory regions better when SMP=n ... Rather than assume Core B is always run with caches turned on, let people load into any of the on-chip memory regions. It is their business how the SRAM/Cache regions are utilized, so don't prevent them from being able to load into them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>		2009-07-16 01:52:24 -04:00
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boards	Blackfin: drop unused ISP1760 port1_disable from board resources	2009-06-22 21:16:13 -04:00
include/mach	Blackfin: handle BF561 Core B memory regions better when SMP=n	2009-07-16 01:52:24 -04:00
atomic.S	Blackfin arch: SMP supporting patchset: BF561 related code	2009-01-07 23:14:39 +08:00
coreb.c	Blackfin: simplify BF561 coreb driver greatly	2009-06-12 06:11:24 -04:00
dma.c	Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match everyone else	2009-01-07 23:14:39 +08:00
ints-priority.c	Blackfin arch: mark some functions as __init as they are only called from __init functions	2008-08-14 14:35:20 +08:00
Kconfig	Blackfin: add support for gptimer0 as a tick source	2009-06-12 06:11:37 -04:00
Makefile	Blackfin arch: fix bugs and unify BFIN_KERNEL_CLOCK option	2009-01-07 23:14:39 +08:00
secondary.S	Blackfin arch: SMP supporting patchset: BF561 related code	2009-01-07 23:14:39 +08:00
smp.c	Blackfin: add support for gptimer0 as a tick source	2009-06-12 06:11:37 -04:00