mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-28 04:17:47 +00:00
5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
149 lines
2.9 KiB
C
149 lines
2.9 KiB
C
/*
|
|
* Clock management for AT32AP CPUs
|
|
*
|
|
* Copyright (C) 2006 Atmel Corporation
|
|
*
|
|
* Based on arch/arm/mach-at91rm9200/clock.c
|
|
* Copyright (C) 2005 David Brownell
|
|
* Copyright (C) 2005 Ivan Kokshaysky
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/clk.h>
|
|
#include <linux/err.h>
|
|
#include <linux/device.h>
|
|
#include <linux/string.h>
|
|
|
|
#include "clock.h"
|
|
|
|
static spinlock_t clk_lock = SPIN_LOCK_UNLOCKED;
|
|
|
|
struct clk *clk_get(struct device *dev, const char *id)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < at32_nr_clocks; i++) {
|
|
struct clk *clk = at32_clock_list[i];
|
|
|
|
if (clk->dev == dev && strcmp(id, clk->name) == 0)
|
|
return clk;
|
|
}
|
|
|
|
return ERR_PTR(-ENOENT);
|
|
}
|
|
EXPORT_SYMBOL(clk_get);
|
|
|
|
void clk_put(struct clk *clk)
|
|
{
|
|
/* clocks are static for now, we can't free them */
|
|
}
|
|
EXPORT_SYMBOL(clk_put);
|
|
|
|
static void __clk_enable(struct clk *clk)
|
|
{
|
|
if (clk->parent)
|
|
__clk_enable(clk->parent);
|
|
if (clk->users++ == 0 && clk->mode)
|
|
clk->mode(clk, 1);
|
|
}
|
|
|
|
int clk_enable(struct clk *clk)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
__clk_enable(clk);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(clk_enable);
|
|
|
|
static void __clk_disable(struct clk *clk)
|
|
{
|
|
BUG_ON(clk->users == 0);
|
|
|
|
if (--clk->users == 0 && clk->mode)
|
|
clk->mode(clk, 0);
|
|
if (clk->parent)
|
|
__clk_disable(clk->parent);
|
|
}
|
|
|
|
void clk_disable(struct clk *clk)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
__clk_disable(clk);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
}
|
|
EXPORT_SYMBOL(clk_disable);
|
|
|
|
unsigned long clk_get_rate(struct clk *clk)
|
|
{
|
|
unsigned long flags;
|
|
unsigned long rate;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
rate = clk->get_rate(clk);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
return rate;
|
|
}
|
|
EXPORT_SYMBOL(clk_get_rate);
|
|
|
|
long clk_round_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
unsigned long flags, actual_rate;
|
|
|
|
if (!clk->set_rate)
|
|
return -ENOSYS;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
actual_rate = clk->set_rate(clk, rate, 0);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
return actual_rate;
|
|
}
|
|
EXPORT_SYMBOL(clk_round_rate);
|
|
|
|
int clk_set_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
unsigned long flags;
|
|
long ret;
|
|
|
|
if (!clk->set_rate)
|
|
return -ENOSYS;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
ret = clk->set_rate(clk, rate, 1);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
return (ret < 0) ? ret : 0;
|
|
}
|
|
EXPORT_SYMBOL(clk_set_rate);
|
|
|
|
int clk_set_parent(struct clk *clk, struct clk *parent)
|
|
{
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
if (!clk->set_parent)
|
|
return -ENOSYS;
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
ret = clk->set_parent(clk, parent);
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(clk_set_parent);
|
|
|
|
struct clk *clk_get_parent(struct clk *clk)
|
|
{
|
|
return clk->parent;
|
|
}
|
|
EXPORT_SYMBOL(clk_get_parent);
|