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The AR71XX/AR9XXX SoC have a simple reset controller with one bit per reset line. Signed-off-by: Alban Bedel <albeu@free.fr> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
7 lines
241 B
Makefile
7 lines
241 B
Makefile
obj-$(CONFIG_RESET_CONTROLLER) += core.o
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obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
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obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_ARCH_STI) += sti/
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obj-$(CONFIG_ATH79) += reset-ath79.o
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