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add enter/leave

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MITSUNARI Shigeo 2019-09-05 21:17:34 +09:00
parent 9fa2ef3c30
commit 7fc0c2bb74
3 changed files with 6 additions and 0 deletions
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2
gen/gen_code.cpp
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@ -638,6 +638,7 @@ void put()
{ "scasw", 0x66, 0xAF },
{ "scasd", 0xAF },
{ "movsb", 0xA4 },
{ "leave", 0xC9 },
{ "lodsb", 0xAC },
{ "lodsw", 0x66, 0xAD },
{ "lodsd", 0xAD },
@ -735,6 +736,7 @@ void put()
{ "fyl2xp1", 0xD9, 0xF9 },
};
putGeneric(tbl, NUM_OF_ARRAY(tbl));
puts("void enter(uint16 x, uint8 y) { db(0xC8); dw(x); db(y); }");
puts("void int_(uint8 x) { db(0xCD); db(x); }");
}
{

2
test/make_nm.cpp
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@ -501,6 +501,7 @@ class Test {
"cmpsw",
"cmpsd",
"int3",
"leave",
"lodsb",
"lodsw",
"lodsd",
@ -604,6 +605,7 @@ class Test {
put("lea", REG32e|REG16, MEM);
put("clflush", MEM);
put("clflushopt", MEM);
put("enter", IMM, IMM);
put("fldcw", MEM);
put("fldenv", MEM);
put("fstcw", MEM);

2
xbyak/xbyak_mnemonic.h
View File

@ -171,6 +171,7 @@ void divss(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x5E, 0xF3, isXMM
void dppd(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x41, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
void dpps(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x40, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
void emms() { db(0x0F); db(0x77); }
void enter(uint16 x, uint8 y) { db(0xC8); dw(x); db(y); }
void extractps(const Operand& op, const Xmm& xmm, uint8 imm) { opExt(op, xmm, 0x17, imm); }
void f2xm1() { db(0xD9); db(0xF0); }
void fabs() { db(0xD9); db(0xE1); }
@ -439,6 +440,7 @@ void lahf() { db(0x9F); }
void lddqu(const Xmm& xmm, const Address& addr) { db(0xF2); opModM(addr, xmm, 0x0F, 0xF0); }
void ldmxcsr(const Address& addr) { opModM(addr, Reg32(2), 0x0F, 0xAE); }
void lea(const Reg& reg, const Address& addr) { if (!reg.isBit(16 | i32e)) throw Error(ERR_BAD_SIZE_OF_REGISTER); opModM(addr, reg, 0x8D); }
void leave() { db(0xC9); }
void lfence() { db(0x0F); db(0xAE); db(0xE8); }
void lock() { db(0xF0); }
void lodsb() { db(0xAC); }