diff --git a/asm/non_matchings/ovl0/ovl0_2_5/func_80007BA4.s b/asm/non_matchings/ovl0/ovl0_2_5/func_80007BA4.s deleted file mode 100644 index e1c14027..00000000 --- a/asm/non_matchings/ovl0/ovl0_2_5/func_80007BA4.s +++ /dev/null @@ -1,21 +0,0 @@ -glabel func_80007BA4 -/* 0087A4 80007BA4 27BDFFE8 */ addiu $sp, $sp, -0x18 -/* 0087A8 80007BA8 AFBF0014 */ sw $ra, 0x14($sp) -/* 0087AC 80007BAC 00803825 */ move $a3, $a0 -/* 0087B0 80007BB0 8CE50004 */ lw $a1, 4($a3) -/* 0087B4 80007BB4 8CE60008 */ lw $a2, 8($a3) -/* 0087B8 80007BB8 8C840000 */ lw $a0, ($a0) -/* 0087BC 80007BBC 0C001E51 */ jal func_80007944 -/* 0087C0 80007BC0 AFA70018 */ sw $a3, 0x18($sp) -/* 0087C4 80007BC4 8FA70018 */ lw $a3, 0x18($sp) -/* 0087C8 80007BC8 3C018005 */ lui $at, %hi(gZBuffer) # $at, 0x8005 -/* 0087CC 80007BCC 8CEE000C */ lw $t6, 0xc($a3) -/* 0087D0 80007BD0 AC2EA500 */ sw $t6, %lo(gZBuffer)($at) -/* 0087D4 80007BD4 8CE60018 */ lw $a2, 0x18($a3) -/* 0087D8 80007BD8 8CE50014 */ lw $a1, 0x14($a3) -/* 0087DC 80007BDC 0C001ECE */ jal func_80007B38 -/* 0087E0 80007BE0 8CE40010 */ lw $a0, 0x10($a3) -/* 0087E4 80007BE4 8FBF0014 */ lw $ra, 0x14($sp) -/* 0087E8 80007BE8 27BD0018 */ addiu $sp, $sp, 0x18 -/* 0087EC 80007BEC 03E00008 */ jr $ra -/* 0087F0 80007BF0 00000000 */ nop diff --git a/asm/non_matchings/ovl18/ovl18_1/func_802205AC_ovl18.s b/asm/non_matchings/ovl18/ovl18_1/func_802205AC_ovl18.s deleted file mode 100644 index f94cbd9a..00000000 --- a/asm/non_matchings/ovl18/ovl18_1/func_802205AC_ovl18.s +++ /dev/null @@ -1,96 +0,0 @@ -glabel func_802205AC_ovl18 -/* 232F4C 802205AC 3C0F8005 */ lui $t7, %hi(D_8004A7C4) # $t7, 0x8005 -/* 232F50 802205B0 8DEFA7C4 */ lw $t7, %lo(D_8004A7C4)($t7) -/* 232F54 802205B4 27BDFFE8 */ addiu $sp, $sp, -0x18 -/* 232F58 802205B8 AFBF0014 */ sw $ra, 0x14($sp) -/* 232F5C 802205BC AFA40018 */ sw $a0, 0x18($sp) -/* 232F60 802205C0 8DF80000 */ lw $t8, ($t7) -/* 232F64 802205C4 3C01800E */ lui $at, %hi(D_800DDFD0) -/* 232F68 802205C8 240E0001 */ li $t6, 1 -/* 232F6C 802205CC 0018C880 */ sll $t9, $t8, 2 -/* 232F70 802205D0 00390821 */ addu $at, $at, $t9 -/* 232F74 802205D4 0C02CD48 */ jal func_800B3520_ovl18 -/* 232F78 802205D8 AC2EDFD0 */ sw $t6, %lo(D_800DDFD0)($at) -/* 232F7C 802205DC 3C01800D */ lui $at, %hi(D_800D6B10) # $at, 0x800d -/* 232F80 802205E0 0C02BB30 */ jal func_800AECC0_ovl18 -/* 232F84 802205E4 C42C6B10 */ lwc1 $f12, %lo(D_800D6B10)($at) -/* 232F88 802205E8 3C01800D */ lui $at, %hi(D_800D6B10) # $at, 0x800d -/* 232F8C 802205EC 0C02BB48 */ jal func_800AED20_ovl18 -/* 232F90 802205F0 C42C6B10 */ lwc1 $f12, %lo(D_800D6B10)($at) -/* 232F94 802205F4 0C075943 */ jal func_801D650C_ovl18 -/* 232F98 802205F8 8FA40018 */ lw $a0, 0x18($sp) -/* 232F9C 802205FC 3C028005 */ lui $v0, %hi(D_8004A7C4) # $v0, 0x8005 -/* 232FA0 80220600 8C42A7C4 */ lw $v0, %lo(D_8004A7C4)($v0) -/* 232FA4 80220604 44802000 */ mtc1 $zero, $f4 -/* 232FA8 80220608 3C01800F */ lui $at, %hi(D_800EADE0) -/* 232FAC 8022060C 8C480000 */ lw $t0, ($v0) -/* 232FB0 80220610 4600203C */ c.lt.s $f4, $f0 -/* 232FB4 80220614 3C040001 */ lui $a0, (0x00010028 >> 16) # lui $a0, 1 -/* 232FB8 80220618 00084880 */ sll $t1, $t0, 2 -/* 232FBC 8022061C 00290821 */ addu $at, $at, $t1 -/* 232FC0 80220620 45000009 */ bc1f .L80220648_ovl18 -/* 232FC4 80220624 E420ADE0 */ swc1 $f0, %lo(D_800EADE0)($at) -/* 232FC8 80220628 8C4A0000 */ lw $t2, ($v0) -/* 232FCC 8022062C 3C013F80 */ li $at, 0x3F800000 # 1.000000 -/* 232FD0 80220630 44813000 */ mtc1 $at, $f6 -/* 232FD4 80220634 3C01800E */ lui $at, %hi(D_800E6A10) -/* 232FD8 80220638 000A5880 */ sll $t3, $t2, 2 -/* 232FDC 8022063C 002B0821 */ addu $at, $at, $t3 -/* 232FE0 80220640 10000008 */ b .L80220664_ovl18 -/* 232FE4 80220644 E4266A10 */ swc1 $f6, %lo(D_800E6A10)($at) -.L80220648_ovl18: -/* 232FE8 80220648 8C4C0000 */ lw $t4, ($v0) -/* 232FEC 8022064C 3C01BF80 */ li $at, 0xBF800000 # -1.000000 -/* 232FF0 80220650 44814000 */ mtc1 $at, $f8 -/* 232FF4 80220654 3C01800E */ lui $at, %hi(D_800E6A10) -/* 232FF8 80220658 000C6880 */ sll $t5, $t4, 2 -/* 232FFC 8022065C 002D0821 */ addu $at, $at, $t5 -/* 233000 80220660 E4286A10 */ swc1 $f8, %lo(D_800E6A10)($at) -.L80220664_ovl18: -/* 233004 80220664 0C02A855 */ jal func_800AA154_ovl18 -/* 233008 80220668 34840028 */ ori $a0, (0x00010028 & 0xFFFF) # ori $a0, $a0, 0x28 -/* 23300C 8022066C 44806000 */ mtc1 $zero, $f12 -/* 233010 80220670 0C02BB30 */ jal func_800AECC0_ovl18 -/* 233014 80220674 00000000 */ nop -/* 233018 80220678 44806000 */ mtc1 $zero, $f12 -/* 23301C 8022067C 0C02BB48 */ jal func_800AED20_ovl18 -/* 233020 80220680 00000000 */ nop -/* 233024 80220684 2404002E */ li $a0, 46 -/* 233028 80220688 0C06B30D */ jal func_801ACC34_ovl18 -/* 23302C 8022068C 00002825 */ move $a1, $zero -/* 233030 80220690 3C0F8005 */ lui $t7, %hi(D_8004A7C4) # $t7, 0x8005 -/* 233034 80220694 8DEFA7C4 */ lw $t7, %lo(D_8004A7C4)($t7) -/* 233038 80220698 3C01800F */ lui $at, %hi(D_800EBBE0) -/* 23303C 8022069C 240400A6 */ li $a0, 166 -/* 233040 802206A0 8DF80000 */ lw $t8, ($t7) -/* 233044 802206A4 00187080 */ sll $t6, $t8, 2 -/* 233048 802206A8 002E0821 */ addu $at, $at, $t6 -/* 23304C 802206AC 0C029D9E */ jal func_800A7678 -/* 233050 802206B0 AC22BBE0 */ sw $v0, %lo(D_800EBBE0)($at) -/* 233054 802206B4 0C002DAF */ jal func_8000B6BC -/* 233058 802206B8 24040004 */ li $a0, 4 -/* 23305C 802206BC 3C01800D */ lui $at, %hi(D_800D6B10) # $at, 0x800d -/* 233060 802206C0 0C02BB30 */ jal func_800AECC0_ovl18 -/* 233064 802206C4 C42C6B10 */ lwc1 $f12, %lo(D_800D6B10)($at) -/* 233068 802206C8 3C01800D */ lui $at, %hi(D_800D6B10) # $at, 0x800d -/* 23306C 802206CC 0C02BB48 */ jal func_800AED20_ovl18 -/* 233070 802206D0 C42C6B10 */ lwc1 $f12, %lo(D_800D6B10)($at) -/* 233074 802206D4 3C040001 */ lui $a0, (0x00010023 >> 16) # lui $a0, 1 -/* 233078 802206D8 0C02A855 */ jal func_800AA154_ovl18 -/* 23307C 802206DC 34840023 */ ori $a0, (0x00010023 & 0xFFFF) # ori $a0, $a0, 0x23 -/* 233080 802206E0 3C028005 */ lui $v0, %hi(D_8004A7C4) # $v0, 0x8005 -/* 233084 802206E4 8C42A7C4 */ lw $v0, %lo(D_8004A7C4)($v0) -/* 233088 802206E8 3C01800F */ lui $at, %hi(D_800E98E0) -/* 23308C 802206EC 2419001E */ li $t9, 30 -/* 233090 802206F0 8C480000 */ lw $t0, ($v0) -/* 233094 802206F4 8FBF0014 */ lw $ra, 0x14($sp) -/* 233098 802206F8 00084880 */ sll $t1, $t0, 2 -/* 23309C 802206FC 00290821 */ addu $at, $at, $t1 -/* 2330A0 80220700 AC3998E0 */ sw $t9, %lo(D_800E98E0)($at) -/* 2330A4 80220704 8C4A0000 */ lw $t2, ($v0) -/* 2330A8 80220708 3C01800E */ lui $at, %hi(D_800DDC50) -/* 2330AC 8022070C 27BD0018 */ addiu $sp, $sp, 0x18 -/* 2330B0 80220710 000A5880 */ sll $t3, $t2, 2 -/* 2330B4 80220714 002B0821 */ addu $at, $at, $t3 -/* 2330B8 80220718 03E00008 */ jr $ra -/* 2330BC 8022071C AC20DC50 */ sw $zero, %lo(D_800DDC50)($at) diff --git a/asm/non_matchings/ovl18/ovl18_3/func_80222A54_ovl18.s b/asm/non_matchings/ovl18/ovl18_3/func_80222A54_ovl18.s deleted file mode 100644 index bfe93cbc..00000000 --- a/asm/non_matchings/ovl18/ovl18_3/func_80222A54_ovl18.s +++ /dev/null @@ -1,51 +0,0 @@ -glabel func_80222A54_ovl18 -/* 2353F4 80222A54 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 2353F8 80222A58 AFBF0014 */ sw $ra, 0x14($sp) -/* 2353FC 80222A5C 0C06835D */ jal func_801A0D74_ovl18 -/* 235400 80222A60 AFA40020 */ sw $a0, 0x20($sp) -/* 235404 80222A64 3C0E8005 */ lui $t6, %hi(D_8004A7C4) # $t6, 0x8005 -/* 235408 80222A68 8DCEA7C4 */ lw $t6, %lo(D_8004A7C4)($t6) -/* 23540C 80222A6C 3C0F800F */ lui $t7, %hi(D_800E9C60) -/* 235410 80222A70 00402825 */ move $a1, $v0 -/* 235414 80222A74 8DC30000 */ lw $v1, ($t6) -/* 235418 80222A78 8FA40020 */ lw $a0, 0x20($sp) -/* 23541C 80222A7C 00031880 */ sll $v1, $v1, 2 -/* 235420 80222A80 01E37821 */ addu $t7, $t7, $v1 -/* 235424 80222A84 8DEF9C60 */ lw $t7, %lo(D_800E9C60)($t7) -/* 235428 80222A88 11E00008 */ beqz $t7, .L80222AAC_ovl18 -/* 23542C 80222A8C 00000000 */ nop -/* 235430 80222A90 0C066D09 */ jal func_8019B424_ovl18 -/* 235434 80222A94 AFA2001C */ sw $v0, 0x1c($sp) -/* 235438 80222A98 3C188005 */ lui $t8, %hi(D_8004A7C4) # $t8, 0x8005 -/* 23543C 80222A9C 8F18A7C4 */ lw $t8, %lo(D_8004A7C4)($t8) -/* 235440 80222AA0 8FA5001C */ lw $a1, 0x1c($sp) -/* 235444 80222AA4 8F030000 */ lw $v1, ($t8) -/* 235448 80222AA8 00031880 */ sll $v1, $v1, 2 -.L80222AAC_ovl18: -/* 23544C 80222AAC 14A0000B */ bnez $a1, .L80222ADC_ovl18 -/* 235450 80222AB0 3C04800E */ lui $a0, %hi(D_800DDFD0) -/* 235454 80222AB4 00832021 */ addu $a0, $a0, $v1 -/* 235458 80222AB8 3C068023 */ lui $a2, %hi(D_8022AC08) # $a2, 0x8023 -/* 23545C 80222ABC 24C6AC08 */ addiu $a2, %lo(D_8022AC08) # addiu $a2, $a2, -0x53f8 -/* 235460 80222AC0 8C84DFD0 */ lw $a0, %lo(D_800DDFD0)($a0) -/* 235464 80222AC4 0C02911F */ jal func_800A447C -/* 235468 80222AC8 24050007 */ li $a1, 7 -/* 23546C 80222ACC 3C198005 */ lui $t9, %hi(D_8004A7C4) # $t9, 0x8005 -/* 235470 80222AD0 8F39A7C4 */ lw $t9, %lo(D_8004A7C4)($t9) -/* 235474 80222AD4 8F230000 */ lw $v1, ($t9) -/* 235478 80222AD8 00031880 */ sll $v1, $v1, 2 -.L80222ADC_ovl18: -/* 23547C 80222ADC 3C08800F */ lui $t0, %hi(D_800E9C60) -/* 235480 80222AE0 01034021 */ addu $t0, $t0, $v1 -/* 235484 80222AE4 8D089C60 */ lw $t0, %lo(D_800E9C60)($t0) -/* 235488 80222AE8 11000003 */ beqz $t0, .L80222AF8_ovl18 -/* 23548C 80222AEC 00000000 */ nop -/* 235490 80222AF0 0C066FA7 */ jal func_8019BE9C_ovl18 -/* 235494 80222AF4 24040006 */ li $a0, 6 -.L80222AF8_ovl18: -/* 235498 80222AF8 0C087D73 */ jal func_8021F5CC_ovl18 -/* 23549C 80222AFC 00000000 */ nop -/* 2354A0 80222B00 8FBF0014 */ lw $ra, 0x14($sp) -/* 2354A4 80222B04 27BD0020 */ addiu $sp, $sp, 0x20 -/* 2354A8 80222B08 03E00008 */ jr $ra -/* 2354AC 80222B0C 00000000 */ nop diff --git a/asm/non_matchings/ovl18/ovl18_3/func_80222BB4_ovl18.s b/asm/non_matchings/ovl18/ovl18_3/func_80222BB4_ovl18.s deleted file mode 100644 index dbb4e2d6..00000000 --- a/asm/non_matchings/ovl18/ovl18_3/func_80222BB4_ovl18.s +++ /dev/null @@ -1,57 +0,0 @@ -glabel func_80222BB4_ovl18 -/* 235554 80222BB4 3C0E8005 */ lui $t6, %hi(D_8004A7C4) # $t6, 0x8005 -/* 235558 80222BB8 8DCEA7C4 */ lw $t6, %lo(D_8004A7C4)($t6) -/* 23555C 80222BBC 27BDFFE8 */ addiu $sp, $sp, -0x18 -/* 235560 80222BC0 AFBF0014 */ sw $ra, 0x14($sp) -/* 235564 80222BC4 AFA40018 */ sw $a0, 0x18($sp) -/* 235568 80222BC8 8DCF0000 */ lw $t7, ($t6) -/* 23556C 80222BCC 3C02800E */ lui $v0, %hi(D_800E1B50) -/* 235570 80222BD0 3C01440C */ li $at, 0x440C0000 # 560.000000 -/* 235574 80222BD4 000FC080 */ sll $t8, $t7, 2 -/* 235578 80222BD8 00581021 */ addu $v0, $v0, $t8 -/* 23557C 80222BDC 8C421B50 */ lw $v0, %lo(D_800E1B50)($v0) -/* 235580 80222BE0 9059003C */ lbu $t9, 0x3c($v0) -/* 235584 80222BE4 57200024 */ bnezl $t9, .L80222C78_ovl18 -/* 235588 80222BE8 8FBF0014 */ lw $ra, 0x14($sp) -/* 23558C 80222BEC 44816000 */ mtc1 $at, $f12 -/* 235590 80222BF0 0C0669FA */ jal func_8019A7E8_ovl18 -/* 235594 80222BF4 00000000 */ nop -/* 235598 80222BF8 1040001E */ beqz $v0, .L80222C74_ovl18 -/* 23559C 80222BFC 3C0142A0 */ li $at, 0x42A00000 # 80.000000 -/* 2355A0 80222C00 44816000 */ mtc1 $at, $f12 -/* 2355A4 80222C04 0C066C98 */ jal func_8019B260_ovl18 -/* 2355A8 80222C08 00000000 */ nop -/* 2355AC 80222C0C 24030001 */ li $v1, 1 -/* 2355B0 80222C10 14430009 */ bne $v0, $v1, .L80222C38_ovl18 -/* 2355B4 80222C14 3C04800E */ lui $a0, %hi(D_800DE510) -/* 2355B8 80222C18 3C028005 */ lui $v0, %hi(D_8004A7C4) # $v0, 0x8005 -/* 2355BC 80222C1C 8C42A7C4 */ lw $v0, %lo(D_8004A7C4)($v0) -/* 2355C0 80222C20 3C01800E */ lui $at, %hi(D_800DDC50) -/* 2355C4 80222C24 8C480000 */ lw $t0, ($v0) -/* 2355C8 80222C28 00084880 */ sll $t1, $t0, 2 -/* 2355CC 80222C2C 00290821 */ addu $at, $at, $t1 -/* 2355D0 80222C30 10000009 */ b .L80222C58_ovl18 -/* 2355D4 80222C34 AC23DC50 */ sw $v1, %lo(D_800DDC50)($at) -.L80222C38_ovl18: -/* 2355D8 80222C38 3C028005 */ lui $v0, %hi(D_8004A7C4) # $v0, 0x8005 -/* 2355DC 80222C3C 8C42A7C4 */ lw $v0, %lo(D_8004A7C4)($v0) -/* 2355E0 80222C40 3C01800E */ lui $at, %hi(D_800DDC50) -/* 2355E4 80222C44 240A0003 */ li $t2, 3 -/* 2355E8 80222C48 8C4B0000 */ lw $t3, ($v0) -/* 2355EC 80222C4C 000B6080 */ sll $t4, $t3, 2 -/* 2355F0 80222C50 002C0821 */ addu $at, $at, $t4 -/* 2355F4 80222C54 AC2ADC50 */ sw $t2, %lo(D_800DDC50)($at) -.L80222C58_ovl18: -/* 2355F8 80222C58 8C4D0000 */ lw $t5, ($v0) -/* 2355FC 80222C5C 3C058022 */ lui $a1, %hi(func_802228F8_ovl18) # $a1, 0x8022 -/* 235600 80222C60 24A528F8 */ addiu $a1, %lo(func_802228F8_ovl18) # addiu $a1, $a1, 0x28f8 -/* 235604 80222C64 000D7080 */ sll $t6, $t5, 2 -/* 235608 80222C68 008E2021 */ addu $a0, $a0, $t6 -/* 23560C 80222C6C 0C02C7B2 */ jal func_800B1EC8 -/* 235610 80222C70 8C84E510 */ lw $a0, %lo(D_800DE510)($a0) -.L80222C74_ovl18: -/* 235614 80222C74 8FBF0014 */ lw $ra, 0x14($sp) -.L80222C78_ovl18: -/* 235618 80222C78 27BD0018 */ addiu $sp, $sp, 0x18 -/* 23561C 80222C7C 03E00008 */ jr $ra -/* 235620 80222C80 00000000 */ nop diff --git a/asm/non_matchings/ovl18/ovl18_5/func_802249D8_ovl18.s b/asm/non_matchings/ovl18/ovl18_5/func_802249D8_ovl18.s deleted file mode 100644 index 6ca8d826..00000000 --- a/asm/non_matchings/ovl18/ovl18_5/func_802249D8_ovl18.s +++ /dev/null @@ -1,60 +0,0 @@ -glabel func_802249D8_ovl18 -/* 237378 802249D8 3C0E8005 */ lui $t6, %hi(D_8004A7C4) # $t6, 0x8005 -/* 23737C 802249DC 8DCEA7C4 */ lw $t6, %lo(D_8004A7C4)($t6) -/* 237380 802249E0 27BDFFB8 */ addiu $sp, $sp, -0x48 -/* 237384 802249E4 AFBF0014 */ sw $ra, 0x14($sp) -/* 237388 802249E8 AFA40048 */ sw $a0, 0x48($sp) -/* 23738C 802249EC 8DC20000 */ lw $v0, ($t6) -/* 237390 802249F0 3C18800F */ lui $t8, %hi(D_800E9C60) -/* 237394 802249F4 24010001 */ li $at, 1 -/* 237398 802249F8 00027880 */ sll $t7, $v0, 2 -/* 23739C 802249FC 030FC021 */ addu $t8, $t8, $t7 -/* 2373A0 80224A00 8F189C60 */ lw $t8, %lo(D_800E9C60)($t8) -/* 2373A4 80224A04 17010015 */ bne $t8, $at, .L80224A5C_ovl18 -/* 2373A8 80224A08 00000000 */ nop -/* 2373AC 80224A0C 0C044554 */ jal func_80111550_ovl18 -/* 2373B0 80224A10 00402025 */ move $a0, $v0 -/* 2373B4 80224A14 3C198005 */ lui $t9, %hi(D_8004A7C4) # $t9, 0x8005 -/* 2373B8 80224A18 8F39A7C4 */ lw $t9, %lo(D_8004A7C4)($t9) -/* 2373BC 80224A1C 3C048023 */ lui $a0, %hi(D_8022A4E4) # $a0, 0x8023 -/* 2373C0 80224A20 2484A4E4 */ addiu $a0, %lo(D_8022A4E4) # addiu $a0, $a0, -0x5b1c -/* 2373C4 80224A24 0C044722 */ jal func_80111C88_ovl18 -/* 2373C8 80224A28 8F250000 */ lw $a1, ($t9) -/* 2373CC 80224A2C 0C0447B3 */ jal func_80111ECC_ovl18 -/* 2373D0 80224A30 00402025 */ move $a0, $v0 -/* 2373D4 80224A34 0C0442C0 */ jal func_80110B00_ovl18 -/* 2373D8 80224A38 27A40028 */ addiu $a0, $sp, 0x28 -/* 2373DC 80224A3C 14400007 */ bnez $v0, .L80224A5C_ovl18 -/* 2373E0 80224A40 00000000 */ nop -/* 2373E4 80224A44 0C0443F5 */ jal func_80110FD4_ovl18 -/* 2373E8 80224A48 27A40028 */ addiu $a0, $sp, 0x28 -/* 2373EC 80224A4C 14400003 */ bnez $v0, .L80224A5C_ovl18 -/* 2373F0 80224A50 00000000 */ nop -/* 2373F4 80224A54 0C044054 */ jal func_80110150_ovl18 -/* 2373F8 80224A58 27A40028 */ addiu $a0, $sp, 0x28 -.L80224A5C_ovl18: -/* 2373FC 80224A5C 3C028005 */ lui $v0, %hi(D_8004A7C4) # $v0, 0x8005 -/* 237400 80224A60 8C42A7C4 */ lw $v0, %lo(D_8004A7C4)($v0) -/* 237404 80224A64 3C08800F */ lui $t0, %hi(D_800E9E20) -/* 237408 80224A68 3C01800E */ lui $at, %hi(D_800DDC50) -/* 23740C 80224A6C 8C430000 */ lw $v1, ($v0) -/* 237410 80224A70 3C04800E */ lui $a0, %hi(D_800DE510) -/* 237414 80224A74 00031880 */ sll $v1, $v1, 2 -/* 237418 80224A78 01034021 */ addu $t0, $t0, $v1 -/* 23741C 80224A7C 8D089E20 */ lw $t0, %lo(D_800E9E20)($t0) -/* 237420 80224A80 00230821 */ addu $at, $at, $v1 -/* 237424 80224A84 5100000A */ beql $t0, $zero, .L80224AB0_ovl18 -/* 237428 80224A88 8FBF0014 */ lw $ra, 0x14($sp) -/* 23742C 80224A8C AC20DC50 */ sw $zero, %lo(D_800DDC50)($at) -/* 237430 80224A90 8C490000 */ lw $t1, ($v0) -/* 237434 80224A94 3C058022 */ lui $a1, %hi(func_802245E0_ovl18) # $a1, 0x8022 -/* 237438 80224A98 24A545E0 */ addiu $a1, %lo(func_802245E0_ovl18) # addiu $a1, $a1, 0x45e0 -/* 23743C 80224A9C 00095080 */ sll $t2, $t1, 2 -/* 237440 80224AA0 008A2021 */ addu $a0, $a0, $t2 -/* 237444 80224AA4 0C02C7B2 */ jal func_800B1EC8 -/* 237448 80224AA8 8C84E510 */ lw $a0, %lo(D_800DE510)($a0) -/* 23744C 80224AAC 8FBF0014 */ lw $ra, 0x14($sp) -.L80224AB0_ovl18: -/* 237450 80224AB0 27BD0048 */ addiu $sp, $sp, 0x48 -/* 237454 80224AB4 03E00008 */ jr $ra -/* 237458 80224AB8 00000000 */ nop diff --git a/asm/ovl0/ovl0_9.s b/asm/ovl0/ovl0_9.s index baca8142..f2073e90 100644 --- a/asm/ovl0/ovl0_9.s +++ b/asm/ovl0/ovl0_9.s @@ -52,9 +52,10 @@ glabel func_800232F8 /* 023F50 80023350 03E00008 */ jr $ra /* 023F54 80023354 00000000 */ nop -glabel func_80023358 /* 023F58 80023358 00000000 */ nop -/* 023F5C 8002335C 00000000 */ nop +/* 023F5C 8002335C 00000000 */ nop + +glabel func_80023360 /* 023F60 80023360 AFA40000 */ sw $a0, ($sp) /* 023F64 80023364 308400FF */ andi $a0, $a0, 0xff /* 023F68 80023368 28810080 */ slti $at, $a0, 0x80 diff --git a/data/banks/bank0.c b/data/banks/bank0.c index 8219e4a7..1ff6b8d6 100644 --- a/data/banks/bank0.c +++ b/data/banks/bank0.c @@ -1,6 +1,6 @@ #include "types.h" #include "segments.h" -#include "banks.h" +#include "banks/bank0.h" u32 *D_800C46A0[] = { NULL, diff --git a/data/banks/bank0.s b/data/banks/bank0.s index 52ca1471..db8cd99a 100644 --- a/data/banks/bank0.s +++ b/data/banks/bank0.s @@ -1,227 +1,227 @@ -; .include "include/macros.inc" -; .section .data +.include "include/macros.inc" +.section .data -; glabel D_800C46A0 -; .word NULL -; .word NULL -; .word bank_0_index_1_geo_start -; .word bank_0_index_1_geo_end +glabel D_800C46A0 +.word NULL +.word NULL +.word bank_0_index_1_geo_start +.word bank_0_index_1_geo_end -; .word bank_0_index_2_geo_start -; .word bank_0_index_2_geo_end +.word bank_0_index_2_geo_start +.word bank_0_index_2_geo_end -; .word bank_0_index_3_geo_start -; .word bank_0_index_3_geo_end +.word bank_0_index_3_geo_start +.word bank_0_index_3_geo_end -; .word bank_0_index_4_geo_start -; .word bank_0_index_4_geo_end +.word bank_0_index_4_geo_start +.word bank_0_index_4_geo_end -; .word bank_0_index_5_geo_start -; .word bank_0_index_5_geo_end +.word bank_0_index_5_geo_start +.word bank_0_index_5_geo_end -; .word bank_0_index_6_geo_start -; .word bank_0_index_6_geo_end +.word bank_0_index_6_geo_start +.word bank_0_index_6_geo_end -; .word bank_0_index_7_geo_start -; .word bank_0_index_7_geo_end +.word bank_0_index_7_geo_start +.word bank_0_index_7_geo_end -; .word bank_0_index_8_geo_start -; .word bank_0_index_8_geo_end +.word bank_0_index_8_geo_start +.word bank_0_index_8_geo_end -; .word bank_0_index_9_geo_start -; .word bank_0_index_9_geo_end +.word bank_0_index_9_geo_start +.word bank_0_index_9_geo_end -; .word bank_0_index_10_geo_start -; .word bank_0_index_10_geo_end +.word bank_0_index_10_geo_start +.word bank_0_index_10_geo_end -; glabel D_800C46F8 -; .word 0x00000000 +glabel D_800C46F8 +.word 0x00000000 -; glabel D_800C46FC -; .word 0x00000000 +glabel D_800C46FC +.word 0x00000000 -; glabel D_800C4700 -; .word 0x00000010 +glabel D_800C4700 +.word 0x00000010 -; glabel D_800C4704 -; .word 0x00000210 +glabel D_800C4704 +.word 0x00000210 -; glabel D_800C4708 -; .word 0x00000410 +glabel D_800C4708 +.word 0x00000410 -; glabel D_800C470C -; .word 0x00000610 +glabel D_800C470C +.word 0x00000610 -; glabel D_800C4710 -; .word 0x00000810 +glabel D_800C4710 +.word 0x00000810 -; glabel D_800C4714 -; .word 0x00000A10 +glabel D_800C4714 +.word 0x00000A10 -; glabel D_800C4718 -; .word 0x00000C10 +glabel D_800C4718 +.word 0x00000C10 -; glabel D_800C471C -; .word 0x00000E10 +glabel D_800C471C +.word 0x00000E10 -; glabel D_800C4720 -; .word 0x00001010 +glabel D_800C4720 +.word 0x00001010 -; glabel D_800C4724 -; .word 0x00001210 +glabel D_800C4724 +.word 0x00001210 -; glabel D_800C4728 -; .word 0x00001410 +glabel D_800C4728 +.word 0x00001410 -; glabel D_800C472C -; .word 0x00001C10 +glabel D_800C472C +.word 0x00001C10 -; glabel D_800C4730 -; .word 0x00002C10 +glabel D_800C4730 +.word 0x00002C10 -; glabel D_800C4734 -; .word 0x00002E10 +glabel D_800C4734 +.word 0x00002E10 -; glabel D_800C4738 -; .word 0x00003010 +glabel D_800C4738 +.word 0x00003010 -; glabel D_800C473C -; .word 0x00003210 +glabel D_800C473C +.word 0x00003210 -; glabel D_800C4740 -; .word 0x00003410 +glabel D_800C4740 +.word 0x00003410 -; glabel D_800C4744 -; .word 0x00003610 +glabel D_800C4744 +.word 0x00003610 -; glabel D_800C4748 -; .word 0x00003810 +glabel D_800C4748 +.word 0x00003810 -; glabel D_800C474C -; .word 0x00003890 +glabel D_800C474C +.word 0x00003890 -; glabel D_800C4750 -; .word 0x00003910 +glabel D_800C4750 +.word 0x00003910 -; glabel D_800C4754 -; .word 0x00003B10 +glabel D_800C4754 +.word 0x00003B10 -; glabel D_800C4758 -; .word 0x00016920 +glabel D_800C4758 +.word 0x00016920 -; glabel D_800C475C -; .word 0x00029730 +glabel D_800C475C +.word 0x00029730 -; glabel D_800C4760 -; .word 0x00039E80 +glabel D_800C4760 +.word 0x00039E80 -; glabel D_800C4764 -; .word 0x0003BE90 +glabel D_800C4764 +.word 0x0003BE90 -; glabel D_800C4768 -; .word 0x0003CF40 +glabel D_800C4768 +.word 0x0003CF40 -; glabel D_800C476C -; .word 0x00000000 +glabel D_800C476C +.word 0x00000000 -; glabel D_800C4770 -; .word 0x00000000 +glabel D_800C4770 +.word 0x00000000 -; glabel D_800C4774 -; .word 0x0000015C +glabel D_800C4774 +.word 0x0000015C -; glabel D_800C4778 -; .word 0x00000314 +glabel D_800C4778 +.word 0x00000314 -; glabel D_800C477C -; .word 0x0000039C +glabel D_800C477C +.word 0x0000039C -; glabel D_800C4780 -; .word 0x00000834 +glabel D_800C4780 +.word 0x00000834 -; glabel D_800C4784 -; .word 0x00000BF0 +glabel D_800C4784 +.word 0x00000BF0 -; glabel D_800C4788 -; .word 0x00000DD0 +glabel D_800C4788 +.word 0x00000DD0 -; glabel D_800C478C -; .word 0x00001434 +glabel D_800C478C +.word 0x00001434 -; glabel D_800C4790 -; .word 0x000021A0 +glabel D_800C4790 +.word 0x000021A0 -; glabel D_800C4794 -; .word 0x000022C4 +glabel D_800C4794 +.word 0x000022C4 -; glabel D_800C4798 -; .word 0x000023F8 +glabel D_800C4798 +.word 0x000023F8 -; glabel D_800C479C -; .word 0x0000251C +glabel D_800C479C +.word 0x0000251C -; glabel D_800C47A0 -; .word 0x0000268C +glabel D_800C47A0 +.word 0x0000268C -; glabel D_800C47A4 -; .word 0x00002850 +glabel D_800C47A4 +.word 0x00002850 -; glabel D_800C47A8 -; .word 0x000029C0 +glabel D_800C47A8 +.word 0x000029C0 -; glabel D_800C47AC -; .word 0x00002CE8 +glabel D_800C47AC +.word 0x00002CE8 -; glabel D_800C47B0 -; .word 0x00002FB0 +glabel D_800C47B0 +.word 0x00002FB0 -; glabel D_800C47B4 -; .word 0x00003044 +glabel D_800C47B4 +.word 0x00003044 -; glabel D_800C47B8 -; .word 0x000030DC +glabel D_800C47B8 +.word 0x000030DC -; glabel D_800C47BC -; .word 0x00000000 +glabel D_800C47BC +.word 0x00000000 -; glabel D_800C47C0 -; .word 0x00000000 +glabel D_800C47C0 +.word 0x00000000 -; glabel D_800C47C4 -; .word 0x0000204C +glabel D_800C47C4 +.word 0x0000204C -; glabel D_800C47C8 -; .word 0x000085EC +glabel D_800C47C8 +.word 0x000085EC -; glabel D_800C47CC -; .word 0x000086E4 +glabel D_800C47CC +.word 0x000086E4 -; glabel D_800C47D0 -; .word 0x0000970C +glabel D_800C47D0 +.word 0x0000970C -; glabel *D_800C47D4 -; .word D_800C46A0 +glabel *D_800C47D4 +.word D_800C46A0 -; glabel D_800C47D8 -; .word -1 +glabel D_800C47D8 +.word -1 -; glabel *D_800C47DC -; .word D_800C46F8 +glabel *D_800C47DC +.word D_800C46F8 -; glabel *D_800C47E0 -; .word bank_0_index_1_image +glabel *D_800C47E0 +.word bank_0_index_1_image -; glabel *D_800C47E4 -; .word D_800C476C +glabel *D_800C47E4 +.word D_800C476C -; glabel *D_800C47E8 -; .word bank_0_index_1_anim +glabel *D_800C47E8 +.word bank_0_index_1_anim -; glabel *D_800C47EC -; .word D_800C47BC +glabel *D_800C47EC +.word D_800C47BC -; glabel *D_800C47F0 -; .word bank_0_index_1_misc +glabel *D_800C47F0 +.word bank_0_index_1_misc diff --git a/include/banks.h b/include/banks.h index c6c1ed93..48d41529 100644 --- a/include/banks.h +++ b/include/banks.h @@ -17,79 +17,6 @@ struct BankHeader { -extern u32 bank_0_index_1_geo_start[]; -extern u32 bank_0_index_2_geo_start[]; -extern u32 bank_0_index_3_geo_start[]; -extern u32 bank_0_index_4_geo_start[]; -extern u32 bank_0_index_5_geo_start[]; -extern u32 bank_0_index_6_geo_start[]; -extern u32 bank_0_index_7_geo_start[]; -extern u32 bank_0_index_8_geo_start[]; -extern u32 bank_0_index_9_geo_start[]; -extern u32 bank_0_index_10_geo_start[]; - -extern u32 bank_0_index_1_geo_end[]; -extern u32 bank_0_index_2_geo_end[]; -extern u32 bank_0_index_3_geo_end[]; -extern u32 bank_0_index_4_geo_end[]; -extern u32 bank_0_index_5_geo_end[]; -extern u32 bank_0_index_6_geo_end[]; -extern u32 bank_0_index_7_geo_end[]; -extern u32 bank_0_index_8_geo_end[]; -extern u32 bank_0_index_9_geo_end[]; -extern u32 bank_0_index_10_geo_end[]; - -extern u32 bank_0_index_1_image_start[]; -extern u32 bank_0_index_2_image_start[]; -extern u32 bank_0_index_3_image_start[]; -extern u32 bank_0_index_4_image_start[]; -extern u32 bank_0_index_5_image_start[]; -extern u32 bank_0_index_6_image_start[]; -extern u32 bank_0_index_7_image_start[]; -extern u32 bank_0_index_8_image_start[]; -extern u32 bank_0_index_9_image_start[]; -extern u32 bank_0_index_10_image_start[]; -extern u32 bank_0_index_11_image_start[]; -extern u32 bank_0_index_12_image_start[]; -extern u32 bank_0_index_13_image_start[]; -extern u32 bank_0_index_14_image_start[]; -extern u32 bank_0_index_15_image_start[]; -extern u32 bank_0_index_16_image_start[]; -extern u32 bank_0_index_17_image_start[]; -extern u32 bank_0_index_18_image_start[]; -extern u32 bank_0_index_19_image_start[]; -extern u32 bank_0_index_20_image_start[]; -extern u32 bank_0_index_21_image_start[]; -extern u32 bank_0_index_22_image_start[]; -extern u32 bank_0_index_23_image_start[]; -extern u32 bank_0_index_24_image_start[]; -extern u32 bank_0_index_25_image_start[]; -extern u32 bank_0_index_26_image_start[]; -extern u32 bank_0_index_27_image_start[]; -extern u32 bank_0_index_1_anim_start[]; -extern u32 bank_0_index_2_anim_start[]; -extern u32 bank_0_index_3_anim_start[]; -extern u32 bank_0_index_4_anim_start[]; -extern u32 bank_0_index_5_anim_start[]; -extern u32 bank_0_index_6_anim_start[]; -extern u32 bank_0_index_7_anim_start[]; -extern u32 bank_0_index_8_anim_start[]; -extern u32 bank_0_index_9_anim_start[]; -extern u32 bank_0_index_10_anim_start[]; -extern u32 bank_0_index_11_anim_start[]; -extern u32 bank_0_index_12_anim_start[]; -extern u32 bank_0_index_13_anim_start[]; -extern u32 bank_0_index_14_anim_start[]; -extern u32 bank_0_index_15_anim_start[]; -extern u32 bank_0_index_16_anim_start[]; -extern u32 bank_0_index_17_anim_start[]; -extern u32 bank_0_index_18_anim_start[]; -extern u32 bank_0_index_1_misc_start[]; -extern u32 bank_0_index_2_misc_start[]; -extern u32 bank_0_index_3_misc_start[]; -extern u32 bank_0_index_4_misc_start[]; - - extern u32 bank_1_index_1_geo[]; extern u32 bank_1_index_2_geo[]; diff --git a/include/banks/bank0.h b/include/banks/bank0.h new file mode 100644 index 00000000..e29de4e5 --- /dev/null +++ b/include/banks/bank0.h @@ -0,0 +1,85 @@ +#include + +// technically everything in this struct is a void *, but it's so much easier this way +struct BankHeader { + /* 0x0 */ u32 *geoBlockTable; + /* 0x4 */ u32 *geoROMOffset; + /* 0x8 */ u32 *imageBlockTable; + /* 0xC */ u32 *imageROMOffset; + /* 0x10 */ u32 *animBlockTable; + /* 0x14 */ u32 *animROMOffset; + /* 0x18 */ u32 *miscBlockTable; + /* 0x1C */ u32 *miscROMOffset; +}; + +extern u32 bank_0_index_1_geo_start[]; +extern u32 bank_0_index_2_geo_start[]; +extern u32 bank_0_index_3_geo_start[]; +extern u32 bank_0_index_4_geo_start[]; +extern u32 bank_0_index_5_geo_start[]; +extern u32 bank_0_index_6_geo_start[]; +extern u32 bank_0_index_7_geo_start[]; +extern u32 bank_0_index_8_geo_start[]; +extern u32 bank_0_index_9_geo_start[]; +extern u32 bank_0_index_10_geo_start[]; + +extern u32 bank_0_index_1_geo_end[]; +extern u32 bank_0_index_2_geo_end[]; +extern u32 bank_0_index_3_geo_end[]; +extern u32 bank_0_index_4_geo_end[]; +extern u32 bank_0_index_5_geo_end[]; +extern u32 bank_0_index_6_geo_end[]; +extern u32 bank_0_index_7_geo_end[]; +extern u32 bank_0_index_8_geo_end[]; +extern u32 bank_0_index_9_geo_end[]; +extern u32 bank_0_index_10_geo_end[]; + +extern u32 bank_0_index_1_image_start[]; +extern u32 bank_0_index_2_image_start[]; +extern u32 bank_0_index_3_image_start[]; +extern u32 bank_0_index_4_image_start[]; +extern u32 bank_0_index_5_image_start[]; +extern u32 bank_0_index_6_image_start[]; +extern u32 bank_0_index_7_image_start[]; +extern u32 bank_0_index_8_image_start[]; +extern u32 bank_0_index_9_image_start[]; +extern u32 bank_0_index_10_image_start[]; +extern u32 bank_0_index_11_image_start[]; +extern u32 bank_0_index_12_image_start[]; +extern u32 bank_0_index_13_image_start[]; +extern u32 bank_0_index_14_image_start[]; +extern u32 bank_0_index_15_image_start[]; +extern u32 bank_0_index_16_image_start[]; +extern u32 bank_0_index_17_image_start[]; +extern u32 bank_0_index_18_image_start[]; +extern u32 bank_0_index_19_image_start[]; +extern u32 bank_0_index_20_image_start[]; +extern u32 bank_0_index_21_image_start[]; +extern u32 bank_0_index_22_image_start[]; +extern u32 bank_0_index_23_image_start[]; +extern u32 bank_0_index_24_image_start[]; +extern u32 bank_0_index_25_image_start[]; +extern u32 bank_0_index_26_image_start[]; +extern u32 bank_0_index_27_image_start[]; +extern u32 bank_0_index_1_anim_start[]; +extern u32 bank_0_index_2_anim_start[]; +extern u32 bank_0_index_3_anim_start[]; +extern u32 bank_0_index_4_anim_start[]; +extern u32 bank_0_index_5_anim_start[]; +extern u32 bank_0_index_6_anim_start[]; +extern u32 bank_0_index_7_anim_start[]; +extern u32 bank_0_index_8_anim_start[]; +extern u32 bank_0_index_9_anim_start[]; +extern u32 bank_0_index_10_anim_start[]; +extern u32 bank_0_index_11_anim_start[]; +extern u32 bank_0_index_12_anim_start[]; +extern u32 bank_0_index_13_anim_start[]; +extern u32 bank_0_index_14_anim_start[]; +extern u32 bank_0_index_15_anim_start[]; +extern u32 bank_0_index_16_anim_start[]; +extern u32 bank_0_index_17_anim_start[]; +extern u32 bank_0_index_18_anim_start[]; +extern u32 bank_0_index_1_misc_start[]; +extern u32 bank_0_index_2_misc_start[]; +extern u32 bank_0_index_3_misc_start[]; +extern u32 bank_0_index_4_misc_start[]; \ No newline at end of file diff --git a/src/ovl0/ovl0_2_5.c b/src/ovl0/ovl0_2_5.c index a77de73e..70c78c97 100644 --- a/src/ovl0/ovl0_2_5.c +++ b/src/ovl0/ovl0_2_5.c @@ -20,9 +20,9 @@ extern long long int gspL3DEX2_fifoTextStart[]; extern long long int gspS2DEX2_fifoDataStart[]; extern long long int gspS2DEX2_fifoTextStart[]; -u32 D_8003DCA0 = 0x00000000; -u32 D_8003DCA4 = 0x00000000; -u32 D_8003DCA8 = 0x00000000; +u32 D_8003DCA0 = 0; +u32 D_8003DCA4 = 0; +u32 D_8003DCA8 = 0; struct UcodeHandler D_8003DCAC[16] = { {gspF3DEX2_fifoTextStart, gspF3DEX2_fifoDataStart}, diff --git a/src/ovl0/ovl0_2_5_1.c b/src/ovl0/ovl0_2_5_1.c index c742e3fc..2500b374 100644 --- a/src/ovl0/ovl0_2_5_1.c +++ b/src/ovl0/ovl0_2_5_1.c @@ -45,24 +45,23 @@ u32 func_800078F0(u32 arg0) { return (D_8004A504 == 3) ? arg0 : (temp_v0 << 16) | temp_v0; } -extern s32 D_8004A518[]; +extern u32 D_8004A518[]; void func_80000980(void*); -#ifdef NON_MATCHING -// Regalloc and ordering -void func_80007944(s32 arg0, s32 arg1, s32 arg2) { - struct InterruptMessageType5 msg; +#ifdef NON_MATCHING_ +// something's finicky about this function +void func_80007944(u32 arg0, u32 arg1, u32 arg2) { + struct InterruptMessageType5 msg; - msg.unk0 = 5; - msg.unk4 = 0x64; + msg.unk0 = 0x00000005; + msg.unk4 = 0x00000064; D_8004A518[0] = arg0; - D_8004A518[1] = arg1; - D_8004A518[2] = arg2; msg.unk24 = arg0; + D_8004A518[1] = arg1; msg.unk28 = arg1; - msg.unk2C = arg2; - func_80000980(&msg); + D_8004A518[2] = arg2; + msg.unk2C = arg2; func_80000980(&msg); } #else GLOBAL_ASM("asm/non_matchings/ovl0/ovl0_2_5/func_80007944.s") @@ -141,23 +140,19 @@ void func_80007B38(s32 arg0, s32 arg1, u32 arg2) { func_80000980(&msg); } -#ifdef MIPS_TO_C -//generated by mips_to_c commit e0e006e8858ba357d1dcb4dc64f038b7df278aa6 -void func_80007BA4(void *arg0) { - s32 temp_a0; - s32 temp_a1; - s32 temp_a2; - void *temp_a3; +struct UnkStruct80007BA4 { + u32 unk0; + u32 unk4; + u32 unk8; + u32 fb; + u32 unk10; + u32 unk14; + u32 unk18; +}; +extern void **gZBuffer; - temp_a3 = arg0; - temp_a1 = temp_a3->unk4; - temp_a2 = temp_a3->unk8; - temp_a0 = arg0->unk0; - arg0 = temp_a3; - func_80007944(temp_a0, temp_a1, temp_a2, temp_a3); - gZBuffer = (s32) arg0->unkC; +void func_80007BA4(struct UnkStruct80007BA4 *arg0) { + func_80007944(arg0->unk0, arg0->unk4, arg0->unk8); + gZBuffer = (s32) arg0->fb; func_80007B38(arg0->unk10, arg0->unk14, arg0->unk18); } -#else -GLOBAL_ASM("asm/non_matchings/ovl0/ovl0_2_5/func_80007BA4.s") -#endif diff --git a/src/ovl18/ovl18_1.c b/src/ovl18/ovl18_1.c index 3b801fef..4343060d 100644 --- a/src/ovl18/ovl18_1.c +++ b/src/ovl18/ovl18_1.c @@ -58,24 +58,19 @@ void func_802204F8_ovl18(s32 arg0) { } } -// regalloc moment -#ifdef MIPS_TO_C -struct UnkStruct8004A7C4 *func_802205AC_ovl18(s32 arg0) { +void func_802205AC_ovl18(s32 arg0) { f32 temp_f0; - struct UnkStruct8004A7C4 *temp_v0; - struct UnkStruct8004A7C4 *temp_v0_2; D_800DDFD0[D_8004A7C4->objId] = 1; func_800B3520_ovl18(); func_800AECC0_ovl18(D_800D6B10); func_800AED20_ovl18(D_800D6B10); temp_f0 = func_801D650C_ovl18(arg0); - temp_v0_2 = D_8004A7C4; - D_800EADE0[temp_v0_2->unk0] = temp_f0; + D_800EADE0[D_8004A7C4->objId] = temp_f0; if (0.0f < temp_f0) { - D_800E6A10[temp_v0_2->unk0] = 1.0f; + D_800E6A10[D_8004A7C4->objId] = 1.0f; } else { - D_800E6A10[temp_v0_2->unk0] = -1.0f; + D_800E6A10[D_8004A7C4->objId] = -1.0f; } func_800AA154_ovl18(0x10028); func_800AECC0_ovl18(0.0f); @@ -84,16 +79,13 @@ struct UnkStruct8004A7C4 *func_802205AC_ovl18(s32 arg0) { func_800A7678(0xA6); func_8000B6BC(4); func_800AECC0_ovl18(D_800D6B10); - func_800AED20_ovl18(D_800D6B10); - func_800AA154_ovl18(0x10023); - temp_v0 = D_8004A7C4; - D_800E98E0[temp_v0->unk0] = 0x1E; - D_800DDC50[temp_v0->unk0] = 0; - return temp_v0; + do { + func_800AED20_ovl18(D_800D6B10); + func_800AA154_ovl18(0x10023); + } while (0); + D_800E98E0[D_8004A7C4->objId] = 0x1E; + D_800DDC50[D_8004A7C4->objId] = 0; } -#else -GLOBAL_ASM("asm/non_matchings/ovl18/ovl18_1/func_802205AC_ovl18.s") -#endif void func_80220720_ovl18(s32 arg0) { @@ -314,7 +306,7 @@ u8 func_80220F68_ovl18(s32 arg0) { u8 phi_return; temp_a2 = D_8004A7C4; - temp_a3 = temp_a2->unk0; + temp_a3 = D_8004A7C4->unk0; temp_a1 = arg0; temp_a3 = temp_a3 * 4; temp_t0 = &D_800E1B50[temp_a3]; @@ -447,7 +439,7 @@ void func_80221498_ovl18(s32 arg0) { D_800E8920[D_8004A7C4->objId] = 0; func_800AECC0_ovl18(D_800D6B10 * temp_f20); func_800AED20_ovl18(D_800D6B10 * temp_f20); - func_800A9EA4_ovl18((D_800E6A10[D_8004A7C4->objId] == 1.0f) ? 0x000101B4 : 0x000101B6); + func_800A9EA4_ovl18((D_800E6A10[D_8004A7C4->objId] == 1.0f) ? 0x000101B6 : 0x000101B4); D_800E3210[D_8004A7C4->objId] = 4.5f; D_800E3750[D_8004A7C4->objId] = -0.25f; D_800E3C90[D_8004A7C4->objId] = 4.5f; diff --git a/src/ovl18/ovl18_2.c b/src/ovl18/ovl18_2.c index c4390f92..2c27e824 100644 --- a/src/ovl18/ovl18_2.c +++ b/src/ovl18/ovl18_2.c @@ -26,6 +26,7 @@ void func_80221E90_ovl18(s32 arg0) { D_800E1B50[D_8004A7C4->objId]->unk98 = &D_801CB4DC; D_800E8920[D_8004A7C4->objId] = 0; temp_a3 = D_800E0D50[D_8004A7C4->objId]; + if (0) {} if ((D_800DD710[D_800E0D50[D_8004A7C4->objId]] == -1) || (D_8004A7C4->objId != D_800EBBE0[D_800E0D50[D_8004A7C4->objId]])) { func_8019D958_ovl18(D_8004A7C4->objId); //, temp_a1, D_8004A7C4->objId, temp_a3, temp_a1); diff --git a/src/ovl18/ovl18_3.c b/src/ovl18/ovl18_3.c index f888f438..848b3436 100644 --- a/src/ovl18/ovl18_3.c +++ b/src/ovl18/ovl18_3.c @@ -135,26 +135,21 @@ void func_80222940_ovl18(UNUSED s32 arg0) { func_800A447C(D_800DDC50[D_8004A7C4->objId], 7, &D_8022AB80[27]); } -#ifdef MIPS_TO_C -//generated by mips_to_c commit e0e006e8858ba357d1dcb4dc64f038b7df278aa6 void func_80222A54_ovl18(s32 arg0) { - s32 temp_v0; + u32 temp_v0; temp_v0 = func_801A0D74_ovl18(); - if (D_800E9C60[temp_v1] != 0) { - func_8019B424_ovl18(arg0, D_8004A7C4->objId); + if (D_800E9C60[D_8004A7C4->objId] != 0) { + func_8019B424_ovl18(arg0); } if (temp_v0 == 0) { - func_800A447C(D_800DDFD0[D_8004A7C4->objId], 7, &D_8022AC08); + func_800A447C(D_800DDFD0[D_8004A7C4->objId], 7, &D_8022AB80[34]); } if (D_800E9C60[D_8004A7C4->objId] != 0) { func_8019BE9C_ovl18(6); } func_8021F5CC_ovl18(); } -#else -GLOBAL_ASM("asm/non_matchings/ovl18/ovl18_3/func_80222A54_ovl18.s") -#endif void func_80222B10_ovl18(UNUSED s32 arg0) { struct UnkStruct800E1B50 *temp_a1 = D_800E1B50[D_8004A7C4->objId]; @@ -168,17 +163,14 @@ void func_80222B10_ovl18(UNUSED s32 arg0) { func_800AFA14_ovl18(); } -// regalloc moment -#ifdef MIPS_TO_C void func_80222BB4_ovl18(UNUSED s32 arg0) { - if (D_800E1B50[D_8004A7C4->objId]->unk3C == 0 && func_8019A7E8_ovl18(560.0f) != 0) { + struct UnkStruct800E1B50 *tmp = D_800E1B50[D_8004A7C4->objId]; + + if (tmp->unk3C == 0 && func_8019A7E8_ovl18(560.0f) != 0) { D_800DDC50[D_8004A7C4->objId] = func_8019B260_ovl18(80.0f) == 1 ? 1 : 3; func_800B1EC8(D_800DE510[D_8004A7C4->objId], &func_802228F8_ovl18); } } -#else -GLOBAL_ASM("asm/non_matchings/ovl18/ovl18_3/func_80222BB4_ovl18.s") -#endif void func_80222C84_ovl18(UNUSED s32 arg0) { struct UnkStruct800E1B50 *temp_a1 = D_800E1B50[D_8004A7C4->objId]; diff --git a/src/ovl18/ovl18_5.c b/src/ovl18/ovl18_5.c index bc2d416c..405640a2 100644 --- a/src/ovl18/ovl18_5.c +++ b/src/ovl18/ovl18_5.c @@ -77,32 +77,26 @@ void func_802248D0_ovl18(s32 arg0) { } extern s32 D_8022A4E4; -// regalloc moment -#ifdef MIPS_TO_C -void func_802249D8_ovl18(s32 arg0) { - ? sp28; - s32 temp_v0; - s32 temp_v1; - struct UnkStruct8004A7C4 *temp_v0_2; +void func_80111550_ovl18(s32); +s32 func_80110FD4_ovl18(s32 *); +s32 func_80111C88_ovl18(s32 *, u32); +s32 func_80110B00_ovl18(s32 *); - temp_v0 = D_8004A7C4->objId; - if (*(&D_800E9C60 + (temp_v0 * 4)) == 1) { - func_80111550_ovl18(temp_v0); +void func_802249D8_ovl18(UNUSED s32 arg0) { + s32 sp28[8]; + + if (D_800E9C60[D_8004A7C4->objId] == 1) { + func_80111550_ovl18(D_8004A7C4->objId); func_80111ECC_ovl18(func_80111C88_ovl18(&D_8022A4E4, D_8004A7C4->objId)); if ((func_80110B00_ovl18(&sp28) == 0) && (func_80110FD4_ovl18(&sp28) == 0)) { func_80110150_ovl18(&sp28); } } - temp_v0_2 = D_8004A7C4; - temp_v1 = temp_v0_2->unk0; - if (*(&D_800E9E20 + (temp_v1 * 4)) != 0) { - D_800DDC50[temp_v1] = 0; - func_800B1EC8(D_800DE510[temp_v0_2->unk0], &func_802245E0_ovl18); + if (D_800E9E20[D_8004A7C4->objId] != 0) { + D_800DDC50[D_8004A7C4->objId] = 0; + func_800B1EC8(D_800DE510[D_8004A7C4->objId], &func_802245E0_ovl18); } } -#else -GLOBAL_ASM("asm/non_matchings/ovl18/ovl18_5/func_802249D8_ovl18.s") -#endif void func_80224ABC_ovl18(s32 arg0, s32 arg1, f32 arg2) { if (arg1 == 0) { @@ -186,7 +180,7 @@ void func_80224E50_ovl18(s32 arg0) { } // weird -#ifdef NON_MATCHING +#ifdef NON_MATCHING_ void func_80224FCC_ovl18(s32 arg0) { s32 sp28; @@ -244,6 +238,7 @@ void func_802252A4_ovl18(void) { // regalloc moment #ifdef MIPS_TO_C +s32 random_soft_s32_range(s32); void func_80225304_ovl18(s32 arg0) { D_800DDFD0[D_8004A7C4->objId] = 0; D_800E8920[D_8004A7C4->objId] = 0; @@ -349,14 +344,16 @@ extern s32 D_8022ACB0[]; // const f32 D_8022BC54[] = {0.785398185253f}; +extern f32 D_8022BC54; // TODO: If this function gets matched, then we can incorporate ovl18_5's rodata completely #ifdef MIPS_TO_C +void vec3_get_euler_rotation(Vector *, u32, f32); void func_80225958_ovl18(void) { struct UnkStruct800E1B50 *sp3C = D_800E1B50[D_8004A7C4->objId]; Vector sp2C; s32 temp_a3; s32 temp_v0 = random_soft_s32_range(4); - s32 temp_v0_2; + // s32 temp_v0_2; s32 phi_a3; phi_a3 = temp_v0; @@ -367,8 +364,9 @@ void func_80225958_ovl18(void) { } } D_800E93A0[D_8004A7C4->objId] = phi_a3; - temp_v0_2 = random_soft_s32_range(D_8022ACAC[D_800E93A0[D_8004A7C4->objId] * sizeof(struct Normal)]); - temp_a3 = temp_v0_2 + D_8022ACB0[D_800E93A0[D_8004A7C4->objId] * sizeof(struct Normal)]; + // temp_v0_2 = random_soft_s32_range(D_8022ACAC[D_800E93A0[D_8004A7C4->objId] * sizeof(struct Normal)]); + temp_a3 = random_soft_s32_range(D_8022ACAC[D_800E93A0[D_8004A7C4->objId] * sizeof(struct Normal)]) + + D_8022ACB0[D_800E93A0[D_8004A7C4->objId] * sizeof(struct Normal)]; D_800E9560[D_8004A7C4->objId] = temp_a3; sp2C.z = 0.0f; sp2C.y = 0.0f; diff --git a/src/ovl18/ovl18_7.c b/src/ovl18/ovl18_7.c index d620cd36..13a90b5e 100644 --- a/src/ovl18/ovl18_7.c +++ b/src/ovl18/ovl18_7.c @@ -22,44 +22,32 @@ void func_802266E0_ovl18(s32 arg0, s32 arg1, s32 arg2) { } -struct Vec3u { +struct Vec3i { u32 x; u32 y; u32 z; }; -extern struct Vec3u D_8022AD30[]; +extern struct Vec3i D_8022AD30[]; extern u32 D_800BE4F8; -// there's some meme with u32 to float conversion in here -#ifdef MIPS_TO_C -//generated by mips_to_c commit e0e006e8858ba357d1dcb4dc64f038b7df278aa6 +void func_800B1900_ovl18(u16); + +#ifdef NON_MATCHING void func_8022677C_ovl18(s32 arg0) { - // f32 temp_f16; - // f32 temp_f6; - // s32 temp_a1; - // s32 temp_a2; - // s32 temp_t0; - // s32 temp_t9; - // struct UnkStruct8004A7C4 *temp_v1; - // struct Vec3u temp_v0; - // f32 phi_f6; - // f32 phi_f16; + struct Vec3i *temp_v0; - // temp_v1 = D_8004A7C4; - // D_8004A7C4->objId = D_8004A7C4->objId; - // temp_a2 = D_800E98E0[D_8004A7C4->objId]; if (D_800E98E0[D_8004A7C4->objId] != 0) { - D_800E25D0[D_8004A7C4->objId] = D_8022AD30[D_800E98E0[D_8004A7C4->objId]].y; - - D_800E2790[D_8004A7C4->objId] = D_8022AD30[D_800E98E0[D_8004A7C4->objId]].z; + temp_v0 = &D_8022AD30[D_800E98E0[D_8004A7C4->objId]]; + D_800E25D0[D_8004A7C4->objId] = temp_v0->y; + D_800E2790[D_8004A7C4->objId] = temp_v0->z; if (D_800E98E0[D_8004A7C4->objId] < 0xC) { - func_800AF8C0_ovl18(D_8022AD30[D_800E98E0[D_8004A7C4->objId]].x, 0xA, 6, D_800E98E0); + func_800AF8C0_ovl18(temp_v0->x, 0xA, 6); func_800A5B14_ovl18(arg0, 0x10, 0x1E, 0x63, 0xFF); } else { - func_800AF8C0_ovl18(D_8022AD30[D_800E98E0[D_8004A7C4->objId]].x, 0xA, 4, D_800E98E0); + func_800AF8C0_ovl18(temp_v0->x, 0xA, 4); } func_8000B6BC(D_800E9AA0[D_8004A7C4->objId]); - func_800B1900_ovl18(((u16 *)D_8004A7C4)[1]); + func_800B1900_ovl18((u16) D_8004A7C4->objId); } func_8000B6BC(30.0f * D_800D6B10); func_802266E0_ovl18(0xD, 0xB4, 0); @@ -111,7 +99,7 @@ GLOBAL_ASM("asm/non_matchings/ovl18/ovl18_7/func_80226A18_ovl18.s") #endif extern u32 D_800D6B64; -void func_800B1900_ovl18(u16); + void func_80226AF4_ovl18(s32 arg0) { D_800E25D0[D_8004A7C4->objId] = 139.0f; diff --git a/tools/dataDisasm.py b/tools/dataDisasm.py index eb890d8c..f3701844 100644 --- a/tools/dataDisasm.py +++ b/tools/dataDisasm.py @@ -2,7 +2,7 @@ import sys, os,binascii, struct addr = sys.argv[2] file = open(sys.argv[1],'rb') -specificOvl = "_ovl3" +specificOvl = "" if len(sys.argv) == 4: specificOvl = sys.argv[3] diff --git a/undefined_syms.txt b/undefined_syms.txt index ba6a2055..7ecfc6d0 100644 --- a/undefined_syms.txt +++ b/undefined_syms.txt @@ -646,10 +646,8 @@ func_80020998 = 0x80020998; func_80023300 = 0x80023300; func_80023CB0 = 0x80023CB0; func_80023990 = 0x80023990; -func_80023360 = 0x80023360; func_80023464 = 0x80023464; func_800233F4 = 0x800233F4; -func_80023384 = 0x80023384; func_80023A28 = 0x80023A28; D_80096520 = 0x80096520; func_80020F40 = 0x80020F40;