mirror of
https://github.com/zeldaret/mm.git
synced 2024-11-23 04:49:45 +00:00
Misc Cleanup (#1665)
* prefix in-function static data in z_scene_proc with s prefix in-function static data in z_eff_blure with s prefix in-function static data in Graph_TaskSet00 with s prefix in-function static data in Fault_SetOptions with s * Use uintptr_t in main * hardware_regs.ld * Remove some unessary blob comments * object_link_child_TLUT_00DA80 * object_kz texture and tlut * initialize typos
This commit is contained in:
parent
d0cf4fbcea
commit
43cac34566
@ -12,7 +12,6 @@
|
||||
<DList Name="object_fu_kaiten_DL_002FC0" Offset="0x2FC0" />
|
||||
<Texture Name="object_fu_kaiten_Tex_002FD0" OutName="tex_002FD0" Format="rgba16" Width="32" Height="32" Offset="0x2FD0" />
|
||||
<TextureAnimation Name="object_fu_kaiten_Matanimheader_0037D8" Offset="0x37D8" />
|
||||
<!-- <Blob Name="object_fu_kaiten_Blob_0037E0" Size="0x18" Offset="0x37E0" /> -->
|
||||
<Collision Name="object_fu_kaiten_Colheader_0037F8" Offset="0x37F8" /> <!-- Original name is "z2_bowling_mizu_bgdatainfo" -->
|
||||
</File>
|
||||
</Root>
|
||||
|
@ -35,8 +35,6 @@
|
||||
<Animation Name="gEponaWhinnyAnim" Offset="0x7468" /> <!-- Original name is "hlc_anim_wait02" -->
|
||||
<Animation Name="gEponaWalkAnim" Offset="0x7D50" /> <!-- Original name is "hlc_anim_walk_30" -->
|
||||
|
||||
<!-- <Blob Name="object_horse_link_child_Blob_007D60" Size="0x2388" Offset="0x7D60" /> -->
|
||||
|
||||
<!-- z64Utils will not render because of skin type skeleton -->
|
||||
<Limb Name="object_horse_link_child_Skinlimb_00A0E8" Type="Skin" EnumName="OBJECT_HORSE_LINK_CHILD_LIMB_01" Offset="0xA0E8" />
|
||||
<Limb Name="object_horse_link_child_Skinlimb_00A0F8" Type="Skin" EnumName="OBJECT_HORSE_LINK_CHILD_LIMB_02" Offset="0xA0F8" />
|
||||
|
@ -33,8 +33,8 @@
|
||||
<DList Name="object_kz_DL_008D80" Offset="0x8D80" />
|
||||
<DList Name="object_kz_DL_008E80" Offset="0x8E80" />
|
||||
|
||||
<!-- <Texture Name="object_kz_TLUT_009100" OutName="tlut_009100" Format="rgba16" Width="16" Height="16" Offset="0x9100" /> -->
|
||||
<!-- <Blob Name="object_kz_Blob_009300" Size="0x38" Offset="0x9300" /> -->
|
||||
<Texture Name="object_kz_TLUT_009100" OutName="tlut_009100" Format="rgba16" Width="252" Height="1" Offset="0x9100" />
|
||||
<Texture Name="object_kz_Tex_0092F8" OutName="tex_0092F8" Format="ci8" Width="8" Height="8" Offset="0x92F8" />
|
||||
<Texture Name="object_kz_Tex_009338" OutName="tex_009338" Format="ci8" Width="8" Height="16" Offset="0x9338" />
|
||||
<Texture Name="gKaizokuEyeOpenTex" OutName="kaizoku_eye_open" Format="ci8" Width="32" Height="32" Offset="0x93B8" TlutOffset="0x9100" />
|
||||
<Texture Name="object_kz_Tex_0097B8" OutName="tex_0097B8" Format="i8" Width="16" Height="16" Offset="0x97B8" />
|
||||
|
@ -54,7 +54,7 @@
|
||||
<DList Name="gLinkHumanLeftHandOpenDL" Offset="0xD528" />
|
||||
|
||||
<Texture Name="gLinkHumanOcarinaTex" OutName="ocarina" Format="rgba16" Width="32" Height="16" Offset="0xD680" />
|
||||
<!-- <Blob Name="object_link_child_Blob_00DA80" Size="0x88" Offset="0xDA80" /> -->
|
||||
<Texture Name="object_link_child_TLUT_00DA80" OutName="tlut_00DA80" Format="rgba16" Width="68" Height="1" Offset="0xDA80"/>
|
||||
<Texture Name="object_link_child_Tex_00DB08" OutName="tex_00DB08" Format="ci8" Width="16" Height="16" Offset="0xDB08" />
|
||||
|
||||
<!-- <Blob Name="object_link_child_Blob_00DC08" Size="0x360" Offset="0xDC08" /> -->
|
||||
|
@ -42,7 +42,6 @@
|
||||
<Texture Name="gChildZelda1TLUT_6ED0" OutName="child_zelda_1_tlut_6ED0" Format="rgba16" Width="252" Height="1" Offset="0x6ED0" />
|
||||
<Texture Name="gChildZelda1TLUT_70C8" OutName="child_zelda_1_tlut_70C8" Format="rgba16" Width="160" Height="1" Offset="0x70C8" />
|
||||
<Texture Name="gChildZelda1EyeOpenLookingUpRightTex" OutName="child_zelda_1_eye_open_looking_up_right" Format="ci8" Width="32" Height="32" Offset="0x7208" TlutOffset="0x6CD8" />
|
||||
<!-- <Blob Name="object_zl1_Blob_0072C8" Size="0x740" Offset="0x72C8" /> -->
|
||||
<Texture Name="gChildZelda1MouthNeutralTex" OutName="child_zelda_1_mouth_neutral" Format="ci8" Width="32" Height="32" Offset="0x7608" TlutOffset="0x6ED0" />
|
||||
<Texture Name="gChildZelda1HeaddressGradientTex" OutName="child_zelda_1_headdress_gradient" Format="ci8" Width="8" Height="8" Offset="0x7A08" TlutOffset="0x70C8" />
|
||||
<Texture Name="gChildZelda1SkinGradientTex" OutName="child_zelda_1_skin_gradient" Format="rgba16" Width="8" Height="8" Offset="0x7A48" />
|
||||
|
@ -30,8 +30,6 @@
|
||||
<Texture Name="gTijoMouthClosedTex" OutName="tijo_mouth_closed" Format="rgba16" Width="32" Height="32" Offset="0x7650" />
|
||||
<Texture Name="gTijoMouthOpenTex" OutName="tijo_mouth_open" Format="rgba16" Width="32" Height="32" Offset="0x7E50" />
|
||||
|
||||
<!-- <Blob Name="object_zod_Blob_008650" Size="0x1E10" Offset="0x8650" /> -->
|
||||
|
||||
<!-- Tijo Drums DisplayLists /> -->
|
||||
<DList Name="gTijoDrumFrameDL" Offset="0xA460" />
|
||||
<DList Name="gTijoRideCymbalDL" Offset="0xA550" />
|
||||
|
@ -23,7 +23,7 @@ typedef struct Arena {
|
||||
|
||||
void __osMallocInit(Arena* arena, void* heap, size_t size);
|
||||
void __osMallocCleanup(Arena* arena);
|
||||
u8 __osMallocIsInitalized(Arena* arena);
|
||||
u8 __osMallocIsInitialized(Arena* arena);
|
||||
void* __osMalloc(Arena* arena, size_t size);
|
||||
void* __osMallocR(Arena* arena, size_t size);
|
||||
void __osFree(Arena* arena, void* ptr);
|
||||
|
@ -43,7 +43,7 @@ extern s16 gInvalidAdpcmCodeBook[];
|
||||
extern f32 gHeadsetPanVolume[];
|
||||
extern f32 gStereoPanVolume[];
|
||||
extern f32 gDefaultPanVolume[];
|
||||
extern s32 gAudioCtxInitalized;
|
||||
extern s32 gAudioCtxInitialized;
|
||||
extern STACK(aspMainStack, 0x400);
|
||||
|
||||
extern u8 gAudioSpecId;
|
||||
|
120
linker_scripts/hardware_regs.ld
Normal file
120
linker_scripts/hardware_regs.ld
Normal file
@ -0,0 +1,120 @@
|
||||
// libultra OS symbols
|
||||
|
||||
D_80000000 = 0x80000000; // __osExceptionPreamble
|
||||
D_80000004 = 0x80000004; // __osExceptionPreamble
|
||||
D_80000008 = 0x80000008; // __osExceptionPreamble
|
||||
D_8000000C = 0x8000000C; // __osExceptionPreamble
|
||||
D_80000010 = 0x80000010; //
|
||||
D_80000020 = 0x80000020; //
|
||||
|
||||
osTvType = 0x80000300;
|
||||
osRomType = 0x80000304;
|
||||
osRomBase = 0x80000308;
|
||||
osResetType = 0x8000030C;
|
||||
osCicId = 0x80000310;
|
||||
osVersion = 0x80000314;
|
||||
osMemSize = 0x80000318;
|
||||
osAppNMIBuffer = 0x8000031C;
|
||||
|
||||
/// OS hardware registers
|
||||
|
||||
// Signal Processor Registers
|
||||
|
||||
D_A4040000 = 0xA4040000; // SP_MEM_ADDR_REG
|
||||
D_A4040004 = 0xA4040004; // SP_DRAM_ADDR_REG
|
||||
D_A4040008 = 0xA4040008; // SP_RD_LEN_REG
|
||||
D_A404000C = 0xA404000C; // SP_WR_LEN_REG
|
||||
D_A4040010 = 0xA4040010; // SP_STATUS_REG
|
||||
D_A4040014 = 0xA4040014; // SP_DMA_FULL_REG
|
||||
D_A4040018 = 0xA4040018; // SP_DMA_BUSY_REG
|
||||
D_A404001C = 0xA404001C; // SP_SEMAPHORE_REG
|
||||
|
||||
D_A4080000 = 0xA4080000; // SP PC
|
||||
|
||||
// Display Processor Command Registers / Rasterizer Interface
|
||||
|
||||
D_A4100000 = 0xA4100000; // DPC_START_REG
|
||||
D_A4100004 = 0xA4100004; // DPC_END_REG
|
||||
D_A4100008 = 0xA4100008; // DPC_CURRENT_REG
|
||||
D_A410000C = 0xA410000C; // DPC_STATUS_REG
|
||||
D_A4100010 = 0xA4100010; // DPC_CLOCK_REG
|
||||
D_A4100014 = 0xA4100014; // DPC_BUFBUSY_REG
|
||||
D_A4100018 = 0xA4100018; // DPC_PIPEBUSY_REG
|
||||
D_A410001C = 0xA410001C; // DPC_TMEM_REG
|
||||
|
||||
// Display Processor Span Registers
|
||||
|
||||
D_A4200000 = 0xA4200000; // DPS_TBIST_REG / DP_TMEM_BIST
|
||||
D_A4200004 = 0xA4200004; // DPS_TEST_MODE_REG
|
||||
D_A4200008 = 0xA4200008; // DPS_BUFTEST_ADDR_REG
|
||||
D_A420000C = 0xA420000C; // DPS_BUFTEST_DATA_REG
|
||||
|
||||
// MIPS Interface Registers
|
||||
|
||||
D_A4300000 = 0xA4300000; // MI_MODE_REG / MI_INIT_MODE_REG
|
||||
D_A4300004 = 0xA4300004; // MI_VERSION_REG
|
||||
D_A4300008 = 0xA4300008; // MI_INTR_REG
|
||||
D_A430000C = 0xA430000C; // MI_INTR_MASK_REG
|
||||
|
||||
// Video Interface Registers
|
||||
|
||||
D_A4400000 = 0xA4400000; // VI_STATUS_REG / VI_CONTROL_REG
|
||||
D_A4400004 = 0xA4400004; // VI_DRAM_ADDR_REG / VI_ORIGIN_REG
|
||||
D_A4400008 = 0xA4400008; // VI_WIDTH_REG
|
||||
D_A440000C = 0xA440000C; // VI_INTR_REG
|
||||
D_A4400010 = 0xA4400010; // VI_CURRENT_REG
|
||||
D_A4400014 = 0xA4400014; // VI_BURST_REG / VI_TIMING_REG
|
||||
D_A4400018 = 0xA4400018; // VI_V_SYNC_REG
|
||||
D_A440001C = 0xA440001C; // VI_H_SYNC_REG
|
||||
D_A4400020 = 0xA4400020; // VI_LEAP_REG
|
||||
D_A4400024 = 0xA4400024; // VI_H_START_REG
|
||||
D_A4400028 = 0xA4400028; // VI_V_START_REG
|
||||
D_A440002C = 0xA440002C; // VI_V_BURST_REG
|
||||
D_A4400030 = 0xA4400030; // VI_X_SCALE_REG
|
||||
D_A4400034 = 0xA4400034; // VI_Y_SCALE_REG
|
||||
|
||||
// Audio Interface Registers
|
||||
|
||||
D_A4500000 = 0xA4500000; // AI_DRAM_ADDR_REG
|
||||
D_A4500004 = 0xA4500004; // AI_LEN_REG
|
||||
D_A4500008 = 0xA4500008; // AI_CONTROL_REG
|
||||
D_A450000C = 0xA450000C; // AI_STATUS_REG
|
||||
D_A4500010 = 0xA4500010; // AI_DACRATE_REG
|
||||
D_A4500014 = 0xA4500014; // AI_BITRATE_REG
|
||||
|
||||
// Peripheral/Parallel Interface Registers
|
||||
|
||||
D_A4600000 = 0xA4600000; // PI_DRAM_ADDR_REG
|
||||
D_A4600004 = 0xA4600004; // PI_CART_ADDR_REG
|
||||
D_A4600008 = 0xA4600008; // PI_RD_LEN_REG
|
||||
D_A460000C = 0xA460000C; // PI_WR_LEN_REG
|
||||
D_A4600010 = 0xA4600010; // PI_STATUS_REG
|
||||
D_A4600014 = 0xA4600014; // PI_BSD_DOM1_LAT_REG // PI dom1 latency
|
||||
D_A4600018 = 0xA4600018; // PI_BSD_DOM1_PWD_REG // PI dom1 pulse width
|
||||
D_A460001C = 0xA460001C; // PI_BSD_DOM1_PGS_REG // PI dom1 page size
|
||||
D_A4600020 = 0xA4600020; // PI_BSD_DOM1_RLS_REG // PI dom1 release
|
||||
D_A4600024 = 0xA4600024; // PI_BSD_DOM2_LAT_REG // PI dom2 latency
|
||||
D_A4600028 = 0xA4600028; // PI_BSD_DOM2_LWD_REG // PI dom2 pulse width
|
||||
D_A460002C = 0xA460002C; // PI_BSD_DOM2_PGS_REG // PI dom2 page size
|
||||
D_A4600030 = 0xA4600030; // PI_BSD_DOM2_RLS_REG // PI dom2 release
|
||||
|
||||
// RDRAM Interface Registers
|
||||
|
||||
D_A4700000 = 0xA4700000; // RI_MODE_REG
|
||||
D_A4700004 = 0xA4700004; // RI_CONFIG_REG
|
||||
D_A4700008 = 0xA4700008; // RI_CURRENT_LOAD_REG
|
||||
D_A470000C = 0xA470000C; // RI_SELECT_REG
|
||||
D_A4700010 = 0xA4700010; // RI_REFRESH_REG
|
||||
D_A4700014 = 0xA4700014; // RI_LATENCY_REG
|
||||
D_A4700018 = 0xA4700018; // RI_RERROR_REG
|
||||
D_A470001C = 0xA470001C; // RI_WERROR_REG
|
||||
|
||||
// Serial Interface Registers
|
||||
|
||||
D_A4800000 = 0xA4800000; // SI_DRAM_ADDR_REG
|
||||
D_A4800004 = 0xA4800004; // SI_PIF_ADDR_RD64B_REG
|
||||
D_A4800008 = 0xA4800008; // reserved
|
||||
D_A480000C = 0xA480000C; // reserved
|
||||
D_A4800010 = 0xA4800010; // SI_PIF_ADDR_WR64B_REG
|
||||
D_A4800014 = 0xA4800014; // reserved
|
||||
D_A4800018 = 0xA4800018; // SI_STATUS_REG
|
@ -1,127 +1,3 @@
|
||||
// libultra OS symbols
|
||||
|
||||
D_80000000 = 0x80000000; // __osExceptionPreamble
|
||||
D_80000004 = 0x80000004; // __osExceptionPreamble
|
||||
D_80000008 = 0x80000008; // __osExceptionPreamble
|
||||
D_8000000C = 0x8000000C; // __osExceptionPreamble
|
||||
D_80000010 = 0x80000010; //
|
||||
D_80000020 = 0x80000020; //
|
||||
|
||||
osTvType = 0x80000300;
|
||||
osRomType = 0x80000304;
|
||||
osRomBase = 0x80000308;
|
||||
osResetType = 0x8000030C;
|
||||
osCicId = 0x80000310;
|
||||
osVersion = 0x80000314;
|
||||
osMemSize = 0x80000318;
|
||||
osAppNMIBuffer = 0x8000031C;
|
||||
|
||||
/// OS hardware registers
|
||||
|
||||
// Signal Processor Registers
|
||||
|
||||
D_A4040000 = 0xA4040000; // SP_MEM_ADDR_REG
|
||||
D_A4040004 = 0xA4040004; // SP_DRAM_ADDR_REG
|
||||
D_A4040008 = 0xA4040008; // SP_RD_LEN_REG
|
||||
D_A404000C = 0xA404000C; // SP_WR_LEN_REG
|
||||
D_A4040010 = 0xA4040010; // SP_STATUS_REG
|
||||
D_A4040014 = 0xA4040014; // SP_DMA_FULL_REG
|
||||
D_A4040018 = 0xA4040018; // SP_DMA_BUSY_REG
|
||||
D_A404001C = 0xA404001C; // SP_SEMAPHORE_REG
|
||||
|
||||
D_A4080000 = 0xA4080000; // SP PC
|
||||
|
||||
// Display Processor Command Registers / Rasterizer Interface
|
||||
|
||||
D_A4100000 = 0xA4100000; // DPC_START_REG
|
||||
D_A4100004 = 0xA4100004; // DPC_END_REG
|
||||
D_A4100008 = 0xA4100008; // DPC_CURRENT_REG
|
||||
D_A410000C = 0xA410000C; // DPC_STATUS_REG
|
||||
D_A4100010 = 0xA4100010; // DPC_CLOCK_REG
|
||||
D_A4100014 = 0xA4100014; // DPC_BUFBUSY_REG
|
||||
D_A4100018 = 0xA4100018; // DPC_PIPEBUSY_REG
|
||||
D_A410001C = 0xA410001C; // DPC_TMEM_REG
|
||||
|
||||
// Display Processor Span Registers
|
||||
|
||||
D_A4200000 = 0xA4200000; // DPS_TBIST_REG / DP_TMEM_BIST
|
||||
D_A4200004 = 0xA4200004; // DPS_TEST_MODE_REG
|
||||
D_A4200008 = 0xA4200008; // DPS_BUFTEST_ADDR_REG
|
||||
D_A420000C = 0xA420000C; // DPS_BUFTEST_DATA_REG
|
||||
|
||||
// MIPS Interface Registers
|
||||
|
||||
D_A4300000 = 0xA4300000; // MI_MODE_REG / MI_INIT_MODE_REG
|
||||
D_A4300004 = 0xA4300004; // MI_VERSION_REG
|
||||
D_A4300008 = 0xA4300008; // MI_INTR_REG
|
||||
D_A430000C = 0xA430000C; // MI_INTR_MASK_REG
|
||||
|
||||
// Video Interface Registers
|
||||
|
||||
D_A4400000 = 0xA4400000; // VI_STATUS_REG / VI_CONTROL_REG
|
||||
D_A4400004 = 0xA4400004; // VI_DRAM_ADDR_REG / VI_ORIGIN_REG
|
||||
D_A4400008 = 0xA4400008; // VI_WIDTH_REG
|
||||
D_A440000C = 0xA440000C; // VI_INTR_REG
|
||||
D_A4400010 = 0xA4400010; // VI_CURRENT_REG
|
||||
D_A4400014 = 0xA4400014; // VI_BURST_REG / VI_TIMING_REG
|
||||
D_A4400018 = 0xA4400018; // VI_V_SYNC_REG
|
||||
D_A440001C = 0xA440001C; // VI_H_SYNC_REG
|
||||
D_A4400020 = 0xA4400020; // VI_LEAP_REG
|
||||
D_A4400024 = 0xA4400024; // VI_H_START_REG
|
||||
D_A4400028 = 0xA4400028; // VI_V_START_REG
|
||||
D_A440002C = 0xA440002C; // VI_V_BURST_REG
|
||||
D_A4400030 = 0xA4400030; // VI_X_SCALE_REG
|
||||
D_A4400034 = 0xA4400034; // VI_Y_SCALE_REG
|
||||
|
||||
// Audio Interface Registers
|
||||
|
||||
D_A4500000 = 0xA4500000; // AI_DRAM_ADDR_REG
|
||||
D_A4500004 = 0xA4500004; // AI_LEN_REG
|
||||
D_A4500008 = 0xA4500008; // AI_CONTROL_REG
|
||||
D_A450000C = 0xA450000C; // AI_STATUS_REG
|
||||
D_A4500010 = 0xA4500010; // AI_DACRATE_REG
|
||||
D_A4500014 = 0xA4500014; // AI_BITRATE_REG
|
||||
|
||||
// Peripheral/Parallel Interface Registers
|
||||
|
||||
D_A4600000 = 0xA4600000; // PI_DRAM_ADDR_REG
|
||||
D_A4600004 = 0xA4600004; // PI_CART_ADDR_REG
|
||||
D_A4600005 = 0xA4600005;
|
||||
D_A4600006 = 0xA4600006;
|
||||
D_A4600007 = 0xA4600007;
|
||||
D_A4600008 = 0xA4600008; // PI_RD_LEN_REG
|
||||
D_A460000C = 0xA460000C; // PI_WR_LEN_REG
|
||||
D_A4600010 = 0xA4600010; // PI_STATUS_REG
|
||||
D_A4600014 = 0xA4600014; // PI_BSD_DOM1_LAT_REG // PI dom1 latency
|
||||
D_A4600018 = 0xA4600018; // PI_BSD_DOM1_PWD_REG // PI dom1 pulse width
|
||||
D_A460001C = 0xA460001C; // PI_BSD_DOM1_PGS_REG // PI dom1 page size
|
||||
D_A4600020 = 0xA4600020; // PI_BSD_DOM1_RLS_REG // PI dom1 release
|
||||
D_A4600024 = 0xA4600024; // PI_BSD_DOM2_LAT_REG // PI dom2 latency
|
||||
D_A4600028 = 0xA4600028; // PI_BSD_DOM2_LWD_REG // PI dom2 pulse width
|
||||
D_A460002C = 0xA460002C; // PI_BSD_DOM2_PGS_REG // PI dom2 page size
|
||||
D_A4600030 = 0xA4600030; // PI_BSD_DOM2_RLS_REG // PI dom2 release
|
||||
|
||||
// RDRAM Interface Registers
|
||||
|
||||
D_A4700000 = 0xA4700000; // RI_MODE_REG
|
||||
D_A4700004 = 0xA4700004; // RI_CONFIG_REG
|
||||
D_A4700008 = 0xA4700008; // RI_CURRENT_LOAD_REG
|
||||
D_A470000C = 0xA470000C; // RI_SELECT_REG
|
||||
D_A4700010 = 0xA4700010; // RI_REFRESH_REG
|
||||
D_A4700014 = 0xA4700014; // RI_LATENCY_REG
|
||||
D_A4700018 = 0xA4700018; // RI_RERROR_REG
|
||||
D_A470001C = 0xA470001C; // RI_WERROR_REG
|
||||
|
||||
// Serial Interface Registers
|
||||
|
||||
D_A4800000 = 0xA4800000; // SI_DRAM_ADDR_REG
|
||||
D_A4800004 = 0xA4800004; // SI_PIF_ADDR_RD64B_REG
|
||||
D_A4800008 = 0xA4800008; // reserved
|
||||
D_A480000C = 0xA480000C; // reserved
|
||||
D_A4800010 = 0xA4800010; // SI_PIF_ADDR_WR64B_REG
|
||||
D_A4800014 = 0xA4800014; // reserved
|
||||
D_A4800018 = 0xA4800018; // SI_STATUS_REG
|
||||
|
||||
// sys_cfb buffers
|
||||
|
||||
gFramebufferHiRes1 = gLoBuffer;
|
||||
|
@ -1071,7 +1071,7 @@ void AudioHeap_Init(void) {
|
||||
AudioHeap_InitSampleCaches(spec->persistentSampleCacheSize, spec->temporarySampleCacheSize);
|
||||
AudioLoad_InitSampleDmaBuffers(gAudioCtx.numNotes);
|
||||
|
||||
// Initalize Loads
|
||||
// Initialize Loads
|
||||
gAudioCtx.preloadSampleStackTop = 0;
|
||||
AudioLoad_InitSlowLoads();
|
||||
AudioLoad_InitScriptLoads();
|
||||
|
@ -94,7 +94,7 @@ s32 D_801FD1E0;
|
||||
|
||||
DmaHandler sDmaHandler = osEPiStartDma;
|
||||
void* sUnusedHandler = NULL;
|
||||
s32 gAudioCtxInitalized = false;
|
||||
s32 gAudioCtxInitialized = false;
|
||||
|
||||
void AudioLoad_DecreaseSampleDmaTtls(void) {
|
||||
u32 i;
|
||||
@ -1330,7 +1330,7 @@ void AudioLoad_Init(void* heap, size_t heapSize) {
|
||||
}
|
||||
|
||||
AudioHeap_InitPool(&gAudioCtx.permanentPool, addr, gAudioHeapInitSizes.permanentPoolSize);
|
||||
gAudioCtxInitalized = true;
|
||||
gAudioCtxInitialized = true;
|
||||
osSendMesg(gAudioCtx.taskStartQueueP, (void*)gAudioCtx.totalTaskCount, OS_MESG_NOBLOCK);
|
||||
}
|
||||
|
||||
|
@ -581,7 +581,7 @@ s32 AudioThread_ResetAudioHeap(s32 specId) {
|
||||
|
||||
void AudioThread_PreNMIInternal(void) {
|
||||
gAudioCtx.resetTimer = 1;
|
||||
if (gAudioCtxInitalized) {
|
||||
if (gAudioCtxInitialized) {
|
||||
AudioThread_ResetAudioHeap(0);
|
||||
gAudioCtx.resetStatus = 0;
|
||||
}
|
||||
|
@ -924,7 +924,7 @@ void Fault_ProcessClients(void) {
|
||||
}
|
||||
|
||||
void Fault_SetOptions(void) {
|
||||
static u32 faultCustomOptions;
|
||||
static u32 sFaultCustomOptions;
|
||||
Input* input3 = &sFaultInstance->inputs[3];
|
||||
s32 pad;
|
||||
uintptr_t pc;
|
||||
@ -932,18 +932,18 @@ void Fault_SetOptions(void) {
|
||||
uintptr_t sp;
|
||||
|
||||
if (CHECK_BTN_ALL(input3->press.button, BTN_RESET)) {
|
||||
faultCustomOptions = !faultCustomOptions;
|
||||
sFaultCustomOptions = !sFaultCustomOptions;
|
||||
}
|
||||
|
||||
if (faultCustomOptions) {
|
||||
if (sFaultCustomOptions) {
|
||||
pc = gGraphThread.context.pc;
|
||||
ra = gGraphThread.context.ra;
|
||||
sp = gGraphThread.context.sp;
|
||||
if (CHECK_BTN_ALL(input3->cur.button, BTN_R)) {
|
||||
static u32 faultCopyToLog;
|
||||
static u32 sFaultCopyToLog;
|
||||
|
||||
faultCopyToLog = !faultCopyToLog;
|
||||
FaultDrawer_SetOsSyncPrintfEnabled(faultCopyToLog);
|
||||
sFaultCopyToLog = !sFaultCopyToLog;
|
||||
FaultDrawer_SetOsSyncPrintfEnabled(sFaultCopyToLog);
|
||||
}
|
||||
if (CHECK_BTN_ALL(input3->cur.button, BTN_A)) {
|
||||
osSyncPrintf("GRAPH PC=%08x RA=%08x STACK=%08x\n", pc, ra, sp);
|
||||
|
@ -123,7 +123,7 @@ void __osMallocCleanup(Arena* arena) {
|
||||
* @param arena The Arena to check.
|
||||
* @return u8 `true` if the \p arena has been initialized. `false` otherwise.
|
||||
*/
|
||||
u8 __osMallocIsInitalized(Arena* arena) {
|
||||
u8 __osMallocIsInitialized(Arena* arena) {
|
||||
return arena->isInit;
|
||||
}
|
||||
|
||||
|
@ -46,5 +46,5 @@ void MallocCleanup(void) {
|
||||
}
|
||||
|
||||
s32 MallocIsInitialized(void) {
|
||||
return __osMallocIsInitalized(&malloc_arena);
|
||||
return __osMallocIsInitialized(&malloc_arena);
|
||||
}
|
||||
|
@ -138,8 +138,8 @@ void Graph_Destroy(GraphicsContext* gfxCtx) {
|
||||
* If it does not signal completion in that time, retry or trigger a crash.
|
||||
*/
|
||||
void Graph_TaskSet00(GraphicsContext* gfxCtx, GameState* gameState) {
|
||||
static s32 retryCount = 10;
|
||||
static s32 cfbIdx = 0;
|
||||
static s32 sRetryCount = 10;
|
||||
static s32 sCfbIndex = 0;
|
||||
OSTask_t* task = &gfxCtx->task.list.t;
|
||||
OSScTask* scTask = &gfxCtx->task;
|
||||
OSTimer timer;
|
||||
@ -153,8 +153,8 @@ retry:
|
||||
|
||||
if (msg == (OSMesg)666) {
|
||||
osSyncPrintf("GRAPH SP TIMEOUT\n");
|
||||
if (retryCount >= 0) {
|
||||
retryCount--;
|
||||
if (sRetryCount >= 0) {
|
||||
sRetryCount--;
|
||||
Sched_SendGfxCancelMsg(&gScheduler);
|
||||
goto retry;
|
||||
} else {
|
||||
@ -200,8 +200,8 @@ retry:
|
||||
|
||||
{ s32 pad; }
|
||||
|
||||
cfb = &sGraphCfbInfos[cfbIdx];
|
||||
cfbIdx = (cfbIdx + 1) % ARRAY_COUNT(sGraphCfbInfos);
|
||||
cfb = &sGraphCfbInfos[sCfbIndex];
|
||||
sCfbIndex = (sCfbIndex + 1) % ARRAY_COUNT(sGraphCfbInfos);
|
||||
|
||||
cfb->framebuffer = gfxCtx->curFrameBuffer;
|
||||
cfb->swapBuffer = gfxCtx->curFrameBuffer;
|
||||
|
@ -42,8 +42,8 @@ s32 gScreenHeight = SCREEN_HEIGHT;
|
||||
size_t gSystemHeapSize = 0;
|
||||
|
||||
void Main(void* arg) {
|
||||
intptr_t fb;
|
||||
intptr_t sysHeap;
|
||||
uintptr_t fb;
|
||||
uintptr_t sysHeap;
|
||||
s32 exit;
|
||||
s16* msg;
|
||||
|
||||
@ -55,7 +55,7 @@ void Main(void* arg) {
|
||||
Check_RegionIsSupported();
|
||||
Check_ExpansionPak();
|
||||
|
||||
sysHeap = (intptr_t)SEGMENT_START(system_heap);
|
||||
sysHeap = (uintptr_t)SEGMENT_START(system_heap);
|
||||
fb = FRAMEBUFFERS_START_ADDR;
|
||||
gSystemHeapSize = fb - sysHeap;
|
||||
SystemHeap_Init((void*)sysHeap, gSystemHeapSize);
|
||||
|
@ -390,7 +390,7 @@ void EffectBlure_SetupSmooth(EffectBlure* this, GraphicsContext* gfxCtx) {
|
||||
|
||||
void EffectBlure_DrawElemNoInterpolation(EffectBlure* this, EffectBlureElement* elem, s32 index,
|
||||
GraphicsContext* gfxCtx) {
|
||||
static Vtx_t baseVtx = VTX_T(0, 0, 0, 0, 0, 255, 255, 255, 255);
|
||||
static Vtx_t sBaseVtx = VTX_T(0, 0, 0, 0, 0, 255, 255, 255, 255);
|
||||
Vtx* vtx;
|
||||
Vec3s sp8C;
|
||||
Vec3s sp84;
|
||||
@ -408,10 +408,10 @@ void EffectBlure_DrawElemNoInterpolation(EffectBlure* this, EffectBlureElement*
|
||||
vtx = GRAPH_ALLOC(gfxCtx, 4 * sizeof(Vtx));
|
||||
if (vtx == NULL) {
|
||||
} else {
|
||||
vtx[0].v = baseVtx;
|
||||
vtx[1].v = baseVtx;
|
||||
vtx[2].v = baseVtx;
|
||||
vtx[3].v = baseVtx;
|
||||
vtx[0].v = sBaseVtx;
|
||||
vtx[1].v = sBaseVtx;
|
||||
vtx[2].v = sBaseVtx;
|
||||
vtx[3].v = sBaseVtx;
|
||||
|
||||
ratio = (f32)elem->timer / (f32)this->elemDuration;
|
||||
EffectBlure_GetComputedValues(this, index, ratio, &sp8C, &sp84, &sp7C, &sp78);
|
||||
@ -480,7 +480,7 @@ void EffectBlure_DrawElemNoInterpolation(EffectBlure* this, EffectBlureElement*
|
||||
|
||||
void EffectBlure_DrawElemHermiteInterpolation(EffectBlure* this, EffectBlureElement* elem, s32 index,
|
||||
GraphicsContext* gfxCtx) {
|
||||
static Vtx_t baseVtx = VTX_T(0, 0, 0, 0, 0, 255, 255, 255, 255);
|
||||
static Vtx_t sBaseVtx = VTX_T(0, 0, 0, 0, 0, 255, 255, 255, 255);
|
||||
Vtx* vtx;
|
||||
Vec3s sp1EC;
|
||||
Vec3s sp1E4;
|
||||
@ -568,8 +568,8 @@ void EffectBlure_DrawElemHermiteInterpolation(EffectBlure* this, EffectBlureElem
|
||||
Color_RGBA8_Copy(&sp148, &sp1A4);
|
||||
Color_RGBA8_Copy(&sp144, &sp1A0);
|
||||
|
||||
vtx[0].v = baseVtx;
|
||||
vtx[1].v = baseVtx;
|
||||
vtx[0].v = sBaseVtx;
|
||||
vtx[1].v = sBaseVtx;
|
||||
|
||||
vtx[0].v.ob[0] = Math_FNearbyIntF(sp158.x);
|
||||
vtx[0].v.ob[1] = Math_FNearbyIntF(sp158.y);
|
||||
@ -613,8 +613,8 @@ void EffectBlure_DrawElemHermiteInterpolation(EffectBlure* this, EffectBlureElem
|
||||
Math_Vec3f_Diff(&spE0, &sp138, &sp14C);
|
||||
Math_Vec3f_Scale(&sp14C, 10.0f);
|
||||
|
||||
vtx[j1].v = baseVtx;
|
||||
vtx[j2].v = baseVtx;
|
||||
vtx[j1].v = sBaseVtx;
|
||||
vtx[j2].v = sBaseVtx;
|
||||
|
||||
vtx[j1].v.ob[0] = Math_FNearbyIntF(sp158.x);
|
||||
vtx[j1].v.ob[1] = Math_FNearbyIntF(sp158.y);
|
||||
|
@ -54,5 +54,5 @@ void ZeldaArena_Cleanup(void) {
|
||||
}
|
||||
|
||||
u8 ZeldaArena_IsInitialized(void) {
|
||||
return __osMallocIsInitalized(&sZeldaArena);
|
||||
return __osMallocIsInitialized(&sZeldaArena);
|
||||
}
|
||||
|
@ -23,7 +23,7 @@ static Gfx sSceneDrawDefaultDL[] = {
|
||||
* Executes the current scene draw config handler.
|
||||
*/
|
||||
void Scene_Draw(PlayState* play) {
|
||||
static void (*sceneDrawConfigHandlers[])(PlayState*) = {
|
||||
static void (*sSceneDrawConfigHandlers[])(PlayState*) = {
|
||||
Scene_DrawConfigDefault,
|
||||
Scene_DrawConfigMatAnim,
|
||||
Scene_DrawConfigDoNothing,
|
||||
@ -34,7 +34,7 @@ void Scene_Draw(PlayState* play) {
|
||||
Scene_DrawConfigMatAnimManualStep,
|
||||
};
|
||||
|
||||
sceneDrawConfigHandlers[play->sceneConfig](play);
|
||||
sSceneDrawConfigHandlers[play->sceneConfig](play);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -386,7 +386,7 @@ void AnimatedMat_DrawTexCycle(PlayState* play, s32 segment, void* params) {
|
||||
* There are six different animated material types, which should be set in the provided `AnimatedMaterial`.
|
||||
*/
|
||||
void AnimatedMat_DrawMain(PlayState* play, AnimatedMaterial* matAnim, f32 alphaRatio, u32 step, u32 flags) {
|
||||
static void (*matAnimDrawHandlers[])(PlayState*, s32 segment, void* params) = {
|
||||
static void (*sMatAnimDrawHandlers[])(PlayState*, s32 segment, void* params) = {
|
||||
AnimatedMat_DrawTexScroll, AnimatedMat_DrawTwoTexScroll, AnimatedMat_DrawColor,
|
||||
AnimatedMat_DrawColorLerp, AnimatedMat_DrawColorNonLinearInterp, AnimatedMat_DrawTexCycle,
|
||||
};
|
||||
@ -401,7 +401,7 @@ void AnimatedMat_DrawMain(PlayState* play, AnimatedMaterial* matAnim, f32 alphaR
|
||||
do {
|
||||
segment = matAnim->segment;
|
||||
segmentAbs = ABS_ALT(segment) + 7;
|
||||
matAnimDrawHandlers[matAnim->type](play, segmentAbs, Lib_SegmentedToVirtual(matAnim->params));
|
||||
sMatAnimDrawHandlers[matAnim->type](play, segmentAbs, Lib_SegmentedToVirtual(matAnim->params));
|
||||
matAnim++;
|
||||
} while (segment >= 0);
|
||||
}
|
||||
@ -573,14 +573,14 @@ void Scene_DrawConfigDoNothing(PlayState* play) {
|
||||
* Stores a displaylist in the provided segment ID that sets a render mode from the index provided.
|
||||
*/
|
||||
void Scene_SetRenderModeXlu(PlayState* play, s32 index, u32 flags) {
|
||||
static Gfx renderModeSetNoneDL[] = {
|
||||
static Gfx sRenderModeSetNoneDL[] = {
|
||||
gsSPEndDisplayList(),
|
||||
// These instructions will never get executed
|
||||
gsSPEndDisplayList(),
|
||||
gsSPEndDisplayList(),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
static Gfx renderModeSetXluSingleCycleDL[] = {
|
||||
static Gfx sRenderModeSetXluSingleCycleDL[] = {
|
||||
gsDPSetRenderMode(AA_EN | Z_CMP | IM_RD | CLR_ON_CVG | CVG_DST_WRAP | ZMODE_XLU | FORCE_BL |
|
||||
GBL_c1(G_BL_CLR_IN, G_BL_0, G_BL_CLR_IN, G_BL_1),
|
||||
G_RM_AA_ZB_XLU_SURF2),
|
||||
@ -591,7 +591,7 @@ void Scene_SetRenderModeXlu(PlayState* play, s32 index, u32 flags) {
|
||||
G_RM_AA_ZB_XLU_SURF2),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
static Gfx renderModeSetXluTwoCycleDL[] = {
|
||||
static Gfx sRenderModeSetXluTwoCycleDL[] = {
|
||||
gsDPSetRenderMode(AA_EN | Z_CMP | Z_UPD | IM_RD | CLR_ON_CVG | CVG_DST_WRAP | ZMODE_XLU | FORCE_BL |
|
||||
GBL_c1(G_BL_CLR_IN, G_BL_0, G_BL_CLR_IN, G_BL_1),
|
||||
AA_EN | Z_CMP | Z_UPD | IM_RD | CLR_ON_CVG | CVG_DST_WRAP | ZMODE_XLU | FORCE_BL |
|
||||
@ -604,12 +604,12 @@ void Scene_SetRenderModeXlu(PlayState* play, s32 index, u32 flags) {
|
||||
GBL_c2(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
static Gfx* dLists[] = {
|
||||
renderModeSetNoneDL,
|
||||
renderModeSetXluSingleCycleDL,
|
||||
renderModeSetXluTwoCycleDL,
|
||||
static Gfx* sDLists[] = {
|
||||
sRenderModeSetNoneDL,
|
||||
sRenderModeSetXluSingleCycleDL,
|
||||
sRenderModeSetXluTwoCycleDL,
|
||||
};
|
||||
Gfx* dList = dLists[index];
|
||||
Gfx* dList = sDLists[index];
|
||||
|
||||
OPEN_DISPS(play->state.gfxCtx);
|
||||
|
||||
@ -629,19 +629,19 @@ void Scene_SetRenderModeXlu(PlayState* play, s32 index, u32 flags) {
|
||||
* from the index provided.
|
||||
*/
|
||||
void Scene_SetCullFlag(PlayState* play, s32 index, u32 flags) {
|
||||
static Gfx setBackCullDL[] = {
|
||||
static Gfx sSetBackCullDL[] = {
|
||||
gsSPSetGeometryMode(G_CULL_BACK),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
static Gfx setFrontCullDL[] = {
|
||||
static Gfx sSetFrontCullDL[] = {
|
||||
gsSPSetGeometryMode(G_CULL_FRONT),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
static Gfx* dLists[] = {
|
||||
setBackCullDL,
|
||||
setFrontCullDL,
|
||||
static Gfx* sDLists[] = {
|
||||
sSetBackCullDL,
|
||||
sSetFrontCullDL,
|
||||
};
|
||||
Gfx* dList = dLists[index];
|
||||
Gfx* dList = sDLists[index];
|
||||
|
||||
OPEN_DISPS(play->state.gfxCtx);
|
||||
|
||||
@ -703,7 +703,7 @@ void Scene_DrawConfigMatAnimManualStep(PlayState* play) {
|
||||
* activated.
|
||||
*/
|
||||
void Scene_DrawConfigGreatBayTemple(PlayState* play) {
|
||||
static Gfx greatBayTempleColorSetDL[] = {
|
||||
static Gfx sGreatBayTempleColorSetDL[] = {
|
||||
gsDPSetPrimColor(0, 255, 255, 255, 255, 255),
|
||||
gsSPEndDisplayList(),
|
||||
};
|
||||
@ -728,7 +728,7 @@ void Scene_DrawConfigGreatBayTemple(PlayState* play) {
|
||||
for (gfx = gfxHead, i = 0; i < 9; i++, gfx += 2) {
|
||||
lodFrac = 0;
|
||||
|
||||
bcopy(greatBayTempleColorSetDL, gfx, sizeof(greatBayTempleColorSetDL));
|
||||
bcopy(sGreatBayTempleColorSetDL, gfx, sizeof(sGreatBayTempleColorSetDL));
|
||||
|
||||
switch (i) {
|
||||
case 0:
|
||||
|
@ -142,7 +142,7 @@ static TrackOptionsSet sTrackOptions = {
|
||||
};
|
||||
|
||||
s32 EnBaba_FindBombShopkeeper(EnBaba* this, PlayState* play) {
|
||||
//! The bomb shopkeeper is an EnSob1, but initalizes itself with id `ACTOR_EN_OSSAN`
|
||||
//! The bomb shopkeeper is an EnSob1, but initializes itself with id `ACTOR_EN_OSSAN`
|
||||
//! Note if there are other `EnOssan` actors, it may find that instance instead
|
||||
//! in which case `EnSob1` struct acceses would be incorrect
|
||||
this->bombShopkeeper = (EnSob1*)SubS_FindActor(play, &this->bombShopkeeper->actor, ACTORCAT_NPC, ACTOR_EN_OSSAN);
|
||||
|
@ -1842,12 +1842,12 @@ void EnBigslime_SetupFreeze(EnBigslime* this) {
|
||||
targetVtx->n.a = 0;
|
||||
}
|
||||
|
||||
// Initalizes frozen effect alpha near bottom of sphere by increasing levels of alpha
|
||||
// Initializes frozen effect alpha near bottom of sphere by increasing levels of alpha
|
||||
for (i = 0; i < 20; i++) {
|
||||
sBigslimeTargetVtx[i + 138].n.a = 10 * i;
|
||||
}
|
||||
|
||||
// Initalizes/seeds frozen effect alpha in bottom 4 nodes in vtx sphere to highest level of alpha
|
||||
// Initializes/seeds frozen effect alpha in bottom 4 nodes in vtx sphere to highest level of alpha
|
||||
for (i = 0; i < 4; i++) {
|
||||
sBigslimeTargetVtx[i + 158].n.a = 200;
|
||||
}
|
||||
|
@ -224,7 +224,7 @@
|
||||
0x8008720C:("__osMallocInit",),
|
||||
0x8008725C:("__osMallocAddHeap",),
|
||||
0x800872FC:("__osMallocCleanup",),
|
||||
0x8008731C:("__osMallocIsInitalized",),
|
||||
0x8008731C:("__osMallocIsInitialized",),
|
||||
0x80087324:("__osMalloc",),
|
||||
0x80087408:("__osMallocR",),
|
||||
0x800874EC:("__osFree",),
|
||||
|
@ -314,8 +314,8 @@
|
||||
0x8009BE38:("sRomInfoFaultClient","FaultClient","",0x10),
|
||||
0x8009BE50:("sFaultInstance","FaultMgr*","",0x4),
|
||||
0x8009BE54:("sFaultTimeTotal","f32","",0x4),
|
||||
0x8009BE58:("faultCustomOptions","u32","",0x4),
|
||||
0x8009BE5C:("faultCopyToLog","u32","",0x4),
|
||||
0x8009BE58:("sFaultCustomOptions","u32","",0x4),
|
||||
0x8009BE5C:("sFaultCopyToLog","u32","",0x4),
|
||||
0x8009BE60:("sFaultStack","u8","[1536]",0x600),
|
||||
0x8009C460:("sFaultStackInfo","StackEntry","",0x1C),
|
||||
0x8009C480:("gFaultMgr","FaultMgr","",0x848),
|
||||
@ -2148,7 +2148,7 @@
|
||||
0x801D5FD4:("D_801D5FD4","UNK_TYPE1","",0x1),
|
||||
0x801D5FE0:("D_801D5FE0","UNK_PTR","",0x4),
|
||||
0x801D5FE4:("D_801D5FE4","UNK_TYPE1","",0x1),
|
||||
0x801D5FE8:("gAudioCtxInitalized","UNK_TYPE4","",0x4),
|
||||
0x801D5FE8:("gAudioCtxInitialized","UNK_TYPE4","",0x4),
|
||||
0x801D5FEC:("D_801D5FEC","UNK_TYPE4","",0x4),
|
||||
0x801D5FF0:("sWaitingAudioTask","UNK_TYPE4","",0x4),
|
||||
0x801D5FF4:("sMaxWriteReadDiff","UNK_TYPE4","",0x4),
|
||||
|
@ -221,7 +221,7 @@ asm/non_matchings/boot/__osMalloc/ArenaImpl_GetLastBlock.s,ArenaImpl_GetLastBloc
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocInit.s,__osMallocInit,0x8008720C,0x14
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocAddHeap.s,__osMallocAddHeap,0x8008725C,0x28
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocCleanup.s,__osMallocCleanup,0x800872FC,0x8
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocIsInitalized.s,__osMallocIsInitalized,0x8008731C,0x2
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocIsInitialized.s,__osMallocIsInitialized,0x8008731C,0x2
|
||||
asm/non_matchings/boot/__osMalloc/__osMalloc.s,__osMalloc,0x80087324,0x39
|
||||
asm/non_matchings/boot/__osMalloc/__osMallocR.s,__osMallocR,0x80087408,0x39
|
||||
asm/non_matchings/boot/__osMalloc/__osFree.s,__osFree,0x800874EC,0x3E
|
||||
|
|
Loading…
Reference in New Issue
Block a user