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roeming 2023-11-24 22:39:08 -05:00
parent af7ea10303
commit 511dfef232
6 changed files with 439 additions and 858 deletions
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39
include/Dolphin/GX/GXEnum.h
View File

@ -1131,6 +1131,45 @@ typedef enum _GXMiscToken {
GX_MT_ABORT_WAIT_COPYOUT = 3,
} GXMiscToken;
typedef enum _GXDirtyFlag {
GX_DIRTY_SU_TEX = (1 << 0),
GX_DIRTY_BP_MASK = (1 << 1),
GX_DIRTY_GEN_MODE = (1 << 2),
GX_DIRTY_VCD = (1 << 3),
GX_DIRTY_VAT = (1 << 4),
// . . .
GX_DIRTY_AMB_COLOR0 = (1 << 8),
GX_DIRTY_AMB_COLOR1 = (1 << 9),
GX_DIRTY_MAT_COLOR0 = (1 << 10),
GX_DIRTY_MAT_COLOR1 = (1 << 11),
GX_DIRTY_CHAN_COLOR0 = (1 << 12),
GX_DIRTY_CHAN_COLOR1 = (1 << 13),
GX_DIRTY_CHAN_ALPHA0 = (1 << 14),
GX_DIRTY_CHAN_ALPHA1 = (1 << 15),
GX_DIRTY_TEX0 = (1 << 16),
GX_DIRTY_TEX1 = (1 << 17),
GX_DIRTY_TEX2 = (1 << 18),
GX_DIRTY_TEX3 = (1 << 19),
GX_DIRTY_TEX4 = (1 << 20),
GX_DIRTY_TEX5 = (1 << 21),
GX_DIRTY_TEX6 = (1 << 22),
GX_DIRTY_TEX7 = (1 << 23),
GX_DIRTY_NUM_COLORS = (1 << 24),
GX_DIRTY_NUM_TEX = (1 << 25),
GX_DIRTY_MTX_IDX = (1 << 26),
GX_DIRTY_PROJECTION = (1 << 27),
GX_DIRTY_VIEWPORT = (1 << 28),
GX_AMB_MAT_MASK = GX_DIRTY_AMB_COLOR0 | GX_DIRTY_AMB_COLOR1 |
GX_DIRTY_MAT_COLOR0 | GX_DIRTY_MAT_COLOR1,
GX_LIGHT_CHAN_MASK = GX_DIRTY_CHAN_COLOR0 | GX_DIRTY_CHAN_COLOR1 |
GX_DIRTY_CHAN_ALPHA0 | GX_DIRTY_CHAN_ALPHA1 |
GX_DIRTY_NUM_COLORS,
GX_TEX_GEN_MASK = 0x2FF0000,
} GXDirtyFlag;
////////////////////////////////////////////
#ifdef __cplusplus

134
include/Dolphin/GX/GXHardwareCP.h
View File

@ -38,35 +38,35 @@ typedef enum {
#define GX_CP_MATRIXINDEXA_GEOM_SZ 6
#define GX_CP_MATRIXINDEXA_GEOM_MASK (((1 << 6) - 1) << 31 - 31)
#define GX_CP_GET_MATRIXINDEXA_GEOM(reg) GX_BITGET(reg, 26, 6)
#define GX_CP_SET_MATRIXINDEXA_GEOM(reg, x) ((reg) = GX_BITSET(reg, 26, 6, x))
#define GX_CP_SET_MATRIXINDEXA_GEOM(reg, x) (GX_BITFIELD_SET(reg, 26, 6, x))
// TEX0 [20:25] (6)
#define GX_CP_MATRIXINDEXA_TEX0_ST 20
#define GX_CP_MATRIXINDEXA_TEX0_END 25
#define GX_CP_MATRIXINDEXA_TEX0_SZ 6
#define GX_CP_MATRIXINDEXA_TEX0_MASK (((1 << 6) - 1) << 31 - 25)
#define GX_CP_GET_MATRIXINDEXA_TEX0(reg) GX_BITGET(reg, 20, 6)
#define GX_CP_SET_MATRIXINDEXA_TEX0(reg, x) ((reg) = GX_BITSET(reg, 20, 6, x))
#define GX_CP_SET_MATRIXINDEXA_TEX0(reg, x) (GX_BITFIELD_SET(reg, 20, 6, x))
// TEX1 [14:19] (6)
#define GX_CP_MATRIXINDEXA_TEX1_ST 14
#define GX_CP_MATRIXINDEXA_TEX1_END 19
#define GX_CP_MATRIXINDEXA_TEX1_SZ 6
#define GX_CP_MATRIXINDEXA_TEX1_MASK (((1 << 6) - 1) << 31 - 19)
#define GX_CP_GET_MATRIXINDEXA_TEX1(reg) GX_BITGET(reg, 14, 6)
#define GX_CP_SET_MATRIXINDEXA_TEX1(reg, x) ((reg) = GX_BITSET(reg, 14, 6, x))
#define GX_CP_SET_MATRIXINDEXA_TEX1(reg, x) (GX_BITFIELD_SET(reg, 14, 6, x))
// TEX2 [8:13] (6)
#define GX_CP_MATRIXINDEXA_TEX2_ST 8
#define GX_CP_MATRIXINDEXA_TEX2_END 13
#define GX_CP_MATRIXINDEXA_TEX2_SZ 6
#define GX_CP_MATRIXINDEXA_TEX2_MASK (((1 << 6) - 1) << 31 - 13)
#define GX_CP_GET_MATRIXINDEXA_TEX2(reg) GX_BITGET(reg, 8, 6)
#define GX_CP_SET_MATRIXINDEXA_TEX2(reg, x) ((reg) = GX_BITSET(reg, 8, 6, x))
#define GX_CP_SET_MATRIXINDEXA_TEX2(reg, x) (GX_BITFIELD_SET(reg, 8, 6, x))
// TEX3 [2:7] (6)
#define GX_CP_MATRIXINDEXA_TEX3_ST 2
#define GX_CP_MATRIXINDEXA_TEX3_END 7
#define GX_CP_MATRIXINDEXA_TEX3_SZ 6
#define GX_CP_MATRIXINDEXA_TEX3_MASK (((1 << 6) - 1) << 31 - 7)
#define GX_CP_GET_MATRIXINDEXA_TEX3(reg) GX_BITGET(reg, 2, 6)
#define GX_CP_SET_MATRIXINDEXA_TEX3(reg, x) ((reg) = GX_BITSET(reg, 2, 6, x))
#define GX_CP_SET_MATRIXINDEXA_TEX3(reg, x) (GX_BITFIELD_SET(reg, 2, 6, x))
/**
* CP register 0x40 - MatrixIndexB
@ -77,28 +77,28 @@ typedef enum {
#define GX_CP_MATRIXINDEXB_TEX4_SZ 6
#define GX_CP_MATRIXINDEXB_TEX4_MASK (((1 << 6) - 1) << 31 - 31)
#define GX_CP_GET_MATRIXINDEXB_TEX4(reg) GX_BITGET(reg, 26, 6)
#define GX_CP_SET_MATRIXINDEXB_TEX4(reg, x) ((reg) = GX_BITSET(reg, 26, 6, x))
#define GX_CP_SET_MATRIXINDEXB_TEX4(reg, x) (GX_BITFIELD_SET(reg, 26, 6, x))
// TEX5 [20:25] (6)
#define GX_CP_MATRIXINDEXB_TEX5_ST 20
#define GX_CP_MATRIXINDEXB_TEX5_END 25
#define GX_CP_MATRIXINDEXB_TEX5_SZ 6
#define GX_CP_MATRIXINDEXB_TEX5_MASK (((1 << 6) - 1) << 31 - 25)
#define GX_CP_GET_MATRIXINDEXB_TEX5(reg) GX_BITGET(reg, 20, 6)
#define GX_CP_SET_MATRIXINDEXB_TEX5(reg, x) ((reg) = GX_BITSET(reg, 20, 6, x))
#define GX_CP_SET_MATRIXINDEXB_TEX5(reg, x) (GX_BITFIELD_SET(reg, 20, 6, x))
// TEX6 [14:19] (6)
#define GX_CP_MATRIXINDEXB_TEX6_ST 14
#define GX_CP_MATRIXINDEXB_TEX6_END 19
#define GX_CP_MATRIXINDEXB_TEX6_SZ 6
#define GX_CP_MATRIXINDEXB_TEX6_MASK (((1 << 6) - 1) << 31 - 19)
#define GX_CP_GET_MATRIXINDEXB_TEX6(reg) GX_BITGET(reg, 14, 6)
#define GX_CP_SET_MATRIXINDEXB_TEX6(reg, x) ((reg) = GX_BITSET(reg, 14, 6, x))
#define GX_CP_SET_MATRIXINDEXB_TEX6(reg, x) (GX_BITFIELD_SET(reg, 14, 6, x))
// TEX7 [8:13] (6)
#define GX_CP_MATRIXINDEXB_TEX7_ST 8
#define GX_CP_MATRIXINDEXB_TEX7_END 13
#define GX_CP_MATRIXINDEXB_TEX7_SZ 6
#define GX_CP_MATRIXINDEXB_TEX7_MASK (((1 << 6) - 1) << 31 - 13)
#define GX_CP_GET_MATRIXINDEXB_TEX7(reg) GX_BITGET(reg, 8, 6)
#define GX_CP_SET_MATRIXINDEXB_TEX7(reg, x) ((reg) = GX_BITSET(reg, 8, 6, x))
#define GX_CP_SET_MATRIXINDEXB_TEX7(reg, x) (GX_BITFIELD_SET(reg, 8, 6, x))
/**
* CP register 0x50 - VCD_Lo
@ -109,91 +109,91 @@ typedef enum {
#define GX_CP_VCD_LO_POSMATIDX_SZ 1
#define GX_CP_VCD_LO_POSMATIDX_MASK (((1 << 1) - 1) << 31 - 31)
#define GX_CP_GET_VCD_LO_POSMATIDX(reg) GX_BITGET(reg, 31, 1)
#define GX_CP_SET_VCD_LO_POSMATIDX(reg, x) ((reg) = GX_BITSET(reg, 31, 1, x))
#define GX_CP_SET_VCD_LO_POSMATIDX(reg, x) (GX_BITFIELD_SET(reg, 31, 1, x))
// TEX0MATIDX [30:30] (1)
#define GX_CP_VCD_LO_TEX0MATIDX_ST 30
#define GX_CP_VCD_LO_TEX0MATIDX_END 30
#define GX_CP_VCD_LO_TEX0MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX0MATIDX_MASK (((1 << 1) - 1) << 31 - 30)
#define GX_CP_GET_VCD_LO_TEX0MATIDX(reg) GX_BITGET(reg, 30, 1)
#define GX_CP_SET_VCD_LO_TEX0MATIDX(reg, x) ((reg) = GX_BITSET(reg, 30, 1, x))
#define GX_CP_SET_VCD_LO_TEX0MATIDX(reg, x) (GX_BITFIELD_SET(reg, 30, 1, x))
// TEX1MATIDX [29:29] (1)
#define GX_CP_VCD_LO_TEX1MATIDX_ST 29
#define GX_CP_VCD_LO_TEX1MATIDX_END 29
#define GX_CP_VCD_LO_TEX1MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX1MATIDX_MASK (((1 << 1) - 1) << 31 - 29)
#define GX_CP_GET_VCD_LO_TEX1MATIDX(reg) GX_BITGET(reg, 29, 1)
#define GX_CP_SET_VCD_LO_TEX1MATIDX(reg, x) ((reg) = GX_BITSET(reg, 29, 1, x))
#define GX_CP_SET_VCD_LO_TEX1MATIDX(reg, x) (GX_BITFIELD_SET(reg, 29, 1, x))
// TEX2MATIDX [28:28] (1)
#define GX_CP_VCD_LO_TEX2MATIDX_ST 28
#define GX_CP_VCD_LO_TEX2MATIDX_END 28
#define GX_CP_VCD_LO_TEX2MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX2MATIDX_MASK (((1 << 1) - 1) << 31 - 28)
#define GX_CP_GET_VCD_LO_TEX2MATIDX(reg) GX_BITGET(reg, 28, 1)
#define GX_CP_SET_VCD_LO_TEX2MATIDX(reg, x) ((reg) = GX_BITSET(reg, 28, 1, x))
#define GX_CP_SET_VCD_LO_TEX2MATIDX(reg, x) (GX_BITFIELD_SET(reg, 28, 1, x))
// TEX3MATIDX [27:27] (1)
#define GX_CP_VCD_LO_TEX3MATIDX_ST 27
#define GX_CP_VCD_LO_TEX3MATIDX_END 27
#define GX_CP_VCD_LO_TEX3MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX3MATIDX_MASK (((1 << 1) - 1) << 31 - 27)
#define GX_CP_GET_VCD_LO_TEX3MATIDX(reg) GX_BITGET(reg, 27, 1)
#define GX_CP_SET_VCD_LO_TEX3MATIDX(reg, x) ((reg) = GX_BITSET(reg, 27, 1, x))
#define GX_CP_SET_VCD_LO_TEX3MATIDX(reg, x) (GX_BITFIELD_SET(reg, 27, 1, x))
// TEX4MATIDX [26:26] (1)
#define GX_CP_VCD_LO_TEX4MATIDX_ST 26
#define GX_CP_VCD_LO_TEX4MATIDX_END 26
#define GX_CP_VCD_LO_TEX4MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX4MATIDX_MASK (((1 << 1) - 1) << 31 - 26)
#define GX_CP_GET_VCD_LO_TEX4MATIDX(reg) GX_BITGET(reg, 26, 1)
#define GX_CP_SET_VCD_LO_TEX4MATIDX(reg, x) ((reg) = GX_BITSET(reg, 26, 1, x))
#define GX_CP_SET_VCD_LO_TEX4MATIDX(reg, x) (GX_BITFIELD_SET(reg, 26, 1, x))
// TEX5MATIDX [25:25] (1)
#define GX_CP_VCD_LO_TEX5MATIDX_ST 25
#define GX_CP_VCD_LO_TEX5MATIDX_END 25
#define GX_CP_VCD_LO_TEX5MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX5MATIDX_MASK (((1 << 1) - 1) << 31 - 25)
#define GX_CP_GET_VCD_LO_TEX5MATIDX(reg) GX_BITGET(reg, 25, 1)
#define GX_CP_SET_VCD_LO_TEX5MATIDX(reg, x) ((reg) = GX_BITSET(reg, 25, 1, x))
#define GX_CP_SET_VCD_LO_TEX5MATIDX(reg, x) (GX_BITFIELD_SET(reg, 25, 1, x))
// TEX6MATIDX [24:24] (1)
#define GX_CP_VCD_LO_TEX6MATIDX_ST 24
#define GX_CP_VCD_LO_TEX6MATIDX_END 24
#define GX_CP_VCD_LO_TEX6MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX6MATIDX_MASK (((1 << 1) - 1) << 31 - 24)
#define GX_CP_GET_VCD_LO_TEX6MATIDX(reg) GX_BITGET(reg, 24, 1)
#define GX_CP_SET_VCD_LO_TEX6MATIDX(reg, x) ((reg) = GX_BITSET(reg, 24, 1, x))
#define GX_CP_SET_VCD_LO_TEX6MATIDX(reg, x) (GX_BITFIELD_SET(reg, 24, 1, x))
// TEX7MATIDX [23:23] (1)
#define GX_CP_VCD_LO_TEX7MATIDX_ST 23
#define GX_CP_VCD_LO_TEX7MATIDX_END 23
#define GX_CP_VCD_LO_TEX7MATIDX_SZ 1
#define GX_CP_VCD_LO_TEX7MATIDX_MASK (((1 << 1) - 1) << 31 - 23)
#define GX_CP_GET_VCD_LO_TEX7MATIDX(reg) GX_BITGET(reg, 23, 1)
#define GX_CP_SET_VCD_LO_TEX7MATIDX(reg, x) ((reg) = GX_BITSET(reg, 23, 1, x))
#define GX_CP_SET_VCD_LO_TEX7MATIDX(reg, x) (GX_BITFIELD_SET(reg, 23, 1, x))
// POSITION [21:22] (2)
#define GX_CP_VCD_LO_POSITION_ST 21
#define GX_CP_VCD_LO_POSITION_END 22
#define GX_CP_VCD_LO_POSITION_SZ 2
#define GX_CP_VCD_LO_POSITION_MASK (((1 << 2) - 1) << 31 - 22)
#define GX_CP_GET_VCD_LO_POSITION(reg) GX_BITGET(reg, 21, 2)
#define GX_CP_SET_VCD_LO_POSITION(reg, x) ((reg) = GX_BITSET(reg, 21, 2, x))
#define GX_CP_SET_VCD_LO_POSITION(reg, x) (GX_BITFIELD_SET(reg, 21, 2, x))
// NORMAL [19:20] (2)
#define GX_CP_VCD_LO_NORMAL_ST 19
#define GX_CP_VCD_LO_NORMAL_END 20
#define GX_CP_VCD_LO_NORMAL_SZ 2
#define GX_CP_VCD_LO_NORMAL_MASK (((1 << 2) - 1) << 31 - 20)
#define GX_CP_GET_VCD_LO_NORMAL(reg) GX_BITGET(reg, 19, 2)
#define GX_CP_SET_VCD_LO_NORMAL(reg, x) ((reg) = GX_BITSET(reg, 19, 2, x))
#define GX_CP_SET_VCD_LO_NORMAL(reg, x) (GX_BITFIELD_SET(reg, 19, 2, x))
// COLORDIFFUSED [17:18] (2)
#define GX_CP_VCD_LO_COLORDIFFUSED_ST 17
#define GX_CP_VCD_LO_COLORDIFFUSED_END 18
#define GX_CP_VCD_LO_COLORDIFFUSED_SZ 2
#define GX_CP_VCD_LO_COLORDIFFUSED_MASK (((1 << 2) - 1) << 31 - 18)
#define GX_CP_GET_VCD_LO_COLORDIFFUSED(reg) GX_BITGET(reg, 17, 2)
#define GX_CP_SET_VCD_LO_COLORDIFFUSED(reg, x) ((reg) = GX_BITSET(reg, 17, 2, x))
#define GX_CP_SET_VCD_LO_COLORDIFFUSED(reg, x) (GX_BITFIELD_SET(reg, 17, 2, x))
// COLORSPECULAR [15:16] (2)
#define GX_CP_VCD_LO_COLORSPECULAR_ST 15
#define GX_CP_VCD_LO_COLORSPECULAR_END 16
#define GX_CP_VCD_LO_COLORSPECULAR_SZ 2
#define GX_CP_VCD_LO_COLORSPECULAR_MASK (((1 << 2) - 1) << 31 - 16)
#define GX_CP_GET_VCD_LO_COLORSPECULAR(reg) GX_BITGET(reg, 15, 2)
#define GX_CP_SET_VCD_LO_COLORSPECULAR(reg, x) ((reg) = GX_BITSET(reg, 15, 2, x))
#define GX_CP_SET_VCD_LO_COLORSPECULAR(reg, x) (GX_BITFIELD_SET(reg, 15, 2, x))
/**
* CP register 0x60 - VCD_Hi
@ -204,56 +204,56 @@ typedef enum {
#define GX_CP_VCD_HI_TEX0COORD_SZ 2
#define GX_CP_VCD_HI_TEX0COORD_MASK (((1 << 2) - 1) << 31 - 31)
#define GX_CP_GET_VCD_HI_TEX0COORD(reg) GX_BITGET(reg, 30, 2)
#define GX_CP_SET_VCD_HI_TEX0COORD(reg, x) ((reg) = GX_BITSET(reg, 30, 2, x))
#define GX_CP_SET_VCD_HI_TEX0COORD(reg, x) (GX_BITFIELD_SET(reg, 30, 2, x))
// TEX1COORD [28:29] (2)
#define GX_CP_VCD_HI_TEX1COORD_ST 28
#define GX_CP_VCD_HI_TEX1COORD_END 29
#define GX_CP_VCD_HI_TEX1COORD_SZ 2
#define GX_CP_VCD_HI_TEX1COORD_MASK (((1 << 2) - 1) << 31 - 29)
#define GX_CP_GET_VCD_HI_TEX1COORD(reg) GX_BITGET(reg, 28, 2)
#define GX_CP_SET_VCD_HI_TEX1COORD(reg, x) ((reg) = GX_BITSET(reg, 28, 2, x))
#define GX_CP_SET_VCD_HI_TEX1COORD(reg, x) (GX_BITFIELD_SET(reg, 28, 2, x))
// TEX2COORD [26:27] (2)
#define GX_CP_VCD_HI_TEX2COORD_ST 26
#define GX_CP_VCD_HI_TEX2COORD_END 27
#define GX_CP_VCD_HI_TEX2COORD_SZ 2
#define GX_CP_VCD_HI_TEX2COORD_MASK (((1 << 2) - 1) << 31 - 27)
#define GX_CP_GET_VCD_HI_TEX2COORD(reg) GX_BITGET(reg, 26, 2)
#define GX_CP_SET_VCD_HI_TEX2COORD(reg, x) ((reg) = GX_BITSET(reg, 26, 2, x))
#define GX_CP_SET_VCD_HI_TEX2COORD(reg, x) (GX_BITFIELD_SET(reg, 26, 2, x))
// TEX3COORD [24:25] (2)
#define GX_CP_VCD_HI_TEX3COORD_ST 24
#define GX_CP_VCD_HI_TEX3COORD_END 25
#define GX_CP_VCD_HI_TEX3COORD_SZ 2
#define GX_CP_VCD_HI_TEX3COORD_MASK (((1 << 2) - 1) << 31 - 25)
#define GX_CP_GET_VCD_HI_TEX3COORD(reg) GX_BITGET(reg, 24, 2)
#define GX_CP_SET_VCD_HI_TEX3COORD(reg, x) ((reg) = GX_BITSET(reg, 24, 2, x))
#define GX_CP_SET_VCD_HI_TEX3COORD(reg, x) (GX_BITFIELD_SET(reg, 24, 2, x))
// TEX4COORD [22:23] (2)
#define GX_CP_VCD_HI_TEX4COORD_ST 22
#define GX_CP_VCD_HI_TEX4COORD_END 23
#define GX_CP_VCD_HI_TEX4COORD_SZ 2
#define GX_CP_VCD_HI_TEX4COORD_MASK (((1 << 2) - 1) << 31 - 23)
#define GX_CP_GET_VCD_HI_TEX4COORD(reg) GX_BITGET(reg, 22, 2)
#define GX_CP_SET_VCD_HI_TEX4COORD(reg, x) ((reg) = GX_BITSET(reg, 22, 2, x))
#define GX_CP_SET_VCD_HI_TEX4COORD(reg, x) (GX_BITFIELD_SET(reg, 22, 2, x))
// TEX5COORD [20:21] (2)
#define GX_CP_VCD_HI_TEX5COORD_ST 20
#define GX_CP_VCD_HI_TEX5COORD_END 21
#define GX_CP_VCD_HI_TEX5COORD_SZ 2
#define GX_CP_VCD_HI_TEX5COORD_MASK (((1 << 2) - 1) << 31 - 21)
#define GX_CP_GET_VCD_HI_TEX5COORD(reg) GX_BITGET(reg, 20, 2)
#define GX_CP_SET_VCD_HI_TEX5COORD(reg, x) ((reg) = GX_BITSET(reg, 20, 2, x))
#define GX_CP_SET_VCD_HI_TEX5COORD(reg, x) (GX_BITFIELD_SET(reg, 20, 2, x))
// TEX6COORD [18:19] (2)
#define GX_CP_VCD_HI_TEX6COORD_ST 18
#define GX_CP_VCD_HI_TEX6COORD_END 19
#define GX_CP_VCD_HI_TEX6COORD_SZ 2
#define GX_CP_VCD_HI_TEX6COORD_MASK (((1 << 2) - 1) << 31 - 19)
#define GX_CP_GET_VCD_HI_TEX6COORD(reg) GX_BITGET(reg, 18, 2)
#define GX_CP_SET_VCD_HI_TEX6COORD(reg, x) ((reg) = GX_BITSET(reg, 18, 2, x))
#define GX_CP_SET_VCD_HI_TEX6COORD(reg, x) (GX_BITFIELD_SET(reg, 18, 2, x))
// TEX7COORD [16:17] (2)
#define GX_CP_VCD_HI_TEX7COORD_ST 16
#define GX_CP_VCD_HI_TEX7COORD_END 17
#define GX_CP_VCD_HI_TEX7COORD_SZ 2
#define GX_CP_VCD_HI_TEX7COORD_MASK (((1 << 2) - 1) << 31 - 17)
#define GX_CP_GET_VCD_HI_TEX7COORD(reg) GX_BITGET(reg, 16, 2)
#define GX_CP_SET_VCD_HI_TEX7COORD(reg, x) ((reg) = GX_BITSET(reg, 16, 2, x))
#define GX_CP_SET_VCD_HI_TEX7COORD(reg, x) (GX_BITFIELD_SET(reg, 16, 2, x))
/**
* CP register 0x70 - VAT_group0
@ -264,98 +264,98 @@ typedef enum {
#define GX_CP_VAT_GROUP0_POS_CNT_SZ 1
#define GX_CP_VAT_GROUP0_POS_CNT_MASK (((1 << 1) - 1) << 31 - 31)
#define GX_CP_GET_VAT_GROUP0_POS_CNT(reg) GX_BITGET(reg, 31, 1)
#define GX_CP_SET_VAT_GROUP0_POS_CNT(reg, x) ((reg) = GX_BITSET(reg, 31, 1, x))
#define GX_CP_SET_VAT_GROUP0_POS_CNT(reg, x) (GX_BITFIELD_SET(reg, 31, 1, x))
// POS_TYPE [28:30] (3)
#define GX_CP_VAT_GROUP0_POS_TYPE_ST 28
#define GX_CP_VAT_GROUP0_POS_TYPE_END 30
#define GX_CP_VAT_GROUP0_POS_TYPE_SZ 3
#define GX_CP_VAT_GROUP0_POS_TYPE_MASK (((1 << 3) - 1) << 31 - 30)
#define GX_CP_GET_VAT_GROUP0_POS_TYPE(reg) GX_BITGET(reg, 28, 3)
#define GX_CP_SET_VAT_GROUP0_POS_TYPE(reg, x) ((reg) = GX_BITSET(reg, 28, 3, x))
#define GX_CP_SET_VAT_GROUP0_POS_TYPE(reg, x) (GX_BITFIELD_SET(reg, 28, 3, x))
// POS_SHIFT [23:27] (5)
#define GX_CP_VAT_GROUP0_POS_SHIFT_ST 23
#define GX_CP_VAT_GROUP0_POS_SHIFT_END 27
#define GX_CP_VAT_GROUP0_POS_SHIFT_SZ 5
#define GX_CP_VAT_GROUP0_POS_SHIFT_MASK (((1 << 5) - 1) << 31 - 27)
#define GX_CP_GET_VAT_GROUP0_POS_SHIFT(reg) GX_BITGET(reg, 23, 5)
#define GX_CP_SET_VAT_GROUP0_POS_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 23, 5, x))
#define GX_CP_SET_VAT_GROUP0_POS_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 23, 5, x))
// NRM_CNT [22:22] (1)
#define GX_CP_VAT_GROUP0_NRM_CNT_ST 22
#define GX_CP_VAT_GROUP0_NRM_CNT_END 22
#define GX_CP_VAT_GROUP0_NRM_CNT_SZ 1
#define GX_CP_VAT_GROUP0_NRM_CNT_MASK (((1 << 1) - 1) << 31 - 22)
#define GX_CP_GET_VAT_GROUP0_NRM_CNT(reg) GX_BITGET(reg, 22, 1)
#define GX_CP_SET_VAT_GROUP0_NRM_CNT(reg, x) ((reg) = GX_BITSET(reg, 22, 1, x))
#define GX_CP_SET_VAT_GROUP0_NRM_CNT(reg, x) (GX_BITFIELD_SET(reg, 22, 1, x))
// NRM_TYPE [19:21] (3)
#define GX_CP_VAT_GROUP0_NRM_TYPE_ST 19
#define GX_CP_VAT_GROUP0_NRM_TYPE_END 21
#define GX_CP_VAT_GROUP0_NRM_TYPE_SZ 3
#define GX_CP_VAT_GROUP0_NRM_TYPE_MASK (((1 << 3) - 1) << 31 - 21)
#define GX_CP_GET_VAT_GROUP0_NRM_TYPE(reg) GX_BITGET(reg, 19, 3)
#define GX_CP_SET_VAT_GROUP0_NRM_TYPE(reg, x) ((reg) = GX_BITSET(reg, 19, 3, x))
#define GX_CP_SET_VAT_GROUP0_NRM_TYPE(reg, x) (GX_BITFIELD_SET(reg, 19, 3, x))
// COLORDIFF_CNT [18:18] (1)
#define GX_CP_VAT_GROUP0_COLORDIFF_CNT_ST 18
#define GX_CP_VAT_GROUP0_COLORDIFF_CNT_END 18
#define GX_CP_VAT_GROUP0_COLORDIFF_CNT_SZ 1
#define GX_CP_VAT_GROUP0_COLORDIFF_CNT_MASK (((1 << 1) - 1) << 31 - 18)
#define GX_CP_GET_VAT_GROUP0_COLORDIFF_CNT(reg) GX_BITGET(reg, 18, 1)
#define GX_CP_SET_VAT_GROUP0_COLORDIFF_CNT(reg, x) ((reg) = GX_BITSET(reg, 18, 1, x))
#define GX_CP_SET_VAT_GROUP0_COLORDIFF_CNT(reg, x) (GX_BITFIELD_SET(reg, 18, 1, x))
// COLORDIFF_TYPE [15:17] (3)
#define GX_CP_VAT_GROUP0_COLORDIFF_TYPE_ST 15
#define GX_CP_VAT_GROUP0_COLORDIFF_TYPE_END 17
#define GX_CP_VAT_GROUP0_COLORDIFF_TYPE_SZ 3
#define GX_CP_VAT_GROUP0_COLORDIFF_TYPE_MASK (((1 << 3) - 1) << 31 - 17)
#define GX_CP_GET_VAT_GROUP0_COLORDIFF_TYPE(reg) GX_BITGET(reg, 15, 3)
#define GX_CP_SET_VAT_GROUP0_COLORDIFF_TYPE(reg, x) ((reg) = GX_BITSET(reg, 15, 3, x))
#define GX_CP_SET_VAT_GROUP0_COLORDIFF_TYPE(reg, x) (GX_BITFIELD_SET(reg, 15, 3, x))
// COLORSPEC_CNT [14:14] (1)
#define GX_CP_VAT_GROUP0_COLORSPEC_CNT_ST 14
#define GX_CP_VAT_GROUP0_COLORSPEC_CNT_END 14
#define GX_CP_VAT_GROUP0_COLORSPEC_CNT_SZ 1
#define GX_CP_VAT_GROUP0_COLORSPEC_CNT_MASK (((1 << 1) - 1) << 31 - 14)
#define GX_CP_GET_VAT_GROUP0_COLORSPEC_CNT(reg) GX_BITGET(reg, 14, 1)
#define GX_CP_SET_VAT_GROUP0_COLORSPEC_CNT(reg, x) ((reg) = GX_BITSET(reg, 14, 1, x))
#define GX_CP_SET_VAT_GROUP0_COLORSPEC_CNT(reg, x) (GX_BITFIELD_SET(reg, 14, 1, x))
// COLORSPEC_TYPE [11:13] (3)
#define GX_CP_VAT_GROUP0_COLORSPEC_TYPE_ST 11
#define GX_CP_VAT_GROUP0_COLORSPEC_TYPE_END 13
#define GX_CP_VAT_GROUP0_COLORSPEC_TYPE_SZ 3
#define GX_CP_VAT_GROUP0_COLORSPEC_TYPE_MASK (((1 << 3) - 1) << 31 - 13)
#define GX_CP_GET_VAT_GROUP0_COLORSPEC_TYPE(reg) GX_BITGET(reg, 11, 3)
#define GX_CP_SET_VAT_GROUP0_COLORSPEC_TYPE(reg, x) ((reg) = GX_BITSET(reg, 11, 3, x))
#define GX_CP_SET_VAT_GROUP0_COLORSPEC_TYPE(reg, x) (GX_BITFIELD_SET(reg, 11, 3, x))
// TXC0_CNT [10:10] (1)
#define GX_CP_VAT_GROUP0_TXC0_CNT_ST 10
#define GX_CP_VAT_GROUP0_TXC0_CNT_END 10
#define GX_CP_VAT_GROUP0_TXC0_CNT_SZ 1
#define GX_CP_VAT_GROUP0_TXC0_CNT_MASK (((1 << 1) - 1) << 31 - 10)
#define GX_CP_GET_VAT_GROUP0_TXC0_CNT(reg) GX_BITGET(reg, 10, 1)
#define GX_CP_SET_VAT_GROUP0_TXC0_CNT(reg, x) ((reg) = GX_BITSET(reg, 10, 1, x))
#define GX_CP_SET_VAT_GROUP0_TXC0_CNT(reg, x) (GX_BITFIELD_SET(reg, 10, 1, x))
// TXC0_TYPE [7:9] (3)
#define GX_CP_VAT_GROUP0_TXC0_TYPE_ST 7
#define GX_CP_VAT_GROUP0_TXC0_TYPE_END 9
#define GX_CP_VAT_GROUP0_TXC0_TYPE_SZ 3
#define GX_CP_VAT_GROUP0_TXC0_TYPE_MASK (((1 << 3) - 1) << 31 - 9)
#define GX_CP_GET_VAT_GROUP0_TXC0_TYPE(reg) GX_BITGET(reg, 7, 3)
#define GX_CP_SET_VAT_GROUP0_TXC0_TYPE(reg, x) ((reg) = GX_BITSET(reg, 7, 3, x))
#define GX_CP_SET_VAT_GROUP0_TXC0_TYPE(reg, x) (GX_BITFIELD_SET(reg, 7, 3, x))
// TXC0_SHIFT [2:6] (5)
#define GX_CP_VAT_GROUP0_TXC0_SHIFT_ST 2
#define GX_CP_VAT_GROUP0_TXC0_SHIFT_END 6
#define GX_CP_VAT_GROUP0_TXC0_SHIFT_SZ 5
#define GX_CP_VAT_GROUP0_TXC0_SHIFT_MASK (((1 << 5) - 1) << 31 - 6)
#define GX_CP_GET_VAT_GROUP0_TXC0_SHIFT(reg) GX_BITGET(reg, 2, 5)
#define GX_CP_SET_VAT_GROUP0_TXC0_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 2, 5, x))
#define GX_CP_SET_VAT_GROUP0_TXC0_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 2, 5, x))
// BYTEDEQUANT [1:1] (1)
#define GX_CP_VAT_GROUP0_BYTEDEQUANT_ST 1
#define GX_CP_VAT_GROUP0_BYTEDEQUANT_END 1
#define GX_CP_VAT_GROUP0_BYTEDEQUANT_SZ 1
#define GX_CP_VAT_GROUP0_BYTEDEQUANT_MASK (((1 << 1) - 1) << 31 - 1)
#define GX_CP_GET_VAT_GROUP0_BYTEDEQUANT(reg) GX_BITGET(reg, 1, 1)
#define GX_CP_SET_VAT_GROUP0_BYTEDEQUANT(reg, x) ((reg) = GX_BITSET(reg, 1, 1, x))
#define GX_CP_SET_VAT_GROUP0_BYTEDEQUANT(reg, x) (GX_BITFIELD_SET(reg, 1, 1, x))
// NORMALINDEX3 [0:0] (1) - Input will be treated as three staggered indices (one per triple biased by component size) into normal table
#define GX_CP_VAT_GROUP0_NORMALINDEX3_ST 0
#define GX_CP_VAT_GROUP0_NORMALINDEX3_END 0
#define GX_CP_VAT_GROUP0_NORMALINDEX3_SZ 1
#define GX_CP_VAT_GROUP0_NORMALINDEX3_MASK (((1 << 1) - 1) << 31 - 0)
#define GX_CP_GET_VAT_GROUP0_NORMALINDEX3(reg) GX_BITGET(reg, 0, 1)
#define GX_CP_SET_VAT_GROUP0_NORMALINDEX3(reg, x) ((reg) = GX_BITSET(reg, 0, 1, x))
#define GX_CP_SET_VAT_GROUP0_NORMALINDEX3(reg, x) (GX_BITFIELD_SET(reg, 0, 1, x))
/**
* CP register 0x80 - VAT_group1
@ -366,77 +366,77 @@ typedef enum {
#define GX_CP_VAT_GROUP1_TXC1_CNT_SZ 1
#define GX_CP_VAT_GROUP1_TXC1_CNT_MASK (((1 << 1) - 1) << 31 - 31)
#define GX_CP_GET_VAT_GROUP1_TXC1_CNT(reg) GX_BITGET(reg, 31, 1)
#define GX_CP_SET_VAT_GROUP1_TXC1_CNT(reg, x) ((reg) = GX_BITSET(reg, 31, 1, x))
#define GX_CP_SET_VAT_GROUP1_TXC1_CNT(reg, x) (GX_BITFIELD_SET(reg, 31, 1, x))
// TXC1_TYPE [28:30] (3)
#define GX_CP_VAT_GROUP1_TXC1_TYPE_ST 28
#define GX_CP_VAT_GROUP1_TXC1_TYPE_END 30
#define GX_CP_VAT_GROUP1_TXC1_TYPE_SZ 3
#define GX_CP_VAT_GROUP1_TXC1_TYPE_MASK (((1 << 3) - 1) << 31 - 30)
#define GX_CP_GET_VAT_GROUP1_TXC1_TYPE(reg) GX_BITGET(reg, 28, 3)
#define GX_CP_SET_VAT_GROUP1_TXC1_TYPE(reg, x) ((reg) = GX_BITSET(reg, 28, 3, x))
#define GX_CP_SET_VAT_GROUP1_TXC1_TYPE(reg, x) (GX_BITFIELD_SET(reg, 28, 3, x))
// TXC1_SHIFT [23:27] (5)
#define GX_CP_VAT_GROUP1_TXC1_SHIFT_ST 23
#define GX_CP_VAT_GROUP1_TXC1_SHIFT_END 27
#define GX_CP_VAT_GROUP1_TXC1_SHIFT_SZ 5
#define GX_CP_VAT_GROUP1_TXC1_SHIFT_MASK (((1 << 5) - 1) << 31 - 27)
#define GX_CP_GET_VAT_GROUP1_TXC1_SHIFT(reg) GX_BITGET(reg, 23, 5)
#define GX_CP_SET_VAT_GROUP1_TXC1_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 23, 5, x))
#define GX_CP_SET_VAT_GROUP1_TXC1_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 23, 5, x))
// TXC2_CNT [22:22] (1)
#define GX_CP_VAT_GROUP1_TXC2_CNT_ST 22
#define GX_CP_VAT_GROUP1_TXC2_CNT_END 22
#define GX_CP_VAT_GROUP1_TXC2_CNT_SZ 1
#define GX_CP_VAT_GROUP1_TXC2_CNT_MASK (((1 << 1) - 1) << 31 - 22)
#define GX_CP_GET_VAT_GROUP1_TXC2_CNT(reg) GX_BITGET(reg, 22, 1)
#define GX_CP_SET_VAT_GROUP1_TXC2_CNT(reg, x) ((reg) = GX_BITSET(reg, 22, 1, x))
#define GX_CP_SET_VAT_GROUP1_TXC2_CNT(reg, x) (GX_BITFIELD_SET(reg, 22, 1, x))
// TXC2_TYPE [19:21] (3)
#define GX_CP_VAT_GROUP1_TXC2_TYPE_ST 19
#define GX_CP_VAT_GROUP1_TXC2_TYPE_END 21
#define GX_CP_VAT_GROUP1_TXC2_TYPE_SZ 3
#define GX_CP_VAT_GROUP1_TXC2_TYPE_MASK (((1 << 3) - 1) << 31 - 21)
#define GX_CP_GET_VAT_GROUP1_TXC2_TYPE(reg) GX_BITGET(reg, 19, 3)
#define GX_CP_SET_VAT_GROUP1_TXC2_TYPE(reg, x) ((reg) = GX_BITSET(reg, 19, 3, x))
#define GX_CP_SET_VAT_GROUP1_TXC2_TYPE(reg, x) (GX_BITFIELD_SET(reg, 19, 3, x))
// TXC2_SHIFT [14:18] (5)
#define GX_CP_VAT_GROUP1_TXC2_SHIFT_ST 14
#define GX_CP_VAT_GROUP1_TXC2_SHIFT_END 18
#define GX_CP_VAT_GROUP1_TXC2_SHIFT_SZ 5
#define GX_CP_VAT_GROUP1_TXC2_SHIFT_MASK (((1 << 5) - 1) << 31 - 18)
#define GX_CP_GET_VAT_GROUP1_TXC2_SHIFT(reg) GX_BITGET(reg, 14, 5)
#define GX_CP_SET_VAT_GROUP1_TXC2_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 14, 5, x))
#define GX_CP_SET_VAT_GROUP1_TXC2_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 14, 5, x))
// TXC3_CNT [13:13] (1)
#define GX_CP_VAT_GROUP1_TXC3_CNT_ST 13
#define GX_CP_VAT_GROUP1_TXC3_CNT_END 13
#define GX_CP_VAT_GROUP1_TXC3_CNT_SZ 1
#define GX_CP_VAT_GROUP1_TXC3_CNT_MASK (((1 << 1) - 1) << 31 - 13)
#define GX_CP_GET_VAT_GROUP1_TXC3_CNT(reg) GX_BITGET(reg, 13, 1)
#define GX_CP_SET_VAT_GROUP1_TXC3_CNT(reg, x) ((reg) = GX_BITSET(reg, 13, 1, x))
#define GX_CP_SET_VAT_GROUP1_TXC3_CNT(reg, x) (GX_BITFIELD_SET(reg, 13, 1, x))
// TXC3_TYPE [10:12] (3)
#define GX_CP_VAT_GROUP1_TXC3_TYPE_ST 10
#define GX_CP_VAT_GROUP1_TXC3_TYPE_END 12
#define GX_CP_VAT_GROUP1_TXC3_TYPE_SZ 3
#define GX_CP_VAT_GROUP1_TXC3_TYPE_MASK (((1 << 3) - 1) << 31 - 12)
#define GX_CP_GET_VAT_GROUP1_TXC3_TYPE(reg) GX_BITGET(reg, 10, 3)
#define GX_CP_SET_VAT_GROUP1_TXC3_TYPE(reg, x) ((reg) = GX_BITSET(reg, 10, 3, x))
#define GX_CP_SET_VAT_GROUP1_TXC3_TYPE(reg, x) (GX_BITFIELD_SET(reg, 10, 3, x))
// TXC3_SHIFT [5:9] (5)
#define GX_CP_VAT_GROUP1_TXC3_SHIFT_ST 5
#define GX_CP_VAT_GROUP1_TXC3_SHIFT_END 9
#define GX_CP_VAT_GROUP1_TXC3_SHIFT_SZ 5
#define GX_CP_VAT_GROUP1_TXC3_SHIFT_MASK (((1 << 5) - 1) << 31 - 9)
#define GX_CP_GET_VAT_GROUP1_TXC3_SHIFT(reg) GX_BITGET(reg, 5, 5)
#define GX_CP_SET_VAT_GROUP1_TXC3_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 5, 5, x))
#define GX_CP_SET_VAT_GROUP1_TXC3_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 5, 5, x))
// TXC4_CNT [4:4] (1)
#define GX_CP_VAT_GROUP1_TXC4_CNT_ST 4
#define GX_CP_VAT_GROUP1_TXC4_CNT_END 4
#define GX_CP_VAT_GROUP1_TXC4_CNT_SZ 1
#define GX_CP_VAT_GROUP1_TXC4_CNT_MASK (((1 << 1) - 1) << 31 - 4)
#define GX_CP_GET_VAT_GROUP1_TXC4_CNT(reg) GX_BITGET(reg, 4, 1)
#define GX_CP_SET_VAT_GROUP1_TXC4_CNT(reg, x) ((reg) = GX_BITSET(reg, 4, 1, x))
#define GX_CP_SET_VAT_GROUP1_TXC4_CNT(reg, x) (GX_BITFIELD_SET(reg, 4, 1, x))
// TXC4_TYPE [1:3] (3)
#define GX_CP_VAT_GROUP1_TXC4_TYPE_ST 1
#define GX_CP_VAT_GROUP1_TXC4_TYPE_END 3
#define GX_CP_VAT_GROUP1_TXC4_TYPE_SZ 3
#define GX_CP_VAT_GROUP1_TXC4_TYPE_MASK (((1 << 3) - 1) << 31 - 3)
#define GX_CP_GET_VAT_GROUP1_TXC4_TYPE(reg) GX_BITGET(reg, 1, 3)
#define GX_CP_SET_VAT_GROUP1_TXC4_TYPE(reg, x) ((reg) = GX_BITSET(reg, 1, 3, x))
#define GX_CP_SET_VAT_GROUP1_TXC4_TYPE(reg, x) (GX_BITFIELD_SET(reg, 1, 3, x))
/**
* CP register 0x90 - VAT_group2
@ -447,70 +447,70 @@ typedef enum {
#define GX_CP_VAT_GROUP2_TXC4_SHIFT_SZ 5
#define GX_CP_VAT_GROUP2_TXC4_SHIFT_MASK (((1 << 5) - 1) << 31 - 31)
#define GX_CP_GET_VAT_GROUP2_TXC4_SHIFT(reg) GX_BITGET(reg, 27, 5)
#define GX_CP_SET_VAT_GROUP2_TXC4_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 27, 5, x))
#define GX_CP_SET_VAT_GROUP2_TXC4_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 27, 5, x))
// TXC5_CNT [26:26] (1)
#define GX_CP_VAT_GROUP2_TXC5_CNT_ST 26
#define GX_CP_VAT_GROUP2_TXC5_CNT_END 26
#define GX_CP_VAT_GROUP2_TXC5_CNT_SZ 1
#define GX_CP_VAT_GROUP2_TXC5_CNT_MASK (((1 << 1) - 1) << 31 - 26)
#define GX_CP_GET_VAT_GROUP2_TXC5_CNT(reg) GX_BITGET(reg, 26, 1)
#define GX_CP_SET_VAT_GROUP2_TXC5_CNT(reg, x) ((reg) = GX_BITSET(reg, 26, 1, x))
#define GX_CP_SET_VAT_GROUP2_TXC5_CNT(reg, x) (GX_BITFIELD_SET(reg, 26, 1, x))
// TXC5_TYPE [23:25] (3)
#define GX_CP_VAT_GROUP2_TXC5_TYPE_ST 23
#define GX_CP_VAT_GROUP2_TXC5_TYPE_END 25
#define GX_CP_VAT_GROUP2_TXC5_TYPE_SZ 3
#define GX_CP_VAT_GROUP2_TXC5_TYPE_MASK (((1 << 3) - 1) << 31 - 25)
#define GX_CP_GET_VAT_GROUP2_TXC5_TYPE(reg) GX_BITGET(reg, 23, 3)
#define GX_CP_SET_VAT_GROUP2_TXC5_TYPE(reg, x) ((reg) = GX_BITSET(reg, 23, 3, x))
#define GX_CP_SET_VAT_GROUP2_TXC5_TYPE(reg, x) (GX_BITFIELD_SET(reg, 23, 3, x))
// TXC5_SHIFT [18:22] (5)
#define GX_CP_VAT_GROUP2_TXC5_SHIFT_ST 18
#define GX_CP_VAT_GROUP2_TXC5_SHIFT_END 22
#define GX_CP_VAT_GROUP2_TXC5_SHIFT_SZ 5
#define GX_CP_VAT_GROUP2_TXC5_SHIFT_MASK (((1 << 5) - 1) << 31 - 22)
#define GX_CP_GET_VAT_GROUP2_TXC5_SHIFT(reg) GX_BITGET(reg, 18, 5)
#define GX_CP_SET_VAT_GROUP2_TXC5_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 18, 5, x))
#define GX_CP_SET_VAT_GROUP2_TXC5_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 18, 5, x))
// TXC6_CNT [17:17] (1)
#define GX_CP_VAT_GROUP2_TXC6_CNT_ST 17
#define GX_CP_VAT_GROUP2_TXC6_CNT_END 17
#define GX_CP_VAT_GROUP2_TXC6_CNT_SZ 1
#define GX_CP_VAT_GROUP2_TXC6_CNT_MASK (((1 << 1) - 1) << 31 - 17)
#define GX_CP_GET_VAT_GROUP2_TXC6_CNT(reg) GX_BITGET(reg, 17, 1)
#define GX_CP_SET_VAT_GROUP2_TXC6_CNT(reg, x) ((reg) = GX_BITSET(reg, 17, 1, x))
#define GX_CP_SET_VAT_GROUP2_TXC6_CNT(reg, x) (GX_BITFIELD_SET(reg, 17, 1, x))
// TXC6_TYPE [14:16] (3)
#define GX_CP_VAT_GROUP2_TXC6_TYPE_ST 14
#define GX_CP_VAT_GROUP2_TXC6_TYPE_END 16
#define GX_CP_VAT_GROUP2_TXC6_TYPE_SZ 3
#define GX_CP_VAT_GROUP2_TXC6_TYPE_MASK (((1 << 3) - 1) << 31 - 16)
#define GX_CP_GET_VAT_GROUP2_TXC6_TYPE(reg) GX_BITGET(reg, 14, 3)
#define GX_CP_SET_VAT_GROUP2_TXC6_TYPE(reg, x) ((reg) = GX_BITSET(reg, 14, 3, x))
#define GX_CP_SET_VAT_GROUP2_TXC6_TYPE(reg, x) (GX_BITFIELD_SET(reg, 14, 3, x))
// TXC6_SHIFT [9:13] (5)
#define GX_CP_VAT_GROUP2_TXC6_SHIFT_ST 9
#define GX_CP_VAT_GROUP2_TXC6_SHIFT_END 13
#define GX_CP_VAT_GROUP2_TXC6_SHIFT_SZ 5
#define GX_CP_VAT_GROUP2_TXC6_SHIFT_MASK (((1 << 5) - 1) << 31 - 13)
#define GX_CP_GET_VAT_GROUP2_TXC6_SHIFT(reg) GX_BITGET(reg, 9, 5)
#define GX_CP_SET_VAT_GROUP2_TXC6_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 9, 5, x))
#define GX_CP_SET_VAT_GROUP2_TXC6_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 9, 5, x))
// TXC7_CNT [8:8] (1)
#define GX_CP_VAT_GROUP2_TXC7_CNT_ST 8
#define GX_CP_VAT_GROUP2_TXC7_CNT_END 8
#define GX_CP_VAT_GROUP2_TXC7_CNT_SZ 1
#define GX_CP_VAT_GROUP2_TXC7_CNT_MASK (((1 << 1) - 1) << 31 - 8)
#define GX_CP_GET_VAT_GROUP2_TXC7_CNT(reg) GX_BITGET(reg, 8, 1)
#define GX_CP_SET_VAT_GROUP2_TXC7_CNT(reg, x) ((reg) = GX_BITSET(reg, 8, 1, x))
#define GX_CP_SET_VAT_GROUP2_TXC7_CNT(reg, x) (GX_BITFIELD_SET(reg, 8, 1, x))
// TXC7_TYPE [5:7] (3)
#define GX_CP_VAT_GROUP2_TXC7_TYPE_ST 5
#define GX_CP_VAT_GROUP2_TXC7_TYPE_END 7
#define GX_CP_VAT_GROUP2_TXC7_TYPE_SZ 3
#define GX_CP_VAT_GROUP2_TXC7_TYPE_MASK (((1 << 3) - 1) << 31 - 7)
#define GX_CP_GET_VAT_GROUP2_TXC7_TYPE(reg) GX_BITGET(reg, 5, 3)
#define GX_CP_SET_VAT_GROUP2_TXC7_TYPE(reg, x) ((reg) = GX_BITSET(reg, 5, 3, x))
#define GX_CP_SET_VAT_GROUP2_TXC7_TYPE(reg, x) (GX_BITFIELD_SET(reg, 5, 3, x))
// TXC7_SHIFT [0:4] (5)
#define GX_CP_VAT_GROUP2_TXC7_SHIFT_ST 0
#define GX_CP_VAT_GROUP2_TXC7_SHIFT_END 4
#define GX_CP_VAT_GROUP2_TXC7_SHIFT_SZ 5
#define GX_CP_VAT_GROUP2_TXC7_SHIFT_MASK (((1 << 5) - 1) << 31 - 4)
#define GX_CP_GET_VAT_GROUP2_TXC7_SHIFT(reg) GX_BITGET(reg, 0, 5)
#define GX_CP_SET_VAT_GROUP2_TXC7_SHIFT(reg, x) ((reg) = GX_BITSET(reg, 0, 5, x))
#define GX_CP_SET_VAT_GROUP2_TXC7_SHIFT(reg, x) (GX_BITFIELD_SET(reg, 0, 5, x))
/**
* CP register 0xA0 - ArrayBase
@ -521,7 +521,7 @@ typedef enum {
#define GX_CP_ARRAYBASE_BASE_SZ 26
#define GX_CP_ARRAYBASE_BASE_MASK (((1 << 26) - 1) << 31 - 31)
#define GX_CP_GET_ARRAYBASE_BASE(reg) GX_BITGET(reg, 6, 26)
#define GX_CP_SET_ARRAYBASE_BASE(reg, x) ((reg) = GX_BITSET(reg, 6, 26, x))
#define GX_CP_SET_ARRAYBASE_BASE(reg, x) (GX_BITFIELD_SET(reg, 6, 26, x))
/**
* CP register 0xB0 - ArrayStride
@ -532,7 +532,7 @@ typedef enum {
#define GX_CP_ARRAYSTRIDE_STRIDE_SZ 8
#define GX_CP_ARRAYSTRIDE_STRIDE_MASK (((1 << 8) - 1) << 31 - 31)
#define GX_CP_GET_ARRAYSTRIDE_STRIDE(reg) GX_BITGET(reg, 24, 8)
#define GX_CP_SET_ARRAYSTRIDE_STRIDE(reg, x) ((reg) = GX_BITSET(reg, 24, 8, x))
#define GX_CP_SET_ARRAYSTRIDE_STRIDE(reg, x) (GX_BITFIELD_SET(reg, 24, 8, x))
#ifdef __cplusplus
}

64
include/Dolphin/GX/GXHardwareXF.h
View File

@ -80,21 +80,21 @@ typedef enum {
#define GX_XF_CLIPDISABLE_DETECT_SZ 1
#define GX_XF_CLIPDISABLE_DETECT_MASK (((1 << 1) - 1) << 31 - 31)
#define GX_XF_GET_CLIPDISABLE_DETECT(reg) GX_BITGET(reg, 31, 1)
#define GX_XF_SET_CLIPDISABLE_DETECT(reg, x) ((reg) = GX_BITSET(reg, 31, 1, x))
#define GX_XF_SET_CLIPDISABLE_DETECT(reg, x) (GX_BITFIELD_SET(reg, 31, 1, x))
// REJECT [30:30] (1) - Disable trivial rejection
#define GX_XF_CLIPDISABLE_REJECT_ST 30
#define GX_XF_CLIPDISABLE_REJECT_END 30
#define GX_XF_CLIPDISABLE_REJECT_SZ 1
#define GX_XF_CLIPDISABLE_REJECT_MASK (((1 << 1) - 1) << 31 - 30)
#define GX_XF_GET_CLIPDISABLE_REJECT(reg) GX_BITGET(reg, 30, 1)
#define GX_XF_SET_CLIPDISABLE_REJECT(reg, x) ((reg) = GX_BITSET(reg, 30, 1, x))
#define GX_XF_SET_CLIPDISABLE_REJECT(reg, x) (GX_BITFIELD_SET(reg, 30, 1, x))
// ACCEL [29:29] (1) - Disable cpoly clipping acceleration
#define GX_XF_CLIPDISABLE_ACCEL_ST 29
#define GX_XF_CLIPDISABLE_ACCEL_END 29
#define GX_XF_CLIPDISABLE_ACCEL_SZ 1
#define GX_XF_CLIPDISABLE_ACCEL_MASK (((1 << 1) - 1) << 31 - 29)
#define GX_XF_GET_CLIPDISABLE_ACCEL(reg) GX_BITGET(reg, 29, 1)
#define GX_XF_SET_CLIPDISABLE_ACCEL(reg, x) ((reg) = GX_BITSET(reg, 29, 1, x))
#define GX_XF_SET_CLIPDISABLE_ACCEL(reg, x) (GX_BITFIELD_SET(reg, 29, 1, x))
/**
* XF register 0x1007 - Perf1
@ -105,7 +105,7 @@ typedef enum {
#define GX_XF_PERF1_TARGET_SZ 7
#define GX_XF_PERF1_TARGET_MASK (((1 << 7) - 1) << 31 - 31)
#define GX_XF_GET_PERF1_TARGET(reg) GX_BITGET(reg, 25, 7)
#define GX_XF_SET_PERF1_TARGET(reg, x) ((reg) = GX_BITSET(reg, 25, 7, x))
#define GX_XF_SET_PERF1_TARGET(reg, x) (GX_BITFIELD_SET(reg, 25, 7, x))
/**
* XF register 0x1008 - InVertexSpec
@ -116,21 +116,21 @@ typedef enum {
#define GX_XF_INVERTEXSPEC_CLR_SZ 2
#define GX_XF_INVERTEXSPEC_CLR_MASK (((1 << 2) - 1) << 31 - 31)
#define GX_XF_GET_INVERTEXSPEC_CLR(reg) GX_BITGET(reg, 30, 2)
#define GX_XF_SET_INVERTEXSPEC_CLR(reg, x) ((reg) = GX_BITSET(reg, 30, 2, x))
#define GX_XF_SET_INVERTEXSPEC_CLR(reg, x) (GX_BITFIELD_SET(reg, 30, 2, x))
// NRM [28:29] (2)
#define GX_XF_INVERTEXSPEC_NRM_ST 28
#define GX_XF_INVERTEXSPEC_NRM_END 29
#define GX_XF_INVERTEXSPEC_NRM_SZ 2
#define GX_XF_INVERTEXSPEC_NRM_MASK (((1 << 2) - 1) << 31 - 29)
#define GX_XF_GET_INVERTEXSPEC_NRM(reg) GX_BITGET(reg, 28, 2)
#define GX_XF_SET_INVERTEXSPEC_NRM(reg, x) ((reg) = GX_BITSET(reg, 28, 2, x))
#define GX_XF_SET_INVERTEXSPEC_NRM(reg, x) (GX_BITFIELD_SET(reg, 28, 2, x))
// TXC [24:27] (4)
#define GX_XF_INVERTEXSPEC_TXC_ST 24
#define GX_XF_INVERTEXSPEC_TXC_END 27
#define GX_XF_INVERTEXSPEC_TXC_SZ 4
#define GX_XF_INVERTEXSPEC_TXC_MASK (((1 << 4) - 1) << 31 - 27)
#define GX_XF_GET_INVERTEXSPEC_TXC(reg) GX_BITGET(reg, 24, 4)
#define GX_XF_SET_INVERTEXSPEC_TXC(reg, x) ((reg) = GX_BITSET(reg, 24, 4, x))
#define GX_XF_SET_INVERTEXSPEC_TXC(reg, x) (GX_BITFIELD_SET(reg, 24, 4, x))
/**
* XF register 0x100E - Color0Cntrl
@ -141,56 +141,56 @@ typedef enum {
#define GX_XF_COLOR0CNTRL_MATSRC_SZ 1
#define GX_XF_COLOR0CNTRL_MATSRC_MASK (((1 << 1) - 1) << 31 - 31)
#define GX_XF_GET_COLOR0CNTRL_MATSRC(reg) GX_BITGET(reg, 31, 1)
#define GX_XF_SET_COLOR0CNTRL_MATSRC(reg, x) ((reg) = GX_BITSET(reg, 31, 1, x))
#define GX_XF_SET_COLOR0CNTRL_MATSRC(reg, x) (GX_BITFIELD_SET(reg, 31, 1, x))
// LIGHT [30:30] (1)
#define GX_XF_COLOR0CNTRL_LIGHT_ST 30
#define GX_XF_COLOR0CNTRL_LIGHT_END 30
#define GX_XF_COLOR0CNTRL_LIGHT_SZ 1
#define GX_XF_COLOR0CNTRL_LIGHT_MASK (((1 << 1) - 1) << 31 - 30)
#define GX_XF_GET_COLOR0CNTRL_LIGHT(reg) GX_BITGET(reg, 30, 1)
#define GX_XF_SET_COLOR0CNTRL_LIGHT(reg, x) ((reg) = GX_BITSET(reg, 30, 1, x))
#define GX_XF_SET_COLOR0CNTRL_LIGHT(reg, x) (GX_BITFIELD_SET(reg, 30, 1, x))
// LMASKHI [26:29] (4)
#define GX_XF_COLOR0CNTRL_LMASKHI_ST 26
#define GX_XF_COLOR0CNTRL_LMASKHI_END 29
#define GX_XF_COLOR0CNTRL_LMASKHI_SZ 4
#define GX_XF_COLOR0CNTRL_LMASKHI_MASK (((1 << 4) - 1) << 31 - 29)
#define GX_XF_GET_COLOR0CNTRL_LMASKHI(reg) GX_BITGET(reg, 26, 4)
#define GX_XF_SET_COLOR0CNTRL_LMASKHI(reg, x) ((reg) = GX_BITSET(reg, 26, 4, x))
#define GX_XF_SET_COLOR0CNTRL_LMASKHI(reg, x) (GX_BITFIELD_SET(reg, 26, 4, x))
// AMBSRC [25:25] (1)
#define GX_XF_COLOR0CNTRL_AMBSRC_ST 25
#define GX_XF_COLOR0CNTRL_AMBSRC_END 25
#define GX_XF_COLOR0CNTRL_AMBSRC_SZ 1
#define GX_XF_COLOR0CNTRL_AMBSRC_MASK (((1 << 1) - 1) << 31 - 25)
#define GX_XF_GET_COLOR0CNTRL_AMBSRC(reg) GX_BITGET(reg, 25, 1)
#define GX_XF_SET_COLOR0CNTRL_AMBSRC(reg, x) ((reg) = GX_BITSET(reg, 25, 1, x))
#define GX_XF_SET_COLOR0CNTRL_AMBSRC(reg, x) (GX_BITFIELD_SET(reg, 25, 1, x))
// DIFFUSEATTN [23:24] (2)
#define GX_XF_COLOR0CNTRL_DIFFUSEATTN_ST 23
#define GX_XF_COLOR0CNTRL_DIFFUSEATTN_END 24
#define GX_XF_COLOR0CNTRL_DIFFUSEATTN_SZ 2
#define GX_XF_COLOR0CNTRL_DIFFUSEATTN_MASK (((1 << 2) - 1) << 31 - 24)
#define GX_XF_GET_COLOR0CNTRL_DIFFUSEATTN(reg) GX_BITGET(reg, 23, 2)
#define GX_XF_SET_COLOR0CNTRL_DIFFUSEATTN(reg, x) ((reg) = GX_BITSET(reg, 23, 2, x))
#define GX_XF_SET_COLOR0CNTRL_DIFFUSEATTN(reg, x) (GX_BITFIELD_SET(reg, 23, 2, x))
// ATTNENABLE [22:22] (1)
#define GX_XF_COLOR0CNTRL_ATTNENABLE_ST 22
#define GX_XF_COLOR0CNTRL_ATTNENABLE_END 22
#define GX_XF_COLOR0CNTRL_ATTNENABLE_SZ 1
#define GX_XF_COLOR0CNTRL_ATTNENABLE_MASK (((1 << 1) - 1) << 31 - 22)
#define GX_XF_GET_COLOR0CNTRL_ATTNENABLE(reg) GX_BITGET(reg, 22, 1)
#define GX_XF_SET_COLOR0CNTRL_ATTNENABLE(reg, x) ((reg) = GX_BITSET(reg, 22, 1, x))
#define GX_XF_SET_COLOR0CNTRL_ATTNENABLE(reg, x) (GX_BITFIELD_SET(reg, 22, 1, x))
// ATTNSELECT [21:21] (1)
#define GX_XF_COLOR0CNTRL_ATTNSELECT_ST 21
#define GX_XF_COLOR0CNTRL_ATTNSELECT_END 21
#define GX_XF_COLOR0CNTRL_ATTNSELECT_SZ 1
#define GX_XF_COLOR0CNTRL_ATTNSELECT_MASK (((1 << 1) - 1) << 31 - 21)
#define GX_XF_GET_COLOR0CNTRL_ATTNSELECT(reg) GX_BITGET(reg, 21, 1)
#define GX_XF_SET_COLOR0CNTRL_ATTNSELECT(reg, x) ((reg) = GX_BITSET(reg, 21, 1, x))
#define GX_XF_SET_COLOR0CNTRL_ATTNSELECT(reg, x) (GX_BITFIELD_SET(reg, 21, 1, x))
// LMASKLO [17:20] (4)
#define GX_XF_COLOR0CNTRL_LMASKLO_ST 17
#define GX_XF_COLOR0CNTRL_LMASKLO_END 20
#define GX_XF_COLOR0CNTRL_LMASKLO_SZ 4
#define GX_XF_COLOR0CNTRL_LMASKLO_MASK (((1 << 4) - 1) << 31 - 20)
#define GX_XF_GET_COLOR0CNTRL_LMASKLO(reg) GX_BITGET(reg, 17, 4)
#define GX_XF_SET_COLOR0CNTRL_LMASKLO(reg, x) ((reg) = GX_BITSET(reg, 17, 4, x))
#define GX_XF_SET_COLOR0CNTRL_LMASKLO(reg, x) (GX_BITFIELD_SET(reg, 17, 4, x))
/**
* XF register 0x1018 - MatrixIndex0
@ -201,35 +201,35 @@ typedef enum {
#define GX_XF_MATRIXINDEX0_GEOM_SZ 6
#define GX_XF_MATRIXINDEX0_GEOM_MASK (((1 << 6) - 1) << 31 - 31)
#define GX_XF_GET_MATRIXINDEX0_GEOM(reg) GX_BITGET(reg, 26, 6)
#define GX_XF_SET_MATRIXINDEX0_GEOM(reg, x) ((reg) = GX_BITSET(reg, 26, 6, x))
#define GX_XF_SET_MATRIXINDEX0_GEOM(reg, x) (GX_BITFIELD_SET(reg, 26, 6, x))
// TEX0 [20:25] (6)
#define GX_XF_MATRIXINDEX0_TEX0_ST 20
#define GX_XF_MATRIXINDEX0_TEX0_END 25
#define GX_XF_MATRIXINDEX0_TEX0_SZ 6
#define GX_XF_MATRIXINDEX0_TEX0_MASK (((1 << 6) - 1) << 31 - 25)
#define GX_XF_GET_MATRIXINDEX0_TEX0(reg) GX_BITGET(reg, 20, 6)
#define GX_XF_SET_MATRIXINDEX0_TEX0(reg, x) ((reg) = GX_BITSET(reg, 20, 6, x))
#define GX_XF_SET_MATRIXINDEX0_TEX0(reg, x) (GX_BITFIELD_SET(reg, 20, 6, x))
// TEX1 [14:19] (6)
#define GX_XF_MATRIXINDEX0_TEX1_ST 14
#define GX_XF_MATRIXINDEX0_TEX1_END 19
#define GX_XF_MATRIXINDEX0_TEX1_SZ 6
#define GX_XF_MATRIXINDEX0_TEX1_MASK (((1 << 6) - 1) << 31 - 19)
#define GX_XF_GET_MATRIXINDEX0_TEX1(reg) GX_BITGET(reg, 14, 6)
#define GX_XF_SET_MATRIXINDEX0_TEX1(reg, x) ((reg) = GX_BITSET(reg, 14, 6, x))
#define GX_XF_SET_MATRIXINDEX0_TEX1(reg, x) (GX_BITFIELD_SET(reg, 14, 6, x))
// TEX2 [8:13] (6)
#define GX_XF_MATRIXINDEX0_TEX2_ST 8
#define GX_XF_MATRIXINDEX0_TEX2_END 13
#define GX_XF_MATRIXINDEX0_TEX2_SZ 6
#define GX_XF_MATRIXINDEX0_TEX2_MASK (((1 << 6) - 1) << 31 - 13)
#define GX_XF_GET_MATRIXINDEX0_TEX2(reg) GX_BITGET(reg, 8, 6)
#define GX_XF_SET_MATRIXINDEX0_TEX2(reg, x) ((reg) = GX_BITSET(reg, 8, 6, x))
#define GX_XF_SET_MATRIXINDEX0_TEX2(reg, x) (GX_BITFIELD_SET(reg, 8, 6, x))
// TEX3 [2:7] (6)
#define GX_XF_MATRIXINDEX0_TEX3_ST 2
#define GX_XF_MATRIXINDEX0_TEX3_END 7
#define GX_XF_MATRIXINDEX0_TEX3_SZ 6
#define GX_XF_MATRIXINDEX0_TEX3_MASK (((1 << 6) - 1) << 31 - 7)
#define GX_XF_GET_MATRIXINDEX0_TEX3(reg) GX_BITGET(reg, 2, 6)
#define GX_XF_SET_MATRIXINDEX0_TEX3(reg, x) ((reg) = GX_BITSET(reg, 2, 6, x))
#define GX_XF_SET_MATRIXINDEX0_TEX3(reg, x) (GX_BITFIELD_SET(reg, 2, 6, x))
/**
* XF register 0x1019 - MatrixIndex1
@ -240,28 +240,28 @@ typedef enum {
#define GX_XF_MATRIXINDEX1_TEX4_SZ 6
#define GX_XF_MATRIXINDEX1_TEX4_MASK (((1 << 6) - 1) << 31 - 31)
#define GX_XF_GET_MATRIXINDEX1_TEX4(reg) GX_BITGET(reg, 26, 6)
#define GX_XF_SET_MATRIXINDEX1_TEX4(reg, x) ((reg) = GX_BITSET(reg, 26, 6, x))
#define GX_XF_SET_MATRIXINDEX1_TEX4(reg, x) (GX_BITFIELD_SET(reg, 26, 6, x))
// TEX5 [20:25] (6)
#define GX_XF_MATRIXINDEX1_TEX5_ST 20
#define GX_XF_MATRIXINDEX1_TEX5_END 25
#define GX_XF_MATRIXINDEX1_TEX5_SZ 6
#define GX_XF_MATRIXINDEX1_TEX5_MASK (((1 << 6) - 1) << 31 - 25)
#define GX_XF_GET_MATRIXINDEX1_TEX5(reg) GX_BITGET(reg, 20, 6)
#define GX_XF_SET_MATRIXINDEX1_TEX5(reg, x) ((reg) = GX_BITSET(reg, 20, 6, x))
#define GX_XF_SET_MATRIXINDEX1_TEX5(reg, x) (GX_BITFIELD_SET(reg, 20, 6, x))
// TEX6 [14:19] (6)
#define GX_XF_MATRIXINDEX1_TEX6_ST 14
#define GX_XF_MATRIXINDEX1_TEX6_END 19
#define GX_XF_MATRIXINDEX1_TEX6_SZ 6
#define GX_XF_MATRIXINDEX1_TEX6_MASK (((1 << 6) - 1) << 31 - 19)
#define GX_XF_GET_MATRIXINDEX1_TEX6(reg) GX_BITGET(reg, 14, 6)
#define GX_XF_SET_MATRIXINDEX1_TEX6(reg, x) ((reg) = GX_BITSET(reg, 14, 6, x))
#define GX_XF_SET_MATRIXINDEX1_TEX6(reg, x) (GX_BITFIELD_SET(reg, 14, 6, x))
// TEX7 [8:13] (6)
#define GX_XF_MATRIXINDEX1_TEX7_ST 8
#define GX_XF_MATRIXINDEX1_TEX7_END 13
#define GX_XF_MATRIXINDEX1_TEX7_SZ 6
#define GX_XF_MATRIXINDEX1_TEX7_MASK (((1 << 6) - 1) << 31 - 13)
#define GX_XF_GET_MATRIXINDEX1_TEX7(reg) GX_BITGET(reg, 8, 6)
#define GX_XF_SET_MATRIXINDEX1_TEX7(reg, x) ((reg) = GX_BITSET(reg, 8, 6, x))
#define GX_XF_SET_MATRIXINDEX1_TEX7(reg, x) (GX_BITFIELD_SET(reg, 8, 6, x))
/**
* XF structure - Tex
@ -272,42 +272,42 @@ typedef enum {
#define GX_XF_TEX_PROJTYPE_SZ 1
#define GX_XF_TEX_PROJTYPE_MASK (((1 << 1) - 1) << 31 - 30)
#define GX_XF_GET_TEX_PROJTYPE(reg) GX_BITGET(reg, 30, 1)
#define GX_XF_SET_TEX_PROJTYPE(reg, x) ((reg) = GX_BITSET(reg, 30, 1, x))
#define GX_XF_SET_TEX_PROJTYPE(reg, x) (GX_BITFIELD_SET(reg, 30, 1, x))
// INPUTFORM [29:29] (1)
#define GX_XF_TEX_INPUTFORM_ST 29
#define GX_XF_TEX_INPUTFORM_END 29
#define GX_XF_TEX_INPUTFORM_SZ 1
#define GX_XF_TEX_INPUTFORM_MASK (((1 << 1) - 1) << 31 - 29)
#define GX_XF_GET_TEX_INPUTFORM(reg) GX_BITGET(reg, 29, 1)
#define GX_XF_SET_TEX_INPUTFORM(reg, x) ((reg) = GX_BITSET(reg, 29, 1, x))
#define GX_XF_SET_TEX_INPUTFORM(reg, x) (GX_BITFIELD_SET(reg, 29, 1, x))
// TEXGENTYPE [25:27] (3)
#define GX_XF_TEX_TEXGENTYPE_ST 25
#define GX_XF_TEX_TEXGENTYPE_END 27
#define GX_XF_TEX_TEXGENTYPE_SZ 3
#define GX_XF_TEX_TEXGENTYPE_MASK (((1 << 3) - 1) << 31 - 27)
#define GX_XF_GET_TEX_TEXGENTYPE(reg) GX_BITGET(reg, 25, 3)
#define GX_XF_SET_TEX_TEXGENTYPE(reg, x) ((reg) = GX_BITSET(reg, 25, 3, x))
#define GX_XF_SET_TEX_TEXGENTYPE(reg, x) (GX_BITFIELD_SET(reg, 25, 3, x))
// SRCROW [20:24] (5)
#define GX_XF_TEX_SRCROW_ST 20
#define GX_XF_TEX_SRCROW_END 24
#define GX_XF_TEX_SRCROW_SZ 5
#define GX_XF_TEX_SRCROW_MASK (((1 << 5) - 1) << 31 - 24)
#define GX_XF_GET_TEX_SRCROW(reg) GX_BITGET(reg, 20, 5)
#define GX_XF_SET_TEX_SRCROW(reg, x) ((reg) = GX_BITSET(reg, 20, 5, x))
#define GX_XF_SET_TEX_SRCROW(reg, x) (GX_BITFIELD_SET(reg, 20, 5, x))
// BUMPSRCTEX [17:19] (3)
#define GX_XF_TEX_BUMPSRCTEX_ST 17
#define GX_XF_TEX_BUMPSRCTEX_END 19
#define GX_XF_TEX_BUMPSRCTEX_SZ 3
#define GX_XF_TEX_BUMPSRCTEX_MASK (((1 << 3) - 1) << 31 - 19)
#define GX_XF_GET_TEX_BUMPSRCTEX(reg) GX_BITGET(reg, 17, 3)
#define GX_XF_SET_TEX_BUMPSRCTEX(reg, x) ((reg) = GX_BITSET(reg, 17, 3, x))
#define GX_XF_SET_TEX_BUMPSRCTEX(reg, x) (GX_BITFIELD_SET(reg, 17, 3, x))
// BUMPSRCLIGHT [14:16] (3)
#define GX_XF_TEX_BUMPSRCLIGHT_ST 14
#define GX_XF_TEX_BUMPSRCLIGHT_END 16
#define GX_XF_TEX_BUMPSRCLIGHT_SZ 3
#define GX_XF_TEX_BUMPSRCLIGHT_MASK (((1 << 3) - 1) << 31 - 16)
#define GX_XF_GET_TEX_BUMPSRCLIGHT(reg) GX_BITGET(reg, 14, 3)
#define GX_XF_SET_TEX_BUMPSRCLIGHT(reg, x) ((reg) = GX_BITSET(reg, 14, 3, x))
#define GX_XF_SET_TEX_BUMPSRCLIGHT(reg, x) (GX_BITFIELD_SET(reg, 14, 3, x))
/**
* XF structure - DualTex
@ -318,14 +318,14 @@ typedef enum {
#define GX_XF_DUALTEX_BASEROW_SZ 6
#define GX_XF_DUALTEX_BASEROW_MASK (((1 << 6) - 1) << 31 - 31)
#define GX_XF_GET_DUALTEX_BASEROW(reg) GX_BITGET(reg, 26, 6)
#define GX_XF_SET_DUALTEX_BASEROW(reg, x) ((reg) = GX_BITSET(reg, 26, 6, x))
#define GX_XF_SET_DUALTEX_BASEROW(reg, x) (GX_BITFIELD_SET(reg, 26, 6, x))
// NORMALIZE [23:23] (1) - Normalize texcoord before sending transform
#define GX_XF_DUALTEX_NORMALIZE_ST 23
#define GX_XF_DUALTEX_NORMALIZE_END 23
#define GX_XF_DUALTEX_NORMALIZE_SZ 1
#define GX_XF_DUALTEX_NORMALIZE_MASK (((1 << 1) - 1) << 31 - 23)
#define GX_XF_GET_DUALTEX_NORMALIZE(reg) GX_BITGET(reg, 23, 1)
#define GX_XF_SET_DUALTEX_NORMALIZE(reg, x) ((reg) = GX_BITSET(reg, 23, 1, x))
#define GX_XF_SET_DUALTEX_NORMALIZE(reg, x) (GX_BITFIELD_SET(reg, 23, 1, x))
#ifdef __cplusplus
}

3
include/Dolphin/GX/GXTypes.h
View File

@ -12,7 +12,8 @@ extern "C" {
///////////// USEFUL HELPERS ///////////////
// Set bitfields manually.
#define GX_BITFIELD_SET(field, pos, size, value) ((field) = __rlwimi((field), (value), 31 - (pos) - (size) + 1, (pos), (pos) + (size)-1))
#define GX_BITFIELD(field, pos, size, value) (__rlwimi((field), (value), 31 - (pos) - (size) + 1, (pos), (pos) + (size)-1))
#define GX_BITFIELD_SET(field, pos, size, value) ((field) = GX_BITFIELD(field, pos, size, value))
#define LOAD_GX_FIELD(offset, type) (*(type*)(((u8*)__GXData) + offset))
#define GX_BITGET(field, pos, size) ((field) >> (31 - (pos) - (size) + 1) & ((1 << (size)) - 1))
////////////////////////////////////////////

1055
src/Dolphin/gx/GXAttr.c
View File

File diff suppressed because it is too large Load Diff

2
src/Dolphin/gx/GXTransform.c
View File

@ -629,7 +629,7 @@ void GXSetClipMode(GXClipMode mode)
* Address: 800E9900
* Size: 000084
*/
void __GXSetMatrixIndex(void)
void __GXSetMatrixIndex(GXTexCoordID)
{
/*
.loc_0x0: