exp & fmod linked

This commit is contained in:
EpochFlame 2021-10-27 18:08:48 -04:00
parent e31afd4528
commit 53fe3a9d61
5 changed files with 279 additions and 963 deletions

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@ -1,238 +0,0 @@
.include "macros.inc"
.section .rodata # 0x804732E0 - 0x8049E220
.balign 0x8
.global halF
halF:
.4byte 0x3FE00000
.4byte 0x00000000
.4byte 0xBFE00000
.4byte 0x00000000
.global ln2HI
ln2HI:
.4byte 0x3FE62E42
.4byte 0xFEE00000
.4byte 0xBFE62E42
.4byte 0xFEE00000
.global ln2LO
ln2LO:
.4byte 0x3DEA39EF
.4byte 0x35793C76
.4byte 0xBDEA39EF
.4byte 0x35793C76
.section .sdata2, "a" # 0x80516360 - 0x80520E40
.balign 0x8
.global lbl_805171D0
lbl_805171D0:
.4byte 0x00000000
.4byte 0x00000000
.global lbl_805171D8
lbl_805171D8:
.4byte 0x40862E42
.4byte 0xFEFA39EF
.global lbl_805171E0
lbl_805171E0:
.4byte 0x7FF00000
.4byte 0x00000000
.global lbl_805171E8
lbl_805171E8:
.4byte 0xC0874910
.4byte 0xD52D3051
.global lbl_805171F0
lbl_805171F0:
.4byte 0x3FF71547
.4byte 0x652B82FE
.global lbl_805171F8
lbl_805171F8:
.4byte 0x7E37E43C
.4byte 0x8800759C
.global lbl_80517200
lbl_80517200:
.4byte 0x3FF00000
.4byte 0x00000000
.global lbl_80517208
lbl_80517208:
.4byte 0x3FC55555
.4byte 0x5555553E
.global lbl_80517210
lbl_80517210:
.4byte 0xBF66C16C
.4byte 0x16BEBD93
.global lbl_80517218
lbl_80517218:
.4byte 0x3F11566A
.4byte 0xAF25DE2C
.global lbl_80517220
lbl_80517220:
.4byte 0xBEBBBD41
.4byte 0xC5D26BF1
.global lbl_80517228
lbl_80517228:
.4byte 0x3E663769
.4byte 0x72BEA4D0
.global lbl_80517230
lbl_80517230:
.4byte 0x40000000
.4byte 0x00000000
.global lbl_80517238
lbl_80517238:
.4byte 0x01700000
.4byte 0x00000000
.global lbl_80517240
lbl_80517240:
.4byte 0x43300000
.4byte 0x80000000
.section .text, "ax" # 0x800056C0 - 0x80472F00
.global __ieee754_exp
__ieee754_exp:
/* 800CC878 000C97B8 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 800CC87C 000C97BC 3C 60 40 86 */ lis r3, 0x40862E42@ha
/* 800CC880 000C97C0 3C 80 80 48 */ lis r4, halF@ha
/* 800CC884 000C97C4 D8 21 00 08 */ stfd f1, 8(r1)
/* 800CC888 000C97C8 38 03 2E 42 */ addi r0, r3, 0x40862E42@l
/* 800CC88C 000C97CC 38 A4 A1 38 */ addi r5, r4, halF@l
/* 800CC890 000C97D0 81 01 00 08 */ lwz r8, 8(r1)
/* 800CC894 000C97D4 55 04 00 7E */ clrlwi r4, r8, 1
/* 800CC898 000C97D8 55 07 0F FE */ srwi r7, r8, 0x1f
/* 800CC89C 000C97DC 7C 04 00 40 */ cmplw r4, r0
/* 800CC8A0 000C97E0 41 80 00 64 */ blt lbl_800CC904
/* 800CC8A4 000C97E4 3C 00 7F F0 */ lis r0, 0x7ff0
/* 800CC8A8 000C97E8 7C 04 00 40 */ cmplw r4, r0
/* 800CC8AC 000C97EC 41 80 00 30 */ blt lbl_800CC8DC
/* 800CC8B0 000C97F0 80 01 00 0C */ lwz r0, 0xc(r1)
/* 800CC8B4 000C97F4 55 03 03 3E */ clrlwi r3, r8, 0xc
/* 800CC8B8 000C97F8 7C 60 03 79 */ or. r0, r3, r0
/* 800CC8BC 000C97FC 41 82 00 0C */ beq lbl_800CC8C8
/* 800CC8C0 000C9800 FC 21 08 2A */ fadd f1, f1, f1
/* 800CC8C4 000C9804 48 00 01 D0 */ b lbl_800CCA94
lbl_800CC8C8:
/* 800CC8C8 000C9808 2C 07 00 00 */ cmpwi r7, 0
/* 800CC8CC 000C980C 40 82 00 08 */ bne lbl_800CC8D4
/* 800CC8D0 000C9810 48 00 01 C4 */ b lbl_800CCA94
lbl_800CC8D4:
/* 800CC8D4 000C9814 C8 22 8E 70 */ lfd f1, lbl_805171D0@sda21(r2)
/* 800CC8D8 000C9818 48 00 01 BC */ b lbl_800CCA94
lbl_800CC8DC:
/* 800CC8DC 000C981C C8 02 8E 78 */ lfd f0, lbl_805171D8@sda21(r2)
/* 800CC8E0 000C9820 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 800CC8E4 000C9824 40 81 00 0C */ ble lbl_800CC8F0
/* 800CC8E8 000C9828 C8 22 8E 80 */ lfd f1, lbl_805171E0@sda21(r2)
/* 800CC8EC 000C982C 48 00 01 A8 */ b lbl_800CCA94
lbl_800CC8F0:
/* 800CC8F0 000C9830 C8 02 8E 88 */ lfd f0, lbl_805171E8@sda21(r2)
/* 800CC8F4 000C9834 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 800CC8F8 000C9838 40 80 00 0C */ bge lbl_800CC904
/* 800CC8FC 000C983C C8 22 8E 70 */ lfd f1, lbl_805171D0@sda21(r2)
/* 800CC900 000C9840 48 00 01 94 */ b lbl_800CCA94
lbl_800CC904:
/* 800CC904 000C9844 3C 60 3F D6 */ lis r3, 0x3FD62E42@ha
/* 800CC908 000C9848 38 03 2E 42 */ addi r0, r3, 0x3FD62E42@l
/* 800CC90C 000C984C 7C 04 00 40 */ cmplw r4, r0
/* 800CC910 000C9850 40 81 00 98 */ ble lbl_800CC9A8
/* 800CC914 000C9854 3C 60 3F F1 */ lis r3, 0x3FF0A2B2@ha
/* 800CC918 000C9858 38 03 A2 B2 */ addi r0, r3, 0x3FF0A2B2@l
/* 800CC91C 000C985C 7C 04 00 40 */ cmplw r4, r0
/* 800CC920 000C9860 40 80 00 2C */ bge lbl_800CC94C
/* 800CC924 000C9864 54 E6 18 38 */ slwi r6, r7, 3
/* 800CC928 000C9868 38 85 00 10 */ addi r4, r5, 0x10
/* 800CC92C 000C986C C8 21 00 08 */ lfd f1, 8(r1)
/* 800CC930 000C9870 38 65 00 20 */ addi r3, r5, 0x20
/* 800CC934 000C9874 7C 04 34 AE */ lfdx f0, r4, r6
/* 800CC938 000C9878 20 07 00 01 */ subfic r0, r7, 1
/* 800CC93C 000C987C 7D 03 34 AE */ lfdx f8, r3, r6
/* 800CC940 000C9880 7C C7 00 50 */ subf r6, r7, r0
/* 800CC944 000C9884 FC E1 00 28 */ fsub f7, f1, f0
/* 800CC948 000C9888 48 00 00 54 */ b lbl_800CC99C
lbl_800CC94C:
/* 800CC94C 000C988C 54 E4 18 38 */ slwi r4, r7, 3
/* 800CC950 000C9890 38 65 00 00 */ addi r3, r5, 0
/* 800CC954 000C9894 C8 22 8E 90 */ lfd f1, lbl_805171F0@sda21(r2)
/* 800CC958 000C9898 3C 00 43 30 */ lis r0, 0x4330
/* 800CC95C 000C989C C8 81 00 08 */ lfd f4, 8(r1)
/* 800CC960 000C98A0 7C 03 24 AE */ lfdx f0, r3, r4
/* 800CC964 000C98A4 90 01 00 20 */ stw r0, 0x20(r1)
/* 800CC968 000C98A8 FC 41 01 3A */ fmadd f2, f1, f4, f0
/* 800CC96C 000C98AC C8 62 8E E0 */ lfd f3, lbl_80517240@sda21(r2)
/* 800CC970 000C98B0 C8 25 00 10 */ lfd f1, 0x10(r5)
/* 800CC974 000C98B4 C8 05 00 20 */ lfd f0, 0x20(r5)
/* 800CC978 000C98B8 FC 40 10 1E */ fctiwz f2, f2
/* 800CC97C 000C98BC D8 41 00 18 */ stfd f2, 0x18(r1)
/* 800CC980 000C98C0 80 C1 00 1C */ lwz r6, 0x1c(r1)
/* 800CC984 000C98C4 6C C0 80 00 */ xoris r0, r6, 0x8000
/* 800CC988 000C98C8 90 01 00 24 */ stw r0, 0x24(r1)
/* 800CC98C 000C98CC C8 41 00 20 */ lfd f2, 0x20(r1)
/* 800CC990 000C98D0 FC 42 18 28 */ fsub f2, f2, f3
/* 800CC994 000C98D4 FC E2 20 7C */ fnmsub f7, f2, f1, f4
/* 800CC998 000C98D8 FD 02 00 32 */ fmul f8, f2, f0
lbl_800CC99C:
/* 800CC99C 000C98DC FC 07 40 28 */ fsub f0, f7, f8
/* 800CC9A0 000C98E0 D8 01 00 08 */ stfd f0, 8(r1)
/* 800CC9A4 000C98E4 48 00 00 34 */ b lbl_800CC9D8
lbl_800CC9A8:
/* 800CC9A8 000C98E8 3C 00 3E 30 */ lis r0, 0x3e30
/* 800CC9AC 000C98EC 7C 04 00 40 */ cmplw r4, r0
/* 800CC9B0 000C98F0 40 80 00 24 */ bge lbl_800CC9D4
/* 800CC9B4 000C98F4 C8 22 8E 98 */ lfd f1, lbl_805171F8@sda21(r2)
/* 800CC9B8 000C98F8 C8 41 00 08 */ lfd f2, 8(r1)
/* 800CC9BC 000C98FC C8 02 8E A0 */ lfd f0, lbl_80517200@sda21(r2)
/* 800CC9C0 000C9900 FC 21 10 2A */ fadd f1, f1, f2
/* 800CC9C4 000C9904 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 800CC9C8 000C9908 40 81 00 10 */ ble lbl_800CC9D8
/* 800CC9CC 000C990C FC 20 10 2A */ fadd f1, f0, f2
/* 800CC9D0 000C9910 48 00 00 C4 */ b lbl_800CCA94
lbl_800CC9D4:
/* 800CC9D4 000C9914 38 C0 00 00 */ li r6, 0
lbl_800CC9D8:
/* 800CC9D8 000C9918 C8 A1 00 08 */ lfd f5, 8(r1)
/* 800CC9DC 000C991C 2C 06 00 00 */ cmpwi r6, 0
/* 800CC9E0 000C9920 C8 82 8E C8 */ lfd f4, lbl_80517228@sda21(r2)
/* 800CC9E4 000C9924 FC C5 01 72 */ fmul f6, f5, f5
/* 800CC9E8 000C9928 C8 62 8E C0 */ lfd f3, lbl_80517220@sda21(r2)
/* 800CC9EC 000C992C C8 42 8E B8 */ lfd f2, lbl_80517218@sda21(r2)
/* 800CC9F0 000C9930 C8 22 8E B0 */ lfd f1, lbl_80517210@sda21(r2)
/* 800CC9F4 000C9934 C8 02 8E A8 */ lfd f0, lbl_80517208@sda21(r2)
/* 800CC9F8 000C9938 FC 64 19 BA */ fmadd f3, f4, f6, f3
/* 800CC9FC 000C993C FC 46 10 FA */ fmadd f2, f6, f3, f2
/* 800CCA00 000C9940 FC 26 08 BA */ fmadd f1, f6, f2, f1
/* 800CCA04 000C9944 FC 06 00 7A */ fmadd f0, f6, f1, f0
/* 800CCA08 000C9948 FC 66 28 3C */ fnmsub f3, f6, f0, f5
/* 800CCA0C 000C994C 40 82 00 24 */ bne lbl_800CCA30
/* 800CCA10 000C9950 C8 02 8E D0 */ lfd f0, lbl_80517230@sda21(r2)
/* 800CCA14 000C9954 FC 25 00 F2 */ fmul f1, f5, f3
/* 800CCA18 000C9958 C8 42 8E A0 */ lfd f2, lbl_80517200@sda21(r2)
/* 800CCA1C 000C995C FC 03 00 28 */ fsub f0, f3, f0
/* 800CCA20 000C9960 FC 01 00 24 */ fdiv f0, f1, f0
/* 800CCA24 000C9964 FC 00 28 28 */ fsub f0, f0, f5
/* 800CCA28 000C9968 FC 22 00 28 */ fsub f1, f2, f0
/* 800CCA2C 000C996C 48 00 00 68 */ b lbl_800CCA94
lbl_800CCA30:
/* 800CCA30 000C9970 C8 02 8E D0 */ lfd f0, lbl_80517230@sda21(r2)
/* 800CCA34 000C9974 FC 25 00 F2 */ fmul f1, f5, f3
/* 800CCA38 000C9978 C8 42 8E A0 */ lfd f2, lbl_80517200@sda21(r2)
/* 800CCA3C 000C997C 2C 06 FC 03 */ cmpwi r6, -1021
/* 800CCA40 000C9980 FC 00 18 28 */ fsub f0, f0, f3
/* 800CCA44 000C9984 FC 01 00 24 */ fdiv f0, f1, f0
/* 800CCA48 000C9988 FC 08 00 28 */ fsub f0, f8, f0
/* 800CCA4C 000C998C FC 00 38 28 */ fsub f0, f0, f7
/* 800CCA50 000C9990 FC 02 00 28 */ fsub f0, f2, f0
/* 800CCA54 000C9994 D8 01 00 10 */ stfd f0, 0x10(r1)
/* 800CCA58 000C9998 41 80 00 1C */ blt lbl_800CCA74
/* 800CCA5C 000C999C 80 61 00 10 */ lwz r3, 0x10(r1)
/* 800CCA60 000C99A0 54 C0 A0 16 */ slwi r0, r6, 0x14
/* 800CCA64 000C99A4 7C 03 02 14 */ add r0, r3, r0
/* 800CCA68 000C99A8 90 01 00 10 */ stw r0, 0x10(r1)
/* 800CCA6C 000C99AC C8 21 00 10 */ lfd f1, 0x10(r1)
/* 800CCA70 000C99B0 48 00 00 24 */ b lbl_800CCA94
lbl_800CCA74:
/* 800CCA74 000C99B4 38 06 03 E8 */ addi r0, r6, 0x3e8
/* 800CCA78 000C99B8 80 61 00 10 */ lwz r3, 0x10(r1)
/* 800CCA7C 000C99BC 54 00 A0 16 */ slwi r0, r0, 0x14
/* 800CCA80 000C99C0 C8 22 8E D8 */ lfd f1, lbl_80517238@sda21(r2)
/* 800CCA84 000C99C4 7C 03 02 14 */ add r0, r3, r0
/* 800CCA88 000C99C8 90 01 00 10 */ stw r0, 0x10(r1)
/* 800CCA8C 000C99CC C8 01 00 10 */ lfd f0, 0x10(r1)
/* 800CCA90 000C99D0 FC 21 00 32 */ fmul f1, f1, f0
lbl_800CCA94:
/* 800CCA94 000C99D4 38 21 00 30 */ addi r1, r1, 0x30
/* 800CCA98 000C99D8 4E 80 00 20 */ blr

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.include "macros.inc"
.section .rodata # 0x804732E0 - 0x8049E220
.balign 0x8
.global Zero
Zero:
.4byte 0x00000000
.4byte 0x00000000
.4byte 0x80000000
.4byte 0x00000000
.section .text, "ax" # 0x800056C0 - 0x80472F00
.global __ieee754_fmod
__ieee754_fmod:
/* 800CCA9C 000C99DC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800CCAA0 000C99E0 D8 41 00 10 */ stfd f2, 0x10(r1)
/* 800CCAA4 000C99E4 D8 21 00 08 */ stfd f1, 8(r1)
/* 800CCAA8 000C99E8 81 41 00 10 */ lwz r10, 0x10(r1)
/* 800CCAAC 000C99EC 80 C1 00 08 */ lwz r6, 8(r1)
/* 800CCAB0 000C99F0 80 A1 00 14 */ lwz r5, 0x14(r1)
/* 800CCAB4 000C99F4 55 48 00 7E */ clrlwi r8, r10, 1
/* 800CCAB8 000C99F8 54 C0 00 00 */ rlwinm r0, r6, 0, 0, 0
/* 800CCABC 000C99FC 80 81 00 0C */ lwz r4, 0xc(r1)
/* 800CCAC0 000C9A00 7D 03 2B 79 */ or. r3, r8, r5
/* 800CCAC4 000C9A04 7C C7 02 78 */ xor r7, r6, r0
/* 800CCAC8 000C9A08 41 82 00 28 */ beq lbl_800CCAF0
/* 800CCACC 000C9A0C 3C C0 7F F0 */ lis r6, 0x7ff0
/* 800CCAD0 000C9A10 7C 07 30 00 */ cmpw r7, r6
/* 800CCAD4 000C9A14 40 80 00 1C */ bge lbl_800CCAF0
/* 800CCAD8 000C9A18 7C 65 00 D0 */ neg r3, r5
/* 800CCADC 000C9A1C 7C A3 1B 78 */ or r3, r5, r3
/* 800CCAE0 000C9A20 54 63 0F FE */ srwi r3, r3, 0x1f
/* 800CCAE4 000C9A24 7D 03 1B 78 */ or r3, r8, r3
/* 800CCAE8 000C9A28 7C 03 30 40 */ cmplw r3, r6
/* 800CCAEC 000C9A2C 40 81 00 18 */ ble lbl_800CCB04
lbl_800CCAF0:
/* 800CCAF0 000C9A30 C8 21 00 08 */ lfd f1, 8(r1)
/* 800CCAF4 000C9A34 C8 01 00 10 */ lfd f0, 0x10(r1)
/* 800CCAF8 000C9A38 FC 01 00 32 */ fmul f0, f1, f0
/* 800CCAFC 000C9A3C FC 20 00 24 */ fdiv f1, f0, f0
/* 800CCB00 000C9A40 48 00 02 D0 */ b lbl_800CCDD0
lbl_800CCB04:
/* 800CCB04 000C9A44 7C 07 40 00 */ cmpw r7, r8
/* 800CCB08 000C9A48 41 81 00 30 */ bgt lbl_800CCB38
/* 800CCB0C 000C9A4C 41 80 00 0C */ blt lbl_800CCB18
/* 800CCB10 000C9A50 7C 04 28 40 */ cmplw r4, r5
/* 800CCB14 000C9A54 40 80 00 0C */ bge lbl_800CCB20
lbl_800CCB18:
/* 800CCB18 000C9A58 C8 21 00 08 */ lfd f1, 8(r1)
/* 800CCB1C 000C9A5C 48 00 02 B4 */ b lbl_800CCDD0
lbl_800CCB20:
/* 800CCB20 000C9A60 40 82 00 18 */ bne lbl_800CCB38
/* 800CCB24 000C9A64 3C 60 80 48 */ lis r3, Zero@ha
/* 800CCB28 000C9A68 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 800CCB2C 000C9A6C 38 63 A1 68 */ addi r3, r3, Zero@l
/* 800CCB30 000C9A70 7C 23 04 AE */ lfdx f1, r3, r0
/* 800CCB34 000C9A74 48 00 02 9C */ b lbl_800CCDD0
lbl_800CCB38:
/* 800CCB38 000C9A78 3C 60 00 10 */ lis r3, 0x10
/* 800CCB3C 000C9A7C 7C 07 18 00 */ cmpw r7, r3
/* 800CCB40 000C9A80 40 80 00 4C */ bge lbl_800CCB8C
/* 800CCB44 000C9A84 2C 07 00 00 */ cmpwi r7, 0
/* 800CCB48 000C9A88 40 82 00 24 */ bne lbl_800CCB6C
/* 800CCB4C 000C9A8C 7C 83 23 78 */ mr r3, r4
/* 800CCB50 000C9A90 39 60 FB ED */ li r11, -1043
/* 800CCB54 000C9A94 48 00 00 0C */ b lbl_800CCB60
lbl_800CCB58:
/* 800CCB58 000C9A98 54 63 08 3C */ slwi r3, r3, 1
/* 800CCB5C 000C9A9C 39 6B FF FF */ addi r11, r11, -1
lbl_800CCB60:
/* 800CCB60 000C9AA0 2C 03 00 00 */ cmpwi r3, 0
/* 800CCB64 000C9AA4 41 81 FF F4 */ bgt lbl_800CCB58
/* 800CCB68 000C9AA8 48 00 00 2C */ b lbl_800CCB94
lbl_800CCB6C:
/* 800CCB6C 000C9AAC 54 E3 58 28 */ slwi r3, r7, 0xb
/* 800CCB70 000C9AB0 39 60 FC 02 */ li r11, -1022
/* 800CCB74 000C9AB4 48 00 00 0C */ b lbl_800CCB80
lbl_800CCB78:
/* 800CCB78 000C9AB8 54 63 08 3C */ slwi r3, r3, 1
/* 800CCB7C 000C9ABC 39 6B FF FF */ addi r11, r11, -1
lbl_800CCB80:
/* 800CCB80 000C9AC0 2C 03 00 00 */ cmpwi r3, 0
/* 800CCB84 000C9AC4 41 81 FF F4 */ bgt lbl_800CCB78
/* 800CCB88 000C9AC8 48 00 00 0C */ b lbl_800CCB94
lbl_800CCB8C:
/* 800CCB8C 000C9ACC 7C E3 A6 70 */ srawi r3, r7, 0x14
/* 800CCB90 000C9AD0 39 63 FC 01 */ addi r11, r3, -1023
lbl_800CCB94:
/* 800CCB94 000C9AD4 3C 60 00 10 */ lis r3, 0x10
/* 800CCB98 000C9AD8 7C 08 18 00 */ cmpw r8, r3
/* 800CCB9C 000C9ADC 40 80 00 4C */ bge lbl_800CCBE8
/* 800CCBA0 000C9AE0 2C 08 00 00 */ cmpwi r8, 0
/* 800CCBA4 000C9AE4 40 82 00 24 */ bne lbl_800CCBC8
/* 800CCBA8 000C9AE8 7C A6 2B 78 */ mr r6, r5
/* 800CCBAC 000C9AEC 38 60 FB ED */ li r3, -1043
/* 800CCBB0 000C9AF0 48 00 00 0C */ b lbl_800CCBBC
lbl_800CCBB4:
/* 800CCBB4 000C9AF4 54 C6 08 3C */ slwi r6, r6, 1
/* 800CCBB8 000C9AF8 38 63 FF FF */ addi r3, r3, -1
lbl_800CCBBC:
/* 800CCBBC 000C9AFC 2C 06 00 00 */ cmpwi r6, 0
/* 800CCBC0 000C9B00 41 81 FF F4 */ bgt lbl_800CCBB4
/* 800CCBC4 000C9B04 48 00 00 2C */ b lbl_800CCBF0
lbl_800CCBC8:
/* 800CCBC8 000C9B08 55 06 58 28 */ slwi r6, r8, 0xb
/* 800CCBCC 000C9B0C 38 60 FC 02 */ li r3, -1022
/* 800CCBD0 000C9B10 48 00 00 0C */ b lbl_800CCBDC
lbl_800CCBD4:
/* 800CCBD4 000C9B14 54 C6 08 3C */ slwi r6, r6, 1
/* 800CCBD8 000C9B18 38 63 FF FF */ addi r3, r3, -1
lbl_800CCBDC:
/* 800CCBDC 000C9B1C 2C 06 00 00 */ cmpwi r6, 0
/* 800CCBE0 000C9B20 41 81 FF F4 */ bgt lbl_800CCBD4
/* 800CCBE4 000C9B24 48 00 00 0C */ b lbl_800CCBF0
lbl_800CCBE8:
/* 800CCBE8 000C9B28 7D 03 A6 70 */ srawi r3, r8, 0x14
/* 800CCBEC 000C9B2C 38 63 FC 01 */ addi r3, r3, -1023
lbl_800CCBF0:
/* 800CCBF0 000C9B30 2C 0B FC 02 */ cmpwi r11, -1022
/* 800CCBF4 000C9B34 41 80 00 10 */ blt lbl_800CCC04
/* 800CCBF8 000C9B38 54 E6 03 3E */ clrlwi r6, r7, 0xc
/* 800CCBFC 000C9B3C 64 C9 00 10 */ oris r9, r6, 0x10
/* 800CCC00 000C9B40 48 00 00 34 */ b lbl_800CCC34
lbl_800CCC04:
/* 800CCC04 000C9B44 21 2B FC 02 */ subfic r9, r11, -1022
/* 800CCC08 000C9B48 2C 09 00 1F */ cmpwi r9, 0x1f
/* 800CCC0C 000C9B4C 41 81 00 1C */ bgt lbl_800CCC28
/* 800CCC10 000C9B50 20 C9 00 20 */ subfic r6, r9, 0x20
/* 800CCC14 000C9B54 7C E7 48 30 */ slw r7, r7, r9
/* 800CCC18 000C9B58 7C 86 34 30 */ srw r6, r4, r6
/* 800CCC1C 000C9B5C 7C 84 48 30 */ slw r4, r4, r9
/* 800CCC20 000C9B60 7C E9 33 78 */ or r9, r7, r6
/* 800CCC24 000C9B64 48 00 00 10 */ b lbl_800CCC34
lbl_800CCC28:
/* 800CCC28 000C9B68 38 C9 FF E0 */ addi r6, r9, -32
/* 800CCC2C 000C9B6C 7C 89 30 30 */ slw r9, r4, r6
/* 800CCC30 000C9B70 38 80 00 00 */ li r4, 0
lbl_800CCC34:
/* 800CCC34 000C9B74 2C 03 FC 02 */ cmpwi r3, -1022
/* 800CCC38 000C9B78 41 80 00 10 */ blt lbl_800CCC48
/* 800CCC3C 000C9B7C 55 46 03 3E */ clrlwi r6, r10, 0xc
/* 800CCC40 000C9B80 64 C7 00 10 */ oris r7, r6, 0x10
/* 800CCC44 000C9B84 48 00 00 34 */ b lbl_800CCC78
lbl_800CCC48:
/* 800CCC48 000C9B88 21 43 FC 02 */ subfic r10, r3, -1022
/* 800CCC4C 000C9B8C 2C 0A 00 1F */ cmpwi r10, 0x1f
/* 800CCC50 000C9B90 41 81 00 1C */ bgt lbl_800CCC6C
/* 800CCC54 000C9B94 20 CA 00 20 */ subfic r6, r10, 0x20
/* 800CCC58 000C9B98 7D 07 50 30 */ slw r7, r8, r10
/* 800CCC5C 000C9B9C 7C A6 34 30 */ srw r6, r5, r6
/* 800CCC60 000C9BA0 7C A5 50 30 */ slw r5, r5, r10
/* 800CCC64 000C9BA4 7C E7 33 78 */ or r7, r7, r6
/* 800CCC68 000C9BA8 48 00 00 10 */ b lbl_800CCC78
lbl_800CCC6C:
/* 800CCC6C 000C9BAC 38 CA FF E0 */ addi r6, r10, -32
/* 800CCC70 000C9BB0 7C A7 30 30 */ slw r7, r5, r6
/* 800CCC74 000C9BB4 38 A0 00 00 */ li r5, 0
lbl_800CCC78:
/* 800CCC78 000C9BB8 7C C3 58 51 */ subf. r6, r3, r11
/* 800CCC7C 000C9BBC 7C C9 03 A6 */ mtctr r6
/* 800CCC80 000C9BC0 41 82 00 64 */ beq lbl_800CCCE4
lbl_800CCC84:
/* 800CCC84 000C9BC4 7C 04 28 40 */ cmplw r4, r5
/* 800CCC88 000C9BC8 7D 07 48 50 */ subf r8, r7, r9
/* 800CCC8C 000C9BCC 7D 45 20 50 */ subf r10, r5, r4
/* 800CCC90 000C9BD0 40 80 00 08 */ bge lbl_800CCC98
/* 800CCC94 000C9BD4 39 08 FF FF */ addi r8, r8, -1
lbl_800CCC98:
/* 800CCC98 000C9BD8 2C 08 00 00 */ cmpwi r8, 0
/* 800CCC9C 000C9BDC 40 80 00 18 */ bge lbl_800CCCB4
/* 800CCCA0 000C9BE0 54 86 0F FE */ srwi r6, r4, 0x1f
/* 800CCCA4 000C9BE4 7C 84 22 14 */ add r4, r4, r4
/* 800CCCA8 000C9BE8 7C C9 32 14 */ add r6, r9, r6
/* 800CCCAC 000C9BEC 7D 29 32 14 */ add r9, r9, r6
/* 800CCCB0 000C9BF0 48 00 00 30 */ b lbl_800CCCE0
lbl_800CCCB4:
/* 800CCCB4 000C9BF4 7D 04 53 79 */ or. r4, r8, r10
/* 800CCCB8 000C9BF8 40 82 00 18 */ bne lbl_800CCCD0
/* 800CCCBC 000C9BFC 3C 60 80 48 */ lis r3, Zero@ha
/* 800CCCC0 000C9C00 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 800CCCC4 000C9C04 38 63 A1 68 */ addi r3, r3, Zero@l
/* 800CCCC8 000C9C08 7C 23 04 AE */ lfdx f1, r3, r0
/* 800CCCCC 000C9C0C 48 00 01 04 */ b lbl_800CCDD0
lbl_800CCCD0:
/* 800CCCD0 000C9C10 55 46 0F FE */ srwi r6, r10, 0x1f
/* 800CCCD4 000C9C14 7C 8A 52 14 */ add r4, r10, r10
/* 800CCCD8 000C9C18 7D 28 32 14 */ add r9, r8, r6
/* 800CCCDC 000C9C1C 7D 28 4A 14 */ add r9, r8, r9
lbl_800CCCE0:
/* 800CCCE0 000C9C20 42 00 FF A4 */ bdnz lbl_800CCC84
lbl_800CCCE4:
/* 800CCCE4 000C9C24 7C 04 28 40 */ cmplw r4, r5
/* 800CCCE8 000C9C28 7C C7 48 50 */ subf r6, r7, r9
/* 800CCCEC 000C9C2C 7C A5 20 50 */ subf r5, r5, r4
/* 800CCCF0 000C9C30 40 80 00 08 */ bge lbl_800CCCF8
/* 800CCCF4 000C9C34 38 C6 FF FF */ addi r6, r6, -1
lbl_800CCCF8:
/* 800CCCF8 000C9C38 2C 06 00 00 */ cmpwi r6, 0
/* 800CCCFC 000C9C3C 41 80 00 0C */ blt lbl_800CCD08
/* 800CCD00 000C9C40 7C C9 33 78 */ mr r9, r6
/* 800CCD04 000C9C44 7C A4 2B 78 */ mr r4, r5
lbl_800CCD08:
/* 800CCD08 000C9C48 7D 25 23 79 */ or. r5, r9, r4
/* 800CCD0C 000C9C4C 40 82 00 18 */ bne lbl_800CCD24
/* 800CCD10 000C9C50 3C 60 80 48 */ lis r3, Zero@ha
/* 800CCD14 000C9C54 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 800CCD18 000C9C58 38 63 A1 68 */ addi r3, r3, Zero@l
/* 800CCD1C 000C9C5C 7C 23 04 AE */ lfdx f1, r3, r0
/* 800CCD20 000C9C60 48 00 00 B0 */ b lbl_800CCDD0
lbl_800CCD24:
/* 800CCD24 000C9C64 3C A0 00 10 */ lis r5, 0x10
/* 800CCD28 000C9C68 48 00 00 18 */ b lbl_800CCD40
lbl_800CCD2C:
/* 800CCD2C 000C9C6C 54 86 0F FE */ srwi r6, r4, 0x1f
/* 800CCD30 000C9C70 7C 84 22 14 */ add r4, r4, r4
/* 800CCD34 000C9C74 7C C9 32 14 */ add r6, r9, r6
/* 800CCD38 000C9C78 38 63 FF FF */ addi r3, r3, -1
/* 800CCD3C 000C9C7C 7D 29 32 14 */ add r9, r9, r6
lbl_800CCD40:
/* 800CCD40 000C9C80 7C 09 28 00 */ cmpw r9, r5
/* 800CCD44 000C9C84 41 80 FF E8 */ blt lbl_800CCD2C
/* 800CCD48 000C9C88 2C 03 FC 02 */ cmpwi r3, -1022
/* 800CCD4C 000C9C8C 41 80 00 24 */ blt lbl_800CCD70
/* 800CCD50 000C9C90 38 63 03 FF */ addi r3, r3, 0x3ff
/* 800CCD54 000C9C94 3C A9 FF F0 */ addis r5, r9, 0xfff0
/* 800CCD58 000C9C98 54 63 A0 16 */ slwi r3, r3, 0x14
/* 800CCD5C 000C9C9C 90 81 00 0C */ stw r4, 0xc(r1)
/* 800CCD60 000C9CA0 7C A3 1B 78 */ or r3, r5, r3
/* 800CCD64 000C9CA4 7C 60 03 78 */ or r0, r3, r0
/* 800CCD68 000C9CA8 90 01 00 08 */ stw r0, 8(r1)
/* 800CCD6C 000C9CAC 48 00 00 60 */ b lbl_800CCDCC
lbl_800CCD70:
/* 800CCD70 000C9CB0 20 C3 FC 02 */ subfic r6, r3, -1022
/* 800CCD74 000C9CB4 2C 06 00 14 */ cmpwi r6, 0x14
/* 800CCD78 000C9CB8 41 81 00 1C */ bgt lbl_800CCD94
/* 800CCD7C 000C9CBC 20 66 00 20 */ subfic r3, r6, 0x20
/* 800CCD80 000C9CC0 7C 84 34 30 */ srw r4, r4, r6
/* 800CCD84 000C9CC4 7D 23 18 30 */ slw r3, r9, r3
/* 800CCD88 000C9CC8 7D 29 36 30 */ sraw r9, r9, r6
/* 800CCD8C 000C9CCC 7C 83 1B 78 */ or r3, r4, r3
/* 800CCD90 000C9CD0 48 00 00 30 */ b lbl_800CCDC0
lbl_800CCD94:
/* 800CCD94 000C9CD4 2C 06 00 1F */ cmpwi r6, 0x1f
/* 800CCD98 000C9CD8 41 81 00 1C */ bgt lbl_800CCDB4
/* 800CCD9C 000C9CDC 20 A6 00 20 */ subfic r5, r6, 0x20
/* 800CCDA0 000C9CE0 7C 83 34 30 */ srw r3, r4, r6
/* 800CCDA4 000C9CE4 7D 24 28 30 */ slw r4, r9, r5
/* 800CCDA8 000C9CE8 7C 09 03 78 */ mr r9, r0
/* 800CCDAC 000C9CEC 7C 83 1B 78 */ or r3, r4, r3
/* 800CCDB0 000C9CF0 48 00 00 10 */ b lbl_800CCDC0
lbl_800CCDB4:
/* 800CCDB4 000C9CF4 38 66 FF E0 */ addi r3, r6, -32
/* 800CCDB8 000C9CF8 7D 23 1E 30 */ sraw r3, r9, r3
/* 800CCDBC 000C9CFC 7C 09 03 78 */ mr r9, r0
lbl_800CCDC0:
/* 800CCDC0 000C9D00 7D 20 03 78 */ or r0, r9, r0
/* 800CCDC4 000C9D04 90 61 00 0C */ stw r3, 0xc(r1)
/* 800CCDC8 000C9D08 90 01 00 08 */ stw r0, 8(r1)
lbl_800CCDCC:
/* 800CCDCC 000C9D0C C8 21 00 08 */ lfd f1, 8(r1)
lbl_800CCDD0:
/* 800CCDD0 000C9D10 38 21 00 20 */ addi r1, r1, 0x20
/* 800CCDD4 000C9D14 4E 80 00 20 */ blr

View File

@ -305,8 +305,8 @@ DOLPHIN:=\
$(BUILD_DIR)/asm/Dolphin/uart_console_io_gcn.o\
$(BUILD_DIR)/asm/Dolphin/e_asin.o\
$(BUILD_DIR)/asm/Dolphin/e_atan2.o\
$(BUILD_DIR)/asm/Dolphin/e_exp.o\
$(BUILD_DIR)/asm/Dolphin/e_fmod.o\
$(BUILD_DIR)/src/Dolphin/e_exp.o\
$(BUILD_DIR)/src/Dolphin/e_fmod.o\
$(BUILD_DIR)/asm/Dolphin/e_log.o\
$(BUILD_DIR)/asm/Dolphin/e_log10.o\
$(BUILD_DIR)/asm/Dolphin/e_pow.o\

View File

@ -1,176 +1,156 @@
/* @(#)e_exp.c 1.6 04/04/22 */
/*
* --INFO--
* Address: 800CC878
* Size: 000224
* ====================================================
* Copyright (C) 2004 by Sun Microsystems, Inc. All rights reserved.
*
* Permission to use, copy, modify, and distribute this
* software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
void __ieee754_exp(void)
/* __ieee754_exp(x)
* Returns the exponential of x.
*
* Method
* 1. Argument reduction:
* Reduce x to an r so that |r| <= 0.5*ln2 ~ 0.34658.
* Given x, find r and integer k such that
*
* x = k*ln2 + r, |r| <= 0.5*ln2.
*
* Here r will be represented as r = hi-lo for better
* accuracy.
*
* 2. Approximation of exp(r) by a special rational function on
* the interval [0,0.34658]:
* Write
* R(r**2) = r*(exp(r)+1)/(exp(r)-1) = 2 + r*r/6 - r**4/360 + ...
* We use a special Remes algorithm on [0,0.34658] to generate
* a polynomial of degree 5 to approximate R. The maximum error
* of this polynomial approximation is bounded by 2**-59. In
* other words,
* R(z) ~ 2.0 + P1*z + P2*z**2 + P3*z**3 + P4*z**4 + P5*z**5
* (where z=r*r, and the values of P1 to P5 are listed below)
* and
* | 5 | -59
* | 2.0+P1*z+...+P5*z - R(z) | <= 2
* | |
* The computation of exp(r) thus becomes
* 2*r
* exp(r) = 1 + -------
* R - r
* r*R1(r)
* = 1 + r + ----------- (for better accuracy)
* 2 - R1(r)
* where
* 2 4 10
* R1(r) = r - (P1*r + P2*r + ... + P5*r ).
*
* 3. Scale back to obtain exp(x):
* From step 1, we have
* exp(x) = 2^k * exp(r)
*
* Special cases:
* exp(INF) is INF, exp(NaN) is NaN;
* exp(-INF) is 0, and
* for finite argument, only exp(0)=1 is exact.
*
* Accuracy:
* according to an error analysis, the error is always less than
* 1 ulp (unit in the last place).
*
* Misc. info.
* For IEEE double
* if x > 7.09782712893383973096e+02 then exp(x) overflow
* if x < -7.45133219101941108420e+02 then exp(x) underflow
*
* Constants:
* The hexadecimal values are the intended ones for the following
* constants. The decimal values may be used, provided that the
* compiler will convert from decimal to binary accurately enough
* to produce the hexadecimal values shown.
*/
#include "fdlibm.h"
#ifdef __STDC__
static const double
#else
static double
#endif
one = 1.0,
halF[2] = {0.5,-0.5,},
huge = 1.0e+300,
twom1000= 9.33263618503218878990e-302, /* 2**-1000=0x01700000,0*/
o_threshold= 7.09782712893383973096e+02, /* 0x40862E42, 0xFEFA39EF */
u_threshold= -7.45133219101941108420e+02, /* 0xc0874910, 0xD52D3051 */
ln2HI[2] ={ 6.93147180369123816490e-01, /* 0x3fe62e42, 0xfee00000 */
-6.93147180369123816490e-01,},/* 0xbfe62e42, 0xfee00000 */
ln2LO[2] ={ 1.90821492927058770002e-10, /* 0x3dea39ef, 0x35793c76 */
-1.90821492927058770002e-10,},/* 0xbdea39ef, 0x35793c76 */
invln2 = 1.44269504088896338700e+00, /* 0x3ff71547, 0x652b82fe */
P1 = 1.66666666666666019037e-01, /* 0x3FC55555, 0x5555553E */
P2 = -2.77777777770155933842e-03, /* 0xBF66C16C, 0x16BEBD93 */
P3 = 6.61375632143793436117e-05, /* 0x3F11566A, 0xAF25DE2C */
P4 = -1.65339022054652515390e-06, /* 0xBEBBBD41, 0xC5D26BF1 */
P5 = 4.13813679705723846039e-08; /* 0x3E663769, 0x72BEA4D0 */
#ifdef __STDC__
double __ieee754_exp(double x) /* default IEEE double exp */
#else
double __ieee754_exp(x) /* default IEEE double exp */
double x;
#endif
{
/*
.loc_0x0:
stwu r1, -0x30(r1)
lis r3, 0x4086
lis r4, 0x8048
stfd f1, 0x8(r1)
addi r0, r3, 0x2E42
subi r5, r4, 0x5EC8
lwz r8, 0x8(r1)
rlwinm r4,r8,0,1,31
rlwinm r7,r8,1,31,31
cmplw r4, r0
blt- .loc_0x8C
lis r0, 0x7FF0
cmplw r4, r0
blt- .loc_0x64
lwz r0, 0xC(r1)
rlwinm r3,r8,0,12,31
or. r0, r3, r0
beq- .loc_0x50
fadd f1, f1, f1
b .loc_0x21C
double y,hi,lo,c,t;
int k,xsb;
unsigned hx;
.loc_0x50:
cmpwi r7, 0
bne- .loc_0x5C
b .loc_0x21C
hx = __HI(x); /* high word of x */
xsb = (hx>>31)&1; /* sign bit of x */
hx &= 0x7fffffff; /* high word of |x| */
.loc_0x5C:
lfd f1, -0x7190(r2)
b .loc_0x21C
/* filter out non-finite argument */
if(hx >= 0x40862E42) { /* if |x|>=709.78... */
if(hx>=0x7ff00000) {
if(((hx&0xfffff)|__LO(x))!=0)
return x+x; /* NaN */
else return (xsb==0)? x:0.0; /* exp(+-inf)={inf,0} */
}
if(x > o_threshold) return huge*huge; /* overflow */
if(x < u_threshold) return twom1000*twom1000; /* underflow */
}
.loc_0x64:
lfd f0, -0x7188(r2)
fcmpo cr0, f1, f0
ble- .loc_0x78
lfd f1, -0x7180(r2)
b .loc_0x21C
/* argument reduction */
if(hx > 0x3fd62e42) { /* if |x| > 0.5 ln2 */
if(hx < 0x3FF0A2B2) { /* and |x| < 1.5 ln2 */
hi = x-ln2HI[xsb]; lo=ln2LO[xsb]; k = 1-xsb-xsb;
} else {
k = (int)(invln2*x+halF[xsb]);
t = k;
hi = x - t*ln2HI[0]; /* t*ln2HI is exact here */
lo = t*ln2LO[0];
}
x = hi - lo;
}
else if(hx < 0x3e300000) { /* when |x|<2**-28 */
if(huge+x>one) return one+x;/* trigger inexact */
}
else k = 0;
.loc_0x78:
lfd f0, -0x7178(r2)
fcmpo cr0, f1, f0
bge- .loc_0x8C
lfd f1, -0x7190(r2)
b .loc_0x21C
.loc_0x8C:
lis r3, 0x3FD6
addi r0, r3, 0x2E42
cmplw r4, r0
ble- .loc_0x130
lis r3, 0x3FF1
subi r0, r3, 0x5D4E
cmplw r4, r0
bge- .loc_0xD4
rlwinm r6,r7,3,0,28
addi r4, r5, 0x10
lfd f1, 0x8(r1)
addi r3, r5, 0x20
lfdx f0, r4, r6
subfic r0, r7, 0x1
lfdx f8, r3, r6
sub r6, r0, r7
fsub f7, f1, f0
b .loc_0x124
.loc_0xD4:
rlwinm r4,r7,3,0,28
addi r3, r5, 0
lfd f1, -0x7170(r2)
lis r0, 0x4330
lfd f4, 0x8(r1)
lfdx f0, r3, r4
stw r0, 0x20(r1)
fmadd f2, f1, f4, f0
lfd f3, -0x7120(r2)
lfd f1, 0x10(r5)
lfd f0, 0x20(r5)
fctiwz f2, f2
stfd f2, 0x18(r1)
lwz r6, 0x1C(r1)
xoris r0, r6, 0x8000
stw r0, 0x24(r1)
lfd f2, 0x20(r1)
fsub f2, f2, f3
fnmsub f7, f2, f1, f4
fmul f8, f2, f0
.loc_0x124:
fsub f0, f7, f8
stfd f0, 0x8(r1)
b .loc_0x160
.loc_0x130:
lis r0, 0x3E30
cmplw r4, r0
bge- .loc_0x15C
lfd f1, -0x7168(r2)
lfd f2, 0x8(r1)
lfd f0, -0x7160(r2)
fadd f1, f1, f2
fcmpo cr0, f1, f0
ble- .loc_0x160
fadd f1, f0, f2
b .loc_0x21C
.loc_0x15C:
li r6, 0
.loc_0x160:
lfd f5, 0x8(r1)
cmpwi r6, 0
lfd f4, -0x7138(r2)
fmul f6, f5, f5
lfd f3, -0x7140(r2)
lfd f2, -0x7148(r2)
lfd f1, -0x7150(r2)
lfd f0, -0x7158(r2)
fmadd f3, f4, f6, f3
fmadd f2, f6, f3, f2
fmadd f1, f6, f2, f1
fmadd f0, f6, f1, f0
fnmsub f3, f6, f0, f5
bne- .loc_0x1B8
lfd f0, -0x7130(r2)
fmul f1, f5, f3
lfd f2, -0x7160(r2)
fsub f0, f3, f0
fdiv f0, f1, f0
fsub f0, f0, f5
fsub f1, f2, f0
b .loc_0x21C
.loc_0x1B8:
lfd f0, -0x7130(r2)
fmul f1, f5, f3
lfd f2, -0x7160(r2)
cmpwi r6, -0x3FD
fsub f0, f0, f3
fdiv f0, f1, f0
fsub f0, f8, f0
fsub f0, f0, f7
fsub f0, f2, f0
stfd f0, 0x10(r1)
blt- .loc_0x1FC
lwz r3, 0x10(r1)
rlwinm r0,r6,20,0,11
add r0, r3, r0
stw r0, 0x10(r1)
lfd f1, 0x10(r1)
b .loc_0x21C
.loc_0x1FC:
addi r0, r6, 0x3E8
lwz r3, 0x10(r1)
rlwinm r0,r0,20,0,11
lfd f1, -0x7128(r2)
add r0, r3, r0
stw r0, 0x10(r1)
lfd f0, 0x10(r1)
fmul f1, f1, f0
.loc_0x21C:
addi r1, r1, 0x30
blr
*/
}
/* x is now in primary range */
t = x*x;
c = x - t*(P1+t*(P2+t*(P3+t*(P4+t*P5))));
if(k==0) return one-((x*c)/(c-2.0)-x);
else y = one-((lo-(x*c)/(2.0-c))-hi);
if(k >= -1021) {
__HI(y) += (k<<20); /* add k to y's exponent */
return y;
} else {
__HI(y) += ((k+1000)<<20);/* add k to y's exponent */
return y*twom1000;
}
}

View File

@ -1,304 +1,140 @@
/* @(#)e_fmod.c 1.3 95/01/18 */
/*
* --INFO--
* Address: 800CCA9C
* Size: 00033C
* ====================================================
* Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
*
* Developed at SunSoft, a Sun Microsystems, Inc. business.
* Permission to use, copy, modify, and distribute this
* software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
void __ieee754_fmod(void)
/*
* __ieee754_fmod(x,y)
* Return x mod y in exact arithmetic
* Method: shift and subtract
*/
#include "fdlibm.h"
#ifdef __STDC__
static const double one = 1.0, Zero[] = {0.0, -0.0,};
#else
static double one = 1.0, Zero[] = {0.0, -0.0,};
#endif
#ifdef __STDC__
double __ieee754_fmod(double x, double y)
#else
double __ieee754_fmod(x,y)
double x,y ;
#endif
{
/*
.loc_0x0:
stwu r1, -0x20(r1)
stfd f2, 0x10(r1)
stfd f1, 0x8(r1)
lwz r10, 0x10(r1)
lwz r6, 0x8(r1)
lwz r5, 0x14(r1)
rlwinm r8,r10,0,1,31
rlwinm r0,r6,0,0,0
lwz r4, 0xC(r1)
or. r3, r8, r5
xor r7, r6, r0
beq- .loc_0x54
lis r6, 0x7FF0
cmpw r7, r6
bge- .loc_0x54
neg r3, r5
or r3, r5, r3
rlwinm r3,r3,1,31,31
or r3, r8, r3
cmplw r3, r6
ble- .loc_0x68
int n,hx,hy,hz,ix,iy,sx,i;
unsigned lx,ly,lz;
.loc_0x54:
lfd f1, 0x8(r1)
lfd f0, 0x10(r1)
fmul f0, f1, f0
fdiv f1, f0, f0
b .loc_0x334
hx = __HI(x); /* high word of x */
lx = __LO(x); /* low word of x */
hy = __HI(y); /* high word of y */
ly = __LO(y); /* low word of y */
sx = hx&0x80000000; /* sign of x */
hx ^=sx; /* |x| */
hy &= 0x7fffffff; /* |y| */
.loc_0x68:
cmpw r7, r8
bgt- .loc_0x9C
blt- .loc_0x7C
cmplw r4, r5
bge- .loc_0x84
/* purge off exception values */
if((hy|ly)==0||(hx>=0x7ff00000)|| /* y=0,or x not finite */
((hy|((ly|-ly)>>31))>0x7ff00000)) /* or y is NaN */
return (x*y)/(x*y);
if(hx<=hy) {
if((hx<hy)||(lx<ly)) return x; /* |x|<|y| return x */
if(lx==ly)
return Zero[(unsigned)sx>>31]; /* |x|=|y| return x*0*/
}
.loc_0x7C:
lfd f1, 0x8(r1)
b .loc_0x334
/* determine ix = ilogb(x) */
if(hx<0x00100000) { /* subnormal x */
if(hx==0) {
for (ix = -1043, i=lx; i>0; i<<=1) ix -=1;
} else {
for (ix = -1022,i=(hx<<11); i>0; i<<=1) ix -=1;
}
} else ix = (hx>>20)-1023;
.loc_0x84:
bne- .loc_0x9C
lis r3, 0x8048
rlwinm r0,r0,4,28,28
subi r3, r3, 0x5E98
lfdx f1, r3, r0
b .loc_0x334
/* determine iy = ilogb(y) */
if(hy<0x00100000) { /* subnormal y */
if(hy==0) {
for (iy = -1043, i=ly; i>0; i<<=1) iy -=1;
} else {
for (iy = -1022,i=(hy<<11); i>0; i<<=1) iy -=1;
}
} else iy = (hy>>20)-1023;
.loc_0x9C:
lis r3, 0x10
cmpw r7, r3
bge- .loc_0xF0
cmpwi r7, 0
bne- .loc_0xD0
mr r3, r4
li r11, -0x413
b .loc_0xC4
/* set up {hx,lx}, {hy,ly} and align y to x */
if(ix >= -1022)
hx = 0x00100000|(0x000fffff&hx);
else { /* subnormal x, shift x to normal */
n = -1022-ix;
if(n<=31) {
hx = (hx<<n)|(lx>>(32-n));
lx <<= n;
} else {
hx = lx<<(n-32);
lx = 0;
}
}
if(iy >= -1022)
hy = 0x00100000|(0x000fffff&hy);
else { /* subnormal y, shift y to normal */
n = -1022-iy;
if(n<=31) {
hy = (hy<<n)|(ly>>(32-n));
ly <<= n;
} else {
hy = ly<<(n-32);
ly = 0;
}
}
.loc_0xBC:
rlwinm r3,r3,1,0,30
subi r11, r11, 0x1
/* fix point fmod */
n = ix - iy;
while(n--) {
hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1;
if(hz<0){hx = hx+hx+(lx>>31); lx = lx+lx;}
else {
if((hz|lz)==0) /* return sign(x)*0 */
return Zero[(unsigned)sx>>31];
hx = hz+hz+(lz>>31); lx = lz+lz;
}
}
hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1;
if(hz>=0) {hx=hz;lx=lz;}
.loc_0xC4:
cmpwi r3, 0
bgt+ .loc_0xBC
b .loc_0xF8
.loc_0xD0:
rlwinm r3,r7,11,0,20
li r11, -0x3FE
b .loc_0xE4
.loc_0xDC:
rlwinm r3,r3,1,0,30
subi r11, r11, 0x1
.loc_0xE4:
cmpwi r3, 0
bgt+ .loc_0xDC
b .loc_0xF8
.loc_0xF0:
srawi r3, r7, 0x14
subi r11, r3, 0x3FF
.loc_0xF8:
lis r3, 0x10
cmpw r8, r3
bge- .loc_0x14C
cmpwi r8, 0
bne- .loc_0x12C
mr r6, r5
li r3, -0x413
b .loc_0x120
.loc_0x118:
rlwinm r6,r6,1,0,30
subi r3, r3, 0x1
.loc_0x120:
cmpwi r6, 0
bgt+ .loc_0x118
b .loc_0x154
.loc_0x12C:
rlwinm r6,r8,11,0,20
li r3, -0x3FE
b .loc_0x140
.loc_0x138:
rlwinm r6,r6,1,0,30
subi r3, r3, 0x1
.loc_0x140:
cmpwi r6, 0
bgt+ .loc_0x138
b .loc_0x154
.loc_0x14C:
srawi r3, r8, 0x14
subi r3, r3, 0x3FF
.loc_0x154:
cmpwi r11, -0x3FE
blt- .loc_0x168
rlwinm r6,r7,0,12,31
oris r9, r6, 0x10
b .loc_0x198
.loc_0x168:
subfic r9, r11, -0x3FE
cmpwi r9, 0x1F
bgt- .loc_0x18C
subfic r6, r9, 0x20
slw r7, r7, r9
srw r6, r4, r6
slw r4, r4, r9
or r9, r7, r6
b .loc_0x198
.loc_0x18C:
subi r6, r9, 0x20
slw r9, r4, r6
li r4, 0
.loc_0x198:
cmpwi r3, -0x3FE
blt- .loc_0x1AC
rlwinm r6,r10,0,12,31
oris r7, r6, 0x10
b .loc_0x1DC
.loc_0x1AC:
subfic r10, r3, -0x3FE
cmpwi r10, 0x1F
bgt- .loc_0x1D0
subfic r6, r10, 0x20
slw r7, r8, r10
srw r6, r5, r6
slw r5, r5, r10
or r7, r7, r6
b .loc_0x1DC
.loc_0x1D0:
subi r6, r10, 0x20
slw r7, r5, r6
li r5, 0
.loc_0x1DC:
sub. r6, r11, r3
mtctr r6
beq- .loc_0x248
.loc_0x1E8:
cmplw r4, r5
sub r8, r9, r7
sub r10, r4, r5
bge- .loc_0x1FC
subi r8, r8, 0x1
.loc_0x1FC:
cmpwi r8, 0
bge- .loc_0x218
rlwinm r6,r4,1,31,31
add r4, r4, r4
add r6, r9, r6
add r9, r9, r6
b .loc_0x244
.loc_0x218:
or. r4, r8, r10
bne- .loc_0x234
lis r3, 0x8048
rlwinm r0,r0,4,28,28
subi r3, r3, 0x5E98
lfdx f1, r3, r0
b .loc_0x334
.loc_0x234:
rlwinm r6,r10,1,31,31
add r4, r10, r10
add r9, r8, r6
add r9, r8, r9
.loc_0x244:
bdnz+ .loc_0x1E8
.loc_0x248:
cmplw r4, r5
sub r6, r9, r7
sub r5, r4, r5
bge- .loc_0x25C
subi r6, r6, 0x1
.loc_0x25C:
cmpwi r6, 0
blt- .loc_0x26C
mr r9, r6
mr r4, r5
.loc_0x26C:
or. r5, r9, r4
bne- .loc_0x288
lis r3, 0x8048
rlwinm r0,r0,4,28,28
subi r3, r3, 0x5E98
lfdx f1, r3, r0
b .loc_0x334
.loc_0x288:
lis r5, 0x10
b .loc_0x2A4
.loc_0x290:
rlwinm r6,r4,1,31,31
add r4, r4, r4
add r6, r9, r6
subi r3, r3, 0x1
add r9, r9, r6
.loc_0x2A4:
cmpw r9, r5
blt+ .loc_0x290
cmpwi r3, -0x3FE
blt- .loc_0x2D4
addi r3, r3, 0x3FF
subis r5, r9, 0x10
rlwinm r3,r3,20,0,11
stw r4, 0xC(r1)
or r3, r5, r3
or r0, r3, r0
stw r0, 0x8(r1)
b .loc_0x330
.loc_0x2D4:
subfic r6, r3, -0x3FE
cmpwi r6, 0x14
bgt- .loc_0x2F8
subfic r3, r6, 0x20
srw r4, r4, r6
slw r3, r9, r3
sraw r9, r9, r6
or r3, r4, r3
b .loc_0x324
.loc_0x2F8:
cmpwi r6, 0x1F
bgt- .loc_0x318
subfic r5, r6, 0x20
srw r3, r4, r6
slw r4, r9, r5
mr r9, r0
or r3, r4, r3
b .loc_0x324
.loc_0x318:
subi r3, r6, 0x20
sraw r3, r9, r3
mr r9, r0
.loc_0x324:
or r0, r9, r0
stw r3, 0xC(r1)
stw r0, 0x8(r1)
.loc_0x330:
lfd f1, 0x8(r1)
.loc_0x334:
addi r1, r1, 0x20
blr
*/
}
/* convert back to floating value and restore the sign */
if((hx|lx)==0) /* return sign(x)*0 */
return Zero[(unsigned)sx>>31];
while(hx<0x00100000) { /* normalize x */
hx = hx+hx+(lx>>31); lx = lx+lx;
iy -= 1;
}
if(iy>= -1022) { /* normalize output */
hx = ((hx-0x00100000)|((iy+1023)<<20));
__HI(x) = hx|sx;
__LO(x) = lx;
} else { /* subnormal output */
n = -1022 - iy;
if(n<=20) {
lx = (lx>>n)|((unsigned)hx<<(32-n));
hx >>= n;
} else if (n<=31) {
lx = (hx<<(32-n))|(lx>>n); hx = sx;
} else {
lx = hx>>(n-32); hx = sx;
}
__HI(x) = hx|sx;
__LO(x) = lx;
x *= one; /* create necessary signal */
}
return x; /* exact output */
}