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https://github.com/projectPiki/pikmin2.git
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mem.c
This commit is contained in:
Louis
EpochFlame
parent
6038dfda5f
commit
6e930092e3
@ -34,6 +34,9 @@ typedef volatile f64 vf64;
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typedef int BOOL;
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// This shoud go in a stddef type header file
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typedef u32 size_t;
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#ifndef TRUE
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#define TRUE 1
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#endif // ifndef TRUE
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@ -293,7 +293,7 @@ DOLPHIN:=\
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$(BUILD_DIR)/asm/Dolphin/FILE_POS.o\
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$(BUILD_DIR)/asm/Dolphin/locale.o\
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$(BUILD_DIR)/asm/Dolphin/mbstring.o\
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$(BUILD_DIR)/asm/Dolphin/mem.o\
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$(BUILD_DIR)/src/Dolphin/mem.o\
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$(BUILD_DIR)/asm/Dolphin/mem_funcs.o\
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$(BUILD_DIR)/src/Dolphin/misc_io.o\
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$(BUILD_DIR)/asm/Dolphin/printf.o\
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@ -5,34 +5,22 @@
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* Address: 800C6FE8
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* Size: 00004C
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*/
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void memcmp(void)
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#include "types.h"
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int memcmp(const void* __s1, const void* __s2, size_t __n)
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{
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/*
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.loc_0x0:
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subi r6, r3, 0x1
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subi r7, r4, 0x1
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addi r4, r5, 0x1
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b .loc_0x3C
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const u8* val1 = ((const u8*)__s1 - 1);
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const u8* val2 = ((const u8*)__s2 - 1);
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size_t size = __n + 1;
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.loc_0x10:
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lbzu r3, 0x1(r6)
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lbzu r0, 0x1(r7)
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cmplw r3, r0
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beq- .loc_0x3C
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lbz r4, 0x0(r6)
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li r3, 0x1
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lbz r0, 0x0(r7)
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cmplw r4, r0
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bgelr-
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li r3, -0x1
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blr
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while (--size > 0) {
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if (*++val1 != *++val2) {
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return (val1[0]) < (val2[0]) ? -1 : 1;
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}
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}
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.loc_0x3C:
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subic. r4, r4, 0x1
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bne+ .loc_0x10
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li r3, 0
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blr
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*/
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return 0;
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}
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/*
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@ -40,140 +28,167 @@ void memcmp(void)
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* Address: 800C7034
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* Size: 00002C
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*/
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void __memrchr(void)
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#ifdef NON_MATCHING
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// Reordering differences
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// https://decomp.me/scratch/dQBzD
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unsigned char* __memrchr(unsigned char* src_void, unsigned char c,
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size_t length)
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{
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/*
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.loc_0x0:
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rlwinm r4,r4,0,24,31
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add r3, r3, r5
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addi r5, r5, 0x1
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b .loc_0x1C
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.loc_0x10:
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lbzu r0, -0x1(r3)
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cmplw r0, r4
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beqlr-
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.loc_0x1C:
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subic. r5, r5, 0x1
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bne+ .loc_0x10
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li r3, 0
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blr
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*/
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length++;
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unsigned char* src = &src_void[length];
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while (--length > 0) {
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if (c == *src)
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return src;
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src--;
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}
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return 0;
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}
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#else
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asm unsigned char* __memrchr(unsigned char* src_void, unsigned char c,
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size_t length)
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{
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// clang-format off
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nofralloc
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clrlwi r4, r4, 0x18
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add r3, r3, r5
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addi r5, r5, 1
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b lbl_800C7050
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lbl_800C7044:
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lbzu r0, -1(r3)
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cmplw r0, r4
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beqlr
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lbl_800C7050:
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addic. r5, r5, -1
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bne lbl_800C7044
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li r3, 0
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blr
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// clang-format on
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}
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#endif
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/*
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* --INFO--
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* Address: 800C7060
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* Size: 00002C
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*/
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void memchr(void)
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#ifdef NON_MATCHING
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// https://decomp.me/scratch/hTmGp
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// Matches on decomp.me but not here for some reason
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unsigned char* __memchr(unsigned char* s, unsigned char c, unsigned int n)
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{
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/*
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.loc_0x0:
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rlwinm r4,r4,0,24,31
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subi r3, r3, 0x1
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addi r5, r5, 0x1
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b .loc_0x1C
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int n_count;
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unsigned int char_check;
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.loc_0x10:
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lbzu r0, 0x1(r3)
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cmplw r0, r4
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beqlr-
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char_check = (unsigned char)c;
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s = &s[n];
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n_count = n + 1;
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while (--n_count) {
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if (*--s == char_check) {
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return s;
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}
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}
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.loc_0x1C:
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subic. r5, r5, 0x1
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bne+ .loc_0x10
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li r3, 0
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blr
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*/
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return 0;
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}
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#else
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asm char* memchr(char* src_void, char c, size_t length)
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{
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// clang-format off
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nofralloc
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clrlwi r4, r4, 0x18
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addi r3, r3, -1
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addi r5, r5, 1
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b lbl_800C707C
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lbl_800C7070:
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lbzu r0, 1(r3)
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cmplw r0, r4
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beqlr
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lbl_800C707C:
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addic. r5, r5, -1
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bne lbl_800C7070
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li r3, 0
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blr
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// clang-format on
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}
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#endif
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/*
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* --INFO--
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* Address: 800C708C
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* Size: 0000CC
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*/
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void memmove(void)
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extern void __copy_longs_unaligned(void* dst, const void* src, u32);
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extern void __copy_longs_rev_unaligned(void* dst, const void* src, u32 n);
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extern void __copy_longs_aligned(void* dst, const void* src, u32 n);
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extern __copy_longs_rev_aligned(void* dst, const void* src, u32 n);
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asm void* memmove(void* dst_void, const void* src_void, size_t length)
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{
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/*
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.loc_0x0:
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stwu r1, -0x10(r1)
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mflr r0
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cmplwi r5, 0x20
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stw r0, 0x14(r1)
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stw r31, 0xC(r1)
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mr r31, r3
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xor r6, r31, r4
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cntlzw r0, r6
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slw r0, r31, r0
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rlwinm r7,r0,1,31,31
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blt- .loc_0x68
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rlwinm. r0,r6,0,30,31
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beq- .loc_0x4C
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cmpwi r7, 0
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bne- .loc_0x44
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bl 0x13C
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b .loc_0x60
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.loc_0x44:
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bl .loc_0xCC
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b .loc_0x60
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.loc_0x4C:
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cmpwi r7, 0
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bne- .loc_0x5C
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bl 0x28C
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b .loc_0x60
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.loc_0x5C:
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bl 0x1DC
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.loc_0x60:
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mr r3, r31
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b .loc_0xB8
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.loc_0x68:
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cmpwi r7, 0
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bne- .loc_0x94
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subi r3, r4, 0x1
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subi r4, r31, 0x1
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addi r5, r5, 0x1
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b .loc_0x88
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.loc_0x80:
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lbzu r0, 0x1(r3)
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stbu r0, 0x1(r4)
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.loc_0x88:
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subic. r5, r5, 0x1
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bne+ .loc_0x80
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b .loc_0xB4
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.loc_0x94:
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add r3, r4, r5
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add r4, r31, r5
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addi r5, r5, 0x1
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b .loc_0xAC
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.loc_0xA4:
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lbzu r0, -0x1(r3)
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stbu r0, -0x1(r4)
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.loc_0xAC:
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subic. r5, r5, 0x1
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bne+ .loc_0xA4
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.loc_0xB4:
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mr r3, r31
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.loc_0xB8:
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lwz r0, 0x14(r1)
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lwz r31, 0xC(r1)
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mtlr r0
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addi r1, r1, 0x10
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blr
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.loc_0xCC:
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*/
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// clang-format off
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nofralloc
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/* 800C708C 000C3FCC 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 800C7090 000C3FD0 7C 08 02 A6 */ mflr r0
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/* 800C7094 000C3FD4 28 05 00 20 */ cmplwi r5, 0x20
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/* 800C7098 000C3FD8 90 01 00 14 */ stw r0, 0x14(r1)
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/* 800C709C 000C3FDC 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 800C70A0 000C3FE0 7C 7F 1B 78 */ mr r31, r3
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/* 800C70A4 000C3FE4 7F E6 22 78 */ xor r6, r31, r4
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/* 800C70A8 000C3FE8 7C C0 00 34 */ cntlzw r0, r6
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/* 800C70AC 000C3FEC 7F E0 00 30 */ slw r0, r31, r0
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/* 800C70B0 000C3FF0 54 07 0F FE */ srwi r7, r0, 0x1f
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/* 800C70B4 000C3FF4 41 80 00 40 */ blt lbl_800C70F4
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/* 800C70B8 000C3FF8 54 C0 07 BF */ clrlwi. r0, r6, 0x1e
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/* 800C70BC 000C3FFC 41 82 00 1C */ beq lbl_800C70D8
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/* 800C70C0 000C4000 2C 07 00 00 */ cmpwi r7, 0
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/* 800C70C4 000C4004 40 82 00 0C */ bne lbl_800C70D0
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/* 800C70C8 000C4008 48 00 01 3D */ bl __copy_longs_unaligned
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/* 800C70CC 000C400C 48 00 00 20 */ b lbl_800C70EC
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lbl_800C70D0:
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/* 800C70D0 000C4010 48 00 00 89 */ bl __copy_longs_rev_unaligned
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/* 800C70D4 000C4014 48 00 00 18 */ b lbl_800C70EC
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lbl_800C70D8:
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/* 800C70D8 000C4018 2C 07 00 00 */ cmpwi r7, 0
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/* 800C70DC 000C401C 40 82 00 0C */ bne lbl_800C70E8
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/* 800C70E0 000C4020 48 00 02 8D */ bl __copy_longs_aligned
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/* 800C70E4 000C4024 48 00 00 08 */ b lbl_800C70EC
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lbl_800C70E8:
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/* 800C70E8 000C4028 48 00 01 DD */ bl __copy_longs_rev_aligned
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lbl_800C70EC:
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/* 800C70EC 000C402C 7F E3 FB 78 */ mr r3, r31
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/* 800C70F0 000C4030 48 00 00 54 */ b lbl_800C7144
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lbl_800C70F4:
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/* 800C70F4 000C4034 2C 07 00 00 */ cmpwi r7, 0
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/* 800C70F8 000C4038 40 82 00 28 */ bne lbl_800C7120
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/* 800C70FC 000C403C 38 64 FF FF */ addi r3, r4, -1
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/* 800C7100 000C4040 38 9F FF FF */ addi r4, r31, -1
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/* 800C7104 000C4044 38 A5 00 01 */ addi r5, r5, 1
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/* 800C7108 000C4048 48 00 00 0C */ b lbl_800C7114
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lbl_800C710C:
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/* 800C710C 000C404C 8C 03 00 01 */ lbzu r0, 1(r3)
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/* 800C7110 000C4050 9C 04 00 01 */ stbu r0, 1(r4)
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lbl_800C7114:
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/* 800C7114 000C4054 34 A5 FF FF */ addic. r5, r5, -1
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/* 800C7118 000C4058 40 82 FF F4 */ bne lbl_800C710C
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/* 800C711C 000C405C 48 00 00 24 */ b lbl_800C7140
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lbl_800C7120:
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/* 800C7120 000C4060 7C 64 2A 14 */ add r3, r4, r5
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/* 800C7124 000C4064 7C 9F 2A 14 */ add r4, r31, r5
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/* 800C7128 000C4068 38 A5 00 01 */ addi r5, r5, 1
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/* 800C712C 000C406C 48 00 00 0C */ b lbl_800C7138
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lbl_800C7130:
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/* 800C7130 000C4070 8C 03 FF FF */ lbzu r0, -1(r3)
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/* 800C7134 000C4074 9C 04 FF FF */ stbu r0, -1(r4)
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lbl_800C7138:
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/* 800C7138 000C4078 34 A5 FF FF */ addic. r5, r5, -1
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/* 800C713C 000C407C 40 82 FF F4 */ bne lbl_800C7130
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lbl_800C7140:
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/* 800C7140 000C4080 7F E3 FB 78 */ mr r3, r31
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lbl_800C7144:
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/* 800C7144 000C4084 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 800C7148 000C4088 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 800C714C 000C408C 7C 08 03 A6 */ mtlr r0
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/* 800C7150 000C4090 38 21 00 10 */ addi r1, r1, 0x10
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/* 800C7154 000C4094 4E 80 00 20 */ blr
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}
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