mirror of
https://github.com/projectPiki/pikmin2.git
synced 2024-12-02 18:36:39 +00:00
match dispatch.c
This commit is contained in:
EpochFlame
parent
a957ee9139
commit
d91f9d48dd
@ -1,187 +0,0 @@
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.include "macros.inc"
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.section .rodata # 0x804732E0 - 0x8049E220
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.balign 0x8
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.global lbl_804798D0
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lbl_804798D0:
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.4byte 0x44697370
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.4byte 0x61746368
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.4byte 0x20636F6D
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.4byte 0x6D616E64
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.4byte 0x20307825
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.4byte 0x3038780A
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.4byte 0x00000000
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.global lbl_804798EC
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lbl_804798EC:
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.4byte 0x44697370
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.4byte 0x61746368
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.4byte 0x20636F6D
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.4byte 0x706C6574
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.4byte 0x65206572
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.4byte 0x72203D20
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.4byte 0x256C640A
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.4byte 0x00000000
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.4byte 0x00000000
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.section .data, "wa" # 0x8049E220 - 0x804EFC20
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.balign 0x8
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.global lbl_804A6808
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lbl_804A6808:
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.4byte lbl_800BC548
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.4byte lbl_800BC46C
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.4byte lbl_800BC47C
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.4byte lbl_800BC48C
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.4byte lbl_800BC4AC
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.4byte lbl_800BC4BC
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.4byte lbl_800BC548
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.4byte lbl_800BC49C
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC4CC
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.4byte lbl_800BC4DC
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.4byte lbl_800BC4EC
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.4byte lbl_800BC4FC
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC548
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.4byte lbl_800BC53C
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.4byte lbl_800BC50C
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.4byte lbl_800BC51C
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.4byte lbl_800BC52C
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.4byte 0x00000000
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.section .text, "ax" # 0x800056C0 - 0x80472F00
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.global TRKDispatchMessage
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TRKDispatchMessage:
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/* 800BC40C 000B934C 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 800BC410 000B9350 7C 08 02 A6 */ mflr r0
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/* 800BC414 000B9354 38 80 00 00 */ li r4, 0
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/* 800BC418 000B9358 90 01 00 14 */ stw r0, 0x14(r1)
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/* 800BC41C 000B935C 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 800BC420 000B9360 3B E0 05 00 */ li r31, 0x500
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/* 800BC424 000B9364 93 C1 00 08 */ stw r30, 8(r1)
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/* 800BC428 000B9368 7C 7E 1B 78 */ mr r30, r3
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/* 800BC42C 000B936C 4B FF FA 61 */ bl TRKSetBufferPosition
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/* 800BC430 000B9370 3C 60 80 48 */ lis r3, lbl_804798D0@ha
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/* 800BC434 000B9374 88 BE 00 14 */ lbz r5, 0x14(r30)
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/* 800BC438 000B9378 38 83 98 D0 */ addi r4, r3, lbl_804798D0@l
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/* 800BC43C 000B937C 38 60 00 01 */ li r3, 1
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/* 800BC440 000B9380 4C C6 31 82 */ crclr 6
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/* 800BC444 000B9384 48 00 51 05 */ bl MWTRACE
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/* 800BC448 000B9388 88 1E 00 14 */ lbz r0, 0x14(r30)
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/* 800BC44C 000B938C 28 00 00 1A */ cmplwi r0, 0x1a
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/* 800BC450 000B9390 41 81 00 F8 */ bgt lbl_800BC548
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/* 800BC454 000B9394 3C 60 80 4A */ lis r3, lbl_804A6808@ha
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/* 800BC458 000B9398 54 00 10 3A */ slwi r0, r0, 2
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/* 800BC45C 000B939C 38 63 68 08 */ addi r3, r3, lbl_804A6808@l
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/* 800BC460 000B93A0 7C 03 00 2E */ lwzx r0, r3, r0
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/* 800BC464 000B93A4 7C 09 03 A6 */ mtctr r0
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/* 800BC468 000B93A8 4E 80 04 20 */ bctr
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.global lbl_800BC46C
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lbl_800BC46C:
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/* 800BC46C 000B93AC 7F C3 F3 78 */ mr r3, r30
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/* 800BC470 000B93B0 48 00 10 5D */ bl TRKDoConnect
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/* 800BC474 000B93B4 7C 7F 1B 78 */ mr r31, r3
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/* 800BC478 000B93B8 48 00 00 D0 */ b lbl_800BC548
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.global lbl_800BC47C
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lbl_800BC47C:
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/* 800BC47C 000B93BC 7F C3 F3 78 */ mr r3, r30
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/* 800BC480 000B93C0 48 00 0F D5 */ bl TRKDoDisconnect
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/* 800BC484 000B93C4 7C 7F 1B 78 */ mr r31, r3
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/* 800BC488 000B93C8 48 00 00 C0 */ b lbl_800BC548
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.global lbl_800BC48C
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lbl_800BC48C:
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/* 800BC48C 000B93CC 7F C3 F3 78 */ mr r3, r30
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/* 800BC490 000B93D0 48 00 0F 6D */ bl TRKDoReset
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/* 800BC494 000B93D4 7C 7F 1B 78 */ mr r31, r3
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/* 800BC498 000B93D8 48 00 00 B0 */ b lbl_800BC548
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.global lbl_800BC49C
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lbl_800BC49C:
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/* 800BC49C 000B93DC 7F C3 F3 78 */ mr r3, r30
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/* 800BC4A0 000B93E0 48 00 0F 05 */ bl TRKDoOverride
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/* 800BC4A4 000B93E4 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4A8 000B93E8 48 00 00 A0 */ b lbl_800BC548
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.global lbl_800BC4AC
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lbl_800BC4AC:
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/* 800BC4AC 000B93EC 7F C3 F3 78 */ mr r3, r30
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/* 800BC4B0 000B93F0 48 00 0E ED */ bl TRKDoVersions
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/* 800BC4B4 000B93F4 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4B8 000B93F8 48 00 00 90 */ b lbl_800BC548
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.global lbl_800BC4BC
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lbl_800BC4BC:
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/* 800BC4BC 000B93FC 7F C3 F3 78 */ mr r3, r30
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/* 800BC4C0 000B9400 48 00 0E D5 */ bl TRKDoSupportMask
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/* 800BC4C4 000B9404 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4C8 000B9408 48 00 00 80 */ b lbl_800BC548
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.global lbl_800BC4CC
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lbl_800BC4CC:
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/* 800BC4CC 000B940C 7F C3 F3 78 */ mr r3, r30
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/* 800BC4D0 000B9410 48 00 0C 81 */ bl TRKDoReadMemory
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/* 800BC4D4 000B9414 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4D8 000B9418 48 00 00 70 */ b lbl_800BC548
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.global lbl_800BC4DC
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lbl_800BC4DC:
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/* 800BC4DC 000B941C 7F C3 F3 78 */ mr r3, r30
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/* 800BC4E0 000B9420 48 00 0A 35 */ bl TRKDoWriteMemory
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/* 800BC4E4 000B9424 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4E8 000B9428 48 00 00 60 */ b lbl_800BC548
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.global lbl_800BC4EC
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lbl_800BC4EC:
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/* 800BC4EC 000B942C 7F C3 F3 78 */ mr r3, r30
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/* 800BC4F0 000B9430 48 00 07 45 */ bl TRKDoReadRegisters
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/* 800BC4F4 000B9434 7C 7F 1B 78 */ mr r31, r3
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/* 800BC4F8 000B9438 48 00 00 50 */ b lbl_800BC548
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.global lbl_800BC4FC
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lbl_800BC4FC:
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/* 800BC4FC 000B943C 7F C3 F3 78 */ mr r3, r30
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/* 800BC500 000B9440 48 00 04 A5 */ bl TRKDoWriteRegisters
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/* 800BC504 000B9444 7C 7F 1B 78 */ mr r31, r3
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/* 800BC508 000B9448 48 00 00 40 */ b lbl_800BC548
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.global lbl_800BC50C
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lbl_800BC50C:
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/* 800BC50C 000B944C 7F C3 F3 78 */ mr r3, r30
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/* 800BC510 000B9450 48 00 03 E5 */ bl TRKDoContinue
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/* 800BC514 000B9454 7C 7F 1B 78 */ mr r31, r3
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/* 800BC518 000B9458 48 00 00 30 */ b lbl_800BC548
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.global lbl_800BC51C
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lbl_800BC51C:
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/* 800BC51C 000B945C 7F C3 F3 78 */ mr r3, r30
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/* 800BC520 000B9460 48 00 01 B5 */ bl TRKDoStep
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/* 800BC524 000B9464 7C 7F 1B 78 */ mr r31, r3
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/* 800BC528 000B9468 48 00 00 20 */ b lbl_800BC548
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.global lbl_800BC52C
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lbl_800BC52C:
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/* 800BC52C 000B946C 7F C3 F3 78 */ mr r3, r30
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/* 800BC530 000B9470 48 00 00 FD */ bl TRKDoStop
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/* 800BC534 000B9474 7C 7F 1B 78 */ mr r31, r3
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/* 800BC538 000B9478 48 00 00 10 */ b lbl_800BC548
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.global lbl_800BC53C
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lbl_800BC53C:
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/* 800BC53C 000B947C 7F C3 F3 78 */ mr r3, r30
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/* 800BC540 000B9480 48 00 00 45 */ bl TRKDoSetOption
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/* 800BC544 000B9484 7C 7F 1B 78 */ mr r31, r3
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.global lbl_800BC548
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lbl_800BC548:
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/* 800BC548 000B9488 3C 60 80 48 */ lis r3, lbl_804798EC@ha
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/* 800BC54C 000B948C 7F E5 FB 78 */ mr r5, r31
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/* 800BC550 000B9490 38 83 98 EC */ addi r4, r3, lbl_804798EC@l
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/* 800BC554 000B9494 38 60 00 01 */ li r3, 1
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/* 800BC558 000B9498 4C C6 31 82 */ crclr 6
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/* 800BC55C 000B949C 48 00 4F ED */ bl MWTRACE
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/* 800BC560 000B94A0 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 800BC564 000B94A4 7F E3 FB 78 */ mr r3, r31
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/* 800BC568 000B94A8 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 800BC56C 000B94AC 83 C1 00 08 */ lwz r30, 8(r1)
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/* 800BC570 000B94B0 7C 08 03 A6 */ mtlr r0
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/* 800BC574 000B94B4 38 21 00 10 */ addi r1, r1, 0x10
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/* 800BC578 000B94B8 4E 80 00 20 */ blr
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.global TRKInitializeDispatcher
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TRKInitializeDispatcher:
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/* 800BC57C 000B94BC 38 60 00 00 */ li r3, 0
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/* 800BC580 000B94C0 4E 80 00 20 */ blr
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@ -1,9 +1,9 @@
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.include "macros.inc"
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.section .sbss # 0x80514D80 - 0x80516360
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.balign 0x8
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.balign 8
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.global initialized$60
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initialized$60:
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.skip 0x8
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.skip 4
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.section .text, "ax" # 0x800056C0 - 0x80472F00
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.global __write_console
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24
include/Dolphin/dispatch.h
Normal file
24
include/Dolphin/dispatch.h
Normal file
@ -0,0 +1,24 @@
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#ifndef _DOLPHIN_DISPATCH_H
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#define _DOLPHIN_DISPATCH_H
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#include "types.h"
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typedef struct MessageBuffer MessageBuffer, *PMessageBuffer;
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struct MessageBuffer {
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char filler[0x14];
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u8 thing;
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};
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u32 TRKDoConnect(MessageBuffer*);
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u32 TRKDoDisconnect(MessageBuffer*);
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u32 TRKDoReset(MessageBuffer*);
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u32 TRKDoVersions(MessageBuffer*);
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u32 TRKDoSupportMask(MessageBuffer*);
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u32 TRKDoOverride(MessageBuffer*);
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u32 TRKDoReadMemory(MessageBuffer*);
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u32 TRKDoWriteMemory(MessageBuffer*);
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u32 TRKDoReadRegisters(MessageBuffer*);
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u32 TRKDoWriteRegisters(MessageBuffer*);
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u32 TRKDoSetOption(MessageBuffer*);
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u32 TRKDoContinue(MessageBuffer*);
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u32 TRKDoStep(MessageBuffer*);
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u32 TRKDoStop(MessageBuffer*);
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void MWTRACE(u8, char*, ...);
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#endif
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@ -246,7 +246,7 @@ DOLPHIN:=\
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$(BUILD_DIR)/asm/Dolphin/msgbuf.o\
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$(BUILD_DIR)/asm/Dolphin/serpoll.o\
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$(BUILD_DIR)/asm/Dolphin/usr_put.o\
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$(BUILD_DIR)/asm/Dolphin/dispatch.o\
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$(BUILD_DIR)/src/Dolphin/dispatch.o\
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$(BUILD_DIR)/asm/Dolphin/msghndlr.o\
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$(BUILD_DIR)/asm/Dolphin/support.o\
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$(BUILD_DIR)/src/Dolphin/mutex_TRK.o\
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@ -1,109 +1,64 @@
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#include "types.h"
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#include "Dolphin/trk.h"
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#include "Dolphin/dispatch.h"
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/*
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* --INFO--
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* Address: 800BC40C
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* Size: 000170
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*/
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void TRKDispatchMessage(void)
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u32 TRKDispatchMessage(MessageBuffer* param_1)
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{
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/*
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.loc_0x0:
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stwu r1, -0x10(r1)
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mflr r0
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li r4, 0
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stw r0, 0x14(r1)
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stw r31, 0xC(r1)
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li r31, 0x500
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stw r30, 0x8(r1)
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mr r30, r3
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bl -0x5A0
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lis r3, 0x8048
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lbz r5, 0x14(r30)
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subi r4, r3, 0x6730
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li r3, 0x1
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crclr 6, 0x6
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bl 0x5104
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lbz r0, 0x14(r30)
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cmplwi r0, 0x1A
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bgt- .loc_0x13C
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lis r3, 0x804A
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rlwinm r0,r0,2,0,29
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addi r3, r3, 0x6808
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lwzx r0, r3, r0
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mtctr r0
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bctr
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mr r3, r30
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bl 0x105C
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xFD4
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xF6C
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xF04
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xEEC
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xED4
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xC80
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xA34
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0x744
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0x4A4
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0x3E4
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0x1B4
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0xFC
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mr r31, r3
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b .loc_0x13C
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mr r3, r30
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bl 0x44
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mr r31, r3
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u32 uVar1;
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.loc_0x13C:
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lis r3, 0x8048
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mr r5, r31
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subi r4, r3, 0x6714
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li r3, 0x1
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crclr 6, 0x6
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bl 0x4FEC
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lwz r0, 0x14(r1)
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mr r3, r31
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lwz r31, 0xC(r1)
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lwz r30, 0x8(r1)
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mtlr r0
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addi r1, r1, 0x10
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blr
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*/
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uVar1 = 0x500;
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TRKSetBufferPosition(param_1, 0);
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MWTRACE(1, "Dispatch command 0x%08x\n", param_1->thing);
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switch (param_1->thing) {
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case 1:
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uVar1 = TRKDoConnect(param_1);
|
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break;
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case 2:
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uVar1 = TRKDoDisconnect(param_1);
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break;
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case 3:
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uVar1 = TRKDoReset(param_1);
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break;
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case 7:
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uVar1 = TRKDoOverride(param_1);
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break;
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case 4:
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uVar1 = TRKDoVersions(param_1);
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break;
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case 5:
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uVar1 = TRKDoSupportMask(param_1);
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break;
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case 0x10:
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uVar1 = TRKDoReadMemory(param_1);
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break;
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case 0x11:
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uVar1 = TRKDoWriteMemory(param_1);
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break;
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case 0x12:
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uVar1 = TRKDoReadRegisters(param_1);
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break;
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case 0x13:
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uVar1 = TRKDoWriteRegisters(param_1);
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break;
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case 0x18:
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uVar1 = TRKDoContinue(param_1);
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break;
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case 0x19:
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uVar1 = TRKDoStep(param_1);
|
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break;
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case 0x1a:
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uVar1 = TRKDoStop(param_1);
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break;
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case 0x17:
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uVar1 = TRKDoSetOption(param_1);
|
||||
break;
|
||||
}
|
||||
MWTRACE(1, "Dispatch complete err = %ld\n", uVar1);
|
||||
return uVar1;
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
Loading…
Reference in New Issue
Block a user