mirror of
https://github.com/pret/pmd-red.git
synced 2024-11-23 21:19:53 +00:00
1146 lines
16 KiB
ArmAsm
1146 lines
16 KiB
ArmAsm
#include "asm/constants/gba_constants.inc"
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#include "asm/macros.inc"
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.syntax unified
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.text
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thumb_func_start sub_800A088
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sub_800A088:
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push {lr}
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adds r2, r0, 0
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lsls r0, r1, 8
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str r0, [r2, 0x4]
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asrs r1, 24
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str r1, [r2]
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movs r0, 0x80
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ands r0, r1
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cmp r0, 0
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beq _0800A0A4
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movs r0, 0x80
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negs r0, r0
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orrs r1, r0
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b _0800A0A8
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_0800A0A4:
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movs r0, 0x7F
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ands r1, r0
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_0800A0A8:
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str r1, [r2]
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pop {r0}
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bx r0
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thumb_func_end sub_800A088
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thumb_func_start sub_800A0B0
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sub_800A0B0:
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push {lr}
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ldr r2, [r0, 0x4]
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ldr r3, [r0]
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cmp r2, 0
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bne _0800A0C2
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cmp r3, 0
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bne _0800A0C2
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movs r0, 0
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b _0800A254
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_0800A0C2:
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cmp r2, 0
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ble _0800A18C
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cmp r3, 0
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ble _0800A124
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cmp r2, r3
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bge _0800A0F0
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asrs r1, r3, 8
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cmp r1, 0
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beq _0800A0FE
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adds r0, r2, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A0E2
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movs r2, 0xFF
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_0800A0E2:
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ldr r0, _0800A0EC
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lsls r1, r2, 2
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adds r1, r0
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ldr r0, [r1]
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b _0800A252
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.align 2, 0
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_0800A0EC: .4byte gFastUnknownFn1Lookup
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_0800A0F0:
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adds r1, r2, 0
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cmp r2, 0
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bge _0800A0F8
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adds r1, 0xFF
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_0800A0F8:
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asrs r1, 8
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cmp r1, 0
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bne _0800A104
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_0800A0FE:
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movs r0, 0x80
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lsls r0, 2
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b _0800A254
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_0800A104:
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adds r0, r3, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A112
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movs r2, 0xFF
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_0800A112:
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ldr r1, _0800A120
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lsls r0, r2, 2
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adds r0, r1
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ldr r1, [r0]
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movs r0, 0x40
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b _0800A250
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.align 2, 0
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_0800A120: .4byte gFastUnknownFn1Lookup
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_0800A124:
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negs r3, r3
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cmp r2, r3
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bge _0800A158
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adds r1, r3, 0
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cmp r3, 0
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bge _0800A132
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adds r1, 0xFF
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_0800A132:
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asrs r1, 8
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cmp r1, 0
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beq _0800A166
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adds r0, r2, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A146
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movs r2, 0xFF
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_0800A146:
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ldr r1, _0800A154
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lsls r0, r2, 2
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adds r0, r1
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ldr r1, [r0]
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movs r0, 0x80
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b _0800A250
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.align 2, 0
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_0800A154: .4byte gFastUnknownFn1Lookup
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_0800A158:
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adds r1, r2, 0
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cmp r2, 0
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bge _0800A160
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adds r1, 0xFF
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_0800A160:
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asrs r1, 8
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cmp r1, 0
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bne _0800A16C
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_0800A166:
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movs r0, 0xC0
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lsls r0, 3
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b _0800A254
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_0800A16C:
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adds r0, r3, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A17A
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movs r2, 0xFF
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_0800A17A:
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ldr r0, _0800A188
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lsls r1, r2, 2
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adds r1, r0
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ldr r0, [r1]
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adds r0, 0x40
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b _0800A252
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.align 2, 0
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_0800A188: .4byte gFastUnknownFn1Lookup
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_0800A18C:
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negs r2, r2
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cmp r3, 0
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ble _0800A1F0
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cmp r2, r3
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bge _0800A1BC
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asrs r1, r3, 8
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cmp r1, 0
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beq _0800A1CA
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adds r0, r2, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A1AA
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movs r2, 0xFF
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_0800A1AA:
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ldr r1, _0800A1B8
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lsls r0, r2, 2
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adds r0, r1
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ldr r1, [r0]
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movs r0, 0x80
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lsls r0, 1
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b _0800A250
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.align 2, 0
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_0800A1B8: .4byte gFastUnknownFn1Lookup
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_0800A1BC:
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adds r1, r2, 0
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cmp r2, 0
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bge _0800A1C4
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adds r1, 0xFF
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_0800A1C4:
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asrs r1, 8
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cmp r1, 0
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bne _0800A1D0
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_0800A1CA:
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movs r0, 0xE0
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lsls r0, 4
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b _0800A254
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_0800A1D0:
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adds r0, r3, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A1DE
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movs r2, 0xFF
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_0800A1DE:
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ldr r0, _0800A1EC
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lsls r1, r2, 2
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adds r1, r0
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ldr r0, [r1]
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adds r0, 0xC0
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b _0800A252
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.align 2, 0
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_0800A1EC: .4byte gFastUnknownFn1Lookup
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_0800A1F0:
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negs r3, r3
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cmp r2, r3
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bge _0800A224
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adds r1, r3, 0
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cmp r3, 0
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bge _0800A1FE
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adds r1, 0xFF
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_0800A1FE:
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asrs r1, 8
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cmp r1, 0
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beq _0800A232
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adds r0, r2, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A212
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movs r2, 0xFF
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_0800A212:
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ldr r0, _0800A220
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lsls r1, r2, 2
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adds r1, r0
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ldr r0, [r1]
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adds r0, 0x80
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b _0800A252
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.align 2, 0
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_0800A220: .4byte gFastUnknownFn1Lookup
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_0800A224:
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adds r0, r2, 0
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cmp r0, 0
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bge _0800A22C
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adds r0, 0xFF
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_0800A22C:
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asrs r1, r0, 8
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cmp r1, 0
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bne _0800A238
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_0800A232:
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movs r0, 0xA0
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lsls r0, 4
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b _0800A254
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_0800A238:
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adds r0, r3, 0
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bl __divsi3
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adds r2, r0, 0
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cmp r2, 0xFF
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ble _0800A246
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movs r2, 0xFF
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_0800A246:
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ldr r1, _0800A258
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lsls r0, r2, 2
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adds r0, r1
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ldr r1, [r0]
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movs r0, 0xC0
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_0800A250:
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subs r0, r1
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_0800A252:
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lsls r0, 4
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_0800A254:
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pop {r1}
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bx r1
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.align 2, 0
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_0800A258: .4byte gFastUnknownFn1Lookup
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thumb_func_end sub_800A0B0
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// invert signed lex pair
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thumb_func_start sub_800A25C
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sub_800A25C:
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push {lr}
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adds r1, r0, 0
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ldr r0, [r1]
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mvns r2, r0
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str r2, [r1]
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ldr r0, [r1, 0x4]
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mvns r0, r0
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adds r0, 0x1
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str r0, [r1, 0x4]
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cmp r0, 0
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bne _0800A276
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adds r0, r2, 0x1
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str r0, [r1]
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_0800A276:
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pop {r0}
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bx r0
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thumb_func_end sub_800A25C
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// absolute value of signed lex pair
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thumb_func_start sub_800A27C
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sub_800A27C:
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push {lr}
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adds r1, r0, 0
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ldr r0, [r1]
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cmp r0, 0
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bge _0800A29A
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mvns r2, r0
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str r2, [r1]
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ldr r0, [r1, 0x4]
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mvns r0, r0
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adds r0, 0x1
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str r0, [r1, 0x4]
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cmp r0, 0
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bne _0800A29A
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adds r0, r2, 0x1
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str r0, [r1]
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_0800A29A:
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pop {r0}
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bx r0
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thumb_func_end sub_800A27C
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thumb_func_start sub_800A2A0
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sub_800A2A0:
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push {lr}
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adds r1, r0, 0
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ldr r0, [r1]
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cmp r0, 0
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bne _0800A2B4
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ldr r0, [r1, 0x4]
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cmp r0, 0
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bne _0800A2B4
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movs r0, 0x1
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b _0800A2B6
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_0800A2B4:
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movs r0, 0
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_0800A2B6:
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pop {r1}
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bx r1
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thumb_func_end sub_800A2A0
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thumb_func_start sub_800A2BC
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sub_800A2BC:
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push {lr}
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adds r2, r0, 0
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adds r3, r1, 0
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ldr r1, [r2]
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ldr r0, [r3]
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cmp r1, r0
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bne _0800A2D6
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ldr r1, [r2, 0x4]
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ldr r0, [r3, 0x4]
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cmp r1, r0
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bne _0800A2D6
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movs r0, 0x1
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b _0800A2D8
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_0800A2D6:
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movs r0, 0
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_0800A2D8:
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pop {r1}
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bx r1
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thumb_func_end sub_800A2BC
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thumb_func_start sub_800A2DC
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sub_800A2DC:
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push {lr}
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ldr r0, [r0]
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cmp r0, 0
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blt _0800A2E8
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movs r0, 0
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b _0800A2EA
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_0800A2E8:
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movs r0, 0x1
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_0800A2EA:
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pop {r1}
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bx r1
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thumb_func_end sub_800A2DC
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thumb_func_start sub_800A2F0
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sub_800A2F0:
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push {r4,r5,lr}
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adds r3, r0, 0
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adds r2, r1, 0
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ldr r4, [r3]
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lsrs r1, r4, 31
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ldr r5, [r2]
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cmp r5, 0
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bge _0800A304
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movs r0, 0x2
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orrs r1, r0
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_0800A304:
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cmp r1, 0x1
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beq _0800A326
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cmp r1, 0x1
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ble _0800A314
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cmp r1, 0x2
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beq _0800A32A
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cmp r1, 0x3
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beq _0800A32E
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_0800A314:
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ldr r1, [r3, 0x4]
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ldr r3, [r2, 0x4]
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adds r0, r4, 0
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adds r2, r5, 0
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bl u32_pair_less_than
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lsls r0, 24
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lsrs r0, 24
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b _0800A346
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_0800A326:
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movs r0, 0x1
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b _0800A346
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_0800A32A:
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movs r0, 0
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b _0800A346
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_0800A32E:
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ldr r1, [r3, 0x4]
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ldr r3, [r2, 0x4]
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adds r0, r4, 0
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adds r2, r5, 0
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bl u32_pair_less_than
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movs r1, 0
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lsls r0, 24
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cmp r0, 0
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bne _0800A344
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movs r1, 0x1
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_0800A344:
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adds r0, r1, 0
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_0800A346:
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pop {r4,r5}
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pop {r1}
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bx r1
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thumb_func_end sub_800A2F0
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thumb_func_start sub_800A34C
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sub_800A34C:
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push {r4-r7,lr}
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mov r7, r10
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mov r6, r9
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mov r5, r8
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push {r5-r7}
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sub sp, 0x18
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adds r6, r0, 0
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ldr r0, [r1]
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str r0, [sp]
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ldr r0, [r1, 0x4]
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str r0, [sp, 0x4]
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ldr r0, [r2]
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str r0, [sp, 0x8]
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ldr r0, [r2, 0x4]
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add r5, sp, 0x8
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str r0, [r5, 0x4]
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mov r0, sp
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bl sub_800A2DC
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lsls r0, 24
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lsrs r0, 24
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mov r8, r0
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mov r10, r8
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adds r0, r5, 0
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bl sub_800A2DC
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lsls r0, 24
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lsrs r7, r0, 24
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mov r9, r7
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mov r0, sp
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bl sub_800A2A0
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lsls r0, 24
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lsrs r4, r0, 24
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cmp r4, 0
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beq _0800A39A
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movs r0, 0
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str r0, [r6]
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b _0800A3DE
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_0800A39A:
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adds r0, r5, 0
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bl sub_800A2A0
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lsls r0, 24
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cmp r0, 0
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beq _0800A3AC
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str r4, [r6]
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str r4, [r6, 0x4]
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b _0800A3E0
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_0800A3AC:
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mov r0, r8
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cmp r0, 0
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beq _0800A3B8
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mov r0, sp
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bl sub_800A25C
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_0800A3B8:
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cmp r7, 0
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beq _0800A3C2
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adds r0, r5, 0
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bl sub_800A25C
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_0800A3C2:
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add r4, sp, 0x10
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adds r0, r4, 0
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mov r1, sp
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adds r2, r5, 0
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bl sub_800A4E4
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cmp r10, r9
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beq _0800A3D8
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adds r0, r4, 0
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bl sub_800A25C
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_0800A3D8:
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ldr r0, [sp, 0x10]
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str r0, [r6]
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ldr r0, [r4, 0x4]
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_0800A3DE:
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str r0, [r6, 0x4]
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_0800A3E0:
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add sp, 0x18
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pop {r3-r5}
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mov r8, r3
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mov r9, r4
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mov r10, r5
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pop {r4-r7}
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pop {r0}
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bx r0
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thumb_func_end sub_800A34C
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thumb_func_start sub_800A3F0
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sub_800A3F0:
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push {r4-r7,lr}
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mov r7, r10
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mov r6, r9
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mov r5, r8
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push {r5-r7}
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sub sp, 0x18
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adds r6, r0, 0
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ldr r0, [r1]
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str r0, [sp]
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ldr r0, [r1, 0x4]
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str r0, [sp, 0x4]
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ldr r0, [r2]
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str r0, [sp, 0x8]
|
|
ldr r0, [r2, 0x4]
|
|
add r5, sp, 0x8
|
|
str r0, [r5, 0x4]
|
|
mov r0, sp
|
|
bl sub_800A2DC
|
|
lsls r0, 24
|
|
lsrs r0, 24
|
|
mov r8, r0
|
|
mov r10, r8
|
|
adds r0, r5, 0
|
|
bl sub_800A2DC
|
|
lsls r0, 24
|
|
lsrs r7, r0, 24
|
|
mov r9, r7
|
|
adds r0, r5, 0
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
lsrs r4, r0, 24
|
|
cmp r4, 0
|
|
beq _0800A448
|
|
ldr r0, _0800A444
|
|
str r0, [r6]
|
|
movs r0, 0x1
|
|
negs r0, r0
|
|
b _0800A48C
|
|
.align 2, 0
|
|
_0800A444: .4byte 0x7fffffff
|
|
_0800A448:
|
|
mov r0, sp
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
beq _0800A45A
|
|
str r4, [r6]
|
|
str r4, [r6, 0x4]
|
|
b _0800A48E
|
|
_0800A45A:
|
|
mov r0, r8
|
|
cmp r0, 0
|
|
beq _0800A466
|
|
mov r0, sp
|
|
bl sub_800A25C
|
|
_0800A466:
|
|
cmp r7, 0
|
|
beq _0800A470
|
|
adds r0, r5, 0
|
|
bl sub_800A25C
|
|
_0800A470:
|
|
add r4, sp, 0x10
|
|
adds r0, r4, 0
|
|
mov r1, sp
|
|
adds r2, r5, 0
|
|
bl sub_800A5A4
|
|
cmp r10, r9
|
|
beq _0800A486
|
|
adds r0, r4, 0
|
|
bl sub_800A25C
|
|
_0800A486:
|
|
ldr r0, [sp, 0x10]
|
|
str r0, [r6]
|
|
ldr r0, [r4, 0x4]
|
|
_0800A48C:
|
|
str r0, [r6, 0x4]
|
|
_0800A48E:
|
|
add sp, 0x18
|
|
pop {r3-r5}
|
|
mov r8, r3
|
|
mov r9, r4
|
|
mov r10, r5
|
|
pop {r4-r7}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A3F0
|
|
|
|
thumb_func_start sub_800A4A0
|
|
sub_800A4A0:
|
|
push {r4,r5,lr}
|
|
sub sp, 0x10
|
|
adds r5, r0, 0
|
|
ldr r0, [r5]
|
|
str r0, [sp]
|
|
ldr r0, [r5, 0x4]
|
|
str r0, [sp, 0x4]
|
|
mov r0, sp
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
beq _0800A4C0
|
|
movs r0, 0
|
|
str r0, [r5]
|
|
b _0800A4D8
|
|
_0800A4C0:
|
|
mov r0, sp
|
|
bl sub_800A27C
|
|
add r4, sp, 0x8
|
|
adds r0, r4, 0
|
|
mov r1, sp
|
|
mov r2, sp
|
|
bl sub_800A4E4
|
|
ldr r0, [sp, 0x8]
|
|
str r0, [r5]
|
|
ldr r0, [r4, 0x4]
|
|
_0800A4D8:
|
|
str r0, [r5, 0x4]
|
|
add sp, 0x10
|
|
pop {r4,r5}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A4A0
|
|
|
|
thumb_func_start sub_800A4E4
|
|
sub_800A4E4:
|
|
push {r4-r7,lr}
|
|
mov r7, r10
|
|
mov r6, r9
|
|
mov r5, r8
|
|
push {r5-r7}
|
|
mov r8, r0
|
|
adds r5, r1, 0
|
|
adds r6, r2, 0
|
|
adds r0, r5, 0
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
lsrs r4, r0, 24
|
|
cmp r4, 0
|
|
beq _0800A50C
|
|
movs r0, 0
|
|
mov r1, r8
|
|
str r0, [r1]
|
|
str r0, [r1, 0x4]
|
|
b _0800A596
|
|
_0800A50C:
|
|
adds r0, r6, 0
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
beq _0800A520
|
|
mov r7, r8
|
|
str r4, [r7]
|
|
str r4, [r7, 0x4]
|
|
b _0800A596
|
|
_0800A520:
|
|
ldr r1, [r5]
|
|
ldr r4, [r5, 0x4]
|
|
ldr r0, [r6]
|
|
mov r10, r0
|
|
ldr r2, [r6, 0x4]
|
|
movs r6, 0
|
|
movs r5, 0
|
|
movs r7, 0x80
|
|
lsls r7, 24
|
|
mov r9, r7
|
|
movs r0, 0x3F
|
|
mov r12, r0
|
|
_0800A538:
|
|
adds r3, r5, 0
|
|
movs r0, 0x1
|
|
ands r0, r2
|
|
cmp r0, 0
|
|
beq _0800A54C
|
|
adds r5, r4
|
|
adds r6, r1
|
|
cmp r3, r5
|
|
bls _0800A54C
|
|
adds r6, 0x1
|
|
_0800A54C:
|
|
lsrs r2, 1
|
|
movs r3, 0x1
|
|
mov r0, r10
|
|
ands r0, r3
|
|
cmp r0, 0
|
|
beq _0800A55C
|
|
mov r7, r9
|
|
orrs r2, r7
|
|
_0800A55C:
|
|
mov r0, r10
|
|
lsrs r0, 1
|
|
mov r10, r0
|
|
lsls r1, 1
|
|
adds r0, r4, 0
|
|
mov r7, r9
|
|
ands r0, r7
|
|
cmp r0, 0
|
|
beq _0800A570
|
|
orrs r1, r3
|
|
_0800A570:
|
|
lsls r4, 1
|
|
movs r0, 0x1
|
|
negs r0, r0
|
|
add r12, r0
|
|
mov r7, r12
|
|
cmp r7, 0
|
|
bge _0800A538
|
|
lsrs r1, r5, 15
|
|
ands r1, r3
|
|
lsrs r5, 16
|
|
lsls r0, r6, 16
|
|
orrs r5, r0
|
|
lsrs r6, 16
|
|
cmp r1, 0
|
|
beq _0800A590
|
|
adds r5, 0x1
|
|
_0800A590:
|
|
mov r0, r8
|
|
str r6, [r0]
|
|
str r5, [r0, 0x4]
|
|
_0800A596:
|
|
pop {r3-r5}
|
|
mov r8, r3
|
|
mov r9, r4
|
|
mov r10, r5
|
|
pop {r4-r7}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A4E4
|
|
|
|
thumb_func_start sub_800A5A4
|
|
sub_800A5A4:
|
|
push {r4-r7,lr}
|
|
mov r7, r10
|
|
mov r6, r9
|
|
mov r5, r8
|
|
push {r5-r7}
|
|
sub sp, 0x14
|
|
str r0, [sp]
|
|
adds r5, r1, 0
|
|
mov r8, r2
|
|
mov r0, r8
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
lsrs r4, r0, 24
|
|
cmp r4, 0
|
|
beq _0800A5D8
|
|
ldr r0, _0800A5D4
|
|
ldr r1, [sp]
|
|
str r0, [r1]
|
|
movs r0, 0x1
|
|
negs r0, r0
|
|
str r0, [r1, 0x4]
|
|
b _0800A6BE
|
|
.align 2, 0
|
|
_0800A5D4: .4byte 0x7fffffff
|
|
_0800A5D8:
|
|
adds r0, r5, 0
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
beq _0800A5EC
|
|
ldr r2, [sp]
|
|
str r4, [r2]
|
|
str r4, [r2, 0x4]
|
|
b _0800A6BE
|
|
_0800A5EC:
|
|
ldr r0, [r5]
|
|
lsls r7, r0, 16
|
|
ldr r1, [r5, 0x4]
|
|
lsrs r0, r1, 16
|
|
orrs r7, r0
|
|
lsls r6, r1, 16
|
|
movs r0, 0x80
|
|
lsls r0, 8
|
|
orrs r6, r0
|
|
mov r0, r8
|
|
ldr r0, [r0]
|
|
str r0, [sp, 0x4]
|
|
mov r1, r8
|
|
ldr r1, [r1, 0x4]
|
|
str r1, [sp, 0x8]
|
|
movs r2, 0
|
|
str r2, [sp, 0xC]
|
|
mov r9, r2
|
|
movs r5, 0
|
|
movs r4, 0
|
|
movs r0, 0x80
|
|
lsls r0, 24
|
|
mov r10, r0
|
|
movs r1, 0x1
|
|
mov r8, r1
|
|
movs r2, 0x3F
|
|
str r2, [sp, 0x10]
|
|
_0800A622:
|
|
lsls r5, 1
|
|
adds r0, r4, 0
|
|
mov r1, r10
|
|
ands r0, r1
|
|
cmp r0, 0
|
|
beq _0800A632
|
|
mov r2, r8
|
|
orrs r5, r2
|
|
_0800A632:
|
|
movs r1, 0x2
|
|
negs r1, r1
|
|
lsls r4, 1
|
|
adds r0, r7, 0
|
|
mov r2, r10
|
|
ands r0, r2
|
|
cmp r0, 0
|
|
beq _0800A646
|
|
mov r0, r8
|
|
orrs r4, r0
|
|
_0800A646:
|
|
lsls r7, 1
|
|
adds r0, r6, 0
|
|
mov r2, r10
|
|
ands r0, r2
|
|
cmp r0, 0
|
|
beq _0800A656
|
|
mov r0, r8
|
|
orrs r7, r0
|
|
_0800A656:
|
|
lsls r6, 1
|
|
ands r6, r1
|
|
adds r0, r5, 0
|
|
adds r1, r4, 0
|
|
ldr r2, [sp, 0x4]
|
|
ldr r3, [sp, 0x8]
|
|
bl u32_pair_less_than
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
bne _0800A680
|
|
adds r0, r4, 0
|
|
movs r1, 0x1
|
|
ldr r2, [sp, 0x8]
|
|
subs r4, r2
|
|
ldr r2, [sp, 0x4]
|
|
subs r5, r2
|
|
cmp r0, r4
|
|
bcs _0800A682
|
|
subs r5, 0x1
|
|
b _0800A682
|
|
_0800A680:
|
|
movs r1, 0
|
|
_0800A682:
|
|
ldr r0, [sp, 0xC]
|
|
lsls r0, 1
|
|
str r0, [sp, 0xC]
|
|
mov r0, r9
|
|
mov r2, r10
|
|
ands r0, r2
|
|
cmp r0, 0
|
|
beq _0800A69A
|
|
ldr r0, [sp, 0xC]
|
|
mov r2, r8
|
|
orrs r0, r2
|
|
str r0, [sp, 0xC]
|
|
_0800A69A:
|
|
mov r0, r9
|
|
lsls r0, 1
|
|
mov r9, r0
|
|
cmp r1, 0
|
|
beq _0800A6AA
|
|
mov r1, r8
|
|
orrs r0, r1
|
|
mov r9, r0
|
|
_0800A6AA:
|
|
ldr r2, [sp, 0x10]
|
|
subs r2, 0x1
|
|
str r2, [sp, 0x10]
|
|
cmp r2, 0
|
|
bge _0800A622
|
|
ldr r0, [sp, 0xC]
|
|
ldr r1, [sp]
|
|
str r0, [r1]
|
|
mov r2, r9
|
|
str r2, [r1, 0x4]
|
|
_0800A6BE:
|
|
add sp, 0x14
|
|
pop {r3-r5}
|
|
mov r8, r3
|
|
mov r9, r4
|
|
mov r10, r5
|
|
pop {r4-r7}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A5A4
|
|
|
|
thumb_func_start sub_800A6D0
|
|
sub_800A6D0:
|
|
push {r4,lr}
|
|
adds r4, r0, 0
|
|
ldr r3, [r1]
|
|
ldr r0, [r2]
|
|
adds r3, r0
|
|
ldr r1, [r1, 0x4]
|
|
ldr r0, [r2, 0x4]
|
|
adds r0, r1, r0
|
|
cmp r0, r1
|
|
bcs _0800A6E6
|
|
adds r3, 0x1
|
|
_0800A6E6:
|
|
str r3, [r4]
|
|
str r0, [r4, 0x4]
|
|
pop {r4}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A6D0
|
|
|
|
thumb_func_start sub_800A6F0
|
|
sub_800A6F0:
|
|
push {r4,lr}
|
|
adds r4, r0, 0
|
|
ldr r3, [r1]
|
|
ldr r0, [r2]
|
|
subs r3, r0
|
|
ldr r1, [r1, 0x4]
|
|
ldr r0, [r2, 0x4]
|
|
subs r0, r1, r0
|
|
cmp r0, r1
|
|
bls _0800A706
|
|
subs r3, 0x1
|
|
_0800A706:
|
|
str r3, [r4]
|
|
str r0, [r4, 0x4]
|
|
pop {r4}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A6F0
|
|
|
|
thumb_func_start sub_800A710
|
|
sub_800A710:
|
|
push {r4-r7,lr}
|
|
mov r7, r8
|
|
push {r7}
|
|
sub sp, 0x18
|
|
mov r8, r0
|
|
adds r6, r2, 0
|
|
ldr r0, [r1]
|
|
str r0, [sp]
|
|
ldr r0, [r1, 0x4]
|
|
str r0, [sp, 0x4]
|
|
adds r4, r6, 0
|
|
cmp r6, 0
|
|
bge _0800A72C
|
|
negs r4, r6
|
|
_0800A72C:
|
|
movs r0, 0
|
|
str r0, [sp, 0x8]
|
|
movs r1, 0x80
|
|
lsls r1, 9
|
|
add r0, sp, 0x8
|
|
str r1, [r0, 0x4]
|
|
adds r7, r0, 0
|
|
cmp r4, 0
|
|
beq _0800A75E
|
|
adds r5, r7, 0
|
|
_0800A740:
|
|
movs r0, 0x1
|
|
ands r0, r4
|
|
cmp r0, 0
|
|
beq _0800A752
|
|
adds r0, r5, 0
|
|
adds r1, r5, 0
|
|
mov r2, sp
|
|
bl sub_800A34C
|
|
_0800A752:
|
|
mov r0, sp
|
|
bl sub_800A4A0
|
|
asrs r4, 1
|
|
cmp r4, 0
|
|
bne _0800A740
|
|
_0800A75E:
|
|
cmp r6, 0
|
|
bge _0800A776
|
|
movs r0, 0
|
|
str r0, [sp, 0x10]
|
|
movs r0, 0x80
|
|
lsls r0, 9
|
|
add r1, sp, 0x10
|
|
str r0, [r1, 0x4]
|
|
adds r0, r7, 0
|
|
adds r2, r7, 0
|
|
bl sub_800A3F0
|
|
_0800A776:
|
|
ldr r0, [sp, 0x8]
|
|
mov r1, r8
|
|
str r0, [r1]
|
|
ldr r0, [r7, 0x4]
|
|
str r0, [r1, 0x4]
|
|
add sp, 0x18
|
|
pop {r3}
|
|
mov r8, r3
|
|
pop {r4-r7}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A710
|
|
|
|
thumb_func_start sub_800A78C
|
|
sub_800A78C:
|
|
push {r4-r7,lr}
|
|
mov r7, r10
|
|
mov r6, r9
|
|
mov r5, r8
|
|
push {r5-r7}
|
|
sub sp, 0x20
|
|
mov r10, r0
|
|
ldr r0, [r1]
|
|
ldr r1, [r1, 0x4]
|
|
str r0, [sp]
|
|
str r1, [sp, 0x4]
|
|
ldr r0, [r2]
|
|
ldr r1, [r2, 0x4]
|
|
str r0, [sp, 0x8]
|
|
str r1, [sp, 0xC]
|
|
mov r0, sp
|
|
bl sub_800A27C
|
|
add r4, sp, 0x8
|
|
adds r0, r4, 0
|
|
bl sub_800A27C
|
|
mov r0, sp
|
|
adds r1, r4, 0
|
|
bl sub_800A2F0
|
|
lsls r0, 24
|
|
mov r8, r4
|
|
cmp r0, 0
|
|
beq _0800A7DC
|
|
ldr r2, [sp]
|
|
ldr r3, [sp, 0x4]
|
|
str r2, [sp, 0x10]
|
|
str r3, [sp, 0x14]
|
|
ldr r0, [sp, 0x8]
|
|
ldr r1, [sp, 0xC]
|
|
str r0, [sp]
|
|
str r1, [sp, 0x4]
|
|
str r2, [sp, 0x8]
|
|
str r3, [sp, 0xC]
|
|
_0800A7DC:
|
|
mov r0, r8
|
|
bl sub_800A2A0
|
|
lsls r0, 24
|
|
cmp r0, 0
|
|
bne _0800A878
|
|
movs r0, 0
|
|
mov r9, r0
|
|
add r7, sp, 0x10
|
|
add r6, sp, 0x18
|
|
b _0800A800
|
|
_0800A7F2:
|
|
mov r0, r8
|
|
mov r1, r8
|
|
adds r2, r7, 0
|
|
bl sub_800A34C
|
|
movs r2, 0x1
|
|
add r9, r2
|
|
_0800A800:
|
|
adds r4, r7, 0
|
|
mov r1, r8
|
|
adds r0, r4, 0
|
|
mov r2, sp
|
|
bl sub_800A3F0
|
|
adds r0, r4, 0
|
|
bl sub_800A4A0
|
|
ldr r0, [sp, 0x10]
|
|
str r0, [sp, 0x18]
|
|
ldr r1, [r4, 0x4]
|
|
movs r0, 0x80
|
|
lsls r0, 11
|
|
adds r1, r0
|
|
adds r5, r6, 0
|
|
str r1, [r5, 0x4]
|
|
ldr r0, [r4, 0x4]
|
|
cmp r1, r0
|
|
bcs _0800A82E
|
|
ldr r0, [sp, 0x18]
|
|
adds r0, 0x1
|
|
str r0, [sp, 0x18]
|
|
_0800A82E:
|
|
adds r0, r4, 0
|
|
adds r1, r4, 0
|
|
adds r2, r5, 0
|
|
bl sub_800A3F0
|
|
adds r0, r5, 0
|
|
mov r1, sp
|
|
adds r2, r4, 0
|
|
bl sub_800A34C
|
|
ldr r0, [sp, 0x18]
|
|
lsls r1, r0, 1
|
|
str r1, [sp, 0x18]
|
|
ldr r0, [r5, 0x4]
|
|
cmp r0, 0
|
|
bge _0800A854
|
|
movs r0, 0x1
|
|
orrs r1, r0
|
|
str r1, [sp, 0x18]
|
|
_0800A854:
|
|
ldr r0, [r6, 0x4]
|
|
lsls r0, 1
|
|
str r0, [r6, 0x4]
|
|
ldr r2, [sp, 0x4]
|
|
ldr r1, [sp]
|
|
ldr r0, [sp, 0x18]
|
|
adds r1, r0
|
|
str r1, [sp]
|
|
ldr r0, [r6, 0x4]
|
|
adds r0, r2, r0
|
|
str r0, [sp, 0x4]
|
|
cmp r2, r0
|
|
bls _0800A872
|
|
adds r0, r1, 0x1
|
|
str r0, [sp]
|
|
_0800A872:
|
|
mov r2, r9
|
|
cmp r2, 0x2
|
|
bne _0800A7F2
|
|
_0800A878:
|
|
ldr r0, [sp]
|
|
ldr r1, [sp, 0x4]
|
|
mov r2, r10
|
|
str r0, [r2]
|
|
str r1, [r2, 0x4]
|
|
add sp, 0x20
|
|
pop {r3-r5}
|
|
mov r8, r3
|
|
mov r9, r4
|
|
mov r10, r5
|
|
pop {r4-r7}
|
|
pop {r0}
|
|
bx r0
|
|
thumb_func_end sub_800A78C
|
|
|
|
.align 2, 0 @ Don't pad with nop.
|