pokeheartgold/asm/overlay_96.s

	.include "asm/macros.inc"
	.include "global.inc"

	.text

	thumb_func_start ov96_021E5900
ov96_021E5900: ; 0x021E5900
	push {r3, r4, r5, r6, lr}
	sub sp, #0x14
	mov r2, #0x72
	add r5, r0, #0
	mov r0, #3
	mov r1, #0x5c
	lsl r2, r2, #0xc
	bl sub_0201A910
	mov r1, #0xd7
	add r0, r5, #0
	lsl r1, r1, #4
	mov r2, #0x5c
	bl sub_02007280
	mov r2, #0xd7
	mov r1, #0
	lsl r2, r2, #4
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0xa1
	mov r1, #0x5c
	lsl r0, r0, #2
	str r1, [r4, r0]
	add r0, r5, #0
	bl sub_020072A4
	mov r2, #0x7e
	lsl r2, r2, #2
	add r5, sp, #4
	ldr r6, _021E5A28 ; =0x0221A7E4
	str r0, [r4, r2]
	add r3, r5, #0
	ldmia r6!, {r0, r1}
	stmia r5!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r5!, {r0, r1}
	add r1, r4, r2
	add r0, r3, #0
	mov r2, #0x5c
	bl OverlayManager_new
	mov r1, #0xa
	lsl r1, r1, #6
	str r0, [r4, r1]
	add r0, r1, #0
	mov r5, #0
	sub r0, #0xa0
	str r5, [r4, r0]
	add r0, r1, #0
	sub r0, #0x88
	ldr r0, [r4, r0]
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _021E597E
	mov r5, #1
	bl sub_02037454
	ldr r1, _021E5A2C ; =0x000001EE
	strb r0, [r4, r1]
	mov r1, #4
	b _021E5986
_021E597E:
	mov r0, #1
	sub r1, #0x92
	strb r0, [r4, r1]
	mov r1, #3
_021E5986:
	ldr r0, _021E5A30 ; =0x0000072A
	strb r1, [r4, r0]
	bl ov96_021E8A24
	add r6, r0, #0
	bl ov96_021E8A2C
	add r1, r0, #0
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r2, r4, #0
	str r0, [sp]
	add r0, r6, #0
	add r3, r5, #0
	bl ov96_021E8770
	mov r1, #0xa2
	lsl r1, r1, #2
	str r0, [r4, r1]
	mov r1, #0xf1
	lsl r1, r1, #2
	ldr r0, _021E5A34 ; =0x0221A984
	add r1, r4, r1
	bl ov96_021E5C80
	ldr r1, _021E5A38 ; =0x000003CA
	mov r3, #0
	sub r0, r1, #6
	add r2, r4, r0
	add r0, r1, #0
	strb r3, [r4, r1]
	sub r0, #0x16
	str r2, [r4, r0]
	sub r1, #0xa
	add r0, r4, #0
	str r3, [r4, r1]
	bl ov96_021E5C90
	mov r0, #0x5c
	bl ov96_021E92E0
	ldr r1, _021E5A3C ; =0x00000614
	str r0, [r4, r1]
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	ldr r0, [r0, #4]
	cmp r0, #1
	beq _021E59FE
	mov r0, #1
	bl TextFlags_SetCanABSpeedUpPrint
	mov r0, #0
	bl sub_02002B50
	mov r0, #1
	bl sub_02002B8C
	b _021E5A10
_021E59FE:
	mov r0, #0
	bl TextFlags_SetCanABSpeedUpPrint
	mov r0, #1
	bl sub_02002B50
	mov r0, #0
	bl sub_02002B8C
_021E5A10:
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DE0
	mov r0, #1
	add sp, #0x14
	pop {r3, r4, r5, r6, pc}
	nop
_021E5A28: .word 0x0221A7E4
_021E5A2C: .word 0x000001EE
_021E5A30: .word 0x0000072A
_021E5A34: .word 0x0221A984
_021E5A38: .word 0x000003CA
_021E5A3C: .word 0x00000614
	thumb_func_end ov96_021E5900

	thumb_func_start ov96_021E5A40
ov96_021E5A40: ; 0x021E5A40
	push {r3, r4, r5, lr}
	bl sub_02007290
	add r5, r0, #0
	mov r0, #0xed
	lsl r0, r0, #2
	add r4, r5, r0
	ldr r0, _021E5B78 ; =0x00000D2C
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _021E5A86
	sub r1, r0, #4
	ldrh r1, [r5, r1]
	add r2, r1, #1
	sub r1, r0, #4
	strh r2, [r5, r1]
	ldrh r2, [r5, r1]
	ldr r1, _021E5B7C ; =0x00000708
	cmp r2, r1
	blo _021E5A86
	add r1, r0, #0
	sub r1, #8
	ldr r2, [r5, r1]
	ldr r1, _021E5B80 ; =0x0000EA5F
	cmp r2, r1
	bge _021E5A80
	add r1, r0, #0
	sub r1, #8
	ldr r1, [r5, r1]
	sub r0, #8
	add r1, r1, #1
	str r1, [r5, r0]
_021E5A80:
	ldr r0, _021E5B84 ; =0x00000D28
	mov r1, #0
	strh r1, [r5, r0]
_021E5A86:
	ldr r0, [r4, #8]
	cmp r0, #4
	bhi _021E5B6E
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021E5A98: ; jump table
	.short _021E5AA2 - _021E5A98 - 2 ; case 0
	.short _021E5AD8 - _021E5A98 - 2 ; case 1
	.short _021E5AE6 - _021E5A98 - 2 ; case 2
	.short _021E5AFC - _021E5A98 - 2 ; case 3
	.short _021E5B14 - _021E5A98 - 2 ; case 4
_021E5AA2:
	add r0, r5, #0
	bl ov96_021E5C2C
	cmp r0, #0
	beq _021E5AB0
	mov r0, #1
	pop {r3, r4, r5, pc}
_021E5AB0:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	beq _021E5AC2
	ldr r1, [r4]
	ldrb r0, [r1, #7]
	strb r0, [r1, #6]
	mov r0, #0
	strb r0, [r1, #5]
	str r0, [r4, #0xc]
_021E5AC2:
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _021E5B6E
	cmp r0, #0x10
	bne _021E5AD2
	mov r0, #3
	str r0, [r4, #8]
	b _021E5B6E
_021E5AD2:
	mov r0, #1
	str r0, [r4, #8]
	b _021E5B6E
_021E5AD8:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl sub_02037AC0
	mov r0, #2
	str r0, [r4, #8]
_021E5AE6:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl sub_02037B38
	cmp r0, #0
	beq _021E5B6E
	mov r0, #0
	str r0, [r4, #8]
	str r0, [r4, #4]
	b _021E5B6E
_021E5AFC:
	ldr r0, [r4, #4]
	cmp r0, #0x10
	beq _021E5B06
	bl GF_AssertFail
_021E5B06:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl sub_02037AC0
	mov r0, #4
	str r0, [r4, #8]
_021E5B14:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl sub_02037B38
	cmp r0, #0
	bne _021E5B68
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E5B6E
	bl ov96_021E9A14
	mov r3, #0xad
	lsl r3, r3, #2
	add r1, r5, r3
	sub r3, #0x2c
	add r2, r0, #0
	ldr r3, [r5, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
	mov r0, #0xb7
	lsl r0, r0, #2
	add r0, r5, r0
	bl ov96_021E8A20
	add r4, r0, #0
	mov r0, #0xa3
	lsl r0, r0, #2
	add r0, r5, r0
	bl ov96_021E8A20
	mov r2, #0x28
_021E5B5A:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r4]
	add r4, r4, #1
	sub r2, r2, #1
	bne _021E5B5A
	b _021E5B6E
_021E5B68:
	mov r0, #0
	str r0, [r4, #8]
	str r0, [r4, #4]
_021E5B6E:
	add r0, r5, #0
	bl ov96_021E67AC
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E5B78: .word 0x00000D2C
_021E5B7C: .word 0x00000708
_021E5B80: .word 0x0000EA5F
_021E5B84: .word 0x00000D28
	thumb_func_end ov96_021E5A40

	thumb_func_start ov96_021E5B88
ov96_021E5B88: ; 0x021E5B88
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl sub_02007290
	add r4, r0, #0
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021E5BA0
	bl GF_AssertFail
_021E5BA0:
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	ldrb r0, [r0, #0xe]
	cmp r0, #0
	bne _021E5BBC
	ldr r0, _021E5C14 ; =0x00000D64
	ldr r0, [r4, r0]
	bl FreeToHeap
	ldr r0, _021E5C18 ; =0x00000D68
	ldr r0, [r4, r0]
	bl FreeToHeap
_021E5BBC:
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	ldr r0, [r0]
	bl sub_02031968
	bl sub_020319F0
	add r2, r0, #0
	ldr r0, _021E5C1C ; =0x00000D24
	ldr r1, _021E5C20 ; =0x0000EA5F
	ldr r0, [r4, r0]
	bl ov96_021E7F98
	mov r0, #0
	bl TextFlags_SetCanABSpeedUpPrint
	mov r0, #0
	bl sub_02002B50
	mov r0, #0
	bl sub_02002B8C
	ldr r0, _021E5C24 ; =0x00000614
	ldr r0, [r4, r0]
	bl ov96_021E9320
	ldr r0, _021E5C28 ; =0x000005DC
	ldr r0, [r4, r0]
	bl FreeToHeap
	mov r0, #0xa2
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021E8810
	add r0, r5, #0
	bl sub_02007294
	mov r0, #0x5c
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E5C14: .word 0x00000D64
_021E5C18: .word 0x00000D68
_021E5C1C: .word 0x00000D24
_021E5C20: .word 0x0000EA5F
_021E5C24: .word 0x00000614
_021E5C28: .word 0x000005DC
	thumb_func_end ov96_021E5B88

	thumb_func_start ov96_021E5C2C
ov96_021E5C2C: ; 0x021E5C2C
	push {r3, lr}
	ldr r2, _021E5C4C ; =0x000003C9
	sub r3, r2, #5
	add r1, r0, r2
	add r2, r2, #1
	ldrb r2, [r0, r2]
	ldr r3, [r0, r3]
	lsl r2, r2, #2
	ldr r2, [r3, r2]
	blx r2
	cmp r0, #0
	beq _021E5C48
	mov r0, #1
	pop {r3, pc}
_021E5C48:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
_021E5C4C: .word 0x000003C9
	thumb_func_end ov96_021E5C2C

	thumb_func_start ov96_021E5C50
ov96_021E5C50: ; 0x021E5C50
	push {r3, r4, r5, r6, r7, lr}
	mov r6, #0x7e
	lsl r6, r6, #2
	add r4, r6, #0
	add r5, r0, #0
	mov r7, #0
	sub r4, #0x18
_021E5C5E:
	ldr r2, [r5, r4]
	add r0, r5, #0
	ldr r2, [r2]
	add r1, r7, #0
	blx r2
	cmp r0, #1
	bne _021E5C70
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021E5C70:
	cmp r0, #0
	beq _021E5C7C
	ldr r0, [r5, r6]
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _021E5C5E
_021E5C7C:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E5C50

	thumb_func_start ov96_021E5C80
ov96_021E5C80: ; 0x021E5C80
	str r0, [r1]
	mov r0, #1
	strb r0, [r1, #4]
	mov r0, #0
	strb r0, [r1, #5]
	strb r0, [r1, #6]
	strb r0, [r1, #7]
	bx lr
	thumb_func_end ov96_021E5C80

	thumb_func_start ov96_021E5C90
ov96_021E5C90: ; 0x021E5C90
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl sub_02028ECC
	add r1, r0, #0
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	lsl r1, r1, #2
	bl AllocFromHeap
	ldr r1, _021E5D1C ; =0x000005DC
	mov r4, #0
	str r0, [r5, r1]
	add r6, r1, #0
_021E5CAE:
	ldr r0, [r5, r6]
	add r1, r4, #0
	bl ov96_021E5D24
	bl sub_02028EF0
	add r4, r4, #1
	cmp r4, #4
	blt _021E5CAE
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	ldr r1, [r1, #4]
	cmp r1, #0
	bne _021E5CEC
	ldr r0, _021E5D1C ; =0x000005DC
	mov r1, #0
	ldr r0, [r5, r0]
	bl ov96_021E5D24
	add r4, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl Sav2_PlayerData_GetProfileAddr
	add r1, r4, #0
	bl sub_02028EE4
	pop {r3, r4, r5, r6, r7, pc}
_021E5CEC:
	sub r0, #0xa
	ldrb r0, [r5, r0]
	mov r6, #0
	cmp r0, #0
	ble _021E5D18
	ldr r7, _021E5D20 ; =0x000001EE
_021E5CF8:
	ldr r0, _021E5D1C ; =0x000005DC
	add r1, r6, #0
	ldr r0, [r5, r0]
	bl ov96_021E5D24
	add r4, r0, #0
	add r0, r6, #0
	bl sub_02034818
	add r1, r4, #0
	bl sub_02028EE4
	ldrb r0, [r5, r7]
	add r6, r6, #1
	cmp r6, r0
	blt _021E5CF8
_021E5D18:
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E5D1C: .word 0x000005DC
_021E5D20: .word 0x000001EE
	thumb_func_end ov96_021E5C90

	thumb_func_start ov96_021E5D24
ov96_021E5D24: ; 0x021E5D24
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	bl sub_02028ECC
	mul r0, r4
	add r0, r5, r0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E5D24

	thumb_func_start ov96_021E5D34
ov96_021E5D34: ; 0x021E5D34
	ldr r1, _021E5D3C ; =0x000001EE
	ldrb r0, [r0, r1]
	bx lr
	nop
_021E5D3C: .word 0x000001EE
	thumb_func_end ov96_021E5D34

	thumb_func_start ov96_021E5D40
ov96_021E5D40: ; 0x021E5D40
	mov r2, #0xfb
	lsl r2, r2, #2
	add r2, r0, r2
	mov r0, #0x7c
	mul r0, r1
	add r0, r2, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E5D40

	thumb_func_start ov96_021E5D50
ov96_021E5D50: ; 0x021E5D50
	mov r2, #0x3f
	lsl r2, r2, #4
	add r2, r0, r2
	mov r0, #0x7c
	mul r0, r1
	add r0, r2, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E5D50

	thumb_func_start ov96_021E5D60
ov96_021E5D60: ; 0x021E5D60
	mov r1, #0x7e
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	ldr r0, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E5D60

	thumb_func_start ov96_021E5D6C
ov96_021E5D6C: ; 0x021E5D6C
	ldr r1, _021E5D74 ; =0x0000072C
	add r0, r0, r1
	bx lr
	nop
_021E5D74: .word 0x0000072C
	thumb_func_end ov96_021E5D6C

	thumb_func_start ov96_021E5D78
ov96_021E5D78: ; 0x021E5D78
	ldr r2, _021E5D84 ; =0x0000072C
	add r2, r0, r2
	mov r0, #0x60
	mul r0, r1
	add r0, r2, r0
	bx lr
	.balign 4, 0
_021E5D84: .word 0x0000072C
	thumb_func_end ov96_021E5D78

	thumb_func_start ov96_021E5D88
ov96_021E5D88: ; 0x021E5D88
	ldr r1, _021E5D90 ; =0x00000BA4
	add r0, r0, r1
	bx lr
	nop
_021E5D90: .word 0x00000BA4
	thumb_func_end ov96_021E5D88

	thumb_func_start ov96_021E5D94
ov96_021E5D94: ; 0x021E5D94
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl AllocFromHeap
	mov r1, #0x79
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [r4, r1]
	pop {r4, pc}
	thumb_func_end ov96_021E5D94

	thumb_func_start ov96_021E5DAC
ov96_021E5DAC: ; 0x021E5DAC
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl FreeToHeap
	mov r0, #0x79
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r4, r0]
	pop {r4, pc}
	thumb_func_end ov96_021E5DAC

	thumb_func_start ov96_021E5DC4
ov96_021E5DC4: ; 0x021E5DC4
	mov r1, #0x79
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021E5DC4

	thumb_func_start ov96_021E5DCC
ov96_021E5DCC: ; 0x021E5DCC
	mov r1, #0xa1
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021E5DCC

	thumb_func_start ov96_021E5DD4
ov96_021E5DD4: ; 0x021E5DD4
	ldr r1, _021E5DDC ; =0x000001ED
	ldrb r0, [r0, r1]
	bx lr
	nop
_021E5DDC: .word 0x000001ED
	thumb_func_end ov96_021E5DD4

	thumb_func_start ov96_021E5DE0
ov96_021E5DE0: ; 0x021E5DE0
	ldr r2, _021E5DE8 ; =0x000001ED
	strb r1, [r0, r2]
	bx lr
	nop
_021E5DE8: .word 0x000001ED
	thumb_func_end ov96_021E5DE0

	thumb_func_start ov96_021E5DEC
ov96_021E5DEC: ; 0x021E5DEC
	ldr r1, _021E5DF8 ; =0x000001ED
	ldrb r2, [r0, r1]
	add r2, r2, #1
	strb r2, [r0, r1]
	bx lr
	nop
_021E5DF8: .word 0x000001ED
	thumb_func_end ov96_021E5DEC

	thumb_func_start ov96_021E5DFC
ov96_021E5DFC: ; 0x021E5DFC
	mov r2, #0x7d
	lsl r2, r2, #2
	str r1, [r0, r2]
	bx lr
	thumb_func_end ov96_021E5DFC

	thumb_func_start ov96_021E5E04
ov96_021E5E04: ; 0x021E5E04
	push {r4, r5, r6, lr}
	ldr r2, _021E5E40 ; =0x0000072A
	add r4, r0, #0
	ldrb r2, [r4, r2]
	mov r0, #0
	cmp r2, #0
	ble _021E5E28
	mov r3, #0xf6
	ldr r5, _021E5E40 ; =0x0000072A
	add r2, r4, #0
	lsl r3, r3, #2
_021E5E1A:
	ldrb r6, [r1, r0]
	add r0, r0, #1
	str r6, [r2, r3]
	ldrb r6, [r4, r5]
	add r2, r2, #4
	cmp r0, r6
	blt _021E5E1A
_021E5E28:
	add r0, r4, #0
	bl ov96_021E5E7C
	mov r1, #0xfa
	lsl r1, r1, #2
	str r0, [r4, r1]
	mov r0, #0x9f
	ldr r1, [r4, r1]
	lsl r0, r0, #2
	str r1, [r4, r0]
	pop {r4, r5, r6, pc}
	nop
_021E5E40: .word 0x0000072A
	thumb_func_end ov96_021E5E04

	thumb_func_start ov96_021E5E44
ov96_021E5E44: ; 0x021E5E44
	mov r1, #0x1f
	lsl r1, r1, #4
	ldr r1, [r0, r1]
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xf6
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E5E44

	thumb_func_start ov96_021E5E58
ov96_021E5E58: ; 0x021E5E58
	push {r3, lr}
	ldr r2, _021E5E78 ; =0x0000072A
	ldrb r2, [r0, r2]
	cmp r1, r2
	blo _021E5E6A
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
_021E5E6A:
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xf6
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	pop {r3, pc}
	nop
_021E5E78: .word 0x0000072A
	thumb_func_end ov96_021E5E58

	thumb_func_start ov96_021E5E7C
ov96_021E5E7C: ; 0x021E5E7C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021E5E8C
	mov r1, #1
	b _021E5E8E
_021E5E8C:
	mov r1, #0
_021E5E8E:
	mov r0, #0xf6
	lsl r0, r0, #2
	add r3, r4, r0
	cmp r1, #0
	beq _021E5E9C
	mov r0, #4
	b _021E5E9E
_021E5E9C:
	mov r0, #3
_021E5E9E:
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	mov r0, #0
_021E5EA4:
	mov r4, #1
	mov r1, #0
	cmp r2, #0
	bls _021E5ECA
	ldr r5, _021E5EDC ; =0x0221A934
	lsl r6, r0, #2
	add r5, r5, r6
_021E5EB2:
	lsl r6, r1, #2
	ldr r7, [r3, r6]
	ldrb r6, [r5, r1]
	cmp r7, r6
	beq _021E5EC0
	mov r4, #0
	b _021E5ECA
_021E5EC0:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r2
	blo _021E5EB2
_021E5ECA:
	cmp r4, #0
	bne _021E5EDA
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0xa
	blo _021E5EA4
	mov r0, #0xa
_021E5EDA:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E5EDC: .word 0x0221A934
	thumb_func_end ov96_021E5E7C

	thumb_func_start ov96_021E5EE0
ov96_021E5EE0: ; 0x021E5EE0
	mov r1, #0x1f
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021E5EE0

	thumb_func_start ov96_021E5EE8
ov96_021E5EE8: ; 0x021E5EE8
	mov r1, #0x7e
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	ldr r0, [r0, #4]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E5EE8

	thumb_func_start ov96_021E5EF4
ov96_021E5EF4: ; 0x021E5EF4
	ldr r1, _021E5EFC ; =0x000001EF
	ldrb r0, [r0, r1]
	bx lr
	nop
_021E5EFC: .word 0x000001EF
	thumb_func_end ov96_021E5EF4

	thumb_func_start ov96_021E5F00
ov96_021E5F00: ; 0x021E5F00
	ldr r1, _021E5F0C ; =0x000001EF
	ldrb r2, [r0, r1]
	add r2, r2, #1
	strb r2, [r0, r1]
	bx lr
	nop
_021E5F0C: .word 0x000001EF
	thumb_func_end ov96_021E5F00

	thumb_func_start ov96_021E5F10
ov96_021E5F10: ; 0x021E5F10
	ldr r1, _021E5F18 ; =0x000001EF
	mov r2, #0
	strb r2, [r0, r1]
	bx lr
	.balign 4, 0
_021E5F18: .word 0x000001EF
	thumb_func_end ov96_021E5F10

	thumb_func_start ov96_021E5F1C
ov96_021E5F1C: ; 0x021E5F1C
	mov r1, #0xa2
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021E5F1C

	thumb_func_start ov96_021E5F24
ov96_021E5F24: ; 0x021E5F24
	mov r1, #0xa2
	lsl r1, r1, #2
	ldr r3, _021E5F30 ; =ov96_021E8828
	ldr r0, [r0, r1]
	bx r3
	nop
_021E5F30: .word ov96_021E8828
	thumb_func_end ov96_021E5F24

	thumb_func_start ov96_021E5F34
ov96_021E5F34: ; 0x021E5F34
	ldr r2, _021E5F3C ; =0x000005DC
	ldr r3, _021E5F40 ; =ov96_021E5D24
	ldr r0, [r0, r2]
	bx r3
	.balign 4, 0
_021E5F3C: .word 0x000005DC
_021E5F40: .word ov96_021E5D24
	thumb_func_end ov96_021E5F34

	thumb_func_start ov96_021E5F44
ov96_021E5F44: ; 0x021E5F44
	ldr r2, _021E5F50 ; =0x00000974
	add r2, r0, r2
	mov r0, #0x74
	mul r0, r1
	add r0, r2, r0
	bx lr
	.balign 4, 0
_021E5F50: .word 0x00000974
	thumb_func_end ov96_021E5F44

	thumb_func_start ov96_021E5F54
ov96_021E5F54: ; 0x021E5F54
	mov r1, #0xa3
	lsl r1, r1, #2
	add r0, r0, r1
	bx lr
	thumb_func_end ov96_021E5F54

	thumb_func_start ov96_021E5F5C
ov96_021E5F5C: ; 0x021E5F5C
	mov r1, #0xa3
	lsl r1, r1, #2
	mov r2, #0x4a
	add r0, r0, r1
	ldr r3, _021E5F6C ; =MIi_CpuFill8
	mov r1, #0
	lsl r2, r2, #2
	bx r3
	.balign 4, 0
_021E5F6C: .word MIi_CpuFill8
	thumb_func_end ov96_021E5F5C

	thumb_func_start ov96_021E5F70
ov96_021E5F70: ; 0x021E5F70
	push {r3, r4}
	mov r4, #0xe9
	lsl r4, r4, #2
	str r1, [r0, r4]
	add r1, r4, #4
	str r2, [r0, r1]
	add r1, r4, #0
	add r1, #8
	str r3, [r0, r1]
	mov r1, #1
	add r4, #0xc
	str r1, [r0, r4]
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021E5F70

	thumb_func_start ov96_021E5F8C
ov96_021E5F8C: ; 0x021E5F8C
	mov r2, #0xe9
	lsl r2, r2, #2
	mov r3, #0
	str r3, [r0, r2]
	add r1, r2, #4
	str r3, [r0, r1]
	add r1, r2, #0
	add r1, #8
	str r3, [r0, r1]
	add r2, #0xc
	str r3, [r0, r2]
	bx lr
	thumb_func_end ov96_021E5F8C

	thumb_func_start ov96_021E5FA4
ov96_021E5FA4: ; 0x021E5FA4
	mov r1, #0xea
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021E5FA4

	thumb_func_start ov96_021E5FAC
ov96_021E5FAC: ; 0x021E5FAC
	mov r0, #4
	bx lr
	thumb_func_end ov96_021E5FAC

	thumb_func_start ov96_021E5FB0
ov96_021E5FB0: ; 0x021E5FB0
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0x5e
	lsl r0, r0, #4
	strh r2, [r1, r0]
	bx lr
	thumb_func_end ov96_021E5FB0

	thumb_func_start ov96_021E5FBC
ov96_021E5FBC: ; 0x021E5FBC
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0x5f
	lsl r0, r0, #4
	ldrh r0, [r1, r0]
	bx lr
	thumb_func_end ov96_021E5FBC

	thumb_func_start ov96_021E5FC8
ov96_021E5FC8: ; 0x021E5FC8
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r0, #0xf
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	add r4, r1, #0
	cmp r0, #1
	bne _021E5FDC
	bl GF_AssertFail
_021E5FDC:
	mov r0, #0xf
	mov r1, #1
	lsl r0, r0, #6
	str r1, [r5, r0]
	sub r0, #0xc
	ldr r0, [r5, r0]
	strb r4, [r0, #7]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E5FC8

	thumb_func_start ov96_021E5FEC
ov96_021E5FEC: ; 0x021E5FEC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r0, #0xed
	lsl r0, r0, #2
	add r4, r1, #0
	ldr r1, [r5, r0]
	ldrb r1, [r1, #7]
	cmp r1, r2
	beq _021E6018
	add r0, #0xc
	ldr r0, [r5, r0]
	cmp r0, #1
	bne _021E600A
	bl GF_AssertFail
_021E600A:
	mov r0, #0xf
	mov r1, #1
	lsl r0, r0, #6
	str r1, [r5, r0]
	sub r0, #0xc
	ldr r0, [r5, r0]
	strb r4, [r0, #7]
_021E6018:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E5FEC

	thumb_func_start ov96_021E601C
ov96_021E601C: ; 0x021E601C
	mov r2, #0x7e
	lsl r2, r2, #2
	ldr r2, [r0, r2]
	ldr r2, [r2, #4]
	cmp r2, #1
	bne _021E602E
	mov r2, #0xee
	lsl r2, r2, #2
	str r1, [r0, r2]
_021E602E:
	bx lr
	thumb_func_end ov96_021E601C

	thumb_func_start ov96_021E6030
ov96_021E6030: ; 0x021E6030
	ldr r3, _021E6038 ; =sub_0201A0FC
	add r1, r0, #0
	ldr r0, _021E603C ; =ov96_021E75BC
	bx r3
	.balign 4, 0
_021E6038: .word sub_0201A0FC
_021E603C: .word ov96_021E75BC
	thumb_func_end ov96_021E6030

	thumb_func_start ov96_021E6040
ov96_021E6040: ; 0x021E6040
	ldr r1, _021E6048 ; =0x00000614
	ldr r0, [r0, r1]
	bx lr
	nop
_021E6048: .word 0x00000614
	thumb_func_end ov96_021E6040

	thumb_func_start ov96_021E604C
ov96_021E604C: ; 0x021E604C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	mov r2, #0xa1
	ldr r1, [sp]
	lsl r2, r2, #2
	ldr r1, [r1, r2]
	mov r0, #0xa9
	bl NARC_ctor
	add r7, r0, #0
	mov r0, #0
	str r0, [sp, #8]
	ldr r1, _021E60B8 ; =0x00000618
	ldr r0, [sp]
	add r0, r0, r1
	str r0, [sp, #4]
_021E606E:
	ldr r4, [sp]
	ldr r5, [sp, #4]
	mov r6, #0
_021E6074:
	mov r0, #0x3f
	ldr r1, _021E60BC ; =0x000003F2
	lsl r0, r0, #4
	ldrh r0, [r4, r0]
	ldrh r1, [r4, r1]
	bl ov96_021E679C
	add r1, r0, #0
	add r0, r7, #0
	add r2, r5, #0
	bl NARC_ReadWholeMember
	add r6, r6, #1
	add r4, #0x28
	add r5, #0x14
	cmp r6, #3
	blt _021E6074
	ldr r0, [sp]
	add r0, #0x7c
	str r0, [sp]
	ldr r0, [sp, #4]
	add r0, #0x3c
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _021E606E
	add r0, r7, #0
	bl NARC_dtor
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_021E60B8: .word 0x00000618
_021E60BC: .word 0x000003F2
	thumb_func_end ov96_021E604C

	thumb_func_start ov96_021E60C0
ov96_021E60C0: ; 0x021E60C0
	ldr r3, _021E60D4 ; =0x00000618
	add r3, r0, r3
	mov r0, #0x3c
	mul r0, r1
	add r1, r3, r0
	mov r0, #0x14
	mul r0, r2
	add r0, r1, r0
	bx lr
	nop
_021E60D4: .word 0x00000618
	thumb_func_end ov96_021E60C0

	thumb_func_start ov96_021E60D8
ov96_021E60D8: ; 0x021E60D8
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r0, #0
	add r4, r2, #0
	cmp r5, #4
	blt _021E60E8
	bl GF_AssertFail
_021E60E8:
	cmp r4, #3
	blt _021E60F0
	bl GF_AssertFail
_021E60F0:
	mov r0, #0xfe
	lsl r0, r0, #2
	add r1, r6, r0
	mov r0, #0x7c
	mul r0, r5
	add r1, r1, r0
	mov r0, #0x28
	mul r0, r4
	add r0, r1, r0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E60D8

	thumb_func_start ov96_021E6104
ov96_021E6104: ; 0x021E6104
	mov r0, #0x50
	bx lr
	thumb_func_end ov96_021E6104

	thumb_func_start ov96_021E6108
ov96_021E6108: ; 0x021E6108
	push {r3, lr}
	cmp r0, #0
	bne _021E6112
	mov r0, #0
	pop {r3, pc}
_021E6112:
	ldrb r0, [r0, #8]
	cmp r0, #1
	beq _021E6122
	cmp r0, #2
	beq _021E6126
	cmp r0, #3
	beq _021E612A
	b _021E612E
_021E6122:
	mov r0, #1
	pop {r3, pc}
_021E6126:
	mov r0, #2
	pop {r3, pc}
_021E612A:
	mov r0, #3
	pop {r3, pc}
_021E612E:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6108

	thumb_func_start ov96_021E6138
ov96_021E6138: ; 0x021E6138
	push {r3, lr}
	cmp r0, #0
	bne _021E6142
	mov r0, #0
	pop {r3, pc}
_021E6142:
	ldrb r0, [r0, #6]
	cmp r0, #1
	beq _021E6152
	cmp r0, #2
	beq _021E6156
	cmp r0, #3
	beq _021E615A
	b _021E615E
_021E6152:
	mov r0, #1
	pop {r3, pc}
_021E6156:
	mov r0, #2
	pop {r3, pc}
_021E615A:
	mov r0, #3
	pop {r3, pc}
_021E615E:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6138

	thumb_func_start ov96_021E6168
ov96_021E6168: ; 0x021E6168
	push {r3, r4, r5, r6, r7, lr}
	add r5, r2, #0
	add r7, r0, #0
	add r6, r1, #0
	add r4, r3, #0
	cmp r5, #3
	blt _021E617A
	bl GF_AssertFail
_021E617A:
	add r0, r7, #0
	add r1, r6, #0
	bl ov96_021E5D50
	mov r1, #0x28
	add r3, r5, #0
	mul r3, r1
	add r1, r0, r3
	ldrb r2, [r1, #0x10]
	strb r2, [r4, #6]
	ldrh r0, [r0, r3]
	strh r0, [r4]
	ldrh r0, [r1, #2]
	strh r0, [r4, #2]
	ldrb r0, [r1, #0x11]
	strb r0, [r4, #7]
	str r6, [r4, #8]
	ldr r0, [r1, #4]
	str r0, [r4, #0xc]
	ldrh r0, [r4]
	cmp r0, #0
	bne _021E61AA
	bl GF_AssertFail
_021E61AA:
	ldrh r0, [r4]
	cmp r0, #0
	bne _021E61B4
	mov r0, #1
	strh r0, [r4]
_021E61B4:
	ldrh r0, [r4]
	bl sub_0206A304
	add r2, r0, #0
	add r0, sp, #0
	mov r1, #0x8d
	bl ReadWholeNarcMemberByIdPair
	add r0, sp, #0
	ldrb r0, [r0, #1]
	cmp r0, #0
	beq _021E61D2
	mov r0, #1
	strh r0, [r4, #4]
	pop {r3, r4, r5, r6, r7, pc}
_021E61D2:
	mov r0, #0
	strh r0, [r4, #4]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E6168

	thumb_func_start ov96_021E61D8
ov96_021E61D8: ; 0x021E61D8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r5, r0, #0
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r6, r2, #0
	add r7, r3, #0
	add r4, r1, #0
	str r0, [sp]
	add r0, r6, #0
	add r1, r7, #0
	mov r2, #0
	mov r3, #1
	bl ov96_021EA214
	ldr r1, _021E6280 ; =0x00000708
	mov r3, #0xa1
	str r0, [r5, r1]
	lsl r3, r3, #2
	ldr r3, [r5, r3]
	add r0, r6, #0
	add r1, r7, #0
	mov r2, #0
	bl ov96_021EA4D4
	mov r1, #0x71
	lsl r1, r1, #4
	str r0, [r5, r1]
	mov r3, #0xa1
	lsl r3, r3, #2
	ldr r3, [r5, r3]
	add r0, r6, #0
	add r1, r7, #0
	mov r2, #0
	bl ov96_021EA584
	ldr r1, _021E6284 ; =0x00000714
	str r0, [r5, r1]
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp, #0x10]
	add r0, r4, #0
	add r0, #0x60
	lsl r0, r0, #0xc
	sub r1, #0xc
	str r0, [sp, #0x14]
	ldr r0, [r5, r1]
	add r1, sp, #0x10
	bl sub_020247D4
	ldr r0, _021E6288 ; =0x0000070E
	mov r1, #0
	strh r4, [r5, r0]
	str r1, [sp, #0xc]
	mov r1, #2
	lsl r1, r1, #0x12
	str r1, [sp, #4]
	ldrh r1, [r5, r0]
	add r0, r0, #6
	add r1, #0x48
	lsl r1, r1, #0xc
	str r1, [sp, #8]
	ldr r0, [r5, r0]
	add r1, sp, #4
	bl sub_020247D4
	ldr r0, _021E628C ; =0x0000070D
	mov r1, #0
	strb r1, [r5, r0]
	add r4, #0x82
	lsl r1, r4, #0xc
	str r1, [sp, #0x14]
	add r0, r0, #3
	ldr r0, [r5, r0]
	add r1, sp, #0x10
	bl sub_020247D4
	ldr r0, _021E6280 ; =0x00000708
	add r0, r5, r0
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021E6280: .word 0x00000708
_021E6284: .word 0x00000714
_021E6288: .word 0x0000070E
_021E628C: .word 0x0000070D
	thumb_func_end ov96_021E61D8

	thumb_func_start ov96_021E6290
ov96_021E6290: ; 0x021E6290
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	add r0, r3, #0
	bl ov96_021EB5E8
	add r3, r0, #0
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_021E61D8
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E6290

	thumb_func_start ov96_021E62AC
ov96_021E62AC: ; 0x021E62AC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r7, r0, #0
	ldr r0, [sp, #0x30]
	str r1, [sp, #4]
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x34]
	ldr r1, _021E6340 ; =0x00000728
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x38]
	str r2, [sp, #8]
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x34]
	str r3, [sp, #0xc]
	strb r0, [r7, r1]
	ldr r0, [sp, #0x34]
	mov r4, #0
	cmp r0, #0
	bls _021E631E
_021E62D2:
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	lsl r6, r4, #2
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0x30]
	mov r3, #0
	add r5, r7, r6
	bl ov96_021EA6E4
	ldr r1, _021E6344 ; =0x0000071C
	str r0, [r5, r1]
	mov r0, #0
	str r0, [sp, #0x18]
	ldr r1, [sp, #0x38]
	ldr r0, [sp, #0x38]
	ldrh r1, [r1, r6]
	add r0, r0, r6
	lsl r1, r1, #0xc
	str r1, [sp, #0x10]
	ldrh r1, [r0, #2]
	ldr r0, [sp, #4]
	add r0, r0, r1
	lsl r0, r0, #0xc
	str r0, [sp, #0x14]
	ldr r0, _021E6344 ; =0x0000071C
	add r1, sp, #0x10
	ldr r0, [r5, r0]
	bl sub_020247D4
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [sp, #0x34]
	cmp r4, r0
	blo _021E62D2
_021E631E:
	cmp r4, #3
	bhs _021E6336
	ldr r0, _021E6344 ; =0x0000071C
	mov r2, #0
_021E6326:
	lsl r1, r4, #2
	add r1, r7, r1
	str r2, [r1, r0]
	add r1, r4, #1
	lsl r1, r1, #0x18
	lsr r4, r1, #0x18
	cmp r4, #3
	blo _021E6326
_021E6336:
	ldr r0, _021E6348 ; =0x00000729
	mov r1, #0
	strb r1, [r7, r0]
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021E6340: .word 0x00000728
_021E6344: .word 0x0000071C
_021E6348: .word 0x00000729
	thumb_func_end ov96_021E62AC

	thumb_func_start ov96_021E634C
ov96_021E634C: ; 0x021E634C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r0, r3, #0
	add r4, r1, #0
	add r6, r2, #0
	bl ov96_021EB5E8
	add r3, r0, #0
	ldr r0, [sp, #0x20]
	add r1, r4, #0
	str r0, [sp]
	add r0, sp, #0x10
	ldrb r0, [r0, #0x14]
	add r2, r6, #0
	str r0, [sp, #4]
	ldr r0, [sp, #0x28]
	str r0, [sp, #8]
	add r0, r5, #0
	bl ov96_021E62AC
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E634C

	thumb_func_start ov96_021E637C
ov96_021E637C: ; 0x021E637C
	push {r3, r4, r5, lr}
	ldr r1, _021E643C ; =0x00000729
	add r5, r0, #0
	ldrb r2, [r5, r1]
	mov r4, #0
	cmp r2, #0
	beq _021E6394
	cmp r2, #1
	beq _021E63AA
	cmp r2, #2
	beq _021E63C4
	b _021E6438
_021E6394:
	ldr r0, _021E6440 ; =0x0000089A
	bl PlaySE
	add r0, r5, #0
	bl ov96_021E65D8
	ldr r0, _021E643C ; =0x00000729
	ldrb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, r0]
	b _021E6438
_021E63AA:
	bl ov96_021E661C
	cmp r0, #0
	beq _021E6438
	ldr r0, _021E643C ; =0x00000729
	ldrb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, r0]
	mov r0, #7
	add r1, r4, #0
	bl sub_020053A8
	b _021E6438
_021E63C4:
	sub r1, #0x1d
	ldrb r0, [r5, r1]
	cmp r0, #0
	bne _021E63E8
	ldr r0, _021E6444 ; =0x0000089D
	bl PlaySE
	ldr r0, _021E6448 ; =0x00000708
	mov r1, #1
	ldr r0, [r5, r0]
	bl sub_02024830
	ldr r0, _021E6448 ; =0x00000708
	add r1, r4, #0
	ldr r0, [r5, r0]
	bl sub_020248F0
	b _021E6412
_021E63E8:
	cmp r0, #0x15
	bne _021E63FE
	ldr r0, _021E6444 ; =0x0000089D
	bl PlaySE
	ldr r0, _021E6448 ; =0x00000708
	mov r1, #1
	ldr r0, [r5, r0]
	bl sub_020248F0
	b _021E6412
_021E63FE:
	cmp r0, #0x2a
	bne _021E6412
	ldr r0, _021E6444 ; =0x0000089D
	bl PlaySE
	ldr r0, _021E6448 ; =0x00000708
	mov r1, #2
	ldr r0, [r5, r0]
	bl sub_020248F0
_021E6412:
	ldr r0, _021E644C ; =0x0000070C
	ldrb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, r0]
	ldrb r0, [r5, r0]
	cmp r0, #0x3f
	bls _021E6438
	ldr r0, _021E6450 ; =0x00000892
	bl PlaySE
	ldr r0, _021E6448 ; =0x00000708
	mov r1, #0
	ldr r0, [r5, r0]
	bl sub_02024830
	ldr r0, _021E644C ; =0x0000070C
	mov r1, #0
	strb r1, [r5, r0]
	mov r4, #1
_021E6438:
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E643C: .word 0x00000729
_021E6440: .word 0x0000089A
_021E6444: .word 0x0000089D
_021E6448: .word 0x00000708
_021E644C: .word 0x0000070C
_021E6450: .word 0x00000892
	thumb_func_end ov96_021E637C

	thumb_func_start ov96_021E6454
ov96_021E6454: ; 0x021E6454
	push {r3, r4, r5, lr}
	add r1, #0x1d
	add r5, r0, #0
	add r0, r1, #0
	mov r1, #0x1e
	bl _s32_div_f
	add r4, r0, #0
	cmp r4, #0
	bgt _021E6474
	ldr r0, _021E64AC ; =0x00000714
	mov r1, #0
	ldr r0, [r5, r0]
	bl sub_02024830
	pop {r3, r4, r5, pc}
_021E6474:
	cmp r4, #3
	bgt _021E64A0
	ldr r0, _021E64B0 ; =0x0000072B
	ldrb r0, [r5, r0]
	cmp r0, r4
	beq _021E648A
	ldr r0, _021E64B4 ; =0x00000897
	bl PlaySE
	ldr r0, _021E64B0 ; =0x0000072B
	strb r4, [r5, r0]
_021E648A:
	ldr r0, _021E64AC ; =0x00000714
	mov r1, #1
	ldr r0, [r5, r0]
	bl sub_02024830
	ldr r0, _021E64AC ; =0x00000714
	add r1, r4, #1
	ldr r0, [r5, r0]
	bl sub_020248F0
	pop {r3, r4, r5, pc}
_021E64A0:
	ldr r0, _021E64AC ; =0x00000714
	mov r1, #0
	ldr r0, [r5, r0]
	bl sub_02024830
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E64AC: .word 0x00000714
_021E64B0: .word 0x0000072B
_021E64B4: .word 0x00000897
	thumb_func_end ov96_021E6454

	thumb_func_start ov96_021E64B8
ov96_021E64B8: ; 0x021E64B8
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	mov r0, #0xd3
	mov r4, #0
	lsl r0, r0, #4
	str r4, [r7, r0]
	add r6, r4, #0
_021E64C6:
	lsl r0, r4, #4
	add r5, r7, r0
	ldr r0, _021E64F0 ; =0x00000D34
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021E64D6
	bl GF_AssertFail
_021E64D6:
	ldr r0, _021E64F4 ; =0x00000D38
	str r6, [r5, r0]
	add r0, r0, #4
	str r6, [r5, r0]
	mov r0, #0x35
	lsl r0, r0, #6
	str r6, [r5, r0]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E64C6
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E64F0: .word 0x00000D34
_021E64F4: .word 0x00000D38
	thumb_func_end ov96_021E64B8

	thumb_func_start ov96_021E64F8
ov96_021E64F8: ; 0x021E64F8
	push {r3, r4, r5, r6, r7, lr}
	add r7, r3, #0
	mov r3, #0xd3
	add r4, r0, #0
	lsl r3, r3, #4
	add r0, r2, #0
	ldr r2, [r4, r3]
	cmp r2, #3
	blo _021E6512
	bl GF_AssertFail
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021E6512:
	add r3, r3, #4
	lsl r2, r2, #0x18
	add r6, r4, r3
	lsr r3, r2, #0x14
	mov r2, #1
	str r2, [r6, r3]
	add r5, r6, r3
	mov r3, #0xa1
	str r1, [r5, #4]
	lsl r3, r3, #2
	ldr r2, [sp, #0x18]
	ldr r3, [r4, r3]
	add r1, r7, #0
	bl ov96_021EA7A4
	str r0, [r5, #8]
	ldr r0, _021E654C ; =ov96_021E81D8
	add r1, r5, #0
	mov r2, #1
	bl sub_0200E320
	str r0, [r5, #0xc]
	mov r0, #0xd3
	lsl r0, r0, #4
	ldr r1, [r4, r0]
	add r1, r1, #1
	str r1, [r4, r0]
	ldr r0, [r5, #8]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E654C: .word ov96_021E81D8
	thumb_func_end ov96_021E64F8

	thumb_func_start ov96_021E6550
ov96_021E6550: ; 0x021E6550
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r7, r0, #0
	add r6, r4, #0
_021E6558:
	lsl r0, r4, #4
	add r5, r7, r0
	ldr r0, _021E6584 ; =0x00000D34
	str r6, [r5, r0]
	add r0, r0, #4
	str r6, [r5, r0]
	ldr r0, _021E6588 ; =0x00000D3C
	str r6, [r5, r0]
	add r0, r0, #4
	ldr r0, [r5, r0]
	bl sub_0200E390
	mov r0, #0x35
	mov r1, #0
	lsl r0, r0, #6
	str r1, [r5, r0]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E6558
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E6584: .word 0x00000D34
_021E6588: .word 0x00000D3C
	thumb_func_end ov96_021E6550

	thumb_func_start ov96_021E658C
ov96_021E658C: ; 0x021E658C
	lsl r1, r1, #4
	add r1, r0, r1
	ldr r0, _021E659C ; =0x00000D3C
	ldr r3, _021E65A0 ; =sub_02024950
	ldr r0, [r1, r0]
	add r1, r2, #0
	bx r3
	nop
_021E659C: .word 0x00000D3C
_021E65A0: .word sub_02024950
	thumb_func_end ov96_021E658C

	thumb_func_start ov96_021E65A4
ov96_021E65A4: ; 0x021E65A4
	push {r3, r4, r5, r6, r7, lr}
	ldr r7, _021E65D0 ; =0x00000D34
	add r6, r0, #0
	mov r4, #0
_021E65AC:
	lsl r0, r4, #4
	add r5, r6, r0
	ldr r0, [r5, r7]
	cmp r0, #0
	bne _021E65BA
	bl GF_AssertFail
_021E65BA:
	ldr r0, _021E65D4 ; =0x00000D3C
	mov r1, #0
	ldr r0, [r5, r0]
	bl sub_0202484C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E65AC
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E65D0: .word 0x00000D34
_021E65D4: .word 0x00000D3C
	thumb_func_end ov96_021E65A4

	thumb_func_start ov96_021E65D8
ov96_021E65D8: ; 0x021E65D8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, _021E6614 ; =0x00000728
	ldrb r0, [r5, r0]
	cmp r0, #0
	beq _021E6610
	mov r4, #0
	cmp r0, #0
	bls _021E6610
	ldr r7, _021E6614 ; =0x00000728
_021E65EC:
	lsl r0, r4, #2
	add r6, r5, r0
	ldr r0, _021E6618 ; =0x0000071C
	mov r1, #1
	ldr r0, [r6, r0]
	bl sub_02024830
	ldr r0, _021E6618 ; =0x0000071C
	mov r1, #0
	ldr r0, [r6, r0]
	bl sub_020248F0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldrb r0, [r5, r7]
	cmp r4, r0
	blo _021E65EC
_021E6610:
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E6614: .word 0x00000728
_021E6618: .word 0x0000071C
	thumb_func_end ov96_021E65D8

	thumb_func_start ov96_021E661C
ov96_021E661C: ; 0x021E661C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, _021E6668 ; =0x00000728
	ldrb r1, [r5, r0]
	cmp r1, #0
	bne _021E662C
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021E662C:
	sub r0, #0xc
	ldr r0, [r5, r0]
	bl sub_02024B68
	cmp r0, #0
	bne _021E6664
	ldr r0, _021E6668 ; =0x00000728
	mov r4, #0
	ldrb r0, [r5, r0]
	cmp r0, #0
	bls _021E6660
	ldr r7, _021E666C ; =0x0000071C
	add r6, r7, #0
	add r6, #0xc
_021E6648:
	lsl r0, r4, #2
	add r0, r5, r0
	ldr r0, [r0, r7]
	mov r1, #0
	bl sub_02024830
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldrb r0, [r5, r6]
	cmp r4, r0
	blo _021E6648
_021E6660:
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021E6664:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E6668: .word 0x00000728
_021E666C: .word 0x0000071C
	thumb_func_end ov96_021E661C

	thumb_func_start ov96_021E6670
ov96_021E6670: ; 0x021E6670
	ldr r2, _021E6678 ; =0x00000718
	str r1, [r0, r2]
	bx lr
	nop
_021E6678: .word 0x00000718
	thumb_func_end ov96_021E6670

	thumb_func_start ov96_021E667C
ov96_021E667C: ; 0x021E667C
	push {r3, r4, lr}
	sub sp, #0xc
	ldr r1, _021E6780 ; =0x0000070D
	add r4, r0, #0
	ldrb r2, [r4, r1]
	cmp r2, #4
	bhi _021E677A
	add r2, r2, r2
	add r2, pc
	ldrh r2, [r2, #6]
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	add pc, r2
_021E6696: ; jump table
	.short _021E66A0 - _021E6696 - 2 ; case 0
	.short _021E66EA - _021E6696 - 2 ; case 1
	.short _021E6706 - _021E6696 - 2 ; case 2
	.short _021E6754 - _021E6696 - 2 ; case 3
	.short _021E6774 - _021E6696 - 2 ; case 4
_021E66A0:
	add r0, r1, #7
	ldr r0, [r4, r0]
	mov r1, #0
	bl sub_02024830
	ldr r0, _021E6784 ; =0x00000899
	bl PlaySE
	mov r0, #0
	str r0, [sp, #8]
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp]
	ldr r0, _021E6788 ; =0x0000070E
	ldrh r1, [r4, r0]
	sub r0, r0, #6
	add r1, #0x48
	lsl r1, r1, #0xc
	str r1, [sp, #4]
	ldr r0, [r4, r0]
	add r1, sp, #0
	bl sub_020247D4
	ldr r0, _021E678C ; =0x00000708
	mov r1, #3
	ldr r0, [r4, r0]
	bl sub_020248F0
	ldr r0, _021E678C ; =0x00000708
	mov r1, #1
	ldr r0, [r4, r0]
	bl sub_02024830
	ldr r0, _021E6780 ; =0x0000070D
	mov r1, #1
	strb r1, [r4, r0]
	b _021E677A
_021E66EA:
	sub r0, r1, #1
	ldrb r0, [r4, r0]
	add r2, r0, #1
	sub r0, r1, #1
	strb r2, [r4, r0]
	ldrb r0, [r4, r0]
	cmp r0, #0x3c
	bls _021E677A
	mov r2, #0
	sub r0, r1, #1
	strb r2, [r4, r0]
	mov r0, #2
	strb r0, [r4, r1]
	b _021E677A
_021E6706:
	ldr r1, _021E6790 ; =0x00000D6C
	ldr r1, [r4, r1]
	cmp r1, #0
	beq _021E6710
	blx r1
_021E6710:
	add r0, r4, #0
	bl ov96_021E839C
	cmp r0, #0
	beq _021E6738
	ldr r0, _021E6794 ; =0x00000898
	bl PlaySE
	mov r0, #0x71
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	mov r1, #0
	bl sub_020248F0
	mov r0, #0x71
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	mov r1, #1
	bl sub_02024830
_021E6738:
	ldr r0, _021E6798 ; =0x00000718
	mov r1, #1
	ldr r0, [r4, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl GX_EngineAToggleLayers
	ldr r0, _021E6790 ; =0x00000D6C
	mov r1, #0
	str r1, [r4, r0]
	ldr r0, _021E6780 ; =0x0000070D
	mov r1, #3
	strb r1, [r4, r0]
	b _021E677A
_021E6754:
	sub r0, r1, #1
	ldrb r0, [r4, r0]
	add r2, r0, #1
	sub r0, r1, #1
	strb r2, [r4, r0]
	ldrb r0, [r4, r0]
	cmp r0, #0x78
	bls _021E677A
	mov r2, #0
	sub r0, r1, #1
	strb r2, [r4, r0]
	mov r0, #4
	strb r0, [r4, r1]
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_021E6774:
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_021E677A:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
_021E6780: .word 0x0000070D
_021E6784: .word 0x00000899
_021E6788: .word 0x0000070E
_021E678C: .word 0x00000708
_021E6790: .word 0x00000D6C
_021E6794: .word 0x00000898
_021E6798: .word 0x00000718
	thumb_func_end ov96_021E667C

	thumb_func_start ov96_021E679C
ov96_021E679C: ; 0x021E679C
	lsl r2, r0, #1
	ldr r0, _021E67A8 ; =0x0221AAE8
	ldrh r0, [r0, r2]
	add r0, r1, r0
	bx lr
	nop
_021E67A8: .word 0x0221AAE8
	thumb_func_end ov96_021E679C

	thumb_func_start ov96_021E67AC
ov96_021E67AC: ; 0x021E67AC
	push {r3, lr}
	mov r2, #0x7d
	lsl r2, r2, #2
	ldr r1, [r0, r2]
	cmp r1, #0
	beq _021E67C2
	sub r2, #0x14
	ldr r2, [r0, r2]
	mov r1, #0
	ldr r2, [r2, #4]
	blx r2
_021E67C2:
	pop {r3, pc}
	thumb_func_end ov96_021E67AC

	thumb_func_start ov96_021E67C4
ov96_021E67C4: ; 0x021E67C4
	push {r3, r4, r5, lr}
	add r4, r0, #0
	mov r5, #1
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E67FC
	ldr r1, _021E6810 ; =0x0000072A
	mov r2, #0x7e
	lsl r2, r2, #2
	ldr r0, [r4, r2]
	sub r2, #0x10
	ldrb r1, [r4, r1]
	add r2, r4, r2
	bl ov96_021E811C
	bl ov96_021E99F4
	mov r3, #0x7a
	lsl r3, r3, #2
	add r1, r4, r3
	add r3, #0xa0
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x16
	bl ov96_021E87B4
	add r5, r0, #0
_021E67FC:
	cmp r5, #0
	beq _021E680A
	add r0, r4, #0
	mov r1, #0x26
	mov r2, #1
	bl ov96_021E5FEC
_021E680A:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021E6810: .word 0x0000072A
	thumb_func_end ov96_021E67C4

	thumb_func_start ov96_021E6814
ov96_021E6814: ; 0x021E6814
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0xa
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	bl OverlayManager_run
	cmp r0, #0
	beq _021E686C
	mov r0, #0xa
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	bl OverlayManager_delete
	mov r1, #0x7e
	lsl r1, r1, #2
	ldr r0, [r4, r1]
	ldr r2, [r0, #4]
	cmp r2, #0
	bne _021E6860
	add r1, r1, #4
	ldr r1, [r4, r1]
	cmp r1, #0
	beq _021E6852
	mov r1, #1
	strb r1, [r0, #0xe]
	add r0, r4, #0
	mov r1, #0x25
	bl ov96_021E5FC8
	b _021E686C
_021E6852:
	mov r1, #0
	strb r1, [r0, #0xe]
	add r0, r4, #0
	mov r1, #3
	bl ov96_021E5FC8
	b _021E686C
_021E6860:
	mov r1, #0
	strb r1, [r0, #0xe]
	add r0, r4, #0
	mov r1, #2
	bl ov96_021E5FC8
_021E686C:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_021E6814

	thumb_func_start ov96_021E6870
ov96_021E6870: ; 0x021E6870
	push {r3, r4, r5, lr}
	add r5, r1, #0
	ldrb r2, [r5]
	add r4, r0, #0
	cmp r2, #3
	bhi _021E694C
	add r1, r2, r2
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021E6888: ; jump table
	.short _021E6890 - _021E6888 - 2 ; case 0
	.short _021E68B2 - _021E6888 - 2 ; case 1
	.short _021E68C2 - _021E6888 - 2 ; case 2
	.short _021E692A - _021E6888 - 2 ; case 3
_021E6890:
	mov r0, #0x1e
	ldr r1, _021E6950 ; =0x0221A8BC
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, _021E6954 ; =0x0221DA68
	add r1, r4, r1
	bl ov96_021E5C80
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _021E694C
_021E68B2:
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E694C
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _021E694C
_021E68C2:
	mov r0, #0xf3
	lsl r0, r0, #2
	add r1, r4, r0
	ldr r3, [r1]
	cmp r3, #0
	bne _021E68D4
	add r0, r2, #1
	strb r0, [r5]
	b _021E694C
_021E68D4:
	add r2, r0, #0
	sub r2, #0x18
	ldr r3, [r4, r2]
	add r2, r0, #0
	sub r2, #8
	add r2, r4, r2
	cmp r3, r2
	bne _021E68F0
	add r2, r0, #0
	sub r2, #0x18
	str r1, [r4, r2]
	mov r1, #0
	sub r0, #0xc
	str r1, [r4, r0]
_021E68F0:
	ldr r3, _021E6958 ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E694C
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _021E694C
_021E692A:
	mov r2, #0x1e
	lsl r2, r2, #4
	ldr r2, [r4, r2]
	mov r1, #0
	ldr r2, [r2, #0xc]
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021E6944
	bl GF_AssertFail
_021E6944:
	add r0, r4, #0
	mov r1, #3
	bl ov96_021E5FC8
_021E694C:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E6950: .word 0x0221A8BC
_021E6954: .word 0x0221DA68
_021E6958: .word 0x000003D1
	thumb_func_end ov96_021E6870

	thumb_func_start ov96_021E695C
ov96_021E695C: ; 0x021E695C
	push {r4, lr}
	add r4, r0, #0
	mov r0, #2
	mov r1, #0
	lsl r0, r0, #8
	str r1, [r4, r0]
	bl ov96_021E99F8
	mov r3, #2
	lsl r3, r3, #8
	add r1, r4, r3
	add r3, #0x88
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x17
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E698A
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E698A:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E695C

	thumb_func_start ov96_021E6990
ov96_021E6990: ; 0x021E6990
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r1, #0
	bl ov96_021E5D40
	add r4, r0, #0
	bl ov96_021E99FC
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F1C
	add r3, r0, #0
	mov r0, #0x18
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E69C0
	add r0, r5, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E69C0:
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E6990

	thumb_func_start ov96_021E69C4
ov96_021E69C4: ; 0x021E69C4
	push {r3, r4, r5, lr}
	add r4, r0, #0
	mov r5, #1
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E69EA
	bl ov96_021E9A04
	ldr r1, _021E69FC ; =0x000005DC
	mov r3, #0xa2
	lsl r3, r3, #2
	add r2, r0, #0
	ldr r1, [r4, r1]
	ldr r3, [r4, r3]
	mov r0, #0x19
	bl ov96_021E87EC
	add r5, r0, #0
_021E69EA:
	cmp r5, #0
	beq _021E69F8
	add r0, r4, #0
	mov r1, #0x26
	mov r2, #6
	bl ov96_021E5FEC
_021E69F8:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E69FC: .word 0x000005DC
	thumb_func_end ov96_021E69C4

	thumb_func_start ov96_021E6A00
ov96_021E6A00: ; 0x021E6A00
	push {r3, r4, r5, lr}
	add r4, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	ldr r0, [r0]
	bl sub_02031968
	bl sub_020319F0
	add r5, r0, #0
	mov r0, #9
	lsl r0, r0, #8
	add r3, r4, r0
	mov r2, #0xe
_021E6A1E:
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021E6A1E
	ldr r0, [r5]
	str r0, [r3]
	bl ov96_021E9A10
	mov r3, #0xa2
	mov r1, #9
	lsl r3, r3, #2
	lsl r1, r1, #8
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1a
	add r1, r4, r1
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E6A4E
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E6A4E:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6A00

	thumb_func_start ov96_021E6A54
ov96_021E6A54: ; 0x021E6A54
	push {r4, lr}
	ldr r1, _021E6A88 ; =0x00000D2C
	add r4, r0, #0
	mov r2, #1
	str r2, [r4, r1]
	bl ov96_021E5F5C
	mov r0, #0x1e
	ldr r1, _021E6A8C ; =0x0221A808
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, _021E6A90 ; =0x0221DA50
	add r1, r4, r1
	bl ov96_021E5C80
	add r0, r4, #0
	mov r1, #8
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_021E6A88: .word 0x00000D2C
_021E6A8C: .word 0x0221A808
_021E6A90: .word 0x0221DA50
	thumb_func_end ov96_021E6A54

	thumb_func_start ov96_021E6A94
ov96_021E6A94: ; 0x021E6A94
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E6AE0
	add r0, r4, #0
	bl ov96_021E5F54
	add r1, r0, #0
	mov r2, #0
	add r1, #0x24
	strb r2, [r1]
	mov r1, #1
	add r0, #0x4c
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_021E5F1C
	mov r1, #1
	bl ov96_021E87B0
	add r0, r4, #0
	mov r1, #6
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #9
	bl ov96_021E5FC8
	mov r0, #0
	bl sub_02004AD8
	ldr r1, _021E6AE4 ; =0x0000046F
	mov r0, #0x19
	mov r2, #0
	bl sub_02004EC4
_021E6AE0:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_021E6AE4: .word 0x0000046F
	thumb_func_end ov96_021E6A94

	thumb_func_start ov96_021E6AE8
ov96_021E6AE8: ; 0x021E6AE8
	push {r3, r4, r5, lr}
	mov r1, #0xf3
	add r4, r0, #0
	lsl r1, r1, #2
	add r2, r4, r1
	ldr r3, [r2]
	cmp r3, #0
	bne _021E6B02
	mov r1, #0xa
	bl ov96_021E5FC8
	mov r0, #0
	pop {r3, r4, r5, pc}
_021E6B02:
	add r0, r1, #0
	sub r0, #0x18
	ldr r3, [r4, r0]
	add r0, r1, #0
	sub r0, #8
	add r0, r4, r0
	cmp r3, r0
	bne _021E6B1E
	add r0, r1, #0
	sub r0, #0x18
	str r2, [r4, r0]
	mov r0, #0
	sub r1, #0xc
	str r0, [r4, r1]
_021E6B1E:
	ldr r3, _021E6BBC ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E6B5A
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0xa
	bl ov96_021E5FC8
	b _021E6BB6
_021E6B5A:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E6BA0
	bl ov96_021E9A14
	mov r3, #0xad
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, #0x2c
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
	mov r0, #0xb7
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	add r5, r0, #0
	mov r0, #0xa3
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	mov r2, #0x28
_021E6B92:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r5]
	add r5, r5, #1
	sub r2, r2, #1
	bne _021E6B92
	b _021E6BB6
_021E6BA0:
	bl ov96_021E9A14
	mov r3, #0xa3
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, r3, #4
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
_021E6BB6:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021E6BBC: .word 0x000003D1
	thumb_func_end ov96_021E6AE8

	thumb_func_start ov96_021E6BC0
ov96_021E6BC0: ; 0x021E6BC0
	push {r4, lr}
	mov r2, #0x1e
	add r4, r0, #0
	lsl r2, r2, #4
	ldr r2, [r4, r2]
	mov r1, #0
	ldr r2, [r2, #0xc]
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021E6BDE
	bl GF_AssertFail
_021E6BDE:
	add r0, r4, #0
	mov r1, #0xb
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6BC0

	thumb_func_start ov96_021E6BEC
ov96_021E6BEC: ; 0x021E6BEC
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x1e
	ldr r1, _021E6C18 ; =0x0221A8E4
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, _021E6C1C ; =0x0221DA6C
	add r1, r4, r1
	bl ov96_021E5C80
	add r0, r4, #0
	mov r1, #0xc
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	nop
_021E6C18: .word 0x0221A8E4
_021E6C1C: .word 0x0221DA6C
	thumb_func_end ov96_021E6BEC

	thumb_func_start ov96_021E6C20
ov96_021E6C20: ; 0x021E6C20
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E6C3C
	add r0, r4, #0
	mov r1, #7
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0xd
	bl ov96_021E5FC8
_021E6C3C:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_021E6C20

	thumb_func_start ov96_021E6C40
ov96_021E6C40: ; 0x021E6C40
	push {r4, lr}
	mov r1, #0xf3
	add r4, r0, #0
	lsl r1, r1, #2
	add r2, r4, r1
	ldr r3, [r2]
	cmp r3, #0
	bne _021E6C5A
	mov r1, #0xe
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
_021E6C5A:
	add r0, r1, #0
	sub r0, #0x18
	ldr r3, [r4, r0]
	add r0, r1, #0
	sub r0, #8
	add r0, r4, r0
	cmp r3, r0
	bne _021E6C76
	add r0, r1, #0
	sub r0, #0x18
	str r2, [r4, r0]
	mov r0, #0
	sub r1, #0xc
	str r0, [r4, r1]
_021E6C76:
	ldr r3, _021E6CB4 ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E6CB0
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0xe
	bl ov96_021E5FC8
_021E6CB0:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_021E6CB4: .word 0x000003D1
	thumb_func_end ov96_021E6C40

	thumb_func_start ov96_021E6CB8
ov96_021E6CB8: ; 0x021E6CB8
	push {r4, lr}
	mov r2, #0x1e
	add r4, r0, #0
	lsl r2, r2, #4
	ldr r2, [r4, r2]
	mov r1, #0
	ldr r2, [r2, #0xc]
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021E6CD6
	bl GF_AssertFail
_021E6CD6:
	add r0, r4, #0
	mov r1, #0xf
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6CB8

	thumb_func_start ov96_021E6CE4
ov96_021E6CE4: ; 0x021E6CE4
	push {r4, r5, r6, lr}
	mov r1, #0x1f
	add r4, r0, #0
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	ldr r6, _021E6D40 ; =0x0000FFFF
	lsl r1, r1, #2
	add r2, r4, r1
	mov r1, #0xf6
	lsl r1, r1, #2
	ldr r1, [r2, r1]
	ldr r2, _021E6D44 ; =0x00000728
	lsl r5, r1, #0x18
	mov r1, #0
	strb r1, [r4, r2]
	ldr r3, _021E6D48 ; =0x00000D2A
	add r2, r2, #3
	strh r6, [r4, r3]
	strb r1, [r4, r2]
	add r3, #0x42
	str r1, [r4, r3]
	bl ov96_021E5F5C
	ldr r0, _021E6D4C ; =0x0221DA28
	lsr r2, r5, #0x16
	ldr r1, [r0, r2]
	mov r0, #0x1e
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	ldr r0, _021E6D50 ; =0x0221DA00
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, [r0, r2]
	add r1, r4, r1
	bl ov96_021E5C80
	add r0, r4, #0
	mov r1, #0x10
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, r5, r6, pc}
	nop
_021E6D40: .word 0x0000FFFF
_021E6D44: .word 0x00000728
_021E6D48: .word 0x00000D2A
_021E6D4C: .word 0x0221DA28
_021E6D50: .word 0x0221DA00
	thumb_func_end ov96_021E6CE4

	thumb_func_start ov96_021E6D54
ov96_021E6D54: ; 0x021E6D54
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E6DD8
	add r0, r4, #0
	bl ov96_021E5F54
	add r1, r0, #0
	mov r2, #0
	add r1, #0x24
	strb r2, [r1]
	mov r1, #1
	add r0, #0x4c
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_021E5F1C
	mov r1, #1
	bl ov96_021E87B0
	add r0, r4, #0
	mov r1, #8
	bl ov96_021E601C
	mov r0, #0x1f
	lsl r0, r0, #4
	ldr r1, [r4, r0]
	ldr r0, _021E6DDC ; =0x0000072A
	ldrb r0, [r4, r0]
	sub r0, r0, #1
	cmp r1, r0
	bne _021E6DAA
	mov r0, #0
	bl sub_02004AD8
	ldr r1, _021E6DE0 ; =0x00000472
	mov r0, #0x18
	mov r2, #0
	bl sub_02004EC4
	b _021E6DBA
_021E6DAA:
	mov r0, #0
	bl sub_02004AD8
	ldr r1, _021E6DE4 ; =0x00000471
	mov r0, #0x18
	mov r2, #0
	bl sub_02004EC4
_021E6DBA:
	mov r0, #7
	mov r1, #1
	bl sub_020053A8
	add r0, r4, #0
	mov r1, #0x11
	bl ov96_021E5FC8
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021E6DD8
	bl GF_AssertFail
_021E6DD8:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_021E6DDC: .word 0x0000072A
_021E6DE0: .word 0x00000472
_021E6DE4: .word 0x00000471
	thumb_func_end ov96_021E6D54

	thumb_func_start ov96_021E6DE8
ov96_021E6DE8: ; 0x021E6DE8
	push {r4, lr}
	mov r1, #0x3b
	add r4, r0, #0
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	cmp r1, #0
	beq _021E6E2C
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E6E22
	mov r2, #0xe9
	lsl r2, r2, #2
	mov r3, #0xa2
	ldr r1, [r4, r2]
	add r2, #8
	lsl r3, r3, #2
	ldr r2, [r4, r2]
	ldr r3, [r4, r3]
	mov r0, #0x1c
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E6E32
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
	b _021E6E32
_021E6E22:
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
	b _021E6E32
_021E6E2C:
	mov r1, #0x12
	bl ov96_021E5FC8
_021E6E32:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6DE8

	thumb_func_start ov96_021E6E38
ov96_021E6E38: ; 0x021E6E38
	push {r3, r4, r5, lr}
	mov r1, #0xf3
	add r4, r0, #0
	lsl r1, r1, #2
	add r2, r4, r1
	ldr r3, [r2]
	cmp r3, #0
	bne _021E6E52
	mov r1, #0x18
	bl ov96_021E5FC8
	mov r0, #0
	pop {r3, r4, r5, pc}
_021E6E52:
	add r0, r1, #0
	sub r0, #0x18
	ldr r3, [r4, r0]
	add r0, r1, #0
	sub r0, #8
	add r0, r4, r0
	cmp r3, r0
	bne _021E6E6E
	add r0, r1, #0
	sub r0, #0x18
	str r2, [r4, r0]
	mov r0, #0
	sub r1, #0xc
	str r0, [r4, r1]
_021E6E6E:
	ldr r3, _021E6F14 ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E6EB2
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0x10
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0x13
	bl ov96_021E5FC8
	b _021E6F0E
_021E6EB2:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E6EF8
	bl ov96_021E9A14
	mov r3, #0xad
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, #0x2c
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
	mov r0, #0xb7
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	add r5, r0, #0
	mov r0, #0xa3
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	mov r2, #0x28
_021E6EEA:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r5]
	add r5, r5, #1
	sub r2, r2, #1
	bne _021E6EEA
	b _021E6F0E
_021E6EF8:
	bl ov96_021E9A14
	mov r3, #0xa3
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, r3, #4
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
_021E6F0E:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021E6F14: .word 0x000003D1
	thumb_func_end ov96_021E6E38

	thumb_func_start ov96_021E6F18
ov96_021E6F18: ; 0x021E6F18
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5F5C
	add r0, r4, #0
	mov r1, #0x14
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_021E6F18

	thumb_func_start ov96_021E6F2C
ov96_021E6F2C: ; 0x021E6F2C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	mov r1, #0x1e
	add r7, r0, #0
	lsl r1, r1, #4
	ldr r2, [r7, r1]
	ldr r2, [r2, #0x10]
	cmp r2, #0
	beq _021E6FD0
	add r1, #0xac
	add r0, r7, r1
	bl ov96_021E8A20
	add r4, r0, #0
	add r0, r7, #0
	bl ov96_021E5F24
	lsl r0, r0, #2
	add r2, r7, r0
	mov r0, #0x5e
	lsl r0, r0, #4
	ldrh r1, [r2, r0]
	add r0, r0, #2
	strh r1, [r4]
	ldrh r0, [r2, r0]
	strh r0, [r4, #2]
	bl ov96_021E9A14
	mov r3, #0xa3
	lsl r3, r3, #2
	add r1, r7, r3
	sub r3, r3, #4
	add r2, r0, #0
	ldr r3, [r7, r3]
	mov r0, #0x1d
	bl ov96_021E87B4
	str r0, [sp, #4]
	cmp r0, #0
	beq _021E6FE6
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E6FE6
	add r0, r7, #0
	bl ov96_021E5FAC
	add r6, r0, #0
	add r0, r7, #0
	bl ov96_021E5D34
	str r0, [sp]
	cmp r0, #4
	bge _021E6FE6
	mov r0, #0x5e
	lsl r0, r0, #4
	add r1, r7, r0
	ldr r0, [sp]
	lsl r0, r0, #2
	add r4, r1, r0
	ldr r0, [sp]
	add r5, r0, #0
	mul r5, r6
_021E6FAC:
	mov r0, #0xad
	lsl r0, r0, #2
	add r0, r7, r0
	bl ov96_021E8A20
	add r0, r0, r5
	add r1, r4, #0
	add r2, r6, #0
	bl memcpy
	ldr r0, [sp]
	add r4, r4, #4
	add r0, r0, #1
	add r5, r5, r6
	str r0, [sp]
	cmp r0, #4
	blt _021E6FAC
	b _021E6FE6
_021E6FD0:
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E6FE2
	add r0, r7, #0
	bl ov96_021E75E4
	str r0, [sp, #4]
	b _021E6FE6
_021E6FE2:
	mov r0, #1
	str r0, [sp, #4]
_021E6FE6:
	ldr r0, [sp, #4]
	cmp r0, #0
	beq _021E6FF4
	add r0, r7, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E6FF4:
	mov r0, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E6F2C

	thumb_func_start ov96_021E6FFC
ov96_021E6FFC: ; 0x021E6FFC
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r4, r0, #0
	bl ov96_021E9A14
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F1C
	add r4, #0x28
	add r3, r0, #0
	mov r0, #0x1e
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_021E87B4
	cmp r0, #0
	beq _021E702C
	add r0, r5, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E702C:
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E6FFC

	thumb_func_start ov96_021E7030
ov96_021E7030: ; 0x021E7030
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0xdf
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	mov r1, #0x5f
	lsl r1, r1, #4
	add r3, r4, r1
	mov r2, #0x12
_021E7046:
	ldrh r1, [r0]
	add r0, r0, #2
	strh r1, [r3]
	add r3, r3, #2
	sub r2, r2, #1
	bne _021E7046
	mov r0, #0x1e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	ldr r2, [r0, #8]
	cmp r2, #0
	beq _021E7064
	add r0, r4, #0
	mov r1, #0
	blx r2
_021E7064:
	mov r1, #0x1f
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	add r0, r4, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021E7658
	add r0, r4, #0
	mov r1, #0x17
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_021E7030

	thumb_func_start ov96_021E7080
ov96_021E7080: ; 0x021E7080
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021E7092
	bl GF_AssertFail
_021E7092:
	mov r2, #0x1e
	lsl r2, r2, #4
	ldr r2, [r4, r2]
	add r0, r4, #0
	ldr r2, [r2, #0xc]
	mov r1, #0
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021E70AE
	bl GF_AssertFail
_021E70AE:
	ldr r1, _021E70EC ; =0x0000072A
	mov r0, #0x1f
	lsl r0, r0, #4
	ldrb r1, [r4, r1]
	ldr r2, [r4, r0]
	cmp r2, r1
	bge _021E70DA
	sub r0, #0x10
	ldr r0, [r4, r0]
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _021E70D0
	add r0, r4, #0
	mov r1, #0x19
	bl ov96_021E5FC8
	b _021E70E6
_021E70D0:
	add r0, r4, #0
	mov r1, #0x18
	bl ov96_021E5FC8
	b _021E70E6
_021E70DA:
	add r1, r2, #1
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0x1d
	bl ov96_021E5FC8
_021E70E6:
	mov r0, #0
	pop {r4, pc}
	nop
_021E70EC: .word 0x0000072A
	thumb_func_end ov96_021E7080

	thumb_func_start ov96_021E70F0
ov96_021E70F0: ; 0x021E70F0
	push {r3, lr}
	mov r1, #0x1f
	lsl r1, r1, #4
	ldr r2, [r0, r1]
	add r2, r2, #1
	str r2, [r0, r1]
	ldr r2, [r0, r1]
	ldr r1, _021E7118 ; =0x0000072A
	ldrb r1, [r0, r1]
	cmp r2, r1
	blt _021E710E
	mov r1, #0x1d
	bl ov96_021E5FC8
	b _021E7114
_021E710E:
	mov r1, #0xb
	bl ov96_021E5FC8
_021E7114:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
_021E7118: .word 0x0000072A
	thumb_func_end ov96_021E70F0

	thumb_func_start ov96_021E711C
ov96_021E711C: ; 0x021E711C
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x1e
	ldr r1, _021E7148 ; =0x0221A86C
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, _021E714C ; =0x0221DC24
	add r1, r4, r1
	bl ov96_021E5C80
	add r0, r4, #0
	mov r1, #0x1a
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	nop
_021E7148: .word 0x0221A86C
_021E714C: .word 0x0221DC24
	thumb_func_end ov96_021E711C

	thumb_func_start ov96_021E7150
ov96_021E7150: ; 0x021E7150
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E718C
	add r0, r4, #0
	bl ov96_021E5F54
	add r1, r0, #0
	mov r2, #0
	add r1, #0x24
	strb r2, [r1]
	mov r1, #1
	add r0, #0x4c
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_021E5F1C
	mov r1, #1
	bl ov96_021E87B0
	add r0, r4, #0
	mov r1, #0xb
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0x1b
	bl ov96_021E5FC8
_021E718C:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_021E7150

	thumb_func_start ov96_021E7190
ov96_021E7190: ; 0x021E7190
	push {r3, r4, r5, lr}
	mov r1, #0xf3
	add r4, r0, #0
	lsl r1, r1, #2
	add r2, r4, r1
	ldr r3, [r2]
	cmp r3, #0
	bne _021E71AA
	mov r1, #0x1c
	bl ov96_021E5FC8
	mov r0, #0
	pop {r3, r4, r5, pc}
_021E71AA:
	add r0, r1, #0
	sub r0, #0x18
	ldr r3, [r4, r0]
	add r0, r1, #0
	sub r0, #8
	add r0, r4, r0
	cmp r3, r0
	bne _021E71C6
	add r0, r1, #0
	sub r0, #0x18
	str r2, [r4, r0]
	mov r0, #0
	sub r1, #0xc
	str r0, [r4, r1]
_021E71C6:
	ldr r3, _021E7264 ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E7202
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0x1c
	bl ov96_021E5FC8
	b _021E725E
_021E7202:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E7248
	bl ov96_021E9A14
	mov r3, #0xad
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, #0x2c
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
	mov r0, #0xb7
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	add r5, r0, #0
	mov r0, #0xa3
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	mov r2, #0x28
_021E723A:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r5]
	add r5, r5, #1
	sub r2, r2, #1
	bne _021E723A
	b _021E725E
_021E7248:
	bl ov96_021E9A14
	mov r3, #0xa3
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, r3, #4
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
_021E725E:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021E7264: .word 0x000003D1
	thumb_func_end ov96_021E7190

	thumb_func_start ov96_021E7268
ov96_021E7268: ; 0x021E7268
	push {r4, lr}
	mov r2, #0x1e
	add r4, r0, #0
	lsl r2, r2, #4
	ldr r2, [r4, r2]
	mov r1, #0
	ldr r2, [r2, #0xc]
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021E7286
	bl GF_AssertFail
_021E7286:
	add r0, r4, #0
	mov r1, #0x18
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E7268

	thumb_func_start ov96_021E7294
ov96_021E7294: ; 0x021E7294
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5F5C
	mov r0, #0x1e
	ldr r1, _021E72C4 ; =0x0221A844
	lsl r0, r0, #4
	str r1, [r4, r0]
	mov r1, #0
	add r0, #0xd
	strb r1, [r4, r0]
	mov r1, #0xf3
	lsl r1, r1, #2
	ldr r0, _021E72C8 ; =0x0221DA5C
	add r1, r4, r1
	bl ov96_021E5C80
	add r0, r4, #0
	mov r1, #0x20
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, pc}
	nop
_021E72C4: .word 0x0221A844
_021E72C8: .word 0x0221DA5C
	thumb_func_end ov96_021E7294

	thumb_func_start ov96_021E72CC
ov96_021E72CC: ; 0x021E72CC
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5C50
	cmp r0, #0
	beq _021E7318
	add r0, r4, #0
	bl ov96_021E5F54
	add r1, r0, #0
	mov r2, #0
	add r1, #0x24
	strb r2, [r1]
	mov r1, #1
	add r0, #0x4c
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_021E5F1C
	mov r1, #1
	bl ov96_021E87B0
	add r0, r4, #0
	mov r1, #0xc
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0x21
	bl ov96_021E5FC8
	mov r0, #0
	bl sub_02004AD8
	ldr r1, _021E731C ; =0x00000474
	mov r0, #0x19
	mov r2, #0
	bl sub_02004EC4
_021E7318:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_021E731C: .word 0x00000474
	thumb_func_end ov96_021E72CC

	thumb_func_start ov96_021E7320
ov96_021E7320: ; 0x021E7320
	push {r3, r4, r5, lr}
	mov r1, #0xf3
	add r4, r0, #0
	lsl r1, r1, #2
	add r2, r4, r1
	ldr r3, [r2]
	cmp r3, #0
	bne _021E733A
	mov r1, #0x22
	bl ov96_021E5FC8
	mov r0, #0
	pop {r3, r4, r5, pc}
_021E733A:
	add r0, r1, #0
	sub r0, #0x18
	ldr r3, [r4, r0]
	add r0, r1, #0
	sub r0, #8
	add r0, r4, r0
	cmp r3, r0
	bne _021E7356
	add r0, r1, #0
	sub r0, #0x18
	str r2, [r4, r0]
	mov r0, #0
	sub r1, #0xc
	str r0, [r4, r1]
_021E7356:
	ldr r3, _021E73F4 ; =0x000003D1
	add r0, r4, #0
	sub r2, r3, #5
	add r1, r4, r3
	add r3, r3, #1
	ldrb r3, [r4, r3]
	ldr r2, [r4, r2]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	blx r2
	cmp r0, #0
	beq _021E7392
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5DFC
	mov r0, #0xf1
	lsl r0, r0, #2
	add r1, r0, #0
	add r2, r4, r0
	sub r1, #0x10
	str r2, [r4, r1]
	mov r1, #0
	sub r0, r0, #4
	str r1, [r4, r0]
	add r0, r4, #0
	mov r1, #0x22
	bl ov96_021E5FC8
	b _021E73EE
_021E7392:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E73D8
	bl ov96_021E9A14
	mov r3, #0xad
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, #0x2c
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
	mov r0, #0xb7
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	add r5, r0, #0
	mov r0, #0xa3
	lsl r0, r0, #2
	add r0, r4, r0
	bl ov96_021E8A20
	mov r2, #0x28
_021E73CA:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r5]
	add r5, r5, #1
	sub r2, r2, #1
	bne _021E73CA
	b _021E73EE
_021E73D8:
	bl ov96_021E9A14
	mov r3, #0xa3
	lsl r3, r3, #2
	add r1, r4, r3
	sub r3, r3, #4
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1b
	bl ov96_021E87B4
_021E73EE:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021E73F4: .word 0x000003D1
	thumb_func_end ov96_021E7320

	thumb_func_start ov96_021E73F8
ov96_021E73F8: ; 0x021E73F8
	push {r3, r4, r5, r6, r7, lr}
	mov r2, #0x1e
	add r5, r0, #0
	lsl r2, r2, #4
	ldr r2, [r5, r2]
	mov r1, #0
	ldr r2, [r2, #0xc]
	blx r2
	mov r0, #0x79
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021E7416
	bl GF_AssertFail
_021E7416:
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031B14
	add r7, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl Sav2_PlayerData_GetProfileAddr
	str r0, [sp]
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031968
	bl sub_0203199C
	add r6, r0, #0
	bl sub_02031B10
	lsl r4, r0, #2
	mov r0, #0xa1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r4, #0
	bl AllocFromHeapAtEnd
	ldr r1, _021E74A4 ; =0x00000D68
	add r2, r4, #0
	str r0, [r5, r1]
	ldr r0, [r5, r1]
	mov r1, #0
	bl memset
	mov r3, #0xa1
	lsl r3, r3, #2
	ldr r1, [sp]
	ldr r2, [r6, #0x70]
	ldr r3, [r5, r3]
	add r0, r7, #0
	bl sub_020320E0
	ldr r1, _021E74A8 ; =0x00000D64
	str r0, [r5, r1]
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _021E7496
	add r0, r5, #0
	mov r1, #0xe
	bl ov96_021E601C
	add r0, r5, #0
	mov r1, #0x23
	bl ov96_021E5FC8
	b _021E749E
_021E7496:
	add r0, r5, #0
	mov r1, #0x25
	bl ov96_021E5FC8
_021E749E:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E74A4: .word 0x00000D68
_021E74A8: .word 0x00000D64
	thumb_func_end ov96_021E73F8

	thumb_func_start ov96_021E74AC
ov96_021E74AC: ; 0x021E74AC
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E5F24
	bl ov96_021E9A18
	mov r3, #0xa2
	ldr r1, _021E74DC ; =0x00000B44
	lsl r3, r3, #2
	add r2, r0, #0
	ldr r3, [r4, r3]
	mov r0, #0x1f
	add r1, r4, r1
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E74D6
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E74D6:
	mov r0, #0
	pop {r4, pc}
	nop
_021E74DC: .word 0x00000B44
	thumb_func_end ov96_021E74AC

	thumb_func_start ov96_021E74E0
ov96_021E74E0: ; 0x021E74E0
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r1, #0
	bl ov96_021E5D78
	add r4, r0, #0
	bl ov96_021E9A1C
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F1C
	add r3, r0, #0
	mov r0, #0x20
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E7510
	add r0, r5, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E7510:
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E74E0

	thumb_func_start ov96_021E7514
ov96_021E7514: ; 0x021E7514
	push {r4, lr}
	add r4, r0, #0
	bl sub_02031B10
	ldr r1, _021E7540 ; =0x00000D64
	mov r3, #0xa2
	lsl r3, r3, #2
	add r2, r0, #0
	ldr r1, [r4, r1]
	ldr r3, [r4, r3]
	mov r0, #0x21
	bl ov96_021E87EC
	cmp r0, #0
	beq _021E753A
	add r0, r4, #0
	mov r1, #0x26
	bl ov96_021E5FC8
_021E753A:
	mov r0, #0
	pop {r4, pc}
	nop
_021E7540: .word 0x00000D64
	thumb_func_end ov96_021E7514

	thumb_func_start ov96_021E7544
ov96_021E7544: ; 0x021E7544
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031B14
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5D34
	add r6, r0, #0
	bl sub_0203769C
	ldr r1, _021E758C ; =0x00000D68
	add r3, r0, #0
	ldr r1, [r5, r1]
	add r0, r4, #0
	add r2, r6, #0
	bl sub_020321A0
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021E757E
	bl GF_AssertFail
_021E757E:
	add r0, r5, #0
	mov r1, #0x25
	bl ov96_021E5FC8
	mov r0, #0
	pop {r4, r5, r6, pc}
	nop
_021E758C: .word 0x00000D68
	thumb_func_end ov96_021E7544

	thumb_func_start ov96_021E7590
ov96_021E7590: ; 0x021E7590
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021E75A2
	bl GF_AssertFail
_021E75A2:
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	ldrb r0, [r0, #0xe]
	cmp r0, #0
	bne _021E75B4
	add r0, r4, #0
	bl ov96_021E7718
_021E75B4:
	mov r0, #1
	pop {r4, pc}
	thumb_func_end ov96_021E7590

	thumb_func_start ov96_021E75B8
ov96_021E75B8: ; 0x021E75B8
	mov r0, #0
	bx lr
	thumb_func_end ov96_021E75B8

	thumb_func_start ov96_021E75BC
ov96_021E75BC: ; 0x021E75BC
	push {r4, lr}
	add r4, r0, #0
	bl sub_0200B224
	add r0, r4, #0
	bl sub_0201EEB4
	bl sub_0202061C
	ldr r3, _021E75DC ; =0x027E0000
	ldr r1, _021E75E0 ; =0x00003FF8
	mov r0, #1
	ldr r2, [r3, r1]
	orr r0, r2
	str r0, [r3, r1]
	pop {r4, pc}
	.balign 4, 0
_021E75DC: .word 0x027E0000
_021E75E0: .word 0x00003FF8
	thumb_func_end ov96_021E75BC

	thumb_func_start ov96_021E75E4
ov96_021E75E4: ; 0x021E75E4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	bl ov96_021E5F54
	str r0, [sp]
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _021E7604
	bl GF_AssertFail
	add sp, #8
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021E7604:
	mov r0, #0x5e
	lsl r0, r0, #4
	add r5, r7, r0
	ldr r0, [sp]
	mov r4, #0
	str r0, [sp, #4]
	add r0, #0x28
	str r0, [sp, #4]
_021E7614:
	add r0, r7, #0
	bl ov96_021E5FAC
	add r6, r0, #0
	ldr r0, [sp, #4]
	bl ov96_021E8A20
	add r1, r4, #0
	mul r1, r6
	add r0, r0, r1
	add r1, r5, #0
	add r2, r6, #0
	bl memcpy
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _021E7614
	bl ov96_021E9A14
	add r4, r0, #0
	add r0, r7, #0
	bl ov96_021E5F1C
	ldr r1, [sp]
	add r3, r0, #0
	add r1, #0x28
	mov r0, #0x1e
	add r2, r4, #0
	str r1, [sp]
	bl ov96_021E87B4
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E75E4

	thumb_func_start ov96_021E7658
ov96_021E7658: ; 0x021E7658
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	str r1, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp]
	mov r4, #0
	lsl r0, r0, #1
	add r6, r5, r0
_021E766E:
	ldr r0, _021E7708 ; =0x00000614
	add r1, r4, #0
	ldr r0, [r5, r0]
	bl ov96_021E9370
	add r3, r0, #0
	lsl r0, r4, #3
	add r2, r6, r0
	ldrh r1, [r3, #0xa]
	ldr r0, _021E770C ; =0x000008B4
	strh r1, [r2, r0]
	ldr r1, [r3, #0xc]
	add r0, #0x20
	strh r1, [r2, r0]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021E766E
	mov r4, #0
_021E7696:
	ldr r0, _021E7708 ; =0x00000614
	add r1, r4, #0
	ldr r0, [r5, r0]
	bl ov96_021E94EC
	add r6, r0, #0
	ldr r0, [r6]
	cmp r0, r7
	beq _021E76B2
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021E7696
_021E76B2:
	cmp r4, #4
	bne _021E76BC
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
_021E76BC:
	ldrb r0, [r6, #9]
	cmp r0, #0
	bne _021E76D4
	ldr r0, [sp]
	mov r1, #1
	add r2, r5, r0
	ldr r0, _021E7710 ; =0x000008F4
	strb r1, [r2, r0]
	mov r1, #0
	add r0, r0, #4
	strb r1, [r2, r0]
	pop {r3, r4, r5, r6, r7, pc}
_021E76D4:
	ldr r0, [sp]
	mov r2, #0
	add r1, r5, r0
	ldr r0, _021E7710 ; =0x000008F4
	strb r2, [r1, r0]
	ldr r0, _021E7708 ; =0x00000614
	mov r1, #3
	ldr r0, [r5, r0]
	bl ov96_021E94EC
	ldrb r1, [r0, #9]
	ldrb r0, [r6, #9]
	cmp r1, r0
	bne _021E76FC
	ldr r0, [sp]
	mov r2, #1
	add r1, r5, r0
	ldr r0, _021E7714 ; =0x000008F8
	strb r2, [r1, r0]
	pop {r3, r4, r5, r6, r7, pc}
_021E76FC:
	ldr r0, [sp]
	mov r2, #0
	add r1, r5, r0
	ldr r0, _021E7714 ; =0x000008F8
	strb r2, [r1, r0]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E7708: .word 0x00000614
_021E770C: .word 0x000008B4
_021E7710: .word 0x000008F4
_021E7714: .word 0x000008F8
	thumb_func_end ov96_021E7658

	thumb_func_start ov96_021E7718
ov96_021E7718: ; 0x021E7718
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031968
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5D6C
	add r4, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_020503D0
	str r0, [sp]
	mov r0, #0x1d
	lsl r0, r0, #4
	ldrh r0, [r4, r0]
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	beq _021E7772
	add r0, r5, #0
	bl ov96_021E7FA8
	ldr r0, [sp]
	mov r1, #0xf0
	bl sub_020503DC
	cmp r0, #0
	bne _021E7772
	add r0, r5, #0
	bl ov96_021E8084
	cmp r0, #0
	beq _021E7772
	ldr r0, [sp]
	mov r1, #0xf0
	bl sub_02050408
_021E7772:
	ldr r0, _021E7868 ; =0x000001D2
	ldrh r7, [r4, r0]
	add r0, #0x26
	ldr r0, [r5, r0]
	ldrb r0, [r0, #0xc]
	cmp r0, #0xa
	bne _021E7784
	lsl r0, r7, #0x11
	lsr r7, r0, #0x10
_021E7784:
	add r0, r6, #0
	add r1, r7, #0
	bl sub_02031A38
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _021E77A8
	add r0, r6, #0
	bl sub_020319E4
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021E7A2C
	b _021E780A
_021E77A8:
	add r0, r6, #0
	bl sub_0203197C
	str r0, [sp, #4]
	add r0, r6, #0
	bl sub_02031990
	add r2, r0, #0
	ldr r1, [sp, #4]
	add r0, r5, #0
	bl ov96_021E7BA8
	mov r0, #0x1d
	lsl r0, r0, #4
	ldrh r0, [r4, r0]
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	beq _021E77FC
	add r0, r6, #0
	bl sub_020319A4
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021E786C
	ldr r0, [sp]
	mov r1, #0xef
	bl sub_020503DC
	cmp r0, #0
	bne _021E77FC
	add r0, r6, #0
	bl sub_020319A4
	bl ov96_021E8060
	cmp r0, #0
	beq _021E77FC
	ldr r0, [sp]
	mov r1, #0xef
	bl sub_02050408
_021E77FC:
	add r0, r6, #0
	bl sub_020319DC
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021E7938
_021E780A:
	add r0, r6, #0
	bl sub_020319F0
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021E7D6C
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0, #4]
	cmp r0, #0
	bne _021E7842
	ldr r0, [sp]
	mov r1, #0xf1
	bl sub_020503DC
	cmp r0, #0
	bne _021E7842
	add r0, r5, #0
	bl ov96_021E80C4
	cmp r0, #0
	beq _021E7842
	ldr r0, [sp]
	mov r1, #0xf1
	bl sub_02050408
_021E7842:
	ldr r1, _021E7868 ; =0x000001D2
	add r0, r1, #0
	add r0, #0x26
	ldrh r2, [r4, r1]
	ldr r0, [r5, r0]
	strh r2, [r0, #0xa]
	add r0, r1, #0
	add r0, #0x26
	ldr r0, [r5, r0]
	strh r7, [r0, #8]
	sub r0, r1, #2
	ldrh r0, [r4, r0]
	add r1, #0x26
	lsl r0, r0, #0x1c
	lsr r2, r0, #0x1e
	ldr r0, [r5, r1]
	strb r2, [r0, #0xd]
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E7868: .word 0x000001D2
	thumb_func_end ov96_021E7718

	thumb_func_start ov96_021E786C
ov96_021E786C: ; 0x021E786C
	push {r3, r4, r5, r6, r7, lr}
	mov r2, #0x7e
	lsl r2, r2, #2
	str r0, [sp]
	ldr r0, [r0, r2]
	ldrb r2, [r0, #0xc]
	mov r0, #0x2c
	mul r0, r2
	add r4, r1, r0
	ldr r1, _021E7918 ; =0x000008FE
	ldr r0, [sp]
	ldrh r1, [r0, r1]
	ldrh r0, [r4, #6]
	cmp r1, r0
	bls _021E7914
	strh r1, [r4, #6]
	ldrh r1, [r4, #6]
	ldr r0, _021E791C ; =0x000003E7
	cmp r1, r0
	bls _021E7896
	strh r0, [r4, #6]
_021E7896:
	ldr r1, _021E791C ; =0x000003E7
	ldr r5, [sp]
	ldr r7, _021E7920 ; =0x000008B4
	mov r3, #0
	add r6, r4, #0
	add r0, r1, #0
_021E78A2:
	ldrh r2, [r5, r7]
	strh r2, [r6]
	cmp r2, r0
	bls _021E78AC
	strh r1, [r6]
_021E78AC:
	add r3, r3, #1
	add r5, r5, #2
	add r6, r6, #2
	cmp r3, #3
	blt _021E78A2
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	bl ov96_021E5D50
	add r1, r4, #0
	ldr r3, _021E7924 ; =0xFFFEFFFF
	mov r2, #0
	add r1, #8
_021E78CC:
	ldr r6, [r1]
	ldr r5, _021E7928 ; =0xFFFFFE00
	ldrh r7, [r0]
	and r5, r6
	ldr r6, _021E792C ; =0x000001FF
	add r2, r2, #1
	and r6, r7
	orr r6, r5
	ldr r5, _021E7930 ; =0xFFFFC1FF
	str r6, [r1]
	and r5, r6
	ldrh r6, [r0, #2]
	lsl r6, r6, #0x1b
	lsr r6, r6, #0x12
	orr r6, r5
	ldr r5, _021E7934 ; =0xFFFF3FFF
	str r6, [r1]
	and r5, r6
	ldrb r6, [r0, #0x11]
	lsl r6, r6, #0x1e
	lsr r6, r6, #0x10
	orr r5, r6
	str r5, [r1]
	ldrb r6, [r0, #0x10]
	and r5, r3
	lsl r6, r6, #0x1f
	lsr r6, r6, #0xf
	orr r5, r6
	str r5, [r1]
	ldr r5, [r0, #4]
	add r0, #0x28
	str r5, [r4, #0xc]
	add r1, #0xc
	add r4, #0xc
	cmp r2, #3
	blt _021E78CC
_021E7914:
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E7918: .word 0x000008FE
_021E791C: .word 0x000003E7
_021E7920: .word 0x000008B4
_021E7924: .word 0xFFFEFFFF
_021E7928: .word 0xFFFFFE00
_021E792C: .word 0x000001FF
_021E7930: .word 0xFFFFC1FF
_021E7934: .word 0xFFFF3FFF
	thumb_func_end ov96_021E786C

	thumb_func_start ov96_021E7938
ov96_021E7938: ; 0x021E7938
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xd0
	str r0, [sp]
	mov r0, #0
	str r1, [sp, #4]
	str r0, [sp, #8]
_021E7944:
	ldr r0, [sp, #8]
	lsl r1, r0, #2
	ldr r0, [sp]
	add r1, r0, r1
	mov r0, #0xf6
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	mov r1, #0x2c
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r2, r0, #0
	mul r2, r1
	ldr r1, [sp, #4]
	add r7, r1, r2
	ldr r2, [r7, #0x28]
	ldr r1, _021E7A20 ; =0x0098967F
	cmp r2, r1
	bhs _021E796C
	add r1, r2, #1
	str r1, [r7, #0x28]
_021E796C:
	ldr r1, _021E7A24 ; =_0221A7D8
	mov r3, #0
	ldrb r0, [r1, r0]
	add r2, sp, #0x30
	str r0, [sp, #0xc]
_021E7976:
	lsl r0, r3, #3
	add r5, r7, r0
	ldrh r0, [r7, r0]
	lsl r1, r3, #5
	add r6, r2, r1
	strh r0, [r2, r1]
	mov r4, #0
_021E7984:
	lsl r1, r4, #1
	add r0, r5, r1
	ldrh r0, [r0, #2]
	add r1, r6, r1
	strh r0, [r1, #2]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E7984
	add r0, r3, #1
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	cmp r3, #5
	blo _021E7976
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r2, r0, #0x15
	ldr r0, [sp, #8]
	lsl r1, r0, #1
	ldr r0, [sp]
	add r0, r0, r2
	add r1, r1, r0
	ldr r0, _021E7A28 ; =0x000008D4
	ldrh r1, [r1, r0]
	add r0, sp, #0x10
	strh r1, [r0]
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	mov r1, #0x3f
	ldr r0, [sp]
	lsl r1, r1, #4
	add r1, r0, r1
	mov r0, #0x7c
	mul r0, r2
	add r0, r1, r0
	mov r1, #0
	add r3, sp, #0x10
	mov r2, #0x28
_021E79DC:
	add r5, r1, #0
	mul r5, r2
	add r4, r0, r5
	ldrh r4, [r4, #2]
	ldrh r5, [r0, r5]
	lsl r4, r4, #0xa
	add r4, r4, r5
	lsl r5, r1, #1
	add r1, r1, #1
	lsl r1, r1, #0x18
	add r5, r3, r5
	lsr r1, r1, #0x18
	strh r4, [r5, #2]
	cmp r1, #3
	blo _021E79DC
	ldr r0, [sp, #0xc]
	add r1, r3, #0
	add r2, sp, #0x30
	bl ov96_021E7C04
	ldr r0, [sp]
	add r1, r7, #0
	add r2, sp, #0x30
	bl ov96_021E7C94
	ldr r0, [sp, #8]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	cmp r0, #3
	blo _021E7944
	add sp, #0xd0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E7A20: .word 0x0098967F
_021E7A24: .word _0221A7D8
_021E7A28: .word 0x000008D4
	thumb_func_end ov96_021E7938

	thumb_func_start ov96_021E7A2C
ov96_021E7A2C: ; 0x021E7A2C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xe0
	str r0, [sp]
	str r1, [sp, #4]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
	mov r0, #0
	str r0, [sp, #8]
_021E7A42:
	ldr r0, [sp, #8]
	lsl r1, r0, #2
	ldr r0, [sp]
	add r1, r0, r1
	mov r0, #0xf6
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	mov r1, #0xa4
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r2, r0, #0
	mul r2, r1
	ldr r1, [sp, #4]
	add r1, r1, r2
	str r1, [sp, #0x14]
	ldr r2, [r1, #0x28]
	ldr r1, _021E7B9C ; =0x0098967F
	cmp r2, r1
	bhs _021E7A6E
	ldr r1, [sp, #0x14]
	add r2, r2, #1
	str r2, [r1, #0x28]
_021E7A6E:
	ldr r1, _021E7BA0 ; =_0221A7D8
	add r4, sp, #0x40
	ldrb r0, [r1, r0]
	mov r1, #0
	mov r7, #0x18
	str r0, [sp, #0x18]
_021E7A7A:
	ldr r2, [sp, #0x14]
	lsl r3, r1, #3
	add r6, r2, r3
	ldrh r2, [r2, r3]
	lsl r5, r1, #5
	add r0, r4, r5
	strh r2, [r4, r5]
	mov r5, #0
_021E7A8A:
	lsl r3, r5, #1
	add r2, r6, r3
	ldrh r2, [r2, #2]
	add r3, r0, r3
	strh r2, [r3, #2]
	add r2, r5, #1
	lsl r2, r2, #0x18
	lsr r5, r2, #0x18
	cmp r5, #3
	blo _021E7A8A
	add r3, r1, #0
	ldr r2, [sp, #0x14]
	mul r3, r7
	add r6, r2, r3
	ldr r2, [r6, #0x2c]
	mov r5, #0
	str r2, [r0, #8]
_021E7AAC:
	lsl r3, r5, #1
	add r2, r6, r3
	ldrh r2, [r2, #0x30]
	add r3, r0, r3
	strh r2, [r3, #0xc]
	add r2, r5, #1
	lsl r2, r2, #0x18
	lsr r5, r2, #0x18
	cmp r5, #8
	blo _021E7AAC
	add r6, #0x40
	ldrb r2, [r6]
	strb r2, [r0, #0x1c]
	add r0, r1, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	cmp r1, #5
	blo _021E7A7A
	ldr r0, [sp, #8]
	mov r7, #0
	lsl r1, r0, #1
	ldr r0, [sp]
	add r5, sp, #0x20
	add r0, r0, r1
	str r0, [sp, #0xc]
	mov r1, #0x3f
	ldr r0, [sp]
	lsl r1, r1, #4
	add r0, r0, r1
	str r0, [sp, #0x1c]
	mov r4, #0x28
_021E7AEA:
	ldr r0, [sp, #0x10]
	add r0, r0, r7
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r2, r1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0xc]
	lsl r2, r1, #3
	add r2, r0, r2
	ldr r0, _021E7BA4 ; =0x000008D4
	ldrh r2, [r2, r0]
	add r0, sp, #0x20
	strh r2, [r0]
	mov r0, #0x7c
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #0x1c]
	add r0, r0, r2
	mov r2, #0
_021E7B18:
	add r6, r2, #0
	mul r6, r4
	add r3, r0, r6
	ldrh r3, [r3, #2]
	ldrh r6, [r0, r6]
	lsl r3, r3, #0xa
	add r3, r3, r6
	lsl r6, r2, #1
	add r2, r2, #1
	lsl r2, r2, #0x18
	add r6, r5, r6
	lsr r2, r2, #0x18
	strh r3, [r6, #2]
	cmp r2, #3
	blo _021E7B18
	ldr r0, [sp]
	bl ov96_021E5F34
	add r6, r0, #0
	bl PlayerProfile_GetTrainerID
	str r0, [sp, #0x28]
	add r0, r6, #0
	bl PlayerProfile_GetNamePtr
	mov r1, #0
_021E7B4C:
	lsl r2, r1, #1
	ldrh r3, [r0, r2]
	add r1, r1, #1
	lsl r1, r1, #0x18
	add r2, r5, r2
	lsr r1, r1, #0x18
	strh r3, [r2, #0xc]
	cmp r1, #8
	blo _021E7B4C
	add r0, r6, #0
	bl sub_02029088
	add r1, sp, #0x20
	strb r0, [r1, #0x1c]
	ldr r0, [sp, #0x18]
	add r1, r5, #0
	add r2, sp, #0x40
	bl ov96_021E7C04
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #4
	blo _021E7AEA
	ldr r0, [sp]
	ldr r1, [sp, #0x14]
	add r2, sp, #0x40
	bl ov96_021E7CC8
	ldr r0, [sp, #8]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	cmp r0, #4
	bhs _021E7B96
	b _021E7A42
_021E7B96:
	add sp, #0xe0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E7B9C: .word 0x0098967F
_021E7BA0: .word _0221A7D8
_021E7BA4: .word 0x000008D4
	thumb_func_end ov96_021E7A2C

	thumb_func_start ov96_021E7BA8
ov96_021E7BA8: ; 0x021E7BA8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	str r1, [sp]
	str r2, [sp, #4]
	mov r4, #0
_021E7BB4:
	lsl r0, r4, #2
	add r1, r7, r0
	mov r0, #0xf6
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r2, _021E7BF8 ; =_0221A7D8
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	lsl r0, r4, #1
	add r6, r7, r0
	mov r0, #0x2c
	add r1, r5, #0
	mul r1, r0
	ldr r0, [sp]
	ldrb r2, [r2, r5]
	ldrh r0, [r0, r1]
	ldr r1, _021E7BFC ; =0x000008D4
	ldrh r1, [r6, r1]
	bl ov96_021E7D18
	cmp r0, #0
	beq _021E7BEA
	ldr r0, _021E7C00 ; =0x000008B4
	lsl r1, r5, #1
	ldrh r2, [r6, r0]
	ldr r0, [sp, #4]
	strh r2, [r0, r1]
_021E7BEA:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E7BB4
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E7BF8: .word _0221A7D8
_021E7BFC: .word 0x000008D4
_021E7C00: .word 0x000008B4
	thumb_func_end ov96_021E7BA8

	thumb_func_start ov96_021E7C04
ov96_021E7C04: ; 0x021E7C04
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r2, #0
	add r7, r0, #0
	add r0, r6, #0
	add r4, r1, #0
	add r0, #0x80
	ldrh r0, [r0]
	ldrh r1, [r4]
	add r2, r7, #0
	bl ov96_021E7D18
	cmp r0, #0
	beq _021E7C90
	add r6, #0x80
	ldmia r4!, {r0, r1}
	add r5, r6, #0
	stmia r6!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r6!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r6!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r6!, {r0, r1}
	mov r4, #4
_021E7C36:
	add r0, r5, #0
	sub r0, #0x20
	ldrh r0, [r0]
	ldrh r1, [r5]
	add r2, r7, #0
	bl ov96_021E7D18
	cmp r0, #0
	beq _021E7C90
	add r3, r5, #0
	sub r3, #0x20
	add r2, sp, #0
	add r6, r2, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	add r2, r5, #0
	add r3, r5, #0
	sub r2, #0x20
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	add r2, r5, #0
	ldmia r6!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r6!, {r0, r1}
	sub r4, r4, #1
	sub r5, #0x20
	stmia r2!, {r0, r1}
	cmp r4, #0
	bgt _021E7C36
_021E7C90:
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E7C04

	thumb_func_start ov96_021E7C94
ov96_021E7C94: ; 0x021E7C94
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	add r4, r2, #0
	bl ov96_021E5F24
	mov r2, #0
	add r1, r2, #0
_021E7CA2:
	ldrh r0, [r4]
	add r3, r1, #0
	add r6, r4, #0
	strh r0, [r5]
	add r7, r5, #0
_021E7CAC:
	ldrh r0, [r6, #2]
	add r3, r3, #1
	add r6, r6, #2
	strh r0, [r7, #2]
	add r7, r7, #2
	cmp r3, #3
	blt _021E7CAC
	add r2, r2, #1
	add r4, #0x20
	add r5, #8
	cmp r2, #5
	blt _021E7CA2
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E7C94

	thumb_func_start ov96_021E7CC8
ov96_021E7CC8: ; 0x021E7CC8
	push {r4, r5, r6, r7}
	mov r0, #0
	add r3, r1, #0
_021E7CCE:
	ldrh r4, [r2]
	mov r5, #0
	add r6, r2, #0
	strh r4, [r1]
	add r7, r1, #0
_021E7CD8:
	ldrh r4, [r6, #2]
	add r5, r5, #1
	add r6, r6, #2
	strh r4, [r7, #2]
	add r7, r7, #2
	cmp r5, #3
	blt _021E7CD8
	ldr r4, [r2, #8]
	mov r5, #0
	str r4, [r3, #0x2c]
	add r6, r2, #0
	add r7, r3, #0
_021E7CF0:
	ldrh r4, [r6, #0xc]
	add r5, r5, #1
	add r6, r6, #2
	strh r4, [r7, #0x30]
	add r7, r7, #2
	cmp r5, #8
	blt _021E7CF0
	ldrb r5, [r2, #0x1c]
	add r4, r3, #0
	add r4, #0x40
	add r0, r0, #1
	strb r5, [r4]
	add r2, #0x20
	add r1, #8
	add r3, #0x18
	cmp r0, #5
	blt _021E7CCE
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E7CC8

	thumb_func_start ov96_021E7D18
ov96_021E7D18: ; 0x021E7D18
	push {r3, lr}
	ldr r3, _021E7D2C ; =0x0000FFFF
	cmp r0, r3
	bne _021E7D24
	mov r0, #1
	pop {r3, pc}
_021E7D24:
	bl ov96_021E7D30
	pop {r3, pc}
	nop
_021E7D2C: .word 0x0000FFFF
	thumb_func_end ov96_021E7D18

	thumb_func_start ov96_021E7D30
ov96_021E7D30: ; 0x021E7D30
	push {r4, lr}
	mov r4, #0
	cmp r2, #0
	bne _021E7D4A
	ldr r2, _021E7D68 ; =0x0000FFFF
	cmp r0, r2
	bne _021E7D42
	mov r4, #1
	b _021E7D64
_021E7D42:
	cmp r0, r1
	bge _021E7D64
	mov r4, #1
	b _021E7D64
_021E7D4A:
	cmp r2, #1
	bne _021E7D60
	ldr r2, _021E7D68 ; =0x0000FFFF
	cmp r0, r2
	bne _021E7D58
	mov r4, #1
	b _021E7D64
_021E7D58:
	cmp r0, r1
	ble _021E7D64
	mov r4, #1
	b _021E7D64
_021E7D60:
	bl GF_AssertFail
_021E7D64:
	add r0, r4, #0
	pop {r4, pc}
	.balign 4, 0
_021E7D68: .word 0x0000FFFF
	thumb_func_end ov96_021E7D30

	thumb_func_start ov96_021E7D6C
ov96_021E7D6C: ; 0x021E7D6C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	str r1, [sp]
	ldr r1, _021E7F3C ; =0x0000072C
	add r5, r0, #0
	add r7, r5, r1
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r1, _021E7F40 ; =0x0098967F
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _021E7DCE
	ldr r2, [sp]
	mov r0, #1
	add r2, #0x38
	bl ov96_021E7F98
	mov r0, #0x1d
	lsl r0, r0, #4
	ldrh r0, [r7, r0]
	lsl r1, r0, #0x1f
	lsr r1, r1, #0x1f
	beq _021E7DBA
	ldr r2, [sp]
	ldr r1, _021E7F40 ; =0x0098967F
	mov r0, #1
	add r2, #0x3c
	bl ov96_021E7F98
	add r0, r5, #0
	bl ov96_021E7F48
	b _021E7E0A
_021E7DBA:
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1f
	beq _021E7E0A
	ldr r2, [sp]
	ldr r1, _021E7F40 ; =0x0098967F
	mov r0, #1
	add r2, #0x40
	bl ov96_021E7F98
	b _021E7E0A
_021E7DCE:
	ldr r2, [sp]
	mov r0, #1
	add r2, r2, #4
	bl ov96_021E7F98
	mov r0, #0x1d
	lsl r0, r0, #4
	ldrh r0, [r7, r0]
	lsl r1, r0, #0x1f
	lsr r1, r1, #0x1f
	beq _021E7DF8
	ldr r2, [sp]
	ldr r1, _021E7F40 ; =0x0098967F
	mov r0, #1
	add r2, #8
	bl ov96_021E7F98
	add r0, r5, #0
	bl ov96_021E7F48
	b _021E7E0A
_021E7DF8:
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1f
	beq _021E7E0A
	ldr r2, [sp]
	ldr r1, _021E7F40 ; =0x0098967F
	mov r0, #1
	add r2, #0xc
	bl ov96_021E7F98
_021E7E0A:
	ldr r0, _021E7F44 ; =0x0000072A
	mov r4, #0
	ldrb r0, [r5, r0]
	cmp r0, #0
	bls _021E7E68
	ldr r0, [sp]
	ldr r6, [sp]
	str r0, [sp, #0xc]
	add r0, #0x6c
	str r0, [sp, #0xc]
	add r6, #0x44
_021E7E20:
	mov r1, #0x72
	add r0, r7, r4
	lsl r1, r1, #2
	ldrb r1, [r0, r1]
	cmp r1, #0
	beq _021E7E46
	lsl r2, r4, #2
	add r3, r5, r2
	mov r2, #0xf6
	lsl r2, r2, #2
	ldr r2, [r3, r2]
	ldr r1, _021E7F40 ; =0x0098967F
	lsl r2, r2, #0x18
	lsr r2, r2, #0x16
	mov r0, #1
	add r2, r6, r2
	bl ov96_021E7F98
	b _021E7E5A
_021E7E46:
	mov r1, #0x73
	lsl r1, r1, #2
	ldrb r0, [r0, r1]
	cmp r0, #0
	beq _021E7E5A
	ldr r1, _021E7F40 ; =0x0098967F
	ldr r2, [sp, #0xc]
	mov r0, #1
	bl ov96_021E7F98
_021E7E5A:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, _021E7F44 ; =0x0000072A
	ldrb r0, [r5, r0]
	cmp r4, r0
	blo _021E7E20
_021E7E68:
	ldr r0, [sp, #8]
	mov r1, #0x60
	mul r1, r0
	add r0, r7, r1
	str r0, [sp, #4]
	ldr r0, [sp]
	ldr r4, _021E7F40 ; =0x0098967F
	str r0, [sp, #0x10]
	add r0, #0x18
	str r0, [sp, #0x10]
	ldr r0, [sp]
	mov r6, #0
	str r0, [sp, #0x14]
	add r0, #0x1c
	str r0, [sp, #0x14]
	ldr r0, [sp]
	str r0, [sp, #0x18]
	add r0, #0x20
	str r0, [sp, #0x18]
	ldr r0, [sp]
	str r0, [sp, #0x1c]
	add r0, #0x24
	str r0, [sp, #0x1c]
	ldr r0, [sp]
	str r0, [sp, #0x20]
	add r0, #0x28
	str r0, [sp, #0x20]
	ldr r0, [sp]
	str r0, [sp, #0x24]
	add r0, #0x2c
	str r0, [sp, #0x24]
	ldr r0, [sp]
	str r0, [sp, #0x28]
	add r0, #0x30
	str r0, [sp, #0x28]
	ldr r0, [sp]
	str r0, [sp, #0x2c]
	add r0, #0x34
	str r0, [sp, #0x2c]
_021E7EB6:
	ldr r0, [sp, #4]
	lsl r1, r6, #5
	add r5, r0, r1
	ldr r0, [r0, r1]
	ldr r2, [sp, #0x10]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #4]
	ldr r2, [sp, #0x14]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #8]
	ldr r2, [sp, #0x18]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #0xc]
	ldr r2, [sp, #0x1c]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #0x10]
	ldr r2, [sp, #0x20]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #0x14]
	ldr r2, [sp, #0x24]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #0x18]
	ldr r2, [sp, #0x28]
	add r1, r4, #0
	bl ov96_021E7F98
	ldr r0, [r5, #0x1c]
	ldr r2, [sp, #0x2c]
	add r1, r4, #0
	bl ov96_021E7F98
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #3
	blo _021E7EB6
	mov r0, #6
	lsl r0, r0, #6
	ldr r2, [sp]
	ldr r0, [r7, r0]
	ldr r1, _021E7F40 ; =0x0098967F
	add r2, #0x10
	bl ov96_021E7F98
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r2, [sp]
	ldr r0, [r7, r0]
	add r2, #0x14
	ldr r1, _021E7F40 ; =0x0098967F
	str r2, [sp]
	bl ov96_021E7F98
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E7F3C: .word 0x0000072C
_021E7F40: .word 0x0098967F
_021E7F44: .word 0x0000072A
	thumb_func_end ov96_021E7D6C

	thumb_func_start ov96_021E7F48
ov96_021E7F48: ; 0x021E7F48
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031B00
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	mov r0, #0x3f
	lsl r0, r0, #4
	add r1, r5, r0
	mov r0, #0x7c
	mul r0, r2
	add r3, r1, r0
	mov r2, #0
	mov r5, #0x28
_021E7F74:
	add r6, r2, #0
	mul r6, r5
	add r1, r3, r6
	ldrh r6, [r3, r6]
	lsl r7, r2, #2
	add r0, r4, r7
	strh r6, [r4, r7]
	ldrh r6, [r1, #2]
	strb r6, [r0, #3]
	ldrb r1, [r1, #0x11]
	strb r1, [r0, #2]
	add r0, r2, #1
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	cmp r2, #3
	blo _021E7F74
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E7F48

	thumb_func_start ov96_021E7F98
ov96_021E7F98: ; 0x021E7F98
	ldr r3, [r2]
	add r0, r3, r0
	cmp r0, r1
	bls _021E7FA4
	str r1, [r2]
	bx lr
_021E7FA4:
	str r0, [r2]
	bx lr
	thumb_func_end ov96_021E7F98

	thumb_func_start ov96_021E7FA8
ov96_021E7FA8: ; 0x021E7FA8
	push {r3, lr}
	mov r1, #0x7e
	lsl r1, r1, #2
	ldr r1, [r0, r1]
	ldrb r1, [r1, #0xc]
	cmp r1, #9
	bhi _021E8024
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021E7FC2: ; jump table
	.short _021E7FD6 - _021E7FC2 - 2 ; case 0
	.short _021E7FDE - _021E7FC2 - 2 ; case 1
	.short _021E7FE6 - _021E7FC2 - 2 ; case 2
	.short _021E7FEE - _021E7FC2 - 2 ; case 3
	.short _021E7FF6 - _021E7FC2 - 2 ; case 4
	.short _021E7FFE - _021E7FC2 - 2 ; case 5
	.short _021E8006 - _021E7FC2 - 2 ; case 6
	.short _021E800E - _021E7FC2 - 2 ; case 7
	.short _021E8016 - _021E7FC2 - 2 ; case 8
	.short _021E801E - _021E7FC2 - 2 ; case 9
_021E7FD6:
	mov r1, #1
	bl ov96_021E8028
	pop {r3, pc}
_021E7FDE:
	mov r1, #2
	bl ov96_021E8028
	pop {r3, pc}
_021E7FE6:
	mov r1, #4
	bl ov96_021E8028
	pop {r3, pc}
_021E7FEE:
	mov r1, #8
	bl ov96_021E8028
	pop {r3, pc}
_021E7FF6:
	mov r1, #0x10
	bl ov96_021E8028
	pop {r3, pc}
_021E7FFE:
	mov r1, #0x11
	bl ov96_021E8028
	pop {r3, pc}
_021E8006:
	mov r1, #0x14
	bl ov96_021E8028
	pop {r3, pc}
_021E800E:
	mov r1, #6
	bl ov96_021E8028
	pop {r3, pc}
_021E8016:
	mov r1, #0xa
	bl ov96_021E8028
	pop {r3, pc}
_021E801E:
	mov r1, #9
	bl ov96_021E8028
_021E8024:
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021E7FA8

	thumb_func_start ov96_021E8028
ov96_021E8028: ; 0x021E8028
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r6, r1, #0
	ldr r0, [r0]
	bl sub_02031968
	add r7, r0, #0
	mov r4, #0
_021E803E:
	mov r2, #0x28
	mul r2, r4
	add r3, r5, r2
	mov r2, #0x81
	lsl r2, r2, #2
	ldrh r2, [r3, r2]
	add r0, r7, #0
	add r1, r6, #0
	bl sub_020319F8
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E803E
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8028

	thumb_func_start ov96_021E8060
ov96_021E8060: ; 0x021E8060
	mov r3, #0
	mov r2, #0x2c
_021E8064:
	add r1, r3, #0
	mul r1, r2
	add r1, r0, r1
	ldrh r1, [r1, #6]
	cmp r1, #0
	bne _021E8074
	mov r0, #0
	bx lr
_021E8074:
	add r1, r3, #1
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	cmp r3, #5
	blo _021E8064
	mov r0, #1
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E8060

	thumb_func_start ov96_021E8084
ov96_021E8084: ; 0x021E8084
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	ldr r0, [r0]
	bl sub_02031968
	add r7, r0, #0
	mov r4, #0
_021E8098:
	mov r0, #0x28
	mul r0, r4
	add r1, r6, r0
	mov r0, #0x81
	lsl r0, r0, #2
	ldrh r0, [r1, r0]
	sub r5, r0, #1
	add r0, r7, #0
	bl sub_02031978
	ldrb r0, [r0, r5]
	cmp r0, #0x1f
	bne _021E80B6
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021E80B6:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021E8098
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E8084

	thumb_func_start ov96_021E80C4
ov96_021E80C4: ; 0x021E80C4
	push {r3, r4, r5, r6, r7, lr}
	mov r1, #0x7e
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	ldr r0, [r0]
	bl sub_02031968
	bl sub_020319DC
	ldr r6, _021E8110 ; =0x0221A894
	ldr r7, _021E8114 ; =_0221A7D8
	add r5, r0, #0
	mov r4, #0
_021E80DE:
	mov r0, #0x2c
	mul r0, r4
	ldrh r1, [r5, r0]
	ldr r0, _021E8118 ; =0x0000FFFF
	cmp r1, r0
	bne _021E80EE
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021E80EE:
	lsl r0, r4, #1
	ldrh r0, [r6, r0]
	ldrb r2, [r7, r4]
	bl ov96_021E7D30
	cmp r0, #0
	bne _021E8100
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021E8100:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xa
	blo _021E80DE
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E8110: .word 0x0221A894
_021E8114: .word _0221A7D8
_021E8118: .word 0x0000FFFF
	thumb_func_end ov96_021E80C4

	thumb_func_start ov96_021E811C
ov96_021E811C: ; 0x021E811C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r5, r2, #0
	mov r1, #0xa
	strb r1, [r5]
	ldrb r6, [r0, #0xc]
	ldr r0, [r0, #4]
	mov r7, #0
	cmp r0, #1
	bne _021E8160
	cmp r6, #0xa
	bhi _021E815A
	add r0, r6, r6
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021E8140: ; jump table
	.short _021E815A - _021E8140 - 2 ; case 0
	.short _021E815A - _021E8140 - 2 ; case 1
	.short _021E815A - _021E8140 - 2 ; case 2
	.short _021E815A - _021E8140 - 2 ; case 3
	.short _021E815A - _021E8140 - 2 ; case 4
	.short _021E8156 - _021E8140 - 2 ; case 5
	.short _021E8156 - _021E8140 - 2 ; case 6
	.short _021E8156 - _021E8140 - 2 ; case 7
	.short _021E8156 - _021E8140 - 2 ; case 8
	.short _021E8156 - _021E8140 - 2 ; case 9
	.short _021E8156 - _021E8140 - 2 ; case 10
_021E8156:
	mov r7, #1
	b _021E8182
_021E815A:
	bl GF_AssertFail
	b _021E8182
_021E8160:
	cmp r6, #4
	bhi _021E817E
	add r0, r6, r6
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021E8170: ; jump table
	.short _021E817A - _021E8170 - 2 ; case 0
	.short _021E817A - _021E8170 - 2 ; case 1
	.short _021E817A - _021E8170 - 2 ; case 2
	.short _021E817A - _021E8170 - 2 ; case 3
	.short _021E817A - _021E8170 - 2 ; case 4
_021E817A:
	mov r7, #1
	b _021E8182
_021E817E:
	bl GF_AssertFail
_021E8182:
	cmp r7, #0
	beq _021E81CE
	cmp r6, #0xa
	bne _021E81B4
	bl LCRandom
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	mov r2, #0
	cmp r4, #0
	bls _021E81CE
	ldr r1, _021E81D0 ; =0x0221A95C
	lsl r0, r0, #2
	add r1, r1, r0
_021E81A4:
	ldrb r0, [r1, r2]
	strb r0, [r5, r2]
	add r0, r2, #1
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	cmp r2, r4
	blo _021E81A4
	pop {r3, r4, r5, r6, r7, pc}
_021E81B4:
	mov r2, #0
	cmp r4, #0
	bls _021E81CE
	ldr r1, _021E81D4 ; =0x0221A934
	lsl r0, r6, #2
	add r1, r1, r0
_021E81C0:
	ldrb r0, [r1, r2]
	strb r0, [r5, r2]
	add r0, r2, #1
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	cmp r2, r4
	blo _021E81C0
_021E81CE:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E81D0: .word 0x0221A95C
_021E81D4: .word 0x0221A934
	thumb_func_end ov96_021E811C

	thumb_func_start ov96_021E81D8
ov96_021E81D8: ; 0x021E81D8
	push {r3, r4, lr}
	sub sp, #0x14
	add r4, r1, #0
	ldr r0, [r4, #4]
	add r1, sp, #4
	add r2, sp, #0
	bl ov96_021EAEC8
	ldr r0, [r4, #8]
	mov r1, #1
	bl sub_02024830
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #4]
	add r1, sp, #8
	lsl r0, r0, #0xc
	str r0, [sp, #8]
	ldr r0, [sp]
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	bl sub_020247D4
	ldr r0, [r4, #4]
	bl ov96_021EB120
	cmp r0, #0
	ldr r0, [r4, #8]
	beq _021E821E
	mov r1, #1
	bl sub_02024830
	add sp, #0x14
	pop {r3, r4, pc}
_021E821E:
	mov r1, #0
	bl sub_02024830
	add sp, #0x14
	pop {r3, r4, pc}
	thumb_func_end ov96_021E81D8

	thumb_func_start ov96_021E8228
ov96_021E8228: ; 0x021E8228
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r7, r2, #0
	str r3, [sp]
	ldr r6, [sp, #0x18]
	add r1, r3, #0
	bne _021E825E
	bl ov96_021E5F24
	cmp r4, r0
	beq _021E8244
	bl GF_AssertFail
_021E8244:
	cmp r6, #1
	beq _021E824C
	bl GF_AssertFail
_021E824C:
	mov r0, #0x8b
	lsl r0, r0, #4
	ldr r2, [r5, r0]
	ldr r1, _021E830C ; =0x0000270F
	cmp r2, r1
	bhs _021E830A
	add r1, r2, #1
	str r1, [r5, r0]
	pop {r3, r4, r5, r6, r7, pc}
_021E825E:
	cmp r7, #3
	blo _021E8266
	bl GF_AssertFail
_021E8266:
	mov r0, #0x1e
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	ldr r0, [r0, #0x10]
	cmp r0, #0
	bne _021E829A
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _021E8280
	bl GF_AssertFail
_021E8280:
	ldr r2, _021E8310 ; =0x0000072C
	lsl r1, r6, #0x18
	add r3, r5, r2
	mov r2, #0x60
	mul r2, r4
	add r3, r3, r2
	lsl r2, r7, #5
	ldr r0, [sp]
	lsr r1, r1, #0x18
	add r2, r3, r2
	bl ov96_021E8340
	pop {r3, r4, r5, r6, r7, pc}
_021E829A:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E82EA
	add r0, r5, #0
	bl ov96_021E5D34
	cmp r4, r0
	blo _021E82C8
	ldr r2, _021E8310 ; =0x0000072C
	lsl r1, r6, #0x18
	add r3, r5, r2
	mov r2, #0x60
	mul r2, r4
	add r3, r3, r2
	lsl r2, r7, #5
	ldr r0, [sp]
	lsr r1, r1, #0x18
	add r2, r3, r2
	bl ov96_021E8340
	pop {r3, r4, r5, r6, r7, pc}
_021E82C8:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r4, r0
	beq _021E82D6
	bl GF_AssertFail
_021E82D6:
	ldr r2, _021E8314 ; =0x00000B44
	lsl r1, r6, #0x18
	add r3, r5, r2
	lsl r2, r7, #5
	ldr r0, [sp]
	lsr r1, r1, #0x18
	add r2, r3, r2
	bl ov96_021E8340
	pop {r3, r4, r5, r6, r7, pc}
_021E82EA:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r4, r0
	beq _021E82F8
	bl GF_AssertFail
_021E82F8:
	ldr r2, _021E8314 ; =0x00000B44
	lsl r1, r6, #0x18
	add r3, r5, r2
	lsl r2, r7, #5
	ldr r0, [sp]
	lsr r1, r1, #0x18
	add r2, r3, r2
	bl ov96_021E8340
_021E830A:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E830C: .word 0x0000270F
_021E8310: .word 0x0000072C
_021E8314: .word 0x00000B44
	thumb_func_end ov96_021E8228

	thumb_func_start ov96_021E8318
ov96_021E8318: ; 0x021E8318
	ldr r2, _021E8320 ; =0x00000D2A
	strh r1, [r0, r2]
	bx lr
	nop
_021E8320: .word 0x00000D2A
	thumb_func_end ov96_021E8318

	thumb_func_start ov96_021E8324
ov96_021E8324: ; 0x021E8324
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, _021E833C ; =0x00000D6C
	add r4, r1, #0
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021E8336
	bl GF_AssertFail
_021E8336:
	ldr r0, _021E833C ; =0x00000D6C
	str r4, [r5, r0]
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021E833C: .word 0x00000D6C
	thumb_func_end ov96_021E8324

	thumb_func_start ov96_021E8340
ov96_021E8340: ; 0x021E8340
	push {r3, lr}
	cmp r0, #8
	bhi _021E8382
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021E8352: ; jump table
	.short _021E8382 - _021E8352 - 2 ; case 0
	.short _021E8364 - _021E8352 - 2 ; case 1
	.short _021E8366 - _021E8352 - 2 ; case 2
	.short _021E836A - _021E8352 - 2 ; case 3
	.short _021E836E - _021E8352 - 2 ; case 4
	.short _021E8372 - _021E8352 - 2 ; case 5
	.short _021E8376 - _021E8352 - 2 ; case 6
	.short _021E837A - _021E8352 - 2 ; case 7
	.short _021E837E - _021E8352 - 2 ; case 8
_021E8364:
	b _021E8388
_021E8366:
	add r2, r2, #4
	b _021E8388
_021E836A:
	add r2, #8
	b _021E8388
_021E836E:
	add r2, #0xc
	b _021E8388
_021E8372:
	add r2, #0x10
	b _021E8388
_021E8376:
	add r2, #0x14
	b _021E8388
_021E837A:
	add r2, #0x18
	b _021E8388
_021E837E:
	add r2, #0x1c
	b _021E8388
_021E8382:
	bl GF_AssertFail
	pop {r3, pc}
_021E8388:
	ldr r0, [r2]
	add r1, r0, r1
	ldr r0, _021E8398 ; =0x0000270F
	str r1, [r2]
	cmp r1, r0
	bls _021E8396
	str r0, [r2]
_021E8396:
	pop {r3, pc}
	.balign 4, 0
_021E8398: .word 0x0000270F
	thumb_func_end ov96_021E8340

	thumb_func_start ov96_021E839C
ov96_021E839C: ; 0x021E839C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0]
	bl sub_02031968
	add r6, r0, #0
	ldr r0, _021E8418 ; =0x00000D2A
	ldrh r1, [r5, r0]
	ldr r0, _021E841C ; =0x0000FFFF
	cmp r1, r0
	bne _021E83C0
	bl GF_AssertFail
	mov r0, #0
	pop {r4, r5, r6, pc}
_021E83C0:
	add r0, r5, #0
	bl ov96_021E5E44
	add r4, r0, #0
	mov r0, #0x7e
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _021E83DE
	add r0, r6, #0
	bl sub_020319E4
	mov r1, #0xa4
	b _021E83E6
_021E83DE:
	add r0, r6, #0
	bl sub_020319DC
	mov r1, #0x2c
_021E83E6:
	mul r1, r4
	add r0, r0, r1
	ldrh r0, [r0]
	ldr r1, _021E841C ; =0x0000FFFF
	cmp r0, r1
	bne _021E83F6
	mov r0, #1
	pop {r4, r5, r6, pc}
_021E83F6:
	ldr r1, _021E8420 ; =_0221A7D8
	ldrb r1, [r1, r4]
	cmp r1, #0
	ldr r1, _021E8418 ; =0x00000D2A
	bne _021E840A
	ldrh r1, [r5, r1]
	cmp r0, r1
	bhs _021E8414
	mov r0, #1
	pop {r4, r5, r6, pc}
_021E840A:
	ldrh r1, [r5, r1]
	cmp r0, r1
	bls _021E8414
	mov r0, #1
	pop {r4, r5, r6, pc}
_021E8414:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
_021E8418: .word 0x00000D2A
_021E841C: .word 0x0000FFFF
_021E8420: .word _0221A7D8
	thumb_func_end ov96_021E839C

	thumb_func_start ov96_021E8424
ov96_021E8424: ; 0x021E8424
	push {r3, lr}
	cmp r0, #0
	beq _021E843A
	cmp r0, #0x64
	bhi _021E843A
	sub r0, r0, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x17
	ldr r0, _021E8444 ; =0x0221AA20
	ldrh r0, [r0, r1]
	pop {r3, pc}
_021E843A:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
	nop
_021E8444: .word 0x0221AA20
	thumb_func_end ov96_021E8424

	thumb_func_start ov96_021E8448
ov96_021E8448: ; 0x021E8448
	push {r3, r4, r5, lr}
	sub sp, #8
	add r5, r1, #0
	beq _021E847A
	cmp r5, #0x64
	bhi _021E847A
	bl ov96_021E5DCC
	add r1, r0, #0
	mov r0, #0x41
	lsl r0, r0, #2
	bl NARC_ctor
	add r4, r0, #0
	sub r1, r5, #1
	add r2, sp, #0
	bl NARC_ReadWholeMember
	add r0, r4, #0
	bl NARC_dtor
	add r0, sp, #0
	add sp, #8
	ldrb r0, [r0, #7]
	pop {r3, r4, r5, pc}
_021E847A:
	bl GF_AssertFail
	mov r0, #0
	add sp, #8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E8448

	thumb_func_start ov96_021E8484
ov96_021E8484: ; 0x021E8484
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	str r0, [sp]
	add r4, r1, #0
	bl ov96_021E5DCC
	add r3, r0, #0
	ldr r2, _021E8608 ; =0x00000136
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	str r0, [sp, #0x14]
	mov r0, #4
	sub r0, r0, r4
	str r0, [sp, #4]
	mov r1, #0x7e
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r2, [r0, r1]
	add r0, r4, #0
	ldrb r1, [r2, #0xc]
	ldrb r2, [r2, #0xf]
	add r3, sp, #0x2c
	bl ov96_021E860C
	ldr r0, [sp]
	bl ov96_021E5DCC
	add r1, r0, #0
	mov r0, #0xa9
	bl NARC_ctor
	str r0, [sp, #0x10]
	ldr r0, [sp]
	bl ov96_021E5DCC
	add r1, r0, #0
	mov r0, #0x41
	lsl r0, r0, #2
	bl NARC_ctor
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x1c]
	ldr r0, [sp, #4]
	cmp r0, #4
	bge _021E84E6
	blt _021E84E8
_021E84E6:
	b _021E85F0
_021E84E8:
	add r0, sp, #0x2c
	str r0, [sp, #8]
_021E84EC:
	ldr r0, [sp]
	ldr r1, [sp, #4]
	bl ov96_021E5D40
	add r5, r0, #0
	ldr r0, [sp, #8]
	ldrb r0, [r0]
	str r0, [r5]
	cmp r0, #0
	bne _021E8504
	bl GF_AssertFail
_021E8504:
	ldr r1, [r5]
	ldr r0, [sp, #0xc]
	sub r1, r1, #1
	add r2, sp, #0x24
	bl NARC_ReadWholeMember
	add r1, sp, #0x24
	ldrb r1, [r1, #6]
	ldr r0, [sp, #0x14]
	bl NewString_ReadMsgData
	add r4, r0, #0
	ldr r0, [sp]
	ldr r1, [sp, #4]
	bl ov96_021E5F34
	add r6, r0, #0
	add r0, r4, #0
	bl String_c_str
	add r1, r0, #0
	add r0, r6, #0
	bl sub_02028F24
	add r0, r4, #0
	bl String_dtor
	mov r0, #0
	add r6, r5, #0
	str r0, [sp, #0x18]
	add r4, sp, #0x24
	add r6, #0x16
	add r7, sp, #0x24
_021E8546:
	ldrh r0, [r4]
	mov r1, #0x12
	strh r0, [r5, #4]
	mov r0, #0
	strh r0, [r5, #6]
	strb r0, [r5, #0x14]
	str r0, [r5, #8]
	ldrh r0, [r5, #4]
	bl sub_0206FBE8
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021E856A
	cmp r0, #0xfe
	beq _021E856E
	cmp r0, #0xff
	beq _021E8572
	b _021E8576
_021E856A:
	mov r0, #0
	b _021E8578
_021E856E:
	mov r0, #1
	b _021E8578
_021E8572:
	mov r0, #2
	b _021E8578
_021E8576:
	mov r0, #0
_021E8578:
	strb r0, [r5, #0x15]
	ldrh r0, [r5, #4]
	mov r1, #0
	bl ov96_021E679C
	add r1, r0, #0
	add r2, sp, #0x2c
	ldr r0, [sp, #0x10]
	add r2, #3
	bl NARC_ReadWholeMember
	ldrb r0, [r7, #0xb]
	strb r0, [r5, #0xc]
	ldrb r0, [r7, #0xc]
	strb r0, [r5, #0xd]
	ldrb r0, [r7, #0xd]
	strb r0, [r5, #0xe]
	ldrb r0, [r7, #0xe]
	strb r0, [r5, #0xf]
	ldrb r0, [r7, #0xf]
	strb r0, [r5, #0x10]
	ldr r0, [sp]
	bl ov96_021E5DCC
	add r1, r0, #0
	ldrh r0, [r4]
	bl GetSpeciesName
	str r0, [sp, #0x20]
	bl String_c_str
	add r1, r0, #0
	add r0, r6, #0
	mov r2, #0xb
	bl CopyU16StringArrayN
	ldr r0, [sp, #0x20]
	bl String_dtor
	ldr r0, [sp, #0x18]
	add r4, r4, #2
	add r0, r0, #1
	add r5, #0x28
	add r6, #0x28
	str r0, [sp, #0x18]
	cmp r0, #3
	blt _021E8546
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	ldr r0, [sp, #0x1c]
	add r0, r0, #1
	str r0, [sp, #0x1c]
	ldr r0, [sp, #4]
	cmp r0, #4
	bge _021E85F0
	b _021E84EC
_021E85F0:
	ldr r0, [sp, #0xc]
	bl NARC_dtor
	ldr r0, [sp, #0x10]
	bl NARC_dtor
	ldr r0, [sp, #0x14]
	bl DestroyMsgData
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	nop
_021E8608: .word 0x00000136
	thumb_func_end ov96_021E8484

	thumb_func_start ov96_021E860C
ov96_021E860C: ; 0x021E860C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	add r5, r0, #0
	add r0, r1, #0
	mov r1, #0
	str r2, [sp]
	add r4, r3, #0
	add r2, r1, #0
_021E861C:
	strb r2, [r4, r1]
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, #3
	blo _021E861C
	cmp r0, #0xa
	bne _021E8678
	add r1, sp, #0xc
	mov r7, #0x19
	add r1, #1
_021E8632:
	add r0, r2, #1
	lsl r0, r0, #0x18
	strb r2, [r1, r2]
	lsr r2, r0, #0x18
	cmp r2, #0x19
	blo _021E8632
	mov r6, #0
	cmp r5, #0
	bls _021E86C4
_021E8644:
	bl LCRandom
	add r1, r7, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	add r1, sp, #0xc
	lsr r0, r0, #0x18
	add r1, #1
	ldrb r1, [r1, r0]
	strb r1, [r4, r6]
	add r1, #0x19
	strb r1, [r4, r6]
	sub r1, r7, #1
	lsl r1, r1, #0x18
	lsr r7, r1, #0x18
	add r1, sp, #0xc
	add r1, #1
	ldrb r2, [r1, r7]
	strb r2, [r1, r0]
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, r5
	blo _021E8644
	b _021E86C4
_021E8678:
	mov r7, #5
	add r1, sp, #8
_021E867C:
	strb r2, [r1, r2]
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	cmp r2, #5
	blo _021E867C
	mov r6, #0
	cmp r5, #0
	bls _021E86C4
	lsl r1, r0, #2
	add r0, r0, r1
	str r0, [sp, #4]
_021E8694:
	bl LCRandom
	add r1, r7, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	add r1, sp, #8
	ldrb r2, [r1, r0]
	ldr r1, [sp, #4]
	strb r2, [r4, r6]
	add r1, r2, r1
	strb r1, [r4, r6]
	sub r1, r7, #1
	lsl r1, r1, #0x18
	lsr r7, r1, #0x18
	add r1, sp, #8
	ldrb r2, [r1, r7]
	strb r2, [r1, r0]
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, r5
	blo _021E8694
_021E86C4:
	ldr r0, [sp]
	cmp r0, #0
	beq _021E86E0
	mov r1, #0
	cmp r5, #0
	bls _021E86E0
_021E86D0:
	ldrb r0, [r4, r1]
	add r0, #0x32
	strb r0, [r4, r1]
	add r0, r1, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	cmp r1, r5
	blo _021E86D0
_021E86E0:
	mov r1, #0
	cmp r5, #0
	bls _021E86F6
_021E86E6:
	ldrb r0, [r4, r1]
	add r0, r0, #1
	strb r0, [r4, r1]
	add r0, r1, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	cmp r1, r5
	blo _021E86E6
_021E86F6:
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E860C

	thumb_func_start ov96_021E86FC
ov96_021E86FC: ; 0x021E86FC
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	cmp r4, #4
	blo _021E870A
	bl GF_AssertFail
_021E870A:
	ldr r0, _021E8728 ; =0x00000D68
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _021E8716
	bl GF_AssertFail
_021E8716:
	bl sub_02031B10
	ldr r1, _021E8728 ; =0x00000D68
	ldr r2, [r5, r1]
	add r1, r0, #0
	mul r1, r4
	add r0, r2, r1
	pop {r3, r4, r5, pc}
	nop
_021E8728: .word 0x00000D68
	thumb_func_end ov96_021E86FC

	thumb_func_start ov96_021E872C
ov96_021E872C: ; 0x021E872C
	push {lr}
	sub sp, #0x24
	lsl r0, r0, #0xc
	str r0, [sp, #0x18]
	lsl r0, r1, #0xc
	mov r1, #0
	str r0, [sp, #0x1c]
	lsl r0, r2, #0xc
	str r0, [sp, #0xc]
	lsl r0, r3, #0xc
	str r0, [sp, #0x10]
	str r1, [sp, #0x20]
	str r1, [sp, #0x14]
	add r0, sp, #0x18
	add r1, sp, #0xc
	add r2, sp, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	ldr r1, [sp, #0x2c]
	str r0, [r1]
	ldr r1, [sp, #0x28]
	lsl r1, r1, #0xc
	cmp r0, r1
	bge _021E8768
	add sp, #0x24
	mov r0, #1
	pop {pc}
_021E8768:
	mov r0, #0
	add sp, #0x24
	pop {pc}
	.balign 4, 0
	thumb_func_end ov96_021E872C

	thumb_func_start ov96_021E8770
ov96_021E8770: ; 0x021E8770
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r7, r1, #0
	ldr r0, [sp, #0x18]
	mov r1, #8
	str r2, [sp]
	add r5, r3, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r0, #0
	strh r5, [r4]
	strh r0, [r4, #2]
	str r0, [r4, #4]
	cmp r5, #1
	bne _021E879C
	ldr r2, [sp]
	add r0, r6, #0
	add r1, r7, #0
	bl sub_0203410C
	b _021E87AA
_021E879C:
	ldr r2, [sp]
	ldr r3, [sp, #0x18]
	add r0, r6, #0
	add r1, r7, #0
	bl ov96_021E883C
	str r0, [r4, #4]
_021E87AA:
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8770

	thumb_func_start ov96_021E87B0
ov96_021E87B0: ; 0x021E87B0
	strh r1, [r0, #2]
	bx lr
	thumb_func_end ov96_021E87B0

	thumb_func_start ov96_021E87B4
ov96_021E87B4: ; 0x021E87B4
	push {r3, r4, r5, r6, r7, lr}
	add r4, r3, #0
	add r6, r0, #0
	ldrh r0, [r4, #2]
	add r7, r1, #0
	add r5, r2, #0
	cmp r0, #0
	beq _021E87CC
	cmp r5, #0x26
	ble _021E87CC
	bl GF_AssertFail
_021E87CC:
	ldrh r0, [r4]
	cmp r0, #1
	bne _021E87DE
	add r0, r6, #0
	add r1, r7, #0
	add r2, r5, #0
	bl sub_02037030
	pop {r3, r4, r5, r6, r7, pc}
_021E87DE:
	ldr r0, [r4, #4]
	add r1, r6, #0
	add r2, r7, #0
	add r3, r5, #0
	bl ov96_021E8914
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E87B4

	thumb_func_start ov96_021E87EC
ov96_021E87EC: ; 0x021E87EC
	push {r3, r4, r5, r6, r7, lr}
	add r6, r3, #0
	ldrh r3, [r6]
	add r5, r0, #0
	add r4, r1, #0
	add r7, r2, #0
	cmp r3, #1
	bne _021E8802
	bl sub_02036FD8
	pop {r3, r4, r5, r6, r7, pc}
_021E8802:
	ldr r0, [r6, #4]
	add r1, r5, #0
	add r2, r4, #0
	add r3, r7, #0
	bl ov96_021E8988
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E87EC

	thumb_func_start ov96_021E8810
ov96_021E8810: ; 0x021E8810
	push {r4, lr}
	add r4, r0, #0
	ldrh r0, [r4]
	cmp r0, #0
	bne _021E8820
	ldr r0, [r4, #4]
	bl ov96_021E88FC
_021E8820:
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	thumb_func_end ov96_021E8810

	thumb_func_start ov96_021E8828
ov96_021E8828: ; 0x021E8828
	push {r3, lr}
	ldrh r0, [r0]
	cmp r0, #1
	bne _021E8836
	bl sub_0203769C
	pop {r3, pc}
_021E8836:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8828

	thumb_func_start ov96_021E883C
ov96_021E883C: ; 0x021E883C
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0x1d
	add r5, r0, #0
	add r0, r3, #0
	lsl r1, r1, #4
	add r7, r2, #0
	bl AllocFromHeap
	mov r2, #0x1d
	mov r1, #0
	lsl r2, r2, #4
	add r4, r0, #0
	bl memset
	mov r1, #7
	lsl r1, r1, #6
	str r5, [r4, r1]
	add r0, r1, #4
	str r6, [r4, r0]
	add r1, #8
	str r7, [r4, r1]
	ldr r0, _021E887C ; =ov96_021E8884
	ldr r2, _021E8880 ; =0x00001388
	add r1, r4, #0
	bl sub_0200E374
	mov r1, #0x73
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E887C: .word ov96_021E8884
_021E8880: .word 0x00001388
	thumb_func_end ov96_021E883C

	thumb_func_start ov96_021E8884
ov96_021E8884: ; 0x021E8884
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r1, #0
	mov r0, #0
	str r0, [sp]
	add r6, r7, #0
_021E8890:
	ldr r0, [r6]
	cmp r0, #1
	bne _021E88EA
	ldr r1, [r6, #0x30]
	cmp r1, #0x26
	bgt _021E88BE
	mov r4, #7
	lsl r4, r4, #6
	ldr r4, [r7, r4]
	mov r3, #0x72
	str r4, [sp, #4]
	ldr r4, [r6, #4]
	mov r5, #0xc
	mul r5, r4
	ldr r4, [sp, #4]
	lsl r3, r3, #2
	add r2, r6, #0
	ldr r3, [r7, r3]
	ldr r4, [r4, r5]
	mov r0, #0
	add r2, #8
	blx r4
	b _021E88E0
_021E88BE:
	mov r4, #7
	lsl r4, r4, #6
	ldr r4, [r7, r4]
	mov r3, #0x72
	mov ip, r4
	ldr r4, [r6, #4]
	mov r5, #0xc
	mul r5, r4
	str r5, [sp, #8]
	lsl r3, r3, #2
	ldr r4, [sp, #8]
	mov r5, ip
	ldr r2, [r6, #0x34]
	ldr r3, [r7, r3]
	ldr r4, [r5, r4]
	mov r0, #0
	blx r4
_021E88E0:
	add r0, r6, #0
	mov r1, #0
	mov r2, #0x38
	bl memset
_021E88EA:
	ldr r0, [sp]
	add r6, #0x38
	add r0, r0, #1
	str r0, [sp]
	cmp r0, #8
	blt _021E8890
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8884

	thumb_func_start ov96_021E88FC
ov96_021E88FC: ; 0x021E88FC
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x73
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl sub_0200E390
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E88FC

	thumb_func_start ov96_021E8914
ov96_021E8914: ; 0x021E8914
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	mov r4, #0
	str r2, [sp]
	add r7, r1, #0
	add r5, r3, #0
	add r0, r4, #0
	add r2, r6, #0
_021E8924:
	ldr r1, [r2]
	cmp r1, #0
	bne _021E8932
	mov r1, #0x38
	mul r1, r0
	add r4, r6, r1
	b _021E893A
_021E8932:
	add r0, r0, #1
	add r2, #0x38
	cmp r0, #8
	blt _021E8924
_021E893A:
	cmp r4, #0
	bne _021E8942
	bl GF_AssertFail
_021E8942:
	mov r0, #7
	lsl r0, r0, #6
	add r1, r7, #0
	ldr r2, [r6, r0]
	sub r1, #0x16
	mov r0, #0xc
	mul r0, r1
	add r0, r2, r0
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _021E8962
	blx r0
	cmp r0, r5
	beq _021E8962
	bl GF_AssertFail
_021E8962:
	cmp r5, #0x26
	ble _021E896A
	bl GF_AssertFail
_021E896A:
	sub r7, #0x16
	str r7, [r4, #4]
	cmp r5, #0
	ble _021E897E
	add r0, r4, #0
	ldr r1, [sp]
	add r0, #8
	add r2, r5, #0
	bl memcpy
_021E897E:
	str r5, [r4, #0x30]
	mov r0, #1
	str r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8914

	thumb_func_start ov96_021E8988
ov96_021E8988: ; 0x021E8988
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	str r2, [sp, #4]
	mov r4, #0
	str r1, [sp]
	add r6, r3, #0
	add r1, r4, #0
	add r2, r5, #0
_021E899A:
	ldr r0, [r2]
	cmp r0, #0
	bne _021E89A8
	mov r0, #0x38
	mul r0, r1
	add r4, r5, r0
	b _021E89B0
_021E89A8:
	add r1, r1, #1
	add r2, #0x38
	cmp r1, #8
	blt _021E899A
_021E89B0:
	cmp r4, #0
	bne _021E89B8
	bl GF_AssertFail
_021E89B8:
	ldr r1, [sp]
	mov r0, #0xc
	sub r1, #0x16
	add r7, r1, #0
	mul r7, r0
	mov r0, #7
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	add r0, r0, r7
	ldr r0, [r0, #4]
	blx r0
	ldr r1, _021E8A1C ; =0x0000FFFF
	cmp r0, r1
	beq _021E89DC
	cmp r0, r6
	beq _021E89DC
	bl GF_AssertFail
_021E89DC:
	mov r1, #7
	lsl r1, r1, #6
	ldr r0, [r5, r1]
	add r0, r0, r7
	ldr r3, [r0, #8]
	cmp r3, #0
	beq _021E8A06
	add r1, #8
	ldr r1, [r5, r1]
	mov r0, #0
	add r2, r6, #0
	blx r3
	add r5, r0, #0
	cmp r6, #0
	ble _021E8A02
	ldr r1, [sp, #4]
	add r2, r6, #0
	bl memcpy
_021E8A02:
	str r5, [r4, #0x34]
	b _021E8A0A
_021E8A06:
	ldr r0, [sp, #4]
	str r0, [r4, #0x34]
_021E8A0A:
	ldr r0, [sp]
	sub r0, #0x16
	str r0, [r4, #4]
	str r0, [sp]
	str r6, [r4, #0x30]
	mov r0, #1
	str r0, [r4]
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E8A1C: .word 0x0000FFFF
	thumb_func_end ov96_021E8988

	thumb_func_start ov96_021E8A20
ov96_021E8A20: ; 0x021E8A20
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E8A20

	thumb_func_start ov96_021E8A24
ov96_021E8A24: ; 0x021E8A24
	ldr r0, _021E8A28 ; =0x0221AEC4
	bx lr
	.balign 4, 0
_021E8A28: .word 0x0221AEC4
	thumb_func_end ov96_021E8A24

	thumb_func_start ov96_021E8A2C
ov96_021E8A2C: ; 0x021E8A2C
	mov r0, #0xc
	bx lr
	thumb_func_end ov96_021E8A2C

	thumb_func_start ov96_021E8A30
ov96_021E8A30: ; 0x021E8A30
	push {r4, lr}
	ldr r1, _021E8A40 ; =0x00000958
	add r4, r0, #0
	bl AllocFromHeap
	str r4, [r0]
	pop {r4, pc}
	nop
_021E8A40: .word 0x00000958
	thumb_func_end ov96_021E8A30

	thumb_func_start ov96_021E8A44
ov96_021E8A44: ; 0x021E8A44
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r6, r0, #0
	add r5, r2, #0
	cmp r4, #0x10
	bls _021E8A54
	bl GF_AssertFail
_021E8A54:
	strh r4, [r6, #4]
	mov r0, #0
	strh r0, [r6, #6]
	str r0, [r6, #0xc]
	str r0, [r6, #8]
	mov r1, #0x2c
	ldr r0, [r6]
	mul r1, r4
	bl AllocFromHeap
	mov r1, #0x55
	lsl r1, r1, #2
	str r0, [r6, r1]
	cmp r5, #0
	bne _021E8A86
	ldrh r0, [r6, #4]
	add r1, r6, #0
	ldr r2, [r6]
	add r1, #0x1c
	bl sub_02009F40
	str r0, [r6, #0x14]
	str r0, [r6, #0x18]
	mov r0, #1
	b _021E8A8A
_021E8A86:
	str r5, [r6, #0x18]
	mov r0, #0
_021E8A8A:
	mov r7, #0x51
	str r0, [r6, #0x10]
	mov r4, #0
	add r5, r6, #0
	lsl r7, r7, #2
_021E8A94:
	ldrh r0, [r6, #4]
	ldr r2, [r6]
	add r1, r4, #0
	bl sub_0200A090
	str r0, [r5, r7]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _021E8A94
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8A44

	thumb_func_start ov96_021E8AAC
ov96_021E8AAC: ; 0x021E8AAC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldrh r0, [r5, #4]
	mov r4, #0
	cmp r0, #0
	ble _021E8AE4
	mov r7, #0x55
	lsl r7, r7, #2
_021E8ABC:
	mov r0, #0x2c
	add r6, r4, #0
	mul r6, r0
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	ldr r0, [r0, r6]
	bl sub_0200AEB0
	ldr r0, [r5, r7]
	add r0, r0, r6
	ldr r0, [r0, #4]
	bl sub_0200B0A8
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldrh r0, [r5, #4]
	cmp r4, r0
	blt _021E8ABC
_021E8AE4:
	mov r6, #0x51
	mov r4, #0
	lsl r6, r6, #2
_021E8AEA:
	lsl r0, r4, #2
	add r0, r5, r0
	ldr r0, [r0, r6]
	bl sub_0200A0D0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021E8AEA
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl FreeToHeap
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _021E8B14
	ldr r0, [r5, #0x14]
	bl sub_02024504
_021E8B14:
	add r0, r5, #0
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E8AAC

	thumb_func_start ov96_021E8B1C
ov96_021E8B1C: ; 0x021E8B1C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r7, r1, #0
	mov r1, #0x55
	ldr r0, [r5]
	lsl r1, r1, #2
	add r6, r2, #0
	add r4, r3, #0
	bl AllocFromHeapAtEnd
	strh r7, [r0]
	add r2, r0, #0
	mov ip, r0
	str r5, [r0, #0xc]
	add r2, #0x10
	mov r3, #8
_021E8B3C:
	ldmia r4!, {r0, r1}
	stmia r2!, {r0, r1}
	sub r3, r3, #1
	bne _021E8B3C
	ldr r0, [r4]
	mov r4, #0
	str r0, [r2]
	mov r0, ip
	str r4, [r0, #8]
	ldr r1, [sp, #0x1c]
	mov r0, ip
	str r1, [r0, #4]
	mov r0, ip
	strh r4, [r0, #2]
	str r4, [r5, #0xc]
	cmp r7, #0
	ble _021E8B78
	mov r5, ip
_021E8B60:
	add r2, r5, #0
	add r3, r6, #0
	add r2, #0x54
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	add r4, r4, #1
	stmia r2!, {r0, r1}
	add r6, #0x10
	add r5, #0x10
	cmp r4, r7
	blt _021E8B60
_021E8B78:
	ldr r0, _021E8B84 ; =ov96_021E8FB4
	ldr r2, [sp, #0x18]
	mov r1, ip
	bl sub_0200E320
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021E8B84: .word ov96_021E8FB4
	thumb_func_end ov96_021E8B1C

	thumb_func_start ov96_021E8B88
ov96_021E8B88: ; 0x021E8B88
	ldr r0, [r0, #0xc]
	bx lr
	thumb_func_end ov96_021E8B88

	thumb_func_start ov96_021E8B8C
ov96_021E8B8C: ; 0x021E8B8C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldrh r0, [r5, #4]
	add r4, r1, #0
	cmp r4, r0
	blt _021E8B9C
	bl GF_AssertFail
_021E8B9C:
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	mov r0, #0x2c
	mul r0, r4
	add r0, r1, r0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8B8C

	thumb_func_start ov96_021E8BAC
ov96_021E8BAC: ; 0x021E8BAC
	ldr r0, [r0, #0x10]
	bx lr
	thumb_func_end ov96_021E8BAC

	thumb_func_start ov96_021E8BB0
ov96_021E8BB0: ; 0x021E8BB0
	add r0, #0x14
	bx lr
	thumb_func_end ov96_021E8BB0

	thumb_func_start ov96_021E8BB4
ov96_021E8BB4: ; 0x021E8BB4
	push {r4, r5, r6, lr}
	add r4, r0, #0
	add r5, r1, #0
	add r6, r2, #0
	ldrh r0, [r4]
	ldrh r1, [r4, #2]
	ldrb r2, [r4, #7]
	bl ov96_021E91B8
	add r1, r0, #0
	mov r0, #0x51
	add r2, r5, #0
	bl AllocAndReadWholeNarcMemberByIdPair
	add r5, r0, #0
	bl NNS_G3dGetTex
	ldr r1, [r0, #0x38]
	add r0, r0, r1
	ldrb r1, [r4, #6]
	cmp r1, #0
	beq _021E8BE2
	add r0, #0x20
_021E8BE2:
	add r1, r6, #0
	mov r2, #0x20
	bl MIi_CpuCopy8
	add r0, r5, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8BB4

	thumb_func_start ov96_021E8BF4
ov96_021E8BF4: ; 0x021E8BF4
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r6, r0, #0
	add r7, r3, #0
	str r4, [sp]
	cmp r2, #3
	bne _021E8C08
	mov r4, #1
	str r4, [sp]
	b _021E8C14
_021E8C08:
	cmp r2, #1
	bne _021E8C12
	mov r0, #1
	str r0, [sp]
	b _021E8C14
_021E8C12:
	mov r4, #1
_021E8C14:
	mov r0, #0x2c
	add r5, r1, #0
	mul r5, r0
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	ldr r0, [r0, r5]
	bl sub_0200AF00
	add r1, r0, #0
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	add r0, r0, r5
	ldr r0, [r0, #4]
	bl sub_0200B0F8
	add r5, r0, #0
	add r0, r7, #0
	mov r1, #0x20
	bl DC_FlushRange
	ldr r0, [sp]
	cmp r0, #0
	beq _021E8C58
	add r0, r5, #0
	mov r1, #1
	bl sub_020B8078
	add r1, r0, #0
	add r0, r7, #0
	mov r2, #0x20
	bl GX_LoadOBJPltt
_021E8C58:
	cmp r4, #0
	beq _021E8C6E
	add r0, r5, #0
	mov r1, #2
	bl sub_020B8078
	add r1, r0, #0
	add r0, r7, #0
	mov r2, #0x20
	bl GXS_LoadOBJPltt
_021E8C6E:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E8BF4

	thumb_func_start ov96_021E8C70
ov96_021E8C70: ; 0x021E8C70
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x48
	add r5, r0, #0
	ldr r0, [sp, #0x64]
	add r4, r1, #0
	add r6, r3, #0
	str r2, [sp, #0x10]
	str r0, [sp, #0x64]
	cmp r0, #0
	beq _021E8CA4
	add r0, r2, #0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021E8C98
	mov r0, #0xa
	str r0, [sp, #0x44]
	mov r0, #9
	mov r2, #0xb
	str r0, [sp, #0x40]
	b _021E8CC2
_021E8C98:
	mov r0, #7
	str r0, [sp, #0x44]
	mov r0, #6
	mov r2, #8
	str r0, [sp, #0x40]
	b _021E8CC2
_021E8CA4:
	add r0, r2, #0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021E8CB8
	mov r0, #4
	str r0, [sp, #0x44]
	mov r0, #3
	mov r2, #5
	str r0, [sp, #0x40]
	b _021E8CC2
_021E8CB8:
	mov r0, #1
	str r0, [sp, #0x44]
	mov r0, #0
	mov r2, #2
	str r0, [sp, #0x40]
_021E8CC2:
	add r0, sp, #0x50
	ldrb r7, [r0, #0x10]
	mov r1, #0x95
	mov r3, #0
	str r7, [sp]
	str r6, [sp, #4]
	ldr r0, [r5]
	str r0, [sp, #8]
	mov r0, #0x51
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_0200A1D8
	str r0, [r4]
	str r7, [sp]
	str r6, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5]
	mov r1, #0x31
	str r0, [sp, #0xc]
	mov r0, #0x52
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r2, #0x1e
	mov r3, #0
	bl sub_0200A234
	str r0, [r4, #4]
	str r7, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5]
	ldr r2, [sp, #0x44]
	str r0, [sp, #8]
	mov r0, #0x53
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #0x95
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #8]
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r5]
	ldr r2, [sp, #0x40]
	str r0, [sp, #8]
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	mov r1, #0x95
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0xc]
	ldr r0, [r4]
	bl sub_0200ADA4
	ldr r0, [r4, #4]
	bl sub_0200AF94
	mov r0, #0
	str r0, [sp, #0x1c]
	str r0, [sp, #0x18]
	ldr r0, [r4]
	bl sub_0200AF00
	str r0, [sp, #0x24]
	ldr r0, [r4, #4]
	ldr r1, [sp, #0x24]
	bl sub_0200B0F8
	str r0, [sp, #0x28]
	ldr r0, [r4]
	bl sub_0200A810
	str r0, [sp, #0x20]
	cmp r6, #3
	bne _021E8D6C
	mov r0, #1
	str r0, [sp, #0x1c]
	str r0, [sp, #0x18]
	b _021E8D7A
_021E8D6C:
	cmp r6, #1
	bne _021E8D76
	mov r0, #1
	str r0, [sp, #0x1c]
	b _021E8D7A
_021E8D76:
	mov r0, #1
	str r0, [sp, #0x18]
_021E8D7A:
	ldr r0, [sp, #0x10]
	ldr r1, [sp, #0x10]
	ldr r2, [sp, #0x10]
	ldrh r0, [r0]
	ldrh r1, [r1, #2]
	ldrb r2, [r2, #7]
	bl ov96_021E91B8
	add r1, r0, #0
	ldr r2, [r5]
	mov r0, #0x51
	bl AllocAndReadWholeNarcMemberByIdPair
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x10]
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021E8DAA
	mov r0, #2
	lsl r0, r0, #0xa
	str r0, [sp, #0x14]
	mov r0, #8
	str r0, [sp, #0x3c]
	b _021E8DB4
_021E8DAA:
	mov r0, #2
	lsl r0, r0, #8
	str r0, [sp, #0x14]
	mov r0, #4
	str r0, [sp, #0x3c]
_021E8DB4:
	ldr r0, [sp, #0x34]
	bl NNS_G3dGetTex
	ldr r1, [r0, #0x14]
	str r0, [sp, #0x2c]
	add r0, r0, r1
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x3c]
	mov r4, #0
	lsl r1, r0, #5
	mov r0, #2
	lsl r0, r0, #0xa
	str r4, [sp, #0x38]
	sub r7, r0, r1
	add r6, r5, r1
_021E8DD2:
	ldr r0, [sp, #0x3c]
	mov r2, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x56
	lsl r0, r0, #2
	add r0, r5, r0
	str r0, [sp, #8]
	ldr r0, [sp, #0x30]
	ldr r1, [sp, #0x3c]
	add r0, r0, r4
	add r3, r2, #0
	bl sub_020145B4
	ldr r0, [sp, #0x64]
	cmp r0, #0
	bne _021E8E72
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021E8E2A
	ldr r0, [sp, #0x10]
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021E8E2A
	mov r0, #0
_021E8E04:
	cmp r0, r7
	bge _021E8E16
	mov r1, #0x56
	add r2, r6, r0
	lsl r1, r1, #2
	ldrb r3, [r2, r1]
	add r2, r5, r0
	strb r3, [r2, r1]
	b _021E8E20
_021E8E16:
	mov r2, #0x56
	add r3, r5, r0
	lsl r2, r2, #2
	mov r1, #0
	strb r1, [r3, r2]
_021E8E20:
	mov r1, #2
	add r0, r0, #1
	lsl r1, r1, #0xa
	cmp r0, r1
	blt _021E8E04
_021E8E2A:
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r1, [sp, #0x14]
	add r0, r5, r0
	bl DC_FlushRange
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	beq _021E8E54
	ldr r0, [sp, #0x24]
	mov r1, #1
	bl sub_020B802C
	add r1, r0, #0
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r2, [sp, #0x14]
	add r0, r5, r0
	add r1, r1, r4
	bl sub_020CFE74
_021E8E54:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _021E8E72
	ldr r0, [sp, #0x24]
	mov r1, #2
	bl sub_020B802C
	add r1, r0, #0
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r2, [sp, #0x14]
	add r0, r5, r0
	add r1, r1, r4
	bl sub_020CFECC
_021E8E72:
	ldr r1, [sp, #0x20]
	mov r0, #0x56
	ldr r1, [r1, #0x14]
	lsl r0, r0, #2
	ldr r2, [sp, #0x14]
	add r0, r5, r0
	add r1, r1, r4
	bl sub_020D48B4
	ldr r0, [sp, #0x14]
	add r4, r4, r0
	ldr r0, [sp, #0x38]
	add r0, r0, #1
	str r0, [sp, #0x38]
	cmp r0, #8
	blt _021E8DD2
	ldr r0, [sp, #0x2c]
	ldr r1, [r0, #0x38]
	add r4, r0, r1
	ldr r0, [sp, #0x10]
	ldrb r0, [r0, #6]
	cmp r0, #0
	beq _021E8EA2
	add r4, #0x20
_021E8EA2:
	add r0, r4, #0
	mov r1, #0x20
	bl DC_FlushRange
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	beq _021E8EC2
	ldr r0, [sp, #0x28]
	mov r1, #1
	bl sub_020B8078
	add r1, r0, #0
	add r0, r4, #0
	mov r2, #0x20
	bl GX_LoadOBJPltt
_021E8EC2:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _021E8EDA
	ldr r0, [sp, #0x28]
	mov r1, #2
	bl sub_020B8078
	add r1, r0, #0
	add r0, r4, #0
	mov r2, #0x20
	bl GXS_LoadOBJPltt
_021E8EDA:
	ldr r0, [sp, #0x34]
	bl FreeToHeap
	add sp, #0x48
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E8C70

	thumb_func_start ov96_021E8EE4
ov96_021E8EE4: ; 0x021E8EE4
	push {r3, r4, r5, lr}
	sub sp, #0x80
	add r4, r0, #0
	add r0, sp, #0x80
	add r5, r3, #0
	ldrb r3, [r0, #0x10]
	mov r0, #0
	mvn r0, r0
	str r3, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	str r2, [sp, #0xc]
	str r1, [sp, #0x10]
	mov r1, #0x51
	lsl r1, r1, #2
	ldr r0, [r4, r1]
	add r2, r3, #0
	str r0, [sp, #0x14]
	add r0, r1, #4
	ldr r0, [r4, r0]
	str r0, [sp, #0x18]
	add r0, r1, #0
	add r0, #8
	ldr r0, [r4, r0]
	add r1, #0xc
	str r0, [sp, #0x1c]
	ldr r0, [r4, r1]
	add r1, r3, #0
	str r0, [sp, #0x20]
	mov r0, #0
	str r0, [sp, #0x24]
	str r0, [sp, #0x28]
	add r0, sp, #0x5c
	bl sub_02009D48
	cmp r5, #3
	bne _021E8F30
	mov r5, #1
_021E8F30:
	ldr r0, [r4, #0x18]
	mov r1, #0
	str r0, [sp, #0x2c]
	add r0, sp, #0x5c
	str r0, [sp, #0x30]
	ldr r0, [r4]
	str r0, [sp, #0x58]
	mov r0, #1
	lsl r0, r0, #0xc
	str r1, [sp, #0x34]
	str r1, [sp, #0x38]
	str r1, [sp, #0x3c]
	str r0, [sp, #0x40]
	str r0, [sp, #0x44]
	str r0, [sp, #0x48]
	add r0, sp, #0x2c
	strh r1, [r0, #0x20]
	str r5, [sp, #0x54]
	add r0, sp, #0x80
	str r1, [sp, #0x50]
	ldrb r1, [r0, #0x14]
	mov r0, #0x2c
	add r5, r1, #0
	mul r5, r0
	add r0, sp, #0x2c
	bl sub_02024624
	mov r1, #0x55
	lsl r1, r1, #2
	ldr r2, [r4, r1]
	add r2, r2, r5
	str r0, [r2, #0x10]
	ldr r0, [r4, r1]
	add r0, r0, r5
	ldr r0, [r0, #0x10]
	cmp r0, #0
	bne _021E8F7E
	bl GF_AssertFail
_021E8F7E:
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	add r0, r0, r5
	ldr r0, [r0, #0x10]
	bl sub_0202484C
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0
	add r0, r0, r5
	ldr r0, [r0, #0x10]
	bl sub_020248F0
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0
	add r0, r0, r5
	ldr r0, [r0, #0x10]
	bl sub_02024830
	add sp, #0x80
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8EE4

	thumb_func_start ov96_021E8FB4
ov96_021E8FB4: ; 0x021E8FB4
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
_021E8FBA:
	add r0, r4, #0
	bl ov96_021E8FE0
	cmp r0, #0
	beq _021E8FD8
	ldr r0, [r4, #0xc]
	mov r1, #1
	str r1, [r0, #0xc]
	add r0, r4, #0
	bl FreeToHeap
	add r0, r5, #0
	bl sub_0200E390
	pop {r3, r4, r5, pc}
_021E8FD8:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	bne _021E8FBA
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E8FB4

	thumb_func_start ov96_021E8FE0
ov96_021E8FE0: ; 0x021E8FE0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021E8FF2
	cmp r0, #1
	beq _021E90BE
	b _021E90F4
_021E8FF2:
	ldrh r0, [r5, #2]
	ldr r1, [r5, #4]
	add r2, r5, #0
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	mov r0, #0x2c
	add r4, r7, #0
	mul r4, r0
	ldr r0, [r5, #0xc]
	lsl r6, r7, #4
	str r7, [sp]
	ldr r1, [r5, #0x18]
	add r2, #0x54
	str r1, [sp, #4]
	mov r1, #0x55
	lsl r1, r1, #2
	ldr r1, [r0, r1]
	ldr r3, [r5, #0x1c]
	add r1, r1, r4
	add r2, r2, r6
	bl ov96_021E8C70
	mov r0, #0x55
	add r3, r5, r6
	ldr r1, [r5, #0xc]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r3, #0x54
	add r2, r0, r4
	add r2, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	mov r0, #0x55
	ldr r1, [r5, #0xc]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r0, r0, r4
	bl ov96_021E9104
	mov r1, #0x55
	ldr r2, [r5, #0xc]
	lsl r1, r1, #2
	ldr r1, [r2, r1]
	add r1, r1, r4
	str r0, [r1, #0x24]
	ldr r2, [r5, #0xc]
	mov r1, #0
	ldr r0, [r2, #8]
	cmp r0, #0
	beq _021E9068
	add r0, r5, r6
	add r0, #0x58
	ldrh r0, [r0]
	cmp r0, #0
	beq _021E9068
	mov r1, #1
_021E9068:
	mov r3, #0x55
	lsl r3, r3, #2
	mov r0, #0x2c
	ldr r2, [r2, r3]
	mul r0, r7
	add r2, r2, r0
	str r1, [r2, #0x28]
	ldr r1, [r5, #0xc]
	ldr r1, [r1, r3]
	add r0, r1, r0
	ldr r0, [r0, #0x28]
	cmp r0, #0
	beq _021E908A
	add r1, #0x24
	ldr r0, [r1, r4]
	add r0, #8
	str r0, [r1, r4]
_021E908A:
	ldr r0, [r5, #0x18]
	cmp r0, #0
	bne _021E90A6
	mov r0, #0x55
	ldr r1, [r5, #0xc]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r6, r0, r4
	ldr r0, [r0, r4]
	bl sub_0200A740
	ldr r0, [r6, #4]
	bl sub_0200A740
_021E90A6:
	ldrh r0, [r5, #2]
	add r0, r0, #1
	strh r0, [r5, #2]
	ldrh r1, [r5, #2]
	ldrh r0, [r5]
	cmp r1, r0
	blo _021E90F4
	mov r0, #0
	strh r0, [r5, #2]
	mov r0, #1
	str r0, [r5, #8]
	b _021E90F4
_021E90BE:
	ldrh r0, [r5, #2]
	ldr r1, [r5, #4]
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	ldr r1, [r5, #0x14]
	ldr r2, [r5, #0x18]
	ldr r3, [r5, #0x20]
	bl ov96_021E8EE4
	ldrh r0, [r5, #2]
	add r0, r0, #1
	strh r0, [r5, #2]
	ldr r1, [r5, #0xc]
	ldrh r0, [r1, #6]
	add r0, r0, #1
	strh r0, [r1, #6]
	ldrh r1, [r5, #2]
	ldrh r0, [r5]
	cmp r1, r0
	blo _021E90F4
	add sp, #8
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021E90F4:
	mov r0, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E8FE0

	thumb_func_start ov96_021E90FC
ov96_021E90FC: ; 0x021E90FC
	ldr r0, [r0, #0x24]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	thumb_func_end ov96_021E90FC

	thumb_func_start ov96_021E9104
ov96_021E9104: ; 0x021E9104
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r0, #0
	ldr r0, [r4]
	bl sub_0200A810
	ldrh r1, [r4, #0x18]
	cmp r1, #0
	beq _021E911A
	mov r6, #8
	b _021E911C
_021E911A:
	mov r6, #4
_021E911C:
	mov r1, #0xff
	str r1, [sp, #8]
	ldr r0, [r0, #0x14]
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	cmp r6, #0
	ble _021E916E
	add r7, r0, #0
_021E912E:
	mov r4, #0xff
	mov r5, #0
	cmp r6, #0
	ble _021E9150
_021E9136:
	add r1, r5, r7
	ldr r0, [sp]
	lsl r1, r1, #5
	bl ov96_021E9180
	cmp r0, #0xff
	beq _021E914A
	cmp r4, r0
	bls _021E914A
	add r4, r0, #0
_021E914A:
	add r5, r5, #1
	cmp r5, r6
	blt _021E9136
_021E9150:
	cmp r4, #0xff
	beq _021E9162
	ldr r0, [sp, #4]
	lsl r0, r0, #3
	add r0, r4, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	b _021E916E
_021E9162:
	ldr r0, [sp, #4]
	add r7, r7, r6
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, r6
	blt _021E912E
_021E916E:
	ldr r0, [sp, #8]
	cmp r0, #0xff
	bne _021E9178
	bl GF_AssertFail
_021E9178:
	ldr r0, [sp, #8]
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9104

	thumb_func_start ov96_021E9180
ov96_021E9180: ; 0x021E9180
	push {r4, r5}
	mov r4, #0
	mov r2, #0xff
	add r0, r0, r1
	add r3, r4, #0
_021E918A:
	add r5, r3, #0
_021E918C:
	ldrb r1, [r0]
	cmp r1, #0
	beq _021E9196
	add r2, r4, #0
	b _021E91A2
_021E9196:
	add r1, r5, #1
	lsl r1, r1, #0x18
	lsr r5, r1, #0x18
	add r0, r0, #1
	cmp r5, #4
	blo _021E918C
_021E91A2:
	cmp r5, #4
	bne _021E91B0
	add r1, r4, #1
	lsl r1, r1, #0x18
	lsr r4, r1, #0x18
	cmp r4, #8
	blo _021E918A
_021E91B0:
	add r0, r2, #0
	pop {r4, r5}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E9180

	thumb_func_start ov96_021E91B8
ov96_021E91B8: ; 0x021E91B8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	cmp r5, #0
	ble _021E91CA
	ldr r1, _021E91FC ; =0x000001ED
	cmp r5, r1
	ble _021E91CE
_021E91CA:
	mov r4, #1
	b _021E91F6
_021E91CE:
	bl sub_0206A304
	ldr r1, _021E9200 ; =0x00000129
	add r4, r0, r1
	add r0, r5, #0
	bl sub_0206A338
	cmp r0, #0
	beq _021E91E8
	cmp r7, #1
	bne _021E91F6
	add r4, r4, #1
	b _021E91F6
_021E91E8:
	add r0, r5, #0
	bl sub_0206A310
	cmp r6, r0
	ble _021E91F4
	mov r6, #0
_021E91F4:
	add r4, r4, r6
_021E91F6:
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021E91FC: .word 0x000001ED
_021E9200: .word 0x00000129
	thumb_func_end ov96_021E91B8

	thumb_func_start ov96_021E9204
ov96_021E9204: ; 0x021E9204
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r4, r2, #0
	add r2, sp, #0
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	bl ov96_021E8BAC
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #0
	bl _fgr
	ldr r0, _021E928C ; =0x45800000
	bls _021E923A
	add r1, r5, #0
	bl _fmul
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _021E9248
_021E923A:
	add r1, r5, #0
	bl _fmul
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_021E9248:
	bl _ftoi
	str r0, [sp]
	add r0, r4, #0
	mov r1, #0
	bl _fgr
	ldr r0, _021E928C ; =0x45800000
	bls _021E926C
	add r1, r4, #0
	bl _fmul
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _021E927A
_021E926C:
	add r1, r4, #0
	bl _fmul
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_021E927A:
	bl _ftoi
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, sp, #0
	bl sub_020247F4
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021E928C: .word 0x45800000
	thumb_func_end ov96_021E9204

	thumb_func_start ov96_021E9290
ov96_021E9290: ; 0x021E9290
	push {r4, lr}
	add r4, r0, #0
	bne _021E929A
	bl GF_AssertFail
_021E929A:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	beq _021E92A4
	bl GF_AssertFail
_021E92A4:
	mov r0, #1
	str r0, [r4, #8]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9290

	thumb_func_start ov96_021E92AC
ov96_021E92AC: ; 0x021E92AC
	ldr r0, [r0, #0x28]
	bx lr
	thumb_func_end ov96_021E92AC

	thumb_func_start ov96_021E92B0
ov96_021E92B0: ; 0x021E92B0
	push {r3, r4, r5, lr}
	add r4, r2, #0
	add r5, r1, #0
	ldr r2, [sp, #0x10]
	add r1, r3, #0
	bl sub_020215C0
	add r0, r5, #0
	add r1, r4, #0
	bl sub_02022588
	bl sub_020216C8
	bl sub_02022638
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E92B0

	thumb_func_start ov96_021E92D0
ov96_021E92D0: ; 0x021E92D0
	push {r3, lr}
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	pop {r3, pc}
	thumb_func_end ov96_021E92D0

	thumb_func_start ov96_021E92E0
ov96_021E92E0: ; 0x021E92E0
	push {r3, r4, r5, r6, r7, lr}
	mov r1, #0x85
	lsl r1, r1, #2
	add r5, r0, #0
	bl AllocFromHeap
	mov r2, #0x85
	mov r1, #0
	lsl r2, r2, #2
	str r0, [sp]
	bl MIi_CpuFill8
	ldr r4, [sp]
	mov r6, #0
	mov r7, #0x25
_021E92FE:
	add r0, r7, #0
	add r1, r5, #0
	bl String_ctor
	str r0, [r4, #0x34]
	mov r0, #0xb
	add r1, r5, #0
	bl String_ctor
	str r0, [r4, #0x38]
	add r6, r6, #1
	add r4, #0x18
	cmp r6, #0xc
	blt _021E92FE
	ldr r0, [sp]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E92E0

	thumb_func_start ov96_021E9320
ov96_021E9320: ; 0x021E9320
	push {r4, r5, r6, lr}
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_021E9328:
	ldr r0, [r5, #0x34]
	bl String_dtor
	ldr r0, [r5, #0x38]
	bl String_dtor
	add r4, r4, #1
	add r5, #0x18
	cmp r4, #0xc
	blt _021E9328
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E9320

	thumb_func_start ov96_021E9344
ov96_021E9344: ; 0x021E9344
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #8]
	cmp r0, #4
	blt _021E9352
	bl GF_AssertFail
_021E9352:
	ldr r1, [r4, #8]
	ldr r0, [r4]
	cmp r1, r0
	blt _021E935E
	bl GF_AssertFail
_021E935E:
	ldr r1, [r4, #8]
	add r0, r1, #1
	str r0, [r4, #8]
	mov r0, #0x18
	add r4, #0x24
	mul r0, r1
	add r0, r4, r0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9344

	thumb_func_start ov96_021E9370
ov96_021E9370: ; 0x021E9370
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	cmp r4, #4
	blo _021E937E
	bl GF_AssertFail
_021E937E:
	ldr r0, [r5]
	cmp r4, r0
	blt _021E9388
	bl GF_AssertFail
_021E9388:
	mov r0, #0x18
	add r5, #0x24
	mul r0, r4
	add r0, r5, r0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9370

	thumb_func_start ov96_021E9394
ov96_021E9394: ; 0x021E9394
	mov r3, #0
	str r3, [r0]
	str r3, [r0, #4]
	str r3, [r0, #8]
	str r3, [r0, #0xc]
	mov r1, #0x51
	str r3, [r0, #0x10]
	add r2, r3, #0
	lsl r1, r1, #2
_021E93A6:
	add r3, r3, #1
	str r2, [r0, r1]
	add r0, r0, #4
	cmp r3, #0xc
	blt _021E93A6
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E9394

	thumb_func_start ov96_021E93B4
ov96_021E93B4: ; 0x021E93B4
	push {r4, r5, r6, r7, lr}
	sub sp, #0xa4
	str r0, [sp]
	add r0, sp, #0x14
	str r0, [sp, #8]
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	cmp r1, #0
	beq _021E93D2
	cmp r1, #1
	beq _021E93D8
	cmp r1, #2
	beq _021E93DE
	b _021E93E4
_021E93D2:
	mov r0, #1
	str r0, [sp, #4]
	b _021E93E8
_021E93D8:
	mov r0, #1
	str r0, [sp, #4]
	b _021E93E8
_021E93DE:
	mov r0, #2
	str r0, [sp, #4]
	b _021E93E8
_021E93E4:
	bl GF_AssertFail
_021E93E8:
	ldr r1, [sp, #4]
	ldr r0, [sp]
	mov r6, #0
	str r1, [r0, #0xc]
	ldr r4, [r0]
	cmp r4, #0
	ble _021E949E
	add r0, #0x24
	mov ip, r0
_021E93FA:
	add r3, r6, #1
	add r2, r3, #0
	mov r0, #0xc
	add r1, sp, #8
	mul r2, r0
	add r0, r1, r2
	mov r3, ip
	mov r7, #0
	str r3, [r0, #8]
	str r7, [r0, #4]
	str r7, [r1, r2]
	cmp r6, #0
	ble _021E9486
_021E9414:
	ldr r2, [sp, #4]
	ldr r1, [r1, #4]
	cmp r2, #1
	ldr r5, [r0, #8]
	bne _021E9450
	ldr r3, [r1, #8]
	ldr r4, [r5, #0xc]
	ldr r2, [r3, #0xc]
	cmp r2, r4
	bge _021E9436
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	b _021E9486
_021E9436:
	cmp r2, r4
	bne _021E9480
	ldr r2, [r3]
	ldr r3, [r5]
	cmp r2, r3
	ble _021E9480
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	b _021E9480
_021E9450:
	ldr r3, [r1, #8]
	ldr r4, [r5, #0xc]
	ldr r2, [r3, #0xc]
	cmp r2, r4
	ble _021E9468
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	b _021E9486
_021E9468:
	cmp r2, r4
	bne _021E9480
	ldr r2, [r3]
	ldr r3, [r5]
	cmp r2, r3
	ble _021E9480
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
_021E9480:
	add r7, r7, #1
	cmp r7, r6
	blt _021E9414
_021E9486:
	cmp r7, r6
	bne _021E948E
	str r0, [r1, #4]
	str r1, [r0]
_021E948E:
	mov r0, ip
	add r0, #0x18
	mov ip, r0
	ldr r0, [sp]
	add r6, r6, #1
	ldr r4, [r0]
	cmp r6, r4
	blt _021E93FA
_021E949E:
	mov r1, #0
	mvn r1, r1
	mov r3, #0
	add r0, sp, #8
	add r2, r1, #0
	add r5, r3, #0
	cmp r4, #0
	ble _021E94E8
	mov r7, #0x51
	ldr r4, [sp]
	lsl r7, r7, #2
_021E94B4:
	ldr r0, [r0, #4]
	ldr r6, [r0, #8]
	str r6, [r4, r7]
	ldr r6, [r0, #8]
	ldr r6, [r6, #0xc]
	cmp r1, r6
	beq _021E94D2
	add r1, r6, #0
	cmp r3, #0
	beq _021E94CE
	add r2, r5, #0
	mov r3, #0
	b _021E94D4
_021E94CE:
	add r2, r2, #1
	b _021E94D4
_021E94D2:
	mov r3, #1
_021E94D4:
	mov r6, #0x51
	lsl r6, r6, #2
	ldr r6, [r4, r6]
	add r5, r5, #1
	strb r2, [r6, #9]
	ldr r6, [sp]
	add r4, r4, #4
	ldr r6, [r6]
	cmp r5, r6
	blt _021E94B4
_021E94E8:
	add sp, #0xa4
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E93B4

	thumb_func_start ov96_021E94EC
ov96_021E94EC: ; 0x021E94EC
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	cmp r4, #4
	blo _021E94FA
	bl GF_AssertFail
_021E94FA:
	ldr r0, [r5]
	cmp r4, r0
	blt _021E9504
	bl GF_AssertFail
_021E9504:
	lsl r0, r4, #2
	add r1, r5, r0
	mov r0, #0x51
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E94EC

	thumb_func_start ov96_021E9510
ov96_021E9510: ; 0x021E9510
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021E9394
	mov r0, #4
	str r0, [r4]
	mov r0, #0
	str r0, [r4, #4]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9510

	thumb_func_start ov96_021E9524
ov96_021E9524: ; 0x021E9524
	ldr r0, [r0]
	bx lr
	thumb_func_end ov96_021E9524

	thumb_func_start ov96_021E9528
ov96_021E9528: ; 0x021E9528
	ldr r0, [r0, #4]
	bx lr
	thumb_func_end ov96_021E9528

	thumb_func_start ov96_021E952C
ov96_021E952C: ; 0x021E952C
	push {r4, r5, r6, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _021E953A
	bl GF_AssertFail
_021E953A:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	bne _021E956C
	ldr r0, [r4]
	mov r2, #0
	cmp r0, #0
	ble _021E9568
	mov r5, #0x51
	add r3, r4, #0
	lsl r5, r5, #2
_021E954E:
	ldr r1, [r3, r5]
	add r2, r2, #1
	ldr r0, [r1]
	ldrh r1, [r1, #0xa]
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r6, [r0, #0x14]
	add r3, r3, #4
	add r1, r6, r1
	str r1, [r0, #0x14]
	ldr r0, [r4]
	cmp r2, r0
	blt _021E954E
_021E9568:
	mov r0, #1
	str r0, [r4, #0x10]
_021E956C:
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E952C

	thumb_func_start ov96_021E9570
ov96_021E9570: ; 0x021E9570
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r4, r0, #0
	str r1, [sp]
	add r1, sp, #4
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	str r0, [r1, #0xc]
	ldr r0, [sp]
	cmp r0, #0xa
	blt _021E958E
	bl GF_AssertFail
_021E958E:
	ldr r1, [r4]
	mov r0, #0
	cmp r1, #0
	ble _021E95B6
	mov r7, #0x51
	add r1, r4, #0
	add r6, sp, #4
	lsl r7, r7, #2
_021E959E:
	ldr r2, [r1, r7]
	add r0, r0, #1
	ldr r3, [r2]
	ldrh r2, [r2, #0xa]
	lsl r5, r3, #2
	ldr r3, [r6, r5]
	add r1, r1, #4
	add r2, r3, r2
	str r2, [r6, r5]
	ldr r2, [r4]
	cmp r0, r2
	blt _021E959E
_021E95B6:
	ldr r1, [sp]
	mov r0, #0
	lsl r1, r1, #4
	add r4, r4, r1
	mov r1, #0x5d
	add r3, sp, #4
	lsl r1, r1, #2
_021E95C4:
	ldr r2, [r3]
	add r0, r0, #1
	str r2, [r4, r1]
	add r3, r3, #4
	add r4, r4, #4
	cmp r0, #4
	blt _021E95C4
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9570

	thumb_func_start ov96_021E95D8
ov96_021E95D8: ; 0x021E95D8
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	cmp r4, #0xa
	blt _021E95E8
	bl GF_AssertFail
_021E95E8:
	lsl r0, r4, #4
	add r1, r5, r0
	lsl r0, r6, #2
	add r1, r1, r0
	mov r0, #0x5d
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E95D8

	thumb_func_start ov96_021E95F8
ov96_021E95F8: ; 0x021E95F8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r6, r2, #0
	add r5, r3, #0
	bl ov96_021E5DCC
	str r0, [sp, #8]
	ldr r2, _021E9668 ; =0x00000135
	ldr r3, [sp, #8]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r7, r0, #0
	add r0, r4, #0
	bl ov96_021E9344
	add r4, r0, #0
	str r6, [r4]
	ldr r0, [sp, #8]
	str r5, [r4, #0xc]
	bl ScrStrBufs_new
	mov r1, #1
	str r1, [sp]
	str r1, [sp, #4]
	add r3, sp, #0x10
	ldrb r1, [r3, #0x10]
	ldrb r3, [r3, #0x14]
	add r2, r5, #0
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r2, [sp, #0x28]
	ldr r3, [sp, #8]
	add r0, r6, #0
	add r1, r7, #0
	bl ReadMsgData_ExpandPlaceholders
	add r5, r0, #0
	add r0, r6, #0
	bl ScrStrBufs_delete
	ldr r0, [r4, #0x10]
	add r1, r5, #0
	bl StringCopy
	add r0, r5, #0
	bl String_dtor
	add r0, r7, #0
	bl DestroyMsgData
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021E9668: .word 0x00000135
	thumb_func_end ov96_021E95F8

	thumb_func_start ov96_021E966C
ov96_021E966C: ; 0x021E966C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r2, #0
	add r6, r3, #0
	bl ov96_021E5DCC
	str r0, [sp, #8]
	ldr r2, _021E96F4 ; =0x00000135
	ldr r3, [sp, #8]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r7, r0, #0
	add r0, r4, #0
	bl ov96_021E9344
	add r4, r0, #0
	str r5, [r4]
	ldr r0, [sp, #8]
	str r6, [r4, #0xc]
	bl ScrStrBufs_new
	mov r1, #1
	str r1, [sp]
	str r1, [sp, #4]
	add r1, sp, #0x10
	add r3, sp, #0x30
	ldrb r1, [r1, #0x18]
	ldrb r3, [r3]
	ldr r2, [sp, #0x20]
	add r5, r0, #0
	bl BufferIntegerAsString
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	add r1, sp, #0x10
	add r3, sp, #0x34
	ldrb r1, [r1, #0x1c]
	ldrb r3, [r3]
	ldr r2, [sp, #0x24]
	add r0, r5, #0
	bl BufferIntegerAsString
	ldr r2, [sp, #0x38]
	ldr r3, [sp, #8]
	add r0, r5, #0
	add r1, r7, #0
	bl ReadMsgData_ExpandPlaceholders
	add r6, r0, #0
	add r0, r5, #0
	bl ScrStrBufs_delete
	ldr r0, [r4, #0x10]
	add r1, r6, #0
	bl StringCopy
	add r0, r6, #0
	bl String_dtor
	add r0, r7, #0
	bl DestroyMsgData
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021E96F4: .word 0x00000135
	thumb_func_end ov96_021E966C

	thumb_func_start ov96_021E96F8
ov96_021E96F8: ; 0x021E96F8
	push {r4, lr}
	add r4, r3, #0
	add r0, r4, #0
	add r1, r2, #0
	bl ov96_021E5E04
	add r0, r4, #0
	mov r1, #1
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #1
	bl ov96_021E5FC8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E96F8

	thumb_func_start ov96_021E9718
ov96_021E9718: ; 0x021E9718
	push {r3, r4, r5, r6, r7, lr}
	add r4, r3, #0
	add r5, r0, #0
	add r0, r4, #0
	add r6, r1, #0
	add r7, r2, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E9780
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E5D40
	add r1, r7, #0
	add r2, r6, #0
	bl memcpy
	add r0, r4, #0
	bl ov96_021E5F00
	add r0, r4, #0
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E5EF4
	cmp r5, r0
	bne _021E9780
	add r0, r4, #0
	bl ov96_021E5EF4
	cmp r0, #4
	bhs _021E9772
	add r0, r4, #0
	bl ov96_021E5EF4
	mov r1, #4
	sub r1, r1, r0
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_021E8484
_021E9772:
	add r0, r4, #0
	bl ov96_021E5F10
	add r0, r4, #0
	mov r1, #4
	bl ov96_021E5FC8
_021E9780:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9718

	thumb_func_start ov96_021E9784
ov96_021E9784: ; 0x021E9784
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r4, r3, #0
	add r5, r1, #0
	add r7, r2, #0
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021E5D40
	add r1, r7, #0
	add r2, r5, #0
	bl memcpy
	add r0, r4, #0
	bl ov96_021E604C
	add r0, r4, #0
	mov r1, #3
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #5
	bl ov96_021E5FC8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9784

	thumb_func_start ov96_021E97B8
ov96_021E97B8: ; 0x021E97B8
	push {r4, r5, r6, lr}
	add r4, r3, #0
	add r0, r4, #0
	add r5, r1, #0
	add r6, r2, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _021E97DA
	add r0, r4, #0
	mov r1, #0
	bl ov96_021E5F34
	add r1, r6, #0
	add r2, r5, #0
	bl memcpy
_021E97DA:
	add r0, r4, #0
	mov r1, #4
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #6
	bl ov96_021E5FC8
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021E97B8

	thumb_func_start ov96_021E97EC
ov96_021E97EC: ; 0x021E97EC
	push {r3, r4, r5, lr}
	add r5, r3, #0
	add r0, r5, #0
	bl ov96_021E5F00
	add r0, r5, #0
	bl ov96_021E5D34
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5EF4
	cmp r4, r0
	bne _021E981E
	add r0, r5, #0
	bl ov96_021E5F10
	add r0, r5, #0
	mov r1, #5
	bl ov96_021E601C
	add r0, r5, #0
	mov r1, #7
	bl ov96_021E5FC8
_021E981E:
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E97EC

	thumb_func_start ov96_021E9820
ov96_021E9820: ; 0x021E9820
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r2, #0
	add r0, r3, #0
	add r6, r1, #0
	bl ov96_021E5F54
	add r1, r4, #0
	add r1, #0x24
	ldrb r1, [r1]
	cmp r1, #0
	beq _021E9844
	add r0, #0xf0
	add r1, r4, #0
	add r2, r6, #0
	bl memcpy
	pop {r4, r5, r6, pc}
_021E9844:
	mov r1, #0x28
	add r0, #0x50
	mul r1, r5
	add r0, r0, r1
	add r1, r4, #0
	add r2, r6, #0
	bl memcpy
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9820

	thumb_func_start ov96_021E9858
ov96_021E9858: ; 0x021E9858
	push {r4, lr}
	add r4, r3, #0
	add r0, r4, #0
	mov r1, #0xa
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0x12
	bl ov96_021E5FC8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9858

	thumb_func_start ov96_021E9870
ov96_021E9870: ; 0x021E9870
	push {r3, r4, r5, r6, r7, lr}
	add r5, r3, #0
	add r6, r0, #0
	add r0, r5, #0
	str r2, [sp]
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E98CE
	add r0, r5, #0
	bl ov96_021E5FAC
	add r7, #0x28
	add r4, r0, #0
	add r0, r7, #0
	bl ov96_021E8A20
	add r1, r6, #0
	mul r1, r4
	add r0, r0, r1
	ldr r1, [sp]
	add r2, r4, #0
	bl memcpy
	add r0, r5, #0
	bl ov96_021E5F00
	add r0, r5, #0
	bl ov96_021E5D34
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5EF4
	cmp r4, r0
	bne _021E98CE
	add r0, r5, #0
	bl ov96_021E5F10
	add r0, r5, #0
	mov r1, #0x15
	bl ov96_021E5FC8
_021E98CE:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E9870

	thumb_func_start ov96_021E98D0
ov96_021E98D0: ; 0x021E98D0
	push {r4, r5, r6, lr}
	add r6, r3, #0
	add r5, r1, #0
	add r4, r2, #0
	add r0, r6, #0
	bl ov96_021E5F54
	add r0, #0xf0
	add r1, r4, #0
	add r2, r5, #0
	bl memcpy
	add r0, r6, #0
	mov r1, #0x16
	bl ov96_021E5FC8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E98D0

	thumb_func_start ov96_021E98F4
ov96_021E98F4: ; 0x021E98F4
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	str r3, [sp]
	add r0, r3, #0
	add r7, r2, #0
	bl ov96_021E5F54
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	bne _021E9990
	lsl r1, r4, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	bl ov96_021E5D78
	add r5, r0, #0
	mov r6, #0
_021E991A:
	lsl r4, r6, #5
	ldr r1, [r5, r4]
	ldr r0, [r7, r4]
	add r3, r7, r4
	add r0, r1, r0
	str r0, [r5, r4]
	add r2, r5, r4
	ldr r1, [r2, #4]
	ldr r0, [r3, #4]
	add r0, r1, r0
	str r0, [r2, #4]
	ldr r1, [r2, #8]
	ldr r0, [r3, #8]
	add r0, r1, r0
	str r0, [r2, #8]
	ldr r1, [r2, #0xc]
	ldr r0, [r3, #0xc]
	add r0, r1, r0
	str r0, [r2, #0xc]
	ldr r1, [r2, #0x10]
	ldr r0, [r3, #0x10]
	add r0, r1, r0
	str r0, [r2, #0x10]
	ldr r1, [r2, #0x14]
	ldr r0, [r3, #0x14]
	add r0, r1, r0
	str r0, [r2, #0x14]
	ldr r1, [r2, #0x18]
	ldr r0, [r3, #0x18]
	add r0, r1, r0
	str r0, [r2, #0x18]
	ldr r1, [r2, #0x1c]
	ldr r0, [r3, #0x1c]
	add r0, r1, r0
	str r0, [r2, #0x1c]
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #3
	blo _021E991A
	ldr r0, [sp]
	bl ov96_021E5F00
	ldr r0, [sp]
	bl ov96_021E5D34
	add r4, r0, #0
	ldr r0, [sp]
	bl ov96_021E5EF4
	cmp r4, r0
	bne _021E9990
	ldr r0, [sp]
	bl ov96_021E5F10
	ldr r0, [sp]
	mov r1, #0x1e
	bl ov96_021E5FC8
_021E9990:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021E98F4

	thumb_func_start ov96_021E9994
ov96_021E9994: ; 0x021E9994
	push {r4, lr}
	add r4, r3, #0
	add r0, r4, #0
	bl ov96_021E5F54
	add r0, r4, #0
	bl ov96_021E5F24
	add r0, r4, #0
	mov r1, #0xd
	bl ov96_021E601C
	add r0, r4, #0
	mov r1, #0x1f
	bl ov96_021E5FC8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9994

	thumb_func_start ov96_021E99B8
ov96_021E99B8: ; 0x021E99B8
	push {r3, r4, r5, lr}
	add r5, r3, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, r5, #0
	bl ov96_021E5F00
	add r0, r5, #0
	bl ov96_021E5D34
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5EF4
	cmp r4, r0
	bne _021E99F0
	add r0, r5, #0
	bl ov96_021E5F10
	add r0, r5, #0
	mov r1, #0xf
	bl ov96_021E601C
	add r0, r5, #0
	mov r1, #0x24
	bl ov96_021E5FC8
_021E99F0:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021E99B8

	thumb_func_start ov96_021E99F4
ov96_021E99F4: ; 0x021E99F4
	mov r0, #4
	bx lr
	thumb_func_end ov96_021E99F4

	thumb_func_start ov96_021E99F8
ov96_021E99F8: ; 0x021E99F8
	mov r0, #0x7c
	bx lr
	thumb_func_end ov96_021E99F8

	thumb_func_start ov96_021E99FC
ov96_021E99FC: ; 0x021E99FC
	mov r0, #0x1f
	lsl r0, r0, #4
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E99FC

	thumb_func_start ov96_021E9A04
ov96_021E9A04: ; 0x021E9A04
	push {r3, lr}
	bl sub_02028ECC
	lsl r0, r0, #2
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9A04

	thumb_func_start ov96_021E9A10
ov96_021E9A10: ; 0x021E9A10
	mov r0, #0x74
	bx lr
	thumb_func_end ov96_021E9A10

	thumb_func_start ov96_021E9A14
ov96_021E9A14: ; 0x021E9A14
	mov r0, #0x26
	bx lr
	thumb_func_end ov96_021E9A14

	thumb_func_start ov96_021E9A18
ov96_021E9A18: ; 0x021E9A18
	mov r0, #0x60
	bx lr
	thumb_func_end ov96_021E9A18

	thumb_func_start ov96_021E9A1C
ov96_021E9A1C: ; 0x021E9A1C
	mov r0, #6
	lsl r0, r0, #6
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E9A1C

	thumb_func_start ov96_021E9A24
ov96_021E9A24: ; 0x021E9A24
	ldr r3, _021E9A28 ; =sub_02031B10
	bx r3
	.balign 4, 0
_021E9A28: .word sub_02031B10
	thumb_func_end ov96_021E9A24

	thumb_func_start ov96_021E9A2C
ov96_021E9A2C: ; 0x021E9A2C
	ldr r3, _021E9A34 ; =ov96_021E5FA4
	add r0, r1, #0
	bx r3
	nop
_021E9A34: .word ov96_021E5FA4
	thumb_func_end ov96_021E9A2C

	thumb_func_start ov96_021E9A38
ov96_021E9A38: ; 0x021E9A38
	ldr r3, _021E9A44 ; =ov96_021E5F44
	add r2, r0, #0
	add r0, r1, #0
	add r1, r2, #0
	bx r3
	nop
_021E9A44: .word ov96_021E5F44
	thumb_func_end ov96_021E9A38

	thumb_func_start ov96_021E9A48
ov96_021E9A48: ; 0x021E9A48
	ldr r3, _021E9A50 ; =ov96_021E5D78
	add r0, r1, #0
	mov r1, #0
	bx r3
	.balign 4, 0
_021E9A50: .word ov96_021E5D78
	thumb_func_end ov96_021E9A48

	thumb_func_start ov96_021E9A54
ov96_021E9A54: ; 0x021E9A54
	push {r3, r4, r5, lr}
	add r4, r0, #0
	add r0, r1, #0
	add r5, r2, #0
	bl ov96_021E5D88
	add r1, r4, #0
	mul r1, r5
	add r0, r0, r1
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021E9A54

	thumb_func_start ov96_021E9A68
ov96_021E9A68: ; 0x021E9A68
	add r2, r0, #0
	add r0, r1, #0
	lsl r1, r2, #0x18
	ldr r3, _021E9A74 ; =ov96_021E86FC
	lsr r1, r1, #0x18
	bx r3
	.balign 4, 0
_021E9A74: .word ov96_021E86FC
	thumb_func_end ov96_021E9A68

	thumb_func_start ov96_021E9A78
ov96_021E9A78: ; 0x021E9A78
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r6, r2, #0
	mov r1, #0
	add r5, r0, #0
	add r2, sp, #0
	add r0, r1, #0
_021E9A86:
	add r1, r1, #1
	strb r0, [r2]
	add r2, r2, #1
	cmp r1, #4
	blt _021E9A86
	mov r0, #1
	tst r0, r4
	beq _021E9AAA
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9AAA:
	mov r0, #4
	tst r0, r4
	beq _021E9AC4
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9AC4:
	mov r0, #2
	tst r0, r4
	beq _021E9ADE
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9ADE:
	mov r0, #8
	tst r0, r4
	beq _021E9AF8
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9AF8:
	mov r0, #0x10
	tst r0, r4
	beq _021E9B12
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B12:
	mov r0, #0x20
	tst r0, r4
	beq _021E9B2C
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B2C:
	mov r0, #0x40
	tst r0, r4
	beq _021E9B46
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B46:
	mov r0, #0x80
	tst r0, r4
	beq _021E9B60
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B60:
	mov r0, #1
	lsl r0, r0, #8
	tst r0, r4
	beq _021E9B7C
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B7C:
	mov r0, #2
	lsl r0, r0, #8
	tst r0, r4
	beq _021E9B98
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9B98:
	mov r0, #1
	lsl r0, r0, #0xa
	tst r0, r4
	beq _021E9BB4
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9BB4:
	mov r0, #2
	lsl r0, r0, #0xa
	tst r0, r4
	beq _021E9BD0
	add r0, sp, #0
	ldrb r1, [r0]
	add r1, r1, #1
	strb r1, [r0]
	ldrb r1, [r0, #2]
	add r1, r1, #1
	strb r1, [r0, #2]
	ldrb r1, [r0, #3]
	add r1, r1, #1
	strb r1, [r0, #3]
_021E9BD0:
	mov r1, #2
	add r0, sp, #0
	strb r1, [r0, #1]
	add r0, r5, #0
	mov r1, #0xb4
	bl AllocFromHeap
	add r7, r0, #0
	str r5, [r7]
	str r4, [r7, #4]
	str r6, [r7, #8]
	mov r5, #0
	add r4, sp, #0
	add r6, r7, #0
_021E9BEC:
	ldrb r0, [r4]
	ldr r2, [r7]
	add r1, r5, #0
	bl sub_0200A090
	str r0, [r6, #0xc]
	add r5, r5, #1
	add r4, r4, #1
	add r6, r6, #4
	cmp r5, #4
	blt _021E9BEC
	add r0, r7, #0
	bl ov96_021E9D10
	add r0, r7, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021E9A78

	thumb_func_start ov96_021E9C0C
ov96_021E9C0C: ; 0x021E9C0C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r1, [r5, #4]
	mov r0, #1
	tst r0, r1
	beq _021E9C1E
	ldr r0, [r5, #0x1c]
	bl sub_0200AEB0
_021E9C1E:
	ldr r1, [r5, #4]
	mov r0, #4
	tst r0, r1
	beq _021E9C2C
	ldr r0, [r5, #0x20]
	bl sub_0200AEB0
_021E9C2C:
	ldr r1, [r5, #4]
	mov r0, #2
	tst r0, r1
	beq _021E9C3A
	ldr r0, [r5, #0x24]
	bl sub_0200AEB0
_021E9C3A:
	ldr r1, [r5, #4]
	mov r0, #8
	tst r0, r1
	beq _021E9C48
	ldr r0, [r5, #0x28]
	bl sub_0200AEB0
_021E9C48:
	ldr r1, [r5, #4]
	mov r0, #0x10
	tst r0, r1
	beq _021E9C56
	ldr r0, [r5, #0x2c]
	bl sub_0200AEB0
_021E9C56:
	ldr r1, [r5, #4]
	mov r0, #0x20
	tst r0, r1
	beq _021E9C64
	ldr r0, [r5, #0x30]
	bl sub_0200AEB0
_021E9C64:
	ldr r1, [r5, #4]
	mov r0, #0x40
	tst r0, r1
	beq _021E9C72
	ldr r0, [r5, #0x34]
	bl sub_0200AEB0
_021E9C72:
	ldr r1, [r5, #4]
	mov r0, #0x80
	tst r0, r1
	beq _021E9C80
	ldr r0, [r5, #0x38]
	bl sub_0200AEB0
_021E9C80:
	mov r0, #1
	ldr r1, [r5, #4]
	lsl r0, r0, #8
	tst r0, r1
	beq _021E9C90
	ldr r0, [r5, #0x3c]
	bl sub_0200AEB0
_021E9C90:
	mov r0, #2
	ldr r1, [r5, #4]
	lsl r0, r0, #8
	tst r0, r1
	beq _021E9CA0
	ldr r0, [r5, #0x40]
	bl sub_0200AEB0
_021E9CA0:
	mov r0, #1
	ldr r1, [r5, #4]
	lsl r0, r0, #0xa
	tst r0, r1
	beq _021E9CB0
	ldr r0, [r5, #0x44]
	bl sub_0200AEB0
_021E9CB0:
	mov r0, #2
	ldr r1, [r5, #4]
	lsl r0, r0, #0xa
	tst r0, r1
	beq _021E9CC0
	ldr r0, [r5, #0x48]
	bl sub_0200AEB0
_021E9CC0:
	add r0, r5, #0
	add r0, #0xac
	ldr r0, [r0]
	bl sub_0200B0A8
	add r0, r5, #0
	add r0, #0xb0
	ldr r0, [r0]
	cmp r0, #0
	beq _021E9CD8
	bl sub_0200B0A8
_021E9CD8:
	mov r6, #0
	add r4, r5, #0
_021E9CDC:
	ldr r0, [r4, #0xc]
	bl sub_0200A0D0
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #4
	blt _021E9CDC
	add r0, r5, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9C0C

	thumb_func_start ov96_021E9CF4
ov96_021E9CF4: ; 0x021E9CF4
	cmp r0, #0
	bne _021E9CFC
	mov r0, #0
	bx lr
_021E9CFC:
	ldr r0, [r0, #4]
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021E9CF4

	thumb_func_start ov96_021E9D08
ov96_021E9D08: ; 0x021E9D08
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r0, [r0, #0xc]
	bx lr
	thumb_func_end ov96_021E9D08

	thumb_func_start ov96_021E9D10
ov96_021E9D10: ; 0x021E9D10
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	ldr r1, [r4, #4]
	mov r0, #1
	tst r1, r0
	beq _021E9D6E
	mov r1, #0x14
	str r1, [sp]
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #3
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x1c]
	mov r0, #0x14
	str r0, [sp]
	mov r2, #2
	str r2, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x4c]
	mov r0, #0x14
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #1
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x7c]
	ldr r0, [r4, #0x1c]
	bl sub_0200ADA4
_021E9D6E:
	ldr r1, [r4, #4]
	mov r0, #4
	tst r0, r1
	beq _021E9DCE
	mov r0, #0x15
	str r0, [sp]
	ldr r0, [r4, #8]
	mov r1, #0x99
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r2, #6
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x20]
	mov r0, #0x15
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #5
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x50]
	mov r0, #0x15
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #4
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x80
	str r0, [r1]
	ldr r0, [r4, #0x20]
	bl sub_0200ADA4
_021E9DCE:
	ldr r1, [r4, #4]
	mov r0, #2
	tst r0, r1
	beq _021E9E2E
	mov r0, #0x16
	str r0, [sp]
	ldr r0, [r4, #8]
	mov r1, #0x99
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r2, #9
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x24]
	mov r0, #0x16
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #8
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x54]
	mov r0, #0x16
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #7
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x84
	str r0, [r1]
	ldr r0, [r4, #0x24]
	bl sub_0200ADA4
_021E9E2E:
	ldr r0, [r4, #4]
	mov r2, #0x10
	tst r0, r2
	beq _021E9E8C
	mov r0, #0x1a
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x2c]
	mov r0, #0x1a
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0xf
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x5c]
	mov r0, #0x1a
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0xe
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x8c
	str r0, [r1]
	ldr r0, [r4, #0x2c]
	bl sub_0200ADA4
_021E9E8C:
	ldr r1, [r4, #4]
	mov r0, #0x20
	tst r0, r1
	beq _021E9EEC
	mov r0, #0x1b
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x13
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x30]
	mov r0, #0x1b
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x12
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x60]
	mov r0, #0x1b
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x11
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x90
	str r0, [r1]
	ldr r0, [r4, #0x30]
	bl sub_0200ADA4
_021E9EEC:
	ldr r1, [r4, #4]
	mov r0, #8
	tst r0, r1
	beq _021E9F4C
	mov r0, #0x19
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0xd
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x28]
	mov r0, #0x19
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0xc
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x58]
	mov r0, #0x19
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0xb
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x88
	str r0, [r1]
	ldr r0, [r4, #0x28]
	bl sub_0200ADA4
_021E9F4C:
	ldr r1, [r4, #4]
	mov r0, #0x40
	tst r0, r1
	beq _021E9FAC
	mov r0, #0x1c
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x16
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x34]
	mov r0, #0x1c
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x15
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x64]
	mov r0, #0x1c
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x14
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x94
	str r0, [r1]
	ldr r0, [r4, #0x34]
	bl sub_0200ADA4
_021E9FAC:
	ldr r1, [r4, #4]
	mov r0, #0x80
	tst r0, r1
	beq _021EA00C
	mov r0, #0x1d
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x19
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x38]
	mov r0, #0x1d
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x18
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x68]
	mov r0, #0x1d
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x17
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x98
	str r0, [r1]
	ldr r0, [r4, #0x38]
	bl sub_0200ADA4
_021EA00C:
	mov r0, #1
	ldr r1, [r4, #4]
	lsl r0, r0, #8
	tst r0, r1
	beq _021EA06E
	mov r0, #0x1e
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x1c
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x3c]
	mov r0, #0x1e
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x1b
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x6c]
	mov r0, #0x1e
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x1a
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0x9c
	str r0, [r1]
	ldr r0, [r4, #0x3c]
	bl sub_0200ADA4
_021EA06E:
	mov r0, #2
	ldr r1, [r4, #4]
	lsl r0, r0, #8
	tst r0, r1
	beq _021EA0CE
	mov r2, #0x1f
	str r2, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x40]
	mov r0, #0x1f
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x1e
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x70]
	mov r0, #0x1f
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x1d
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	ldr r0, [r4, #0x40]
	bl sub_0200ADA4
_021EA0CE:
	mov r0, #1
	ldr r1, [r4, #4]
	lsl r0, r0, #0xa
	tst r0, r1
	beq _021EA130
	mov r0, #0x1f
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x22
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x44]
	mov r0, #0x1f
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x21
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x74]
	mov r0, #0x1f
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x20
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	ldr r0, [r4, #0x44]
	bl sub_0200ADA4
_021EA130:
	mov r0, #2
	ldr r1, [r4, #4]
	lsl r0, r0, #0xa
	tst r0, r1
	beq _021EA192
	mov r0, #0x20
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r2, #0x25
	mov r3, #0
	bl sub_0200A1D8
	str r0, [r4, #0x48]
	mov r0, #0x20
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r2, #0x24
	mov r3, #0
	bl sub_0200A294
	str r0, [r4, #0x78]
	mov r0, #0x20
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #8]
	ldr r0, [r4, #0x18]
	mov r2, #0x23
	mov r3, #0
	bl sub_0200A294
	add r1, r4, #0
	add r1, #0xa8
	str r0, [r1]
	ldr r0, [r4, #0x48]
	bl sub_0200ADA4
_021EA192:
	ldr r1, [r4, #8]
	cmp r1, #2
	bne _021EA19A
	mov r1, #3
_021EA19A:
	mov r0, #0x17
	str r0, [sp]
	str r1, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r2, #0
	str r0, [sp, #0xc]
	ldr r0, [r4, #0x10]
	mov r1, #0x99
	add r3, r2, #0
	bl sub_0200A234
	add r1, r4, #0
	add r1, #0xac
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xac
	ldr r0, [r0]
	bl sub_0200AF94
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb0
	str r1, [r0]
	ldr r2, [r4, #4]
	mov r1, #8
	add r0, r2, #0
	tst r0, r1
	bne _021EA1E4
	add r0, r1, #0
	add r0, #0xf8
	tst r0, r2
	bne _021EA1E4
	lsl r0, r1, #7
	tst r0, r2
	beq _021EA20E
_021EA1E4:
	mov r0, #0x18
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0x99
	str r0, [sp, #0xc]
	ldr r0, [r4, #0x10]
	mov r2, #0xa
	mov r3, #0
	bl sub_0200A234
	add r1, r4, #0
	add r1, #0xb0
	add r4, #0xb0
	str r0, [r1]
	ldr r0, [r4]
	bl sub_0200AF94
_021EA20E:
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021E9D10

	thumb_func_start ov96_021EA214
ov96_021EA214: ; 0x021EA214
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x14
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x15
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0xa0]
	str r4, [sp, #0x38]
	str r0, [sp, #0x64]
	mov r0, #1
	lsl r0, r0, #0xc
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	str r7, [sp, #0x60]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA2A4
	bl GF_AssertFail
_021EA2A4:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA214

	thumb_func_start ov96_021EA2C4
ov96_021EA2C4: ; 0x021EA2C4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x19
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1a
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x18
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #2
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA354
	bl GF_AssertFail
_021EA354:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA2C4

	thumb_func_start ov96_021EA374
ov96_021EA374: ; 0x021EA374
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1c
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1d
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA404
	bl GF_AssertFail
_021EA404:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA374

	thumb_func_start ov96_021EA424
ov96_021EA424: ; 0x021EA424
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1a
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1b
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA4B4
	bl GF_AssertFail
_021EA4B4:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA424

	thumb_func_start ov96_021EA4D4
ov96_021EA4D4: ; 0x021EA4D4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1b
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1c
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA564
	bl GF_AssertFail
_021EA564:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA4D4

	thumb_func_start ov96_021EA584
ov96_021EA584: ; 0x021EA584
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1d
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1e
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA614
	bl GF_AssertFail
_021EA614:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA584

	thumb_func_start ov96_021EA634
ov96_021EA634: ; 0x021EA634
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1e
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x1f
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x18
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #2
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA6C4
	bl GF_AssertFail
_021EA6C4:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA634

	thumb_func_start ov96_021EA6E4
ov96_021EA6E4: ; 0x021EA6E4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x90
	add r4, r2, #0
	add r5, r0, #0
	add r7, r1, #0
	str r3, [sp, #0x2c]
	cmp r4, #1
	bne _021EA6F8
	mov r6, #0x17
	b _021EA6FA
_021EA6F8:
	mov r6, #0x18
_021EA6FA:
	add r0, r5, #0
	mov r1, #0
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x38]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x1f
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x20
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	ldr r3, [sp, #0x2c]
	str r2, [sp, #0xc]
	str r3, [sp, #0x10]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x38]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x6c
	add r2, r6, #0
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x6c
	str r0, [sp, #0x40]
	ldr r0, [sp, #0xa8]
	str r7, [sp, #0x3c]
	str r0, [sp, #0x68]
	mov r0, #1
	lsl r0, r0, #0xc
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r1, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	str r0, [sp, #0x58]
	add r0, sp, #0x3c
	strh r1, [r0, #0x20]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x3c
	str r4, [sp, #0x64]
	bl sub_02024624
	add r4, r0, #0
	bne _021EA784
	bl GF_AssertFail
_021EA784:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x90
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA6E4

	thumb_func_start ov96_021EA7A4
ov96_021EA7A4: ; 0x021EA7A4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r4, r1, #0
	add r5, r0, #0
	mov r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	add r0, r5, #0
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0x20
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x21
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	ldr r3, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, [sp, #0x30]
	str r3, [sp, #0x18]
	ldr r3, [sp, #0x34]
	str r3, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, sp, #0x68
	mov r2, #0x17
	add r3, r1, #0
	bl sub_02009D48
	mov r1, #0
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r4, [sp, #0x38]
	str r7, [sp, #0x64]
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	mov r0, #2
	str r0, [sp, #0x5c]
	mov r0, #1
	str r0, [sp, #0x60]
	add r0, sp, #0x38
	bl sub_02024624
	add r4, r0, #0
	bne _021EA836
	bl GF_AssertFail
_021EA836:
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EA7A4

	thumb_func_start ov96_021EA854
ov96_021EA854: ; 0x021EA854
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0xd3
	lsl r1, r1, #2
	add r5, r0, #0
	add r7, r2, #0
	str r3, [sp]
	bl AllocFromHeap
	mov r2, #0xd3
	add r4, r0, #0
	mov r1, #0
	lsl r2, r2, #2
	bl MIi_CpuFill8
	str r5, [r4]
	ldr r0, [sp]
	str r6, [r4, #4]
	str r0, [r4, #0x18]
	ldr r0, [sp, #0x18]
	str r0, [r4, #0x10]
	add r0, r5, #0
	str r7, [r4, #8]
	bl ov96_021E8A30
	ldr r2, [sp, #0x18]
	add r1, r6, #0
	str r0, [r4, #0x14]
	bl ov96_021E8A44
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EA854

	thumb_func_start ov96_021EA894
ov96_021EA894: ; 0x021EA894
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x14]
	bl ov96_021E8AAC
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EA894

	thumb_func_start ov96_021EA8A8
ov96_021EA8A8: ; 0x021EA8A8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r6, r0, #0
	ldr r0, [sp, #0x30]
	str r1, [sp, #8]
	str r0, [sp, #0x14]
	mov r0, #0
	str r0, [sp, #0x18]
	ldr r0, [r6, #4]
	add r7, r3, #0
	str r2, [sp, #0xc]
	cmp r0, #0
	bgt _021EA8C4
	b _021EA9C8
_021EA8C4:
	add r4, r2, #0
	add r5, r6, #0
	str r7, [sp, #0x10]
_021EA8CA:
	ldrh r0, [r4, #4]
	cmp r0, #0
	beq _021EA8D4
	mov r0, #0x20
	b _021EA8D6
_021EA8D4:
	mov r0, #0x10
_021EA8D6:
	str r0, [r5, #0x30]
	str r0, [r5, #0x34]
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x14]
	cmp r0, #1
	beq _021EA8EC
	cmp r0, #2
	beq _021EA8F2
	cmp r0, #3
	beq _021EA8F8
	b _021EA8FE
_021EA8EC:
	mov r0, #3
	str r0, [r5, #0x2c]
	b _021EA906
_021EA8F2:
	mov r0, #4
	str r0, [r5, #0x2c]
	b _021EA906
_021EA8F8:
	mov r0, #5
	str r0, [r5, #0x2c]
	b _021EA906
_021EA8FE:
	bl GF_AssertFail
	mov r0, #3
	str r0, [r5, #0x2c]
_021EA906:
	ldr r0, [r6, #0x18]
	mov r1, #2
	bl ov96_021E9CF4
	cmp r0, #0
	beq _021EA956
	ldr r1, [r7, #4]
	ldr r2, [r7, #0x10]
	add r0, r6, #0
	mov r3, #0x16
	bl ov96_021EAA88
	str r0, [r5, #0x20]
	ldrh r0, [r4, #4]
	cmp r0, #0
	ldr r0, [r5, #0x20]
	beq _021EA930
	mov r1, #1
	bl sub_020248F0
	b _021EA936
_021EA930:
	mov r1, #0
	bl sub_020248F0
_021EA936:
	ldrh r1, [r4]
	ldr r0, _021EA9F8 ; =0x0000FFCE
	add r0, r1, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	cmp r0, #1
	bhi _021EA952
	mov r0, #1
	str r0, [r5, #0x5c]
	ldr r0, [r5, #0x20]
	mov r1, #0
	bl sub_02024830
	b _021EA956
_021EA952:
	mov r0, #0
	str r0, [r5, #0x5c]
_021EA956:
	ldr r0, [r6, #0x18]
	mov r1, #4
	bl ov96_021E9CF4
	cmp r0, #0
	beq _021EA9AE
	ldr r1, [r7, #4]
	ldr r2, [r7, #0x10]
	add r0, r6, #0
	mov r3, #0x15
	bl ov96_021EAA88
	str r0, [r5, #0x24]
	ldr r0, [r4, #8]
	cmp r0, #4
	blt _021EA97A
	bl GF_AssertFail
_021EA97A:
	ldr r0, [r5, #0x24]
	ldr r1, [r4, #8]
	bl sub_020248F0
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x14]
	cmp r0, #1
	beq _021EA994
	cmp r0, #2
	beq _021EA99A
	cmp r0, #3
	beq _021EA9A0
	b _021EA9A6
_021EA994:
	mov r0, #3
	str r0, [r5, #0x28]
	b _021EA9AE
_021EA99A:
	mov r0, #4
	str r0, [r5, #0x28]
	b _021EA9AE
_021EA9A0:
	mov r0, #5
	str r0, [r5, #0x28]
	b _021EA9AE
_021EA9A6:
	bl GF_AssertFail
	mov r0, #3
	str r0, [r5, #0x28]
_021EA9AE:
	mov r0, #0xc
	str r0, [r5, #0x58]
	ldr r0, [sp, #0x10]
	ldr r1, [r6, #4]
	add r0, r0, #4
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x18]
	add r4, #0x10
	add r0, r0, #1
	add r5, #0x44
	str r0, [sp, #0x18]
	cmp r0, r1
	blt _021EA8CA
_021EA9C8:
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bgt _021EA9D2
	mov r0, #1
	str r0, [sp, #0x14]
_021EA9D2:
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #8]
	sub r0, r0, #1
	str r0, [sp]
	ldr r0, [sp, #0x34]
	ldr r2, [sp, #0xc]
	str r0, [sp, #4]
	ldr r0, [r6, #0x14]
	add r3, r7, #0
	bl ov96_021E8B1C
	ldr r0, _021EA9FC ; =ov96_021EAA24
	ldr r2, [sp, #0x14]
	add r1, r6, #0
	bl sub_0200E320
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	nop
_021EA9F8: .word 0x0000FFCE
_021EA9FC: .word ov96_021EAA24
	thumb_func_end ov96_021EA8A8

	thumb_func_start ov96_021EAA00
ov96_021EAA00: ; 0x021EAA00
	ldr r0, [r0, #0xc]
	bx lr
	thumb_func_end ov96_021EAA00

	thumb_func_start ov96_021EAA04
ov96_021EAA04: ; 0x021EAA04
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	cmp r4, r0
	blt _021EAA14
	bl GF_AssertFail
_021EAA14:
	mov r0, #0x44
	add r5, #0x1c
	mul r0, r4
	add r0, r5, r0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAA04

	thumb_func_start ov96_021EAA20
ov96_021EAA20: ; 0x021EAA20
	ldr r0, [r0]
	bx lr
	thumb_func_end ov96_021EAA20

	thumb_func_start ov96_021EAA24
ov96_021EAA24: ; 0x021EAA24
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r0, [sp]
	ldr r0, [r1, #0x14]
	str r1, [sp, #4]
	bl ov96_021E8B88
	cmp r0, #0
	beq _021EAA82
	ldr r0, [sp, #4]
	mov r4, #0
	ldr r7, [r0, #8]
	ldr r0, [r0, #4]
	cmp r0, #0
	ble _021EAA76
	ldr r5, [sp, #4]
	add r6, r5, #0
	add r6, #0x1c
_021EAA48:
	ldr r0, [sp, #4]
	lsl r1, r4, #0x18
	ldr r0, [r0, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021E8B8C
	str r0, [r5, #0x1c]
	add r0, r6, #0
	add r1, r7, #0
	bl ov96_021EABA8
	ldr r0, [r5, #0x1c]
	add r7, r7, #1
	bl ov96_021E90FC
	str r0, [r5, #0x44]
	ldr r0, [sp, #4]
	add r4, r4, #1
	ldr r0, [r0, #4]
	add r5, #0x44
	add r6, #0x44
	cmp r4, r0
	blt _021EAA48
_021EAA76:
	ldr r0, [sp, #4]
	mov r1, #1
	str r1, [r0, #0xc]
	ldr r0, [sp]
	bl sub_0200E390
_021EAA82:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAA24

	thumb_func_start ov96_021EAA88
ov96_021EAA88: ; 0x021EAA88
	push {r4, r5, r6, r7, lr}
	sub sp, #0x8c
	add r5, r0, #0
	ldr r0, [r5, #0x18]
	add r6, r1, #0
	mov r1, #0
	add r4, r2, #0
	add r7, r3, #0
	bl ov96_021E9D08
	str r0, [sp, #0x2c]
	ldr r0, [r5, #0x18]
	mov r1, #1
	bl ov96_021E9D08
	str r0, [sp, #0x30]
	ldr r0, [r5, #0x18]
	mov r1, #2
	bl ov96_021E9D08
	str r0, [sp, #0x34]
	ldr r0, [r5, #0x18]
	mov r1, #3
	bl ov96_021E9D08
	mov r1, #0
	str r7, [sp]
	mvn r1, r1
	str r1, [sp, #4]
	str r1, [sp, #8]
	mov r1, #0
	str r1, [sp, #0xc]
	ldr r2, [sp, #0x2c]
	str r6, [sp, #0x10]
	str r2, [sp, #0x14]
	ldr r2, [sp, #0x30]
	add r3, r7, #0
	str r2, [sp, #0x18]
	ldr r2, [sp, #0x34]
	str r2, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r1, [sp, #0x24]
	str r1, [sp, #0x28]
	add r0, sp, #0x68
	add r1, r7, #0
	mov r2, #0x17
	bl sub_02009D48
	cmp r4, #3
	bne _021EAAEE
	mov r4, #1
_021EAAEE:
	ldr r0, [r5, #0x10]
	mov r1, #0
	str r0, [sp, #0x38]
	add r0, sp, #0x68
	str r0, [sp, #0x3c]
	ldr r0, [r5]
	str r0, [sp, #0x64]
	mov r0, #1
	lsl r0, r0, #0xc
	str r1, [sp, #0x40]
	str r1, [sp, #0x44]
	str r1, [sp, #0x48]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	add r0, sp, #0x38
	strh r1, [r0, #0x20]
	add r0, sp, #0x38
	str r1, [sp, #0x5c]
	str r4, [sp, #0x60]
	bl sub_02024624
	add r4, r0, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add sp, #0x8c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EAA88

	thumb_func_start ov96_021EAB38
ov96_021EAB38: ; 0x021EAB38
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	bl ov96_021E8BAC
	add r1, r4, #0
	bl sub_02024830
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021EAB64
	ldr r1, [r5, #0x40]
	cmp r1, #0
	beq _021EAB5E
	mov r1, #0
	bl sub_02024830
	b _021EAB64
_021EAB5E:
	add r1, r4, #0
	bl sub_02024830
_021EAB64:
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021EAB70
	add r1, r4, #0
	bl sub_02024830
_021EAB70:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAB38

	thumb_func_start ov96_021EAB74
ov96_021EAB74: ; 0x021EAB74
	push {r3, lr}
	ldr r2, [r0, #4]
	cmp r2, #0
	beq _021EAB92
	ldr r0, [r0, #0x40]
	cmp r0, #0
	beq _021EAB8C
	add r0, r2, #0
	mov r1, #0
	bl sub_02024830
	pop {r3, pc}
_021EAB8C:
	add r0, r2, #0
	bl sub_02024830
_021EAB92:
	pop {r3, pc}
	thumb_func_end ov96_021EAB74

	thumb_func_start ov96_021EAB94
ov96_021EAB94: ; 0x021EAB94
	push {r4, lr}
	ldr r0, [r0]
	add r4, r1, #0
	bl ov96_021E8BAC
	add r1, r4, #0
	bl sub_02024830
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAB94

	thumb_func_start ov96_021EABA8
ov96_021EABA8: ; 0x021EABA8
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	bl ov96_021E8BAC
	add r1, r4, #0
	bl sub_02024ADC
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021EABCA
	ldr r1, [r5, #0x3c]
	lsl r1, r1, #1
	add r1, r4, r1
	bl sub_02024ADC
_021EABCA:
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021EABD8
	ldr r1, [r5, #0x3c]
	add r1, r4, r1
	bl sub_02024ADC
_021EABD8:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EABA8

	thumb_func_start ov96_021EABDC
ov96_021EABDC: ; 0x021EABDC
	str r1, [r0, #0x3c]
	bx lr
	thumb_func_end ov96_021EABDC

	thumb_func_start ov96_021EABE0
ov96_021EABE0: ; 0x021EABE0
	push {r4, lr}
	ldr r0, [r0]
	add r4, r1, #0
	bl ov96_021E8BAC
	add r1, r4, #0
	bl sub_0202487C
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EABE0

	thumb_func_start ov96_021EABF4
ov96_021EABF4: ; 0x021EABF4
	push {r4, lr}
	ldr r0, [r0]
	add r4, r1, #0
	bl ov96_021E8BAC
	add r1, r4, #0
	bl sub_020247E4
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EABF4

	thumb_func_start ov96_021EAC08
ov96_021EAC08: ; 0x021EAC08
	str r1, [r0, #0x34]
	bx lr
	thumb_func_end ov96_021EAC08

	thumb_func_start ov96_021EAC0C
ov96_021EAC0C: ; 0x021EAC0C
	push {r4, lr}
	add r4, r1, #0
	str r4, [r0, #0x34]
	beq _021EAC5A
	ldr r0, [r0]
	bl ov96_021E8BAC
	cmp r4, #6
	bhi _021EAC50
	add r1, r4, r4
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EAC2A: ; jump table
	.short _021EAC50 - _021EAC2A - 2 ; case 0
	.short _021EAC38 - _021EAC2A - 2 ; case 1
	.short _021EAC3C - _021EAC2A - 2 ; case 2
	.short _021EAC40 - _021EAC2A - 2 ; case 3
	.short _021EAC44 - _021EAC2A - 2 ; case 4
	.short _021EAC48 - _021EAC2A - 2 ; case 5
	.short _021EAC4C - _021EAC2A - 2 ; case 6
_021EAC38:
	mov r1, #0
	b _021EAC56
_021EAC3C:
	mov r1, #1
	b _021EAC56
_021EAC40:
	mov r1, #2
	b _021EAC56
_021EAC44:
	mov r1, #3
	b _021EAC56
_021EAC48:
	mov r1, #4
	b _021EAC56
_021EAC4C:
	mov r1, #8
	b _021EAC56
_021EAC50:
	bl GF_AssertFail
	pop {r4, pc}
_021EAC56:
	bl sub_02024950
_021EAC5A:
	pop {r4, pc}
	thumb_func_end ov96_021EAC0C

	thumb_func_start ov96_021EAC5C
ov96_021EAC5C: ; 0x021EAC5C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	bl ov96_021E8BAC
	cmp r4, #8
	bgt _021EAC7E
	bge _021EACAE
	cmp r4, #4
	bgt _021EAD04
	cmp r4, #0
	blt _021EAD04
	beq _021EACAE
	cmp r4, #4
	beq _021EACAE
	pop {r3, r4, r5, pc}
_021EAC7E:
	cmp r4, #0x16
	bgt _021EACAA
	add r1, r4, #0
	sub r1, #0xc
	bmi _021EAD04
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EAC94: ; jump table
	.short _021EACAE - _021EAC94 - 2 ; case 0
	.short _021EACB2 - _021EAC94 - 2 ; case 1
	.short _021EACB2 - _021EAC94 - 2 ; case 2
	.short _021EACB2 - _021EAC94 - 2 ; case 3
	.short _021EACAE - _021EAC94 - 2 ; case 4
	.short _021EACB2 - _021EAC94 - 2 ; case 5
	.short _021EACB2 - _021EAC94 - 2 ; case 6
	.short _021EACB2 - _021EAC94 - 2 ; case 7
	.short _021EACAE - _021EAC94 - 2 ; case 8
	.short _021EACAE - _021EAC94 - 2 ; case 9
	.short _021EACAE - _021EAC94 - 2 ; case 10
_021EACAA:
	cmp r4, #0x1a
	bne _021EAD04
_021EACAE:
	str r4, [r5, #0x38]
	b _021EACB4
_021EACB2:
	pop {r3, r4, r5, pc}
_021EACB4:
	cmp r4, #0x14
	beq _021EACFC
	cmp r4, #0x15
	beq _021EACFC
	ldr r1, [r5, #0x34]
	cmp r1, #4
	bhi _021EACF6
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EACCE: ; jump table
	.short _021EACF6 - _021EACCE - 2 ; case 0
	.short _021EACD8 - _021EACCE - 2 ; case 1
	.short _021EACDE - _021EACCE - 2 ; case 2
	.short _021EACE6 - _021EACCE - 2 ; case 3
	.short _021EACEE - _021EACCE - 2 ; case 4
_021EACD8:
	lsl r1, r4, #0x18
	lsr r1, r1, #0x18
	b _021EAD00
_021EACDE:
	add r1, r4, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	b _021EAD00
_021EACE6:
	add r1, r4, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	b _021EAD00
_021EACEE:
	add r1, r4, #3
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	b _021EAD00
_021EACF6:
	bl GF_AssertFail
	pop {r3, r4, r5, pc}
_021EACFC:
	lsl r1, r4, #0x18
	lsr r1, r1, #0x18
_021EAD00:
	bl sub_02024950
_021EAD04:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAC5C

	thumb_func_start ov96_021EAD08
ov96_021EAD08: ; 0x021EAD08
	push {r3, r4, r5, lr}
	add r4, r0, #0
	ldr r0, [r4]
	add r5, r1, #0
	bl ov96_021E8BAC
	cmp r5, #0
	beq _021EAD22
	cmp r5, #0x14
	beq _021EAD28
	cmp r5, #0x15
	beq _021EAD2E
	pop {r3, r4, r5, pc}
_021EAD22:
	mov r1, #0
	str r1, [r4, #0x38]
	b _021EAD32
_021EAD28:
	mov r1, #4
	str r1, [r4, #0x38]
	b _021EAD32
_021EAD2E:
	mov r1, #5
	str r1, [r4, #0x38]
_021EAD32:
	cmp r5, #0x14
	beq _021EAD6C
	cmp r5, #0x15
	beq _021EAD6C
	ldr r1, [r4, #0x34]
	cmp r1, #4
	bhi _021EAD66
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EAD4C: ; jump table
	.short _021EAD66 - _021EAD4C - 2 ; case 0
	.short _021EAD56 - _021EAD4C - 2 ; case 1
	.short _021EAD5A - _021EAD4C - 2 ; case 2
	.short _021EAD5E - _021EAD4C - 2 ; case 3
	.short _021EAD62 - _021EAD4C - 2 ; case 4
_021EAD56:
	mov r1, #0
	b _021EAD72
_021EAD5A:
	mov r1, #1
	b _021EAD72
_021EAD5E:
	mov r1, #2
	b _021EAD72
_021EAD62:
	mov r1, #3
	b _021EAD72
_021EAD66:
	bl GF_AssertFail
	pop {r3, r4, r5, pc}
_021EAD6C:
	ldr r1, [r4, #0x38]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
_021EAD72:
	bl sub_02024950
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EAD08

	thumb_func_start ov96_021EAD78
ov96_021EAD78: ; 0x021EAD78
	push {r3, lr}
	ldr r0, [r0]
	bl ov96_021E8BAC
	bl sub_02024B68
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAD78

	thumb_func_start ov96_021EAD88
ov96_021EAD88: ; 0x021EAD88
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r5, r0, #0
	add r4, r1, #0
	add r1, sp, #4
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [r5]
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021E8BAC
	str r0, [sp]
	lsl r0, r4, #0xc
	str r0, [sp, #4]
	lsl r0, r6, #0xc
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	add r0, r4, r0
	str r0, [r5, #0x20]
	ldr r0, [r5, #0x18]
	add r0, r6, r0
	str r0, [r5, #0x24]
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021EADF0
	add r4, sp, #4
	ldmia r4!, {r0, r1}
	add r3, sp, #0x10
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	str r0, [r3]
	ldr r0, [r5, #0x14]
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0xc
	add r0, r1, r0
	str r0, [sp, #0x10]
	ldr r1, [r5, #0x18]
	ldr r0, [sp, #0x14]
	lsl r3, r1, #1
	ldr r1, [r5, #0xc]
	sub r1, r3, r1
	lsl r1, r1, #0xc
	add r0, r0, r1
	str r0, [sp, #0x14]
	ldr r0, [r5, #8]
	add r1, r2, #0
	bl sub_020247D4
_021EADF0:
	cmp r7, #0
	beq _021EAE2A
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021EAE2A
	add r4, sp, #4
	ldmia r4!, {r0, r1}
	add r3, sp, #0x10
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	str r0, [r3]
	ldr r0, [r5, #0x14]
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0xc
	add r0, r1, r0
	str r0, [sp, #0x10]
	ldr r1, [r5, #0x18]
	ldr r0, [sp, #0x14]
	lsl r3, r1, #1
	ldr r1, [r5, #0x10]
	sub r1, r3, r1
	lsl r1, r1, #0xc
	add r0, r0, r1
	str r0, [sp, #0x14]
	ldr r0, [r5, #4]
	add r1, r2, #0
	bl sub_020247D4
_021EAE2A:
	ldr r0, [r5]
	bl ov96_021E92AC
	cmp r0, #0
	beq _021EAE3E
	mov r0, #2
	ldr r1, [sp, #8]
	lsl r0, r0, #0xe
	add r0, r1, r0
	str r0, [sp, #8]
_021EAE3E:
	ldr r0, [sp]
	add r1, sp, #4
	bl sub_020247D4
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAD88

	thumb_func_start ov96_021EAE4C
ov96_021EAE4C: ; 0x021EAE4C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r4, r1, #0
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [r5]
	add r6, r2, #0
	bl ov96_021E8BAC
	add r7, r0, #0
	lsl r0, r4, #0xc
	str r0, [sp]
	lsl r0, r6, #0xc
	str r0, [sp, #4]
	ldr r0, [r5, #0x14]
	add r0, r4, r0
	str r0, [r5, #0x20]
	ldr r0, [r5, #0x18]
	add r0, r6, r0
	str r0, [r5, #0x24]
	ldr r0, [r5]
	bl ov96_021E92AC
	cmp r0, #0
	beq _021EAE90
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	add r0, r1, r0
	str r0, [sp, #4]
_021EAE90:
	add r0, r7, #0
	add r1, sp, #0
	bl sub_020247D4
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EAE4C

	thumb_func_start ov96_021EAE9C
ov96_021EAE9C: ; 0x021EAE9C
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r4, r2, #0
	bl ov96_021EAA20
	bl ov96_021E8BAC
	bl sub_020248AC
	ldr r2, [r0]
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	asr r1, r1, #0xc
	str r1, [r5]
	ldr r1, [r0, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [r4]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EAE9C

	thumb_func_start ov96_021EAEC8
ov96_021EAEC8: ; 0x021EAEC8
	ldr r3, [r0, #0x20]
	str r3, [r1]
	ldr r0, [r0, #0x24]
	str r0, [r2]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EAEC8

	thumb_func_start ov96_021EAED4
ov96_021EAED4: ; 0x021EAED4
	push {r4, r5, r6, lr}
	sub sp, #0x18
	add r5, r0, #0
	ldr r0, [r5, #0x20]
	add r6, r3, #0
	add r0, r0, r1
	str r0, [r5, #0x20]
	ldr r0, [r5, #0x24]
	add r0, r0, r2
	str r0, [r5, #0x24]
	lsl r0, r1, #0xc
	str r0, [sp, #0xc]
	lsl r0, r2, #0xc
	str r0, [sp, #0x10]
	mov r0, #0
	str r0, [sp, #0x14]
	ldr r0, [r5]
	bl ov96_021E8BAC
	add r4, r0, #0
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_021EAC0C
	add r0, r4, #0
	bl sub_020248AC
	add r1, r0, #0
	add r0, sp, #0xc
	add r2, sp, #0
	bl VEC_Add
	add r0, r4, #0
	add r1, sp, #0
	bl sub_020247D4
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021EAF38
	bl sub_020248AC
	add r1, r0, #0
	add r0, sp, #0xc
	add r2, sp, #0
	bl VEC_Add
	ldr r0, [r5, #8]
	add r1, sp, #0
	bl sub_020247D4
_021EAF38:
	ldr r0, [sp, #0x28]
	cmp r0, #0
	beq _021EAF5A
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021EAF5A
	bl sub_020248AC
	add r1, r0, #0
	add r0, sp, #0xc
	add r2, sp, #0
	bl VEC_Add
	ldr r0, [r5, #4]
	add r1, sp, #0
	bl sub_020247D4
_021EAF5A:
	add sp, #0x18
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAED4

	thumb_func_start ov96_021EAF60
ov96_021EAF60: ; 0x021EAF60
	push {r3, lr}
	ldr r0, [r0, #0x14]
	bl ov96_021E8BF4
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EAF60

	thumb_func_start ov96_021EAF6C
ov96_021EAF6C: ; 0x021EAF6C
	str r1, [r0, #0x1c]
	bx lr
	thumb_func_end ov96_021EAF6C

	thumb_func_start ov96_021EAF70
ov96_021EAF70: ; 0x021EAF70
	str r1, [r0, #0x2c]
	str r2, [r0, #0x30]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EAF70

	thumb_func_start ov96_021EAF78
ov96_021EAF78: ; 0x021EAF78
	push {r3, r4, r5, lr}
	ldr r4, [sp, #0x10]
	add r5, r0, #0
	str r4, [sp]
	bl ov96_021EB03C
	ldr r1, [r5, #0x30]
	ldr r0, [sp, #0x14]
	str r1, [r0]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EAF78

	thumb_func_start ov96_021EAF8C
ov96_021EAF8C: ; 0x021EAF8C
	ldr r0, [r0, #0x30]
	bx lr
	thumb_func_end ov96_021EAF8C

	thumb_func_start ov96_021EAF90
ov96_021EAF90: ; 0x021EAF90
	ldr r0, [r0, #0x2c]
	bx lr
	thumb_func_end ov96_021EAF90

	thumb_func_start ov96_021EAF94
ov96_021EAF94: ; 0x021EAF94
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r5, r0, #0
	add r4, r1, #0
	add r1, sp, #4
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [r5]
	add r6, r2, #0
	bl ov96_021E8BAC
	add r2, sp, #0x10
	add r3, sp, #4
	str r0, [sp]
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	lsl r0, r4, #0xc
	str r0, [sp, #0x10]
	lsl r0, r6, #0xc
	str r0, [sp, #0x14]
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021EAFD2
	add r1, r7, #0
	bl sub_020247D4
_021EAFD2:
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _021EAFDE
	add r1, sp, #0x10
	bl sub_020247D4
_021EAFDE:
	ldr r0, [r5, #0x10]
	add r1, r6, r0
	ldr r0, [r5, #0x18]
	lsl r0, r0, #1
	sub r0, r1, r0
	ldr r1, [r5, #0x14]
	str r4, [r5, #0x20]
	sub r2, r4, r1
	ldr r1, [r5, #0x18]
	add r1, r0, r1
	str r1, [r5, #0x24]
	lsl r1, r2, #0xc
	lsl r0, r0, #0xc
	str r1, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5]
	bl ov96_021E92AC
	cmp r0, #0
	beq _021EB010
	mov r0, #2
	ldr r1, [sp, #8]
	lsl r0, r0, #0xe
	add r0, r1, r0
	str r0, [sp, #8]
_021EB010:
	ldr r0, [sp]
	add r1, sp, #4
	bl sub_020247D4
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EAF94

	thumb_func_start ov96_021EB01C
ov96_021EB01C: ; 0x021EB01C
	push {r4, r5, r6, lr}
	ldr r5, [r0, #0x14]
	ldr r4, [r0, #0x28]
	sub r1, r1, r5
	ldr r5, [r0, #0x18]
	lsl r5, r5, #1
	sub r6, r5, r4
	lsr r5, r6, #0x1f
	add r5, r6, r5
	asr r5, r5, #1
	add r4, r4, r5
	sub r2, r2, r4
	bl ov96_021EAD88
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB01C

	thumb_func_start ov96_021EB03C
ov96_021EB03C: ; 0x021EB03C
	push {r4, r5, r6, r7}
	add r4, r0, #0
	add r7, r1, #0
	ldr r1, [r4, #0x18]
	add r6, r3, #0
	ldr r3, [r4, #0x28]
	lsl r5, r1, #1
	add r0, r2, #0
	sub r2, r5, r3
	lsr r1, r2, #0x1f
	add r1, r2, r1
	asr r1, r1, #1
	add r1, r3, r1
	lsl r1, r1, #0xc
	sub r0, r0, r1
	ldr r1, [r4, #0x2c]
	sub r1, r5, r1
	lsl r1, r1, #0xc
	add r1, r0, r1
	ldr r0, [sp, #0x10]
	str r7, [r6]
	str r1, [r0]
	pop {r4, r5, r6, r7}
	bx lr
	thumb_func_end ov96_021EB03C

	thumb_func_start ov96_021EB06C
ov96_021EB06C: ; 0x021EB06C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	add r7, r1, #0
	ldr r1, [r4, #4]
	add r0, r2, #0
	add r6, r3, #0
	cmp r1, #0
	bne _021EB082
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
_021EB082:
	ldr r1, [r4, #0x18]
	ldr r3, [r4, #0x28]
	lsl r5, r1, #1
	sub r2, r5, r3
	lsr r1, r2, #0x1f
	add r1, r2, r1
	asr r1, r1, #1
	add r1, r3, r1
	sub r0, r0, r1
	add r1, r0, r5
	ldr r0, [r4, #0x10]
	sub r1, r1, r0
	ldr r0, [sp, #0x18]
	str r7, [r6]
	str r1, [r0]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB06C

	thumb_func_start ov96_021EB0A4
ov96_021EB0A4: ; 0x021EB0A4
	push {r3, r4}
	ldr r4, [r0, #0x10]
	add r4, r2, r4
	ldr r2, [r0, #0x18]
	str r1, [r3]
	ldr r1, [r0, #0x28]
	ldr r0, [r0, #0x18]
	lsl r2, r2, #1
	lsl r0, r0, #1
	sub r3, r0, r1
	lsr r0, r3, #0x1f
	add r0, r3, r0
	sub r2, r4, r2
	asr r0, r0, #1
	add r0, r2, r0
	add r1, r1, r0
	ldr r0, [sp, #8]
	str r1, [r0]
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021EB0A4

	thumb_func_start ov96_021EB0CC
ov96_021EB0CC: ; 0x021EB0CC
	push {r3, r4, lr}
	sub sp, #0x24
	add r4, r0, #0
	lsl r0, r3, #0xc
	str r0, [sp]
	ldr r0, [sp, #0x30]
	str r1, [sp, #0xc]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	mov r0, #0
	str r2, [sp, #0x10]
	str r0, [sp, #8]
	str r0, [sp, #0x14]
	add r0, sp, #0
	add r1, sp, #0xc
	add r2, sp, #0x18
	bl VEC_Subtract
	add r0, sp, #0x18
	bl VEC_Mag
	ldr r1, [r4, #0x1c]
	lsl r1, r1, #0xc
	cmp r0, r1
	bge _021EB104
	add sp, #0x24
	mov r0, #1
	pop {r3, r4, pc}
_021EB104:
	mov r0, #0
	add sp, #0x24
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB0CC

	thumb_func_start ov96_021EB10C
ov96_021EB10C: ; 0x021EB10C
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r4, r2, #0
	bl ov96_021EAA20
	add r1, r5, #0
	add r2, r4, #0
	bl ov96_021E9204
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EB10C

	thumb_func_start ov96_021EB120
ov96_021EB120: ; 0x021EB120
	push {r3, lr}
	ldr r0, [r0]
	bl ov96_021E8BAC
	bl sub_020248B8
	cmp r0, #0
	beq _021EB134
	mov r0, #1
	pop {r3, pc}
_021EB134:
	mov r0, #0
	pop {r3, pc}
	thumb_func_end ov96_021EB120

	thumb_func_start ov96_021EB138
ov96_021EB138: ; 0x021EB138
	ldr r3, _021EB140 ; =ov96_021E9290
	ldr r0, [r0, #0x14]
	bx r3
	nop
_021EB140: .word ov96_021E9290
	thumb_func_end ov96_021EB138

	thumb_func_start ov96_021EB144
ov96_021EB144: ; 0x021EB144
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	mov r4, #0
	cmp r0, #0
	ble _021EB17C
	cmp r1, #0
	bne _021EB158
	mov r6, #1
	b _021EB15A
_021EB158:
	add r6, r4, #0
_021EB15A:
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021EAA04
	bl ov96_021EAA20
	bl ov96_021E8BAC
	add r1, r6, #0
	bl sub_0202484C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [r5, #4]
	cmp r4, r0
	blt _021EB15A
_021EB17C:
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB144

	thumb_func_start ov96_021EB180
ov96_021EB180: ; 0x021EB180
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	mov r1, #0x56
	lsl r1, r1, #2
	add r6, r0, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r2, #0x56
	mov r0, #0
	add r1, r4, #0
	lsl r2, r2, #2
	bl MIi_CpuClearFast
	str r6, [r4]
	add r2, r4, #0
	ldmia r5!, {r0, r1}
	add r2, #8
	stmia r2!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0x14
	str r0, [r2]
	ldr r2, [r4, #0xc]
	add r0, r6, #0
	mul r1, r2
	bl AllocFromHeap
	mov r1, #0x15
	lsl r1, r1, #4
	str r0, [r4, r1]
	ldr r3, [r4, #0xc]
	mov r2, #0x14
	ldr r1, [r4, r1]
	mov r0, #0
	mul r2, r3
	bl sub_020D47EC
	ldr r2, [r4, #8]
	mov r1, #0xc
	ldr r0, [r4]
	mul r1, r2
	bl AllocFromHeap
	mov r1, #0x55
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r3, [r4, #8]
	mov r2, #0xc
	ldr r1, [r4, r1]
	mov r0, #0
	mul r2, r3
	bl sub_020D47EC
	add r1, r4, #0
	ldr r0, [r4, #8]
	ldr r2, [r4]
	add r1, #0x18
	bl sub_02009F40
	mov r7, #5
	str r0, [r4, #0x14]
	mov r5, #0
	add r6, r4, #0
	lsl r7, r7, #6
_021EB200:
	add r0, r4, r5
	ldrb r0, [r0, #0x10]
	ldr r2, [r4]
	add r1, r5, #0
	bl sub_0200A090
	str r0, [r6, r7]
	add r5, r5, #1
	add r6, r6, #4
	cmp r5, #4
	blt _021EB200
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB180

	thumb_func_start ov96_021EB21C
ov96_021EB21C: ; 0x021EB21C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5, #0xc]
	mov r4, #0
	cmp r0, #0
	ble _021EB25E
	mov r7, #0x15
	lsl r7, r7, #4
_021EB22C:
	mov r0, #0x14
	add r6, r4, #0
	mul r6, r0
	ldr r0, [r5, r7]
	add r0, r0, r6
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _021EB240
	bl sub_0200AEB0
_021EB240:
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	add r0, r0, r6
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _021EB252
	bl sub_0200B0A8
_021EB252:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [r5, #0xc]
	cmp r4, r0
	blt _021EB22C
_021EB25E:
	mov r6, #5
	mov r4, #0
	lsl r6, r6, #6
_021EB264:
	lsl r0, r4, #2
	add r0, r5, r0
	ldr r0, [r0, r6]
	bl sub_0200A0D0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021EB264
	ldr r0, [r5, #0x14]
	bl sub_02024504
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl FreeToHeap
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	bl FreeToHeap
	add r0, r5, #0
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB21C

	thumb_func_start ov96_021EB29C
ov96_021EB29C: ; 0x021EB29C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #0xc]
	add r4, r1, #0
	add r6, r2, #0
	cmp r4, r0
	blt _021EB2AE
	bl GF_AssertFail
_021EB2AE:
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r1, [r5, r0]
	mov r0, #0x14
	mul r0, r4
	str r6, [r1, r0]
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021EB29C

	thumb_func_start ov96_021EB2BC
ov96_021EB2BC: ; 0x021EB2BC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #0xc]
	add r1, r3, #0
	mov r2, #0
	add r5, r0, #0
	bl ov96_021EB5EC
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	add r1, r6, #0
	str r0, [sp]
	ldr r0, [sp, #0x28]
	add r2, r7, #0
	str r0, [sp, #4]
	ldr r0, [r5]
	mov r3, #0
	str r0, [sp, #8]
	mov r0, #5
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	bl sub_0200A1D8
	str r0, [r4]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EB2BC

	thumb_func_start ov96_021EB2F4
ov96_021EB2F4: ; 0x021EB2F4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #0x10]
	add r1, r3, #0
	mov r2, #1
	add r5, r0, #0
	bl ov96_021EB5EC
	add r4, r0, #0
	ldr r0, [sp, #0x10]
	add r1, r6, #0
	str r0, [sp]
	ldr r0, [sp, #0x28]
	add r2, r7, #0
	str r0, [sp, #4]
	add r0, sp, #0x18
	ldrb r0, [r0, #0x14]
	mov r3, #0
	str r0, [sp, #8]
	ldr r0, [r5]
	str r0, [sp, #0xc]
	mov r0, #0x51
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_0200A234
	str r0, [r4]
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB2F4

	thumb_func_start ov96_021EB334
ov96_021EB334: ; 0x021EB334
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #0xc]
	add r1, r3, #0
	mov r2, #2
	add r5, r0, #0
	bl ov96_021EB5EC
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	add r1, r6, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5]
	add r2, r7, #0
	str r0, [sp, #8]
	mov r0, #0x52
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r3, #0
	bl sub_0200A294
	str r0, [r4]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EB334

	thumb_func_start ov96_021EB36C
ov96_021EB36C: ; 0x021EB36C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #0xc]
	add r1, r3, #0
	mov r2, #3
	add r5, r0, #0
	bl ov96_021EB5EC
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	add r1, r6, #0
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r5]
	add r2, r7, #0
	str r0, [sp, #8]
	mov r0, #0x53
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r3, #0
	bl sub_0200A294
	str r0, [r4]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EB36C

	thumb_func_start ov96_021EB3A4
ov96_021EB3A4: ; 0x021EB3A4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5, #0xc]
	mov r6, #0
	cmp r0, #0
	ble _021EB3E0
	mov r7, #0x15
	add r4, r6, #0
	lsl r7, r7, #4
_021EB3B6:
	ldr r0, [r5, r7]
	add r0, r0, r4
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _021EB3C4
	bl sub_0200ADA4
_021EB3C4:
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	add r0, r0, r4
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _021EB3D6
	bl sub_0200AF94
_021EB3D6:
	ldr r0, [r5, #0xc]
	add r6, r6, #1
	add r4, #0x14
	cmp r6, r0
	blt _021EB3B6
_021EB3E0:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB3A4

	thumb_func_start ov96_021EB3E4
ov96_021EB3E4: ; 0x021EB3E4
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r6, sp, #8
	ldrb r6, [r6, #0x10]
	add r5, r0, #0
	add r4, r3, #0
	str r6, [sp]
	bl ov96_021EB408
	add r2, sp, #8
	ldrb r2, [r2, #0x10]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021EB4F4
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB3E4

	thumb_func_start ov96_021EB408
ov96_021EB408: ; 0x021EB408
	push {r4, r5, r6, r7, lr}
	sub sp, #0x84
	add r5, r0, #0
	str r3, [sp, #0x2c]
	add r4, r1, #0
	ldr r1, [r5, #4]
	ldr r0, [r5, #8]
	add r6, r2, #0
	cmp r1, r0
	blt _021EB420
	bl GF_AssertFail
_021EB420:
	ldr r0, [sp, #0x2c]
	mov r2, #5
	str r0, [sp]
	mov r0, #0
	mvn r0, r0
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	str r4, [sp, #0x10]
	lsl r2, r2, #6
	ldr r1, [r5, r2]
	str r1, [sp, #0x14]
	add r1, r2, #4
	ldr r1, [r5, r1]
	str r1, [sp, #0x18]
	add r1, r2, #0
	add r1, #8
	ldr r1, [r5, r1]
	add r2, #0xc
	str r1, [sp, #0x1c]
	ldr r1, [r5, r2]
	str r1, [sp, #0x20]
	str r0, [sp, #0x24]
	str r0, [sp, #0x28]
	ldr r1, [sp, #0x2c]
	add r0, sp, #0x60
	add r2, r1, #0
	add r3, r1, #0
	bl sub_02009D48
	ldr r0, [r5, #0x14]
	mov r1, #0
	str r0, [sp, #0x30]
	add r0, sp, #0x60
	str r0, [sp, #0x34]
	ldr r0, [r5]
	str r0, [sp, #0x5c]
	mov r0, #1
	lsl r0, r0, #0xc
	str r1, [sp, #0x38]
	str r1, [sp, #0x3c]
	str r1, [sp, #0x40]
	str r0, [sp, #0x44]
	str r0, [sp, #0x48]
	str r0, [sp, #0x4c]
	add r0, sp, #0x30
	strh r1, [r0, #0x20]
	add r0, sp, #0x30
	str r1, [sp, #0x54]
	str r6, [sp, #0x58]
	bl sub_02024624
	add r4, r0, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	mov r7, #0x55
	ldr r1, [r5, #4]
	lsl r7, r7, #2
	ldr r3, [r5, r7]
	mov r0, #0xc
	add r2, r1, #0
	mov r6, #0
	mul r2, r0
	strh r6, [r3, r2]
	ldr r1, [r5, #4]
	ldr r3, [r5, r7]
	add r2, r1, #0
	mul r2, r0
	add r1, r3, r2
	strh r6, [r1, #2]
	ldr r1, [r5, #4]
	ldr r3, [r5, r7]
	add r2, r1, #0
	mul r2, r0
	add r1, r3, r2
	str r4, [r1, #4]
	add r1, sp, #0x88
	ldrb r6, [r1, #0x10]
	ldr r1, [r5, #4]
	ldr r3, [r5, r7]
	add r2, r1, #0
	mul r2, r0
	add r1, r3, r2
	strh r6, [r1, #8]
	ldr r1, [r5, #4]
	ldr r2, [r5, r7]
	mul r0, r1
	add r1, r2, r0
	ldr r0, [sp, #0x2c]
	strh r0, [r1, #0xa]
	ldr r0, [r5, #4]
	add r0, r0, #1
	str r0, [r5, #4]
	add r0, r4, #0
	add sp, #0x84
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EB408

	thumb_func_start ov96_021EB4F4
ov96_021EB4F4: ; 0x021EB4F4
	push {r3, r4, r5, lr}
	ldr r4, [r0, #8]
	mov r3, #0
	cmp r4, #0
	ble _021EB524
	mov r5, #0x55
	lsl r5, r5, #2
	ldr r0, [r0, r5]
_021EB504:
	ldrh r5, [r0]
	cmp r5, #0
	bne _021EB51C
	ldrh r5, [r0, #0xa]
	cmp r5, r1
	bne _021EB51C
	ldrh r5, [r0, #8]
	cmp r5, r2
	bne _021EB51C
	mov r1, #1
	strh r1, [r0]
	pop {r3, r4, r5, pc}
_021EB51C:
	add r3, r3, #1
	add r0, #0xc
	cmp r3, r4
	blt _021EB504
_021EB524:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EB4F4

	thumb_func_start ov96_021EB52C
ov96_021EB52C: ; 0x021EB52C
	push {r3, lr}
	ldrh r3, [r0]
	cmp r3, #0
	beq _021EB55C
	cmp r1, #0
	beq _021EB550
	mov r1, #1
	strh r1, [r0, #2]
	cmp r2, #0
	ldr r0, [r0, #4]
	beq _021EB548
	bl sub_02024830
	pop {r3, pc}
_021EB548:
	mov r1, #0
	bl sub_02024830
	pop {r3, pc}
_021EB550:
	mov r1, #0
	strh r1, [r0, #2]
	ldr r0, [r0, #4]
	bl sub_02024830
	pop {r3, pc}
_021EB55C:
	bl GF_AssertFail
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB52C

	thumb_func_start ov96_021EB564
ov96_021EB564: ; 0x021EB564
	ldr r3, _021EB56C ; =sub_020248F0
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB56C: .word sub_020248F0
	thumb_func_end ov96_021EB564

	thumb_func_start ov96_021EB570
ov96_021EB570: ; 0x021EB570
	ldr r3, _021EB578 ; =sub_02024950
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB578: .word sub_02024950
	thumb_func_end ov96_021EB570

	thumb_func_start ov96_021EB57C
ov96_021EB57C: ; 0x021EB57C
	ldr r3, _021EB584 ; =sub_02024B68
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB584: .word sub_02024B68
	thumb_func_end ov96_021EB57C

	thumb_func_start ov96_021EB588
ov96_021EB588: ; 0x021EB588
	ldr r3, _021EB590 ; =sub_020247D4
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB590: .word sub_020247D4
	thumb_func_end ov96_021EB588

	thumb_func_start ov96_021EB594
ov96_021EB594: ; 0x021EB594
	ldr r3, _021EB59C ; =sub_020248AC
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB59C: .word sub_020248AC
	thumb_func_end ov96_021EB594

	thumb_func_start ov96_021EB5A0
ov96_021EB5A0: ; 0x021EB5A0
	ldr r3, _021EB5A8 ; =sub_02024804
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB5A8: .word sub_02024804
	thumb_func_end ov96_021EB5A0

	thumb_func_start ov96_021EB5AC
ov96_021EB5AC: ; 0x021EB5AC
	ldr r3, _021EB5B4 ; =sub_0202481C
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB5B4: .word sub_0202481C
	thumb_func_end ov96_021EB5AC

	thumb_func_start ov96_021EB5B8
ov96_021EB5B8: ; 0x021EB5B8
	ldr r0, [r0, #4]
	bx lr
	thumb_func_end ov96_021EB5B8

	thumb_func_start ov96_021EB5BC
ov96_021EB5BC: ; 0x021EB5BC
	ldr r3, _021EB5C4 ; =sub_0202457C
	ldr r0, [r0, #0x14]
	bx r3
	nop
_021EB5C4: .word sub_0202457C
	thumb_func_end ov96_021EB5BC

	thumb_func_start ov96_021EB5C8
ov96_021EB5C8: ; 0x021EB5C8
	push {r4, r5, r6, lr}
	add r6, r2, #0
	add r5, r0, #0
	add r4, r1, #0
	ldr r2, [sp, #0x10]
	add r0, #0x18
	add r1, r3, #0
	bl sub_02009FC8
	add r5, #0x18
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	bl sub_02009FA8
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021EB5C8

	thumb_func_start ov96_021EB5E8
ov96_021EB5E8: ; 0x021EB5E8
	ldr r0, [r0, #0x14]
	bx lr
	thumb_func_end ov96_021EB5E8

	thumb_func_start ov96_021EB5EC
ov96_021EB5EC: ; 0x021EB5EC
	push {r4, r5, r6, lr}
	add r6, r2, #0
	add r5, r0, #0
	add r4, r1, #0
	cmp r6, #4
	blo _021EB5FC
	bl GF_AssertFail
_021EB5FC:
	ldr r2, [r5, #0xc]
	mov r0, #0
	cmp r2, #0
	ble _021EB628
	mov r1, #0x15
	lsl r1, r1, #4
	ldr r1, [r5, r1]
	add r5, r1, #0
_021EB60C:
	ldr r3, [r5]
	cmp r4, r3
	bne _021EB620
	mov r2, #0x14
	mul r2, r0
	add r0, r1, r2
	add r1, r0, #4
	lsl r0, r6, #2
	add r0, r1, r0
	pop {r4, r5, r6, pc}
_021EB620:
	add r0, r0, #1
	add r5, #0x14
	cmp r0, r2
	blt _021EB60C
_021EB628:
	bl GF_AssertFail
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021EB5EC

	thumb_func_start ov96_021EB630
ov96_021EB630: ; 0x021EB630
	ldr r3, _021EB638 ; =sub_02024ADC
	ldr r0, [r0, #4]
	bx r3
	nop
_021EB638: .word sub_02024ADC
	thumb_func_end ov96_021EB630

	thumb_func_start ov96_021EB63C
ov96_021EB63C: ; 0x021EB63C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5, #8]
	mov r6, #0
	cmp r0, #0
	ble _021EB676
	add r4, r6, #0
	cmp r1, #0
	bne _021EB652
	mov r7, #1
	b _021EB654
_021EB652:
	add r7, r6, #0
_021EB654:
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	ldrh r0, [r1, r4]
	cmp r0, #0
	beq _021EB66C
	add r0, r1, r4
	bl ov96_021EB5B8
	add r1, r7, #0
	bl sub_0202484C
_021EB66C:
	ldr r0, [r5, #8]
	add r6, r6, #1
	add r4, #0xc
	cmp r6, r0
	blt _021EB654
_021EB676:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EB63C

	thumb_func_start ov96_021EB678
ov96_021EB678: ; 0x021EB678
	ldr r3, _021EB67C ; =ov96_021ED1D0
	bx r3
	.balign 4, 0
_021EB67C: .word ov96_021ED1D0
	thumb_func_end ov96_021EB678

	thumb_func_start ov96_021EB680
ov96_021EB680: ; 0x021EB680
	ldr r3, _021EB684 ; =ov96_021ED47C
	bx r3
	.balign 4, 0
_021EB684: .word ov96_021ED47C
	thumb_func_end ov96_021EB680

	thumb_func_start ov96_021EB688
ov96_021EB688: ; 0x021EB688
	ldr r3, _021EB68C ; =ov96_021ED48C
	bx r3
	.balign 4, 0
_021EB68C: .word ov96_021ED48C
	thumb_func_end ov96_021EB688

	thumb_func_start ov96_021EB690
ov96_021EB690: ; 0x021EB690
	ldr r3, _021EB694 ; =ov96_021ED1D0
	bx r3
	.balign 4, 0
_021EB694: .word ov96_021ED1D0
	thumb_func_end ov96_021EB690

	thumb_func_start ov96_021EB698
ov96_021EB698: ; 0x021EB698
	ldr r3, _021EB69C ; =ov96_021ED47C
	bx r3
	.balign 4, 0
_021EB69C: .word ov96_021ED47C
	thumb_func_end ov96_021EB698

	thumb_func_start ov96_021EB6A0
ov96_021EB6A0: ; 0x021EB6A0
	ldr r3, _021EB6A4 ; =ov96_021ED48C
	bx r3
	.balign 4, 0
_021EB6A4: .word ov96_021ED48C
	thumb_func_end ov96_021EB6A0

	thumb_func_start ov96_021EB6A8
ov96_021EB6A8: ; 0x021EB6A8
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021EB6C4 ; =0x0221B030
	add r3, sp, #0
	mov r2, #5
_021EB6B2:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021EB6B2
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021EB6C4: .word 0x0221B030
	thumb_func_end ov96_021EB6A8

	thumb_func_start ov96_021EB6C8
ov96_021EB6C8: ; 0x021EB6C8
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _021EB6E2
	cmp r0, #1
	beq _021EB712
	b _021EB724
_021EB6E2:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021EB6F2
	add r0, r5, #0
	bl ov96_021ED8DC
_021EB6F2:
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #4
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EB728
_021EB712:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EB728
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _021EB728
_021EB724:
	bl GF_AssertFail
_021EB728:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EB6C8

	thumb_func_start ov96_021EB730
ov96_021EB730: ; 0x021EB730
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp, #0xc]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	mov r5, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021EB750
	ldr r0, [sp, #0xc]
	bl ov96_021EE324
	add r5, r0, #0
_021EB750:
	ldr r0, [r4, #0xc]
	bl ov96_021EE830
	ldr r0, [r4, #0xc]
	bl ov96_021EEA80
	cmp r0, #0
	bne _021EB764
	cmp r5, #0
	beq _021EB766
_021EB764:
	b _021EB9AE
_021EB766:
	ldr r0, [r4, #0xc]
	bl ov96_021EE97C
	add r1, r4, #0
	add r1, #0xb5
	mov r5, #0
	ldrb r1, [r1]
	add r6, r0, #0
	mvn r5, r5
	cmp r1, #8
	bls _021EB77E
	b _021EB98C
_021EB77E:
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EB78A: ; jump table
	.short _021EB79C - _021EB78A - 2 ; case 0
	.short _021EB7B4 - _021EB78A - 2 ; case 1
	.short _021EB7CA - _021EB78A - 2 ; case 2
	.short _021EB7F6 - _021EB78A - 2 ; case 3
	.short _021EB816 - _021EB78A - 2 ; case 4
	.short _021EB82A - _021EB78A - 2 ; case 5
	.short _021EB882 - _021EB78A - 2 ; case 6
	.short _021EB918 - _021EB78A - 2 ; case 7
	.short _021EB94A - _021EB78A - 2 ; case 8
_021EB79C:
	add r2, r4, #0
	add r2, #0xb1
	ldrb r2, [r2]
	mov r5, #0
	add r1, r5, #0
	bl sub_0200C944
	add r0, r4, #0
	mov r1, #1
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB7B4:
	lsr r0, r5, #0x11
	bl sub_0200FC20
	ldr r0, _021EBA8C ; =0x000008DC
	bl PlaySE
	add r0, r4, #0
	mov r1, #2
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB7CA:
	add r0, r4, #0
	add r0, #0xb4
	ldrb r0, [r0]
	cmp r0, #4
	bhs _021EB7E4
	add r0, r4, #0
	add r0, #0xb4
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	b _021EB990
_021EB7E4:
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb4
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #3
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB7F6:
	mov r0, #0x18
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #8]
	mov r0, #0
	lsr r3, r5, #0x11
	bl sub_0200FA24
	add r0, r4, #0
	mov r1, #4
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB816:
	bl sub_0200FB5C
	cmp r0, #0
	bne _021EB820
	b _021EB990
_021EB820:
	add r0, r4, #0
	mov r1, #5
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB82A:
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021E5D40
	ldr r0, [r0]
	cmp r0, #0
	ble _021EB852
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021ED838
	add r1, r0, #0
	ldr r0, [r4, #0xc]
	bl ov96_021EE908
	b _021EB878
_021EB852:
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021ED838
	add r1, r4, #0
	add r1, #0xb2
	add r5, r0, #0
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021ED86C
	add r1, r0, #0
	add r0, r6, #0
	mov r2, #7
	mov r3, #1
	bl ov96_021EDF3C
_021EB878:
	add r0, r4, #0
	mov r1, #6
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB882:
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r6, #0
	mov r1, #0
	bl BufferPlayersName
	mov r5, #0
_021EB89A:
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	lsl r2, r5, #0x18
	ldr r0, [sp, #0xc]
	lsr r2, r2, #0x18
	add r3, r5, #1
	bl ov96_021ED524
	add r5, r5, #1
	cmp r5, #3
	blt _021EB89A
	ldr r0, [r4]
	add r2, r4, #0
	str r0, [sp]
	add r2, #0xb2
	add r0, r4, #0
	ldrb r2, [r2]
	ldr r1, [sp, #0xc]
	add r0, #0x20
	mov r3, #2
	bl ov96_021ECB38
	add r0, r4, #0
	add r0, #0xb2
	ldrb r0, [r0]
	mov r1, #1
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #0x20]
	bl sub_0200DC4C
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldr r0, [sp, #0xc]
	bl ov96_021ED8A4
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	cmp r1, #5
	bhs _021EB8F2
	ldr r0, _021EBA8C ; =0x000008DC
	b _021EB8F4
_021EB8F2:
	ldr r0, _021EBA90 ; =0x000008DD
_021EB8F4:
	lsl r2, r1, #2
	ldr r1, _021EBA94 ; =0x0221B088
	lsl r0, r0, #0x10
	ldr r1, [r1, r2]
	lsr r0, r0, #0x10
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	bl sub_02006134
	add r0, r4, #0
	mov r5, #1
	add r0, #0xb0
	strb r5, [r0]
	add r0, r4, #0
	mov r1, #7
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB918:
	add r0, r4, #0
	add r0, #0xb0
	ldrb r0, [r0]
	cmp r0, #0
	bne _021EB990
	add r0, r4, #0
	add r0, #0xb2
	ldrb r0, [r0]
	cmp r0, #4
	blo _021EB940
	add r0, r4, #0
	mov r1, #1
	add r0, #0xb8
	str r1, [r0]
	add r0, r4, #0
	mov r1, #8
	add r0, #0xb5
	mov r5, #2
	strb r1, [r0]
	b _021EB990
_021EB940:
	add r0, r4, #0
	mov r1, #5
	add r0, #0xb5
	strb r1, [r0]
	b _021EB990
_021EB94A:
	ldr r0, [sp, #0xc]
	bl ov96_021E5EE8
	cmp r0, #0
	beq _021EB95E
	ldr r0, [sp, #0xc]
	bl ov96_021EE54C
	cmp r0, #0
	beq _021EB990
_021EB95E:
	add r0, r4, #0
	bl ov96_021EC2E0
	cmp r0, #0
	beq _021EB978
	add r0, r4, #0
	add r0, #0x88
	ldr r0, [r0]
	bl FreeToHeap
	ldr r0, [r4, #8]
	bl sub_0200E390
_021EB978:
	ldr r0, [r4, #0xc]
	bl ov96_021EE944
	ldr r0, [sp, #0xc]
	mov r1, #2
	bl ov96_021E5FC8
	add sp, #0x14
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021EB98C:
	bl GF_AssertFail
_021EB990:
	mov r0, #0
	mvn r0, r0
	cmp r5, r0
	beq _021EB9AE
	ldr r0, [r4, #0xc]
	add r1, r5, #0
	bl ov96_021EE8CC
	add r0, r4, #0
	add r0, #0xb7
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb7
	strb r1, [r0]
_021EB9AE:
	add r0, r4, #0
	add r0, #0xb0
	ldrb r0, [r0]
	cmp r0, #0
	beq _021EBA86
	add r0, r4, #0
	add r0, #0xb2
	ldrb r1, [r0]
	add r2, r4, #0
	add r2, #0x94
	lsl r0, r1, #1
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r4, #0
	ldr r2, [r2]
	add r0, #0x94
	ldr r1, [r0]
	add r3, r2, #1
	add r2, r4, #0
	add r0, r4, #0
	add r2, #0x94
	add r0, #0x94
	str r3, [r2]
	cmp r1, #0
	bne _021EBA08
	mov r5, #0
_021EB9E4:
	lsl r1, r6, #0x18
	ldr r0, [r4, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r7, r0, #0
	mov r1, #2
	bl ov96_021EAC0C
	add r0, r7, #0
	mov r1, #0x10
	bl ov96_021EAC5C
	add r5, r5, #1
	add r6, r6, #1
	cmp r5, #3
	blt _021EB9E4
	b _021EBA86
_021EBA08:
	add r1, r4, #0
	add r1, #0x94
	ldr r2, [r1]
	ldr r1, [r0]
	add r1, r1, #1
	str r1, [r0]
	cmp r2, #0x3c
	blt _021EBA86
	mov r5, #0
	str r5, [sp, #0x10]
_021EBA1C:
	lsl r1, r6, #0x18
	ldr r0, [r4, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r7, r0, #0
	mov r1, #1
	bl ov96_021EAC0C
	add r0, r7, #0
	mov r1, #0
	bl ov96_021EAC5C
	add r0, r7, #0
	bl ov96_021EAA20
	bl ov96_021E8BAC
	bl sub_02024CB8
	lsl r1, r5, #0xc
	str r1, [r0, #0x10]
	ldr r0, [sp, #0x10]
	add r6, r6, #1
	add r0, r0, #1
	add r5, r5, #3
	str r0, [sp, #0x10]
	cmp r0, #3
	blt _021EBA1C
	ldr r0, [r4]
	add r2, r4, #0
	str r0, [sp]
	add r2, #0xb2
	add r0, r4, #0
	ldrb r2, [r2]
	ldr r1, [sp, #0xc]
	add r0, #0x20
	mov r3, #1
	bl ov96_021ECB38
	add r0, r4, #0
	mov r2, #0
	add r0, #0xb0
	strb r2, [r0]
	add r0, r4, #0
	add r0, #0xb2
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb2
	strb r1, [r0]
	add r4, #0x94
	str r2, [r4]
_021EBA86:
	mov r0, #0
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021EBA8C: .word 0x000008DC
_021EBA90: .word 0x000008DD
_021EBA94: .word 0x0221B088
	thumb_func_end ov96_021EB730

	thumb_func_start ov96_021EBA98
ov96_021EBA98: ; 0x021EBA98
	push {r3, r4, lr}
	sub sp, #0xc
	add r4, r1, #0
	ldrb r1, [r4]
	cmp r1, #0
	beq _021EBAAA
	cmp r1, #1
	beq _021EBADA
	b _021EBAE8
_021EBAAA:
	bl ov96_021E5DCC
	mov r1, #0x5a
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	ldr r3, _021EBAF4 ; =0x00007FFF
	add r1, r0, #0
	add r2, r0, #0
	bl sub_0200FA24
	mov r0, #0
	mov r1, #0x5a
	bl sub_02005F50
	ldr r0, _021EBAF8 ; =0x000008DD
	bl PlaySE
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EBAEC
_021EBADA:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EBAEC
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_021EBAE8:
	bl GF_AssertFail
_021EBAEC:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	nop
_021EBAF4: .word 0x00007FFF
_021EBAF8: .word 0x000008DD
	thumb_func_end ov96_021EBA98

	thumb_func_start ov96_021EBAFC
ov96_021EBAFC: ; 0x021EBAFC
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _021EBB16
	cmp r0, #1
	beq _021EBB46
	b _021EBB58
_021EBB16:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021EBB26
	add r0, r5, #0
	bl ov96_021EDA58
_021EBB26:
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	add r3, r0, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EBB5C
_021EBB46:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EBB5C
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _021EBB5C
_021EBB58:
	bl GF_AssertFail
_021EBB5C:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EBAFC

	thumb_func_start ov96_021EBB64
ov96_021EBB64: ; 0x021EBB64
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, #0x8c
	ldr r0, [r0]
	mov r5, #0
	bl ov96_021ECBFC
	add r0, r4, #0
	add r0, #0x90
	ldr r0, [r0]
	bl ov96_021ED0C8
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021EBB96
	add r0, r6, #0
	bl ov96_021EE440
	add r5, r0, #0
_021EBB96:
	ldr r0, [r4, #0xc]
	bl ov96_021EE830
	ldr r0, [r4, #0xc]
	bl ov96_021EEA80
	cmp r0, #0
	bne _021EBBAA
	cmp r5, #0
	beq _021EBBAC
_021EBBAA:
	b _021EC1A4
_021EBBAC:
	ldr r0, [r4, #0xc]
	bl ov96_021EE97C
	add r1, r4, #0
	add r1, #0xb5
	mov r7, #0
	ldrb r1, [r1]
	add r5, r0, #0
	mvn r7, r7
	cmp r1, #0x16
	bls _021EBBC4
	b _021EC184
_021EBBC4:
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021EBBD0: ; jump table
	.short _021EBBFE - _021EBBD0 - 2 ; case 0
	.short _021EBC0A - _021EBBD0 - 2 ; case 1
	.short _021EBC16 - _021EBBD0 - 2 ; case 2
	.short _021EBC40 - _021EBBD0 - 2 ; case 3
	.short _021EBC84 - _021EBBD0 - 2 ; case 4
	.short _021EBCA6 - _021EBBD0 - 2 ; case 5
	.short _021EBCF8 - _021EBBD0 - 2 ; case 6
	.short _021EBD04 - _021EBBD0 - 2 ; case 7
	.short _021EBD58 - _021EBBD0 - 2 ; case 8
	.short _021EBD78 - _021EBBD0 - 2 ; case 9
	.short _021EBD8C - _021EBBD0 - 2 ; case 10
	.short _021EBDDE - _021EBBD0 - 2 ; case 11
	.short _021EBDFA - _021EBBD0 - 2 ; case 12
	.short _021EBEA0 - _021EBBD0 - 2 ; case 13
	.short _021EBEE4 - _021EBBD0 - 2 ; case 14
	.short _021EBEF8 - _021EBBD0 - 2 ; case 15
	.short _021EBF34 - _021EBBD0 - 2 ; case 16
	.short _021EBF44 - _021EBBD0 - 2 ; case 17
	.short _021EC008 - _021EBBD0 - 2 ; case 18
	.short _021EC07E - _021EBBD0 - 2 ; case 19
	.short _021EC126 - _021EBBD0 - 2 ; case 20
	.short _021EC142 - _021EBBD0 - 2 ; case 21
	.short _021EBFD6 - _021EBBD0 - 2 ; case 22
_021EBBFE:
	add r0, r4, #0
	mov r1, #1
	add r0, #0xb5
	mov r7, #3
	strb r1, [r0]
	b _021EC188
_021EBC0A:
	add r0, r4, #0
	mov r1, #2
	add r0, #0xb5
	mov r7, #4
	strb r1, [r0]
	b _021EC188
_021EBC16:
	mov r5, #0
_021EBC18:
	lsl r1, r5, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_021ED6F8
	add r2, r0, #0
	add r0, r4, #0
	add r0, #0x8c
	lsl r1, r5, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021ECC38
	add r5, r5, #1
	cmp r5, #4
	blt _021EBC18
	add r0, r4, #0
	mov r1, #3
	add r0, #0xb5
	strb r1, [r0]
_021EBC40:
	add r0, r4, #0
	add r0, #0xb2
	ldrb r1, [r0]
	cmp r1, #4
	blo _021EBC5E
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb2
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #4
	add r0, #0xb5
	mov r7, #6
	strb r1, [r0]
	b _021EC188
_021EBC5E:
	add r0, r6, #0
	mov r7, #5
	bl ov96_021ED6F8
	add r1, r4, #0
	add r1, #0xb2
	add r2, r0, #0
	ldrb r1, [r1]
	add r0, r6, #0
	bl ov96_021ED578
	add r0, r4, #0
	add r0, #0xb2
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb2
	strb r1, [r0]
	b _021EC188
_021EBC84:
	add r0, r6, #0
	bl ov96_021ED5E0
	cmp r0, #0
	beq _021EBC9A
	add r0, r4, #0
	mov r1, #5
	add r0, #0xb5
	mov r7, #7
	strb r1, [r0]
	b _021EC188
_021EBC9A:
	add r0, r4, #0
	mov r1, #6
	add r0, #0xb5
	mov r7, #9
	strb r1, [r0]
	b _021EC188
_021EBCA6:
	add r0, r4, #0
	bl ov96_021EC2E0
	cmp r0, #0
	bne _021EBD0E
	add r0, r6, #0
	bl ov96_021ED754
	add r1, r4, #0
	add r1, #0xb4
	ldrb r1, [r1]
	cmp r1, r0
	blo _021EBCE0
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb2
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb3
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #6
	add r0, #0xb5
	mov r7, #0xa
	strb r1, [r0]
	b _021EC188
_021EBCE0:
	add r0, r4, #0
	bl ov96_021ED748
	add r2, r0, #0
	ldr r1, _021EBFF0 ; =ov96_021ED618
	add r0, r6, #0
	bl ov96_021EDDA4
	cmp r0, #0
	beq _021EBD0E
	mov r7, #8
	b _021EC188
_021EBCF8:
	add r0, r4, #0
	mov r1, #7
	add r0, #0xb5
	mov r7, #0xb
	strb r1, [r0]
	b _021EC188
_021EBD04:
	add r0, r4, #0
	bl ov96_021EC2E0
	cmp r0, #0
	beq _021EBD10
_021EBD0E:
	b _021EC188
_021EBD10:
	add r0, r6, #0
	bl ov96_021ED78C
	add r1, r4, #0
	add r1, #0xb4
	ldrb r1, [r1]
	cmp r1, r0
	blo _021EBD40
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb2
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb3
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #8
	add r0, #0xb5
	mov r7, #0xa
	strb r1, [r0]
	b _021EC188
_021EBD40:
	add r0, r4, #0
	bl ov96_021ED74C
	add r2, r0, #0
	ldr r1, _021EBFF4 ; =ov96_021ED660
	add r0, r6, #0
	bl ov96_021EDDA4
	cmp r0, #0
	beq _021EBE20
	mov r7, #0xc
	b _021EC188
_021EBD58:
	add r0, r6, #0
	bl ov96_021EDCB4
	cmp r0, #4
	beq _021EBD6E
	add r0, r4, #0
	mov r1, #9
	add r0, #0xb5
	mov r7, #0xe
	strb r1, [r0]
	b _021EC188
_021EBD6E:
	add r0, r4, #0
	mov r1, #0xb
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBD78:
	add r0, r6, #0
	bl ov96_021EDCB4
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #0xa
	add r0, #0xb5
	add r7, #0xf
	strb r1, [r0]
	b _021EC188
_021EBD8C:
	add r0, r4, #0
	bl ov96_021EC2E0
	cmp r0, #0
	bne _021EBE20
	add r0, r6, #0
	bl ov96_021ED7C4
	add r1, r4, #0
	add r1, #0xb4
	ldrb r1, [r1]
	cmp r1, r0
	blo _021EBDC6
	add r0, r4, #0
	mov r1, #0
	add r0, #0xb2
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb3
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #0xb
	add r0, #0xb5
	mov r7, #0x15
	strb r1, [r0]
	b _021EC188
_021EBDC6:
	add r0, r4, #0
	bl ov96_021ED750
	add r2, r0, #0
	ldr r1, _021EBFF8 ; =ov96_021ED6A8
	add r0, r6, #0
	bl ov96_021EDDA4
	cmp r0, #0
	beq _021EBE20
	mov r7, #0x14
	b _021EC188
_021EBDDE:
	add r0, r4, #0
	mov r1, #0xc
	add r0, #0xb5
	mov r7, #0x16
	strb r1, [r0]
	bl sub_02004A90
	mov r1, #0x10
	bl sub_02005EB4
	ldr r0, _021EBFFC ; =0x000006EE
	bl PlaySE
	b _021EC188
_021EBDFA:
	add r0, r4, #0
	add r0, #0x8c
	ldr r0, [r0]
	bl ov96_021ECC14
	cmp r0, #0
	beq _021EBE20
	add r1, r4, #0
	add r1, #0x94
	add r0, r4, #0
	ldr r1, [r1]
	add r0, #0x94
	add r2, r1, #1
	add r1, r4, #0
	ldr r0, [r0]
	add r1, #0x94
	str r2, [r1]
	cmp r0, #0x1e
	bgt _021EBE22
_021EBE20:
	b _021EC188
_021EBE22:
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #0
	bne _021EBE30
	mov r0, #3
	b _021EBE32
_021EBE30:
	mov r0, #4
_021EBE32:
	add r1, r4, #0
	mov r3, #0
	add r1, #0x94
	str r3, [r1]
	add r1, r4, #0
	add r1, #0xb4
	lsl r0, r0, #0x18
	ldrb r1, [r1]
	lsr r0, r0, #0x18
	cmp r1, r0
	blo _021EBE58
	add r0, r4, #0
	add r0, #0xb4
	strb r3, [r0]
	add r0, r4, #0
	mov r1, #0xd
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBE58:
	add r0, r5, #0
	add r1, r1, #1
	mov r2, #1
	mov r7, #0x17
	bl ov96_021EDF3C
	mov r5, #0
_021EBE66:
	add r2, r4, #0
	add r2, #0xb4
	ldrb r2, [r2]
	lsl r1, r5, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_021ED728
	add r2, r0, #0
	add r0, r4, #0
	add r0, #0x8c
	lsl r1, r5, #0x18
	lsl r2, r2, #0x10
	ldr r0, [r0]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021ECC38
	add r5, r5, #1
	cmp r5, #4
	blt _021EBE66
	add r0, r4, #0
	add r0, #0xb4
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	b _021EC188
_021EBEA0:
	add r0, r6, #0
	add r1, sp, #0x14
	bl ov96_021ED7FC
	add r0, r4, #0
	add r0, #0x8c
	add r1, r4, #0
	ldr r0, [r0]
	add r1, #0x9c
	add r2, sp, #0x14
	bl ov96_021ECC7C
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	lsl r0, r0, #8
	lsr r1, r0, #0x18
	add r0, r4, #0
	add r0, #0xa0
	ldr r0, [r0]
	lsl r0, r0, #8
	lsr r0, r0, #0x18
	cmp r1, r0
	bne _021EBEDA
	add r0, r4, #0
	mov r1, #0xe
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBEDA:
	add r0, r4, #0
	mov r1, #0xf
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBEE4:
	add r0, r4, #0
	add r0, #0x9c
	mov r7, #0x18
	bl ov96_021EE290
	add r0, r4, #0
	mov r1, #0xf
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBEF8:
	add r1, r4, #0
	add r1, #0x9c
	ldr r1, [r1]
	add r0, r4, #0
	lsl r1, r1, #4
	add r0, #0x8c
	lsr r1, r1, #0x1c
	lsl r1, r1, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	mov r7, #0x19
	bl ov96_021ECC4C
	add r1, r0, #0
	add r0, r5, #0
	mov r2, #3
	mov r3, #0
	bl ov96_021EDF3C
	add r1, r4, #0
	add r1, #0x8c
	ldr r1, [r1]
	add r0, r6, #0
	bl ov96_021EDE64
	add r0, r4, #0
	mov r1, #0x10
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBF34:
	ldr r0, [r4, #4]
	ldr r1, [r4]
	bl ov96_021EC458
	add r0, r4, #0
	mov r1, #0x11
	add r0, #0xb5
	strb r1, [r0]
_021EBF44:
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	mov r7, #0x1a
	lsl r0, r0, #4
	lsr r0, r0, #0x1c
	str r0, [sp, #0xc]
	ldr r1, [sp, #0xc]
	add r0, r6, #0
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r5, #0
	mov r1, #0
	bl BufferPlayersName
	ldr r1, [sp, #0xc]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021ECA70
	add r0, r4, #0
	add r0, #0x90
	ldr r0, [r0]
	mov r1, #1
	bl ov96_021ED158
	ldr r0, [r4]
	ldr r2, [sp, #0xc]
	str r0, [sp]
	add r0, r4, #0
	add r0, #0x20
	add r1, r6, #0
	mov r3, #2
	bl ov96_021ECB38
	ldr r0, [sp, #0xc]
	mov r1, #1
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #0x20]
	bl sub_0200DC4C
	ldr r0, _021EBFFC ; =0x000006EE
	mov r1, #0
	bl sub_02006154
	ldr r0, _021EC000 ; =0x000008E2
	bl PlaySE
	mov r0, #0x8e
	lsl r0, r0, #4
	bl PlaySE
	ldr r0, _021EC004 ; =0x00000476
	bl sub_02005D48
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	cmp r0, #0xa
	bne _021EBFCC
	add r0, r4, #0
	mov r1, #0x16
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBFCC:
	add r0, r4, #0
	mov r1, #0x12
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EBFD6:
	add r2, r4, #0
	add r2, #0xb1
	ldrb r2, [r2]
	mov r1, #0
	mov r7, #0x1e
	bl sub_0200C944
	add r0, r4, #0
	mov r1, #0x14
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
	nop
_021EBFF0: .word ov96_021ED618
_021EBFF4: .word ov96_021ED660
_021EBFF8: .word ov96_021ED6A8
_021EBFFC: .word 0x000006EE
_021EC000: .word 0x000008E2
_021EC004: .word 0x00000476
_021EC008:
	add r1, r4, #0
	add r1, #0x9c
	ldr r1, [r1]
	add r0, r6, #0
	lsl r1, r1, #4
	lsr r1, r1, #0x1c
	mov r7, #0x1b
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r5, #0
	mov r1, #0
	bl BufferPlayersName
	add r0, r4, #0
	add r0, #0x80
	ldr r0, [r0]
	mov r1, #1
	bl sub_0200DCE8
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	mov r1, #0
	bl ov96_021EDC38
	add r2, r0, #0
	add r0, r5, #0
	mov r1, #1
	bl sub_0200C984
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	cmp r0, #5
	blo _021EC074
	add r0, r4, #0
	add r0, #0x84
	ldr r0, [r0]
	mov r1, #1
	mov r7, #0x1c
	bl sub_0200DCE8
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	mov r1, #1
	bl ov96_021EDC38
	add r2, r0, #0
	add r0, r5, #0
	mov r1, #2
	bl sub_0200C984
_021EC074:
	add r0, r4, #0
	mov r1, #0x13
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EC07E:
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	str r0, [sp, #8]
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #0
	bne _021EC110
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	lsl r0, r0, #4
	lsr r0, r0, #0x1c
	str r0, [sp, #4]
	add r0, r6, #0
	bl ov96_021E5F24
	ldr r1, [sp, #4]
	cmp r1, r0
	bne _021EC110
	add r0, r1, #0
	beq _021EC0B0
	bl GF_AssertFail
_021EC0B0:
	add r0, r6, #0
	bl ov96_021E5D60
	bl sub_02031968
	bl sub_020319A4
	add r1, r4, #0
	add r1, #0x9c
	ldr r1, [r1]
	str r0, [sp, #0x10]
	add r0, r4, #0
	lsl r1, r1, #4
	add r0, #0x8c
	lsr r1, r1, #0x1c
	lsl r1, r1, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021ECC4C
	ldr r2, [sp, #8]
	mov r1, #0x2c
	mul r1, r2
	ldr r2, [sp, #0x10]
	add r1, r2, r1
	ldrh r1, [r1, #6]
	cmp r1, r0
	bhs _021EC11C
	add r1, r4, #0
	add r1, #0x9c
	ldr r1, [r1]
	add r0, r6, #0
	lsl r1, r1, #4
	lsr r1, r1, #0x1c
	mov r7, #0x1d
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r5, #0
	mov r1, #0
	bl BufferPlayersName
	ldr r2, [sp, #8]
	add r0, r5, #0
	mov r1, #1
	bl sub_0200C944
	b _021EC11C
_021EC110:
	ldr r2, [sp, #8]
	add r0, r5, #0
	mov r1, #0
	mov r7, #0x1e
	bl sub_0200C944
_021EC11C:
	add r0, r4, #0
	mov r1, #0x14
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EC126:
	ldr r0, _021EC1AC ; =0x000008E2
	mov r1, #0x78
	mov r7, #0x1f
	bl sub_02006154
	add r0, r4, #0
	mov r1, #1
	add r0, #0xb8
	str r1, [r0]
	add r0, r4, #0
	mov r1, #0x15
	add r0, #0xb5
	strb r1, [r0]
	b _021EC188
_021EC142:
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #0
	beq _021EC156
	add r0, r6, #0
	bl ov96_021EE580
	cmp r0, #0
	beq _021EC188
_021EC156:
	add r0, r4, #0
	bl ov96_021EC2E0
	cmp r0, #0
	beq _021EC170
	add r0, r4, #0
	add r0, #0x88
	ldr r0, [r0]
	bl FreeToHeap
	ldr r0, [r4, #8]
	bl sub_0200E390
_021EC170:
	ldr r0, [r4, #0xc]
	bl ov96_021EE944
	add r0, r6, #0
	mov r1, #2
	bl ov96_021E5FC8
	add sp, #0x18
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021EC184:
	bl GF_AssertFail
_021EC188:
	mov r0, #0
	mvn r0, r0
	cmp r7, r0
	beq _021EC1A4
	ldr r0, [r4, #0xc]
	add r1, r7, #0
	bl ov96_021EE8CC
	add r0, r4, #0
	add r0, #0xb7
	ldrb r0, [r0]
	add r4, #0xb7
	add r0, r0, #1
	strb r0, [r4]
_021EC1A4:
	mov r0, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EC1AC: .word 0x000008E2
	thumb_func_end ov96_021EBB64

	thumb_func_start ov96_021EC1B0
ov96_021EC1B0: ; 0x021EC1B0
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r4, r1, #0
	bl ov96_021E5DC4
	add r0, #0x90
	ldr r0, [r0]
	bl ov96_021ED0C8
	ldrb r0, [r4]
	cmp r0, #0
	beq _021EC1D0
	cmp r0, #1
	beq _021EC1FC
	b _021EC20A
_021EC1D0:
	add r0, r5, #0
	bl ov96_021E5DCC
	mov r1, #0x1e
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	ldr r3, _021EC214 ; =0x00007FFF
	add r1, r0, #0
	add r2, r0, #0
	bl sub_0200FA24
	mov r0, #0
	mov r1, #0x1e
	bl sub_02005F50
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EC20E
_021EC1FC:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EC20E
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_021EC20A:
	bl GF_AssertFail
_021EC20E:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_021EC214: .word 0x00007FFF
	thumb_func_end ov96_021EC1B0

	thumb_func_start ov96_021EC218
ov96_021EC218: ; 0x021EC218
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r0, #0
	ldrh r0, [r5]
	ldr r4, [r5, #8]
	cmp r0, #0
	beq _021EC230
	cmp r0, #1
	beq _021EC248
	cmp r0, #2
	beq _021EC25A
	b _021EC290
_021EC230:
	add r0, r4, #0
	mov r1, #2
	bl ov96_021EAC0C
	add r0, r4, #0
	mov r1, #0x10
	bl ov96_021EAC5C
	ldrh r0, [r5]
	add r0, r0, #1
	strh r0, [r5]
	pop {r4, r5, r6, pc}
_021EC248:
	ldr r1, [r5, #4]
	add r0, r1, #1
	str r0, [r5, #4]
	cmp r1, #0x3c
	ble _021EC294
	ldrh r0, [r5]
	add r0, r0, #1
	strh r0, [r5]
	pop {r4, r5, r6, pc}
_021EC25A:
	add r0, r4, #0
	bl ov96_021EAD78
	cmp r0, #0
	bne _021EC294
	bl sub_02006360
	cmp r0, #0
	bne _021EC294
	add r0, r4, #0
	mov r1, #1
	bl ov96_021EAC0C
	add r0, r4, #0
	mov r1, #0
	bl ov96_021EAC5C
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0]
	add r0, r5, #0
	bl FreeToHeap
	add r0, r6, #0
	bl sub_0200E390
	pop {r4, r5, r6, pc}
_021EC290:
	bl GF_AssertFail
_021EC294:
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC218

	thumb_func_start ov96_021EC298
ov96_021EC298: ; 0x021EC298
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r6, r1, #0
	mov r1, #0x10
	bl AllocFromHeapAtEnd
	mov r1, #0
	mov r2, #0x10
	add r4, r0, #0
	bl MIi_CpuFill8
	add r0, r5, #0
	add r0, #0x88
	str r4, [r0]
	ldr r0, [r5, #0x14]
	add r1, r6, #0
	bl ov96_021EAA04
	str r0, [r4, #8]
	add r0, r5, #0
	mov r2, #1
	add r0, #0x98
	str r2, [r0]
	add r0, r5, #0
	add r0, #0x98
	str r0, [r4, #0xc]
	ldr r0, _021EC2DC ; =ov96_021EC218
	add r1, r4, #0
	bl sub_0200E320
	str r0, [r5, #8]
	pop {r4, r5, r6, pc}
	nop
_021EC2DC: .word ov96_021EC218
	thumb_func_end ov96_021EC298

	thumb_func_start ov96_021EC2E0
ov96_021EC2E0: ; 0x021EC2E0
	add r0, #0x98
	ldr r0, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EC2E0

	thumb_func_start ov96_021EC2E8
ov96_021EC2E8: ; 0x021EC2E8
	push {r4, r5, lr}
	sub sp, #0x84
	ldr r5, _021EC3C4 ; =0x0221AF64
	add r3, sp, #0x74
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _021EC3C8 ; =0x0221AFA0
	add r3, sp, #0x58
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	mov r1, #1
	mov r2, #0
	add r0, r4, #0
	add r3, r1, #0
	str r2, [sp]
	bl sub_0201C1F4
	ldr r5, _021EC3CC ; =0x0221AFF4
	add r3, sp, #0x3c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	mov r1, #1
	mov r2, #0
	add r0, r4, #0
	add r3, r1, #0
	str r2, [sp]
	bl sub_0201C1F4
	ldr r5, _021EC3D0 ; =0x0221AFBC
	add r3, sp, #0x20
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _021EC3D4 ; =0x0221AFD8
	add r3, sp, #4
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	add sp, #0x84
	pop {r4, r5, pc}
	nop
_021EC3C4: .word 0x0221AF64
_021EC3C8: .word 0x0221AFA0
_021EC3CC: .word 0x0221AFF4
_021EC3D0: .word 0x0221AFBC
_021EC3D4: .word 0x0221AFD8
	thumb_func_end ov96_021EC2E8

	thumb_func_start ov96_021EC3D8
ov96_021EC3D8: ; 0x021EC3D8
	push {r3, r4, r5, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	add r5, r0, #0
	str r3, [sp, #4]
	add r4, r1, #0
	str r3, [sp, #8]
	mov r0, #0x9a
	mov r1, #3
	add r2, r5, #0
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9a
	mov r1, #1
	add r2, r5, #0
	mov r3, #5
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	mov r0, #0x9a
	mov r1, #6
	add r2, r5, #0
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9a
	mov r1, #4
	add r2, r5, #0
	mov r3, #5
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	mov r0, #0x9a
	add r2, r1, #0
	add r3, r1, #0
	str r4, [sp, #4]
	bl GfGfxLoader_GXLoadPal
	mov r1, #0
	str r1, [sp]
	mov r0, #0x9a
	mov r2, #4
	add r3, r1, #0
	str r4, [sp, #4]
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EC3D8

	thumb_func_start ov96_021EC458
ov96_021EC458: ; 0x021EC458
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	add r4, r1, #0
	str r0, [sp, #8]
	mov r0, #0x9a
	mov r1, #3
	add r2, r5, #0
	mov r3, #1
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9a
	mov r1, #7
	add r2, r5, #0
	mov r3, #1
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EC458

	thumb_func_start ov96_021EC490
ov96_021EC490: ; 0x021EC490
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _021EC510 ; =0x0221AF88
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021EC514 ; =0x0221B010
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021EC518 ; =0x0221AF74
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r4]
	bl sub_0200CF18
	str r0, [r4, #0x18]
	bl sub_0200CF38
	str r0, [r4, #0x1c]
	ldr r0, [r4, #0x18]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	ldr r0, [r4, #0x18]
	ldr r1, [r4, #0x1c]
	mov r2, #0x80
	bl sub_0200CFF4
	ldr r0, [r4, #0x18]
	ldr r1, [r4, #0x1c]
	add r2, sp, #0x34
	bl sub_0200D3F8
	ldr r0, [r4, #0x18]
	bl sub_0200CF6C
	mov r2, #0x83
	mov r1, #0
	lsl r2, r2, #0xe
	bl sub_02009FC8
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_021EC510: .word 0x0221AF88
_021EC514: .word 0x0221B010
_021EC518: .word 0x0221AF74
	thumb_func_end ov96_021EC490

	thumb_func_start ov96_021EC51C
ov96_021EC51C: ; 0x021EC51C
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r6, r0, #0
	add r7, r4, #0
_021EC524:
	lsl r0, r4, #2
	add r5, r6, r0
	ldr r0, [r5, #0x20]
	cmp r0, #0
	beq _021EC534
	bl sub_0200D9DC
	str r7, [r5, #0x20]
_021EC534:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0x1a
	blo _021EC524
	ldr r0, [r6, #0x18]
	ldr r1, [r6, #0x1c]
	bl sub_0200D998
	ldr r0, [r6, #0x18]
	bl sub_0200D108
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC51C

	thumb_func_start ov96_021EC550
ov96_021EC550: ; 0x021EC550
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	mov r4, #0
	add r7, r0, #0
	add r2, sp, #0
	add r0, r4, #0
	add r1, r4, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	mov r5, #0x20
	add r6, r7, #0
_021EC570:
	add r0, r4, #0
	add r0, #0x64
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	mov r0, #0x64
	str r0, [sp, #0x1c]
	str r0, [sp, #0x20]
	mov r0, #2
	str r0, [sp, #0x10]
	mov r0, #1
	mov r1, #0x88
	str r0, [sp, #0x2c]
	str r0, [sp, #8]
	add r0, sp, #0
	strh r5, [r0]
	strh r1, [r0, #2]
	cmp r4, #4
	bne _021EC59C
	mov r1, #0x80
	strh r1, [r0]
	mov r1, #0x70
	strh r1, [r0, #2]
_021EC59C:
	mov r3, #0x83
	ldr r0, [r7, #0x18]
	ldr r1, [r7, #0x1c]
	add r2, sp, #0
	lsl r3, r3, #0xe
	bl sub_0200D740
	mov r1, #1
	str r0, [r6, #0x20]
	bl sub_0200DC78
	add r4, r4, #1
	add r5, #0x40
	add r6, r6, #4
	cmp r4, #5
	blt _021EC570
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EC550

	thumb_func_start ov96_021EC5C0
ov96_021EC5C0: ; 0x021EC5C0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x40
	add r5, r0, #0
	mov r0, #0
	add r2, sp, #0xc
	add r1, r0, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [sp, #8]
	str r0, [r2]
	mov r0, #5
	str r0, [sp, #4]
	mov r0, #0x20
	str r0, [sp]
_021EC5E4:
	mov r0, #0x69
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	mov r0, #0x65
	mov r1, #2
	str r0, [sp, #0x28]
	str r0, [sp, #0x2c]
	mov r0, #1
	str r0, [sp, #0x38]
	ldr r0, [sp]
	str r1, [sp, #0x1c]
	str r1, [sp, #0x14]
	add r1, sp, #0xc
	strh r0, [r1]
	mov r0, #0x48
	strh r0, [r1, #2]
	mov r0, #0
	strh r0, [r1, #6]
	ldr r0, [sp, #8]
	mov r3, #0x83
	add r0, r0, #1
	str r0, [sp, #0x18]
	ldr r0, [sp, #4]
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #2
	add r4, r5, r0
	ldr r0, [r5, #0x18]
	add r2, sp, #0xc
	lsl r3, r3, #0xe
	bl sub_0200D740
	mov r1, #1
	str r0, [r4, #0x20]
	bl sub_0200DC78
	mov r2, #1
	mov r4, #0
	str r4, [sp, #0x18]
	str r2, [sp, #0x38]
	str r2, [sp, #0x14]
	add r0, sp, #0xc
	ldrsh r1, [r0, r4]
	sub r1, #0x10
	strh r1, [r0]
	strh r2, [r0, #6]
	ldr r0, [sp, #4]
	add r7, r0, #1
_021EC642:
	add r0, r7, r4
	lsl r0, r0, #2
	add r6, r5, r0
	mov r3, #0x83
	ldr r0, [r5, #0x18]
	ldr r1, [r5, #0x1c]
	add r2, sp, #0xc
	lsl r3, r3, #0xe
	bl sub_0200D740
	mov r1, #1
	str r0, [r6, #0x20]
	bl sub_0200DC78
	add r1, sp, #0xc
	mov r0, #0
	ldrsh r1, [r1, r0]
	add r0, sp, #0xc
	add r4, r4, #1
	add r1, #0x10
	strh r1, [r0]
	cmp r4, #3
	blt _021EC642
	ldr r0, [sp, #4]
	add r0, r0, #4
	str r0, [sp, #4]
	ldr r0, [sp]
	add r0, #0x40
	str r0, [sp]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _021EC5E4
	add sp, #0x40
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC5C0

	thumb_func_start ov96_021EC68C
ov96_021EC68C: ; 0x021EC68C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	mov r4, #0
	add r7, r0, #0
	add r2, sp, #4
	add r0, r4, #0
	add r1, r4, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	mov r0, #2
	mov r5, #0x30
	str r0, [sp]
_021EC6AE:
	add r0, r4, #0
	add r0, #0x6d
	str r0, [sp, #0x18]
	mov r0, #0x6a
	str r0, [sp, #0x1c]
	mov r0, #0x68
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	mov r0, #1
	str r0, [sp, #0x14]
	add r0, sp, #4
	strh r5, [r0]
	mov r1, #0x70
	strh r1, [r0, #2]
	mov r0, #0
	str r0, [sp, #0x30]
	mov r0, #1
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r0, #0x15
	lsl r0, r0, #2
	add r6, r7, r0
	mov r3, #0x83
	ldr r0, [r7, #0x18]
	ldr r1, [r7, #0x1c]
	add r2, sp, #4
	lsl r3, r3, #0xe
	bl sub_0200D740
	ldr r1, [sp]
	str r0, [r6, #0x20]
	bl sub_0200DD10
	ldr r0, [r6, #0x20]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [sp]
	add r4, r4, #1
	add r0, r0, #3
	add r5, #0x50
	str r0, [sp]
	cmp r4, #3
	blt _021EC6AE
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC68C

	thumb_func_start ov96_021EC70C
ov96_021EC70C: ; 0x021EC70C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	mov r7, #0
	add r5, r0, #0
	add r2, sp, #0
	add r0, r7, #0
	add r1, r7, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	mov r4, #0x60
_021EC72A:
	add r1, r7, #0
	add r1, #0x6b
	str r1, [sp, #0x14]
	str r1, [sp, #0x18]
	mov r1, #0x67
	str r1, [sp, #0x1c]
	str r1, [sp, #0x20]
	mov r1, #1
	str r1, [sp, #0x10]
	mov r1, #0
	str r1, [sp, #0x2c]
	mov r1, #2
	str r1, [sp, #8]
	add r1, sp, #0
	add r0, r7, #0
	strh r4, [r1]
	mov r2, #0x38
	strh r2, [r1, #2]
	add r1, r5, #0
	add r1, #0xb1
	ldrb r1, [r1]
	add r0, #0x18
	cmp r1, #5
	bhs _021EC760
	mov r2, #0x80
	add r1, sp, #0
	strh r2, [r1]
_021EC760:
	lsl r0, r0, #2
	add r6, r5, r0
	mov r3, #0x83
	ldr r0, [r5, #0x18]
	ldr r1, [r5, #0x1c]
	add r2, sp, #0
	lsl r3, r3, #0xe
	bl sub_0200D740
	str r0, [r6, #0x20]
	mov r1, #1
	bl sub_0200DC78
	ldr r0, [r6, #0x20]
	mov r1, #0
	bl sub_0200DCE8
	add r7, r7, #1
	add r4, #0x40
	cmp r7, #2
	blt _021EC72A
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC70C

	thumb_func_start ov96_021EC790
ov96_021EC790: ; 0x021EC790
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x40
	str r0, [sp, #0xc]
	str r1, [sp, #0x10]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	bl ov96_021E5D50
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	bl ov96_021E5D40
	mov r0, #0
	str r0, [sp, #0x14]
	add r6, r4, #0
	mov r5, #1
	add r7, sp, #0x1c
_021EC7B8:
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	ldr r2, [sp, #0x14]
	add r3, sp, #0x30
	bl ov96_021E6168
	ldr r0, [r4]
	add r1, sp, #0x30
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r0, [r6, #0x74]
	mov r2, #1
	mov r3, #0
	bl ov96_021EEBF8
	ldrb r0, [r7, #0x1a]
	mov r3, #2
	str r0, [sp]
	ldrh r0, [r7, #0x16]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [sp, #0x3c]
	str r0, [sp, #8]
	ldrh r1, [r7, #0x14]
	ldrb r2, [r7, #0x1b]
	add r0, sp, #0x20
	bl sub_020701E4
	ldrh r0, [r7, #4]
	ldrh r1, [r7, #8]
	ldr r3, [r4]
	add r2, sp, #0x1c
	bl GfGfxLoader_GetPlttData
	ldr r3, [sp, #0x1c]
	str r0, [sp, #0x18]
	lsl r1, r5, #0x18
	ldr r0, [r4, #0x14]
	ldr r3, [r3, #0xc]
	lsr r1, r1, #0x18
	mov r2, #1
	bl ov96_021EAF60
	ldr r0, [sp, #0x18]
	bl FreeToHeap
	ldr r0, [sp, #0x14]
	add r6, r6, #4
	add r0, r0, #1
	add r5, r5, #3
	str r0, [sp, #0x14]
	cmp r0, #3
	blt _021EC7B8
	add sp, #0x40
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EC790

	thumb_func_start ov96_021EC82C
ov96_021EC82C: ; 0x021EC82C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	bl ov96_021E5DC4
	ldr r6, [r0, #0x18]
	ldr r4, [r0, #0x1c]
	str r0, [sp, #0x10]
	mov r7, #0
_021EC83C:
	mov r0, #1
	add r5, r7, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r5, #0x64
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #9
	str r5, [sp, #8]
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #8
	str r5, [sp, #0xc]
	bl sub_0200D564
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #5
	blo _021EC83C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x64
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xa
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x64
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xb
	bl sub_0200D704
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r0, #0x69
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xd
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x69
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xc
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	mov r0, #0x65
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xe
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x65
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xf
	bl sub_0200D704
	ldr r0, [sp, #0x10]
	bl ov96_021ECA18
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x6a
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0x10
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x6a
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0xc
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	mov r0, #0x66
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0x11
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x66
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0x12
	bl sub_0200D704
	ldr r0, [sp, #0x10]
	mov r1, #0
	add r0, #0xb1
	ldrb r5, [r0]
	str r0, [sp, #0x10]
	add r0, r5, #0
	bl ov96_021EDC38
	add r3, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x6b
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	add r3, #0x17
	bl sub_0200D564
	add r0, r5, #0
	mov r1, #1
	bl ov96_021EDC38
	add r3, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x6c
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	add r3, #0x17
	bl sub_0200D564
	add r0, r5, #0
	mov r1, #0
	bl ov96_021EDC38
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x6b
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	add r3, #0x1c
	bl sub_0200D4A4
	add r0, r5, #0
	mov r1, #1
	bl ov96_021EDC38
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x6c
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	add r3, #0x1c
	bl sub_0200D4A4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x67
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0x21
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x67
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9a
	mov r3, #0x22
	bl sub_0200D704
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EC82C

	thumb_func_start ov96_021ECA18
ov96_021ECA18: ; 0x021ECA18
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	ldr r6, [r0, #0x18]
	ldr r5, [r0, #0x1c]
	mov r7, #1
	mov r4, #0
_021ECA24:
	mov r0, #1
	str r0, [sp]
	add r0, r4, #0
	str r7, [sp, #4]
	add r0, #0x6d
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #0x14
	bl sub_0200D4A4
	add r4, r4, #1
	cmp r4, #3
	blt _021ECA24
	mov r0, #1
	str r0, [sp]
	mov r0, #0x68
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #0x15
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0x68
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #0x16
	bl sub_0200D704
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ECA18

	thumb_func_start ov96_021ECA70
ov96_021ECA70: ; 0x021ECA70
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r0, [sp]
	str r1, [sp, #4]
	bl ov96_021E5DC4
	add r6, r0, #0
	mov r7, #0
	mov r4, #1
	mov r5, #2
_021ECA84:
	lsl r1, r4, #0x18
	ldr r0, [r6, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	str r0, [sp, #8]
	lsl r1, r5, #0x18
	ldr r0, [r6, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	mov r1, #0
	bl ov96_021EAB38
	ldr r0, [sp, #0xc]
	mov r1, #0
	bl ov96_021EAB38
	add r7, r7, #1
	add r4, r4, #3
	add r5, r5, #3
	cmp r7, #4
	blt _021ECA84
	ldr r0, [sp]
	ldr r1, [sp, #4]
	bl ov96_021EC790
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ECA70

	thumb_func_start ov96_021ECAC4
ov96_021ECAC4: ; 0x021ECAC4
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bl ov96_021E5DC4
	add r7, r0, #0
	str r0, [sp]
	add r0, #0x20
	mov r4, #0
	add r5, r7, #0
	str r0, [sp]
_021ECAD8:
	add r0, r6, #0
	bl ov96_021E5D34
	cmp r4, #4
	bne _021ECAF6
	mov r0, #2
	bl ov96_021EEBC8
	add r1, r0, #0
	ldr r0, [r5, #0x20]
	ldr r3, [r7]
	mov r2, #0xb
	bl ov96_021EEA88
	b _021ECB2C
_021ECAF6:
	cmp r4, r0
	bge _021ECB0A
	lsl r2, r4, #0x18
	ldr r0, [sp]
	add r1, r6, #0
	lsr r2, r2, #0x18
	mov r3, #0
	bl ov96_021EEB74
	b _021ECB2C
_021ECB0A:
	add r0, r6, #0
	add r1, r4, #0
	bl ov96_021E5D40
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl ov96_021E8424
	bl ov96_021EEDCC
	add r1, r0, #0
	ldr r0, [r5, #0x20]
	ldr r3, [r7]
	mov r2, #0
	bl ov96_021EEA88
_021ECB2C:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #5
	blt _021ECAD8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ECAC4

	thumb_func_start ov96_021ECB38
ov96_021ECB38: ; 0x021ECB38
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r2, #0
	str r0, [sp]
	str r1, [sp, #4]
	add r0, r1, #0
	add r1, r5, #0
	add r7, r3, #0
	bl ov96_021E5D40
	ldr r0, [r0]
	cmp r0, #0
	ble _021ECB56
	mov r6, #1
	b _021ECB58
_021ECB56:
	mov r6, #0
_021ECB58:
	cmp r7, #1
	beq _021ECB62
	cmp r7, #2
	beq _021ECB66
	b _021ECB72
_021ECB62:
	mov r4, #0
	b _021ECB76
_021ECB66:
	cmp r6, #0
	beq _021ECB6E
	mov r4, #0xb
	b _021ECB76
_021ECB6E:
	mov r4, #0x1b
	b _021ECB76
_021ECB72:
	bl GF_AssertFail
_021ECB76:
	cmp r6, #0
	beq _021ECBA6
	ldr r0, [sp, #4]
	add r1, r5, #0
	bl ov96_021E5D40
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl ov96_021E8424
	bl ov96_021EEDCC
	add r1, r0, #0
	ldr r0, [sp]
	lsl r2, r5, #2
	ldr r0, [r0, r2]
	lsl r2, r4, #0x18
	ldr r3, [sp, #0x20]
	lsr r2, r2, #0x18
	bl ov96_021EEA88
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
_021ECBA6:
	lsl r2, r5, #0x18
	ldr r0, [sp]
	ldr r1, [sp, #4]
	lsr r2, r2, #0x18
	add r3, r4, #0
	bl ov96_021EEB74
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ECB38

	thumb_func_start ov96_021ECBB8
ov96_021ECBB8: ; 0x021ECBB8
	push {r3, r4, r5, r6, r7, lr}
	add r7, r1, #0
	mov r1, #0x70
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x70
	str r0, [sp]
	bl MIi_CpuFill8
	ldr r3, [sp]
	mov r1, #0
	mov r4, #5
_021ECBD2:
	lsl r0, r4, #2
	mov r2, #0
	add r5, r7, r0
	add r6, r3, #0
_021ECBDA:
	ldr r0, [r5]
	add r2, r2, #1
	add r5, r5, #4
	stmia r6!, {r0}
	cmp r2, #4
	blt _021ECBDA
	add r1, r1, #1
	add r3, #0x1c
	add r4, r4, #4
	cmp r1, #4
	blt _021ECBD2
	ldr r0, [sp]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ECBB8

	thumb_func_start ov96_021ECBF4
ov96_021ECBF4: ; 0x021ECBF4
	ldr r3, _021ECBF8 ; =FreeToHeap
	bx r3
	.balign 4, 0
_021ECBF8: .word FreeToHeap
	thumb_func_end ov96_021ECBF4

	thumb_func_start ov96_021ECBFC
ov96_021ECBFC: ; 0x021ECBFC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r4, #0
_021ECC02:
	add r0, r5, #0
	bl ov96_021ECD24
	add r4, r4, #1
	add r5, #0x1c
	cmp r4, #4
	blt _021ECC02
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021ECBFC

	thumb_func_start ov96_021ECC14
ov96_021ECC14: ; 0x021ECC14
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r5, r0, #0
	mov r6, #1
	add r7, r4, #0
_021ECC1E:
	add r0, r5, #0
	bl ov96_021ECDC4
	cmp r0, #0
	bne _021ECC2A
	add r6, r7, #0
_021ECC2A:
	add r4, r4, #1
	add r5, #0x1c
	cmp r4, #4
	blt _021ECC1E
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ECC14

	thumb_func_start ov96_021ECC38
ov96_021ECC38: ; 0x021ECC38
	push {r3, lr}
	cmp r2, #0
	beq _021ECC4A
	mov r3, #0x1c
	mul r3, r1
	add r0, r0, r3
	add r1, r2, #0
	bl ov96_021ECDD4
_021ECC4A:
	pop {r3, pc}
	thumb_func_end ov96_021ECC38

	thumb_func_start ov96_021ECC4C
ov96_021ECC4C: ; 0x021ECC4C
	mov r2, #0x1c
	mul r2, r1
	add r0, r0, r2
	ldr r0, [r0, #0x10]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021ECC4C

	thumb_func_start ov96_021ECC58
ov96_021ECC58: ; 0x021ECC58
	ldr r1, [r1]
	ldr r0, [r0]
	lsl r1, r1, #0x10
	lsl r0, r0, #0x10
	lsr r1, r1, #0x10
	lsr r0, r0, #0x10
	cmp r0, r1
	bne _021ECC6C
	mov r0, #0
	bx lr
_021ECC6C:
	cmp r0, r1
	bhs _021ECC74
	mov r0, #1
	bx lr
_021ECC74:
	mov r0, #0
	mvn r0, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021ECC58

	thumb_func_start ov96_021ECC7C
ov96_021ECC7C: ; 0x021ECC7C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r1, #0
	mov r6, #0
	str r0, [sp, #4]
	str r2, [sp, #8]
	add r4, r6, #0
	add r5, r7, #0
_021ECC8C:
	ldr r1, [r5]
	ldr r0, _021ECD10 ; =0xF0FFFFFF
	and r1, r0
	lsl r0, r4, #0x1c
	lsr r0, r0, #4
	orr r0, r1
	str r0, [r5]
	lsl r1, r4, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	bl ov96_021ECC4C
	lsl r0, r0, #0x10
	ldr r2, [r5]
	ldr r1, _021ECD14 ; =0xFFFF0000
	lsr r0, r0, #0x10
	and r1, r2
	orr r1, r0
	ldr r0, _021ECD18 ; =0x0FFFFFFF
	str r1, [r5]
	and r0, r1
	ldr r1, [sp, #8]
	ldrb r1, [r1, r4]
	add r4, r4, #1
	lsl r1, r1, #0x1c
	orr r0, r1
	stmia r5!, {r0}
	cmp r4, #4
	blt _021ECC8C
	mov r0, #0
	mov r1, #4
	str r0, [sp]
	ldr r3, _021ECD1C ; =ov96_021ECC58
	add r0, r7, #0
	add r2, r1, #0
	bl sub_020E3A84
	ldr r3, _021ECD20 ; =0xFF00FFFF
	mov r2, #0
	add r1, r7, #0
_021ECCDC:
	ldr r0, [r1]
	add r4, r0, #0
	lsl r0, r6, #0x18
	and r4, r3
	lsr r0, r0, #8
	orr r0, r4
	str r0, [r1]
	cmp r2, #3
	beq _021ECD04
	add r5, r2, #1
	lsl r4, r5, #2
	ldr r0, [r1]
	ldr r4, [r7, r4]
	lsl r0, r0, #0x10
	lsl r4, r4, #0x10
	lsr r0, r0, #0x10
	lsr r4, r4, #0x10
	cmp r0, r4
	beq _021ECD04
	add r6, r5, #0
_021ECD04:
	add r2, r2, #1
	add r1, r1, #4
	cmp r2, #4
	blt _021ECCDC
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021ECD10: .word 0xF0FFFFFF
_021ECD14: .word 0xFFFF0000
_021ECD18: .word 0x0FFFFFFF
_021ECD1C: .word ov96_021ECC58
_021ECD20: .word 0xFF00FFFF
	thumb_func_end ov96_021ECC7C

	thumb_func_start ov96_021ECD24
ov96_021ECD24: ; 0x021ECD24
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	ldr r0, [r6, #0x18]
	cmp r0, #0
	beq _021ECDBA
	ldr r0, [r6, #0x14]
	add r1, r0, #1
	ldr r0, _021ECDBC ; =0x000003E7
	cmp r1, r0
	bls _021ECD3A
	add r1, r0, #0
_021ECD3A:
	ldr r0, _021ECDC0 ; =0x000008E3
	str r1, [r6, #0x14]
	bl sub_02006184
	cmp r0, #0
	bne _021ECD4C
	ldr r0, _021ECDC0 ; =0x000008E3
	bl PlaySE
_021ECD4C:
	ldr r0, [r6, #0x14]
	mov r1, #3
	bl ov98_0221F120
	lsl r0, r0, #0x10
	lsr r7, r0, #0x10
	ldr r0, [r6, #0x14]
	mov r1, #2
	bl ov98_0221F120
	lsl r0, r0, #0x10
	lsr r5, r0, #0x10
	ldr r0, [r6, #0x14]
	mov r1, #1
	bl ov98_0221F120
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	ldr r0, [r6, #4]
	add r1, r7, #1
	bl sub_0200DC4C
	ldr r0, [r6, #8]
	add r1, r5, #1
	bl sub_0200DC4C
	ldr r0, [r6, #0xc]
	add r1, r4, #1
	bl sub_0200DC4C
	ldr r0, [r6, #0x14]
	mov r1, #0x14
	bl _u32_div_f
	cmp r1, #0
	bne _021ECDAE
	mov r4, #0
	add r5, r6, #0
	add r7, r4, #0
_021ECD9A:
	mov r2, #0
	ldr r0, [r5]
	add r1, r7, #0
	mvn r2, r2
	bl sub_0200DED0
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _021ECD9A
_021ECDAE:
	ldr r1, [r6, #0x14]
	ldr r0, [r6, #0x10]
	cmp r1, r0
	blo _021ECDBA
	mov r0, #0
	str r0, [r6, #0x18]
_021ECDBA:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021ECDBC: .word 0x000003E7
_021ECDC0: .word 0x000008E3
	thumb_func_end ov96_021ECD24

	thumb_func_start ov96_021ECDC4
ov96_021ECDC4: ; 0x021ECDC4
	ldr r0, [r0, #0x18]
	cmp r0, #0
	bne _021ECDCE
	mov r0, #1
	bx lr
_021ECDCE:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021ECDC4

	thumb_func_start ov96_021ECDD4
ov96_021ECDD4: ; 0x021ECDD4
	ldr r2, [r0, #0x10]
	add r2, r2, r1
	ldr r1, _021ECDE8 ; =0x000003E7
	cmp r2, r1
	bls _021ECDE0
	add r2, r1, #0
_021ECDE0:
	str r2, [r0, #0x10]
	mov r1, #1
	str r1, [r0, #0x18]
	bx lr
	.balign 4, 0
_021ECDE8: .word 0x000003E7
	thumb_func_end ov96_021ECDD4

	thumb_func_start ov96_021ECDEC
ov96_021ECDEC: ; 0x021ECDEC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	add r5, r0, #0
	add r4, r1, #0
	add r7, r2, #0
	cmp r5, #0
	bne _021ECDFE
	bl GF_AssertFail
_021ECDFE:
	add r0, r5, #0
	mov r1, #0
	mov r2, #0x18
	bl MIi_CpuFill8
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	cmp r1, #0
	beq _021ECE32
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	lsl r0, r1, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _021ECE4A
_021ECE32:
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	lsl r0, r1, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_021ECE4A:
	bl _ftoi
	asr r1, r0, #1
	mov r0, #6
	lsl r0, r0, #0xa
	add r0, r1, r0
	str r0, [r5, #8]
	bl MTRandom
	mov r1, #1
	tst r0, r1
	beq _021ECE7A
	bl MTRandom
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x13
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _021ECE8E
_021ECE7A:
	bl MTRandom
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x13
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_021ECE8E:
	bl _ftoi
	ldr r1, _021ECF3C ; =0x0000019A
	add r0, r0, r1
	asr r0, r0, #1
	str r0, [r5, #4]
	bl MTRandom
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021ECEBC
	bl MTRandom
	lsl r0, r0, #0x18
	lsr r0, r0, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _021ECED0
_021ECEBC:
	bl MTRandom
	lsl r0, r0, #0x18
	lsr r0, r0, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_021ECED0:
	bl _ftoi
	str r0, [r5, #0xc]
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	add r1, r1, #1
	lsl r1, r1, #0x1c
	ldr r2, [r5, #0x14]
	ldr r0, _021ECF40 ; =0xFFF0FFFF
	lsr r1, r1, #0xc
	and r0, r2
	orr r1, r0
	mov r0, #1
	lsl r0, r0, #0x14
	orr r0, r1
	ldr r6, _021ECF44 ; =0x0221B0BC
	str r0, [r5, #0x14]
	add r3, sp, #0
	mov r2, #6
_021ECEFC:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021ECEFC
	ldr r0, [r6]
	str r0, [r3]
	ldr r0, [r5, #0xc]
	asr r1, r0, #0xc
	add r0, sp, #0
	strh r1, [r0]
	bl MTRandom
	mov r1, #1
	tst r0, r1
	bne _021ECF20
	mov r1, #0xc
	add r0, sp, #0
	strh r1, [r0, #6]
_021ECF20:
	mov r3, #0x83
	add r0, r4, #0
	add r1, r7, #0
	add r2, sp, #0
	lsl r3, r3, #0xe
	bl sub_0200D740
	mov r1, #1
	str r0, [r5]
	bl sub_0200DC78
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	nop
_021ECF3C: .word 0x0000019A
_021ECF40: .word 0xFFF0FFFF
_021ECF44: .word 0x0221B0BC
	thumb_func_end ov96_021ECDEC

	thumb_func_start ov96_021ECF48
ov96_021ECF48: ; 0x021ECF48
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r4, _021ECFEC ; =0x00000000
	bne _021ECF54
	bl GF_AssertFail
_021ECF54:
	ldr r0, [r5, #0x14]
	ldr r6, [r5, #4]
	lsl r1, r0, #0x10
	lsl r0, r0, #0xc
	lsr r1, r1, #0x10
	lsr r0, r0, #0x1c
	mul r0, r1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	bl sub_0201FCAC
	asr r1, r0, #0x1f
	asr r3, r6, #0x1f
	add r2, r6, #0
	bl _ll_mul
	mov r3, #2
	mov r6, #0
	lsl r3, r3, #0xa
	add r3, r0, r3
	adc r1, r6
	lsl r0, r1, #0x14
	lsr r1, r3, #0xc
	mov r3, #0x83
	ldr r2, [r5, #0xc]
	orr r1, r0
	add r0, r2, r1
	str r0, [r5, #0xc]
	ldr r1, [r5, #0x10]
	ldr r0, [r5, #8]
	lsl r3, r3, #0xe
	add r2, r1, r0
	str r2, [r5, #0x10]
	ldr r0, [r5]
	ldr r1, [r5, #0xc]
	bl sub_0200DF44
	ldr r0, [r5, #0x10]
	asr r0, r0, #0xc
	cmp r0, #0xe0
	ble _021ECFCA
	ldr r1, [r5, #0x14]
	lsl r0, r1, #0xa
	lsr r0, r0, #0x1f
	beq _021ECFC0
	ldr r0, _021ECFF0 ; =0xFFEFFFFF
	and r0, r1
	str r0, [r5, #0x14]
	ldr r0, [r5]
	bl sub_0200D9DC
	add r0, r6, #0
	str r0, [r5]
	b _021ECFCA
_021ECFC0:
	mov r0, #2
	lsl r0, r0, #0x14
	orr r0, r1
	str r0, [r5, #0x14]
	mov r4, #1
_021ECFCA:
	bl MTRandom
	ldr r2, [r5, #0x14]
	ldr r1, _021ECFF4 ; =0xFFFF0000
	and r1, r2
	lsl r2, r2, #0x10
	lsr r3, r2, #0x10
	mov r2, #1
	and r0, r2
	add r0, r3, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	orr r0, r1
	str r0, [r5, #0x14]
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	nop
_021ECFEC: .word 0x00000000
_021ECFF0: .word 0xFFEFFFFF
_021ECFF4: .word 0xFFFF0000
	thumb_func_end ov96_021ECF48

	thumb_func_start ov96_021ECFF8
ov96_021ECFF8: ; 0x021ECFF8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	ldr r6, _021ED050 ; =0x0221B0F0
	add r7, r2, #0
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #0
	mov r2, #6
_021ED008:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021ED008
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #0
	str r0, [r5, #0x10]
	ldr r0, [r5]
	bl sub_0200DC64
	sub r0, #0xb
	add r1, sp, #0
	strh r0, [r1, #6]
	ldr r0, [r5, #0xc]
	asr r0, r0, #0xc
	strh r0, [r1]
	ldr r0, [r5, #0x10]
	asr r0, r0, #0xc
	strh r0, [r1, #2]
	ldr r0, [r5]
	bl sub_0200D9DC
	mov r3, #0x83
	add r0, r4, #0
	add r1, r7, #0
	add r2, sp, #0
	lsl r3, r3, #0xe
	bl sub_0200D740
	mov r1, #1
	str r0, [r5]
	bl sub_0200DC78
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021ED050: .word 0x0221B0F0
	thumb_func_end ov96_021ECFF8

	thumb_func_start ov96_021ED054
ov96_021ED054: ; 0x021ED054
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	add r7, r0, #0
	add r6, r2, #0
	cmp r5, #0
	bne _021ED064
	bl GF_AssertFail
_021ED064:
	cmp r6, #0
	bne _021ED06C
	bl GF_AssertFail
_021ED06C:
	mov r1, #6
	add r0, r7, #0
	lsl r1, r1, #6
	bl AllocFromHeap
	mov r2, #6
	mov r1, #0
	lsl r2, r2, #6
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x5b
	str r7, [r4]
	lsl r0, r0, #2
	str r5, [r4, r0]
	add r0, r0, #4
	str r6, [r4, r0]
	bl ov96_021ED6E8
	mov r1, #0x5e
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED054

	thumb_func_start ov96_021ED09C
ov96_021ED09C: ; 0x021ED09C
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	bne _021ED0A6
	bl GF_AssertFail
_021ED0A6:
	mov r4, #0
	add r5, r7, #0
	add r6, r4, #0
_021ED0AC:
	ldr r0, [r5, #4]
	cmp r0, #0
	beq _021ED0B8
	bl sub_0200D9DC
	str r6, [r5, #4]
_021ED0B8:
	add r4, r4, #1
	add r5, #0x18
	cmp r4, #0xf
	blt _021ED0AC
	add r0, r7, #0
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED09C

	thumb_func_start ov96_021ED0C8
ov96_021ED0C8: ; 0x021ED0C8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bne _021ED0D2
	bl GF_AssertFail
_021ED0D2:
	mov r2, #0x5f
	lsl r2, r2, #2
	ldr r0, [r5, r2]
	cmp r0, #0
	beq _021ED11E
	add r1, r2, #0
	sub r1, #8
	add r0, r2, #0
	ldr r1, [r5, r1]
	sub r0, #8
	add r3, r1, #1
	add r1, r2, #0
	ldr r0, [r5, r0]
	sub r1, #8
	str r3, [r5, r1]
	sub r1, r2, #4
	ldr r1, [r5, r1]
	cmp r0, r1
	bls _021ED11E
	bl MTRandom
	add r2, r0, #0
	mov r1, #1
	and r1, r2
	add r1, r1, #2
	lsl r1, r1, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021ED17C
	bl ov96_021ED6E8
	mov r1, #0x5e
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r2, #0
	sub r0, r1, #4
	str r2, [r5, r0]
_021ED11E:
	add r6, r5, #0
	mov r7, #0
	add r6, #0x18
	add r4, r5, #4
_021ED126:
	ldr r0, [r6]
	lsl r0, r0, #0xb
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _021ED14C
	add r0, r4, #0
	bl ov96_021ECF48
	cmp r0, #0
	beq _021ED14C
	mov r1, #0x5b
	mov r2, #0x17
	lsl r1, r1, #2
	lsl r2, r2, #4
	ldr r1, [r5, r1]
	ldr r2, [r5, r2]
	add r0, r4, #0
	bl ov96_021ECFF8
_021ED14C:
	add r7, r7, #1
	add r6, #0x18
	add r4, #0x18
	cmp r7, #0xf
	blt _021ED126
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED0C8

	thumb_func_start ov96_021ED158
ov96_021ED158: ; 0x021ED158
	push {r3, lr}
	sub sp, #8
	mov r2, #0x5f
	lsl r2, r2, #2
	str r1, [r0, r2]
	mov r1, #0x20
	str r1, [sp]
	ldr r0, [r0]
	mov r1, #0xc
	str r0, [sp, #4]
	mov r0, #0x9a
	add r3, r0, #0
	mov r2, #1
	add r3, #0xc6
	bl GfGfxLoader_GXLoadPal
	add sp, #8
	pop {r3, pc}
	thumb_func_end ov96_021ED158

	thumb_func_start ov96_021ED17C
ov96_021ED17C: ; 0x021ED17C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r6, r0, #0
	str r1, [sp]
	ldr r7, _021ED1CC ; =0x00000000
	bne _021ED18C
	bl GF_AssertFail
_021ED18C:
	mov r0, #0
	add r4, r6, #0
	str r0, [sp, #4]
	add r4, #0x18
	add r5, r6, #4
_021ED196:
	ldr r0, [r4]
	lsl r0, r0, #0xb
	lsr r0, r0, #0x1f
	bne _021ED1B8
	mov r1, #0x5b
	mov r2, #0x17
	lsl r1, r1, #2
	lsl r2, r2, #4
	ldr r1, [r6, r1]
	ldr r2, [r6, r2]
	add r0, r5, #0
	bl ov96_021ECDEC
	ldr r0, [sp]
	add r7, r7, #1
	cmp r7, r0
	bge _021ED1C6
_021ED1B8:
	ldr r0, [sp, #4]
	add r4, #0x18
	add r0, r0, #1
	add r5, #0x18
	str r0, [sp, #4]
	cmp r0, #0xf
	blt _021ED196
_021ED1C6:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021ED1CC: .word 0x00000000
	thumb_func_end ov96_021ED17C

	thumb_func_start ov96_021ED1D0
ov96_021ED1D0: ; 0x021ED1D0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x118
	str r0, [sp, #8]
	bl ov96_021E5DC4
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	bl ov96_021E5DD4
	cmp r0, #3
	bls _021ED1E8
	b _021ED462
_021ED1E8:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021ED1F4: ; jump table
	.short _021ED1FC - _021ED1F4 - 2 ; case 0
	.short _021ED296 - _021ED1F4 - 2 ; case 1
	.short _021ED336 - _021ED1F4 - 2 ; case 2
	.short _021ED39A - _021ED1F4 - 2 ; case 3
_021ED1FC:
	mov r2, #6
	mov r0, #0x5c
	mov r1, #0x87
	lsl r2, r2, #0x10
	bl sub_0201A910
	ldr r0, _021ED46C ; =SDK_OVERLAY_OVY_98_ID
	mov r1, #2
	bl HandleLoadOverlay
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021ED470 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021ED474 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021EB6A8
	ldr r0, [sp, #8]
	mov r1, #0xbc
	bl ov96_021E5D94
	mov r1, #0
	mov r2, #0xbc
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x87
	str r0, [r4]
	ldr r0, [sp, #8]
	bl ov96_021E5E7C
	add r1, r4, #0
	add r1, #0xb1
	strb r0, [r1]
	ldr r0, [r4]
	bl sub_0201AC88
	str r0, [r4, #4]
	ldr r0, [r4]
	bl ov96_021EE740
	str r0, [r4, #0xc]
	add r0, r4, #0
	bl ov96_021EC490
	ldr r0, [r4]
	mov r1, #6
	mov r2, #1
	bl ov96_021E9A78
	str r0, [r4, #0x10]
	ldr r0, _021ED478 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, [sp, #8]
	bl ov96_021E5DEC
	b _021ED466
_021ED296:
	mov r0, #0
	add r2, sp, #0x14
	add r1, r0, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0x1c]
	bl sub_0200E2B0
	str r0, [sp]
	ldr r0, [sp, #0xc]
	ldr r3, [sp, #0xc]
	ldr r0, [r0]
	ldr r3, [r3, #0x10]
	mov r1, #0xc
	mov r2, #3
	bl ov96_021EA854
	ldr r1, [sp, #0xc]
	mov r4, #0
	str r0, [r1, #0x14]
	add r6, sp, #0x58
	add r5, sp, #0x14
_021ED2D2:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r1, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x10]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	add r3, r6, #0
	bl ov96_021E6168
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r5, #0x14]
	add r4, r4, #1
	add r6, #0x10
	add r5, r5, #4
	cmp r4, #0xc
	blt _021ED2D2
	mov r0, #3
	mov r1, #0
	str r0, [sp, #0x18]
	mov r0, #1
	str r1, [sp, #0x14]
	str r1, [sp, #0x1c]
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [sp, #0xc]
	mov r1, #0xc
	ldr r0, [r0, #0x14]
	add r2, sp, #0x58
	add r3, sp, #0x14
	bl ov96_021EA8A8
	ldr r0, [sp, #8]
	bl ov96_021E5DEC
	b _021ED466
_021ED336:
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0x14]
	bl ov96_021EAA00
	cmp r0, #0
	bne _021ED344
	b _021ED466
_021ED344:
	ldr r0, [sp, #8]
	bl ov96_021EC82C
	ldr r0, [sp, #0xc]
	bl ov96_021EC550
	ldr r0, [sp, #0xc]
	bl ov96_021EC5C0
	ldr r0, [sp, #0xc]
	bl ov96_021EC68C
	ldr r0, [sp, #0xc]
	bl ov96_021EC70C
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0xc]
	ldr r0, [r0]
	add r1, #0x20
	bl ov96_021ECBB8
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0xc]
	add r1, #0x8c
	str r0, [r1]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0xc]
	ldr r0, [r0]
	ldr r1, [r1, #0x18]
	ldr r2, [r2, #0x1c]
	bl ov96_021ED054
	ldr r1, [sp, #0xc]
	add r1, #0x90
	str r0, [r1]
	ldr r0, [sp, #8]
	str r1, [sp, #0xc]
	bl ov96_021ECAC4
	ldr r0, [sp, #8]
	bl ov96_021E5DEC
	b _021ED466
_021ED39A:
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #4]
	bl ov96_021E6030
	ldr r0, [sp, #8]
	mov r1, #1
	bl ov96_021E5DFC
	mov r5, #0
	add r6, r5, #0
_021ED3AE:
	ldr r0, [sp, #0xc]
	lsl r1, r5, #0x18
	ldr r0, [r0, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r4, r0, #0
	mov r1, #1
	bl ov96_021EAB38
	add r0, r4, #0
	bl ov96_021EAA20
	bl ov96_021E8BAC
	bl sub_02024CB8
	lsl r1, r6, #0xc
	str r1, [r0, #0x10]
	add r0, r4, #0
	mov r1, #1
	bl ov96_021EAC0C
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	lsl r1, r7, #6
	add r3, r2, #1
	mov r2, #0x30
	add r0, r4, #0
	add r1, #0x20
	mul r2, r3
	bl ov96_021EAF94
	add r5, r5, #1
	add r6, r6, #3
	cmp r5, #0xc
	blt _021ED3AE
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #4]
	bl ov96_021EC2E8
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0xc]
	ldr r0, [r0, #4]
	ldr r1, [r1]
	bl ov96_021EC3D8
	ldr r0, [sp, #8]
	bl ov96_021E5EE8
	add r4, r0, #0
	ldr r0, [sp, #8]
	bl ov96_021E5D60
	str r0, [sp]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0xc]
	ldr r0, [r0, #0xc]
	ldr r1, [r1, #4]
	mov r2, #4
	add r3, r4, #0
	bl ov96_021EE75C
	mov r0, #2
	bl sub_0203A994
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	ldr r0, [sp, #0xc]
	mov r1, #0
	add r0, #0xb5
	str r0, [sp, #0xc]
	strb r1, [r0]
	add sp, #0x118
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021ED462:
	bl GF_AssertFail
_021ED466:
	mov r0, #0
	add sp, #0x118
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021ED46C: .word SDK_OVERLAY_OVY_98_ID
_021ED470: .word 0xFFFFE0FF
_021ED474: .word 0x04001000
_021ED478: .word gMain + 0x60
	thumb_func_end ov96_021ED1D0

	thumb_func_start ov96_021ED47C
ov96_021ED47C: ; 0x021ED47C
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x1c]
	bl sub_0200D020
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_021ED47C

	thumb_func_start ov96_021ED48C
ov96_021ED48C: ; 0x021ED48C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r4, #0
	add r0, #0x90
	ldr r0, [r0]
	bl ov96_021ED09C
	add r0, r4, #0
	add r0, #0x8c
	ldr r0, [r0]
	bl ov96_021ECBF4
	ldr r0, [r4, #0xc]
	bl ov96_021EE808
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	bl FreeToHeap
	ldr r0, [r4, #0x14]
	bl ov96_021EA894
	ldr r0, [r4, #0x10]
	bl ov96_021E9C0C
	bl sub_0203A914
	add r0, r4, #0
	bl ov96_021EC51C
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _021ED51C ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _021ED520 ; =SDK_OVERLAY_OVY_98_ID
	bl UnloadOverlayByID
	mov r0, #0x87
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021ED51C: .word gMain + 0x60
_021ED520: .word SDK_OVERLAY_OVY_98_ID
	thumb_func_end ov96_021ED48C

	thumb_func_start ov96_021ED524
ov96_021ED524: ; 0x021ED524
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r0, #0
	add r7, r1, #0
	add r5, r2, #0
	str r3, [sp, #8]
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r6, #0
	add r1, r7, #0
	bl ov96_021E5D50
	add r6, r0, #0
	ldr r1, [r4]
	mov r0, #0xb
	bl String_ctor
	mov r1, #0x28
	mul r1, r5
	add r1, r6, r1
	add r1, #0x12
	add r7, r0, #0
	bl CopyU16ArrayToString
	ldr r0, [r4, #0xc]
	bl ov96_021EE97C
	mov r1, #1
	str r1, [sp]
	mov r1, #0
	str r1, [sp, #4]
	ldr r1, [sp, #8]
	add r2, r7, #0
	mov r3, #2
	bl BufferString
	add r0, r7, #0
	bl String_dtor
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED524

	thumb_func_start ov96_021ED578
ov96_021ED578: ; 0x021ED578
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	bl ov96_021E5DC4
	ldr r0, [r0, #0xc]
	bl ov96_021EE97C
	add r4, r0, #0
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r4, #0
	mov r1, #0
	bl BufferPlayersName
	add r0, r4, #0
	add r1, r7, #0
	mov r2, #3
	mov r3, #1
	bl ov96_021EDF3C
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED578

	thumb_func_start ov96_021ED5AC
ov96_021ED5AC: ; 0x021ED5AC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	ldr r0, [r0, #0xc]
	bl ov96_021EE97C
	add r7, r0, #0
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021E5F34
	add r2, r0, #0
	add r0, r7, #0
	mov r1, #0
	bl BufferPlayersName
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	mov r3, #1
	bl ov96_021ED524
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED5AC

	thumb_func_start ov96_021ED5E0
ov96_021ED5E0: ; 0x021ED5E0
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED5FA
	bl GF_AssertFail
_021ED5FA:
	cmp r6, #0
	bne _021ED602
	bl GF_AssertFail
_021ED602:
	cmp r4, #0
	bne _021ED60A
	bl GF_AssertFail
_021ED60A:
	ldr r0, [r4, #4]
	lsl r0, r0, #5
	lsr r0, r0, #0x14
	bl sub_020E3714
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED5E0

	thumb_func_start ov96_021ED618
ov96_021ED618: ; 0x021ED618
	push {r3, r4, r5, r6, r7, lr}
	lsl r3, r1, #1
	add r1, r1, r3
	add r6, r0, #0
	add r4, r2, r1
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	cmp r6, #0
	bne _021ED638
	bl GF_AssertFail
_021ED638:
	cmp r7, #0
	bne _021ED640
	bl GF_AssertFail
_021ED640:
	cmp r5, #0
	bne _021ED648
	bl GF_AssertFail
_021ED648:
	cmp r4, #0xc
	blt _021ED650
	bl GF_AssertFail
_021ED650:
	ldr r0, [r5, #4]
	lsl r0, r0, #5
	lsr r1, r0, #0x14
	mov r0, #1
	lsl r0, r4
	and r0, r1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED618

	thumb_func_start ov96_021ED660
ov96_021ED660: ; 0x021ED660
	push {r3, r4, r5, r6, r7, lr}
	lsl r3, r1, #1
	add r1, r1, r3
	add r6, r0, #0
	add r4, r2, r1
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	cmp r6, #0
	bne _021ED680
	bl GF_AssertFail
_021ED680:
	cmp r7, #0
	bne _021ED688
	bl GF_AssertFail
_021ED688:
	cmp r5, #0
	bne _021ED690
	bl GF_AssertFail
_021ED690:
	cmp r4, #0xc
	blt _021ED698
	bl GF_AssertFail
_021ED698:
	ldr r0, [r5, #8]
	lsl r0, r0, #4
	lsr r1, r0, #0x14
	mov r0, #1
	lsl r0, r4
	and r0, r1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED660

	thumb_func_start ov96_021ED6A8
ov96_021ED6A8: ; 0x021ED6A8
	push {r3, r4, r5, r6, r7, lr}
	lsl r3, r1, #1
	add r1, r1, r3
	add r6, r0, #0
	add r4, r2, r1
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	cmp r6, #0
	bne _021ED6C8
	bl GF_AssertFail
_021ED6C8:
	cmp r7, #0
	bne _021ED6D0
	bl GF_AssertFail
_021ED6D0:
	cmp r5, #0
	bne _021ED6D8
	bl GF_AssertFail
_021ED6D8:
	ldr r0, [r5, #4]
	lsl r0, r0, #0x11
	lsr r1, r0, #0x14
	mov r0, #1
	lsl r0, r4
	and r0, r1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED6A8

	thumb_func_start ov96_021ED6E8
ov96_021ED6E8: ; 0x021ED6E8
	push {r3, lr}
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, r0, #4
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED6E8

	thumb_func_start ov96_021ED6F8
ov96_021ED6F8: ; 0x021ED6F8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED714
	bl GF_AssertFail
_021ED714:
	cmp r7, #0
	bne _021ED71C
	bl GF_AssertFail
_021ED71C:
	cmp r4, #0
	bne _021ED724
	bl GF_AssertFail
_021ED724:
	ldrb r0, [r4, r6]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED6F8

	thumb_func_start ov96_021ED728
ov96_021ED728: ; 0x021ED728
	push {r4, r5, r6, lr}
	add r6, r1, #0
	add r1, r2, #0
	add r5, r0, #0
	bl ov96_021E5E58
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r5, #0
	bl ov96_021E6040
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_021E95D8
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021ED728

	thumb_func_start ov96_021ED748
ov96_021ED748: ; 0x021ED748
	mov r0, #0xa
	bx lr
	thumb_func_end ov96_021ED748

	thumb_func_start ov96_021ED74C
ov96_021ED74C: ; 0x021ED74C
	mov r0, #0x14
	bx lr
	thumb_func_end ov96_021ED74C

	thumb_func_start ov96_021ED750
ov96_021ED750: ; 0x021ED750
	mov r0, #0xa
	bx lr
	thumb_func_end ov96_021ED750

	thumb_func_start ov96_021ED754
ov96_021ED754: ; 0x021ED754
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED76E
	bl GF_AssertFail
_021ED76E:
	cmp r6, #0
	bne _021ED776
	bl GF_AssertFail
_021ED776:
	cmp r4, #0
	bne _021ED77E
	bl GF_AssertFail
_021ED77E:
	ldr r0, [r4, #4]
	lsl r0, r0, #5
	lsr r0, r0, #0x14
	bl sub_020E3714
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED754

	thumb_func_start ov96_021ED78C
ov96_021ED78C: ; 0x021ED78C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED7A6
	bl GF_AssertFail
_021ED7A6:
	cmp r6, #0
	bne _021ED7AE
	bl GF_AssertFail
_021ED7AE:
	cmp r4, #0
	bne _021ED7B6
	bl GF_AssertFail
_021ED7B6:
	ldr r0, [r4, #8]
	lsl r0, r0, #4
	lsr r0, r0, #0x14
	bl sub_020E3714
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED78C

	thumb_func_start ov96_021ED7C4
ov96_021ED7C4: ; 0x021ED7C4
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED7DE
	bl GF_AssertFail
_021ED7DE:
	cmp r6, #0
	bne _021ED7E6
	bl GF_AssertFail
_021ED7E6:
	cmp r4, #0
	bne _021ED7EE
	bl GF_AssertFail
_021ED7EE:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x11
	lsr r0, r0, #0x14
	bl sub_020E3714
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED7C4

	thumb_func_start ov96_021ED7FC
ov96_021ED7FC: ; 0x021ED7FC
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r5, r1, #0
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r6, #0
	bne _021ED818
	bl GF_AssertFail
_021ED818:
	cmp r7, #0
	bne _021ED820
	bl GF_AssertFail
_021ED820:
	cmp r4, #0
	bne _021ED828
	bl GF_AssertFail
_021ED828:
	mov r1, #0
_021ED82A:
	add r0, r4, r1
	ldrb r0, [r0, #0xd]
	strb r0, [r5, r1]
	add r1, r1, #1
	cmp r1, #4
	blt _021ED82A
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED7FC

	thumb_func_start ov96_021ED838
ov96_021ED838: ; 0x021ED838
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED854
	bl GF_AssertFail
_021ED854:
	cmp r7, #0
	bne _021ED85C
	bl GF_AssertFail
_021ED85C:
	cmp r4, #0
	bne _021ED864
	bl GF_AssertFail
_021ED864:
	lsl r0, r6, #3
	ldr r0, [r4, r0]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED838

	thumb_func_start ov96_021ED86C
ov96_021ED86C: ; 0x021ED86C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED888
	bl GF_AssertFail
_021ED888:
	cmp r7, #0
	bne _021ED890
	bl GF_AssertFail
_021ED890:
	cmp r4, #0
	bne _021ED898
	bl GF_AssertFail
_021ED898:
	lsl r0, r6, #3
	add r0, r4, r0
	ldr r0, [r0, #4]
	lsl r0, r0, #8
	lsr r0, r0, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED86C

	thumb_func_start ov96_021ED8A4
ov96_021ED8A4: ; 0x021ED8A4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	bl ov96_021E5F54
	add r7, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021ED8C0
	bl GF_AssertFail
_021ED8C0:
	cmp r7, #0
	bne _021ED8C8
	bl GF_AssertFail
_021ED8C8:
	cmp r4, #0
	bne _021ED8D0
	bl GF_AssertFail
_021ED8D0:
	lsl r0, r6, #3
	add r0, r4, r0
	ldr r0, [r0, #4]
	lsr r0, r0, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED8A4

	thumb_func_start ov96_021ED8DC
ov96_021ED8DC: ; 0x021ED8DC
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5EE8
	cmp r0, #0
	bne _021ED922
	mov r6, #0
_021ED8F8:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r6, r0
	bne _021ED90C
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021EE0AC
	b _021ED918
_021ED90C:
	lsl r2, r6, #0x18
	add r0, r4, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021EE1D8
_021ED918:
	add r6, r6, #1
	add r4, #8
	cmp r6, #4
	blt _021ED8F8
	pop {r4, r5, r6, pc}
_021ED922:
	mov r6, #0
_021ED924:
	add r0, r5, #0
	bl ov96_021E5D34
	cmp r0, r6
	ble _021ED93C
	lsl r2, r6, #0x18
	add r0, r4, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021EE144
	b _021ED948
_021ED93C:
	lsl r2, r6, #0x18
	add r0, r4, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021EE1D8
_021ED948:
	add r6, r6, #1
	add r4, #8
	cmp r6, #4
	blt _021ED924
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED8DC

	thumb_func_start ov96_021ED954
ov96_021ED954: ; 0x021ED954
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r4, r0, #0
	add r5, r1, #0
	mov r6, #0x4b
	bl ov96_021E5DCC
	add r1, r0, #0
	mov r0, #0xa9
	bl NARC_ctor
	str r0, [sp]
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E5D50
	add r5, r0, #0
	mov r7, #0
	add r4, sp, #4
_021ED97A:
	ldrh r0, [r5]
	ldrh r1, [r5, #2]
	bl ov96_021E679C
	add r1, r0, #0
	ldr r0, [sp]
	add r2, sp, #4
	bl NARC_ReadWholeMember
	ldrb r0, [r4]
	add r7, r7, #1
	add r5, #0x28
	add r0, r0, #1
	sub r1, r6, r0
	ldrb r0, [r4, #1]
	add r0, r0, #1
	sub r1, r1, r0
	ldrb r0, [r4, #2]
	add r0, r0, #1
	sub r1, r1, r0
	ldrb r0, [r4, #3]
	add r0, r0, #1
	sub r1, r1, r0
	ldrb r0, [r4, #4]
	add r0, r0, #1
	sub r6, r1, r0
	cmp r7, #3
	blt _021ED97A
	cmp r6, #0x4b
	ble _021ED9BA
	mov r6, #0x4b
	b _021ED9C0
_021ED9BA:
	cmp r6, #0
	bge _021ED9C0
	mov r6, #0
_021ED9C0:
	ldr r0, [sp]
	bl NARC_dtor
	add r0, r6, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021ED954

	thumb_func_start ov96_021ED9CC
ov96_021ED9CC: ; 0x021ED9CC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r0, #0
	mov r0, #0
	str r0, [sp, #4]
	bl MTRandom
	mov r1, #3
	and r0, r1
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #0xc]
_021ED9E4:
	mov r0, #0
	str r0, [sp, #8]
	ldr r0, [sp]
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
_021ED9EE:
	ldr r0, [sp, #8]
	mov r5, #0
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_021ED9F6:
	lsl r3, r5, #0x18
	add r0, r7, #0
	add r1, r6, #0
	add r2, r4, #0
	lsr r3, r3, #0x18
	bl ov96_021EDCEC
	cmp r0, #0
	beq _021EDA0E
	mov r0, #1
	str r0, [sp, #4]
	b _021EDA14
_021EDA0E:
	add r5, r5, #1
	cmp r5, #3
	blt _021ED9F6
_021EDA14:
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _021EDA24
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _021ED9EE
_021EDA24:
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _021EDA46
	ldr r0, [sp]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r2, r1
	str r0, [sp]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	blt _021ED9E4
_021EDA46:
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _021EDA50
	mov r0, #4
	str r0, [sp]
_021EDA50:
	ldr r0, [sp]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021ED9CC

	thumb_func_start ov96_021EDA58
ov96_021EDA58: ; 0x021EDA58
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	str r0, [sp]
	bl ov96_021E5D6C
	str r0, [sp, #0x10]
	ldr r0, [sp]
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r1, [r4, #4]
	ldr r0, _021EDC28 ; =0xF8007FFF
	mov r5, #0
	and r1, r0
	asr r0, r0, #0xc
	and r0, r1
	str r0, [r4, #4]
	ldr r1, [r4, #8]
	ldr r0, _021EDC2C ; =0xF000FFFF
	and r0, r1
	str r0, [r4, #8]
_021EDA88:
	lsl r1, r5, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	bl ov96_021ED954
	strb r0, [r4, r5]
	add r5, r5, #1
	cmp r5, #4
	blt _021EDA88
	ldr r0, [sp]
	bl ov96_021ED9CC
	ldr r2, [r4, #4]
	mov r1, #7
	bic r2, r1
	mov r1, #7
	and r0, r1
	add r1, r2, #0
	orr r1, r0
	mov r0, #0
	str r0, [sp, #0x20]
	str r0, [sp, #0xc]
	lsl r0, r1, #0x1d
	lsr r0, r0, #0x1d
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x20]
	str r1, [r4, #4]
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x10]
	str r0, [sp, #8]
	ldr r0, [sp, #0x1c]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x28]
_021EDACC:
	ldr r0, [sp, #0x24]
	ldr r5, [sp, #8]
	lsl r0, r0, #0x18
	mov r6, #0
	lsr r7, r0, #0x18
_021EDAD6:
	ldr r0, [sp, #0x1c]
	cmp r0, #4
	beq _021EDAF2
	lsl r3, r6, #0x18
	ldr r0, [sp]
	ldr r1, [sp, #0x28]
	add r2, r7, #0
	lsr r3, r3, #0x18
	bl ov96_021EDCEC
	ldr r1, [sp, #0x20]
	cmp r1, r0
	bge _021EDAF2
	str r0, [sp, #0x20]
_021EDAF2:
	ldr r1, [r5, #8]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	bhs _021EDAFC
	str r1, [sp, #0xc]
_021EDAFC:
	add r6, r6, #1
	add r5, #0x20
	cmp r6, #3
	blt _021EDAD6
	ldr r0, [sp, #8]
	add r0, #0x60
	str r0, [sp, #8]
	ldr r0, [sp, #0x24]
	add r0, r0, #1
	str r0, [sp, #0x24]
	cmp r0, #4
	blt _021EDACC
	mov r0, #0
	str r0, [sp, #4]
	str r0, [sp, #0x14]
_021EDB1A:
	add r0, r4, #0
	str r0, [sp, #0x2c]
	add r0, #8
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x1c]
	ldr r5, [sp, #0x10]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x30]
	ldr r0, [sp, #4]
	mov r6, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x34]
_021EDB36:
	ldr r0, [sp, #0x14]
	add r0, r6, r0
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [r5]
	cmp r0, #0
	bne _021EDB6A
	ldr r0, [r5, #0x10]
	cmp r0, #0
	bne _021EDB6A
	ldr r0, [r5, #0x1c]
	cmp r0, #0
	bne _021EDB6A
	ldr r2, [r4, #4]
	ldr r0, _021EDC28 ; =0xF8007FFF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #5
	mov r2, #1
	lsl r2, r7
	lsr r0, r0, #0x14
	add r0, r0, r2
	lsl r0, r0, #0x14
	lsr r0, r0, #5
	orr r0, r1
	str r0, [r4, #4]
_021EDB6A:
	ldr r1, [r5, #8]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	bne _021EDB90
	ldr r0, [sp, #0x2c]
	ldr r2, [r0]
	ldr r0, _021EDC2C ; =0xF000FFFF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #4
	mov r2, #1
	lsl r2, r7
	lsr r0, r0, #0x14
	add r0, r0, r2
	lsl r0, r0, #0x14
	lsr r0, r0, #4
	orr r1, r0
	ldr r0, [sp, #0x2c]
	str r1, [r0]
_021EDB90:
	ldr r0, [sp, #0x1c]
	cmp r0, #4
	beq _021EDBD2
	lsl r3, r6, #0x18
	ldr r0, [sp]
	ldr r1, [sp, #0x30]
	ldr r2, [sp, #0x34]
	lsr r3, r3, #0x18
	bl ov96_021EDCEC
	ldr r1, [sp, #0x20]
	str r0, [sp, #0x18]
	cmp r0, r1
	ble _021EDBB0
	bl GF_AssertFail
_021EDBB0:
	ldr r1, [sp, #0x20]
	ldr r0, [sp, #0x18]
	cmp r1, r0
	bne _021EDBD2
	ldr r2, [r4, #4]
	ldr r0, _021EDC30 ; =0xFFFF8007
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #0x11
	mov r2, #1
	lsl r2, r7
	lsr r0, r0, #0x14
	add r0, r0, r2
	lsl r0, r0, #0x14
	lsr r0, r0, #0x11
	orr r0, r1
	str r0, [r4, #4]
_021EDBD2:
	add r6, r6, #1
	add r5, #0x20
	cmp r6, #3
	blt _021EDB36
	ldr r0, [sp, #0x14]
	add r0, r0, #3
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, #0x60
	str r0, [sp, #0x10]
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #4
	blt _021EDB1A
	ldr r1, [r4, #8]
	ldr r0, _021EDC34 ; =0xFFFF0000
	and r1, r0
	ldr r0, [sp, #0x20]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	orr r0, r1
	str r0, [r4, #8]
	bl MTRandom
	add r2, r0, #0
	mov r1, #3
	and r2, r1
	mov r3, #0
	mov r0, #0x1e
_021EDC0E:
	add r1, r4, r2
	strb r3, [r1, #0xd]
	add r1, r2, #1
	lsr r2, r1, #0x1f
	lsl r1, r1, #0x1e
	sub r1, r1, r2
	ror r1, r0
	add r3, r3, #1
	add r2, r2, r1
	cmp r3, #4
	blt _021EDC0E
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021EDC28: .word 0xF8007FFF
_021EDC2C: .word 0xF000FFFF
_021EDC30: .word 0xFFFF8007
_021EDC34: .word 0xFFFF0000
	thumb_func_end ov96_021EDA58

	thumb_func_start ov96_021EDC38
ov96_021EDC38: ; 0x021EDC38
	cmp r0, #0xa
	bhi _021EDCB0
	add r2, r0, r0
	add r2, pc
	ldrh r2, [r2, #6]
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	add pc, r2
_021EDC48: ; jump table
	.short _021EDCB0 - _021EDC48 - 2 ; case 0
	.short _021EDCB0 - _021EDC48 - 2 ; case 1
	.short _021EDCB0 - _021EDC48 - 2 ; case 2
	.short _021EDCB0 - _021EDC48 - 2 ; case 3
	.short _021EDCB0 - _021EDC48 - 2 ; case 4
	.short _021EDC62 - _021EDC48 - 2 ; case 5
	.short _021EDC72 - _021EDC48 - 2 ; case 6
	.short _021EDC82 - _021EDC48 - 2 ; case 7
	.short _021EDC92 - _021EDC48 - 2 ; case 8
	.short _021EDCA2 - _021EDC48 - 2 ; case 9
	.short _021EDC5E - _021EDC48 - 2 ; case 10
_021EDC5E:
	mov r0, #0
	bx lr
_021EDC62:
	cmp r1, #0
	beq _021EDC6A
	mov r0, #4
	b _021EDC6C
_021EDC6A:
	mov r0, #0
_021EDC6C:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
_021EDC72:
	cmp r1, #0
	beq _021EDC7A
	mov r0, #2
	b _021EDC7C
_021EDC7A:
	mov r0, #4
_021EDC7C:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
_021EDC82:
	cmp r1, #0
	beq _021EDC8A
	mov r0, #1
	b _021EDC8C
_021EDC8A:
	mov r0, #2
_021EDC8C:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
_021EDC92:
	cmp r1, #0
	beq _021EDC9A
	mov r0, #3
	b _021EDC9C
_021EDC9A:
	mov r0, #1
_021EDC9C:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
_021EDCA2:
	cmp r1, #0
	beq _021EDCAA
	mov r0, #0
	b _021EDCAC
_021EDCAA:
	mov r0, #3
_021EDCAC:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
_021EDCB0:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EDC38

	thumb_func_start ov96_021EDCB4
ov96_021EDCB4: ; 0x021EDCB4
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021EDCCE
	bl GF_AssertFail
_021EDCCE:
	cmp r6, #0
	bne _021EDCD6
	bl GF_AssertFail
_021EDCD6:
	cmp r4, #0
	bne _021EDCDE
	bl GF_AssertFail
_021EDCDE:
	ldr r0, [r4, #4]
	lsl r0, r0, #0x1d
	lsr r0, r0, #0x1d
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EDCB4

	thumb_func_start ov96_021EDCEC
ov96_021EDCEC: ; 0x021EDCEC
	push {r3, r4, r5, r6, r7, lr}
	add r7, r1, #0
	add r4, r2, #0
	add r5, r3, #0
	bl ov96_021E5D6C
	add r6, r0, #0
	cmp r4, #4
	blo _021EDD02
	bl GF_AssertFail
_021EDD02:
	cmp r5, #3
	blo _021EDD0A
	bl GF_AssertFail
_021EDD0A:
	cmp r7, #3
	bhi _021EDD58
	add r0, r7, r7
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021EDD1A: ; jump table
	.short _021EDD22 - _021EDD1A - 2 ; case 0
	.short _021EDD30 - _021EDD1A - 2 ; case 1
	.short _021EDD3E - _021EDD1A - 2 ; case 2
	.short _021EDD4A - _021EDD1A - 2 ; case 3
_021EDD22:
	mov r0, #0x60
	mul r0, r4
	add r1, r6, r0
	lsl r0, r5, #5
	add r0, r1, r0
	ldr r0, [r0, #4]
	pop {r3, r4, r5, r6, r7, pc}
_021EDD30:
	mov r0, #0x60
	mul r0, r4
	add r1, r6, r0
	lsl r0, r5, #5
	add r0, r1, r0
	ldr r0, [r0, #0xc]
	pop {r3, r4, r5, r6, r7, pc}
_021EDD3E:
	mov r0, #0x60
	mul r0, r4
	lsl r1, r5, #5
	add r0, r6, r0
	ldr r0, [r1, r0]
	pop {r3, r4, r5, r6, r7, pc}
_021EDD4A:
	mov r0, #0x60
	mul r0, r4
	add r1, r6, r0
	lsl r0, r5, #5
	add r0, r1, r0
	ldr r0, [r0, #0x14]
	pop {r3, r4, r5, r6, r7, pc}
_021EDD58:
	bl GF_AssertFail
	bl GF_AssertFail
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EDCEC

	thumb_func_start ov96_021EDD64
ov96_021EDD64: ; 0x021EDD64
	add r1, r0, #0
	add r1, #0xb3
	ldrb r1, [r1]
	add r2, r1, #1
	add r1, r0, #0
	add r1, #0xb3
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0xb3
	ldrb r1, [r1]
	cmp r1, #3
	blo _021EDD92
	add r1, r0, #0
	mov r2, #0
	add r1, #0xb3
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0xb2
	ldrb r1, [r1]
	add r2, r1, #1
	add r1, r0, #0
	add r1, #0xb2
	strb r2, [r1]
_021EDD92:
	add r0, #0xb2
	ldrb r0, [r0]
	cmp r0, #4
	bne _021EDD9E
	mov r0, #1
	bx lr
_021EDD9E:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EDD64

	thumb_func_start ov96_021EDDA4
ov96_021EDDA4: ; 0x021EDDA4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	bl ov96_021E5DC4
	add r4, r0, #0
_021EDDB2:
	add r1, r4, #0
	add r2, r4, #0
	add r1, #0xb2
	add r2, #0xb3
	ldrb r1, [r1]
	ldrb r2, [r2]
	add r0, r5, #0
	blx r6
	cmp r0, #0
	bne _021EDDD0
	add r0, r4, #0
	bl ov96_021EDD64
	cmp r0, #0
	beq _021EDDB2
_021EDDD0:
	add r0, r4, #0
	add r0, #0xb2
	ldrb r1, [r0]
	cmp r1, #4
	bhs _021EDE5E
	add r0, r4, #0
	add r0, #0xb3
	ldrb r2, [r0]
	lsl r0, r1, #1
	add r0, r1, r0
	add r6, r2, r0
	add r0, r4, #0
	add r0, #0xac
	ldrb r2, [r0, r1]
	add r2, r2, #1
	strb r2, [r0, r1]
	add r0, r4, #0
	add r0, #0xb4
	ldrb r0, [r0]
	add r2, r4, #0
	add r2, #0xb3
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xb4
	strb r1, [r0]
	add r1, r4, #0
	add r1, #0xb2
	ldrb r1, [r1]
	ldrb r2, [r2]
	add r0, r5, #0
	bl ov96_021ED5AC
	add r1, r4, #0
	add r0, r4, #0
	add r1, #0xb2
	add r0, #0x8c
	lsl r2, r7, #0x10
	ldrb r1, [r1]
	ldr r0, [r0]
	lsr r2, r2, #0x10
	bl ov96_021ECC38
	lsl r1, r6, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_021EC298
	lsl r1, r6, #0x18
	ldr r0, [r4, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	bl ov96_021EAA20
	bl ov96_021E8BB0
	add r5, r0, #0
	mov r0, #1
	bl sub_02006E3C
	ldrh r1, [r5, #2]
	ldrh r0, [r5]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_02006218
	add r0, r4, #0
	bl ov96_021EDD64
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021EDE5E:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EDDA4

	thumb_func_start ov96_021EDE64
ov96_021EDE64: ; 0x021EDE64
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r0, #0
	add r6, r1, #0
	bl ov96_021E5F24
	str r0, [sp, #4]
	add r0, r4, #0
	bl ov96_021E5DC4
	str r0, [sp]
	add r0, r4, #0
	bl ov96_021E5D6C
	add r7, r0, #0
	ldr r0, [sp]
	add r0, #0x9c
	ldr r0, [r0]
	lsl r0, r0, #4
	lsr r1, r0, #0x1c
	ldr r0, [sp, #4]
	cmp r1, r0
	bne _021EDEA2
	mov r1, #0x1d
	lsl r1, r1, #4
	ldrh r2, [r7, r1]
	mov r0, #1
	bic r2, r0
	mov r0, #1
	orr r0, r2
	strh r0, [r7, r1]
_021EDEA2:
	ldr r5, _021EDF34 ; =0x000003E7
	mov r4, #0
_021EDEA6:
	lsl r1, r4, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_021ECC4C
	cmp r5, r0
	blt _021EDEB6
	add r5, r0, #0
_021EDEB6:
	add r4, r4, #1
	cmp r4, #4
	blt _021EDEA6
	ldr r1, [sp, #4]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021ECC4C
	cmp r0, r5
	bne _021EDED8
	mov r1, #0x1d
	lsl r1, r1, #4
	ldrh r2, [r7, r1]
	mov r0, #2
	orr r0, r2
	strh r0, [r7, r1]
_021EDED8:
	ldr r1, [sp]
	ldr r0, [sp, #4]
	add r0, r1, r0
	add r0, #0xac
	ldrb r1, [r0]
	mov r0, #6
	lsl r0, r0, #6
	str r1, [r7, r0]
	ldr r0, [sp]
	ldr r1, [sp, #4]
	add r0, #0x8c
	lsl r1, r1, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021ECC4C
	ldr r1, _021EDF38 ; =0x000001D2
	strh r0, [r7, r1]
	ldr r1, [sp, #4]
	ldr r0, [sp]
	lsl r1, r1, #0x18
	add r0, #0x9c
	lsr r1, r1, #0x18
	str r0, [sp]
	bl ov96_021EE264
	add r4, r0, #0
	mov r0, #0
	mvn r0, r0
	cmp r4, r0
	bne _021EDF1A
	bl GF_AssertFail
_021EDF1A:
	mov r2, #0x1d
	lsl r2, r2, #4
	ldrh r0, [r7, r2]
	mov r1, #0xc
	bic r0, r1
	lsl r1, r4, #0x10
	lsr r1, r1, #0x10
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1c
	orr r0, r1
	strh r0, [r7, r2]
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021EDF34: .word 0x000003E7
_021EDF38: .word 0x000001D2
	thumb_func_end ov96_021EDE64

	thumb_func_start ov96_021EDF3C
ov96_021EDF3C: ; 0x021EDF3C
	push {r3, r4, r5, lr}
	sub sp, #8
	add r5, r1, #0
	mov r1, #0
	add r4, r2, #0
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	add r1, r3, #0
	add r2, r5, #0
	add r3, r4, #0
	bl BufferIntegerAsString
	add sp, #8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EDF3C

	thumb_func_start ov96_021EDF5C
ov96_021EDF5C: ; 0x021EDF5C
	ldr r3, _021EDF78 ; =0x0221B058
	mov r2, #0
_021EDF60:
	ldr r1, [r3]
	cmp r1, r0
	ble _021EDF6A
	add r0, r2, #0
	bx lr
_021EDF6A:
	add r2, r2, #1
	add r3, r3, #4
	cmp r2, #0xc
	blt _021EDF60
	add r0, r2, #0
	bx lr
	nop
_021EDF78: .word 0x0221B058
	thumb_func_end ov96_021EDF5C

	thumb_func_start ov96_021EDF7C
ov96_021EDF7C: ; 0x021EDF7C
	lsl r0, r0, #2
	add r0, #0x20
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EDF7C

	thumb_func_start ov96_021EDF84
ov96_021EDF84: ; 0x021EDF84
	push {r4, r5}
	mov r4, #0
	add r3, r4, #0
	add r5, r1, #0
_021EDF8C:
	ldr r2, [r5, #0x44]
	add r3, r3, #1
	add r4, r4, r2
	add r5, r5, #4
	cmp r3, #0xa
	blt _021EDF8C
	ldr r2, [r1, #4]
	mov r5, #0
	str r2, [r0]
	ldr r2, [r1, #8]
	add r3, r1, #0
	str r2, [r0, #4]
	ldr r2, [r1, #0xc]
	str r2, [r0, #8]
	str r4, [r0, #0xc]
	ldr r2, [r1, #0x6c]
	add r4, r0, #0
	str r2, [r0, #0x10]
	ldr r2, [r1, #0x10]
	str r2, [r0, #0x14]
	ldr r2, [r1, #0x14]
	str r2, [r0, #0x18]
	ldr r2, [r1, #0x18]
	str r2, [r0, #0x1c]
	ldr r2, [r1, #0x1c]
	str r2, [r0, #0x20]
	ldr r2, [r1, #0x20]
	str r2, [r0, #0x24]
	ldr r2, [r1, #0x24]
	str r2, [r0, #0x28]
	ldr r2, [r1, #0x28]
	str r2, [r0, #0x2c]
	ldr r2, [r1, #0x2c]
	str r2, [r0, #0x30]
	ldr r2, [r1, #0x30]
	str r2, [r0, #0x34]
	ldr r2, [r1, #0x38]
	str r2, [r0, #0x38]
	ldr r2, [r1, #0x3c]
	str r2, [r0, #0x3c]
	ldr r2, [r1, #0x40]
	str r2, [r0, #0x40]
_021EDFE0:
	ldr r2, [r3, #0x44]
	add r5, r5, #1
	str r2, [r4, #0x44]
	add r3, r3, #4
	add r4, r4, #4
	cmp r5, #0xa
	blt _021EDFE0
	ldr r2, [r1, #0x34]
	str r2, [r0, #0x6c]
	ldr r1, [r1, #0x70]
	str r1, [r0, #0x70]
	pop {r4, r5}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021EDF84

	thumb_func_start ov96_021EDFFC
ov96_021EDFFC: ; 0x021EDFFC
	push {r3, r4, r5, r6, r7, lr}
	ldr r5, _021EE03C ; =0x0221B124
	add r6, r0, #0
	add r7, r1, #0
	mov r4, #0
_021EE006:
	ldr r0, [r5]
	cmp r0, #0
	bne _021EE010
	bl GF_AssertFail
_021EE010:
	bl MTRandom
	mov r1, #3
	bl _u32_div_f
	strb r1, [r6, r4]
	ldr r0, [r7]
	cmp r0, #0
	beq _021EE02E
	ldr r1, [r5]
	bl _u32_div_f
	ldrb r1, [r6, r4]
	add r0, r1, r0
	strb r0, [r6, r4]
_021EE02E:
	add r4, r4, #1
	add r5, r5, #4
	add r7, r7, #4
	cmp r4, #0x1d
	blt _021EE006
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EE03C: .word 0x0221B124
	thumb_func_end ov96_021EDFFC

	thumb_func_start ov96_021EE040
ov96_021EE040: ; 0x021EE040
	push {r4, r5, r6, lr}
	sub sp, #0x20
	add r4, sp, #0
	mov r3, #0x1d
	mov r2, #0
_021EE04A:
	strb r2, [r4]
	add r4, r4, #1
	sub r3, r3, #1
	bne _021EE04A
	mov r2, #0
	add r4, r2, #0
	add r5, r2, #0
_021EE058:
	ldrb r3, [r0, r5]
	cmp r2, r3
	bhs _021EE060
	add r2, r3, #0
_021EE060:
	add r5, r5, #1
	cmp r5, #0x1d
	blt _021EE058
	mov r6, #0
	add r5, sp, #0
_021EE06A:
	ldrb r3, [r0, r6]
	cmp r2, r3
	bne _021EE076
	strb r6, [r5]
	add r5, r5, #1
	add r4, r4, #1
_021EE076:
	add r6, r6, #1
	cmp r6, #0x1d
	blt _021EE06A
	ldr r3, _021EE0A8 ; =0x0221AF54
	mov r5, #0
_021EE080:
	ldr r0, [r3]
	cmp r2, r0
	blo _021EE08E
	mov r0, #3
	sub r0, r0, r5
	strb r0, [r1]
	b _021EE096
_021EE08E:
	add r5, r5, #1
	add r3, r3, #4
	cmp r5, #4
	blt _021EE080
_021EE096:
	bl MTRandom
	add r1, r4, #0
	bl _u32_div_f
	add r0, sp, #0
	ldrb r0, [r0, r1]
	add sp, #0x20
	pop {r4, r5, r6, pc}
	.balign 4, 0
_021EE0A8: .word 0x0221AF54
	thumb_func_end ov96_021EE040

	thumb_func_start ov96_021EE0AC
ov96_021EE0AC: ; 0x021EE0AC
	push {r3, r4, r5, r6, lr}
	sub sp, #0x94
	add r5, r0, #0
	mov r0, #0
	add r2, r1, #0
	add r4, sp, #0x20
	add r1, r0, #0
	mov r3, #7
_021EE0BC:
	stmia r4!, {r0, r1}
	stmia r4!, {r0, r1}
	sub r3, r3, #1
	bne _021EE0BC
	add r3, sp, #0
	str r0, [r4]
	add r3, #1
	mov r1, #0x1d
	mov r0, #0
_021EE0CE:
	strb r0, [r3]
	add r3, r3, #1
	sub r1, r1, #1
	bne _021EE0CE
	add r0, r2, #0
	bl ov96_021E5D60
	bl sub_02031968
	bl sub_020319F0
	add r6, r0, #0
	add r0, sp, #0x20
	add r1, r6, #0
	bl ov96_021EDF84
	add r0, sp, #0
	add r0, #1
	add r1, sp, #0x20
	bl ov96_021EDFFC
	add r0, sp, #0
	add r0, #1
	add r1, sp, #0
	bl ov96_021EE040
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	bl ov96_021EDF7C
	add r1, sp, #0
	ldrb r1, [r1]
	lsl r2, r4, #2
	add r0, r1, r0
	str r0, [r5]
	mov r0, #0xff
	ldr r1, [r5, #4]
	lsl r0, r0, #0x18
	and r0, r1
	add r1, sp, #0x20
	ldr r2, [r1, r2]
	ldr r1, _021EE140 ; =0x00FFFFFF
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	ldr r0, [r6, #0x70]
	bl ov96_021EDF5C
	ldr r2, [r5, #4]
	ldr r1, _021EE140 ; =0x00FFFFFF
	lsl r0, r0, #0x18
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	add sp, #0x94
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021EE140: .word 0x00FFFFFF
	thumb_func_end ov96_021EE0AC

	thumb_func_start ov96_021EE144
ov96_021EE144: ; 0x021EE144
	push {r3, r4, r5, r6, lr}
	sub sp, #0x94
	add r5, r0, #0
	mov r0, #0
	add r3, r1, #0
	add r6, sp, #0x20
	add r1, r0, #0
	mov r4, #7
_021EE154:
	stmia r6!, {r0, r1}
	stmia r6!, {r0, r1}
	sub r4, r4, #1
	bne _021EE154
	add r4, sp, #0
	str r0, [r6]
	add r4, #1
	mov r1, #0x1d
	mov r0, #0
_021EE166:
	strb r0, [r4]
	add r4, r4, #1
	sub r1, r1, #1
	bne _021EE166
	add r0, r3, #0
	add r1, r2, #0
	bl ov96_021E5F44
	add r6, r0, #0
	add r0, sp, #0x20
	add r1, r6, #0
	bl ov96_021EDF84
	add r0, sp, #0
	add r0, #1
	add r1, sp, #0x20
	bl ov96_021EDFFC
	add r0, sp, #0
	add r0, #1
	add r1, sp, #0
	bl ov96_021EE040
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	bl ov96_021EDF7C
	add r1, sp, #0
	ldrb r1, [r1]
	lsl r2, r4, #2
	add r0, r1, r0
	str r0, [r5]
	mov r0, #0xff
	ldr r1, [r5, #4]
	lsl r0, r0, #0x18
	and r0, r1
	add r1, sp, #0x20
	ldr r2, [r1, r2]
	ldr r1, _021EE1D4 ; =0x00FFFFFF
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	ldr r0, [r6, #0x70]
	bl ov96_021EDF5C
	ldr r2, [r5, #4]
	ldr r1, _021EE1D4 ; =0x00FFFFFF
	lsl r0, r0, #0x18
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	add sp, #0x94
	pop {r3, r4, r5, r6, pc}
	nop
_021EE1D4: .word 0x00FFFFFF
	thumb_func_end ov96_021EE144

	thumb_func_start ov96_021EE1D8
ov96_021EE1D8: ; 0x021EE1D8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r2, [sp, #4]
	add r7, r1, #0
	str r0, [sp]
	ldr r1, [sp, #4]
	add r0, r7, #0
	mov r5, #0
	bl ov96_021E5D40
	str r0, [sp, #8]
	add r4, r5, #0
_021EE1F0:
	ldr r1, [sp, #4]
	add r0, r7, #0
	add r2, r4, #0
	bl ov96_021E60D8
	ldrb r6, [r0, #4]
	ldrb r3, [r0, #3]
	ldrb r2, [r0, #1]
	ldrb r1, [r0, #2]
	ldrb r0, [r0]
	add r4, r4, #1
	add r0, r1, r0
	add r0, r2, r0
	add r0, r3, r0
	add r0, r6, r0
	add r0, r0, #5
	add r5, r5, r0
	cmp r4, #3
	blt _021EE1F0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	sub r4, #8
	cmp r4, #0xc
	ble _021EE22A
	mov r4, #0xc
	b _021EE230
_021EE22A:
	cmp r4, #0
	bge _021EE230
	mov r4, #0
_021EE230:
	ldr r1, [sp, #8]
	add r0, r7, #0
	ldr r1, [r1]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021E8448
	ldr r1, [sp]
	str r0, [r1]
	add r0, r1, #0
	ldr r1, [r0, #4]
	mov r0, #0xff
	lsl r0, r0, #0x18
	and r1, r0
	ldr r0, [sp]
	str r1, [r0, #4]
	ldr r0, _021EE260 ; =0x00FFFFFF
	and r1, r0
	lsl r0, r4, #0x18
	orr r1, r0
	ldr r0, [sp]
	str r1, [r0, #4]
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021EE260: .word 0x00FFFFFF
	thumb_func_end ov96_021EE1D8

	thumb_func_start ov96_021EE264
ov96_021EE264: ; 0x021EE264
	push {r3, r4}
	mov r3, #0
	add r4, r0, #0
_021EE26A:
	ldr r2, [r4]
	lsl r2, r2, #4
	lsr r2, r2, #0x1c
	cmp r1, r2
	bne _021EE280
	lsl r1, r3, #2
	ldr r0, [r0, r1]
	lsl r0, r0, #8
	lsr r0, r0, #0x18
	pop {r3, r4}
	bx lr
_021EE280:
	add r3, r3, #1
	add r4, r4, #4
	cmp r3, #4
	blt _021EE26A
	mov r0, #0
	mvn r0, r0
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021EE264

	thumb_func_start ov96_021EE290
ov96_021EE290: ; 0x021EE290
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	mov r3, #0
	ldr r7, _021EE318 ; =0xFF00FFFF
	add r2, r3, #0
	add r6, r4, #0
_021EE29C:
	ldr r0, [r6]
	lsl r1, r0, #8
	lsr r1, r1, #0x18
	bne _021EE2BA
	add r1, r1, #1
	lsl r1, r1, #0x18
	and r0, r7
	lsr r1, r1, #8
	orr r0, r1
	str r0, [r6]
	lsr r0, r0, #0x1c
	cmp r0, r3
	bls _021EE2BA
	add r3, r0, #0
	add r5, r2, #0
_021EE2BA:
	add r2, r2, #1
	add r6, r6, #4
	cmp r2, #4
	blt _021EE29C
	lsl r1, r5, #2
	ldr r3, [r4, r1]
	ldr r2, _021EE318 ; =0xFF00FFFF
	add r0, r3, #0
	lsl r3, r3, #8
	lsr r3, r3, #0x18
	sub r3, r3, #1
	lsl r3, r3, #0x18
	and r0, r2
	lsr r3, r3, #8
	orr r0, r3
	str r0, [r4, r1]
	ldr r3, [r4, r1]
	lsl r0, r2, #0x10
	lsl r2, r3, #0x10
	lsr r2, r2, #0x10
	add r2, r2, #1
	lsl r2, r2, #0x10
	and r0, r3
	lsr r2, r2, #0x10
	orr r0, r2
	str r0, [r4, r1]
	mov r0, #0
	mov r1, #4
	str r0, [sp]
	ldr r3, _021EE31C ; =ov96_021ECC58
	add r0, r4, #0
	add r2, r1, #0
	bl sub_020E3A84
	ldr r1, [r4]
	ldr r0, _021EE320 ; =0xFFFF0000
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x10
	lsr r0, r0, #0x10
	sub r0, r0, #1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	orr r0, r2
	str r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EE318: .word 0xFF00FFFF
_021EE31C: .word ov96_021ECC58
_021EE320: .word 0xFFFF0000
	thumb_func_end ov96_021EE290

	thumb_func_start ov96_021EE324
ov96_021EE324: ; 0x021EE324
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r7, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x14]
	add r0, r7, #0
	bl ov96_021E5F54
	str r0, [sp, #0x10]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #8]
	add r0, r7, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0x14]
	add r0, #0xb7
	ldrb r6, [r0]
	mov r0, #0
	str r0, [sp, #4]
	cmp r1, #0
	bne _021EE3FC
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #0xc]
	add r0, #0x20
	strb r6, [r0]
	ldr r0, [sp, #0x10]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	mov r2, #0x24
_021EE37E:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r4]
	add r4, r4, #1
	sub r2, r2, #1
	bne _021EE37E
	add r0, r7, #0
	mov r4, #0
	bl ov96_021E5D34
	cmp r0, #0
	ble _021EE3C8
	ldr r5, [sp, #0x10]
	add r5, #0x50
_021EE39A:
	add r0, r5, #0
	bl ov96_021E8A20
	ldrb r1, [r0]
	cmp r1, r6
	blo _021EE3AC
	ldrb r1, [r0, #1]
	cmp r1, #1
	bne _021EE3B0
_021EE3AC:
	mov r1, #1
	str r1, [sp, #4]
_021EE3B0:
	ldrb r0, [r0, #2]
	cmp r0, #0
	bne _021EE3BA
	mov r0, #0
	str r0, [sp]
_021EE3BA:
	add r0, r7, #0
	add r5, #0x28
	add r4, r4, #1
	bl ov96_021E5D34
	cmp r4, r0
	blt _021EE39A
_021EE3C8:
	ldr r0, [sp]
	cmp r0, #0
	beq _021EE3DE
	ldr r0, [sp, #0xc]
	add r0, #0x21
	ldrb r1, [r0]
	mov r0, #2
	orr r1, r0
	ldr r0, [sp, #0xc]
	add r0, #0x21
	strb r1, [r0]
_021EE3DE:
	ldr r0, [sp, #0xc]
	mov r1, #1
	add r0, #0x21
	ldrb r0, [r0]
	bic r0, r1
	ldr r1, [sp, #4]
	lsl r1, r1, #0x18
	lsr r2, r1, #0x18
	mov r1, #1
	and r1, r2
	orr r1, r0
	ldr r0, [sp, #0xc]
	add r0, #0x21
	str r0, [sp, #0xc]
	strb r1, [r0]
_021EE3FC:
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x14]
	strb r6, [r4]
	ldr r0, [r0, #0xc]
	bl ov96_021EEA80
	strb r0, [r4, #1]
	ldr r0, [sp, #0x14]
	add r0, #0xb8
	str r0, [sp, #0x14]
	ldr r0, [r0]
	strb r0, [r4, #2]
	ldr r0, [sp, #8]
	add r0, #0x21
	ldrb r0, [r0]
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	beq _021EE438
	ldr r0, [sp, #8]
	add r0, #0x20
	str r0, [sp, #8]
	ldrb r0, [r0]
	cmp r6, r0
	blo _021EE438
	add sp, #0x18
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021EE438:
	mov r0, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE324

	thumb_func_start ov96_021EE440
ov96_021EE440: ; 0x021EE440
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r7, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x14]
	add r0, r7, #0
	bl ov96_021E5F54
	str r0, [sp, #0x10]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #8]
	add r0, r7, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0x14]
	add r0, #0xb7
	ldrb r6, [r0]
	mov r0, #0
	str r0, [sp, #4]
	cmp r1, #0
	bne _021EE50A
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #0xc]
	strb r6, [r0, #0xc]
	ldr r0, [sp, #0x10]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	mov r2, #0x24
_021EE498:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r4]
	add r4, r4, #1
	sub r2, r2, #1
	bne _021EE498
	add r0, r7, #0
	mov r4, #0
	bl ov96_021E5D34
	cmp r0, #0
	ble _021EE4E2
	ldr r5, [sp, #0x10]
	add r5, #0x50
_021EE4B4:
	add r0, r5, #0
	bl ov96_021E8A20
	ldrb r1, [r0]
	cmp r1, r6
	blo _021EE4C6
	ldrb r1, [r0, #1]
	cmp r1, #1
	bne _021EE4CA
_021EE4C6:
	mov r1, #1
	str r1, [sp, #4]
_021EE4CA:
	ldrb r0, [r0, #2]
	cmp r0, #0
	bne _021EE4D4
	mov r0, #0
	str r0, [sp]
_021EE4D4:
	add r0, r7, #0
	add r5, #0x28
	add r4, r4, #1
	bl ov96_021E5D34
	cmp r4, r0
	blt _021EE4B4
_021EE4E2:
	ldr r0, [sp]
	cmp r0, #0
	beq _021EE4F6
	ldr r0, [sp, #0xc]
	ldr r1, [r0, #8]
	mov r0, #2
	lsl r0, r0, #0x1c
	orr r1, r0
	ldr r0, [sp, #0xc]
	str r1, [r0, #8]
_021EE4F6:
	ldr r0, [sp, #0xc]
	ldr r1, [r0, #8]
	ldr r0, _021EE548 ; =0xEFFFFFFF
	and r1, r0
	ldr r0, [sp, #4]
	lsl r0, r0, #0x1f
	lsr r0, r0, #3
	orr r1, r0
	ldr r0, [sp, #0xc]
	str r1, [r0, #8]
_021EE50A:
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x14]
	strb r6, [r4]
	ldr r0, [r0, #0xc]
	bl ov96_021EEA80
	strb r0, [r4, #1]
	ldr r0, [sp, #0x14]
	add r0, #0xb8
	str r0, [sp, #0x14]
	ldr r0, [r0]
	strb r0, [r4, #2]
	ldr r0, [sp, #8]
	ldr r0, [r0, #8]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _021EE540
	ldr r0, [sp, #8]
	ldrb r0, [r0, #0xc]
	cmp r6, r0
	blo _021EE540
	add sp, #0x18
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021EE540:
	mov r0, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EE548: .word 0xEFFFFFFF
	thumb_func_end ov96_021EE440

	thumb_func_start ov96_021EE54C
ov96_021EE54C: ; 0x021EE54C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021EE566
	bl GF_AssertFail
_021EE566:
	cmp r6, #0
	bne _021EE56E
	bl GF_AssertFail
_021EE56E:
	cmp r4, #0
	bne _021EE576
	bl GF_AssertFail
_021EE576:
	add r4, #0x21
	ldrb r0, [r4]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1f
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021EE54C

	thumb_func_start ov96_021EE580
ov96_021EE580: ; 0x021EE580
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r6, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	cmp r5, #0
	bne _021EE59A
	bl GF_AssertFail
_021EE59A:
	cmp r6, #0
	bne _021EE5A2
	bl GF_AssertFail
_021EE5A2:
	cmp r4, #0
	bne _021EE5AA
	bl GF_AssertFail
_021EE5AA:
	ldr r0, [r4, #8]
	lsl r0, r0, #2
	lsr r0, r0, #0x1f
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE580

	thumb_func_start ov96_021EE5B4
ov96_021EE5B4: ; 0x021EE5B4
	push {r4, r5, r6, lr}
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x30
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0x30
	bl MIi_CpuFill8
	str r6, [r4]
	mov r0, #0xdd
	add r1, r6, #0
	str r5, [r4, #8]
	bl NARC_ctor
	str r0, [r4, #0xc]
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE5B4

	thumb_func_start ov96_021EE5E0
ov96_021EE5E0: ; 0x021EE5E0
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r5, r6, #0
	mov r4, #0
	add r5, #0x10
_021EE5EA:
	add r0, r5, #0
	bl ClearWindowTilemapAndCopyToVram
	add r0, r5, #0
	bl RemoveWindow
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #2
	blt _021EE5EA
	ldr r0, [r6, #0xc]
	bl NARC_dtor
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021EE5E0

	thumb_func_start ov96_021EE60C
ov96_021EE60C: ; 0x021EE60C
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	add r5, r7, #0
	ldr r4, _021EE640 ; =0x0221B19A
	str r1, [r7, #4]
	mov r6, #0
	add r5, #0x10
_021EE61A:
	ldr r0, [r7, #4]
	add r1, r5, #0
	add r2, r4, #0
	bl AddWindow
	add r0, r5, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	add r0, r5, #0
	bl sub_0201D634
	add r6, r6, #1
	add r4, #8
	add r5, #0x10
	cmp r6, #2
	blt _021EE61A
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EE640: .word 0x0221B19A
	thumb_func_end ov96_021EE60C

	thumb_func_start ov96_021EE644
ov96_021EE644: ; 0x021EE644
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5, #8]
	mov r2, #6
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	mov r0, #0
	str r0, [sp]
	ldr r0, [r5]
	mov r1, #0xb
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	lsl r3, r2, #0xc
	bl sub_02007B8C
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5]
	add r1, r4, #0
	str r0, [sp, #0xc]
	ldr r0, [r5, #0xc]
	ldr r2, [r5, #4]
	add r1, #0xc
	mov r3, #7
	bl sub_02007B44
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5]
	add r4, #0x16
	str r0, [sp, #0xc]
	ldr r0, [r5, #0xc]
	ldr r2, [r5, #4]
	add r1, r4, #0
	mov r3, #7
	bl sub_02007B68
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EE644

	thumb_func_start ov96_021EE6A0
ov96_021EE6A0: ; 0x021EE6A0
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5, #8]
	ldr r2, _021EE6FC ; =0x00000135
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r3, [r5]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r6, r0, #0
	mov r0, #1
	ldr r1, [r5]
	lsl r0, r0, #8
	bl String_ctor
	add r7, r0, #0
	mov r0, #4
	str r0, [sp]
	add r0, r5, #0
	add r3, r4, #0
	add r0, #0x10
	add r1, r6, #0
	add r2, r7, #0
	add r3, #0xa6
	bl ov96_021EE700
	mov r0, #0
	add r4, #0xbb
	add r5, #0x20
	str r0, [sp]
	add r0, r5, #0
	add r1, r6, #0
	add r2, r7, #0
	add r3, r4, #0
	bl ov96_021EE700
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl DestroyMsgData
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EE6FC: .word 0x00000135
	thumb_func_end ov96_021EE6A0

	thumb_func_start ov96_021EE700
ov96_021EE700: ; 0x021EE700
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r0, r1, #0
	add r1, r3, #0
	add r4, r2, #0
	bl ReadMsgDataIntoString
	add r0, r5, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021EE73C ; =0x00010200
	ldr r1, [sp, #0x20]
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl sub_0201D5C8
	add sp, #0x10
	pop {r3, r4, r5, pc}
	nop
_021EE73C: .word 0x00010200
	thumb_func_end ov96_021EE700

	thumb_func_start ov96_021EE740
ov96_021EE740: ; 0x021EE740
	push {r3, r4, r5, lr}
	mov r1, #0x38
	add r5, r0, #0
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x38
	add r4, r0, #0
	bl MIi_CpuFill8
	str r5, [r4, #0x14]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE740

	thumb_func_start ov96_021EE75C
ov96_021EE75C: ; 0x021EE75C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	add r7, r3, #0
	ldr r0, _021EE7F4 ; =0x00000004
	bne _021EE774
	ldr r0, [sp, #0x18]
	bl Sav2_PlayerData_GetOptionsAddr
	bl sub_0202AD3C
_021EE774:
	mov r1, #0
	str r4, [r5]
	mvn r1, r1
	str r1, [r5, #0x2c]
	ldr r2, [r5, #0x34]
	ldr r1, _021EE7F8 ; =0xF8FFFFFF
	lsl r0, r0, #0x18
	and r2, r1
	lsl r1, r6, #0x1d
	lsr r1, r1, #5
	orr r1, r2
	str r1, [r5, #0x34]
	str r7, [r5, #0x28]
	ldr r2, [r5, #0x34]
	ldr r1, _021EE7FC ; =0xFF00FFFF
	lsr r0, r0, #8
	and r1, r2
	orr r0, r1
	str r0, [r5, #0x34]
	ldr r2, _021EE800 ; =0x00000135
	ldr r3, [r5, #0x14]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	str r0, [r5, #8]
	ldr r2, _021EE804 ; =0x00000137
	ldr r3, [r5, #0x14]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	str r0, [r5, #0xc]
	ldr r0, [r5, #0x14]
	bl ScrStrBufs_new
	str r0, [r5, #4]
	bl sub_02020080
	ldr r1, [r5, #0x34]
	ldr r0, [r5]
	lsl r1, r1, #5
	lsr r1, r1, #0x1d
	lsl r1, r1, #0x18
	ldr r2, [r5, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021EE9D8
	mov r1, #0x1e
	ldr r2, [r5, #0x14]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	mov r2, #0
	str r2, [sp]
	ldr r1, [r5, #0x34]
	ldr r0, [r5]
	lsl r1, r1, #5
	lsr r1, r1, #0x1d
	mov r3, #1
	bl sub_0201C1F4
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021EE7F4: .word 0x00000004
_021EE7F8: .word 0xF8FFFFFF
_021EE7FC: .word 0xFF00FFFF
_021EE800: .word 0x00000135
_021EE804: .word 0x00000137
	thumb_func_end ov96_021EE75C

	thumb_func_start ov96_021EE808
ov96_021EE808: ; 0x021EE808
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #8]
	bl DestroyMsgData
	ldr r0, [r4, #0xc]
	bl DestroyMsgData
	ldr r0, [r4, #4]
	bl ScrStrBufs_delete
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _021EE828
	bl String_dtor
_021EE828:
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	thumb_func_end ov96_021EE808

	thumb_func_start ov96_021EE830
ov96_021EE830: ; 0x021EE830
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0
	ldr r1, [r4, #0x2c]
	mvn r0, r0
	cmp r1, r0
	beq _021EE870
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	bl sub_02020094
	cmp r0, #0
	bne _021EE864
	ldr r1, [r4, #0x34]
	ldr r0, _021EE8C4 ; =0xFFFF0000
	and r1, r0
	mov r0, #0x14
	orr r0, r1
	str r0, [r4, #0x34]
	ldr r0, [r4, #0x10]
	bl String_dtor
	mov r0, #0
	str r0, [r4, #0x10]
	sub r0, r0, #1
	str r0, [r4, #0x2c]
_021EE864:
	mov r0, #1
	ldr r1, [r4, #0x34]
	lsl r0, r0, #0x1c
	orr r0, r1
	str r0, [r4, #0x34]
	b _021EE8BC
_021EE870:
	beq _021EE876
	bl GF_AssertFail
_021EE876:
	ldr r1, [r4, #0x34]
	lsl r0, r1, #0x10
	lsr r2, r0, #0x10
	beq _021EE8B6
	ldr r0, [r4, #0x28]
	cmp r0, #0
	bne _021EE88C
	ldr r0, _021EE8C8 ; =0xEFFFFFFF
	and r0, r1
	str r0, [r4, #0x34]
	b _021EE8BC
_021EE88C:
	ldr r0, _021EE8C4 ; =0xFFFF0000
	and r1, r0
	sub r0, r2, #1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	orr r0, r1
	str r0, [r4, #0x34]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	beq _021EE8A4
	mov r2, #1
	b _021EE8A6
_021EE8A4:
	mov r2, #0
_021EE8A6:
	ldr r1, [r4, #0x34]
	ldr r0, _021EE8C8 ; =0xEFFFFFFF
	and r1, r0
	lsl r0, r2, #0x1f
	lsr r0, r0, #3
	orr r0, r1
	str r0, [r4, #0x34]
	b _021EE8BC
_021EE8B6:
	ldr r0, _021EE8C8 ; =0xEFFFFFFF
	and r0, r1
	str r0, [r4, #0x34]
_021EE8BC:
	ldr r0, [r4, #0x34]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	pop {r4, pc}
	.balign 4, 0
_021EE8C4: .word 0xFFFF0000
_021EE8C8: .word 0xEFFFFFFF
	thumb_func_end ov96_021EE830

	thumb_func_start ov96_021EE8CC
ov96_021EE8CC: ; 0x021EE8CC
	push {r3, r4, lr}
	sub sp, #0x14
	add r4, r0, #0
	ldr r0, [r4, #4]
	add r2, r4, #0
	str r0, [sp]
	ldr r0, [r4, #8]
	add r2, #0x10
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r4, #0x34]
	add r1, r4, #0
	lsl r0, r0, #5
	lsr r0, r0, #0x1d
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	ldr r0, [r4, #0x14]
	add r1, #0x18
	str r0, [sp, #0x10]
	ldr r3, [r4, #0x34]
	ldr r0, [r4]
	lsl r3, r3, #8
	lsr r3, r3, #0x18
	bl ov96_021EEA08
	str r0, [r4, #0x2c]
	add sp, #0x14
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE8CC

	thumb_func_start ov96_021EE908
ov96_021EE908: ; 0x021EE908
	push {r3, r4, lr}
	sub sp, #0x14
	add r4, r0, #0
	ldr r0, [r4, #4]
	add r2, r4, #0
	str r0, [sp]
	ldr r0, [r4, #0xc]
	add r2, #0x10
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r4, #0x34]
	add r1, r4, #0
	lsl r0, r0, #5
	lsr r0, r0, #0x1d
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	ldr r0, [r4, #0x14]
	add r1, #0x18
	str r0, [sp, #0x10]
	ldr r3, [r4, #0x34]
	ldr r0, [r4]
	lsl r3, r3, #8
	lsr r3, r3, #0x18
	bl ov96_021EEA08
	str r0, [r4, #0x2c]
	add sp, #0x14
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EE908

	thumb_func_start ov96_021EE944
ov96_021EE944: ; 0x021EE944
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0
	ldr r1, [r4, #0x2c]
	mvn r0, r0
	cmp r1, r0
	beq _021EE95A
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	bl sub_020200A0
_021EE95A:
	ldr r0, [r4, #0x18]
	cmp r0, #0
	beq _021EE97A
	add r0, r4, #0
	add r0, #0x18
	mov r1, #0
	bl sub_0200E9BC
	add r0, r4, #0
	add r0, #0x18
	bl ClearWindowTilemapAndCopyToVram
	add r4, #0x18
	add r0, r4, #0
	bl RemoveWindow
_021EE97A:
	pop {r4, pc}
	thumb_func_end ov96_021EE944

	thumb_func_start ov96_021EE97C
ov96_021EE97C: ; 0x021EE97C
	push {r4, lr}
	add r4, r0, #0
	bne _021EE986
	bl GF_AssertFail
_021EE986:
	ldr r0, [r4, #4]
	cmp r0, #0
	bne _021EE990
	bl GF_AssertFail
_021EE990:
	ldr r0, [r4, #4]
	pop {r4, pc}
	thumb_func_end ov96_021EE97C

	thumb_func_start ov96_021EE994
ov96_021EE994: ; 0x021EE994
	push {r4, lr}
	add r4, r0, #0
	bne _021EE99E
	bl GF_AssertFail
_021EE99E:
	ldr r0, [r4, #0x30]
	cmp r0, #0
	beq _021EE9A8
	bl GF_AssertFail
_021EE9A8:
	add r0, r4, #0
	ldr r1, _021EE9B8 ; =0x000003D2
	add r0, #0x18
	bl sub_0200F0AC
	str r0, [r4, #0x30]
	pop {r4, pc}
	nop
_021EE9B8: .word 0x000003D2
	thumb_func_end ov96_021EE994

	thumb_func_start ov96_021EE9BC
ov96_021EE9BC: ; 0x021EE9BC
	push {r4, lr}
	add r4, r0, #0
	bne _021EE9C6
	bl GF_AssertFail
_021EE9C6:
	ldr r0, [r4, #0x30]
	cmp r0, #0
	bne _021EE9D0
	bl GF_AssertFail
_021EE9D0:
	ldr r0, [r4, #0x30]
	bl sub_0200F450
	pop {r4, pc}
	thumb_func_end ov96_021EE9BC

	thumb_func_start ov96_021EE9D8
ov96_021EE9D8: ; 0x021EE9D8
	push {r4, r5, r6, lr}
	sub sp, #8
	add r6, r1, #0
	mov r1, #7
	add r5, r0, #0
	mov r0, #4
	lsl r1, r1, #6
	add r4, r2, #0
	bl sub_02003030
	mov r0, #0
	str r0, [sp]
	ldr r2, _021EEA04 ; =0x000003D2
	add r0, r5, #0
	add r1, r6, #0
	mov r3, #0xd
	str r4, [sp, #4]
	bl sub_0200E644
	add sp, #8
	pop {r4, r5, r6, pc}
	nop
_021EEA04: .word 0x000003D2
	thumb_func_end ov96_021EE9D8

	thumb_func_start ov96_021EEA08
ov96_021EEA08: ; 0x021EEA08
	push {r3, r4, r5, r6, lr}
	sub sp, #0x14
	add r5, r1, #0
	add r4, r2, #0
	ldr r2, [r5]
	add r6, r3, #0
	cmp r2, #0
	bne _021EEA36
	mov r2, #0x13
	str r2, [sp]
	mov r2, #0x1b
	str r2, [sp, #4]
	mov r2, #4
	str r2, [sp, #8]
	mov r2, #0xf
	str r2, [sp, #0xc]
	mov r2, #1
	str r2, [sp, #0x10]
	add r2, sp, #0x18
	ldrb r2, [r2, #0x1c]
	mov r3, #2
	bl sub_0201D40C
_021EEA36:
	add r0, r5, #0
	mov r1, #0xf
	bl FillWindowPixelBuffer
	ldr r0, [sp, #0x28]
	ldr r1, [sp, #0x2c]
	ldr r2, [sp, #0x30]
	ldr r3, [sp, #0x38]
	bl ReadMsgData_ExpandPlaceholders
	str r0, [r4]
	mov r3, #0
	str r3, [sp]
	ldr r0, _021EEA78 ; =0x0001020F
	str r6, [sp, #4]
	str r0, [sp, #8]
	str r3, [sp, #0xc]
	ldr r2, [r4]
	add r0, r5, #0
	mov r1, #1
	bl sub_020200FC
	add r4, r0, #0
	ldr r2, _021EEA7C ; =0x000003D2
	add r0, r5, #0
	mov r1, #0
	mov r3, #0xd
	bl sub_0200E998
	add r0, r4, #0
	add sp, #0x14
	pop {r3, r4, r5, r6, pc}
	nop
_021EEA78: .word 0x0001020F
_021EEA7C: .word 0x000003D2
	thumb_func_end ov96_021EEA08

	thumb_func_start ov96_021EEA80
ov96_021EEA80: ; 0x021EEA80
	ldr r0, [r0, #0x34]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	bx lr
	thumb_func_end ov96_021EEA80

	thumb_func_start ov96_021EEA88
ov96_021EEA88: ; 0x021EEA88
	push {r3, lr}
	ldr r0, [r0]
	bl ov96_021EEA94
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EEA88

	thumb_func_start ov96_021EEA94
ov96_021EEA94: ; 0x021EEA94
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r5, r1, #0
	str r3, [sp, #0xc]
	mov r1, #0
	add r6, r0, #0
	add r4, r2, #0
	bl sub_0200DCE0
	ldr r1, [sp, #0xc]
	mov r0, #0x51
	bl NARC_ctor
	ldr r2, [sp, #0xc]
	add r1, r5, #0
	str r0, [sp, #0x14]
	bl NARC_AllocAndReadWholeMember
	str r0, [sp, #0x10]
	bl NNS_G3dGetTex
	add r5, r0, #0
	beq _021EEAE8
	add r0, #0x3c
	beq _021EEAE4
	add r1, r5, #0
	add r1, #0x3d
	ldrb r1, [r1]
	cmp r4, r1
	bhs _021EEAE4
	add r1, r5, #0
	add r1, #0x42
	ldrh r1, [r1]
	add r2, r0, r1
	ldrh r0, [r0, r1]
	add r2, r2, #4
	add r1, r0, #0
	mul r1, r4
	add r0, r2, r1
	b _021EEAEA
_021EEAE4:
	mov r0, #0
	b _021EEAEA
_021EEAE8:
	mov r0, #0
_021EEAEA:
	ldr r0, [r0]
	mov r1, #2
	lsl r0, r0, #0x10
	lsr r4, r0, #0xd
	ldr r0, [r5, #0x14]
	lsl r1, r1, #8
	add r7, r5, r0
	ldr r0, [sp, #0xc]
	bl AllocFromHeapAtEnd
	mov r1, #4
	str r1, [sp]
	str r1, [sp, #4]
	mov r2, #0
	str r0, [sp, #0x18]
	str r0, [sp, #8]
	add r0, r7, r4
	add r3, r2, #0
	bl sub_020145B4
	mov r2, #2
	ldr r1, [sp, #0x18]
	add r0, r6, #0
	lsl r2, r2, #8
	bl ov96_021EED64
	ldr r0, [sp, #0x18]
	bl FreeToHeap
	add r0, r6, #0
	bl sub_02024B60
	ldr r4, [r5, #0x38]
	add r7, r0, #0
	add r0, r5, r4
	mov r1, #0x20
	bl DC_FlushRange
	add r0, r6, #0
	bl sub_02024B34
	add r1, r7, #0
	bl sub_020B8078
	add r1, r0, #0
	cmp r7, #1
	bne _021EEB52
	add r0, r5, r4
	mov r2, #0x20
	bl GX_LoadOBJPltt
	b _021EEB5A
_021EEB52:
	add r0, r5, r4
	mov r2, #0x20
	bl GXS_LoadOBJPltt
_021EEB5A:
	ldr r0, [sp, #0x10]
	bl FreeToHeap
	ldr r0, [sp, #0x14]
	bl NARC_dtor
	add r0, r6, #0
	mov r1, #1
	bl sub_0200DCE0
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EEA94

	thumb_func_start ov96_021EEB74
ov96_021EEB74: ; 0x021EEB74
	push {r4, lr}
	lsl r4, r2, #2
	ldr r0, [r0, r4]
	ldr r0, [r0]
	bl ov96_021EEB84
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EEB74

	thumb_func_start ov96_021EEB84
ov96_021EEB84: ; 0x021EEB84
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r6, r0, #0
	add r0, r4, #0
	add r1, r2, #0
	add r5, r3, #0
	bl ov96_021E5F34
	add r7, r0, #0
	add r0, r4, #0
	bl ov96_021E5DCC
	add r4, r0, #0
	add r0, r7, #0
	bl PlayerProfile_GetTrainerGender
	cmp r0, #0
	bne _021EEBB0
	mov r0, #0
	bl ov96_021EEBC8
	b _021EEBB6
_021EEBB0:
	mov r0, #1
	bl ov96_021EEBC8
_021EEBB6:
	lsl r2, r5, #0x18
	add r1, r0, #0
	add r0, r6, #0
	lsr r2, r2, #0x18
	add r3, r4, #0
	bl ov96_021EEA94
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EEB84

	thumb_func_start ov96_021EEBC8
ov96_021EEBC8: ; 0x021EEBC8
	push {r4, lr}
	add r4, r0, #0
	cmp r4, #6
	blo _021EEBD4
	bl GF_AssertFail
_021EEBD4:
	ldr r0, _021EEBE0 ; =0x0221B1BC
	lsl r1, r4, #2
	ldr r0, [r0, r1]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	pop {r4, pc}
	.balign 4, 0
_021EEBE0: .word 0x0221B1BC
	thumb_func_end ov96_021EEBC8

	thumb_func_start ov96_021EEBE4
ov96_021EEBE4: ; 0x021EEBE4
	push {r4, lr}
	sub sp, #8
	ldr r4, [sp, #0x10]
	str r4, [sp]
	mov r4, #1
	str r4, [sp, #4]
	bl ov96_021EEC0C
	add sp, #8
	pop {r4, pc}
	thumb_func_end ov96_021EEBE4

	thumb_func_start ov96_021EEBF8
ov96_021EEBF8: ; 0x021EEBF8
	push {r4, lr}
	sub sp, #8
	ldr r4, [sp, #0x10]
	str r4, [sp]
	ldr r4, [sp, #0x14]
	str r4, [sp, #4]
	bl ov96_021EEC0C
	add sp, #8
	pop {r4, pc}
	thumb_func_end ov96_021EEBF8

	thumb_func_start ov96_021EEC0C
ov96_021EEC0C: ; 0x021EEC0C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	add r4, r1, #0
	ldrh r1, [r4]
	add r5, r0, #0
	add r6, r3, #0
	str r2, [sp, #0x14]
	cmp r1, #0
	bne _021EEC28
	mov r1, #0
	bl sub_0200DCE8
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
_021EEC28:
	ldrb r0, [r4, #6]
	mov r3, #2
	str r0, [sp]
	ldrh r0, [r4, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [r4, #0xc]
	str r0, [sp, #8]
	ldrb r2, [r4, #7]
	add r0, sp, #0x28
	bl sub_020701E4
	ldr r3, _021EECB4 ; =0x0221B1AC
	add r2, sp, #0x18
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	mov r1, #0x32
	ldr r0, [sp, #0x50]
	lsl r1, r1, #6
	bl AllocFromHeapAtEnd
	add r7, r0, #0
	str r7, [sp]
	ldr r0, [r4, #0xc]
	add r1, sp, #0x18
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	mov r0, #2
	str r0, [sp, #0xc]
	ldrh r0, [r4]
	ldr r2, [sp, #0x50]
	add r3, sp, #0x18
	str r0, [sp, #0x10]
	ldrh r0, [r1, #0x10]
	ldrh r1, [r1, #0x12]
	bl sub_02014510
	mov r2, #0x32
	ldr r0, [r5]
	add r1, r7, #0
	lsl r2, r2, #6
	bl ov96_021EED64
	ldr r0, [sp, #0x54]
	cmp r0, #0
	beq _021EECA0
	ldr r0, [sp, #0x50]
	str r6, [sp]
	str r0, [sp, #4]
	add r2, sp, #0x18
	ldrh r1, [r2, #0x10]
	ldrh r2, [r2, #0x14]
	ldr r3, [sp, #0x14]
	add r0, r5, #0
	bl ov96_021EED70
_021EECA0:
	add r0, r5, #0
	mov r1, #1
	bl sub_0200DCE8
	add r0, r7, #0
	bl FreeToHeap
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EECB4: .word 0x0221B1AC
	thumb_func_end ov96_021EEC0C

	thumb_func_start ov96_021EECB8
ov96_021EECB8: ; 0x021EECB8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	ldrh r0, [r4]
	ldrh r2, [r4, #2]
	mov r1, #0
	add r7, r3, #0
	bl sub_020741BC
	add r1, r0, #0
	ldr r0, [sp, #0x24]
	mov r2, #0
	str r0, [sp]
	add r0, r7, #0
	add r3, sp, #4
	bl sub_02007C10
	add r7, r0, #0
	bne _021EECE6
	bl GF_AssertFail
_021EECE6:
	ldr r1, [sp, #4]
	mov r2, #2
	ldr r0, [r5]
	ldr r1, [r1, #0x14]
	ldr r3, [sp, #0x20]
	lsl r2, r2, #8
	bl ov96_021EED14
	add r0, r7, #0
	bl FreeToHeap
	ldrh r0, [r4]
	ldrh r1, [r4, #2]
	mov r2, #0
	bl sub_02074364
	add r1, r0, #0
	add r0, r5, #0
	add r1, r6, r1
	bl sub_0200DD10
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021EECB8

	thumb_func_start ov96_021EED14
ov96_021EED14: ; 0x021EED14
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r7, r1, #0
	str r2, [sp]
	add r5, r3, #0
	bl sub_02024B60
	add r4, r0, #0
	add r0, r6, #0
	bl sub_02024B1C
	add r1, r4, #0
	bl sub_020B802C
	add r6, r0, #0
	ldr r1, [sp]
	add r0, r7, #0
	bl DC_FlushRange
	cmp r4, #1
	beq _021EED44
	cmp r4, #2
	beq _021EED50
	b _021EED5C
_021EED44:
	ldr r2, [sp]
	add r0, r7, #0
	add r1, r6, r5
	bl sub_020CFE74
	pop {r3, r4, r5, r6, r7, pc}
_021EED50:
	ldr r2, [sp]
	add r0, r7, #0
	add r1, r6, r5
	bl sub_020CFECC
	pop {r3, r4, r5, r6, r7, pc}
_021EED5C:
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021EED14

	thumb_func_start ov96_021EED64
ov96_021EED64: ; 0x021EED64
	push {r3, lr}
	mov r3, #0
	bl ov96_021EED14
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EED64

	thumb_func_start ov96_021EED70
ov96_021EED70: ; 0x021EED70
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r1, #0
	str r2, [sp, #8]
	add r4, r3, #0
	beq _021EED82
	mov r5, #1
	add r6, r5, #0
	b _021EED86
_021EED82:
	mov r5, #2
	mov r6, #5
_021EED86:
	ldr r0, [r0]
	bl sub_02024B34
	add r1, r5, #0
	bl sub_020B8078
	add r5, r0, #0
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [sp, #0x24]
	ldr r1, [sp, #8]
	str r0, [sp, #4]
	add r0, r7, #0
	add r2, r6, #0
	add r3, r5, #0
	bl GfGfxLoader_GXLoadPal
	ldr r0, [sp, #0x20]
	cmp r0, #0
	beq _021EEDC0
	cmp r4, #0
	beq _021EEDB6
	ldr r0, _021EEDC4 ; =0x05000200
	b _021EEDB8
_021EEDB6:
	ldr r0, _021EEDC8 ; =0x05000600
_021EEDB8:
	add r0, r5, r0
	mov r1, #0x20
	bl sub_02003F04
_021EEDC0:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021EEDC4: .word 0x05000200
_021EEDC8: .word 0x05000600
	thumb_func_end ov96_021EED70

	thumb_func_start ov96_021EEDCC
ov96_021EEDCC: ; 0x021EEDCC
	push {r3, r4, r5, lr}
	ldr r5, _021EEDFC ; =0x0221B1D4
	ldr r1, _021EEE00 ; =0x0000270F
	ldr r2, _021EEE04 ; =0x0000FFFF
	mov r4, #0
_021EEDD6:
	cmp r4, r2
	bne _021EEDDE
	mov r0, #0
	pop {r3, r4, r5, pc}
_021EEDDE:
	ldr r3, [r5]
	cmp r0, r3
	bne _021EEDEC
	ldr r0, _021EEE08 ; =0x0221B1D8
	lsl r1, r4, #3
	ldr r0, [r0, r1]
	pop {r3, r4, r5, pc}
_021EEDEC:
	add r4, r4, #1
	add r5, #8
	cmp r4, r1
	blt _021EEDD6
	bl GF_AssertFail
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021EEDFC: .word 0x0221B1D4
_021EEE00: .word 0x0000270F
_021EEE04: .word 0x0000FFFF
_021EEE08: .word 0x0221B1D8
	thumb_func_end ov96_021EEDCC

	thumb_func_start ov96_021EEE0C
ov96_021EEE0C: ; 0x021EEE0C
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5DD4
	cmp r0, #3
	bhi _021EEEAE
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021EEE2E: ; jump table
	.short _021EEE36 - _021EEE2E - 2 ; case 0
	.short _021EEE44 - _021EEE2E - 2 ; case 1
	.short _021EEE78 - _021EEE2E - 2 ; case 2
	.short _021EEE90 - _021EEE2E - 2 ; case 3
_021EEE36:
	add r0, r5, #0
	bl ov96_021EEFAC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021EEEB2
_021EEE44:
	mov r0, #1
	bl sub_0203A994
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #0
	bl sub_02022CC8
	mov r0, #4
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #8]
	mov r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021EEEB2
_021EEE78:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EEEB2
	ldr r0, [r4, #8]
	ldr r1, _021EEEB8 ; =0x00000136
	bl ov96_021EE8CC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021EEEB2
_021EEE90:
	ldr r0, [r4, #8]
	bl ov96_021EE830
	cmp r0, #0
	bne _021EEEB2
	ldr r0, [r4, #8]
	bl ov96_021EE994
	add r0, r5, #0
	mov r1, #0x11
	bl ov96_021E601C
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_021EEEAE:
	bl GF_AssertFail
_021EEEB2:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_021EEEB8: .word 0x00000136
	thumb_func_end ov96_021EEE0C

	thumb_func_start ov96_021EEEBC
ov96_021EEEBC: ; 0x021EEEBC
	mov r0, #1
	bx lr
	thumb_func_end ov96_021EEEBC

	thumb_func_start ov96_021EEEC0
ov96_021EEEC0: ; 0x021EEEC0
	push {r3, lr}
	bl ov96_021EF05C
	mov r0, #1
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EEEC0

	thumb_func_start ov96_021EEECC
ov96_021EEECC: ; 0x021EEECC
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021EEEE8 ; =0x0221B9E8
	add r3, sp, #0
	mov r2, #5
_021EEED6:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021EEED6
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021EEEE8: .word 0x0221B9E8
	thumb_func_end ov96_021EEECC

	thumb_func_start ov96_021EEEEC
ov96_021EEEEC: ; 0x021EEEEC
	push {r3, lr}
	ldr r0, [r0, #4]
	bl sub_0201EEB4
	ldr r3, _021EEF04 ; =0x027E0000
	ldr r1, _021EEF08 ; =0x00003FF8
	mov r0, #1
	ldr r2, [r3, r1]
	orr r0, r2
	str r0, [r3, r1]
	pop {r3, pc}
	nop
_021EEF04: .word 0x027E0000
_021EEF08: .word 0x00003FF8
	thumb_func_end ov96_021EEEEC

	thumb_func_start ov96_021EEF0C
ov96_021EEF0C: ; 0x021EEF0C
	push {r3, r4, r5, r6, lr}
	sub sp, #0x2c
	ldr r6, _021EEF90 ; =0x0221B9BC
	add r3, sp, #0x1c
	add r5, r0, #0
	add r4, r1, #0
	add r2, r3, #0
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r6, _021EEF94 ; =0x0221B9CC
	add r3, sp, #0
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	mov r1, #0
	str r0, [r3]
	add r0, r5, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r5, #0
	mov r1, #0
	bl sub_0201CAE0
	mov r0, #0
	mov r1, #0x40
	add r2, r0, #0
	add r3, r4, #0
	bl sub_0201C1C4
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	mov r0, #4
	mov r1, #0
	bl GX_EngineAToggleLayers
	mov r0, #2
	mov r1, #0
	bl GX_EngineAToggleLayers
	mov r0, #1
	add r1, r0, #0
	bl GX_EngineAToggleLayers
	mov r0, #0
	add r1, r0, #0
	bl sub_0201C2D8
	mov r0, #4
	mov r1, #0
	bl sub_0201C2D8
	add sp, #0x2c
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021EEF90: .word 0x0221B9BC
_021EEF94: .word 0x0221B9CC
	thumb_func_end ov96_021EEF0C

	thumb_func_start ov96_021EEF98
ov96_021EEF98: ; 0x021EEF98
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	bl FreeToHeap
	pop {r4, pc}
	thumb_func_end ov96_021EEF98

	thumb_func_start ov96_021EEFAC
ov96_021EEFAC: ; 0x021EEFAC
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	mov r2, #1
	add r5, r0, #0
	mov r1, #0x9f
	mov r0, #0x5c
	lsl r2, r2, #0x12
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021EF04C ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021EF050 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021EEECC
	add r0, r5, #0
	mov r1, #0x10
	bl ov96_021E5D94
	mov r1, #0
	mov r2, #0x10
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x9f
	str r0, [r4]
	bl sub_0201AC88
	str r0, [r4, #4]
	ldr r1, [r4]
	bl ov96_021EEF0C
	ldr r0, [r4]
	bl ov96_021EE740
	str r0, [r4, #8]
	add r0, r5, #0
	bl ov96_021E5EE8
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5D60
	str r0, [sp]
	ldr r0, [r4, #8]
	ldr r1, [r4, #4]
	mov r2, #0
	add r3, r6, #0
	bl ov96_021EE75C
	ldr r0, _021EF054 ; =ov96_021EEEEC
	add r1, r4, #0
	bl sub_0201A0FC
	ldr r0, _021EF058 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	nop
_021EF04C: .word 0xFFFFE0FF
_021EF050: .word 0x04001000
_021EF054: .word ov96_021EEEEC
_021EF058: .word gMain + 0x60
	thumb_func_end ov96_021EEFAC

	thumb_func_start ov96_021EF05C
ov96_021EF05C: ; 0x021EF05C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_0203A914
	ldr r0, [r4, #8]
	bl ov96_021EE808
	add r0, r4, #0
	bl ov96_021EEF98
	add r0, r5, #0
	bl ov96_021E5DAC
	mov r0, #0x9f
	bl sub_0201A9C4
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EF05C

	thumb_func_start ov96_021EF094
ov96_021EF094: ; 0x021EF094
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldrb r0, [r5]
	cmp r0, #0
	beq _021EF0AC
	cmp r0, #1
	beq _021EF0DC
	b _021EF0F0
_021EF0AC:
	ldr r0, [r4, #0xc]
	add r0, r0, #1
	str r0, [r4, #0xc]
	cmp r0, #0xf
	ble _021EF0F4
	ldr r0, [r4, #8]
	bl ov96_021EE9BC
	mov r0, #4
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _021EF0F4
_021EF0DC:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EF0F4
	ldr r0, [r4, #8]
	bl ov96_021EE944
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_021EF0F0:
	bl GF_AssertFail
_021EF0F4:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF094

	thumb_func_start ov96_021EF0FC
ov96_021EF0FC: ; 0x021EF0FC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5DD4
	cmp r0, #0
	beq _021EF116
	cmp r0, #1
	beq _021EF124
	b _021EF182
_021EF116:
	add r0, r5, #0
	bl ov96_021EF2C0
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021EF186
_021EF124:
	add r0, r4, #0
	bl ov96_021EF818
	ldr r0, [r4, #4]
	ldr r1, [r4, #0xc]
	bl ov96_021EF4D0
	add r0, r4, #0
	add r0, #0x20
	ldrb r0, [r0]
	ldr r1, [r4, #0xc]
	bl ov96_021EE5B4
	str r0, [r4, #0x34]
	ldr r1, [r4, #4]
	bl ov96_021EE60C
	add r0, r4, #0
	bl ov96_021EF54C
	ldr r0, [r4, #0x34]
	bl ov96_021EE644
	add r0, r4, #0
	bl ov96_021EFA28
	mov r0, #2
	bl sub_0203A994
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, r5, #0
	mov r1, #0
	bl ov96_021E5DE0
	mov r0, #1
	pop {r3, r4, r5, pc}
_021EF182:
	bl GF_AssertFail
_021EF186:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF0FC

	thumb_func_start ov96_021EF18C
ov96_021EF18C: ; 0x021EF18C
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x14]
	bl sub_0200D020
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_021EF18C

	thumb_func_start ov96_021EF19C
ov96_021EF19C: ; 0x021EF19C
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	bl ov96_021E5DC4
	add r6, r0, #0
	ldr r0, [r6, #8]
	bl NARC_dtor
	bl sub_0203A914
	ldr r0, [r6, #0x34]
	bl ov96_021EE5E0
	ldr r0, [r6, #0x30]
	mov r1, #0xc
	bl ov98_0221EB84
	ldr r5, _021EF230 ; =0x0221BA18
	mov r4, #0
_021EF1C2:
	ldrb r1, [r5]
	ldr r0, [r6, #4]
	bl sub_0201BB4C
	add r4, r4, #1
	add r5, r5, #1
	cmp r4, #7
	blt _021EF1C2
	ldr r0, [r6, #4]
	bl FreeToHeap
	mov r5, #0
	add r4, r6, #0
	add r7, r5, #0
_021EF1DE:
	ldr r0, [r4, #0x38]
	cmp r0, #0
	beq _021EF1EA
	bl sub_0200D9DC
	str r7, [r4, #0x38]
_021EF1EA:
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #4
	blt _021EF1DE
	ldr r0, [r6, #0x10]
	ldr r1, [r6, #0x14]
	bl sub_0200D998
	ldr r0, [r6, #0x10]
	bl sub_0200D108
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	ldr r0, [sp]
	bl ov96_021E5DAC
	ldr r0, _021EF234 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _021EF238 ; =SDK_OVERLAY_OVY_98_ID
	bl UnloadOverlayByID
	mov r0, #0x88
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021EF230: .word 0x0221BA18
_021EF234: .word gMain + 0x60
_021EF238: .word SDK_OVERLAY_OVY_98_ID
	thumb_func_end ov96_021EF19C

	thumb_func_start ov96_021EF23C
ov96_021EF23C: ; 0x021EF23C
	push {r4, lr}
	add r4, r0, #0
	bl sub_0200D034
	ldr r0, [r4, #4]
	bl sub_0201EEB4
	ldr r3, _021EF258 ; =0x027E0000
	ldr r1, _021EF25C ; =0x00003FF8
	mov r0, #1
	ldr r2, [r3, r1]
	orr r0, r2
	str r0, [r3, r1]
	pop {r4, pc}
	.balign 4, 0
_021EF258: .word 0x027E0000
_021EF25C: .word 0x00003FF8
	thumb_func_end ov96_021EF23C

	thumb_func_start ov96_021EF260
ov96_021EF260: ; 0x021EF260
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021EF27C ; =0x0221BAC0
	add r3, sp, #0
	mov r2, #5
_021EF26A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021EF26A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021EF27C: .word 0x0221BAC0
	thumb_func_end ov96_021EF260

	thumb_func_start ov96_021EF280
ov96_021EF280: ; 0x021EF280
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	bl sub_02004A90
	add r1, r5, #0
	add r2, sp, #0
	bl sub_02005B78
	add r1, sp, #0
	mov r0, #0
	ldrsh r1, [r1, r0]
	cmp r1, r4
	blt _021EF29E
	mov r0, #1
_021EF29E:
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021EF280

	thumb_func_start ov96_021EF2A0
ov96_021EF2A0: ; 0x021EF2A0
	push {r3, lr}
	bl ov96_021E5E44
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r3, pc}
	thumb_func_end ov96_021EF2A0

	thumb_func_start ov96_021EF2AC
ov96_021EF2AC: ; 0x021EF2AC
	push {r3, lr}
	bl ov96_021E5D60
	bl sub_020503D0
	mov r1, #0xef
	bl sub_020503DC
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF2AC

	thumb_func_start ov96_021EF2C0
ov96_021EF2C0: ; 0x021EF2C0
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	mov r2, #1
	mov r0, #0x5c
	mov r1, #0x88
	lsl r2, r2, #0x12
	bl sub_0201A910
	ldr r0, _021EF390 ; =SDK_OVERLAY_OVY_98_ID
	mov r1, #2
	mov r6, #0x88
	bl HandleLoadOverlay
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021EF394 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021EF398 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021EF260
	add r0, r5, #0
	mov r1, #0x48
	bl ov96_021E5D94
	mov r1, #0
	mov r2, #0x48
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0xdd
	add r1, r6, #0
	bl NARC_ctor
	str r0, [r4, #8]
	add r0, r6, #0
	bl sub_0201AC88
	str r0, [r4, #4]
	add r0, r5, #0
	bl ov96_021EF2A0
	add r1, r4, #0
	add r1, #0x20
	strb r0, [r1]
	add r0, r5, #0
	bl ov96_021E5EE0
	add r1, r4, #0
	add r1, #0x22
	strb r0, [r1]
	add r0, r5, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021EF358
	mov r0, #1
	b _021EF35A
_021EF358:
	mov r0, #0
_021EF35A:
	str r0, [r4, #0x24]
	str r5, [r4]
	mov r0, #0x88
	str r0, [r4, #0xc]
	ldr r0, _021EF39C ; =ov96_021EF23C
	add r1, r4, #0
	bl sub_0201A0FC
	ldr r0, _021EF3A0 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _021EF3A4 ; =0x00007FFF
	bl sub_0200FC20
	ldr r0, [r4, #0x24]
	cmp r0, #0
	beq _021EF386
	mov r0, #0
	str r0, [r4, #0x28]
	pop {r4, r5, r6, pc}
_021EF386:
	add r0, r5, #0
	bl ov96_021EF2AC
	str r0, [r4, #0x28]
	pop {r4, r5, r6, pc}
	.balign 4, 0
_021EF390: .word SDK_OVERLAY_OVY_98_ID
_021EF394: .word 0xFFFFE0FF
_021EF398: .word 0x04001000
_021EF39C: .word ov96_021EF23C
_021EF3A0: .word gMain + 0x60
_021EF3A4: .word 0x00007FFF
	thumb_func_end ov96_021EF2C0

	thumb_func_start ov96_021EF3A8
ov96_021EF3A8: ; 0x021EF3A8
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r1, #1
	ldr r2, [r4, #0xc]
	mov r0, #6
	lsl r1, r1, #0xe
	bl sub_02003030
	ldr r0, [r4, #0x34]
	bl ov96_021EE644
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #0xc]
	mov r1, #4
	str r0, [sp, #4]
	ldr r0, [r4, #8]
	add r2, r1, #0
	bl sub_02007B8C
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	mov r3, #4
	bl sub_02007B44
	ldr r0, [r4, #0x28]
	cmp r0, #0
	beq _021EF410
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #0xa
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	mov r3, #4
	bl sub_02007B68
	add sp, #0x10
	pop {r4, pc}
_021EF410:
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #9
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	mov r3, #4
	bl sub_02007B68
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF3A8

	thumb_func_start ov96_021EF430
ov96_021EF430: ; 0x021EF430
	push {r3, r4, r5, lr}
	sub sp, #0x20
	add r4, r1, #0
	add r5, r0, #0
	cmp r4, #0xa
	blt _021EF440
	bl GF_AssertFail
_021EF440:
	mov r0, #0
	str r0, [sp]
	ldr r0, [r5, #0xc]
	add r1, r4, #0
	str r0, [sp, #4]
	mov r2, #6
	ldr r0, [r5, #8]
	add r1, #0x20
	lsl r3, r2, #0xc
	bl sub_02007B8C
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5, #0xc]
	add r1, r4, #0
	str r0, [sp, #0xc]
	ldr r0, [r5, #8]
	ldr r2, [r5, #4]
	add r1, #0x2a
	mov r3, #7
	bl sub_02007B44
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5, #0xc]
	add r4, #0x34
	str r0, [sp, #0xc]
	ldr r0, [r5, #8]
	ldr r2, [r5, #4]
	add r1, r4, #0
	mov r3, #7
	bl sub_02007B68
	mov r0, #4
	mov r1, #0
	bl sub_0201C2D8
	mov r0, #0
	mov r1, #1
	lsl r1, r1, #0xc
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	str r1, [sp, #0x1c]
	bl sub_020D3AB4
	mov r3, #0
	str r3, [sp]
	ldr r0, [r5, #4]
	mov r1, #7
	add r2, sp, #0x10
	bl sub_0201BE7C
	add r0, sp, #0x10
	str r0, [sp]
	mov r3, #0
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r5, #4]
	mov r1, #7
	mov r2, #3
	bl sub_0201BE0C
	add sp, #0x20
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF430

	thumb_func_start ov96_021EF4D0
ov96_021EF4D0: ; 0x021EF4D0
	push {r4, r5, r6, r7, lr}
	sub sp, #0xdc
	ldr r4, _021EF53C ; =0x0221BA44
	add r3, sp, #8
	add r7, r0, #0
	str r1, [sp]
	add r2, r3, #0
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r4, _021EF540 ; =0x0221BB98
	add r3, sp, #0x18
	mov r2, #0x18
_021EF4F2:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021EF4F2
	ldr r0, [r4]
	ldr r4, _021EF544 ; =0x0221BA10
	str r0, [r3]
	mov r0, #0
	ldr r5, _021EF548 ; =0x0221BA18
	str r0, [sp, #4]
	add r6, sp, #0x18
_021EF508:
	ldrb r1, [r5]
	ldrb r3, [r4]
	add r0, r7, #0
	add r2, r6, #0
	bl sub_0201B1E4
	ldrb r1, [r5]
	add r0, r7, #0
	bl sub_0201CAE0
	ldrb r0, [r5]
	ldr r3, [sp]
	mov r1, #0x40
	mov r2, #0
	bl sub_0201C1C4
	ldr r0, [sp, #4]
	add r4, r4, #1
	add r0, r0, #1
	add r6, #0x1c
	add r5, r5, #1
	str r0, [sp, #4]
	cmp r0, #7
	blt _021EF508
	add sp, #0xdc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021EF53C: .word 0x0221BA44
_021EF540: .word 0x0221BB98
_021EF544: .word 0x0221BA10
_021EF548: .word 0x0221BA18
	thumb_func_end ov96_021EF4D0

	thumb_func_start ov96_021EF54C
ov96_021EF54C: ; 0x021EF54C
	push {r4, lr}
	sub sp, #0x10
	mov r2, #0
	add r4, r0, #0
	str r2, [sp]
	ldr r0, [r4, #0xc]
	mov r1, #4
	str r0, [sp, #4]
	ldr r0, [r4, #8]
	add r3, r2, #0
	bl sub_02007B8C
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B44
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B68
	ldr r0, [r4, #0x24]
	cmp r0, #0
	bne _021EF5CA
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r3, #1
	str r3, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B44
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r3, #1
	str r3, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B68
_021EF5CA:
	add r0, r4, #0
	bl ov96_021EF3A8
	ldr r0, _021EF5EC ; =0x00000135
	ldr r3, _021EF5F0 ; =0x0221BB38
	str r0, [sp]
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #4]
	mov r2, #0xc
	bl ov98_0221EABC
	str r0, [r4, #0x30]
	add r0, r4, #0
	bl ov96_021EF610
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
_021EF5EC: .word 0x00000135
_021EF5F0: .word 0x0221BB38
	thumb_func_end ov96_021EF54C

	thumb_func_start ov96_021EF5F4
ov96_021EF5F4: ; 0x021EF5F4
	push {r4, lr}
	ldr r0, [r0]
	add r4, r1, #0
	bl ov96_021E5D60
	bl sub_02031968
	bl sub_020319DC
	mov r1, #0x2c
	mul r1, r4
	ldrh r0, [r0, r1]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF5F4

	thumb_func_start ov96_021EF610
ov96_021EF610: ; 0x021EF610
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r0, #0x20
	ldrb r6, [r0]
	add r0, r5, #0
	add r0, #0x22
	ldrb r0, [r0]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [r5, #0x28]
	cmp r0, #0
	bne _021EF636
	mov r1, #5
	ldr r0, [r5, #0x30]
	add r2, r1, #0
	bl ov98_0221EEEC
_021EF636:
	mov r1, #0
	ldr r0, [r5, #0x30]
	mov r2, #0xc5
	add r3, r1, #0
	bl ov98_0221EBD8
	ldr r0, [r5, #0x30]
	mov r1, #2
	mov r2, #0xd0
	mov r3, #0
	bl ov98_0221EBD8
	mov r3, #0
	str r3, [sp]
	add r2, r6, #0
	ldr r0, [r5, #0x30]
	mov r1, #1
	add r2, #0xc6
	bl ov98_0221EC08
	mov r3, #0
	str r3, [sp]
	lsl r2, r6, #1
	add r2, r6, r2
	ldr r0, [r5, #0x30]
	mov r1, #3
	add r2, #0xd1
	bl ov98_0221EC08
	mov r0, #1
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r1, #5
	mov r2, #0xef
	add r3, r4, #0
	bl ov98_0221ECD0
	ldr r0, [r5, #0x24]
	cmp r0, #0
	bne _021EF69A
	mov r3, #0
	str r3, [sp]
	mov r1, #4
	str r1, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r2, #0xf0
	bl ov98_0221EBEC
_021EF69A:
	ldr r0, [r5, #0x34]
	bl ov96_021EE6A0
	ldr r0, [r5, #0x28]
	cmp r0, #0
	beq _021EF766
	add r1, r5, #0
	add r1, #0x20
	ldrb r1, [r1]
	add r0, r5, #0
	bl ov96_021EF5F4
	add r4, r0, #0
	ldr r0, _021EF76C ; =0x0000FFFF
	cmp r4, r0
	bne _021EF6BC
	mov r4, #0
_021EF6BC:
	add r0, r5, #0
	add r0, #0x20
	ldrb r0, [r0]
	cmp r0, #0
	bne _021EF70E
	ldr r0, [r5, #0x30]
	bl ov98_0221EEFC
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r1, #0
	add r2, r0, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	add r0, r7, #0
	mov r3, #3
	bl BufferIntegerAsString
	add r0, r4, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r0, #0xa
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	add r2, r0, #0
	mov r0, #0
	mov r1, #1
	str r0, [sp]
	add r0, r7, #0
	add r3, r1, #0
	str r1, [sp, #4]
	bl BufferIntegerAsString
	b _021EF74E
_021EF70E:
	cmp r0, #6
	ldr r0, [r5, #0x30]
	bne _021EF744
	lsr r1, r4, #0xa
	mov r2, #2
	mov r3, #0
	bl ov98_0221EDA4
	lsr r3, r4, #0x1f
	lsl r2, r4, #0x16
	sub r2, r2, r3
	mov r1, #0x16
	ror r2, r1
	add r2, r3, r2
	add r3, r2, #0
	mov r1, #0xa
	mul r3, r1
	asr r1, r3, #9
	lsr r1, r1, #0x16
	add r1, r3, r1
	mov r2, #1
	ldr r0, [r5, #0x30]
	asr r1, r1, #0xa
	add r3, r2, #0
	bl ov98_0221EDA4
	b _021EF74E
_021EF744:
	add r1, r4, #0
	mov r2, #3
	mov r3, #0
	bl ov98_0221EDA4
_021EF74E:
	ldr r0, [r5, #0x30]
	mov r1, #6
	mov r2, #0xb0
	mov r3, #0
	bl ov98_0221EBD8
	add r6, #0xb1
	ldr r0, [r5, #0x30]
	mov r1, #7
	add r2, r6, #0
	bl ov98_0221ED3C
_021EF766:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EF76C: .word 0x0000FFFF
	thumb_func_end ov96_021EF610

	thumb_func_start ov96_021EF770
ov96_021EF770: ; 0x021EF770
	push {r3, r4, r5, lr}
	sub sp, #8
	add r5, r0, #0
	add r0, #0x20
	ldrb r1, [r0]
	mov r2, #0xf4
	mov r3, #0
	lsl r0, r1, #1
	add r4, r1, r0
	ldr r0, [r5, #0x30]
	mov r1, #8
	add r4, #0xd2
	bl ov98_0221EBD8
	mov r3, #0
	str r3, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r1, #9
	mov r2, #0xf2
	bl ov98_0221EBEC
	mov r3, #0
	str r3, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r1, #0xa
	mov r2, #0xf3
	bl ov98_0221EBEC
	mov r3, #0
	str r3, [sp]
	ldr r0, [r5, #0x30]
	mov r1, #0xb
	add r2, r4, #0
	bl ov98_0221EC08
	add sp, #8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF770

	thumb_func_start ov96_021EF7C4
ov96_021EF7C4: ; 0x021EF7C4
	push {r3, r4, r5, lr}
	sub sp, #8
	add r5, r0, #0
	add r0, #0x20
	ldrb r1, [r0]
	mov r2, #0xf5
	mov r3, #0
	lsl r0, r1, #1
	add r4, r1, r0
	ldr r0, [r5, #0x30]
	mov r1, #8
	add r4, #0xd3
	bl ov98_0221EBD8
	mov r3, #0
	str r3, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r1, #9
	mov r2, #0xf1
	bl ov98_0221EBEC
	mov r3, #0
	str r3, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, [r5, #0x30]
	mov r1, #0xa
	mov r2, #0xf3
	bl ov98_0221EBEC
	mov r3, #0
	str r3, [sp]
	ldr r0, [r5, #0x30]
	mov r1, #0xb
	add r2, r4, #0
	bl ov98_0221EC08
	add sp, #8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF7C4

	thumb_func_start ov96_021EF818
ov96_021EF818: ; 0x021EF818
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _021EF8B4 ; =0x0221BA68
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021EF8B8 ; =0x0221BAA0
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021EF8BC ; =0x0221BA54
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #4
	str r0, [sp]
	ldr r0, [r4, #0xc]
	bl sub_0200CF18
	str r0, [r4, #0x10]
	bl sub_0200CF38
	str r0, [r4, #0x14]
	ldr r0, [r4, #0x10]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	ldr r0, [r4, #0x10]
	ldr r1, [r4, #0x14]
	mov r2, #4
	bl sub_0200CFF4
	ldr r0, [r4, #0x10]
	ldr r1, [r4, #0x14]
	add r2, sp, #0x34
	bl sub_0200D3F8
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	ldr r0, [r4, #0x10]
	bl sub_0200CF6C
	mov r2, #2
	mov r1, #0
	lsl r2, r2, #0x14
	bl sub_02009FC8
	add r0, r4, #0
	bl ov96_021EF8C0
	add r0, r4, #0
	bl ov96_021EF99C
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_021EF8B4: .word 0x0221BA68
_021EF8B8: .word 0x0221BAA0
_021EF8BC: .word 0x0221BA54
	thumb_func_end ov96_021EF818

	thumb_func_start ov96_021EF8C0
ov96_021EF8C0: ; 0x021EF8C0
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r4, [r5, #0x14]
	ldr r6, [r5, #0x10]
	mov r3, #0
	str r3, [sp]
	mov r0, #0x10
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	str r3, [sp, #0xc]
	ldr r2, [r5, #8]
	add r0, r6, #0
	add r1, r4, #0
	bl sub_0200D5D4
	mov r3, #1
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	ldr r2, [r5, #8]
	add r0, r6, #0
	add r1, r4, #0
	bl sub_0200D504
	mov r0, #1
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r2, [r5, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r3, #2
	bl sub_0200D6EC
	mov r0, #1
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r2, [r5, #8]
	add r0, r6, #0
	add r1, r4, #0
	mov r3, #3
	bl sub_0200D71C
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF8C0

	thumb_func_start ov96_021EF924
ov96_021EF924: ; 0x021EF924
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x40]
	bl sub_0200DCA0
	cmp r0, #0
	bne _021EF958
	add r0, r4, #0
	add r0, #0x21
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x21
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x21
	ldrb r0, [r0]
	cmp r0, #2
	blo _021EF952
	add r0, r4, #0
	mov r1, #0
	add r0, #0x21
	strb r1, [r0]
_021EF952:
	add r0, r4, #0
	bl ov96_021EFA04
_021EF958:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EF924

	thumb_func_start ov96_021EF95C
ov96_021EF95C: ; 0x021EF95C
	push {r3, r4, r5, r6, r7, lr}
	ldr r2, _021EF988 ; =0x0221BA80
	add r5, r0, #0
	lsl r0, r1, #4
	mov r6, #0
	add r4, r2, r0
	mov r7, #2
_021EF96A:
	mov r1, #0
	ldrsh r1, [r4, r1]
	mov r3, #2
	ldrsh r2, [r4, r7]
	ldr r0, [r5, #0x38]
	lsl r3, r3, #0x14
	bl sub_0200DDF4
	add r6, r6, #1
	add r4, r4, #4
	add r5, r5, #4
	cmp r6, #4
	blt _021EF96A
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EF988: .word 0x0221BA80
	thumb_func_end ov96_021EF95C

	thumb_func_start ov96_021EF98C
ov96_021EF98C: ; 0x021EF98C
	add r1, r0, #0
	ldr r3, _021EF998 ; =ov96_021EFA04
	mov r2, #0
	add r1, #0x21
	strb r2, [r1]
	bx r3
	.balign 4, 0
_021EF998: .word ov96_021EFA04
	thumb_func_end ov96_021EF98C

	thumb_func_start ov96_021EF99C
ov96_021EF99C: ; 0x021EF99C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r0, [sp]
	ldr r5, _021EF9FC ; =0x0221DA80
	mov r0, #0
	ldr r4, _021EFA00 ; =0x0221BA80
	ldr r6, [sp]
	str r0, [sp, #4]
	add r7, r5, #0
_021EF9AE:
	ldr r0, [sp]
	ldr r1, [sp]
	mov r2, #0
	ldrsh r2, [r4, r2]
	ldr r0, [r0, #0x10]
	ldr r1, [r1, #0x14]
	mov r3, #2
	strh r2, [r5]
	mov r2, #2
	ldrsh r2, [r4, r2]
	lsl r3, r3, #0x14
	strh r2, [r5, #2]
	add r2, r7, #0
	bl sub_0200D740
	mov r1, #1
	str r0, [r6, #0x38]
	bl sub_0200DC78
	ldr r0, [sp, #4]
	add r4, r4, #4
	add r0, r0, #1
	add r5, #0x34
	add r7, #0x34
	add r6, r6, #4
	str r0, [sp, #4]
	cmp r0, #4
	blt _021EF9AE
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0x40]
	bl sub_0200DC78
	ldr r0, [sp]
	bl ov96_021EFA04
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021EF9FC: .word 0x0221DA80
_021EFA00: .word 0x0221BA80
	thumb_func_end ov96_021EF99C

	thumb_func_start ov96_021EFA04
ov96_021EFA04: ; 0x021EFA04
	push {r4, lr}
	add r2, r0, #0
	add r1, r2, #0
	add r1, #0x20
	ldrb r1, [r1]
	ldr r0, [r2, #0x40]
	add r2, #0x21
	lsl r4, r1, #3
	ldrb r1, [r2]
	ldr r3, _021EFA24 ; =0x0221BAE8
	lsl r2, r1, #2
	add r1, r3, r4
	ldr r1, [r2, r1]
	bl sub_0200DC4C
	pop {r4, pc}
	.balign 4, 0
_021EFA24: .word 0x0221BAE8
	thumb_func_end ov96_021EFA04

	thumb_func_start ov96_021EFA28
ov96_021EFA28: ; 0x021EFA28
	push {r3, lr}
	mov r0, #4
	mov r1, #0
	bl sub_02022CC8
	mov r0, #8
	mov r1, #0
	bl sub_02022CC8
	pop {r3, pc}
	thumb_func_end ov96_021EFA28

	thumb_func_start ov96_021EFA3C
ov96_021EFA3C: ; 0x021EFA3C
	push {r4, r5, lr}
	sub sp, #0x1c
	add r5, r0, #0
	ldr r0, [r5, #0x28]
	mov r4, #0
	cmp r0, #0
	bne _021EFA4C
	mov r4, #0x20
_021EFA4C:
	ldr r1, _021EFAC8 ; =0x00000125
	mov r0, #0
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	str r0, [sp, #0x14]
	str r1, [sp, #0x18]
	bl sub_020D3AB4
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r5, #4]
	mov r1, #7
	add r2, sp, #0xc
	mov r3, #0x80
	bl sub_0201BE7C
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r5, #4]
	mov r1, #6
	add r2, sp, #0xc
	mov r3, #0x80
	bl sub_0201BE7C
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r5, #4]
	mov r1, #7
	mov r2, #5
	add r3, r4, #0
	bl sub_0201BE0C
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r5, #4]
	mov r1, #6
	mov r2, #5
	add r3, r4, #0
	bl sub_0201BE0C
	mov r0, #4
	mov r1, #1
	bl sub_02022CC8
	mov r0, #8
	mov r1, #1
	bl sub_02022CC8
	mov r0, #0
	str r0, [r5, #0x1c]
	mov r0, #1
	str r0, [r5, #0x2c]
	add sp, #0x1c
	pop {r4, r5, pc}
	.balign 4, 0
_021EFAC8: .word 0x00000125
	thumb_func_end ov96_021EFA3C

	thumb_func_start ov96_021EFACC
ov96_021EFACC: ; 0x021EFACC
	push {r3, r4, lr}
	sub sp, #0x14
	add r4, r0, #0
	ldr r0, [r4, #0x1c]
	mov r1, #0xe
	add r0, r0, #1
	str r0, [r4, #0x1c]
	lsl r0, r0, #0xc
	bl _s32_div_f
	mov r1, #0
	str r0, [sp, #4]
	str r1, [sp, #8]
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	bl sub_020D3AB4
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r4, #4]
	mov r1, #7
	add r2, sp, #4
	mov r3, #0x80
	bl sub_0201BE7C
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r4, #4]
	mov r1, #6
	add r2, sp, #4
	mov r3, #0x80
	bl sub_0201BE7C
	ldr r0, [r4, #0x1c]
	cmp r0, #0xe
	blt _021EFB1A
	mov r0, #0
	str r0, [r4, #0x1c]
	str r0, [r4, #0x2c]
_021EFB1A:
	add sp, #0x14
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EFACC

	thumb_func_start ov96_021EFB20
ov96_021EFB20: ; 0x021EFB20
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #4
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4, #0xc]
	ldr r3, _021EFB4C ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	bl sub_0200FA24
	str r5, [r4, #0x18]
	add sp, #0xc
	pop {r4, r5, pc}
	nop
_021EFB4C: .word 0x00007FFF
	thumb_func_end ov96_021EFB20

	thumb_func_start ov96_021EFB50
ov96_021EFB50: ; 0x021EFB50
	ldr r3, _021EFB54 ; =sub_0200FB5C
	bx r3
	.balign 4, 0
_021EFB54: .word sub_0200FB5C
	thumb_func_end ov96_021EFB50

	thumb_func_start ov96_021EFB58
ov96_021EFB58: ; 0x021EFB58
	push {r3, r4, r5, lr}
	sub sp, #0x20
	mov r3, #0
	str r3, [sp]
	add r5, r0, #0
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5, #0xc]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r0, [r5, #8]
	ldr r2, [r5, #4]
	bl sub_02007B68
	add r0, r5, #0
	bl ov96_021EF3A8
	add r0, r5, #0
	mov r1, #0
	bl ov96_021EF95C
	ldr r0, [r5, #0x38]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r5, #0x3c]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r5, #0x40]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r5, #0x44]
	mov r1, #1
	bl sub_0200DCE8
	mov r0, #5
	mov r1, #1
	bl sub_0201BC28
	mov r0, #6
	mov r1, #1
	bl sub_0201BC28
	mov r0, #4
	mov r1, #1
	bl sub_0201BC28
	mov r0, #1
	add r1, r0, #0
	bl sub_0201BC28
	add r0, r5, #0
	bl ov96_021EF610
	ldr r0, [r5, #0x28]
	mov r4, #0
	cmp r0, #0
	bne _021EFBD4
	sub r4, #0x20
_021EFBD4:
	mov r1, #1
	lsl r1, r1, #0xc
	mov r0, #0
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	str r1, [sp, #0x1c]
	bl sub_020D3AB4
	mov r3, #0
	str r3, [sp]
	ldr r0, [r5, #4]
	mov r1, #7
	add r2, sp, #0x10
	bl sub_0201BE7C
	add r0, sp, #0x10
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5, #4]
	mov r1, #7
	mov r2, #3
	add r3, r4, #0
	bl sub_0201BE0C
	add sp, #0x20
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021EFB58

	thumb_func_start ov96_021EFC10
ov96_021EFC10: ; 0x021EFC10
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	add r1, r4, #0
	add r1, #0x20
	ldrb r1, [r1]
	bl ov96_021EF430
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B68
	add r0, r4, #0
	mov r1, #1
	bl ov96_021EF95C
	ldr r0, [r4, #0x38]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x3c]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x40]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x44]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #5
	mov r1, #0
	bl sub_0201BC28
	mov r0, #6
	mov r1, #0
	bl sub_0201BC28
	mov r0, #4
	mov r1, #0
	bl sub_0201BC28
	mov r0, #1
	mov r1, #0
	bl sub_0201BC28
	add r0, r4, #0
	bl ov96_021EF770
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EFC10

	thumb_func_start ov96_021EFC8C
ov96_021EFC8C: ; 0x021EFC8C
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	add r1, r4, #0
	add r1, #0x20
	ldrb r1, [r1]
	bl ov96_021EF430
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r0, [r4, #8]
	ldr r2, [r4, #4]
	bl sub_02007B68
	add r0, r4, #0
	mov r1, #1
	bl ov96_021EF95C
	ldr r0, [r4, #0x38]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x3c]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x40]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x44]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #5
	mov r1, #0
	bl sub_0201BC28
	mov r0, #6
	mov r1, #0
	bl sub_0201BC28
	mov r0, #4
	mov r1, #0
	bl sub_0201BC28
	mov r0, #1
	mov r1, #0
	bl sub_0201BC28
	add r0, r4, #0
	bl ov96_021EF7C4
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021EFC8C

	thumb_func_start ov96_021EFD08
ov96_021EFD08: ; 0x021EFD08
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0201CAE0
	ldr r0, [r4, #4]
	mov r1, #2
	bl sub_0201CAE0
	ldr r0, [r4, #4]
	mov r1, #4
	bl sub_0201CAE0
	ldr r0, [r4, #4]
	mov r1, #5
	bl sub_0201CAE0
	ldr r0, [r4, #4]
	mov r1, #6
	bl sub_0201CAE0
	ldr r0, [r4, #4]
	mov r1, #7
	bl sub_0201CAE0
	add r0, r4, #0
	bl ov96_021EF98C
	ldr r0, [r4, #0x18]
	cmp r0, #1
	beq _021EFD5A
	cmp r0, #2
	beq _021EFD78
	cmp r0, #3
	beq _021EFD80
	b _021EFD88
_021EFD5A:
	add r0, r4, #0
	bl ov96_021EFB58
	mov r0, #4
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4, #0xc]
	ldr r3, _021EFD98 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	b _021EFD8C
_021EFD78:
	add r0, r4, #0
	bl ov96_021EFC10
	b _021EFD8C
_021EFD80:
	add r0, r4, #0
	bl ov96_021EFC8C
	b _021EFD8C
_021EFD88:
	bl GF_AssertFail
_021EFD8C:
	ldr r1, [r4, #0x18]
	add r0, r5, #0
	bl ov96_021E5FC8
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_021EFD98: .word 0x00007FFF
	thumb_func_end ov96_021EFD08

	thumb_func_start ov96_021EFD9C
ov96_021EFD9C: ; 0x021EFD9C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r5, r0, #0
	bl ov96_021EF924
	ldrb r0, [r4]
	cmp r0, #5
	bhi _021EFEA8
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021EFDC0: ; jump table
	.short _021EFDCC - _021EFDC0 - 2 ; case 0
	.short _021EFDDC - _021EFDC0 - 2 ; case 1
	.short _021EFE04 - _021EFDC0 - 2 ; case 2
	.short _021EFE1E - _021EFDC0 - 2 ; case 3
	.short _021EFE70 - _021EFDC0 - 2 ; case 4
	.short _021EFE94 - _021EFDC0 - 2 ; case 5
_021EFDCC:
	mov r0, #0x47
	lsl r0, r0, #4
	bl sub_02005D48
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFEAC
_021EFDDC:
	mov r0, #0
	add r1, r0, #0
	bl ov96_021EF280
	cmp r0, #0
	beq _021EFEAC
	mov r1, #1
	str r1, [sp]
	str r1, [sp, #4]
	ldr r0, [r5, #0xc]
	ldr r3, _021EFEB4 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #4
	add r2, r1, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFEAC
_021EFE04:
	mov r0, #0
	mov r1, #1
	bl ov96_021EF280
	cmp r0, #0
	beq _021EFEAC
	add r0, r5, #0
	bl ov96_021EFA3C
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFEAC
_021EFE1E:
	ldr r0, [r5, #0x2c]
	cmp r0, #0
	beq _021EFE2C
	add r0, r5, #0
	bl ov96_021EFACC
	b _021EFEAC
_021EFE2C:
	mov r0, #0
	mov r1, #3
	bl ov96_021EF280
	cmp r0, #0
	beq _021EFEAC
	mov r0, #0xc
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r5, #0xc]
	ldr r3, _021EFEB4 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #3
	add r2, r1, #0
	bl sub_0200FA24
	ldr r0, [r5, #0x40]
	mov r1, #1
	bl sub_0200DC78
	ldr r0, [r5, #0x24]
	cmp r0, #0
	bne _021EFE60
	mov r1, #1
	b _021EFE62
_021EFE60:
	mov r1, #0
_021EFE62:
	ldr r0, [r5, #0x44]
	bl sub_0200DCE8
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFEAC
_021EFE70:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EFEAC
	ldr r0, [r5, #0x24]
	cmp r0, #0
	beq _021EFE8A
	mov r0, #0
	str r0, [r5, #0x1c]
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFEAC
_021EFE8A:
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _021EFEAC
_021EFE94:
	ldr r0, [r5, #0x1c]
	add r0, r0, #1
	str r0, [r5, #0x1c]
	cmp r0, #0xb4
	blt _021EFEAC
	add r0, r6, #0
	mov r1, #4
	bl ov96_021E5FC8
	b _021EFEAC
_021EFEA8:
	bl GF_AssertFail
_021EFEAC:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	nop
_021EFEB4: .word 0x00007FFF
	thumb_func_end ov96_021EFD9C

	thumb_func_start ov96_021EFEB8
ov96_021EFEB8: ; 0x021EFEB8
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	bl ov96_021EF924
	ldrb r0, [r4]
	cmp r0, #0
	beq _021EFED2
	cmp r0, #1
	beq _021EFF18
	b _021EFF2A
_021EFED2:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EFF2E
	ldr r0, _021EFF34 ; =0x0221BA20
	bl sub_02025224
	mov r1, #0
	mvn r1, r1
	cmp r0, r1
	beq _021EFF2E
	cmp r0, #0
	beq _021EFEF2
	cmp r0, #1
	beq _021EFF02
	b _021EFF0C
_021EFEF2:
	ldr r0, _021EFF38 ; =0x000005DC
	bl PlaySE
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EFB20
	b _021EFF10
_021EFF02:
	add r0, r5, #0
	mov r1, #4
	bl ov96_021E5FC8
	b _021EFF10
_021EFF0C:
	bl GF_AssertFail
_021EFF10:
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFF2E
_021EFF18:
	add r0, r5, #0
	bl ov96_021EFB50
	cmp r0, #0
	beq _021EFF2E
	add r0, r5, #0
	bl ov96_021EFD08
	b _021EFF2E
_021EFF2A:
	bl GF_AssertFail
_021EFF2E:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_021EFF34: .word 0x0221BA20
_021EFF38: .word 0x000005DC
	thumb_func_end ov96_021EFEB8

	thumb_func_start ov96_021EFF3C
ov96_021EFF3C: ; 0x021EFF3C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	bl ov96_021EF924
	ldrb r0, [r4]
	cmp r0, #0
	beq _021EFF5E
	cmp r0, #1
	beq _021EFF7A
	cmp r0, #2
	beq _021EFFBC
	b _021EFFCE
_021EFF5E:
	mov r0, #4
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r6, #0xc]
	ldr r3, _021EFFD8 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
_021EFF7A:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021EFFD2
	ldr r0, _021EFFDC ; =0x0221BA2C
	bl sub_02025224
	cmp r0, #0
	bne _021EFFA2
	ldr r0, _021EFFE0 ; =0x000005DC
	bl PlaySE
	add r0, r5, #0
	mov r1, #3
	bl ov96_021EFB20
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFFD2
_021EFFA2:
	cmp r0, #1
	bne _021EFFD2
	ldr r0, _021EFFE0 ; =0x000005DC
	bl PlaySE
	add r0, r5, #0
	mov r1, #1
	bl ov96_021EFB20
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021EFFD2
_021EFFBC:
	add r0, r5, #0
	bl ov96_021EFB50
	cmp r0, #0
	beq _021EFFD2
	add r0, r5, #0
	bl ov96_021EFD08
	b _021EFFD2
_021EFFCE:
	bl GF_AssertFail
_021EFFD2:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021EFFD8: .word 0x00007FFF
_021EFFDC: .word 0x0221BA2C
_021EFFE0: .word 0x000005DC
	thumb_func_end ov96_021EFF3C

	thumb_func_start ov96_021EFFE4
ov96_021EFFE4: ; 0x021EFFE4
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	bl ov96_021EF924
	ldrb r0, [r4]
	cmp r0, #0
	beq _021F0006
	cmp r0, #1
	beq _021F0022
	cmp r0, #2
	beq _021F0064
	b _021F0076
_021F0006:
	mov r0, #4
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r6, #0xc]
	ldr r3, _021F0080 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
_021F0022:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F007A
	ldr r0, _021F0084 ; =0x0221BA38
	bl sub_02025224
	cmp r0, #0
	bne _021F004A
	ldr r0, _021F0088 ; =0x000005DC
	bl PlaySE
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EFB20
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F007A
_021F004A:
	cmp r0, #1
	bne _021F007A
	ldr r0, _021F0088 ; =0x000005DC
	bl PlaySE
	add r0, r5, #0
	mov r1, #1
	bl ov96_021EFB20
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F007A
_021F0064:
	add r0, r5, #0
	bl ov96_021EFB50
	cmp r0, #0
	beq _021F007A
	add r0, r5, #0
	bl ov96_021EFD08
	b _021F007A
_021F0076:
	bl GF_AssertFail
_021F007A:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021F0080: .word 0x00007FFF
_021F0084: .word 0x0221BA38
_021F0088: .word 0x000005DC
	thumb_func_end ov96_021EFFE4

	thumb_func_start ov96_021F008C
ov96_021F008C: ; 0x021F008C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl ov96_021EF924
	ldrb r0, [r5]
	cmp r0, #0
	beq _021F00AA
	cmp r0, #1
	beq _021F00EA
	b _021F00F8
_021F00AA:
	add r0, r6, #0
	bl ov96_021E5EE0
	cmp r0, #0
	bne _021F00BC
	ldr r0, _021F0100 ; =0x000008E4
	bl PlaySE
	b _021F00C2
_021F00BC:
	ldr r0, _021F0104 ; =0x000008D6
	bl PlaySE
_021F00C2:
	mov r0, #0
	mov r1, #0x18
	bl sub_02005F50
	mov r0, #0x18
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4, #0xc]
	ldr r3, _021F0108 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	bl sub_0200FA24
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _021F00F8
_021F00EA:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F00F8
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, r5, r6, pc}
_021F00F8:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	nop
_021F0100: .word 0x000008E4
_021F0104: .word 0x000008D6
_021F0108: .word 0x00007FFF
	thumb_func_end ov96_021F008C

	thumb_func_start ov96_021F010C
ov96_021F010C: ; 0x021F010C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x1f8
	add r7, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r7, #0
	bl ov96_021E5DD4
	cmp r0, #5
	bls _021F0124
	b _021F08C4
_021F0124:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F0130: ; jump table
	.short _021F013C - _021F0130 - 2 ; case 0
	.short _021F0216 - _021F0130 - 2 ; case 1
	.short _021F027A - _021F0130 - 2 ; case 2
	.short _021F04B0 - _021F0130 - 2 ; case 3
	.short _021F0588 - _021F0130 - 2 ; case 4
	.short _021F08BE - _021F0130 - 2 ; case 5
_021F013C:
	mov r2, #5
	mov r0, #0x5c
	mov r1, #0x8c
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021F0484 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021F0488 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021F0A5C
	ldr r1, _021F048C ; =0x000007F4
	add r0, r7, #0
	bl ov96_021E5D94
	ldr r2, _021F048C ; =0x000007F4
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8c
	mov r1, #0x28
	bl AllocFromHeap
	mov r1, #0x7f
	lsl r1, r1, #4
	str r0, [r4, r1]
	ldr r0, [r4, r1]
	mov r1, #0
	mov r2, #0x28
	bl MIi_CpuFill8
	mov r0, #0x8c
	bl sub_0201AC88
	str r0, [r4]
	add r0, r7, #0
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0x68
	str r0, [sp, #0xe4]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0xe8]
	lsr r0, r0, #4
	mov r2, #0x8c
	str r0, [sp, #0xec]
	str r2, [sp, #0xf0]
	mov r0, #0x10
	str r0, [sp]
	ldr r3, _021F0490 ; =0x00300010
	add r0, sp, #0xe4
	mov r1, #0x16
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x8c
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x8c
	str r1, [r4, #0x14]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r4]
	bl ov96_021F0BD4
	add r0, r4, #0
	bl ov96_021F2EC8
	ldr r0, _021F0494 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r7, #0
	bl ov96_021E5DEC
	b _021F08C4
_021F0216:
	ldr r0, [r6, #0x14]
	ldr r1, [r6]
	add r2, r7, #0
	bl ov96_021F3BF0
	ldr r1, _021F0498 ; =0x00000774
	str r0, [r6, r1]
	add r0, r7, #0
	bl ov96_021E5D34
	add r4, r0, #0
	add r0, r7, #0
	bl ov96_021E5EE8
	add r2, r0, #0
	mov r1, #4
	ldr r0, [r6, #0x14]
	sub r1, r1, r4
	bl ov96_021F3390
	mov r1, #0x77
	lsl r1, r1, #4
	str r0, [r6, r1]
	ldr r0, [r6, #0x14]
	ldr r1, _021F049C ; =0x00000AA7
	mov r2, #1
	bl ov96_021E9A78
	ldr r1, _021F04A0 ; =0x00000768
	str r0, [r6, r1]
	ldr r0, [r6, #0x14]
	bl ov96_021F30A4
	ldr r1, _021F04A4 ; =0x0000072C
	str r0, [r6, r1]
	add r0, r1, #0
	ldr r2, [r6, r1]
	add r0, #0xa0
	add r1, #0x48
	str r2, [r6, r0]
	ldr r0, [r6, r1]
	bl ov96_021F3E58
	add r0, r7, #0
	bl ov96_021E64B8
	add r0, r7, #0
	bl ov96_021E5DEC
	b _021F08C4
_021F027A:
	ldr r4, _021F04A8 ; =0x0221BC70
	add r3, sp, #0xd8
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r6, #0x14]
	bl ov96_021EB180
	mov r1, #0
	str r0, [r6, #0x18]
	mov r0, #2
	lsl r0, r0, #0x14
	str r0, [sp]
	ldr r0, [r6, #0x18]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [r6, #0x18]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r3, _021F04A0 ; =0x00000768
	ldr r0, [r6, #0x14]
	ldr r3, [r6, r3]
	mov r1, #0xc
	mov r2, #5
	bl ov96_021EA854
	ldr r1, _021F04AC ; =0x0000076C
	mov r2, #0x65
	str r0, [r6, r1]
	ldr r0, [r6, #0x18]
	mov r1, #0
	bl ov96_021EB29C
	ldr r0, [r6, #0x18]
	mov r1, #1
	mov r2, #0x68
	bl ov96_021EB29C
	ldr r0, [r6, #0x18]
	mov r1, #2
	mov r2, #0x66
	bl ov96_021EB29C
	ldr r0, [r6, #0x18]
	mov r1, #3
	mov r2, #0x67
	bl ov96_021EB29C
	ldr r0, [r6, #0x18]
	mov r1, #4
	mov r2, #0x69
	bl ov96_021EB29C
	mov r0, #1
	str r0, [sp]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0
	mov r3, #0x65
	bl ov96_021EB2F4
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB334
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #1
	mov r3, #0x65
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1c
	mov r3, #0x68
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x19
	mov r3, #0x68
	bl ov96_021EB2F4
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1b
	mov r3, #0x68
	bl ov96_021EB334
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1a
	mov r3, #0x68
	bl ov96_021EB36C
	mov r0, #2
	str r0, [sp]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x20
	mov r3, #0x69
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1d
	mov r3, #0x69
	bl ov96_021EB2F4
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1f
	mov r3, #0x69
	bl ov96_021EB334
	ldr r0, [r6, #0x18]
	mov r1, #0xa7
	mov r2, #0x1e
	mov r3, #0x69
	bl ov96_021EB36C
	ldr r1, _021F0498 ; =0x00000774
	ldr r0, [r6, #0x18]
	ldr r1, [r6, r1]
	bl ov96_021F3E60
	ldr r0, [r6, #0x18]
	bl ov96_021EB3A4
	mov r4, #0
	mov r5, #2
_021F03B4:
	str r5, [sp]
	ldr r0, [r6, #0x18]
	add r1, r5, #0
	mov r2, #1
	mov r3, #0x65
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #8
	blt _021F03B4
	mov r4, #0
	mov r5, #4
_021F03CC:
	str r5, [sp]
	mov r1, #1
	ldr r0, [r6, #0x18]
	add r2, r1, #0
	mov r3, #0x68
	bl ov96_021EB408
	mov r0, #7
	str r0, [sp]
	mov r1, #1
	ldr r0, [r6, #0x18]
	add r2, r1, #0
	mov r3, #0x68
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #0xc
	blt _021F03CC
	ldr r0, _021F04A4 ; =0x0000072C
	ldr r1, [r6, #0x18]
	ldr r0, [r6, r0]
	bl ov96_021F30C4
	mov r4, #0
_021F03FC:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	mul r0, r5
	add r2, r6, r0
	mov r0, #0x90
	mul r0, r1
	add r5, r2, r0
	ldr r0, [r6, #0x18]
	mov r1, #0x68
	mov r2, #4
	bl ov96_021EB4F4
	str r0, [r5, #0x24]
	bl ov96_021EB5B8
	mov r1, #2
	bl sub_02024ADC
	ldr r0, [r6, #0x18]
	mov r1, #0x68
	mov r2, #7
	bl ov96_021EB4F4
	str r0, [r5, #0x28]
	bl ov96_021EB5B8
	mov r1, #4
	bl sub_02024ADC
	add r4, r4, #1
	cmp r4, #0xc
	blt _021F03FC
	ldr r2, _021F04A0 ; =0x00000768
	ldr r3, [r6, #0x18]
	ldr r2, [r6, r2]
	add r0, r7, #0
	mov r1, #0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	str r0, [r6, #0x1c]
	bl sub_02024ADC
	ldr r1, _021F0498 ; =0x00000774
	ldr r0, [r6, #0x18]
	ldr r1, [r6, r1]
	bl ov96_021F3EC0
	ldr r1, _021F0498 ; =0x00000774
	ldr r0, [r6, #0x18]
	ldr r1, [r6, r1]
	bl ov96_021F3F80
	add r0, r7, #0
	bl ov96_021E5DEC
	b _021F08C4
	nop
_021F0484: .word 0xFFFFE0FF
_021F0488: .word 0x04001000
_021F048C: .word 0x000007F4
_021F0490: .word 0x00300010
_021F0494: .word gMain + 0x60
_021F0498: .word 0x00000774
_021F049C: .word 0x00000AA7
_021F04A0: .word 0x00000768
_021F04A4: .word 0x0000072C
_021F04A8: .word 0x0221BC70
_021F04AC: .word 0x0000076C
_021F04B0:
	add r0, sp, #0x138
	str r0, [sp, #0x28]
	add r0, sp, #0xf4
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x28]
	mov r4, #0
	str r0, [sp, #0x20]
	add r0, r6, #0
	str r0, [sp, #0x4c]
	add r0, #0x20
	str r0, [sp, #0x4c]
_021F04C6:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r1, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x48]
	ldr r1, [sp, #0x48]
	ldr r3, [sp, #0x28]
	add r0, r7, #0
	add r2, r5, #0
	bl ov96_021E6168
	ldr r1, [sp, #0x48]
	add r0, r7, #0
	add r2, r5, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	ldr r1, [sp, #0x24]
	str r0, [r1, #0x14]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r5, #0
	mul r2, r0
	ldr r0, [sp, #0x4c]
	add r5, r0, r2
	mov r0, #0x90
	mul r0, r1
	str r0, [sp, #0x50]
	ldr r2, [sp, #0x50]
	ldr r0, [sp, #0x20]
	add r2, r5, r2
	ldr r1, [r6, #0x14]
	add r2, #0x48
	bl ov96_021E8BB4
	ldr r0, [sp, #0x50]
	ldr r1, [sp, #0x50]
	add r0, r5, r0
	add r1, r5, r1
	add r0, #0x48
	add r1, #0x68
	mov r2, #0x20
	bl MIi_CpuCopy8
	ldr r0, [sp, #0x50]
	mov r1, #0x10
	add r0, r5, r0
	add r0, #0x68
	bl sub_02003F04
	ldr r0, [sp, #0x28]
	add r4, r4, #1
	add r0, #0x10
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x24]
	add r0, r0, #4
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x20]
	add r0, #0x10
	str r0, [sp, #0x20]
	cmp r4, #0xc
	blt _021F04C6
	mov r0, #1
	mov r1, #0
	str r1, [sp, #0xf4]
	str r0, [sp, #0xf8]
	str r1, [sp, #0xfc]
	str r0, [sp, #0x100]
	str r0, [sp, #0x104]
	str r1, [sp]
	str r1, [sp, #4]
	ldr r0, _021F08CC ; =0x0000076C
	mov r1, #0xc
	ldr r0, [r6, r0]
	add r2, sp, #0x138
	add r3, sp, #0xf4
	bl ov96_021EA8A8
	add r0, r7, #0
	bl ov96_021E5DEC
	b _021F08C4
_021F0588:
	ldr r0, _021F08CC ; =0x0000076C
	ldr r0, [r6, r0]
	bl ov96_021EAA00
	cmp r0, #0
	bne _021F0596
	b _021F08C4
_021F0596:
	add r0, r7, #0
	bl ov96_021E5F24
	str r0, [sp, #0x40]
	ldr r0, [r6]
	bl ov96_021E6030
	add r0, r7, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, sp, #0xb4
	mov r1, #0xaa
	mov r2, #0xb
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #0x44]
	add r0, r6, #0
	str r0, [sp, #0x58]
	add r0, #0x20
	str r0, [sp, #0x58]
_021F05C2:
	ldr r0, _021F08CC ; =0x0000076C
	ldr r1, [sp, #0x44]
	ldr r0, [r6, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	mov r1, #1
	add r4, r0, #0
	bl ov96_021EAB38
	ldr r0, [sp, #0x44]
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	ldr r0, [sp, #0x44]
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	add r0, r7, #0
	add r1, r5, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0xb4
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r4, #0
	bl ov96_021EAF70
	ldr r0, _021F08CC ; =0x0000076C
	ldr r1, [sp, #0x44]
	ldr r0, [r6, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r4, r0, #0
	bl ov96_021EAA20
	str r0, [sp, #0x54]
	mov r1, #0
	add r0, sp, #0xa8
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [sp, #0x44]
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x44]
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x14]
	ldr r1, [sp, #0x1c]
	mov r0, #0x1b
	add r2, r1, #0
	lsl r0, r0, #4
	mul r2, r0
	ldr r0, [sp, #0x58]
	mov r1, #0x90
	add r0, r0, r2
	ldr r2, [sp, #0x14]
	mul r1, r2
	add r5, r0, r1
	str r4, [r0, r1]
	mov r0, #1
	str r0, [r5, #0x18]
	ldr r0, [sp, #0x54]
	bl ov96_021E90FC
	str r0, [sp, #0x5c]
	ldr r0, [sp, #0x54]
	bl ov96_021E8BB0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021F068E
	mov r0, #2
	lsl r0, r0, #0x10
	str r0, [sp, #0xa8]
	ldr r0, [sp, #0x5c]
	mov r1, #0x40
	sub r1, r1, r0
	lsr r0, r1, #0x1f
	add r0, r1, r0
	asr r1, r0, #1
	ldr r0, [sp, #0x5c]
	add r0, r0, r1
	lsl r0, r0, #0xc
	str r0, [sp, #0xac]
	b _021F06A8
_021F068E:
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0xa8]
	ldr r0, [sp, #0x5c]
	mov r1, #0x20
	sub r1, r1, r0
	lsr r0, r1, #0x1f
	add r0, r1, r0
	asr r1, r0, #1
	ldr r0, [sp, #0x5c]
	add r0, r0, r1
	lsl r0, r0, #0xc
	str r0, [sp, #0xac]
_021F06A8:
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #2
	str r0, [sp, #0x18]
	add r2, r1, #0
	mov r0, #0xc
	mul r2, r0
	ldr r0, _021F08D0 ; =0x0221BDD4
	ldr r1, [sp, #0x18]
	add r0, r0, r2
	ldr r2, [sp, #0x18]
	add r1, r0, r1
	ldrh r0, [r0, r2]
	str r0, [sp, #0x3c]
	ldrh r0, [r1, #2]
	add r1, r5, #0
	add r1, #0x40
	str r0, [sp, #0x38]
	mov r0, #2
	strb r0, [r1]
	add r0, r4, #0
	mov r1, #2
	bl ov96_021EAC0C
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x38]
	add r0, r4, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_021EAF6C
	add r0, sp, #0x64
	str r0, [sp]
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x38]
	add r0, r4, #0
	add r3, sp, #0x68
	bl ov96_021EB0A4
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r5, #0xc]
	ldr r0, [sp, #0x64]
	lsl r0, r0, #0xc
	str r0, [r5, #0x10]
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r5, #0x28]
	ldr r0, [sp, #0x64]
	lsl r0, r0, #0xc
	str r0, [r5, #0x2c]
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r5, #0x1c]
	ldr r0, [sp, #0x64]
	lsl r0, r0, #0xc
	str r0, [r5, #0x20]
	add r0, r7, #0
	bl ov96_021E5F24
	ldr r1, [sp, #0x1c]
	cmp r1, r0
	bne _021F0738
	add r0, r4, #0
	mov r1, #5
	bl ov96_021EABA8
	b _021F0740
_021F0738:
	add r0, r4, #0
	mov r1, #6
	bl ov96_021EABA8
_021F0740:
	add r0, r4, #0
	add r1, sp, #0xa8
	bl ov96_021EABF4
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F0766
	add r0, r7, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r6, #0
	bl ov96_021F0F04
_021F0766:
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #0x40]
	cmp r1, r0
	bne _021F079E
	ldr r0, [sp, #0x18]
	add r1, sp, #0xcc
	add r0, r1, r0
	add r2, r1, #0
	ldr r3, [sp, #0x68]
	ldr r1, [sp, #0x18]
	strh r3, [r2, r1]
	ldr r1, [sp, #0x64]
	strh r1, [r0, #2]
	ldr r0, [r6, #0x18]
	bl ov96_021EB5E8
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r2, _021F08D4 ; =0x00000768
	add r0, r7, #0
	ldr r2, [r6, r2]
	add r1, r4, #0
	bl ov96_021E64F8
	mov r1, #3
	bl sub_02024ADC
_021F079E:
	ldr r0, [sp, #0x44]
	add r0, r0, #1
	str r0, [sp, #0x44]
	cmp r0, #0xc
	bge _021F07AA
	b _021F05C2
_021F07AA:
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, sp, #0xcc
	str r0, [sp, #8]
	ldr r2, _021F08D4 ; =0x00000768
	ldr r3, [r6, #0x18]
	ldr r2, [r6, r2]
	add r0, r7, #0
	mov r1, #0
	bl ov96_021E634C
	add r0, sp, #0x6c
	mov r1, #0xaa
	mov r2, #1
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #0x34]
	add r0, r6, #0
	str r0, [sp, #0x30]
	add r0, #0x20
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x34]
	str r0, [sp, #0x2c]
_021F07DE:
	ldr r0, [sp, #0x34]
	mov r1, #0x72
	add r2, r6, r0
	lsl r1, r1, #4
	mov r0, #0xc
	strb r0, [r2, r1]
	ldr r0, [sp, #0x34]
	ldr r5, [sp, #0x30]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r4, #0
	str r0, [sp, #0x60]
_021F07F6:
	lsl r3, r4, #0x18
	ldr r2, [sp, #0x60]
	add r0, r7, #0
	add r1, sp, #0x6c
	lsr r3, r3, #0x18
	str r5, [sp]
	bl ov96_021F2B24
	add r0, r5, #0
	add r0, #0x28
	str r0, [sp]
	add r0, r5, #0
	add r0, #0x18
	str r0, [sp, #4]
	add r0, r5, #0
	add r0, #0x1c
	str r0, [sp, #8]
	ldr r0, [r5]
	ldr r1, [sp, #0x2c]
	add r2, r5, #0
	str r0, [sp, #0xc]
	mov r0, #0x77
	add r2, #0x8a
	lsl r0, r0, #4
	add r1, r4, r1
	lsl r1, r1, #0x18
	add r3, r5, #0
	ldrh r2, [r2]
	ldr r0, [r6, r0]
	lsr r1, r1, #0x18
	add r3, #0x8e
	bl ov96_021F33E0
	add r4, r4, #1
	add r5, #0x90
	cmp r4, #3
	blt _021F07F6
	mov r1, #0x1b
	ldr r0, [sp, #0x30]
	lsl r1, r1, #4
	add r0, r0, r1
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x2c]
	add r0, r0, #3
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x34]
	add r0, r0, #1
	str r0, [sp, #0x34]
	cmp r0, #4
	blt _021F07DE
	mov r1, #0x73
	lsl r1, r1, #4
	mov r2, #0
	strh r2, [r6, r1]
	add r0, r1, #2
	strh r2, [r6, r0]
	add r0, r1, #0
	mov r2, #0xc
	add r0, #0xa4
	str r2, [r6, r0]
	sub r0, r1, #4
	ldrh r1, [r6, r1]
	ldr r0, [r6, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021F31F0
	mov r0, #4
	str r0, [sp]
	ldr r0, _021F08D8 ; =0x04000050
	mov r1, #0
	mov r2, #1
	mov r3, #0xc
	bl sub_020CF15C
	ldr r0, _021F08DC ; =0x0000074B
	mov r1, #0xc
	strb r1, [r6, r0]
	add r0, r6, #0
	bl ov96_021F0D60
	ldr r0, _021F08E0 ; =0x00000774
	ldr r0, [r6, r0]
	bl ov96_021F424C
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	mov r0, #1
	bl sub_0203A994
	add r0, r7, #0
	bl ov96_021E5DEC
	b _021F08C4
_021F08BE:
	add sp, #0x1f8
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F08C4:
	mov r0, #0
	add sp, #0x1f8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F08CC: .word 0x0000076C
_021F08D0: .word 0x0221BDD4
_021F08D4: .word 0x00000768
_021F08D8: .word 0x04000050
_021F08DC: .word 0x0000074B
_021F08E0: .word 0x00000774
	thumb_func_end ov96_021F010C

	thumb_func_start ov96_021F08E4
ov96_021F08E4: ; 0x021F08E4
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x18]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_021F08E4

	thumb_func_start ov96_021F08F4
ov96_021F08F4: ; 0x021F08F4
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E5DC4
	add r0, r5, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_021F090E:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _021F0958 ; =0x00000125
	add r1, r6, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _021F090E
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #2
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #2
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F0958: .word 0x00000125
	thumb_func_end ov96_021F08F4

	thumb_func_start ov96_021F095C
ov96_021F095C: ; 0x021F095C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	add r0, r5, #0
	bl ov96_021E6550
	ldr r0, _021F0A40 ; =0x0000072C
	ldr r0, [r4, r0]
	bl ov96_021F30BC
	ldr r0, _021F0A44 ; =0x00000734
	ldr r0, [r4, r0]
	bl FreeToHeap
	ldr r0, [r4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #2
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #6
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #7
	bl sub_0201BB4C
	add r0, r4, #4
	bl RemoveWindow
	ldr r0, [r4]
	bl FreeToHeap
	ldr r0, [r4, #0x18]
	bl ov96_021EB21C
	ldr r0, _021F0A48 ; =0x0000076C
	ldr r0, [r4, r0]
	bl ov96_021EA894
	ldr r0, _021F0A4C ; =0x00000768
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	mov r0, #0x77
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021F3424
	ldr r0, _021F0A50 ; =0x00000774
	ldr r0, [r4, r0]
	bl ov96_021F3C38
	mov r0, #4
	bl sub_02002DB4
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	mov r0, #0x7f
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl FreeToHeap
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _021F0A54 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _021F0A58 ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x8c
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F0A40: .word 0x0000072C
_021F0A44: .word 0x00000734
_021F0A48: .word 0x0000076C
_021F0A4C: .word 0x00000768
_021F0A50: .word 0x00000774
_021F0A54: .word gMain + 0x60
_021F0A58: .word 0x04000050
	thumb_func_end ov96_021F095C

	thumb_func_start ov96_021F0A5C
ov96_021F0A5C: ; 0x021F0A5C
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021F0A78 ; =0x0221BDAC
	add r3, sp, #0
	mov r2, #5
_021F0A66:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021F0A66
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021F0A78: .word 0x0221BDAC
	thumb_func_end ov96_021F0A5C

	thumb_func_start ov96_021F0A7C
ov96_021F0A7C: ; 0x021F0A7C
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	ldrb r1, [r4]
	cmp r1, #0
	beq _021F0A98
	cmp r1, #1
	beq _021F0AA8
	cmp r1, #2
	beq _021F0AC8
	b _021F0AD8
_021F0A98:
	add r0, r5, #0
	mov r1, #0x15
	bl ov96_021E601C
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F0AD8
_021F0AA8:
	mov r1, #6
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	ldr r0, [r0, #0x14]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #2
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F0AD8
_021F0AC8:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F0AD8
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
_021F0AD8:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F0A7C

	thumb_func_start ov96_021F0AE0
ov96_021F0AE0: ; 0x021F0AE0
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _021F0AFE
	cmp r0, #1
	beq _021F0B10
	cmp r0, #2
	beq _021F0B28
	b _021F0B52
_021F0AFE:
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _021F0B52
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F0B52
_021F0B10:
	add r0, r5, #0
	bl ov96_021F1170
	add r0, r5, #0
	bl ov96_021F107C
	cmp r0, #0
	beq _021F0B52
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F0B52
_021F0B28:
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _021F0B52
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x14]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
_021F0B52:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	thumb_func_end ov96_021F0AE0

	thumb_func_start ov96_021F0B58
ov96_021F0B58: ; 0x021F0B58
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r1, #0
	str r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #4]
	ldrb r0, [r4]
	cmp r0, #0
	bne _021F0B7E
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F0B78
	mov r0, #1
	strb r0, [r4]
_021F0B78:
	add sp, #0xc
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021F0B7E:
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	beq _021F0B8E
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_021F0B8E:
	mov r0, #0
	str r0, [sp, #8]
_021F0B92:
	ldr r0, [sp, #8]
	mov r6, #0
	lsl r0, r0, #0x18
	ldr r5, [sp, #4]
	add r4, r6, #0
	lsr r7, r0, #0x18
_021F0B9E:
	add r0, r5, #0
	add r0, #0x62
	ldrh r0, [r0]
	add r1, r7, #0
	add r6, r6, r0
	lsl r2, r6, #0x10
	ldr r0, [sp]
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, #0x90
	cmp r4, #3
	blt _021F0B9E
	mov r0, #0x1b
	ldr r1, [sp, #4]
	lsl r0, r0, #4
	add r0, r1, r0
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _021F0B92
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F0B58

	thumb_func_start ov96_021F0BD4
ov96_021F0BD4: ; 0x021F0BD4
	push {r3, r4, r5, lr}
	sub sp, #0xf0
	ldr r5, _021F0D3C ; =0x0221BC7C
	add r3, sp, #0xe0
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _021F0D40 ; =0x0221BCE8
	add r3, sp, #0xc4
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _021F0D44 ; =0x0221BD04
	add r3, sp, #0xa8
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _021F0D48 ; =0x0221BD3C
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #2
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #2
	bl sub_0201CAE0
	ldr r5, _021F0D4C ; =0x0221BD58
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _021F0D50 ; =0x0221BD74
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _021F0D54 ; =0x0221BD90
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _021F0D58 ; =0x0221BCCC
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #7
	str r0, [r3]
	add r0, r4, #0
	mov r3, #1
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #7
	bl sub_0201CAE0
	ldr r5, _021F0D5C ; =0x0221BD20
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xf0
	pop {r3, r4, r5, pc}
	nop
_021F0D3C: .word 0x0221BC7C
_021F0D40: .word 0x0221BCE8
_021F0D44: .word 0x0221BD04
_021F0D48: .word 0x0221BD3C
_021F0D4C: .word 0x0221BD58
_021F0D50: .word 0x0221BD74
_021F0D54: .word 0x0221BD90
_021F0D58: .word 0x0221BCCC
_021F0D5C: .word 0x0221BD20
	thumb_func_end ov96_021F0BD4

	thumb_func_start ov96_021F0D60
ov96_021F0D60: ; 0x021F0D60
	push {r4, r5, lr}
	sub sp, #0x14
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	add r5, r0, #0
	str r3, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #9
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	mov r3, #2
	bl GfGfxLoader_LoadCharData
	mov r1, #0
	mov r0, #1
	str r1, [sp]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #0xc
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #0x16
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	mov r3, #7
	bl GfGfxLoader_LoadCharData
	mov r0, #0x80
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #0xf
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	mov r3, #6
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xa7
	bl GfGfxLoader_LoadScrnData
	ldr r0, [r5, #0x14]
	mov r1, #0xa
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, sp, #0x10
	bl GfGfxLoader_GetScrnData
	ldr r3, [sp, #0x10]
	add r4, r0, #0
	add r2, r3, #0
	ldr r0, [r5]
	ldr r3, [r3, #8]
	mov r1, #2
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	mov r2, #0
	ldr r0, [r5]
	mov r1, #2
	add r3, r2, #0
	bl sub_0201CA4C
	ldr r0, [r5]
	mov r1, #2
	bl ScheduleBgTilemapBufferTransfer
	add r0, r4, #0
	bl FreeToHeap
	ldr r0, [r5, #0x14]
	ldr r3, _021F0EF4 ; =0x00000738
	str r0, [sp]
	mov r0, #0xa7
	mov r1, #7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	ldr r1, _021F0EF8 ; =0x00000734
	str r0, [r5, r1]
	add r0, r1, #4
	ldr r3, [r5, r0]
	ldr r0, [r5]
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #1
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	ldr r0, _021F0EF4 ; =0x00000738
	mov r1, #1
	ldr r3, [r5, r0]
	mov r0, #0
	str r0, [sp]
	add r2, r3, #0
	ldr r0, [r5]
	ldr r3, [r3, #8]
	add r2, #0xc
	bl BgCopyOrUncompressTilemapBufferRangeToVram
	ldr r0, _021F0EFC ; =0x00000774
	ldr r0, [r5, r0]
	bl ov96_021F3CBC
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r5, #0x14]
	mov r2, #0
	str r0, [sp, #4]
	mov r0, #0xa7
	mov r1, #4
	add r3, r2, #0
	bl GfGfxLoader_GXLoadPal
	mov r3, #0x20
	str r3, [sp]
	ldr r0, [r5, #0x14]
	mov r1, #8
	str r0, [sp, #4]
	mov r0, #0xa7
	mov r2, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r5, #0x14]
	mov r1, #0x15
	str r0, [sp, #4]
	mov r0, #0xa7
	mov r2, #4
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r5, #0x14]
	mov r1, #0xb
	str r0, [sp, #4]
	mov r0, #0xa7
	mov r2, #4
	mov r3, #0x40
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r5, #0x14]
	mov r1, #0xe
	str r0, [sp, #4]
	mov r0, #0xa7
	mov r2, #4
	mov r3, #0x60
	bl GfGfxLoader_GXLoadPal
	mov r1, #2
	ldr r0, _021F0F00 ; =0x04000018
	lsl r1, r1, #0x16
	str r1, [r0]
	add sp, #0x14
	pop {r4, r5, pc}
	.balign 4, 0
_021F0EF4: .word 0x00000738
_021F0EF8: .word 0x00000734
_021F0EFC: .word 0x00000774
_021F0F00: .word 0x04000018
	thumb_func_end ov96_021F0D60

	thumb_func_start ov96_021F0F04
ov96_021F0F04: ; 0x021F0F04
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #0xc]
	str r0, [sp, #8]
	str r0, [sp, #4]
	add r4, r0, #0
	ldr r0, [sp]
	add r5, r1, #0
	str r0, [sp, #0x10]
	add r0, #0x20
	str r0, [sp, #0x10]
_021F0F1E:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r6, #0
	mul r2, r0
	ldr r0, [sp, #0x10]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r6, r2, r0
	ldr r1, [r6, #0x28]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, [r6, #0x2c]
	asr r2, r0, #0xc
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r3, r0, #0xc
	cmp r2, #0
	bge _021F0F5E
	mov r2, #0
	b _021F0F64
_021F0F5E:
	cmp r2, #0xff
	ble _021F0F64
	mov r2, #0xff
_021F0F64:
	cmp r3, #0
	bge _021F0F6C
	mov r3, #0
	b _021F0F72
_021F0F6C:
	cmp r3, #0xff
	ble _021F0F72
	mov r3, #0xff
_021F0F72:
	ldr r0, [r6, #0x18]
	add r7, r5, r4
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	add r0, r6, #0
	add r0, #0x40
	ldrb r0, [r0]
	add r6, #0x44
	strb r2, [r5, r4]
	lsl r2, r4, #1
	sub r0, r0, #1
	strb r3, [r7, #0xc]
	add r3, r0, #0
	lsl r3, r2
	ldr r0, [sp, #0xc]
	lsl r1, r2
	add r0, r0, r3
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r0, r0, r1
	str r0, [sp, #8]
	ldrb r0, [r6]
	add r1, r0, #0
	lsl r1, r4
	ldr r0, [sp, #4]
	add r0, r0, r1
	str r0, [sp, #4]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _021F0F1E
	ldr r0, [sp, #0xc]
	ldr r1, [sp]
	str r0, [r5, #0x18]
	ldr r0, _021F1078 ; =0x00000726
	mov r7, #0
	ldrb r1, [r1, r0]
	add r3, r0, #0
	add r3, #0xc
	lsl r2, r1, #0x18
	ldr r1, [sp, #0xc]
	add r1, r1, r2
	str r1, [r5, #0x18]
	ldr r1, [sp, #8]
	ldr r2, [sp]
	add r1, r7, r1
	str r1, [r5, #0x1c]
	ldrh r2, [r2, r3]
	add r3, r0, #0
	add r3, #0x25
	lsl r2, r2, #0x18
	add r1, r1, r2
	ldr r2, [sp]
	str r1, [r5, #0x1c]
	ldrb r2, [r2, r3]
	lsl r2, r2, #0x1c
	add r1, r1, r2
	str r1, [r5, #0x1c]
	ldr r1, [sp]
	sub r2, r0, #2
	ldrb r2, [r1, r2]
	lsl r3, r2, #2
	add r3, r1, r3
	add r1, r0, #0
	sub r1, #0x46
	ldr r1, [r3, r1]
	add r3, r2, #1
	lsr r6, r3, #0x1f
	lsl r4, r3, #0x1e
	sub r4, r4, r6
	mov r3, #0x1e
	ror r4, r3
	add r6, r6, r4
	ldr r3, [sp]
	sub r4, r0, #2
	strb r6, [r3, r4]
	ldr r3, [sp, #4]
	add r4, r0, #3
	add r6, r7, r3
	ldr r3, [sp]
	str r6, [r5, #0x20]
	ldrb r3, [r3, r4]
	add r4, r0, #0
	add r4, #0x22
	lsl r3, r3, #0xc
	add r6, r6, r3
	ldr r3, [sp]
	str r6, [r5, #0x20]
	ldrb r3, [r3, r4]
	add r4, r0, #0
	lsl r1, r1, #0x18
	lsl r3, r3, #0xd
	add r6, r6, r3
	lsr r1, r1, #0x18
	ldr r3, [sp]
	str r6, [r5, #0x20]
	add r4, #0x24
	ldrb r3, [r3, r4]
	add r4, r0, #0
	add r4, #0x26
	lsl r3, r3, #0xe
	add r6, r6, r3
	ldr r3, [sp]
	str r6, [r5, #0x20]
	ldrb r3, [r3, r4]
	lsl r1, r1, #0x12
	lsl r3, r3, #0xf
	add r3, r6, r3
	add r3, r3, r1
	lsl r1, r2, #0x1a
	add r1, r3, r1
	ldr r2, [sp]
	str r1, [r5, #0x20]
	add r3, r0, #1
	ldrb r2, [r2, r3]
	mov r3, #0xc
	lsl r2, r2, #0x1c
	add r1, r1, r2
	str r1, [r5, #0x20]
	add r2, r0, #0
	ldr r1, [sp]
	add r2, #0x22
	strb r7, [r1, r2]
	add r2, r0, #0
	add r2, #0x25
	strb r3, [r1, r2]
	add r0, #0x26
	strb r7, [r1, r0]
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F1078: .word 0x00000726
	thumb_func_end ov96_021F0F04

	thumb_func_start ov96_021F107C
ov96_021F107C: ; 0x021F107C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r7, r0, #0
	bl ov96_021E8A20
	add r6, r0, #0
	mov r0, #0
	add r7, #0xf0
	str r0, [r6]
	add r0, r7, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x20]
	mov r1, #1
	asr r0, r0, #0xc
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021F10E2
	ldr r0, [r4, #0x18]
	bl ov96_021EB63C
	ldr r0, _021F115C ; =0x0000076C
	mov r1, #1
	ldr r0, [r4, r0]
	bl ov96_021EB144
	add r0, r5, #0
	bl ov96_021E65A4
	ldr r0, _021F1160 ; =0x00000774
	ldr r0, [r4, r0]
	bl ov96_021F46B4
	add r6, r0, #0
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_021E8318
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021F2EFC
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F10E2:
	ldr r0, _021F1164 ; =0x0000072A
	ldrb r2, [r4, r0]
	cmp r2, #0
	beq _021F111A
	sub r0, r0, #3
	ldrb r0, [r4, r0]
	cmp r0, #1
	bhs _021F10F6
	mov r1, #0
	b _021F1104
_021F10F6:
	cmp r0, #3
	blo _021F1104
	cmp r0, #4
	bhs _021F1102
	mov r1, #2
	b _021F1104
_021F1102:
	mov r1, #3
_021F1104:
	ldr r0, _021F1168 ; =0x00000732
	ldrh r0, [r4, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl ov96_021F30F8
	ldr r1, _021F1168 ; =0x00000732
	strh r0, [r4, r1]
	mov r0, #0
	sub r1, #8
	strb r0, [r4, r1]
_021F111A:
	bl sub_02025358
	cmp r0, #0
	beq _021F113C
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_021F113C:
	bl sub_0202534C
	cmp r0, #0
	beq _021F1152
	ldr r0, _021F116C ; =gMain + 0x40
	ldrh r1, [r0, #0x20]
	strb r1, [r6, #4]
	ldrh r0, [r0, #0x22]
	strb r0, [r6, #5]
	mov r0, #1
	str r0, [r6]
_021F1152:
	add r0, r5, #0
	bl ov96_021F1614
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F115C: .word 0x0000076C
_021F1160: .word 0x00000774
_021F1164: .word 0x0000072A
_021F1168: .word 0x00000732
_021F116C: .word gMain + 0x40
	thumb_func_end ov96_021F107C

	thumb_func_start ov96_021F1170
ov96_021F1170: ; 0x021F1170
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	str r0, [sp, #4]
	bl ov96_021E5F54
	str r0, [sp, #0x14]
	ldr r0, [sp, #4]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #4]
	bl ov96_021E5F24
	cmp r0, #0
	beq _021F1190
	b _021F160A
_021F1190:
	ldr r0, [sp, #0x14]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0x1c]
	ldr r0, _021F146C ; =0x000007EC
	ldr r1, [r4, r0]
	cmp r1, #1
	bne _021F11EA
	ldr r0, [sp, #4]
	mov r6, #0
	bl ov96_021E5D34
	add r7, r6, #0
	str r0, [sp, #0x10]
	cmp r0, #0
	ble _021F11D2
	ldr r5, [sp, #0x14]
	add r5, #0x50
_021F11B6:
	add r0, r5, #0
	bl ov96_021E8A20
	ldrb r0, [r0, #8]
	cmp r0, #0
	beq _021F11C8
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
_021F11C8:
	ldr r0, [sp, #0x10]
	add r7, r7, #1
	add r5, #0x28
	cmp r7, r0
	blt _021F11B6
_021F11D2:
	ldr r0, [sp, #0x10]
	cmp r6, r0
	bne _021F1216
	ldr r1, _021F1470 ; =0x00000726
	mov r2, #0
	add r0, r1, #0
	strb r2, [r4, r1]
	add r0, #0x24
	strb r2, [r4, r0]
	add r1, #0xc6
	str r2, [r4, r1]
	b _021F13DC
_021F11EA:
	add r1, r0, #0
	sub r1, #0xc4
	ldrb r1, [r4, r1]
	cmp r1, #0
	beq _021F122E
	add r1, r0, #0
	sub r1, #0xc4
	ldrb r1, [r4, r1]
	sub r2, r1, #1
	add r1, r0, #0
	sub r1, #0xc4
	strb r2, [r4, r1]
	add r1, r0, #0
	sub r1, #0xc4
	ldrb r1, [r4, r1]
	cmp r1, #0
	bne _021F1212
	mov r1, #1
	str r1, [r4, r0]
	b _021F13DC
_021F1212:
	cmp r1, #0x3c
	beq _021F1218
_021F1216:
	b _021F13DC
_021F1218:
	add r1, r0, #0
	mov r2, #1
	sub r1, #0xc2
	strb r2, [r4, r1]
	add r1, r0, #0
	sub r1, #0xc5
	ldrb r1, [r4, r1]
	sub r0, #0xc5
	add r1, r1, #1
	strb r1, [r4, r0]
	b _021F13DC
_021F122E:
	add r1, r0, #0
	sub r1, #0xa2
	ldrb r1, [r4, r1]
	cmp r1, #0
	beq _021F1310
	add r1, r0, #0
	mov r2, #0x2c
	sub r1, #0xc6
	strb r2, [r4, r1]
	add r1, r0, #0
	sub r1, #0xa3
	ldrb r1, [r4, r1]
	cmp r1, #0
	bne _021F1302
	add r1, r0, #0
	sub r1, #0x9f
	ldrb r1, [r4, r1]
	cmp r1, #0
	bne _021F12F4
	add r1, r0, #0
	sub r1, #0x9d
	ldrb r2, [r4, r1]
	add r1, r0, #0
	sub r1, #0x9e
	ldrb r1, [r4, r1]
	cmp r2, r1
	blo _021F1272
	add r0, r4, #0
	bl ov96_021F2A00
	ldr r0, _021F1474 ; =0x00000728
	mov r1, #0x5a
	strb r1, [r4, r0]
	b _021F13DC
_021F1272:
	add r1, r0, #0
	add r2, r4, r2
	sub r1, #0x9c
	ldrb r2, [r2, r1]
	add r1, r0, #0
	sub r1, #0xa1
	strb r2, [r4, r1]
	add r1, r0, #0
	sub r1, #0x9d
	ldrb r1, [r4, r1]
	sub r0, #0x90
	add r1, r4, r1
	ldrb r0, [r1, r0]
	bl ov96_021F32C4
	ldr r1, _021F1478 ; =0x0000074C
	strb r0, [r4, r1]
	sub r0, r1, #1
	ldrb r0, [r4, r0]
	mov r1, #3
	bl _s32_div_f
	mov r1, #0x6e
	lsl r0, r0, #0x18
	lsl r1, r1, #4
	lsr r7, r0, #0x18
	add r0, r1, #0
	add r0, #0x6f
	ldrb r0, [r4, r0]
	add r6, r4, r1
	lsl r5, r7, #2
	add r2, r4, r0
	add r0, r1, #0
	add r0, #0x7c
	ldrb r0, [r2, r0]
	ldr r3, [r6, r5]
	add r0, r3, r0
	str r0, [r6, r5]
	add r0, r1, #0
	add r0, #0x6f
	ldrb r0, [r4, r0]
	add r2, r0, #1
	add r0, r1, #0
	add r0, #0x6f
	strb r2, [r4, r0]
	add r0, r1, #0
	mov r2, #6
	add r0, #0x6d
	add r1, #0x6b
	strb r2, [r4, r0]
	ldrb r0, [r4, r1]
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	add r1, r7, #0
	lsr r2, r2, #0x18
	mov r3, #3
	bl ov96_021E8228
	b _021F13DC
_021F12F4:
	add r1, r0, #0
	sub r1, #0x9f
	ldrb r1, [r4, r1]
	sub r0, #0x9f
	sub r1, r1, #1
	strb r1, [r4, r0]
	b _021F13DC
_021F1302:
	add r1, r0, #0
	sub r1, #0xa3
	ldrb r1, [r4, r1]
	sub r0, #0xa3
	sub r1, r1, #1
	strb r1, [r4, r0]
	b _021F13DC
_021F1310:
	sub r0, #0xc5
	ldrb r0, [r4, r0]
	cmp r0, #1
	bhs _021F131C
	mov r2, #8
	b _021F1326
_021F131C:
	cmp r0, #3
	bhs _021F1324
	mov r2, #6
	b _021F1326
_021F1324:
	mov r2, #4
_021F1326:
	ldr r0, _021F147C ; =0x00000725
	ldrb r1, [r4, r0]
	add r1, r1, #1
	strb r1, [r4, r0]
	ldrb r1, [r4, r0]
	cmp r1, r2
	blt _021F13DC
	mov r1, #0
	strb r1, [r4, r0]
	add r2, r0, #1
	ldrb r2, [r4, r2]
	add r3, r2, #1
	add r2, r0, #1
	strb r3, [r4, r2]
	ldrb r2, [r4, r2]
	cmp r2, #0x2b
	blo _021F13DC
	mov r3, #1
	add r2, r0, #6
	strb r3, [r4, r2]
	add r2, r0, #0
	add r2, #0x23
	strb r3, [r4, r2]
	add r2, r0, #0
	add r2, #0x25
	strb r3, [r4, r2]
	mov r2, #0x14
	add r0, #0x24
	strb r2, [r4, r0]
	mov r0, #0x72
	mov r3, #0xc
	lsl r0, r0, #4
_021F1366:
	add r2, r4, r1
	add r1, r1, #1
	strb r3, [r2, r0]
	cmp r1, #4
	blt _021F1366
	add r0, r4, #0
	mov r5, #0
	str r0, [sp, #0x20]
	add r0, #0x20
	str r0, [sp, #0x20]
	add r7, r5, #0
_021F137C:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r6, #0
	mul r2, r0
	ldr r0, [sp, #0x20]
	add r5, r5, #1
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r6, r2, r0
	add r3, r6, #0
	add r3, #0x28
	add r2, r6, #0
	ldmia r3!, {r0, r1}
	add r2, #0x1c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	str r7, [r6, #0x34]
	add r0, r6, #0
	str r7, [r6, #0x38]
	add r0, #0x8c
	ldrh r1, [r0]
	add r0, r6, #0
	add r0, #0x8e
	strh r1, [r0]
	add r0, r6, #0
	add r0, #0x44
	strb r7, [r0]
	add r0, r6, #0
	add r0, #0x45
	strb r7, [r0]
	add r0, r6, #0
	add r0, #0x46
	add r6, #0x47
	strb r7, [r0]
	strb r7, [r6]
	cmp r5, #0xc
	blt _021F137C
_021F13DC:
	ldr r0, _021F1480 ; =0x00000727
	ldrb r1, [r4, r0]
	cmp r1, #6
	blo _021F13E8
	mov r1, #1
	b _021F13EA
_021F13E8:
	mov r1, #0
_021F13EA:
	add r0, r0, #2
	strb r1, [r4, r0]
	ldr r0, [sp, #0x14]
	add r0, #0x50
	bl ov96_021E8A20
	add r5, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_021F1402:
	ldmia r3!, {r0, r1}
	stmia r5!, {r0, r1}
	sub r2, r2, #1
	bne _021F1402
	ldr r0, [r3]
	str r0, [r5]
	ldr r0, _021F1484 ; =0x0000074A
	ldrb r0, [r4, r0]
	cmp r0, #0
	beq _021F1418
	b _021F15F0
_021F1418:
	ldr r0, [sp, #0x14]
	add r7, r4, #0
	add r0, #0x50
	mov r6, #0
	str r0, [sp, #0x14]
	add r5, r4, #0
	add r7, #0x20
_021F1426:
	ldr r0, [sp, #0x14]
	bl ov96_021E8A20
	str r0, [sp, #0x18]
	ldr r0, [r0]
	cmp r0, #0
	beq _021F148C
	mov r0, #0x6f
	lsl r0, r0, #4
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _021F1450
	add r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021F1450
	mov r0, #0x6f
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r5, r0]
	b _021F1498
_021F1450:
	cmp r1, #0
	bne _021F1498
	ldr r0, _021F1488 ; =0x000006F4
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _021F1498
	mov r0, #0x6f
	mov r1, #1
	lsl r0, r0, #4
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
	b _021F1498
	nop
_021F146C: .word 0x000007EC
_021F1470: .word 0x00000726
_021F1474: .word 0x00000728
_021F1478: .word 0x0000074C
_021F147C: .word 0x00000725
_021F1480: .word 0x00000727
_021F1484: .word 0x0000074A
_021F1488: .word 0x000006F4
_021F148C:
	mov r0, #0x6f
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
_021F1498:
	mov r0, #0x6f
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021F14EE
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021F2A84
	cmp r0, #0
	bne _021F157E
	ldr r2, [sp, #0x18]
	ldr r3, [sp, #0x18]
	ldrb r2, [r2, #4]
	lsl r1, r6, #0x18
	ldrb r3, [r3, #5]
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_021F20C4
	str r0, [sp, #0x24]
	cmp r0, #0xc
	beq _021F157E
	mov r1, #3
	bl _s32_div_f
	add r3, r1, #0
	mov r0, #0x90
	mul r3, r0
	mov r0, #0x72
	ldr r1, [sp, #0x24]
	add r2, r4, r6
	lsl r0, r0, #4
	strb r1, [r2, r0]
	add r1, r7, r3
	add r1, #0x46
	mov r0, #2
	strb r0, [r1]
	add r1, r7, r3
	add r1, #0x47
	mov r0, #3
	strb r0, [r1]
	b _021F157E
_021F14EE:
	ldr r0, _021F1610 ; =0x000006F4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021F156A
	mov r0, #0x72
	add r1, r4, r6
	lsl r0, r0, #4
	ldrb r0, [r1, r0]
	str r1, [sp, #0xc]
	cmp r0, #0xc
	beq _021F157E
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x90
	mul r0, r1
	str r0, [sp, #0x28]
	add r0, r7, r0
	str r0, [sp, #8]
	add r0, #0x1c
	str r0, [sp]
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #8]
	ldrb r0, [r0, #4]
	ldrb r1, [r1, #5]
	add r2, #0x28
	mov r3, #0
	bl ov96_021F208C
	ldr r0, [sp, #0x28]
	ldr r1, [sp, #8]
	ldr r2, [sp, #8]
	ldr r0, [r7, r0]
	ldr r1, [r1, #0x1c]
	ldr r2, [r2, #0x20]
	bl ov96_021F2F7C
	cmp r0, #0
	beq _021F1556
	mov r0, #0x72
	ldr r1, [sp, #0xc]
	lsl r0, r0, #4
	ldrb r0, [r1, r0]
	mov r1, #1
	add r2, r4, r0
	mov r0, #0x7e
	lsl r0, r0, #4
	strb r1, [r2, r0]
	b _021F157E
_021F1556:
	mov r0, #0x72
	ldr r1, [sp, #0xc]
	lsl r0, r0, #4
	ldrb r0, [r1, r0]
	mov r1, #0
	add r2, r4, r0
	mov r0, #0x7e
	lsl r0, r0, #4
	strb r1, [r2, r0]
	b _021F157E
_021F156A:
	mov r1, #0x72
	add r0, r4, r6
	lsl r1, r1, #4
	ldrb r1, [r0, r1]
	cmp r1, #0xc
	beq _021F157E
	mov r1, #0x72
	mov r2, #0xc
	lsl r1, r1, #4
	strb r2, [r0, r1]
_021F157E:
	ldr r0, [sp, #0x14]
	add r6, r6, #1
	add r0, #0x28
	str r0, [sp, #0x14]
	mov r0, #0x1b
	lsl r0, r0, #4
	add r5, #0xc
	add r7, r7, r0
	cmp r6, #4
	bge _021F1594
	b _021F1426
_021F1594:
	mov r1, #0x77
	lsl r1, r1, #4
	ldr r0, [r4, r1]
	sub r1, #0x3e
	ldrh r1, [r4, r1]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021F342C
	add r6, r0, #0
	cmp r6, #0xc
	beq _021F15F0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	ldr r0, [sp, #4]
	bl ov96_021E5D34
	cmp r5, r0
	blo _021F15EC
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	add r2, r4, #0
	lsl r0, r0, #4
	add r2, #0x20
	mul r0, r5
	add r0, r2, r0
	mov r2, #0x90
	add r3, r1, #0
	mul r3, r2
	add r1, r0, r3
	add r0, r0, r3
	mov r2, #2
	add r1, #0x46
	strb r2, [r1]
	mov r1, #3
	add r0, #0x47
	strb r1, [r0]
	b _021F15F0
_021F15EC:
	bl GF_AssertFail
_021F15F0:
	ldr r0, [sp, #4]
	bl ov96_021F1CC0
	add r0, r4, #0
	bl ov96_021F21EC
	add r0, r4, #0
	bl ov96_021F2834
	ldr r1, [sp, #0x1c]
	add r0, r4, #0
	bl ov96_021F0F04
_021F160A:
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	nop
_021F1610: .word 0x000006F4
	thumb_func_end ov96_021F1170

	thumb_func_start ov96_021F1614
ov96_021F1614: ; 0x021F1614
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x138
	str r0, [sp, #0xc]
	bl ov96_021E5DC4
	add r6, r0, #0
	ldr r0, [sp, #0xc]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #0x4c]
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x4c]
	mov r1, #0xf
	ldr r2, [r0, #0x1c]
	asr r0, r2, #0x1c
	and r0, r1
	str r0, [sp, #0x64]
	asr r0, r2, #0x18
	add r5, r0, #0
	ldr r0, [sp, #0x4c]
	and r5, r1
	ldr r0, [r0, #0x18]
	asr r0, r0, #0x18
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [sp, #0x4c]
	ldr r2, [r0, #0x20]
	mov r0, #1
	asr r3, r2, #0xd
	and r3, r0
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	str r3, [sp, #0x60]
	asr r3, r2, #0xe
	and r0, r3
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x5c]
	asr r3, r2, #0xf
	mov r0, #7
	and r0, r3
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x28]
	asr r3, r2, #0x1a
	mov r0, #3
	and r0, r3
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x58]
	asr r0, r2, #0x12
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x54]
	asr r0, r2, #0x1c
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x50]
	ldr r0, [sp, #0x5c]
	cmp r0, #0
	bne _021F16B4
	ldr r0, [sp, #0xc]
	bl ov96_021E5F54
	bl ov96_021E8A20
	mov r1, #0
	strb r1, [r0, #8]
_021F16B4:
	mov r0, #0x73
	lsl r0, r0, #4
	ldrh r1, [r6, r0]
	lsl r2, r5, #0x18
	lsr r7, r2, #0x18
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r7
	beq _021F16E4
	mov r5, #0
	strh r7, [r6, r0]
	add r3, r5, #0
	add r0, #0xc
_021F16CE:
	add r2, r6, r5
	add r5, r5, #1
	strb r3, [r2, r0]
	cmp r5, #0xc
	blt _021F16CE
	ldr r0, _021F19E8 ; =0x000007AC
	ldr r3, [sp, #0xc]
	add r0, r6, r0
	add r2, r7, #0
	bl ov96_021F2B68
_021F16E4:
	cmp r4, #0
	bne _021F170A
	ldr r0, _021F19EC ; =0x00000738
	mov r1, #1
	ldr r3, [r6, r0]
	ldr r0, [r6]
	add r2, r3, #0
	ldr r3, [r3, #8]
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	ldr r0, [r6]
	mov r1, #1
	bl ScheduleBgTilemapBufferTransfer
	ldr r0, _021F19F0 ; =0x000007A8
	mov r1, #0
	str r1, [r6, r0]
	b _021F1796
_021F170A:
	cmp r4, #0x2b
	bhs _021F1766
	ldr r0, _021F19F0 ; =0x000007A8
	ldr r1, [r6, r0]
	cmp r1, #0
	bne _021F175C
	ldr r1, [sp, #0x50]
	cmp r1, #1
	bhi _021F172E
	cmp r4, #0x20
	blo _021F172E
	sub r0, #0xd1
	bl PlaySE
	ldr r0, _021F19F0 ; =0x000007A8
	mov r1, #1
	str r1, [r6, r0]
	b _021F175C
_021F172E:
	ldr r0, [sp, #0x50]
	cmp r0, #1
	bls _021F1746
	cmp r4, #0x1c
	blo _021F1746
	ldr r0, _021F19F4 ; =0x000006D7
	bl PlaySE
	ldr r0, _021F19F0 ; =0x000007A8
	mov r1, #1
	str r1, [r6, r0]
	b _021F175C
_021F1746:
	ldr r0, [sp, #0x50]
	cmp r0, #3
	bls _021F175C
	cmp r4, #0x15
	blo _021F175C
	ldr r0, _021F19F4 ; =0x000006D7
	bl PlaySE
	ldr r0, _021F19F0 ; =0x000007A8
	mov r1, #1
	str r1, [r6, r0]
_021F175C:
	ldr r1, [r6]
	add r0, r4, #0
	bl ov96_021F295C
	b _021F1796
_021F1766:
	ldr r3, _021F19F8 ; =0x0221BC8C
	add r2, sp, #0x11c
	mov r1, #8
_021F176C:
	ldrh r0, [r3]
	add r3, r3, #2
	strh r0, [r2]
	add r2, r2, #2
	sub r1, r1, #1
	bne _021F176C
	mov r1, #2
	str r1, [sp]
	mov r0, #4
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r6]
	mov r1, #1
	add r2, sp, #0x11c
	mov r3, #0xe
	bl sub_0201C4C4
	ldr r1, [r6]
	mov r0, #0x2a
	bl ov96_021F295C
_021F1796:
	ldr r0, [sp, #0x60]
	cmp r0, #0
	beq _021F17A2
	ldr r0, _021F19FC ; =0x000008CF
	bl PlaySE
_021F17A2:
	ldr r0, _021F1A00 ; =0x00000774
	ldr r1, [sp, #0x50]
	ldr r0, [r6, r0]
	bl ov96_021F4364
	add r0, sp, #0x12c
	ldr r3, _021F1A04 ; =0x0221BC9C
	str r0, [sp, #0x30]
	add r2, sp, #0xa4
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021F1A08 ; =0x0221BCB4
	mov r5, #0
	add r2, sp, #0x8c
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	add r0, r6, #0
	str r0, [sp, #0x68]
	add r0, #0x20
	str r5, [sp, #0x34]
	add r7, r6, #0
	str r0, [sp, #0x68]
_021F17DE:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x14]
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0x1b
	lsl r1, r1, #4
	str r0, [sp, #0x24]
	mul r1, r0
	ldr r0, [sp, #0x68]
	ldr r2, [sp, #0x14]
	add r0, r0, r1
	mov r1, #0x90
	mul r1, r2
	add r4, r0, r1
	ldr r0, [r0, r1]
	bl ov96_021EAA20
	bl ov96_021E8BAC
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0x4c]
	ldr r1, [r0, #0x1c]
	ldr r0, [sp, #0x34]
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x4c]
	ldr r0, [r0, #0x20]
	add r1, r0, #0
	asr r1, r5
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x44]
	cmp r0, #0
	beq _021F183C
	b _021F194A
_021F183C:
	mov r0, #0
	str r0, [sp, #0x38]
	ldr r0, _021F1A0C ; =0x00000778
	ldrh r0, [r7, r0]
	cmp r0, #0
	bne _021F1850
	ldr r0, _021F1A0C ; =0x00000778
	mov r1, #1
	strh r1, [r7, r0]
	b _021F191A
_021F1850:
	cmp r0, #1
	bne _021F1912
	add r2, sp, #0xa4
	add r3, sp, #0xf8
	mov ip, r3
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	add r2, sp, #0x8c
	add r3, sp, #0xe0
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r1, _021F1A10 ; =0x0000077A
	mov r2, ip
	ldrh r1, [r7, r1]
	ldr r0, _021F1A14 ; =0x45800000
	lsr r1, r1, #1
	lsl r1, r1, #2
	ldr r1, [r2, r1]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x110]
	ldr r1, _021F1A10 ; =0x0000077A
	ldr r0, _021F1A14 ; =0x45800000
	ldrh r1, [r7, r1]
	lsr r1, r1, #1
	lsl r2, r1, #2
	add r1, sp, #0xf8
	ldr r1, [r1, r2]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x114]
	ldr r1, _021F1A10 ; =0x0000077A
	ldr r0, _021F1A14 ; =0x45800000
	ldrh r1, [r7, r1]
	lsr r1, r1, #1
	lsl r2, r1, #2
	add r1, sp, #0xf8
	ldr r1, [r1, r2]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x118]
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x4c]
	add r2, r0, r5
	add r0, sp, #0x84
	str r0, [sp]
	ldrb r1, [r1, r5]
	ldrb r2, [r2, #0xc]
	ldr r0, [r4]
	add r3, sp, #0x88
	bl ov96_021EB06C
	ldr r0, [sp, #0x84]
	cmp r0, #0xb0
	blt _021F18E8
	ldr r0, _021F1A10 ; =0x0000077A
	ldrh r0, [r7, r0]
	lsr r0, r0, #1
	lsl r1, r0, #2
	add r0, sp, #0xe0
	ldr r0, [r0, r1]
	str r0, [sp, #0x38]
_021F18E8:
	ldr r0, _021F1A10 ; =0x0000077A
	ldrh r0, [r7, r0]
	add r1, r0, #1
	ldr r0, _021F1A10 ; =0x0000077A
	strh r1, [r7, r0]
	ldr r0, [r4]
	mov r1, #1
	bl ov96_021EABE0
	ldr r0, [sp, #0x3c]
	add r1, sp, #0x110
	bl sub_020247F4
	ldr r0, _021F1A10 ; =0x0000077A
	ldrh r0, [r7, r0]
	cmp r0, #0xc
	blo _021F191A
	ldr r0, _021F1A0C ; =0x00000778
	mov r1, #2
	strh r1, [r7, r0]
	b _021F191A
_021F1912:
	ldr r0, [r4]
	mov r1, #0
	bl ov96_021EAB38
_021F191A:
	ldr r0, [r4, #8]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r4]
	mov r1, #0
	bl ov96_021EAB74
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x4c]
	add r2, r0, r5
	ldrb r3, [r2, #0xc]
	ldr r2, [sp, #0x38]
	ldrb r1, [r1, r5]
	add r2, r2, r3
	ldr r0, [r4]
	mov r3, #1
	bl ov96_021EB01C
	ldr r0, [sp, #0x30]
	mov r1, #1
	strb r1, [r0]
	b _021F1C52
_021F194A:
	ldr r0, _021F1A0C ; =0x00000778
	mov r1, #0
	strh r1, [r7, r0]
	add r0, r0, #2
	strh r1, [r7, r0]
	mov r0, #1
	lsl r0, r0, #0xc
	str r0, [sp, #0xd4]
	str r0, [sp, #0xd8]
	str r0, [sp, #0xdc]
	ldr r0, [r4]
	bl ov96_021EABE0
	ldr r0, [sp, #0x40]
	cmp r0, #0
	ldr r0, [r4, #8]
	beq _021F1992
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x2c]
	cmp r1, r0
	bne _021F199A
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _021F199A
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
	b _021F199A
_021F1992:
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_021F199A:
	ldr r0, [sp, #0x3c]
	add r1, sp, #0xd4
	bl sub_020247F4
	ldr r0, [r4]
	mov r1, #1
	bl ov96_021EAB38
	ldr r0, [sp, #0x44]
	cmp r0, #2
	bne _021F19D4
	ldr r1, _021F1A18 ; =0x0000073C
	add r0, r6, r5
	ldrb r1, [r0, r1]
	cmp r1, #0
	bne _021F19D4
	ldr r1, _021F1A18 ; =0x0000073C
	mov r2, #1
	strb r2, [r0, r1]
	add r0, r1, #0
	add r0, #0x30
	lsl r1, r5, #0x18
	add r3, r4, #0
	ldr r0, [r6, r0]
	lsr r1, r1, #0x18
	add r3, #0x68
	bl ov96_021EAF60
	b _021F1A34
_021F19D4:
	ldr r0, [sp, #0x44]
	cmp r0, #1
	bne _021F1A34
	ldr r1, _021F1A18 ; =0x0000073C
	add r0, r6, r5
	ldrb r1, [r0, r1]
	cmp r1, #1
	bne _021F1A34
	ldr r1, _021F1A18 ; =0x0000073C
	b _021F1A1C
	.balign 4, 0
_021F19E8: .word 0x000007AC
_021F19EC: .word 0x00000738
_021F19F0: .word 0x000007A8
_021F19F4: .word 0x000006D7
_021F19F8: .word 0x0221BC8C
_021F19FC: .word 0x000008CF
_021F1A00: .word 0x00000774
_021F1A04: .word 0x0221BC9C
_021F1A08: .word 0x0221BCB4
_021F1A0C: .word 0x00000778
_021F1A10: .word 0x0000077A
_021F1A14: .word 0x45800000
_021F1A18: .word 0x0000073C
_021F1A1C:
	mov r2, #0
	strb r2, [r0, r1]
	add r0, r1, #0
	add r0, #0x30
	lsl r1, r5, #0x18
	add r3, r4, #0
	ldr r0, [r6, r0]
	lsr r1, r1, #0x18
	mov r2, #1
	add r3, #0x48
	bl ov96_021EAF60
_021F1A34:
	ldr r0, [sp, #0x30]
	mov r1, #0
	strb r1, [r0]
	ldr r0, [sp, #0x4c]
	add r1, r0, r5
	ldrb r0, [r0, r5]
	str r0, [sp, #0x18]
	ldrb r0, [r1, #0xc]
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x4c]
	ldr r1, [r0, #0x18]
	ldr r0, [sp, #0x34]
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x18]
	mov r1, #0
	lsl r0, r0, #0xc
	str r0, [r4, #0xc]
	ldr r0, [sp, #0x1c]
	lsl r0, r0, #0xc
	str r0, [r4, #0x10]
	add r0, sp, #0xc8
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r4, #0xc]
	str r0, [sp, #0xc8]
	ldr r0, [r4, #0x10]
	str r0, [sp, #0xcc]
	ldr r0, [r4, #4]
	bl ov96_021EB5B8
	add r1, sp, #0xc8
	bl sub_020247D4
	mov r1, #0
	add r0, sp, #0xbc
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r4, #0xc]
	mov r1, #3
	str r0, [sp, #0xbc]
	ldr r0, [r4, #0x10]
	str r0, [sp, #0xc0]
	add r0, r5, #0
	bl _s32_div_f
	str r1, [sp, #0x10]
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r1, r0, #0
	ldr r0, [sp, #0xc]
	ldr r2, [sp, #0x10]
	bl ov96_021E60C0
	ldrb r0, [r0, #7]
	cmp r0, #1
	beq _021F1AC0
	cmp r0, #2
	beq _021F1ACC
	cmp r0, #3
	beq _021F1AD8
	b _021F1AE4
_021F1AC0:
	mov r0, #2
	ldr r1, [sp, #0xc0]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0xc0]
	b _021F1AE8
_021F1ACC:
	mov r0, #2
	ldr r1, [sp, #0xc0]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0xc0]
	b _021F1AE8
_021F1AD8:
	mov r0, #1
	ldr r1, [sp, #0xc0]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0xc0]
	b _021F1AE8
_021F1AE4:
	bl GF_AssertFail
_021F1AE8:
	ldr r0, [r4, #8]
	bl ov96_021EB5B8
	add r1, sp, #0xbc
	bl sub_020247D4
	ldr r0, _021F1CA4 ; =0x0000076C
	lsl r1, r5, #0x18
	ldr r0, [r6, r0]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	ldr r1, [sp, #0x48]
	str r0, [sp, #0x6c]
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp, #0x20]
	bl ov96_021EAC0C
	ldr r0, [sp, #0x6c]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x1c]
	mov r3, #1
	bl ov96_021EB01C
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x2c]
	cmp r1, r0
	bne _021F1B48
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x2c]
	ldr r2, [sp, #0x10]
	bl ov96_021E60D8
	ldrb r0, [r0, #2]
	cmp r0, #0
	beq _021F1B48
	mov r0, #0
	mov r2, #0x7d
	str r0, [sp]
	lsl r2, r2, #4
	ldrsh r2, [r6, r2]
	ldr r0, [sp, #0x6c]
	ldr r3, [sp, #0x20]
	mov r1, #0
	bl ov96_021EAED4
_021F1B48:
	ldr r0, [sp, #0x5c]
	cmp r0, #0
	beq _021F1B80
	ldr r0, _021F1CA4 ; =0x0000076C
	lsl r1, r5, #0x18
	ldr r0, [r6, r0]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	str r0, [sp, #0x70]
	ldr r0, [sp, #0x3c]
	mov r1, #0
	bl sub_0202484C
	lsl r3, r5, #0x18
	ldr r0, _021F1CA8 ; =0x000007AF
	mov r1, #1
	strb r1, [r6, r0]
	ldr r0, [sp, #0x20]
	ldr r1, _021F1CAC ; =0x000007AC
	str r0, [sp]
	ldr r0, [sp, #0xc]
	ldr r2, [sp, #0x70]
	add r1, r6, r1
	lsr r3, r3, #0x18
	bl ov96_021F2E80
	b _021F1B88
_021F1B80:
	ldr r0, [sp, #0x3c]
	mov r1, #1
	bl sub_0202484C
_021F1B88:
	ldr r0, [sp, #0x64]
	cmp r0, r5
	bne _021F1BF6
	ldr r0, [sp, #0x28]
	cmp r0, #1
	blo _021F1BF2
	cmp r0, #4
	bhi _021F1BF2
	ldr r0, [r4, #4]
	bl ov96_021EB5B8
	str r0, [sp, #0x74]
	mov r1, #1
	ldr r0, [r4, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, [sp, #0x28]
	ldr r0, [sp, #0x74]
	add r1, r1, #2
	bl sub_020248F0
	ldr r0, [sp, #0x28]
	cmp r0, #2
	bhi _021F1BC2
	ldr r0, _021F1CB0 ; =0x0000088D
	bl PlaySE
	b _021F1BD4
_021F1BC2:
	cmp r0, #3
	bne _021F1BCE
	ldr r0, _021F1CB4 ; =0x0000088E
	bl PlaySE
	b _021F1BD4
_021F1BCE:
	ldr r0, _021F1CB8 ; =0x0000088F
	bl PlaySE
_021F1BD4:
	ldr r0, _021F1CBC ; =0x00000774
	ldr r1, [sp, #0x24]
	ldr r0, [r6, r0]
	lsl r1, r1, #0x18
	ldr r2, [sp, #0x28]
	lsr r1, r1, #0x18
	bl ov96_021F4390
	ldr r0, _021F1CAC ; =0x000007AC
	lsl r1, r5, #0x18
	add r0, r6, r0
	lsr r1, r1, #0x18
	bl ov96_021F2E2C
	b _021F1BF6
_021F1BF2:
	bl GF_AssertFail
_021F1BF6:
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x2c]
	cmp r1, r0
	bne _021F1C52
	add r0, sp, #0x7c
	str r0, [sp]
	ldr r0, [r4]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x1c]
	add r3, sp, #0x80
	bl ov96_021EB06C
	ldr r0, [sp, #0x44]
	cmp r0, #1
	bne _021F1C44
	mov r0, #0x73
	lsl r0, r0, #4
	ldrh r0, [r6, r0]
	ldr r1, [sp, #0x80]
	ldr r2, [sp, #0x7c]
	lsl r0, r0, #0x18
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	lsr r0, r0, #0x18
	lsr r1, r1, #0x10
	lsr r2, r2, #0x10
	add r3, sp, #0x78
	bl ov96_021F3180
	cmp r0, #0
	beq _021F1C44
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0xc]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	mov r2, #1
	bl ov96_021E658C
	b _021F1C52
_021F1C44:
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0xc]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_021E658C
_021F1C52:
	ldr r0, [sp, #0x34]
	add r5, r5, #1
	add r0, r0, #2
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x30]
	add r7, r7, #4
	add r0, r0, #1
	str r0, [sp, #0x30]
	cmp r5, #0xc
	bge _021F1C68
	b _021F17DE
_021F1C68:
	ldr r1, [sp, #0x4c]
	add r0, r6, #0
	bl ov96_021F2FEC
	ldr r1, _021F1CA8 ; =0x000007AF
	ldrb r0, [r6, r1]
	cmp r0, #0
	beq _021F1C86
	ldr r0, [sp, #0x5c]
	cmp r0, #0
	bne _021F1C86
	sub r0, r1, #3
	add r0, r6, r0
	bl ov96_021F2D98
_021F1C86:
	ldr r0, _021F1CBC ; =0x00000774
	ldr r1, [sp, #0x54]
	ldr r0, [r6, r0]
	ldr r2, [sp, #0x58]
	bl ov96_021F4688
	ldr r0, _021F1CBC ; =0x00000774
	ldr r1, [sp, #0x5c]
	ldr r0, [r6, r0]
	add r2, sp, #0x12c
	bl ov96_021F45F4
	add sp, #0x138
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F1CA4: .word 0x0000076C
_021F1CA8: .word 0x000007AF
_021F1CAC: .word 0x000007AC
_021F1CB0: .word 0x0000088D
_021F1CB4: .word 0x0000088E
_021F1CB8: .word 0x0000088F
_021F1CBC: .word 0x00000774
	thumb_func_end ov96_021F1614

	thumb_func_start ov96_021F1CC0
ov96_021F1CC0: ; 0x021F1CC0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x80
	str r0, [sp, #4]
	bl ov96_021E5DC4
	str r0, [sp, #0xc]
	str r0, [sp, #0x10]
	add r0, #0x20
	mov r6, #0
	str r0, [sp, #0x10]
_021F1CD4:
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r1, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	mov r0, #0x1b
	lsl r0, r0, #4
	add r1, r7, #0
	mul r1, r0
	ldr r0, [sp, #0x10]
	add r1, r0, r1
	mov r0, #0x90
	mul r0, r5
	add r4, r1, r0
	add r0, r4, #0
	add r0, #0x46
	ldrb r0, [r0]
	cmp r0, #0
	beq _021F1D20
	mov r0, #0x47
	ldrsb r0, [r4, r0]
	sub r1, r0, #1
	add r0, r4, #0
	add r0, #0x47
	strb r1, [r0]
	mov r0, #0x47
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _021F1D20
	add r1, r4, #0
	add r1, #0x46
	mov r0, #0
	strb r0, [r1]
_021F1D20:
	ldr r0, [r4, #0x18]
	cmp r0, #0
	beq _021F1D94
	ldr r0, [r4]
	ldr r1, [r4, #0x28]
	ldr r2, [r4, #0x2c]
	bl ov96_021F2F7C
	cmp r0, #0
	beq _021F1D94
	mov r0, #0
	add r1, r4, #0
	str r0, [r4, #0x18]
	add r1, #0x45
	strb r0, [r1]
	add r4, #0x44
	strb r0, [r4]
	mov r0, #1
	str r0, [sp]
	lsl r1, r7, #0x18
	lsl r2, r5, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #5
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	lsl r1, r7, #0x18
	lsl r2, r5, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #1
	bl ov96_021E8228
	ldr r0, [sp, #0xc]
	add r4, r0, r6
	mov r0, #0x7e
	lsl r0, r0, #4
	ldrb r0, [r4, r0]
	cmp r0, #0
	beq _021F1D8C
	mov r0, #1
	str r0, [sp]
	lsl r1, r7, #0x18
	lsl r2, r5, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #8
	bl ov96_021E8228
_021F1D8C:
	mov r0, #0x7e
	mov r1, #0
	lsl r0, r0, #4
	strb r1, [r4, r0]
_021F1D94:
	add r6, r6, #1
	cmp r6, #0xc
	blt _021F1CD4
	ldr r0, [sp, #0xc]
	mov r6, #0
	str r0, [sp, #0x14]
	add r0, #0x20
	str r0, [sp, #0x14]
_021F1DA4:
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x14]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r7, r2, r0
	ldr r0, [r7, #0x18]
	cmp r0, #2
	bne _021F1E22
	mov r0, #1
	str r0, [sp, #8]
	mov r5, #0
_021F1DD4:
	cmp r6, r5
	beq _021F1E12
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x14]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r1, r2, r0
	ldr r0, [r1, #0x18]
	cmp r0, #0
	beq _021F1E12
	add r0, r7, #0
	bl ov96_021F218C
	cmp r0, #0
	beq _021F1E12
	mov r0, #0
	str r0, [sp, #8]
	b _021F1E18
_021F1E12:
	add r5, r5, #1
	cmp r5, #0xc
	blt _021F1DD4
_021F1E18:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _021F1E22
	mov r0, #1
	str r0, [r7, #0x18]
_021F1E22:
	add r6, r6, #1
	cmp r6, #0xc
	blt _021F1DA4
	ldr r3, _021F2080 ; =0x0221BC64
	add r2, sp, #0x20
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r5, #0
	str r0, [r2]
	ldr r0, [sp, #0xc]
	str r0, [sp, #0x18]
	add r0, #0x20
	str r0, [sp, #0x18]
_021F1E3E:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x18]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r4, r2, r0
	ldr r0, [r4, #0x18]
	cmp r0, #0
	bne _021F1E6A
	b _021F206C
_021F1E6A:
	add r1, r4, #0
	add r1, #0x41
	mov r0, #0
	strb r0, [r1]
	str r0, [r4, #0x34]
	add r6, r4, #0
	str r0, [r4, #0x38]
	add r3, sp, #0x5c
	add r6, #0x28
	str r0, [r4, #0x3c]
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, r2, #0
	str r0, [r3]
	add r0, r4, #0
	add r0, #0x1c
	add r2, sp, #0x74
	bl VEC_Subtract
	add r0, sp, #0x74
	bl VEC_Mag
	add r7, r0, #0
	cmp r7, #0
	bgt _021F1EA8
	add r0, r4, #0
	bl ov96_021F2AA4
	b _021F206C
_021F1EA8:
	add r0, sp, #0x74
	add r1, sp, #0x68
	bl VEC_Normalize
	add r0, r4, #0
	add r0, #0x44
	ldrb r0, [r0]
	cmp r0, #0
	beq _021F1EC0
	mov r6, #0x3f
	lsl r6, r6, #0x18
	b _021F1EDC
_021F1EC0:
	add r0, r4, #0
	add r0, #0x89
	ldrb r0, [r0]
	bl _utof
	bl _f2d
	ldr r3, _021F2084 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r6, r0, #0
_021F1EDC:
	add r0, r7, #0
	bl _itof
	str r0, [sp, #0x1c]
	ldr r0, _021F2088 ; =0x45800000
	add r1, r6, #0
	bl _fmul
	add r1, r0, #0
	ldr r0, [sp, #0x1c]
	bl _fleq
	bhi _021F1F06
	add r3, r4, #0
	add r3, #0x1c
	ldmia r3!, {r0, r1}
	add r2, sp, #0x5c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021F1F30
_021F1F06:
	mov r1, #0
	add r0, sp, #0x50
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, _021F2088 ; =0x45800000
	add r1, r6, #0
	bl _fmul
	bl _ftoi
	add r1, sp, #0x68
	add r2, sp, #0x50
	add r3, sp, #0x74
	bl VEC_MultAdd
	add r1, sp, #0x5c
	add r0, sp, #0x74
	add r2, r1, #0
	bl VEC_Add
_021F1F30:
	cmp r7, #0
	beq _021F1FAC
	add r6, sp, #0x20
	ldmia r6!, {r0, r1}
	add r3, sp, #0x44
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, sp, #0x38
	str r0, [r3]
	ldr r0, [sp, #0x6c]
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x68]
	str r0, [sp, #0x40]
	mov r0, #0
	str r0, [sp, #0x3c]
	add r0, r2, #0
	bl sub_02020C64
	mov r1, #2
	lsl r1, r1, #0xc
	cmp r0, r1
	bls _021F1F66
	mov r1, #0xe
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _021F1F70
_021F1F66:
	add r1, r4, #0
	add r1, #0x40
	mov r0, #4
	strb r0, [r1]
	b _021F1FAC
_021F1F70:
	mov r1, #2
	lsl r1, r1, #0xc
	cmp r0, r1
	bls _021F1F8A
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	bhs _021F1F8A
	add r1, r4, #0
	add r1, #0x40
	mov r0, #2
	strb r0, [r1]
	b _021F1FAC
_021F1F8A:
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _021F1FA4
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	bhi _021F1FA4
	add r1, r4, #0
	add r1, #0x40
	mov r0, #3
	strb r0, [r1]
	b _021F1FAC
_021F1FA4:
	add r1, r4, #0
	add r1, #0x40
	mov r0, #1
	strb r0, [r1]
_021F1FAC:
	ldr r0, [r4, #0x18]
	cmp r0, #1
	bne _021F2058
	lsl r2, r5, #0x18
	ldr r0, [sp, #0xc]
	add r1, r4, #0
	lsr r2, r2, #0x18
	add r3, sp, #0x74
	bl ov96_021F22FC
	cmp r0, #0
	bne _021F2044
	mov r1, #0
	add r0, sp, #0x2c
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r4, #0
	add r0, #0x44
	ldrb r0, [r0]
	cmp r0, #0
	bne _021F206C
	add r1, r4, #0
	add r1, #0x41
	mov r0, #1
	strb r0, [r1]
	add r0, r4, #0
	add r0, #0x8a
	ldrh r0, [r0]
	bl _utof
	bl _f2d
	ldr r3, _021F2084 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r6, r0, #0
	add r0, r4, #0
	add r0, #0x46
	ldrb r0, [r0]
	bl _utof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	add r1, r0, #0
	ldr r0, _021F2088 ; =0x45800000
	bl _fmul
	bl _ftoi
	add r3, r4, #0
	add r1, sp, #0x68
	add r2, sp, #0x2c
	add r3, #0x34
	bl VEC_MultAdd
	add r0, r4, #0
	add r0, #0x8e
	ldrh r0, [r0]
	cmp r0, #0
	beq _021F203E
	add r0, r4, #0
	add r0, #0x8e
	ldrh r0, [r0]
	add r4, #0x8e
	sub r0, r0, #1
	strh r0, [r4]
	b _021F206C
_021F203E:
	bl GF_AssertFail
	b _021F206C
_021F2044:
	add r0, r4, #0
	bl ov96_021F2AA4
	add r2, sp, #0x5c
	ldmia r2!, {r0, r1}
	add r4, #0x28
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	str r0, [r4]
	b _021F206C
_021F2058:
	add r1, r4, #0
	add r1, #0x8e
	mov r0, #0
	add r2, sp, #0x5c
	strh r0, [r1]
	ldmia r2!, {r0, r1}
	add r4, #0x28
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	str r0, [r4]
_021F206C:
	add r5, r5, #1
	cmp r5, #0xc
	bge _021F2074
	b _021F1E3E
_021F2074:
	ldr r0, [sp, #0xc]
	bl ov96_021F234C
	add sp, #0x80
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F2080: .word 0x0221BC64
_021F2084: .word 0x40240000
_021F2088: .word 0x45800000
	thumb_func_end ov96_021F1CC0

	thumb_func_start ov96_021F208C
ov96_021F208C: ; 0x021F208C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r0, #0
	add r0, r1, #0
	lsl r6, r4, #0xc
	lsl r4, r0, #0xc
	mov r0, #0
	str r0, [sp, #8]
	add r0, sp, #0
	add r1, r2, #0
	add r2, r0, #0
	add r7, r3, #0
	ldr r5, [sp, #0x20]
	str r6, [sp]
	str r4, [sp, #4]
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	cmp r0, r7
	ble _021F20C0
	str r6, [r5]
	str r4, [r5, #4]
	mov r0, #0
	str r0, [r5, #8]
_021F20C0:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F208C

	thumb_func_start ov96_021F20C4
ov96_021F20C4: ; 0x021F20C4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	str r3, [sp, #0x10]
	add r7, r0, #0
	bl ov96_021E6104
	mov r1, #0x1b
	mov r5, #0
	str r0, [sp, #0x14]
	lsl r6, r0, #0xc
	ldr r0, [sp, #8]
	lsl r1, r1, #4
	add r7, #0x20
	mul r1, r0
	add r4, r5, #0
	add r7, r7, r1
_021F20E8:
	mov r0, #0x90
	mul r0, r4
	add r1, r7, r0
	ldr r0, [sp, #0x14]
	str r0, [sp]
	add r0, sp, #0x18
	str r0, [sp, #4]
	ldr r0, [r1, #0x28]
	ldr r1, [r1, #0x2c]
	asr r2, r0, #0xb
	lsr r2, r2, #0x14
	add r2, r0, r2
	asr r0, r2, #0xc
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	ldr r2, [sp, #0xc]
	ldr r3, [sp, #0x10]
	bl ov96_021E872C
	cmp r0, #0
	add r0, sp, #0x20
	beq _021F212C
	ldr r2, [sp, #0x18]
	lsl r1, r4, #2
	str r2, [r0, r1]
	mov r1, #1
	add r0, sp, #0x1c
	strb r1, [r0, r4]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	b _021F2136
_021F212C:
	lsl r2, r4, #2
	mov r1, #0
	str r1, [r0, r2]
	add r0, sp, #0x1c
	strb r1, [r0, r4]
_021F2136:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021F20E8
	cmp r5, #0
	bne _021F214A
	add sp, #0x2c
	mov r0, #0xc
	pop {r4, r5, r6, r7, pc}
_021F214A:
	mov r2, #3
	mov r3, #0
	add r0, sp, #0x20
	add r1, sp, #0x1c
_021F2152:
	ldrb r4, [r1, r3]
	cmp r4, #0
	beq _021F2164
	lsl r4, r3, #2
	ldr r4, [r0, r4]
	cmp r4, r6
	bge _021F2164
	add r2, r3, #0
	add r6, r4, #0
_021F2164:
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	cmp r3, #3
	blo _021F2152
	cmp r2, #3
	bne _021F217C
	bl GF_AssertFail
	add sp, #0x2c
	mov r0, #0xc
	pop {r4, r5, r6, r7, pc}
_021F217C:
	ldr r0, [sp, #8]
	lsl r1, r0, #1
	add r0, r0, r1
	add r0, r2, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F20C4

	thumb_func_start ov96_021F218C
ov96_021F218C: ; 0x021F218C
	push {r3, r4, lr}
	sub sp, #0x34
	add r2, r0, #0
	add r0, sp, #0x20
	str r0, [sp]
	add r0, sp, #0xc
	str r0, [sp, #4]
	add r4, r1, #0
	ldr r0, [r2]
	ldr r1, [r2, #0x28]
	ldr r2, [r2, #0x2c]
	add r3, sp, #0x1c
	bl ov96_021EAF78
	add r0, sp, #0x14
	str r0, [sp]
	add r0, sp, #8
	str r0, [sp, #4]
	ldr r0, [r4]
	ldr r1, [r4, #0x28]
	ldr r2, [r4, #0x2c]
	add r3, sp, #0x10
	bl ov96_021EAF78
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #8]
	add r2, sp, #0x28
	add r0, r1, r0
	lsl r4, r0, #0xc
	mov r0, #0
	str r0, [sp, #0x24]
	str r0, [sp, #0x18]
	add r0, sp, #0x1c
	add r1, sp, #0x10
	bl VEC_Subtract
	add r0, sp, #0x28
	bl VEC_Mag
	cmp r0, r4
	bgt _021F21E4
	add sp, #0x34
	mov r0, #1
	pop {r3, r4, pc}
_021F21E4:
	mov r0, #0
	add sp, #0x34
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F218C

	thumb_func_start ov96_021F21EC
ov96_021F21EC: ; 0x021F21EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #8]
_021F21F6:
	ldr r0, [sp, #8]
	mov r1, #0xc0
	ldr r2, _021F22F8 ; =0x0221DCA0
	mul r1, r0
	add r5, r2, r1
	mov r1, #3
	mov r4, #0
	bl _s32_div_f
	add r6, r0, #0
	ldr r0, [sp, #8]
	mov r1, #3
	bl _s32_div_f
	ldr r0, [sp]
	add r2, r6, #0
	str r0, [sp, #0xc]
	add r0, #0x20
	str r0, [sp, #0xc]
	mov r0, #0x1b
	lsl r0, r0, #4
	mul r2, r0
	ldr r0, [sp, #0xc]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r0, r2, r0
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	ldr r1, _021F22F8 ; =0x0221DCA0
	lsl r0, r0, #4
	add r7, r1, r0
_021F2236:
	ldr r0, [sp, #8]
	cmp r0, r4
	bne _021F2248
	lsl r1, r4, #4
	mov r0, #0
	add r2, r5, r1
	str r0, [r5, r1]
	str r0, [r2, #8]
	b _021F22DC
_021F2248:
	cmp r4, r0
	blo _021F22DC
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r6, #0
	mul r2, r0
	ldr r0, [sp, #0xc]
	add r2, r0, r2
	mov r0, #0x90
	mul r0, r1
	add r6, r2, r0
	ldr r0, [sp, #4]
	ldr r0, [r0, #0x18]
	cmp r0, #1
	bne _021F227E
	ldr r0, [r6, #0x18]
	cmp r0, #1
	beq _021F229A
_021F227E:
	lsl r2, r4, #4
	mov r0, #0
	str r0, [r5, r2]
	add r1, r5, r2
	mov r0, #0xc0
	add r3, r4, #0
	mul r3, r0
	mov r2, #0
	str r2, [r7, r3]
	str r2, [r1, #8]
	add r0, r7, r3
	add r1, r2, #0
	str r1, [r0, #8]
	b _021F22DC
_021F229A:
	ldr r0, [sp, #4]
	add r1, r6, #0
	bl ov96_021F218C
	cmp r0, #0
	beq _021F22C2
	lsl r1, r4, #4
	mov r0, #1
	str r0, [r5, r1]
	add r2, r5, r1
	mov r0, #0xc0
	add r1, r4, #0
	mul r1, r0
	mov r0, #1
	str r0, [r7, r1]
	ldr r0, [sp, #4]
	add r3, r7, r1
	str r6, [r2, #8]
	str r0, [r3, #8]
	b _021F22DC
_021F22C2:
	lsl r2, r4, #4
	mov r0, #0
	str r0, [r5, r2]
	add r1, r5, r2
	mov r0, #0xc0
	add r3, r4, #0
	mul r3, r0
	mov r2, #0
	str r2, [r7, r3]
	str r2, [r1, #8]
	add r0, r7, r3
	add r1, r2, #0
	str r1, [r0, #8]
_021F22DC:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _021F2236
	ldr r0, [sp, #8]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	cmp r0, #0xc
	blo _021F21F6
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F22F8: .word 0x0221DCA0
	thumb_func_end ov96_021F21EC

	thumb_func_start ov96_021F22FC
ov96_021F22FC: ; 0x021F22FC
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r3, #0
	mov r0, #0xc0
	add r6, r1, #0
	ldr r3, _021F2348 ; =0x0221DCA0
	mul r0, r2
	mov r4, #0
	add r5, r3, r0
	add r6, #0x28
_021F2310:
	lsl r0, r4, #4
	add r1, r5, r0
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021F2338
	ldr r0, [r1, #8]
	add r1, r6, #0
	add r0, #0x28
	add r2, sp, #0
	bl VEC_Subtract
	add r0, r7, #0
	add r1, sp, #0
	bl VEC_DotProduct
	cmp r0, #0
	ble _021F2338
	add sp, #0xc
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021F2338:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _021F2310
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F2348: .word 0x0221DCA0
	thumb_func_end ov96_021F22FC

	thumb_func_start ov96_021F234C
ov96_021F234C: ; 0x021F234C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x1fc
	sub sp, #0x198
	mov r5, #0
	add r6, r0, #0
	str r0, [sp]
	str r5, [sp, #0x14]
	add r7, sp, #0x70
	add r6, #0x20
_021F236A:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	mul r0, r4
	add r2, r6, r0
	mov r0, #0x90
	mul r0, r1
	add r1, r2, r0
	add r0, r1, #0
	add r0, #0x41
	ldrb r0, [r0]
	cmp r0, #0
	beq _021F23A8
	ldr r0, [r1, #0x18]
	cmp r0, #1
	bne _021F23A8
	ldr r0, [sp, #0x14]
	add r2, r0, #0
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	str r2, [sp, #0x14]
	strb r5, [r7, r0]
_021F23A8:
	mov r2, #0xc
	add r0, r1, #0
	add r3, r5, #0
	mul r3, r2
	add r2, sp, #0x7c
	add r0, #0x1c
	add r1, #0x28
	add r2, r2, r3
	bl VEC_Subtract
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _021F236A
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bne _021F23CE
	b _021F276E
_021F23CE:
	mov r2, #0x1b
	mov r0, #0
	add r1, sp, #0x10c
	lsl r2, r2, #6
	bl sub_020D47EC
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bhi _021F23E6
	b _021F25D4
_021F23E6:
	ldr r1, _021F26AC ; =0x02109CDC
	mov r0, #2
	ldrsh r0, [r1, r0]
	str r0, [sp, #0xc]
_021F23EE:
	ldr r0, [sp, #0x10]
	add r1, sp, #0x70
	ldrb r7, [r1, r0]
	ldr r0, _021F26B0 ; =0x000007CC
	mov r1, #0
	mov r2, #0x7b
	str r1, [sp, #0x60]
	add r0, sp
	lsl r2, r2, #4
	bl MIi_CpuFill8
	ldr r0, [sp, #0x10]
	mov r1, #0x90
	mul r1, r0
	add r2, sp, #0x10c
	add r4, r2, r1
	ldr r1, _021F26B0 ; =0x000007CC
	mov r5, #0
	add r1, sp
	mov r6, #0xc
	mov r0, #0xa4
_021F2418:
	add r2, r5, #0
	mul r2, r6
	add r3, r4, r2
	add r2, r5, #0
	mul r2, r0
	str r3, [r1, r2]
	add r2, r5, #1
	lsl r2, r2, #0x18
	lsr r5, r2, #0x18
	cmp r5, #0xc
	blo _021F2418
	add r0, sp, #0x64
	mov r1, #0
	mov r2, #0xc
	bl MIi_CpuFill8
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r3, r4, #0
	mul r3, r0
	mov r0, #0x90
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp]
	mov r5, #1
	add r0, r0, r3
	add r3, r2, r0
	add r3, #0x54
	add r2, sp, #0x48
	ldmia r3!, {r0, r1}
	str r2, [sp, #0x18]
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [sp]
	str r0, [sp, #0x20]
	add r0, #0x48
	str r0, [sp, #0x20]
_021F2476:
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x20]
	add r0, r0, r2
	str r0, [sp, #0x1c]
	mov r0, #0x90
	mul r0, r1
	str r0, [sp, #0x24]
	mov r1, #1
	add r0, sp, #0x64
	strb r1, [r0, r7]
	cmp r5, #0
	beq _021F2532
	mov r0, #0xa4
	add r1, r7, #0
	mul r1, r0
	ldr r0, _021F26B0 ; =0x000007CC
	add r0, sp
	add r4, r0, r1
	mov r0, #0
	strh r0, [r4, #0x10]
	add r6, r4, #0
	strh r0, [r4, #0x12]
	add r5, r0, #0
	mov r0, #0xc0
	add r1, r7, #0
	mul r1, r0
	ldr r0, _021F26B4 ; =0x0221DCA0
	add r6, #0x10
	add r0, r0, r1
	str r0, [sp, #8]
_021F24CA:
	ldr r1, [sp, #8]
	lsl r0, r5, #4
	ldr r2, [sp, #8]
	add r1, r1, r0
	ldr r0, [r2, r0]
	cmp r0, #0
	beq _021F2514
	ldr r0, [r1, #8]
	ldr r2, [sp, #0x1c]
	ldr r1, [sp, #0x24]
	add r0, #0x28
	add r1, r2, r1
	add r2, sp, #0x3c
	bl VEC_Subtract
	ldr r0, [sp, #0x18]
	add r1, sp, #0x3c
	bl VEC_DotProduct
	cmp r0, #0
	ble _021F2514
	ldrh r0, [r4, #0x10]
	add r3, sp, #0x3c
	add r0, r4, r0
	strb r5, [r0, #4]
	ldrh r1, [r4, #0x10]
	mov r0, #0xc
	mul r0, r1
	add r2, r4, r0
	ldmia r3!, {r0, r1}
	add r2, #0x14
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldrh r0, [r6]
	add r0, r0, #1
	strh r0, [r6]
_021F2514:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _021F24CA
	mov r0, #0xa4
	add r1, r7, #0
	mul r1, r0
	ldr r0, _021F26B0 ; =0x000007CC
	add r0, sp
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x18]
	add r2, r0, #0
	bl VEC_Add
_021F2532:
	mov r0, #0xa4
	add r1, r7, #0
	mul r1, r0
	ldr r0, _021F26B0 ; =0x000007CC
	mov r5, #0
	add r0, sp
	add r4, r0, r1
	ldrh r0, [r4, #0x12]
	ldrh r1, [r4, #0x10]
	cmp r0, r1
	blo _021F2558
	add r1, r5, #0
	add r0, sp, #0x64
	strb r1, [r0, r7]
	add r0, sp, #0x54
	bl ov96_021F27A8
	add r7, r0, #0
	b _021F25BC
_021F2558:
	add r1, r4, r0
	ldrb r2, [r1, #4]
	add r1, sp, #0x64
	ldrb r1, [r1, r2]
	cmp r1, #0
	beq _021F256A
	add r0, r0, #1
	strh r0, [r4, #0x12]
	b _021F25BC
_021F256A:
	add r0, sp, #0x54
	add r1, r7, #0
	bl ov96_021F2780
	cmp r0, #0xff
	beq _021F25C2
	ldrh r2, [r4, #0x12]
	add r3, r4, #0
	mov r1, #0xc
	ldr r0, [r4]
	add r3, #0x14
	mul r1, r2
	add r1, r3, r1
	bl ov96_021F2814
	ldr r1, [sp, #0xc]
	cmp r0, r1
	blt _021F259C
	ldr r3, [r4]
	add r2, sp, #0x48
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021F25B0
_021F259C:
	ldrh r2, [r4, #0x12]
	add r3, r4, #0
	mov r1, #0xc
	mul r1, r2
	add r3, #0x14
	ldr r0, [r4]
	ldr r2, [sp, #0x18]
	add r1, r3, r1
	bl ov96_021F27B8
_021F25B0:
	ldrh r1, [r4, #0x12]
	mov r5, #1
	add r0, r1, #1
	strh r0, [r4, #0x12]
	add r0, r4, r1
	ldrb r7, [r0, #4]
_021F25BC:
	cmp r7, #0xff
	beq _021F25C2
	b _021F2476
_021F25C2:
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	str r1, [sp, #0x10]
	ldr r0, [sp, #0x14]
	cmp r1, r0
	bhs _021F25D4
	b _021F23EE
_021F25D4:
	mov r0, #0
	str r0, [sp, #4]
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bhi _021F25E0
	b _021F2704
_021F25E0:
	ldr r0, [sp, #4]
	mov r1, #0x90
	mul r1, r0
	ldr r0, [sp]
	add r2, sp, #0x10c
	str r0, [sp, #0x28]
	add r0, #0x20
	mov r5, #0
	add r7, r2, r1
	str r0, [sp, #0x28]
_021F25F4:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x28]
	add r6, r1, #0
	add r4, r0, r2
	mov r0, #0x90
	mul r6, r0
	mov r0, #0xc
	mul r0, r5
	str r0, [sp, #0x2c]
	add r0, r4, r6
	ldr r1, [sp, #0x2c]
	add r0, #0x28
	add r1, r7, r1
	add r2, r0, #0
	bl VEC_Add
	ldr r0, [sp, #0x2c]
	add r0, r7, r0
	bl VEC_Mag
	cmp r0, #0
	beq _021F2652
	add r0, r4, r6
	add r0, #0x41
	ldrb r0, [r0]
	cmp r0, #0
	bne _021F2652
	add r2, r4, r6
	add r2, #0x28
	add r3, r4, r6
	ldmia r2!, {r0, r1}
	add r3, #0x1c
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
_021F2652:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _021F25F4
	ldr r0, [sp, #4]
	add r1, sp, #0x70
	ldrb r4, [r1, r0]
	mov r1, #3
	add r0, r4, #0
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	ldr r2, [sp]
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, #0x20
	mul r0, r5
	add r2, r2, r0
	mov r0, #0x90
	mul r0, r1
	add r5, r2, r0
	add r0, r5, #0
	add r0, #0x8e
	ldrh r0, [r0]
	cmp r0, #0
	bne _021F26F2
	mov r1, #0x72
	mov r3, #0
	lsl r1, r1, #4
_021F2696:
	ldr r0, [sp]
	add r2, r0, r3
	ldrb r0, [r2, r1]
	cmp r4, r0
	bne _021F26B8
	mov r0, #0x72
	mov r1, #0xc
	lsl r0, r0, #4
	strb r1, [r2, r0]
	b _021F26BE
	nop
_021F26AC: .word 0x02109CDC
_021F26B0: .word 0x000007CC
_021F26B4: .word 0x0221DCA0
_021F26B8:
	add r3, r3, #1
	cmp r3, #4
	blt _021F2696
_021F26BE:
	ldr r0, [r5, #0x18]
	cmp r0, #1
	beq _021F26C8
	bl GF_AssertFail
_021F26C8:
	add r0, r5, #0
	mov r1, #1
	add r0, #0x44
	strb r1, [r0]
	add r0, r5, #0
	add r3, r5, #0
	add r2, r5, #0
	mov r1, #0x3c
	add r0, #0x45
	add r3, #0x28
	strb r1, [r0]
	ldmia r3!, {r0, r1}
	add r2, #0x1c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0
	str r0, [r5, #0x34]
	str r0, [r5, #0x38]
	add r5, #0x41
	strb r0, [r5]
_021F26F2:
	ldr r0, [sp, #4]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	str r1, [sp, #4]
	ldr r0, [sp, #0x14]
	cmp r1, r0
	bhs _021F2704
	b _021F25E0
_021F2704:
	ldr r0, [sp]
	mov r5, #0
	add r0, #0x20
	str r0, [sp]
	add r7, sp, #0x30
_021F270E:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp]
	add r6, r1, #0
	add r4, r0, r2
	mov r0, #0x90
	mul r6, r0
	add r0, r4, r6
	add r1, r4, r6
	add r0, #0x1c
	add r1, #0x28
	add r2, r7, #0
	bl VEC_Subtract
	mov r0, #0xc
	add r1, r5, #0
	mul r1, r0
	add r0, sp, #0x7c
	add r0, r0, r1
	add r1, r7, #0
	bl VEC_DotProduct
	cmp r0, #0
	bge _021F2764
	add r2, r4, r6
	add r2, #0x28
	add r3, r4, r6
	ldmia r2!, {r0, r1}
	add r3, #0x1c
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
_021F2764:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _021F270E
_021F276E:
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x1fc
	add sp, #0x198
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F234C

	thumb_func_start ov96_021F2780
ov96_021F2780: ; 0x021F2780
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5, #0xc]
	add r4, r1, #0
	cmp r0, #0xc
	blt _021F2790
	bl GF_AssertFail
_021F2790:
	ldr r1, [r5, #0xc]
	cmp r1, #0xc
	blt _021F279A
	mov r0, #0xff
	pop {r3, r4, r5, pc}
_021F279A:
	add r0, r1, #1
	str r0, [r5, #0xc]
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	strb r4, [r5, r0]
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F2780

	thumb_func_start ov96_021F27A8
ov96_021F27A8: ; 0x021F27A8
	ldr r1, [r0, #0xc]
	sub r1, r1, #1
	bpl _021F27B2
	mov r0, #0xff
	bx lr
_021F27B2:
	str r1, [r0, #0xc]
	ldrb r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021F27A8

	thumb_func_start ov96_021F27B8
ov96_021F27B8: ; 0x021F27B8
	push {r3, r4, r5, r6, lr}
	sub sp, #0x24
	add r5, r1, #0
	add r1, sp, #0x18
	add r4, r0, #0
	add r6, r2, #0
	bl VEC_Normalize
	add r0, r5, #0
	add r1, sp, #0xc
	bl VEC_Normalize
	add r0, sp, #0x18
	add r1, sp, #0xc
	bl VEC_DotProduct
	add r5, r0, #0
	add r0, r4, #0
	bl VEC_Mag
	add r2, r0, #0
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	asr r1, r5, #0x1f
	add r0, r5, #0
	asr r3, r2, #0x1f
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r0, r0, r2
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	add r1, sp, #0xc
	add r2, sp, #0
	add r3, r6, #0
	bl VEC_MultAdd
	add sp, #0x24
	pop {r3, r4, r5, r6, pc}
	thumb_func_end ov96_021F27B8

	thumb_func_start ov96_021F2814
ov96_021F2814: ; 0x021F2814
	push {r4, lr}
	sub sp, #0x18
	add r4, r1, #0
	add r1, sp, #0xc
	bl VEC_Normalize
	add r0, r4, #0
	add r1, sp, #0
	bl VEC_Normalize
	add r0, sp, #0xc
	add r1, sp, #0
	bl VEC_DotProduct
	add sp, #0x18
	pop {r4, pc}
	thumb_func_end ov96_021F2814

	thumb_func_start ov96_021F2834
ov96_021F2834: ; 0x021F2834
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x48
	add r4, r0, #0
	ldr r0, _021F2950 ; =0x0000072B
	ldrb r0, [r4, r0]
	cmp r0, #0
	bne _021F2844
	b _021F294A
_021F2844:
	mov r0, #0
	add r1, sp, #0x10
	add r5, r0, #0
_021F284A:
	add r0, r0, #1
	strb r5, [r1]
	add r1, r1, #1
	cmp r0, #4
	blt _021F284A
	ldr r1, _021F2950 ; =0x0000072B
	add r7, r4, #0
	add r0, r1, #0
	strb r5, [r4, r1]
	add r0, #0x23
	strb r5, [r4, r0]
	add r1, #0x24
	strb r5, [r4, r1]
	add r7, #0x20
_021F2866:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	lsl r0, r0, #4
	mul r0, r6
	add r2, r7, r0
	mov r0, #0x90
	mul r0, r1
	add r6, r2, r0
	ldr r0, [r6, #0x18]
	cmp r0, #1
	bne _021F28F6
	add r0, sp, #8
	str r0, [sp]
	ldr r1, [r6, #0x28]
	ldr r0, [r6]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	ldr r2, [r6, #0x2c]
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, sp, #0xc
	bl ov96_021EB06C
	mov r0, #0x73
	lsl r0, r0, #4
	ldrh r0, [r4, r0]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #8]
	lsl r0, r0, #0x18
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	lsr r0, r0, #0x18
	lsr r1, r1, #0x10
	lsr r2, r2, #0x10
	add r3, sp, #4
	bl ov96_021F3180
	add r2, r0, #0
	beq _021F28F6
	add r0, r6, #0
	add r0, #0x42
	ldrh r0, [r0]
	add r6, #0x42
	add r3, sp, #0x10
	add r0, r0, r2
	strh r0, [r6]
	add r0, sp, #4
	ldrb r1, [r0]
	add r0, sp, #0x10
	ldrb r0, [r0, r1]
	add r6, r0, #1
	strb r6, [r3, r1]
	mov r3, #0xc
	add r6, r1, #0
	mul r6, r3
	add r3, sp, #0x18
	add r3, r3, r6
	strb r5, [r0, r3]
	add r0, sp, #0x14
	strb r2, [r0, r1]
_021F28F6:
	add r5, r5, #1
	cmp r5, #0xc
	blt _021F2866
	mov r0, #0
	mov ip, r0
	add r7, sp, #0x18
	add r1, sp, #0x14
	add r2, sp, #0x10
_021F2906:
	ldrb r3, [r2]
	mov r0, #0
	cmp r3, #0
	ble _021F293A
_021F290E:
	ldr r3, _021F2954 ; =0x0000074E
	ldrb r6, [r7, r0]
	ldrb r3, [r4, r3]
	add r0, r0, #1
	add r5, r4, r3
	mov r3, #0x75
	lsl r3, r3, #4
	strb r6, [r5, r3]
	sub r3, r3, #2
	ldrb r3, [r4, r3]
	ldrb r6, [r1]
	add r5, r4, r3
	ldr r3, _021F2958 ; =0x0000075C
	strb r6, [r5, r3]
	sub r3, #0xe
	ldrb r3, [r4, r3]
	add r5, r3, #1
	ldr r3, _021F2954 ; =0x0000074E
	strb r5, [r4, r3]
	ldrb r3, [r2]
	cmp r0, r3
	blt _021F290E
_021F293A:
	mov r0, ip
	add r0, r0, #1
	add r7, #0xc
	add r1, r1, #1
	add r2, r2, #1
	mov ip, r0
	cmp r0, #4
	blt _021F2906
_021F294A:
	add sp, #0x48
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F2950: .word 0x0000072B
_021F2954: .word 0x0000074E
_021F2958: .word 0x0000075C
	thumb_func_end ov96_021F2834

	thumb_func_start ov96_021F295C
ov96_021F295C: ; 0x021F295C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r6, r1, #0
	mov r4, #1
	cmp r5, #1
	blt _021F2978
_021F2968:
	lsl r0, r4, #0x18
	lsr r0, r0, #0x18
	add r1, r6, #0
	bl ov96_021F2984
	add r4, r4, #1
	cmp r4, r5
	ble _021F2968
_021F2978:
	add r0, r6, #0
	mov r1, #1
	bl ScheduleBgTilemapBufferTransfer
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F295C

	thumb_func_start ov96_021F2984
ov96_021F2984: ; 0x021F2984
	push {r3, lr}
	sub sp, #0x10
	cmp r0, #1
	blo _021F299A
	cmp r0, #6
	bhi _021F299A
	sub r0, r0, #1
	lsl r3, r0, #1
	add r3, #0x12
	mov r0, #2
	b _021F29DC
_021F299A:
	cmp r0, #0x10
	blo _021F29AE
	cmp r0, #0x1c
	bhi _021F29AE
	sub r0, #0x10
	lsl r2, r0, #1
	mov r0, #0x1a
	sub r3, r0, r2
	mov r0, #0x14
	b _021F29DC
_021F29AE:
	cmp r0, #0x26
	blo _021F29C0
	cmp r0, #0x2b
	bhs _021F29C0
	sub r0, #0x26
	lsl r0, r0, #1
	add r3, r0, #4
	mov r0, #2
	b _021F29DC
_021F29C0:
	cmp r0, #7
	blo _021F29D2
	cmp r0, #0xf
	bhi _021F29D2
	sub r0, r0, #7
	lsl r0, r0, #1
	mov r3, #0x1c
	add r0, r0, #4
	b _021F29DC
_021F29D2:
	sub r0, #0x1d
	lsl r2, r0, #1
	mov r0, #0x12
	mov r3, #2
	sub r0, r0, r2
_021F29DC:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x10
	lsl r3, r3, #0x18
	str r0, [sp, #0xc]
	add r0, r1, #0
	mov r1, #1
	mov r2, #0
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	add sp, #0x10
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_021F2984

	thumb_func_start ov96_021F2A00
ov96_021F2A00: ; 0x021F2A00
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #8]
	add r0, #0x20
	str r0, [sp, #8]
	ldr r0, _021F2A80 ; =0x0221BDD4
	mov r1, #0
	str r1, [sp, #0xc]
	str r0, [sp, #4]
	mov r7, #2
_021F2A14:
	ldr r4, [sp, #8]
	ldr r5, [sp, #4]
	mov r6, #0
_021F2A1A:
	ldr r0, [r4, #0x18]
	cmp r0, #0
	bne _021F2A56
	str r7, [r4, #0x18]
	add r0, sp, #0x10
	str r0, [sp]
	ldrh r1, [r5]
	ldrh r2, [r5, #2]
	ldr r0, [r4]
	add r3, sp, #0x14
	bl ov96_021EB0A4
	ldr r0, [sp, #0x14]
	add r3, r4, #0
	lsl r0, r0, #0xc
	str r0, [r4, #0x28]
	ldr r0, [sp, #0x10]
	add r2, r4, #0
	lsl r0, r0, #0xc
	add r3, #0x28
	str r0, [r4, #0x2c]
	ldmia r3!, {r0, r1}
	add r2, #0x1c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r4, #0
	str r0, [r2]
	add r1, #0x40
	mov r0, #2
	strb r0, [r1]
_021F2A56:
	add r6, r6, #1
	add r4, #0x90
	add r5, r5, #4
	cmp r6, #3
	blt _021F2A1A
	mov r1, #0x1b
	ldr r0, [sp, #8]
	lsl r1, r1, #4
	add r0, r0, r1
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r0, #0xc
	str r0, [sp, #4]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	blt _021F2A14
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F2A80: .word 0x0221BDD4
	thumb_func_end ov96_021F2A00

	thumb_func_start ov96_021F2A84
ov96_021F2A84: ; 0x021F2A84
	mov r2, #0x1b
	lsl r2, r2, #4
	mul r2, r1
	mov r3, #0
	add r1, r0, r2
_021F2A8E:
	ldr r0, [r1, #0x38]
	cmp r0, #0
	beq _021F2A98
	mov r0, #0
	bx lr
_021F2A98:
	add r3, r3, #1
	add r1, #0x90
	cmp r3, #3
	blt _021F2A8E
	mov r0, #1
	bx lr
	thumb_func_end ov96_021F2A84

	thumb_func_start ov96_021F2AA4
ov96_021F2AA4: ; 0x021F2AA4
	add r1, r0, #0
	add r1, #0x44
	ldrb r1, [r1]
	cmp r1, #0
	beq _021F2AE0
	add r1, r0, #0
	add r1, #0x45
	ldrb r1, [r1]
	sub r2, r1, #1
	add r1, r0, #0
	add r1, #0x45
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x45
	ldrb r1, [r1]
	cmp r1, #0
	bne _021F2B20
	add r1, r0, #0
	mov r2, #0
	add r1, #0x45
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x44
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x8c
	ldrh r1, [r1]
	add r0, #0x8e
	strh r1, [r0]
	bx lr
_021F2AE0:
	add r1, r0, #0
	add r1, #0x8e
	ldrh r1, [r1]
	add r2, r1, #2
	add r1, r0, #0
	add r1, #0x8e
	strh r2, [r1]
	add r1, r0, #0
	add r1, #0x8c
	ldrh r2, [r1]
	add r1, r0, #0
	add r1, #0x8e
	ldrh r1, [r1]
	cmp r1, r2
	bls _021F2B04
	add r1, r0, #0
	add r1, #0x8e
	strh r2, [r1]
_021F2B04:
	add r1, r0, #0
	add r1, #0x8e
	ldrh r2, [r1]
	add r1, r0, #0
	add r1, #0x8c
	ldrh r1, [r1]
	cmp r2, r1
	bne _021F2B20
	add r1, r0, #0
	mov r2, #0
	add r1, #0x45
	strb r2, [r1]
	add r0, #0x44
	strb r2, [r0]
_021F2B20:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F2AA4

	thumb_func_start ov96_021F2B24
ov96_021F2B24: ; 0x021F2B24
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r1, r2, #0
	add r2, r3, #0
	ldr r4, [sp, #0x10]
	bl ov96_021E60D8
	ldrb r1, [r0]
	lsl r1, r1, #2
	ldr r2, [r5, r1]
	add r1, r4, #0
	add r1, #0x8a
	strh r2, [r1]
	ldrb r1, [r0, #3]
	lsl r1, r1, #2
	add r1, r5, r1
	ldr r2, [r1, #0x14]
	add r1, r4, #0
	add r1, #0x8c
	strh r2, [r1]
	ldrb r1, [r0, #3]
	lsl r1, r1, #2
	add r1, r5, r1
	ldr r2, [r1, #0x14]
	add r1, r4, #0
	add r1, #0x8e
	strh r2, [r1]
	ldrb r0, [r0, #1]
	add r4, #0x89
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x28]
	strb r0, [r4]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021F2B24

	thumb_func_start ov96_021F2B68
ov96_021F2B68: ; 0x021F2B68
	push {r3, r4, r5, lr}
	add r4, r0, #0
	strh r1, [r4, #0x1c]
	strh r2, [r4, #0x1e]
	mov r2, #0
	ldr r0, _021F2BA4 ; =ov96_021F2BB4
	strb r2, [r4]
	add r1, r4, #0
	add r5, r3, #0
	bl sub_0200E320
	str r0, [r4, #4]
	ldr r0, _021F2BA8 ; =ov96_021F2C04
	add r1, r4, #0
	mov r2, #1
	bl sub_0200E320
	str r0, [r4, #0xc]
	mov r1, #2
	ldr r0, _021F2BAC ; =0x04000018
	str r5, [r4, #0x30]
	lsl r1, r1, #0x16
	str r1, [r0]
	ldr r0, _021F2BB0 ; =ov96_021F2CD0
	add r1, r4, #0
	mov r2, #2
	bl sub_0200E320
	str r0, [r4, #8]
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F2BA4: .word ov96_021F2BB4
_021F2BA8: .word ov96_021F2C04
_021F2BAC: .word 0x04000018
_021F2BB0: .word ov96_021F2CD0
	thumb_func_end ov96_021F2B68

	thumb_func_start ov96_021F2BB4
ov96_021F2BB4: ; 0x021F2BB4
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _021F2BC6
	cmp r0, #1
	beq _021F2BDE
	pop {r3, r4, r5, pc}
_021F2BC6:
	ldr r0, [r4, #8]
	cmp r0, #0
	bne _021F2BFE
	ldr r0, _021F2C00 ; =ov96_021F2D68
	mov r2, #3
	bl sub_0200E320
	str r0, [r4, #0x10]
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_021F2BDE:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	bne _021F2BFE
	mov r0, #0
	str r0, [r4, #4]
	strb r0, [r4]
	ldr r0, [r4, #0x30]
	bl ov96_021E5F54
	bl ov96_021E8A20
	mov r1, #1
	strb r1, [r0, #8]
	add r0, r5, #0
	bl sub_0200E390
_021F2BFE:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F2C00: .word ov96_021F2D68
	thumb_func_end ov96_021F2BB4

	thumb_func_start ov96_021F2C04
ov96_021F2C04: ; 0x021F2C04
	push {r3, r4, lr}
	sub sp, #4
	add r4, r1, #0
	ldrb r1, [r4, #1]
	cmp r1, #0
	beq _021F2C1C
	cmp r1, #1
	beq _021F2C5A
	cmp r1, #2
	beq _021F2C86
	add sp, #4
	pop {r3, r4, pc}
_021F2C1C:
	ldrh r0, [r4, #0x18]
	add r0, r0, #1
	strh r0, [r4, #0x18]
	ldrh r0, [r4, #0x18]
	cmp r0, #5
	bhi _021F2C50
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	mov r0, #0xc
	mul r0, r1
	mov r1, #5
	bl _s32_div_f
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	add r0, r4, #4
	str r0, [sp]
	mov r3, #0xc
	ldr r0, _021F2CC8 ; =0x04000050
	mov r1, #0
	mov r2, #1
	sub r3, r3, r4
	bl sub_020CF15C
	add sp, #4
	pop {r3, r4, pc}
_021F2C50:
	ldrb r0, [r4, #1]
	add sp, #4
	add r0, r0, #1
	strb r0, [r4, #1]
	pop {r3, r4, pc}
_021F2C5A:
	ldrh r1, [r4, #0x1e]
	ldr r0, [r4, #0x20]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021F31F0
	ldrh r1, [r4, #0x1c]
	ldr r0, [r4, #0x20]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021F3298
	mov r0, #0
	strh r0, [r4, #0x18]
	ldrb r0, [r4, #1]
	add r0, r0, #1
	strb r0, [r4, #1]
	ldr r0, _021F2CCC ; =0x0000089F
	bl PlaySE
	add sp, #4
	pop {r3, r4, pc}
_021F2C86:
	ldrh r1, [r4, #0x18]
	add r1, r1, #1
	strh r1, [r4, #0x18]
	ldrh r1, [r4, #0x18]
	cmp r1, #5
	bhi _021F2CB8
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0xc
	mul r0, r1
	mov r1, #5
	bl _s32_div_f
	lsl r0, r0, #0x10
	lsr r3, r0, #0x10
	mov r0, #0x10
	sub r0, r0, r3
	str r0, [sp]
	ldr r0, _021F2CC8 ; =0x04000050
	mov r1, #0
	mov r2, #1
	bl sub_020CF15C
	add sp, #4
	pop {r3, r4, pc}
_021F2CB8:
	mov r1, #0
	str r1, [r4, #0xc]
	strh r1, [r4, #0x18]
	strb r1, [r4, #1]
	bl sub_0200E390
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_021F2CC8: .word 0x04000050
_021F2CCC: .word 0x0000089F
	thumb_func_end ov96_021F2C04

	thumb_func_start ov96_021F2CD0
ov96_021F2CD0: ; 0x021F2CD0
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	ldrb r0, [r4, #2]
	cmp r0, #0
	beq _021F2CE6
	cmp r0, #1
	beq _021F2D16
	cmp r0, #2
	beq _021F2D2E
	pop {r3, r4, r5, pc}
_021F2CE6:
	ldrh r0, [r4, #0x1a]
	mov r1, #5
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	lsl r0, r0, #7
	bl _s32_div_f
	mov r1, #0x80
	sub r0, r1, r0
	lsl r1, r0, #0x10
	ldr r0, _021F2D60 ; =0x01FF0000
	and r1, r0
	ldr r0, _021F2D64 ; =0x04000018
	str r1, [r0]
	ldrh r0, [r4, #0x1a]
	cmp r0, #5
	blo _021F2D5E
	mov r0, #0
	strh r0, [r4, #0x1a]
	ldrb r0, [r4, #2]
	add r0, r0, #1
	strb r0, [r4, #2]
	pop {r3, r4, r5, pc}
_021F2D16:
	ldrh r0, [r4, #0x1a]
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	cmp r0, #0x14
	blo _021F2D5E
	mov r0, #0
	strh r0, [r4, #0x1a]
	ldrb r0, [r4, #2]
	add r0, r0, #1
	strb r0, [r4, #2]
	pop {r3, r4, r5, pc}
_021F2D2E:
	ldrh r0, [r4, #0x1a]
	mov r1, #5
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	lsl r0, r0, #7
	neg r0, r0
	bl _s32_div_f
	lsl r1, r0, #0x10
	ldr r0, _021F2D60 ; =0x01FF0000
	and r1, r0
	ldr r0, _021F2D64 ; =0x04000018
	str r1, [r0]
	ldrh r0, [r4, #0x1a]
	cmp r0, #5
	blo _021F2D5E
	mov r0, #0
	strh r0, [r4, #0x1a]
	str r0, [r4, #8]
	strb r0, [r4, #2]
	add r0, r5, #0
	bl sub_0200E390
_021F2D5E:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F2D60: .word 0x01FF0000
_021F2D64: .word 0x04000018
	thumb_func_end ov96_021F2CD0

	thumb_func_start ov96_021F2D68
ov96_021F2D68: ; 0x021F2D68
	push {r4, lr}
	mov r2, #0x24
	ldrsh r4, [r1, r2]
	ldrh r2, [r1, #0x26]
	lsl r3, r2, #2
	ldr r2, _021F2D94 ; =0x0221DB70
	ldr r2, [r2, r3]
	add r2, r4, r2
	strh r2, [r1, #0x24]
	ldrh r2, [r1, #0x26]
	add r2, r2, #1
	strh r2, [r1, #0x26]
	ldrh r2, [r1, #0x26]
	cmp r2, #0x12
	blo _021F2D92
	mov r2, #0
	strh r2, [r1, #0x24]
	str r2, [r1, #0x10]
	strh r2, [r1, #0x26]
	bl sub_0200E390
_021F2D92:
	pop {r4, pc}
	.balign 4, 0
_021F2D94: .word 0x0221DB70
	thumb_func_end ov96_021F2D68

	thumb_func_start ov96_021F2D98
ov96_021F2D98: ; 0x021F2D98
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	mov r0, #0
	strb r0, [r4, #3]
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _021F2DC0
	ldr r0, [r4, #0x30]
	bl ov96_021E5F54
	bl ov96_021E8A20
	mov r1, #1
	strb r1, [r0, #8]
	ldr r0, [r4, #4]
	bl sub_0200E390
	mov r0, #0
	str r0, [r4, #4]
_021F2DC0:
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _021F2DCE
	bl sub_0200E390
	mov r0, #0
	str r0, [r4, #8]
_021F2DCE:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	beq _021F2DDC
	bl sub_0200E390
	mov r0, #0
	str r0, [r4, #0xc]
_021F2DDC:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _021F2DEA
	bl sub_0200E390
	mov r0, #0
	str r0, [r4, #0x10]
_021F2DEA:
	ldr r0, [r4, #0x14]
	cmp r0, #0
	beq _021F2DF8
	bl sub_0200E390
	mov r0, #0
	str r0, [r4, #0x14]
_021F2DF8:
	mov r1, #2
	ldr r0, _021F2E28 ; =0x04000018
	lsl r1, r1, #0x16
	str r1, [r0]
	mov r1, #0
	strb r1, [r4]
	strb r1, [r4, #1]
	strb r1, [r4, #2]
	strh r1, [r4, #0x18]
	strh r1, [r4, #0x1a]
	strh r1, [r4, #0x26]
	strh r1, [r4, #0x2e]
	strh r1, [r4, #0x24]
	strh r1, [r4, #0x2c]
	mov r3, #0xc
	str r3, [r4, #0x28]
	mov r2, #4
	str r2, [sp]
	add r0, #0x38
	mov r2, #1
	bl sub_020CF15C
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_021F2E28: .word 0x04000018
	thumb_func_end ov96_021F2D98

	thumb_func_start ov96_021F2E2C
ov96_021F2E2C: ; 0x021F2E2C
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x14]
	cmp r0, #0
	bne _021F2E44
	ldr r0, _021F2E48 ; =ov96_021F2E4C
	str r1, [r4, #0x28]
	add r1, r4, #0
	mov r2, #0
	bl sub_0200E320
	str r0, [r4, #0x14]
_021F2E44:
	pop {r4, pc}
	nop
_021F2E48: .word ov96_021F2E4C
	thumb_func_end ov96_021F2E2C

	thumb_func_start ov96_021F2E4C
ov96_021F2E4C: ; 0x021F2E4C
	push {r4, lr}
	mov r2, #0x2c
	ldrsh r4, [r1, r2]
	ldrh r2, [r1, #0x2e]
	lsl r3, r2, #2
	ldr r2, _021F2E7C ; =0x0221DB5C
	ldr r2, [r2, r3]
	add r2, r4, r2
	strh r2, [r1, #0x2c]
	ldrh r2, [r1, #0x2e]
	add r2, r2, #1
	strh r2, [r1, #0x2e]
	ldrh r2, [r1, #0x2e]
	cmp r2, #5
	blo _021F2E7A
	mov r2, #0
	strh r2, [r1, #0x2c]
	str r2, [r1, #0x14]
	strh r2, [r1, #0x2e]
	mov r2, #0xc
	str r2, [r1, #0x28]
	bl sub_0200E390
_021F2E7A:
	pop {r4, pc}
	.balign 4, 0
_021F2E7C: .word 0x0221DB5C
	thumb_func_end ov96_021F2E4C

	thumb_func_start ov96_021F2E80
ov96_021F2E80: ; 0x021F2E80
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r1, #0
	add r6, r0, #0
	ldr r0, [r5, #0x28]
	add r4, r3, #0
	add r7, r2, #0
	cmp r0, r4
	bne _021F2EC4
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	ldr r1, [sp, #4]
	add r0, r6, #0
	bl ov96_021E60D8
	ldrb r0, [r0, #2]
	cmp r0, #0
	beq _021F2EC4
	mov r1, #0
	str r1, [sp]
	mov r2, #0x2c
	ldrsh r2, [r5, r2]
	ldr r3, [sp, #0x20]
	add r0, r7, #0
	bl ov96_021EAED4
_021F2EC4:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F2E80

	thumb_func_start ov96_021F2EC8
ov96_021F2EC8: ; 0x021F2EC8
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r0, [r4]
	ldr r2, _021F2EF8 ; =0x0221BC5C
	add r1, r4, #4
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4, #0x14]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	nop
_021F2EF8: .word 0x0221BC5C
	thumb_func_end ov96_021F2EC8

	thumb_func_start ov96_021F2EFC
ov96_021F2EFC: ; 0x021F2EFC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r7, r1, #0
	add r0, r5, #4
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r2, _021F2F74 ; =0x00000135
	ldr r3, [r5, #0x14]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r4, r0, #0
	ldr r0, [r5, #0x14]
	bl ScrStrBufs_new
	mov r1, #0
	str r1, [sp]
	mov r2, #1
	str r2, [sp, #4]
	add r2, r7, #0
	mov r3, #3
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x14]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9e
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F2F78 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #4
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r4, #0
	bl DestroyMsgData
	add r0, r5, #4
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F2F74: .word 0x00000135
_021F2F78: .word 0x000F0E00
	thumb_func_end ov96_021F2EFC

	thumb_func_start ov96_021F2F7C
ov96_021F2F7C: ; 0x021F2F7C
	push {lr}
	sub sp, #0xc
	add r3, sp, #4
	str r3, [sp]
	asr r3, r1, #0xb
	lsr r3, r3, #0x14
	add r3, r1, r3
	asr r1, r3, #0xc
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, sp, #8
	bl ov96_021EB06C
	ldr r0, [sp, #8]
	cmp r0, #0x10
	blt _021F2FAE
	cmp r0, #0xf0
	bge _021F2FAE
	ldr r0, [sp, #4]
	cmp r0, #0x10
	blt _021F2FAE
	cmp r0, #0xb0
	blt _021F2FB4
_021F2FAE:
	add sp, #0xc
	mov r0, #1
	pop {pc}
_021F2FB4:
	mov r0, #0
	add sp, #0xc
	pop {pc}
	.balign 4, 0
	thumb_func_end ov96_021F2F7C

	thumb_func_start ov96_021F2FBC
ov96_021F2FBC: ; 0x021F2FBC
	ldrh r3, [r1, #2]
	ldrh r2, [r0, #2]
	cmp r2, r3
	bls _021F2FCA
	mov r0, #0
	mvn r0, r0
	bx lr
_021F2FCA:
	cmp r2, r3
	bhs _021F2FD2
	mov r0, #1
	bx lr
_021F2FD2:
	ldrh r1, [r1]
	ldrh r0, [r0]
	cmp r0, r1
	bhs _021F2FE0
	mov r0, #0
	mvn r0, r0
	bx lr
_021F2FE0:
	cmp r0, r1
	bls _021F2FE8
	mov r0, #1
	bx lr
_021F2FE8:
	mov r0, #0
	bx lr
	thumb_func_end ov96_021F2FBC

	thumb_func_start ov96_021F2FEC
ov96_021F2FEC: ; 0x021F2FEC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	add r5, r0, #0
	add r6, r1, #0
	mov r4, #0
_021F2FF6:
	lsl r1, r4, #2
	add r0, sp, #0x14
	add r7, r0, r1
	strh r4, [r0, r1]
	add r0, r6, r4
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #8]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x1b
	ldr r2, [sp, #8]
	lsl r0, r0, #4
	mul r0, r2
	mov r2, #0x90
	mul r2, r1
	add r0, r5, r0
	add r0, r2, r0
	ldr r2, [sp, #4]
	ldrb r1, [r6, r4]
	ldrb r2, [r2, #0xc]
	ldr r0, [r0, #0x20]
	add r3, sp, #0x10
	bl ov96_021EB06C
	ldr r0, [sp, #0xc]
	strh r0, [r7, #2]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _021F2FF6
	mov r0, #0x7f
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	ldr r3, _021F30A0 ; =ov96_021F2FBC
	str r0, [sp]
	add r0, sp, #0x14
	mov r1, #0xc
	mov r2, #4
	bl sub_020E3A84
	mov r4, #0
_021F305A:
	lsl r1, r4, #2
	add r0, sp, #0x14
	ldrh r0, [r0, r1]
	mov r1, #3
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	add r0, r7, #0
	bl _s32_div_f
	add r6, r0, #0
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x1b
	add r2, r1, #0
	lsl r0, r0, #4
	add r3, r6, #0
	mul r3, r0
	mov r0, #0x90
	mul r2, r0
	add r0, r5, r3
	add r0, r2, r0
	ldr r0, [r0, #0x20]
	add r1, r4, #6
	bl ov96_021EABA8
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _021F305A
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	nop
_021F30A0: .word ov96_021F2FBC
	thumb_func_end ov96_021F2FEC

	thumb_func_start ov96_021F30A4
ov96_021F30A4: ; 0x021F30A4
	push {r4, lr}
	mov r1, #0x84
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x84
	add r4, r0, #0
	bl MIi_CpuFill8
	add r0, r4, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F30A4

	thumb_func_start ov96_021F30BC
ov96_021F30BC: ; 0x021F30BC
	ldr r3, _021F30C0 ; =FreeToHeap
	bx r3
	.balign 4, 0
_021F30C0: .word FreeToHeap
	thumb_func_end ov96_021F30BC

	thumb_func_start ov96_021F30C4
ov96_021F30C4: ; 0x021F30C4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r7, r1, #0
	mov r4, #0
_021F30CC:
	add r0, r7, #0
	mov r1, #0x65
	mov r2, #2
	bl ov96_021EB4F4
	str r0, [r5, #0xc]
	bl ov96_021EB5B8
	add r6, r0, #0
	mov r1, #1
	bl sub_02024B78
	add r0, r6, #0
	mov r1, #0x64
	bl sub_02024ADC
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #8
	blt _021F30CC
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F30C4

	thumb_func_start ov96_021F30F8
ov96_021F30F8: ; 0x021F30F8
	push {r4, r5, r6, lr}
	add r5, r0, #0
	cmp r5, #0xf
	bne _021F3104
	mov r0, #0
	pop {r4, r5, r6, pc}
_021F3104:
	cmp r5, #1
	bhs _021F310C
	mov r0, #0
	b _021F311E
_021F310C:
	cmp r5, #6
	bhs _021F3114
	mov r0, #1
	b _021F311E
_021F3114:
	cmp r5, #0xa
	bhs _021F311C
	mov r0, #2
	b _021F311E
_021F311C:
	mov r0, #3
_021F311E:
	cmp r1, #1
	bne _021F3128
	mov r4, #1
	mov r6, #5
	b _021F3136
_021F3128:
	cmp r1, #2
	bne _021F3132
	mov r4, #6
	mov r6, #4
	b _021F3136
_021F3132:
	mov r4, #0xa
	mov r6, #5
_021F3136:
	cmp r1, r0
	bne _021F316C
	cmp r5, r4
	bhs _021F3142
	bl GF_AssertFail
_021F3142:
	bl LCRandom
	sub r1, r6, #1
	bl _s32_div_f
	sub r0, r5, r4
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r0, r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r1, r6, #0
	bl _u32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	add r0, r0, r4
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, r5, r6, pc}
_021F316C:
	bl LCRandom
	add r1, r6, #0
	bl _s32_div_f
	add r0, r4, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F30F8

	thumb_func_start ov96_021F3180
ov96_021F3180: ; 0x021F3180
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #4]
	cmp r0, #0xf
	bne _021F3194
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021F3194:
	mov r5, #0
	str r5, [sp, #0xc]
	lsl r4, r0, #2
_021F319A:
	ldr r0, _021F31E8 ; =0x0221DBC8
	ldr r1, [r0, r4]
	lsl r0, r5, #3
	add r3, r1, r0
	ldr r0, [r1, r0]
	cmp r0, #0
	beq _021F31E2
	lsl r1, r0, #2
	ldr r0, _021F31EC ; =0x0221DBB8
	add r0, r0, r1
	sub r0, r0, #4
	ldr r0, [r0]
	add r1, r7, #0
	str r0, [sp, #8]
	ldrh r0, [r0]
	str r0, [sp]
	ldrh r2, [r3, #4]
	ldrh r3, [r3, #6]
	add r0, r6, #0
	bl ov96_021F32FC
	cmp r0, #0
	beq _021F31D8
	ldr r0, [sp, #8]
	ldrh r0, [r0, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	ldr r0, [sp, #4]
	strb r5, [r0]
	b _021F31E2
_021F31D8:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #4
	blo _021F319A
_021F31E2:
	ldr r0, [sp, #0xc]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F31E8: .word 0x0221DBC8
_021F31EC: .word 0x0221DBB8
	thumb_func_end ov96_021F3180

	thumb_func_start ov96_021F31F0
ov96_021F31F0: ; 0x021F31F0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r1, [sp]
	add r5, r0, #0
	ldr r0, [sp]
	mov r7, #0
	lsl r1, r0, #2
	ldr r0, _021F3294 ; =0x0221DBC8
	ldr r4, [r0, r1]
_021F3202:
	ldr r0, [r4]
	cmp r0, #0
	beq _021F3288
	add r0, r5, #0
	add r0, #0x80
	ldr r0, [r0]
	lsl r0, r0, #4
	add r6, r5, r0
	ldr r0, [r5, r0]
	cmp r0, #1
	bne _021F321C
	bl GF_AssertFail
_021F321C:
	mov r0, #1
	str r0, [r6]
	ldr r0, [sp]
	str r0, [r6, #8]
	add r0, r5, #0
	str r4, [r6, #4]
	add r0, #0x80
	ldr r0, [r0]
	lsl r0, r0, #4
	add r0, r5, r0
	ldr r0, [r0, #0xc]
	bl ov96_021EB5B8
	add r6, r0, #0
	add r0, r5, #0
	add r0, #0x80
	ldr r0, [r0]
	mov r1, #1
	lsl r0, r0, #4
	add r0, r5, r0
	ldr r0, [r0, #0xc]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, [r4]
	add r0, r6, #0
	sub r1, r1, #1
	bl sub_020248F0
	mov r0, #0
	str r0, [sp, #0xc]
	ldrh r0, [r4, #4]
	add r1, sp, #4
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	ldrh r0, [r4, #6]
	lsl r0, r0, #0xc
	str r0, [sp, #8]
	add r0, r6, #0
	bl sub_020247D4
	add r0, r5, #0
	add r0, #0x80
	ldr r0, [r0]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1d
	sub r1, r1, r2
	mov r0, #0x1d
	ror r1, r0
	add r0, r5, #0
	add r1, r2, r1
	add r0, #0x80
	str r1, [r0]
_021F3288:
	add r7, r7, #1
	add r4, #8
	cmp r7, #4
	blt _021F3202
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F3294: .word 0x0221DBC8
	thumb_func_end ov96_021F31F0

	thumb_func_start ov96_021F3298
ov96_021F3298: ; 0x021F3298
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	mov r4, #0
	mov r7, #0xf
_021F32A2:
	ldr r0, [r5, #8]
	cmp r6, r0
	bne _021F32BA
	str r7, [r5, #8]
	mov r0, #0
	str r0, [r5, #4]
	str r0, [r5]
	mov r1, #0
	ldr r0, [r5, #0xc]
	add r2, r1, #0
	bl ov96_021EB52C
_021F32BA:
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #8
	blt _021F32A2
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F3298

	thumb_func_start ov96_021F32C4
ov96_021F32C4: ; 0x021F32C4
	push {r4, lr}
	mov r4, #0
	cmp r0, #5
	bhi _021F32F4
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F32D8: ; jump table
	.short _021F32F4 - _021F32D8 - 2 ; case 0
	.short _021F32E4 - _021F32D8 - 2 ; case 1
	.short _021F32E8 - _021F32D8 - 2 ; case 2
	.short _021F32EC - _021F32D8 - 2 ; case 3
	.short _021F32F4 - _021F32D8 - 2 ; case 4
	.short _021F32F0 - _021F32D8 - 2 ; case 5
_021F32E4:
	mov r4, #1
	b _021F32F8
_021F32E8:
	mov r4, #2
	b _021F32F8
_021F32EC:
	mov r4, #3
	b _021F32F8
_021F32F0:
	mov r4, #4
	b _021F32F8
_021F32F4:
	bl GF_AssertFail
_021F32F8:
	add r0, r4, #0
	pop {r4, pc}
	thumb_func_end ov96_021F32C4

	thumb_func_start ov96_021F32FC
ov96_021F32FC: ; 0x021F32FC
	push {r3, lr}
	sub sp, #0x18
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	lsl r0, r1, #0xc
	str r0, [sp, #0x10]
	mov r1, #0
	lsl r0, r2, #0xc
	str r0, [sp]
	lsl r0, r3, #0xc
	str r0, [sp, #4]
	add r0, sp, #0xc
	str r1, [sp, #0x14]
	str r1, [sp, #8]
	add r1, sp, #0
	add r2, r0, #0
	bl VEC_Subtract
	add r0, sp, #0xc
	bl VEC_Mag
	add r1, sp, #0x10
	ldrh r1, [r1, #0x10]
	lsl r1, r1, #0xc
	cmp r1, r0
	ble _021F3336
	add sp, #0x18
	mov r0, #1
	pop {r3, pc}
_021F3336:
	mov r0, #0
	add sp, #0x18
	pop {r3, pc}
	thumb_func_end ov96_021F32FC

	thumb_func_start ov96_021F333C
ov96_021F333C: ; 0x021F333C
	push {r4, r5, r6, r7}
	mov r4, #0
	add r3, r4, #0
	add r5, r4, #0
	lsl r2, r0, #2
_021F3346:
	ldr r0, _021F3388 ; =0x0221DBC8
	ldr r6, [r0, r2]
	add r0, r6, r5
	ldr r6, [r6, r5]
	cmp r6, #0
	bne _021F335C
	mov r0, #0
	str r0, [r1]
	strh r0, [r1, #4]
	strh r0, [r1, #6]
	b _021F3378
_021F335C:
	lsl r7, r6, #2
	ldr r6, _021F338C ; =0x0221DBB8
	add r6, r6, r7
	sub r6, r6, #4
	ldr r6, [r6]
	ldrh r6, [r6]
	str r6, [r1]
	ldrh r6, [r0, #4]
	strh r6, [r1, #4]
	ldrh r0, [r0, #6]
	strh r0, [r1, #6]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_021F3378:
	add r3, r3, #1
	add r5, #8
	add r1, #8
	cmp r3, #4
	blt _021F3346
	add r0, r4, #0
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
_021F3388: .word 0x0221DBC8
_021F338C: .word 0x0221DBB8
	thumb_func_end ov96_021F333C

	thumb_func_start ov96_021F3390
ov96_021F3390: ; 0x021F3390
	push {r4, r5, r6, lr}
	add r5, r1, #0
	ldr r1, _021F33D4 ; =0x000004EC
	add r6, r2, #0
	bl AllocFromHeap
	ldr r2, _021F33D4 ; =0x000004EC
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	ldr r0, _021F33D8 ; =0x000004E4
	mov r1, #4
	sub r2, r1, r5
	strb r5, [r4, r0]
	add r1, r0, #6
	strb r2, [r4, r1]
	ldrb r2, [r4, r1]
	add r1, r0, #5
	cmp r6, #0
	strb r2, [r4, r1]
	bne _021F33C0
	mov r1, #0x14
	b _021F33C2
_021F33C0:
	mov r1, #0xa
_021F33C2:
	add r0, r0, #3
	strb r1, [r4, r0]
	ldr r0, _021F33DC ; =0x000004E7
	ldrb r1, [r4, r0]
	sub r0, r0, #1
	strb r1, [r4, r0]
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	nop
_021F33D4: .word 0x000004EC
_021F33D8: .word 0x000004E4
_021F33DC: .word 0x000004E7
	thumb_func_end ov96_021F3390

	thumb_func_start ov96_021F33E0
ov96_021F33E0: ; 0x021F33E0
	push {r3, r4, r5, lr}
	add r5, r0, #0
	lsl r4, r1, #5
	add r0, r5, r4
	str r2, [r0, #4]
	ldr r2, [sp, #0x10]
	str r3, [r0, #8]
	str r2, [r0, #0xc]
	ldr r2, [sp, #0x14]
	str r2, [r0, #0x10]
	mov r2, #0
	mvn r2, r2
	str r2, [r5, r4]
	ldr r2, [sp, #0x1c]
	str r1, [r0, #0x14]
	str r2, [r0, #0x1c]
	add r0, r1, #0
	mov r1, #3
	bl _s32_div_f
	ldr r1, _021F3420 ; =0x000004E9
	ldrb r1, [r5, r1]
	cmp r0, r1
	blt _021F3418
	ldr r1, [sp, #0x18]
	add r0, r5, r4
	str r1, [r0, #0x18]
	pop {r3, r4, r5, pc}
_021F3418:
	mov r1, #0
	add r0, r5, r4
	str r1, [r0, #0x18]
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F3420: .word 0x000004E9
	thumb_func_end ov96_021F33E0

	thumb_func_start ov96_021F3424
ov96_021F3424: ; 0x021F3424
	ldr r3, _021F3428 ; =FreeToHeap
	bx r3
	.balign 4, 0
_021F3428: .word FreeToHeap
	thumb_func_end ov96_021F3424

	thumb_func_start ov96_021F342C
ov96_021F342C: ; 0x021F342C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, _021F34FC ; =0x000004EA
	add r7, r1, #0
	ldrb r1, [r5, r0]
	mov r4, #0xc
	cmp r1, #4
	bne _021F3440
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
_021F3440:
	sub r1, r0, #4
	ldrb r1, [r5, r1]
	add r2, r1, #1
	sub r1, r0, #4
	strb r2, [r5, r1]
	ldrb r2, [r5, r1]
	sub r1, r0, #3
	ldrb r1, [r5, r1]
	cmp r2, r1
	blo _021F3484
	add r1, r0, #0
	mov r2, #1
	sub r1, #0x3a
	str r2, [r5, r1]
	sub r2, r0, #4
	mov r1, #0
	strb r1, [r5, r2]
	sub r0, r0, #6
	ldrb r0, [r5, r0]
	cmp r0, #0
	bls _021F3484
	ldr r2, _021F3500 ; =0x000004B4
	add r0, r1, #0
	add r3, r2, #0
	add r3, #0x30
_021F3472:
	lsl r6, r1, #2
	add r6, r5, r6
	str r0, [r6, r2]
	add r1, r1, #1
	lsl r1, r1, #0x18
	ldrb r6, [r5, r3]
	lsr r1, r1, #0x18
	cmp r1, r6
	blo _021F3472
_021F3484:
	mov r0, #0x4b
	lsl r0, r0, #4
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _021F34F6
	add r1, r0, #0
	add r1, #0x39
	ldrb r4, [r5, r1]
	add r1, r0, #0
	add r1, #0x38
	add r0, #0x35
	ldrb r2, [r5, r1]
	mov r1, #2
	ldrb r0, [r5, r0]
	sub r1, r1, r2
	add r2, r4, r0
	lsl r0, r2, #1
	add r0, r2, r0
	add r6, r1, r0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	cmp r0, r4
	bge _021F34BA
	bl GF_AssertFail
_021F34BA:
	lsl r1, r6, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	add r2, r7, #0
	bl ov96_021F350C
	lsl r0, r6, #0x18
	lsr r4, r0, #0x18
	ldr r0, _021F3504 ; =0x000004E5
	ldrb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, r0]
	sub r1, r0, #1
	ldrb r2, [r5, r0]
	ldrb r1, [r5, r1]
	cmp r2, r1
	blo _021F34F6
	mov r1, #0
	strb r1, [r5, r0]
	add r0, r0, #3
	ldrb r0, [r5, r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	ldr r0, _021F3508 ; =0x000004E8
	strb r1, [r5, r0]
	mov r1, #0
	sub r0, #0x38
	str r1, [r5, r0]
_021F34F6:
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F34FC: .word 0x000004EA
_021F3500: .word 0x000004B4
_021F3504: .word 0x000004E5
_021F3508: .word 0x000004E8
	thumb_func_end ov96_021F342C

	thumb_func_start ov96_021F350C
ov96_021F350C: ; 0x021F350C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x198
	lsl r1, r1, #5
	str r0, [sp, #8]
	add r0, r0, r1
	str r2, [sp, #0xc]
	str r0, [sp, #0x20]
	ldr r0, [r0, #0x10]
	ldr r0, [r0]
	cmp r0, #0
	bne _021F3524
	b _021F3800
_021F3524:
	ldr r0, [sp, #0x20]
	ldr r0, [r0, #0x18]
	cmp r0, #0
	bne _021F3534
	bl GF_AssertFail
	add sp, #0x198
	pop {r3, r4, r5, r6, r7, pc}
_021F3534:
	ldr r1, _021F3804 ; =0x000004E8
	ldr r0, [sp, #8]
	ldrb r0, [r0, r1]
	sub r1, #0x34
	lsl r2, r0, #2
	ldr r0, [sp, #8]
	add r0, r0, r2
	ldr r0, [r0, r1]
	cmp r0, #3
	bge _021F356C
	bl LCRandom
	mov r1, #0x64
	bl _s32_div_f
	cmp r1, #0x1e
	bge _021F356C
	ldr r0, [sp, #8]
	ldr r1, _021F3808 ; =0x000004B4
	add sp, #0x198
	add r2, r0, r1
	add r1, #0x34
	ldrb r0, [r0, r1]
	lsl r1, r0, #2
	ldr r0, [r2, r1]
	add r0, r0, #1
	str r0, [r2, r1]
	pop {r3, r4, r5, r6, r7, pc}
_021F356C:
	ldr r5, [sp, #8]
	mov r4, #0
	add r6, sp, #0x3c
	add r7, sp, #0x38
_021F3574:
	ldr r0, [r5, #0x10]
	ldr r0, [r0]
	cmp r0, #0
	beq _021F35A6
	ldr r2, [r5, #0xc]
	add r3, sp, #0x40
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x1c]
	ldmia r2!, {r1, r2}
	bl ov96_021EAF78
	ldr r1, [sp, #0x40]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, [sp, #0x3c]
	asr r0, r0, #0xc
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	bl ov96_021F38FC
	b _021F35AA
_021F35A6:
	mov r0, #0
	mvn r0, r0
_021F35AA:
	add r4, r4, #1
	str r0, [r5]
	add r5, #0x20
	cmp r4, #0xc
	blt _021F3574
	ldr r0, [sp, #0x20]
	ldr r2, [r0, #0xc]
	add r0, sp, #0x44
	str r0, [sp]
	ldr r3, [r2]
	ldr r0, [sp, #0x20]
	asr r1, r3, #0xb
	lsr r1, r1, #0x14
	add r1, r3, r1
	ldr r3, [r2, #4]
	ldr r0, [r0, #0x1c]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #0x48
	bl ov96_021EB06C
	ldr r0, [sp, #0x48]
	ldr r1, [sp, #0x44]
	bl ov96_021F38FC
	ldr r1, [sp, #0x20]
	str r0, [r1]
	ldr r0, [sp, #0xc]
	add r1, sp, #0xb0
	bl ov96_021F333C
	mov r6, #0
	ldr r5, [sp, #8]
	add r4, sp, #0xb0
	sub r7, r6, #1
_021F35F6:
	ldr r0, [r4]
	cmp r0, #0
	ble _021F360C
	ldrh r0, [r4, #4]
	ldrh r1, [r4, #6]
	bl ov96_021F38FC
	mov r1, #0x4a
	lsl r1, r1, #4
	str r0, [r5, r1]
	b _021F3612
_021F360C:
	mov r0, #0x4a
	lsl r0, r0, #4
	str r7, [r5, r0]
_021F3612:
	add r6, r6, #1
	add r4, #8
	add r5, r5, #4
	cmp r6, #4
	blt _021F35F6
	ldr r0, [sp, #0x48]
	ldr r1, [sp, #0x44]
	lsl r0, r0, #0x10
	lsl r1, r1, #0x10
	add r2, sp, #0x24
	lsr r0, r0, #0x10
	lsr r1, r1, #0x10
	add r2, #2
	add r3, sp, #0x24
	bl ov96_021F3B04
	cmp r0, #0
	bne _021F363A
	bl GF_AssertFail
_021F363A:
	ldr r4, [sp, #8]
	mov r0, #0
	mov r1, #6
	str r0, [sp, #0x1c]
	str r0, [sp, #0x18]
	add r6, r0, #0
	lsl r1, r1, #6
	add r0, r4, #0
	add r5, r0, r1
	add r0, sp, #0x24
	mov r1, #2
	ldrsh r1, [r0, r1]
	add r7, sp, #0x134
	str r1, [sp, #0x14]
	ldr r1, [sp, #0x1c]
	ldrsh r0, [r0, r1]
	str r0, [sp, #0x10]
_021F365C:
	mov r0, #0x67
	lsl r0, r0, #2
	str r6, [r4, r0]
	add r0, r6, #0
	mov r1, #5
	bl _s32_div_f
	ldr r0, [sp, #0x14]
	sub r1, r1, #2
	add r1, r1, r0
	mov r0, #6
	lsl r0, r0, #6
	str r1, [r4, r0]
	add r0, r6, #0
	mov r1, #5
	bl _s32_div_f
	sub r1, r0, #2
	ldr r0, [sp, #0x10]
	add r1, r1, r0
	mov r0, #0x61
	lsl r0, r0, #2
	str r1, [r4, r0]
	sub r0, r0, #4
	ldr r1, [r4, r0]
	cmp r1, #0
	blt _021F36A4
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	blt _021F36A4
	cmp r1, #7
	bge _021F36A4
	cmp r0, #5
	blt _021F36AE
_021F36A4:
	mov r0, #0x19
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r4, r0]
	b _021F36B6
_021F36AE:
	mov r0, #0x19
	mov r1, #1
	lsl r0, r0, #4
	str r1, [r4, r0]
_021F36B6:
	mov r0, #6
	lsl r0, r0, #6
	ldr r1, [r4, r0]
	ldr r0, [sp, #0x14]
	sub r1, r1, r0
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r2, [r4, r0]
	ldr r0, [sp, #0x10]
	str r5, [r7]
	sub r0, r2, r0
	mov r2, #0
	mvn r2, r2
	cmp r1, r2
	blt _021F36F2
	cmp r1, #1
	bgt _021F36F2
	add r1, r2, #0
	cmp r0, r1
	blt _021F36F2
	cmp r0, #1
	bgt _021F36F2
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #0x1c]
	add r1, r1, #1
	str r1, [sp, #0x1c]
	lsl r0, r0, #2
	add r1, sp, #0x8c
	str r5, [r1, r0]
	b _021F3700
_021F36F2:
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x18]
	add r1, r1, #1
	str r1, [sp, #0x18]
	lsl r0, r0, #2
	add r1, sp, #0x4c
	str r5, [r1, r0]
_021F3700:
	add r6, r6, #1
	add r4, #0x20
	add r5, #0x20
	add r7, r7, #4
	cmp r6, #0x19
	blt _021F365C
	ldr r0, [sp, #0x1c]
	cmp r0, #9
	beq _021F3716
	bl GF_AssertFail
_021F3716:
	ldr r0, [sp, #0x18]
	cmp r0, #0x10
	beq _021F3720
	bl GF_AssertFail
_021F3720:
	mov r0, #9
	add r1, sp, #0x8c
	bl ov96_021F380C
	ldr r1, [sp, #0x48]
	ldr r0, [sp, #0x9c]
	ldr r3, [sp, #0x20]
	str r1, [r0, #8]
	ldr r1, [sp, #0x44]
	ldr r0, [sp, #0x9c]
	add r2, sp, #0xb0
	str r1, [r0, #0xc]
	add r0, sp, #0x8c
	str r0, [sp]
	ldr r0, [sp, #8]
	mov r1, #9
	bl ov96_021F3888
	mov r0, #9
	add r1, sp, #0x8c
	add r2, sp, #0xd0
	bl ov96_021F3B38
	add r4, r0, #0
	ldr r0, [sp, #0xd0]
	ldr r0, [r0, #0x18]
	cmp r0, #3
	blt _021F379C
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x16
	add r0, sp, #0xd0
	ldr r2, [r0, r1]
	add r0, sp, #0x30
	str r0, [sp]
	ldr r0, [sp, #0x20]
	ldr r1, [r2, #8]
	ldr r0, [r0, #0x1c]
	ldr r2, [r2, #0xc]
	add r3, sp, #0x34
	bl ov96_021EB0A4
	ldr r0, [sp, #0x34]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x20]
	ldr r0, [r0, #0x18]
	str r1, [r0]
	ldr r0, [sp, #0x30]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x20]
	ldr r0, [r0, #0x18]
	str r1, [r0, #4]
	ldr r0, [sp, #0x20]
	mov r1, #0
	ldr r0, [r0, #0x18]
	add sp, #0x198
	str r1, [r0, #8]
	pop {r3, r4, r5, r6, r7, pc}
_021F379C:
	mov r0, #0x10
	add r1, sp, #0x4c
	bl ov96_021F380C
	add r0, sp, #0x134
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r3, [sp, #0x20]
	mov r1, #0x19
	add r2, sp, #0xb0
	bl ov96_021F3888
	mov r0, #0x19
	add r1, sp, #0x134
	add r2, sp, #0xd0
	bl ov96_021F3B38
	add r4, r0, #0
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x16
	add r0, sp, #0xd0
	ldr r2, [r0, r1]
	add r0, sp, #0x28
	str r0, [sp]
	ldr r0, [sp, #0x20]
	ldr r1, [r2, #8]
	ldr r0, [r0, #0x1c]
	ldr r2, [r2, #0xc]
	add r3, sp, #0x2c
	bl ov96_021EB0A4
	ldr r0, [sp, #0x2c]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x20]
	ldr r0, [r0, #0x18]
	str r1, [r0]
	ldr r0, [sp, #0x28]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x20]
	ldr r0, [r0, #0x18]
	str r1, [r0, #4]
	ldr r0, [sp, #0x20]
	mov r1, #0
	ldr r0, [r0, #0x18]
	str r1, [r0, #8]
_021F3800:
	add sp, #0x198
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F3804: .word 0x000004E8
_021F3808: .word 0x000004B4
	thumb_func_end ov96_021F350C

	thumb_func_start ov96_021F380C
ov96_021F380C: ; 0x021F380C
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	ldr r0, [sp]
	add r5, r1, #0
	mov r7, #0
	cmp r0, #0
	bls _021F3884
_021F381A:
	lsl r4, r7, #2
	ldr r6, [r5, r4]
	ldr r0, [r6, #0x10]
	cmp r0, #0
	beq _021F386A
	bl LCRandom
	ldr r1, [r6]
	lsl r3, r0, #0x1b
	lsl r2, r1, #5
	lsr r1, r0, #0x1f
	sub r3, r3, r1
	mov r0, #0x1b
	ror r3, r0
	add r2, #0x10
	add r0, r1, r3
	add r0, r2, r0
	str r0, [r6, #8]
	ldr r6, [r5, r4]
	bl LCRandom
	ldr r1, [r6, #4]
	lsl r3, r0, #0x1b
	lsl r2, r1, #5
	lsr r1, r0, #0x1f
	sub r3, r3, r1
	mov r0, #0x1b
	ror r3, r0
	add r0, r1, r3
	add r2, #0x10
	add r0, r2, r0
	str r0, [r6, #0xc]
	ldr r0, [r5, r4]
	mov r1, #7
	ldr r2, [r0, #4]
	ldr r3, [r0]
	mul r1, r2
	add r1, r3, r1
	str r1, [r0, #0x14]
	b _021F3878
_021F386A:
	mov r0, #0
	mvn r0, r0
	str r0, [r6, #8]
	ldr r1, [r5, r4]
	str r0, [r1, #0xc]
	ldr r1, [r5, r4]
	str r0, [r1, #0x14]
_021F3878:
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp]
	cmp r7, r0
	blo _021F381A
_021F3884:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F380C

	thumb_func_start ov96_021F3888
ov96_021F3888: ; 0x021F3888
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	str r1, [sp, #0xc]
	add r7, r0, #0
	ldr r0, [sp, #0xc]
	mov r4, #0
	str r2, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r5, [sp, #0x30]
	cmp r0, #0
	bls _021F38F6
_021F389E:
	lsl r6, r4, #2
	ldr r2, [r5, r6]
	ldr r0, [r2, #0x10]
	cmp r0, #0
	bne _021F38B0
	mov r0, #0x63
	mvn r0, r0
	str r0, [r2, #0x18]
	b _021F38EA
_021F38B0:
	ldr r0, [r2, #8]
	ldr r1, [sp, #0x10]
	str r0, [sp]
	ldr r0, [r2, #0xc]
	ldr r3, [sp, #0x14]
	str r0, [sp, #4]
	add r0, sp, #0x18
	str r0, [sp, #8]
	ldr r2, [r2, #0x14]
	add r0, r7, #0
	bl ov96_021F3930
	ldr r1, [r5, r6]
	str r0, [r1, #0x18]
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _021F38EA
	ldr r3, [r5, r6]
	ldr r1, [sp, #0x10]
	add r0, r3, #0
	add r0, #0xc
	str r0, [sp]
	ldr r2, [r3, #0x14]
	add r0, r7, #0
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	add r3, #8
	bl ov96_021F3AD8
_021F38EA:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	ldr r0, [sp, #0xc]
	cmp r4, r0
	blo _021F389E
_021F38F6:
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F3888

	thumb_func_start ov96_021F38FC
ov96_021F38FC: ; 0x021F38FC
	sub r0, #0x10
	asr r2, r0, #4
	lsr r2, r2, #0x1b
	add r2, r0, r2
	sub r1, #0x10
	asr r0, r1, #4
	lsr r0, r0, #0x1b
	asr r3, r2, #5
	add r0, r1, r0
	asr r2, r0, #5
	cmp r3, #0
	blt _021F3918
	cmp r2, #0
	bge _021F391E
_021F3918:
	mov r0, #0
	mvn r0, r0
	bx lr
_021F391E:
	mov r1, #7
	add r0, r2, #0
	mul r0, r1
	add r0, r3, r0
	cmp r0, #0x22
	ble _021F392E
	add r0, r1, #0
	sub r0, #8
_021F392E:
	bx lr
	thumb_func_end ov96_021F38FC

	thumb_func_start ov96_021F3930
ov96_021F3930: ; 0x021F3930
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r2, #0
	str r0, [sp]
	str r1, [sp, #4]
	add r6, r3, #0
	mov r4, #0
	ldr r7, [sp, #0x28]
	cmp r5, #0
	bge _021F394A
	add sp, #8
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
_021F394A:
	str r4, [r7]
	ldr r0, [r6, #8]
	ldrh r0, [r0]
	cmp r0, #0
	beq _021F3992
	ldr r0, [r6, #0x10]
	ldr r0, [r0]
	cmp r0, #1
	bne _021F3992
	add r0, r1, #0
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x24]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	bl ov96_021F3A5C
	cmp r0, #0
	beq _021F3970
	add r4, r4, #5
_021F3970:
	lsl r1, r5, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	bl ov96_021F3AB0
	cmp r0, #0
	beq _021F3984
	mov r0, #1
	add r4, r4, #4
	str r0, [r7]
_021F3984:
	ldr r0, [sp]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_021F39F0
	add r4, r4, r0
	b _021F39E8
_021F3992:
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x24]
	ldr r0, [sp, #4]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	bl ov96_021F3A5C
	cmp r0, #0
	beq _021F39A6
	add r4, r4, #5
_021F39A6:
	lsl r1, r5, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	bl ov96_021F3AB0
	cmp r0, #0
	beq _021F39BA
	mov r0, #1
	add r4, r4, #4
	str r0, [r7]
_021F39BA:
	ldr r0, [sp]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_021F39F0
	cmp r0, #0
	bne _021F39CA
	add r4, r4, #2
_021F39CA:
	ldr r1, [r6]
	cmp r1, r5
	bne _021F39D2
	add r4, r4, #2
_021F39D2:
	cmp r0, #0
	beq _021F39D8
	mov r4, #0
_021F39D8:
	ldr r2, [r6, #0xc]
	ldr r0, [sp, #4]
	ldmia r2!, {r1, r2}
	bl ov96_021F3A5C
	cmp r0, #0
	beq _021F39E8
	add r4, r4, #4
_021F39E8:
	add r0, r4, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F3930

	thumb_func_start ov96_021F39F0
ov96_021F39F0: ; 0x021F39F0
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r0, r1, #0
	str r1, [sp]
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	str r2, [sp, #4]
	cmp r1, r0
	bne _021F3A0C
	add sp, #0xc
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021F3A0C:
	ldr r0, [sp]
	mov r4, #0
	ldr r7, [r0, #0x14]
	add r6, r4, #0
_021F3A14:
	cmp r6, r7
	beq _021F3A4C
	ldr r1, [r5]
	ldr r0, [sp, #4]
	cmp r0, r1
	bne _021F3A4C
	ldr r0, [sp]
	ldr r1, [r0, #4]
	ldr r0, [r5, #4]
	cmp r1, r0
	bge _021F3A4A
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	mov r1, #3
	bl _s32_div_f
	ldr r1, [sp, #8]
	cmp r1, r0
	bne _021F3A46
	sub r4, r4, #1
	b _021F3A4C
_021F3A46:
	sub r4, r4, #2
	b _021F3A4C
_021F3A4A:
	sub r4, r4, #1
_021F3A4C:
	add r6, r6, #1
	add r5, #0x20
	cmp r6, #0xc
	blt _021F3A14
	add r0, r4, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F39F0

	thumb_func_start ov96_021F3A5C
ov96_021F3A5C: ; 0x021F3A5C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	mov r4, #0
	add r5, r0, #0
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	str r4, [sp, #0x14]
	add r7, r4, #0
	add r6, sp, #0
_021F3A6E:
	ldr r0, [r5]
	cmp r0, #0
	ble _021F3AA8
	ldrh r0, [r5, #4]
	add r1, r6, #0
	add r2, r6, #0
	lsl r0, r0, #0xc
	str r0, [sp]
	ldrh r0, [r5, #6]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	add r0, sp, #0xc
	str r7, [sp, #8]
	bl VEC_Subtract
	add r0, r6, #0
	bl VEC_Mag
	ldr r1, [r5]
	lsl r1, r1, #0xc
	cmp r0, r1
	bge _021F3AA0
	add sp, #0x18
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F3AA0:
	add r4, r4, #1
	add r5, #8
	cmp r4, #4
	blt _021F3A6E
_021F3AA8:
	mov r0, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F3A5C

	thumb_func_start ov96_021F3AB0
ov96_021F3AB0: ; 0x021F3AB0
	push {r4, r5}
	mov r5, #0
	mov r2, #0x4a
	lsl r2, r2, #4
	sub r3, r5, #1
_021F3ABA:
	ldr r4, [r0, r2]
	cmp r4, r3
	beq _021F3AD2
	cmp r1, r4
	bne _021F3ACA
	mov r0, #1
	pop {r4, r5}
	bx lr
_021F3ACA:
	add r5, r5, #1
	add r0, r0, #4
	cmp r5, #4
	blt _021F3ABA
_021F3AD2:
	mov r0, #0
	pop {r4, r5}
	bx lr
	thumb_func_end ov96_021F3AB0

	thumb_func_start ov96_021F3AD8
ov96_021F3AD8: ; 0x021F3AD8
	push {r3, r4, r5, r6}
	mov r4, #0x4a
	mov r6, #0
	lsl r4, r4, #4
_021F3AE0:
	ldr r5, [r0, r4]
	cmp r2, r5
	bne _021F3AF8
	lsl r0, r6, #3
	add r1, r1, r0
	ldrh r0, [r1, #4]
	str r0, [r3]
	ldrh r1, [r1, #6]
	ldr r0, [sp, #0x10]
	str r1, [r0]
	pop {r3, r4, r5, r6}
	bx lr
_021F3AF8:
	add r6, r6, #1
	add r0, r0, #4
	cmp r6, #4
	blt _021F3AE0
	pop {r3, r4, r5, r6}
	bx lr
	thumb_func_end ov96_021F3AD8

	thumb_func_start ov96_021F3B04
ov96_021F3B04: ; 0x021F3B04
	push {r3, r4}
	sub r0, #0x10
	asr r4, r0, #4
	lsr r4, r4, #0x1b
	add r4, r0, r4
	asr r0, r4, #5
	sub r1, #0x10
	strh r0, [r2]
	asr r0, r1, #4
	lsr r0, r0, #0x1b
	add r0, r1, r0
	asr r0, r0, #5
	strh r0, [r3]
	mov r0, #0
	ldrsh r1, [r2, r0]
	cmp r1, #0
	blt _021F3B2C
	ldrsh r0, [r3, r0]
	cmp r0, #0
	bge _021F3B32
_021F3B2C:
	mov r0, #0
	pop {r3, r4}
	bx lr
_021F3B32:
	mov r0, #1
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021F3B04

	thumb_func_start ov96_021F3B38
ov96_021F3B38: ; 0x021F3B38
	push {r4, r5, r6, r7, lr}
	sub sp, #0x13c
	add r6, r0, #0
	add r0, sp, #0x10
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp]
	add r7, r2, #0
	str r0, [sp, #0xc]
	mov ip, r1
	ldr r0, [sp]
	cmp r6, #0
	bls _021F3BAE
_021F3B54:
	add r2, r0, #1
	mov r1, #0xc
	mul r1, r2
	add r2, sp, #4
	lsl r4, r0, #2
	mov r3, ip
	ldr r3, [r3, r4]
	add r2, r2, r1
	str r3, [r2, #8]
	mov r3, #0
	str r3, [r2, #4]
	add r4, r3, #0
	add r3, sp, #4
	str r4, [r3, r1]
	add r1, r4, #0
	cmp r0, #0
	bls _021F3B9C
	ldr r4, [r2, #8]
	ldr r4, [r4, #0x18]
_021F3B7A:
	ldr r3, [r3, #4]
	ldr r5, [r3, #8]
	ldr r5, [r5, #0x18]
	cmp r5, r4
	bge _021F3B92
	ldr r4, [r3]
	str r2, [r4, #4]
	ldr r4, [r3]
	str r4, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _021F3B9C
_021F3B92:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r0
	blo _021F3B7A
_021F3B9C:
	cmp r1, r0
	bne _021F3BA4
	str r2, [r3, #4]
	str r3, [r2]
_021F3BA4:
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, r6
	blo _021F3B54
_021F3BAE:
	ldr r0, [sp, #8]
	mov r2, #0
	ldr r0, [r0, #8]
	cmp r6, #0
	ldr r1, [r0, #0x18]
	add r0, sp, #4
	bls _021F3BE0
_021F3BBC:
	ldr r0, [r0, #4]
	lsl r4, r2, #2
	ldr r3, [r0, #8]
	str r3, [r7, r4]
	ldr r3, [r7, r4]
	ldr r3, [r3, #0x18]
	cmp r1, r3
	bne _021F3BD6
	ldr r3, [sp]
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	str r3, [sp]
_021F3BD6:
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	cmp r2, r6
	blo _021F3BBC
_021F3BE0:
	ldr r0, [sp]
	cmp r0, #0
	bne _021F3BEA
	bl GF_AssertFail
_021F3BEA:
	ldr r0, [sp]
	add sp, #0x13c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F3B38

	thumb_func_start ov96_021F3BF0
ov96_021F3BF0: ; 0x021F3BF0
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0x5d
	lsl r1, r1, #2
	add r5, r0, #0
	add r7, r2, #0
	bl AllocFromHeap
	mov r2, #0x5d
	add r4, r0, #0
	mov r1, #0
	lsl r2, r2, #2
	bl MIi_CpuFill8
	str r5, [r4]
	str r6, [r4, #8]
	add r0, r4, #0
	str r7, [r4, #4]
	bl ov96_021F4558
	ldr r2, _021F3C34 ; =0x00000135
	mov r0, #1
	mov r1, #0x1b
	add r3, r5, #0
	bl NewMsgDataFromNarc
	str r0, [r4, #0x5c]
	add r0, r5, #0
	bl ScrStrBufs_new
	str r0, [r4, #0x60]
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F3C34: .word 0x00000135
	thumb_func_end ov96_021F3BF0

	thumb_func_start ov96_021F3C38
ov96_021F3C38: ; 0x021F3C38
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	mov r4, #0
	add r5, r7, #0
_021F3C40:
	add r0, r5, #0
	add r0, #0x98
	ldr r0, [r0]
	bl FreeToHeap
	add r0, r5, #0
	add r0, #0x9c
	ldr r0, [r0]
	bl FreeToHeap
	add r4, r4, #1
	add r5, #8
	cmp r4, #0xc
	blt _021F3C40
	mov r6, #0x55
	mov r5, #0
	add r4, r7, #0
	lsl r6, r6, #2
_021F3C64:
	ldr r0, [r4, r6]
	bl FreeToHeap
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #4
	blt _021F3C64
	mov r0, #0x59
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	bl FreeToHeap
	mov r6, #0x5a
	mov r5, #0
	add r4, r7, #0
	lsl r6, r6, #2
_021F3C84:
	ldr r0, [r4, r6]
	bl FreeToHeap
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #2
	blt _021F3C84
	ldr r0, [r7, #0x60]
	bl ScrStrBufs_delete
	ldr r0, [r7, #0x5c]
	bl DestroyMsgData
	add r4, r7, #0
	mov r5, #0
	add r4, #0xc
_021F3CA4:
	add r0, r4, #0
	bl RemoveWindow
	add r5, r5, #1
	add r4, #0x10
	cmp r5, #5
	blt _021F3CA4
	add r0, r7, #0
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F3C38

	thumb_func_start ov96_021F3CBC
ov96_021F3CBC: ; 0x021F3CBC
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5]
	mov r1, #0xd
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, sp, #0xc
	bl GfGfxLoader_GetScrnData
	ldr r3, [sp, #0xc]
	add r4, r0, #0
	add r2, r3, #0
	ldr r0, [r5, #8]
	ldr r3, [r3, #8]
	mov r1, #5
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r2, #0
	ldr r0, [r5, #8]
	mov r1, #5
	add r3, r2, #0
	bl sub_0201CA4C
	ldr r0, [r5, #8]
	mov r1, #5
	bl ScheduleBgTilemapBufferTransfer
	add r0, r4, #0
	bl FreeToHeap
	mov r1, #0x17
	ldr r0, [r5]
	add r3, r1, #0
	add r3, #0xe9
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x5a
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r1, #0x18
	ldr r0, [r5]
	add r3, r1, #0
	add r3, #0xec
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x5b
	lsl r1, r1, #2
	str r0, [r5, r1]
	sub r1, #0x6c
	ldr r3, [r5, r1]
	ldr r0, [r5, #8]
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #7
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #8
	mov r1, #0
	bl sub_02022CC8
	mov r1, #0x12
	ldr r0, [r5]
	add r3, r1, #0
	add r3, #0xfa
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x55
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r1, #0x13
	ldr r0, [r5]
	add r3, r1, #0
	add r3, #0xfd
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x56
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r1, #0x11
	ldr r0, [r5]
	add r3, r1, #0
	add r3, #0xf7
	str r0, [sp]
	mov r0, #0xa7
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x57
	lsl r1, r1, #2
	str r0, [r5, r1]
	ldr r0, [r5]
	mov r1, #0x14
	str r0, [sp]
	mov r0, #0xa7
	add r3, r0, #0
	add r3, #0x6d
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x16
	lsl r1, r1, #4
	str r0, [r5, r1]
	ldr r0, [r5]
	mov r1, #0x10
	str r0, [sp]
	mov r0, #0xa7
	add r3, r0, #0
	add r3, #0x71
	mov r2, #0
	add r3, r5, r3
	bl GfGfxLoader_GetScrnData
	mov r1, #0x59
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r0, #0x80
	add r1, r0, #0
	add r1, #0x8c
	ldr r1, [r5, r1]
	bl ov96_021F4FD8
	mov r0, #0x80
	add r1, r0, #0
	add r1, #0x90
	ldr r1, [r5, r1]
	bl ov96_021F4FD8
	mov r0, #0x80
	add r1, r0, #0
	add r1, #0x94
	ldr r1, [r5, r1]
	bl ov96_021F4FD8
	mov r0, #0x80
	add r1, r0, #0
	add r1, #0x88
	ldr r1, [r5, r1]
	bl ov96_021F4FD8
	mov r0, #0x80
	add r1, r0, #0
	add r1, #0x98
	ldr r1, [r5, r1]
	bl ov96_021F4FD8
	mov r0, #0x43
	lsl r0, r0, #2
	ldr r3, [r5, r0]
	ldr r0, [r5, #8]
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #6
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	add r0, r5, #0
	ldr r1, [r5, #8]
	add r0, #0x68
	bl ov96_021F4EF8
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #3
	str r0, [sp, #8]
	mov r2, #0
	ldr r0, [r5, #8]
	mov r1, #6
	add r3, r2, #0
	bl sub_0201CA4C
	ldr r0, [r5, #8]
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021F3CBC

	thumb_func_start ov96_021F3E58
ov96_021F3E58: ; 0x021F3E58
	ldr r3, _021F3E5C ; =ov96_021F4484
	bx r3
	.balign 4, 0
_021F3E5C: .word ov96_021F4484
	thumb_func_end ov96_021F3E58

	thumb_func_start ov96_021F3E60
ov96_021F3E60: ; 0x021F3E60
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, _021F3EBC ; =0x0221BFF4
	add r4, sp, #8
	ldr r1, [r0, #8]
	ldr r0, [r0, #0xc]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	mov r6, #0
	mov r7, #2
_021F3E76:
	str r7, [sp]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #9
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #6
	bl ov96_021EB2F4
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB334
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB36C
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _021F3E76
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F3EBC: .word 0x0221BFF4
	thumb_func_end ov96_021F3E60

	thumb_func_start ov96_021F3EC0
ov96_021F3EC0: ; 0x021F3EC0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	str r0, [sp, #4]
	ldr r0, _021F3F7C ; =0x0221BFF4
	str r1, [sp, #8]
	ldr r2, [r0, #0x10]
	ldr r1, [r0, #0x14]
	str r2, [sp, #0x1c]
	str r1, [sp, #0x20]
	ldr r1, [r0, #0x18]
	ldr r0, [r0, #0x1c]
	add r5, sp, #0x1c
	add r4, sp, #0x14
	str r1, [sp, #0x14]
	str r0, [sp, #0x18]
	mov r6, #0
	mov r7, #3
_021F3EE2:
	ldr r0, [r4]
	add r1, r7, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	ldr r3, [r5]
	ldr r0, [sp, #4]
	lsl r3, r3, #0x18
	mov r2, #2
	lsr r3, r3, #0x18
	bl ov96_021EB408
	add r6, r6, #1
	add r4, r4, #4
	add r5, r5, #4
	cmp r6, #2
	blt _021F3EE2
	mov r0, #0
	ldr r4, [sp, #8]
	str r0, [sp, #0xc]
	add r7, sp, #0x14
	add r6, sp, #0x1c
	mov r5, #0x40
_021F3F10:
	ldr r1, [r6]
	ldr r2, [r7]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xf8
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xf8
	ldr r0, [r0]
	bl ov96_021EB5B8
	mov r1, #2
	str r0, [sp, #0x10]
	bl sub_02024ADC
	mov r0, #0
	str r0, [sp, #0x2c]
	lsl r0, r5, #0xc
	str r0, [sp, #0x24]
	mov r0, #0x26
	lsl r0, r0, #0x10
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x10]
	add r1, sp, #0x24
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0xf8
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0xc]
	add r7, r7, #4
	add r0, r0, #1
	add r6, r6, #4
	add r4, r4, #4
	add r5, #0x80
	str r0, [sp, #0xc]
	cmp r0, #2
	blt _021F3F10
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	bl ov96_021F440C
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F3F7C: .word 0x0221BFF4
	thumb_func_end ov96_021F3EC0

	thumb_func_start ov96_021F3F80
ov96_021F3F80: ; 0x021F3F80
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	ldr r3, _021F4248 ; =0x0221BFF4
	add r4, r1, #0
	add r2, sp, #0x18
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	ldrb r6, [r3, #4]
	add r2, sp, #0x10
	add r5, r0, #0
	strb r6, [r2, #4]
	ldrb r6, [r3, #5]
	add r4, #0x68
	strb r6, [r2, #5]
	ldrb r6, [r3, #6]
	strb r6, [r2, #6]
	ldrb r6, [r3, #7]
	strb r6, [r2, #7]
	ldrb r6, [r3]
	strb r6, [r2]
	ldrb r6, [r3, #1]
	strb r6, [r2, #1]
	ldrb r6, [r3, #2]
	strb r6, [r2, #2]
	ldrb r3, [r3, #3]
	strb r3, [r2, #3]
	mov r2, #8
	str r2, [sp]
	mov r2, #2
	mov r3, #0x69
	bl ov96_021EB408
	mov r0, #9
	str r0, [sp]
	add r0, r5, #0
	mov r1, #0
	mov r2, #2
	mov r3, #0x69
	bl ov96_021EB408
	mov r0, #0xa
	str r0, [sp]
	add r0, r5, #0
	mov r1, #1
	mov r2, #2
	mov r3, #0x69
	bl ov96_021EB408
	mov r6, #0
	mov r7, #0xb
_021F3FE8:
	add r0, r5, #0
	mov r1, #0
	mov r2, #2
	mov r3, #0x69
	str r7, [sp]
	bl ov96_021EB408
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #2
	blo _021F3FE8
	mov r6, #0
	mov r7, #0xc
_021F4004:
	add r0, r5, #0
	mov r1, #1
	mov r2, #2
	mov r3, #0x69
	str r7, [sp]
	bl ov96_021EB408
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #4
	blo _021F4004
	mov r6, #0
	mov r7, #0xd
_021F4020:
	add r0, r5, #0
	mov r1, #1
	mov r2, #2
	mov r3, #0x69
	str r7, [sp]
	bl ov96_021EB408
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #4
	blo _021F4020
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #8
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xb4
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xb4
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r6, r0, #0
	mov r1, #4
	bl sub_02024ADC
	add r0, r6, #0
	mov r1, #0
	bl sub_020248F0
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp, #0x18]
	mov r0, #0x22
	lsl r0, r0, #0x10
	str r0, [sp, #0x1c]
	add r0, r6, #0
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0xb4
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #9
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xb8
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xb8
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r6, r0, #0
	mov r1, #3
	bl sub_02024ADC
	add r0, r6, #0
	mov r1, #1
	bl sub_020248F0
	mov r0, #0x26
	lsl r0, r0, #0xe
	str r0, [sp, #0x18]
	mov r0, #0x22
	lsl r0, r0, #0x10
	str r0, [sp, #0x1c]
	add r0, r6, #0
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0xb8
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #0xa
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xc4
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r6, r0, #0
	mov r1, #5
	bl sub_02024ADC
	add r0, r6, #0
	mov r1, #0xd
	bl sub_020248F0
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, #2
	lsl r0, r0, #0x14
	str r0, [sp, #0x1c]
	add r0, r6, #0
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	mov r6, #0
_021F411C:
	lsl r7, r6, #2
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #0xb
	bl ov96_021EB4F4
	add r1, r4, r7
	add r1, #0xbc
	str r0, [r1]
	add r0, r4, r7
	add r0, #0xbc
	ldr r0, [r0]
	bl ov96_021EB5B8
	str r0, [sp, #4]
	mov r1, #6
	bl sub_02024ADC
	add r1, r6, #0
	ldr r0, [sp, #4]
	add r1, #0xb
	bl sub_020248F0
	mov r0, #0xa0
	mul r0, r6
	add r0, #0x30
	lsl r0, r0, #0xc
	str r0, [sp, #0x18]
	mov r0, #0x86
	lsl r0, r0, #0xe
	str r0, [sp, #0x1c]
	ldr r0, [sp, #4]
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, r7
	add r0, #0xbc
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #2
	blo _021F411C
	mov r6, #0
_021F417C:
	lsl r7, r6, #2
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #0xc
	bl ov96_021EB4F4
	add r1, r4, r7
	add r1, #0xc8
	str r0, [r1]
	add r0, r4, r7
	add r0, #0xc8
	ldr r0, [r0]
	bl ov96_021EB5B8
	str r0, [sp, #8]
	mov r1, #8
	bl sub_02024ADC
	ldr r0, [sp, #8]
	mov r1, #0xe
	bl sub_020248F0
	add r0, sp, #0x14
	ldrb r0, [r0, r6]
	lsl r0, r0, #0xc
	str r0, [sp, #0x18]
	add r0, sp, #0x10
	ldrb r0, [r0, r6]
	lsl r1, r0, #0xc
	mov r0, #2
	lsl r0, r0, #0x14
	add r0, r1, r0
	str r0, [sp, #0x1c]
	ldr r0, [sp, #8]
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, r7
	add r0, #0xc8
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #4
	blo _021F417C
	mov r6, #0
_021F41E0:
	lsl r7, r6, #2
	add r0, r5, #0
	mov r1, #0x69
	mov r2, #0xd
	bl ov96_021EB4F4
	add r1, r4, r7
	add r1, #0xd8
	str r0, [r1]
	add r0, r4, r7
	add r0, #0xd8
	ldr r0, [r0]
	bl ov96_021EB5B8
	str r0, [sp, #0xc]
	mov r1, #7
	bl sub_02024ADC
	ldr r0, [sp, #0xc]
	mov r1, #0x12
	bl sub_020248F0
	add r0, sp, #0x14
	ldrb r0, [r0, r6]
	lsl r0, r0, #0xc
	str r0, [sp, #0x18]
	add r0, sp, #0x10
	ldrb r0, [r0, r6]
	lsl r1, r0, #0xc
	mov r0, #2
	lsl r0, r0, #0x14
	add r0, r1, r0
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0xc]
	add r1, sp, #0x18
	bl sub_020247D4
	add r0, r4, r7
	add r0, #0xd8
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #4
	blo _021F41E0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_021F4248: .word 0x0221BFF4
	thumb_func_end ov96_021F3F80

	thumb_func_start ov96_021F424C
ov96_021F424C: ; 0x021F424C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r5, r0, #0
	mov r4, #0
	add r6, r5, #0
	add r6, #0xc
	add r7, r4, #0
_021F425A:
	lsl r0, r4, #4
	add r0, r6, r0
	add r1, r7, #0
	bl FillWindowPixelBuffer
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F425A
	ldr r0, [r5, #4]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
	ldr r0, [r5, #4]
	ldr r1, [sp, #0x10]
	bl ov96_021E5F34
	ldr r1, [r5]
	bl sub_02028F68
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F4360 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0xc
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	mov r0, #0x13
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	bl ov96_021EB5B8
	ldr r1, [sp, #0x10]
	add r1, #0xe
	bl sub_020248F0
	ldr r0, [sp, #0x10]
	mov r4, #0
	add r1, r5, r0
	mov r0, #0x17
	lsl r0, r0, #4
	strb r4, [r1, r0]
	add r0, r5, #0
	str r0, [sp, #0x14]
	add r0, #0xc
	mov r6, #1
	str r0, [sp, #0x14]
_021F42D2:
	ldr r0, [sp, #0x10]
	cmp r4, r0
	beq _021F4332
	ldr r0, [r5, #4]
	add r1, r4, #0
	bl ov96_021E5F34
	ldr r1, [r5]
	bl sub_02028F68
	add r7, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F4360 ; =0x000F0E00
	lsl r1, r6, #4
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x14]
	add r2, r7, #0
	add r0, r0, r1
	mov r1, #0
	add r3, r1, #0
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	lsl r0, r6, #2
	add r1, r5, r0
	mov r0, #0x13
	lsl r0, r0, #4
	ldr r0, [r1, r0]
	bl ov96_021EB5B8
	add r1, r4, #0
	add r1, #0xe
	bl sub_020248F0
	mov r0, #0x17
	add r1, r5, r4
	lsl r0, r0, #4
	strb r6, [r1, r0]
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
_021F4332:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021F42D2
	add r0, r5, #0
	mov r1, #1
	bl ov96_021F459C
	mov r4, #0
	add r5, #0xc
_021F4348:
	lsl r0, r4, #4
	add r0, r5, r0
	bl CopyWindowToVram
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F4348
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F4360: .word 0x000F0E00
	thumb_func_end ov96_021F424C

	thumb_func_start ov96_021F4364
ov96_021F4364: ; 0x021F4364
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r2, [r5, #0x64]
	add r4, r1, #0
	cmp r2, r4
	beq _021F438E
	str r4, [r5, #0x64]
	bl ov96_021F459C
	mov r0, #0x12
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	bl ov96_021EB5B8
	add r1, r4, #0
	bl sub_020248F0
	add r5, #0x4c
	add r0, r5, #0
	bl CopyWindowToVram
_021F438E:
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021F4364

	thumb_func_start ov96_021F4390
ov96_021F4390: ; 0x021F4390
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r7, r1, #0
	cmp r2, #4
	bhi _021F43C0
	add r0, r2, r2
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F43A6: ; jump table
	.short _021F43C0 - _021F43A6 - 2 ; case 0
	.short _021F43B0 - _021F43A6 - 2 ; case 1
	.short _021F43B4 - _021F43A6 - 2 ; case 2
	.short _021F43B8 - _021F43A6 - 2 ; case 3
	.short _021F43BC - _021F43A6 - 2 ; case 4
_021F43B0:
	mov r5, #0x12
	b _021F43C6
_021F43B4:
	mov r5, #0x13
	b _021F43C6
_021F43B8:
	mov r5, #0x14
	b _021F43C6
_021F43BC:
	mov r5, #0x15
	b _021F43C6
_021F43C0:
	bl GF_AssertFail
	mov r5, #0x12
_021F43C6:
	mov r0, #5
	lsl r0, r0, #6
	add r4, r6, r0
	add r1, r6, r7
	add r0, #0x30
	ldrb r0, [r1, r0]
	mov r1, #1
	add r2, r1, #0
	lsl r6, r0, #2
	ldr r0, [r4, r6]
	bl ov96_021EB52C
	ldr r0, [r4, r6]
	bl ov96_021EB5B8
	add r1, r5, #0
	bl sub_020248F0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F4390

	thumb_func_start ov96_021F43EC
ov96_021F43EC: ; 0x021F43EC
	mov r3, #0
	add r2, r3, #0
_021F43F0:
	add r1, r0, r3
	add r1, #0x70
	strb r2, [r1]
	add r1, r3, #1
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	cmp r3, #0xc
	blo _021F43F0
	ldr r3, _021F4408 ; =ov96_021F4724
	str r2, [r0, #0x6c]
	add r0, #0x68
	bx r3
	.balign 4, 0
_021F4408: .word ov96_021F4724
	thumb_func_end ov96_021F43EC

	thumb_func_start ov96_021F440C
ov96_021F440C: ; 0x021F440C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp]
	ldr r0, _021F4480 ; =0x0221BFF4
	add r6, r1, #0
	ldr r1, [r0, #0x20]
	ldr r0, [r0, #0x24]
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
	mov r4, #0
_021F4420:
	lsl r5, r4, #2
	add r0, sp, #0x10
	ldr r7, [r0, r5]
	ldr r0, [sp]
	add r1, r7, #0
	mov r2, #0
	bl ov96_021EB5EC
	ldr r0, [r0]
	add r1, r7, #0
	str r0, [sp, #8]
	ldr r0, [sp]
	mov r2, #1
	bl ov96_021EB5EC
	ldr r0, [r0]
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	bl sub_0200AF00
	add r7, r0, #0
	ldr r0, [sp, #4]
	add r1, r7, #0
	bl sub_0200B0F8
	str r0, [sp, #0xc]
	add r0, r7, #0
	mov r1, #2
	bl sub_020B802C
	add r1, r6, r5
	add r1, #0x88
	str r0, [r1]
	ldr r0, [sp, #0xc]
	mov r1, #2
	bl sub_020B8078
	add r1, r6, r5
	add r1, #0x90
	str r0, [r1]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _021F4420
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F4480: .word 0x0221BFF4
	thumb_func_end ov96_021F440C

	thumb_func_start ov96_021F4484
ov96_021F4484: ; 0x021F4484
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
	add r7, sp, #0x10
_021F4490:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0xc]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	ldr r0, [r6, #4]
	ldr r1, [sp, #0xc]
	add r3, sp, #0x10
	bl ov96_021E6168
	ldrb r0, [r7, #6]
	mov r3, #2
	str r0, [sp]
	ldrh r0, [r7, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [sp, #0x1c]
	str r0, [sp, #8]
	ldrh r1, [r7]
	ldrb r2, [r7, #7]
	add r0, sp, #0x20
	bl sub_020701E4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldrh r0, [r7]
	str r0, [sp, #8]
	ldrh r0, [r7, #0x10]
	ldrh r1, [r7, #0x12]
	ldr r2, [r6]
	ldr r3, [sp, #0x1c]
	bl sub_0201457C
	add r1, r5, #0
	add r1, #0x98
	str r0, [r1]
	ldrh r0, [r7, #0x10]
	ldrh r1, [r7, #0x14]
	ldr r2, [r6]
	bl sub_02014450
	add r1, r5, #0
	add r1, #0x9c
	add r4, r4, #1
	add r5, #8
	str r0, [r1]
	cmp r4, #0xc
	blt _021F4490
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F4484

	thumb_func_start ov96_021F4504
ov96_021F4504: ; 0x021F4504
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	add r5, r0, #0
	add r4, r2, #0
	cmp r6, #2
	blo _021F4514
	bl GF_AssertFail
_021F4514:
	cmp r4, #0xc
	blo _021F451C
	bl GF_AssertFail
_021F451C:
	add r7, r5, #0
	lsl r4, r4, #3
	add r7, #0x30
	mov r1, #0x32
	ldr r0, [r7, r4]
	lsl r1, r1, #6
	bl DC_FlushRange
	lsl r6, r6, #2
	add r1, r5, r6
	mov r2, #0x32
	ldr r0, [r7, r4]
	ldr r1, [r1, #0x20]
	lsl r2, r2, #6
	bl sub_020CFECC
	add r7, r5, #0
	add r7, #0x34
	ldr r0, [r7, r4]
	mov r1, #0x20
	bl DC_FlushRange
	add r1, r5, r6
	ldr r0, [r7, r4]
	ldr r1, [r1, #0x28]
	mov r2, #0x20
	bl GXS_LoadOBJPltt
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F4504

	thumb_func_start ov96_021F4558
ov96_021F4558: ; 0x021F4558
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r5, #0
	ldr r7, _021F4598 ; =0x0221C028
	mov r4, #0
	add r6, #0xc
_021F4564:
	lsl r1, r4, #4
	lsl r2, r4, #3
	ldr r0, [r5, #8]
	add r1, r6, r1
	add r2, r7, r2
	bl AddWindow
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F4564
	mov r2, #0
	str r2, [sp]
	ldr r0, [r5, #8]
	mov r1, #4
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r5]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F4598: .word 0x0221C028
	thumb_func_end ov96_021F4558

	thumb_func_start ov96_021F459C
ov96_021F459C: ; 0x021F459C
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r4, r0, #0
	add r5, r1, #0
	add r0, #0x4c
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r1, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4, #0x60]
	add r2, r5, #0
	mov r3, #2
	bl BufferIntegerAsString
	ldr r0, [r4, #0x60]
	ldr r1, [r4, #0x5c]
	ldr r3, [r4]
	mov r2, #0x98
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r5, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F45F0 ; =0x000F0E00
	add r4, #0x4c
	str r0, [sp, #8]
	add r0, r4, #0
	add r2, r5, #0
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F45F0: .word 0x000F0E00
	thumb_func_end ov96_021F459C

	thumb_func_start ov96_021F45F4
ov96_021F45F4: ; 0x021F45F4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r5, #0
	add r4, #0x68
	add r6, r1, #0
	add r0, r4, #0
	add r1, r2, #0
	bl ov96_021F46BC
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r6, #0
	bne _021F461A
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _021F461A
	add r0, r5, #0
	bl ov96_021F43EC
_021F461A:
	ldr r0, [r4]
	cmp r0, #0
	beq _021F4668
	cmp r6, #0
	beq _021F4646
	ldr r0, [r4, #4]
	cmp r0, #0
	bne _021F4670
	mov r1, #1
	add r0, r4, #0
	str r1, [r4, #4]
	bl ov96_021F47F0
	cmp r0, #1
	beq _021F463C
	bl GF_AssertFail
_021F463C:
	ldr r1, [r5, #8]
	add r0, r4, #0
	bl ov96_021F480C
	b _021F4670
_021F4646:
	cmp r7, #0xc
	beq _021F4670
	add r0, r4, #0
	mov r1, #2
	bl ov96_021F47F0
	cmp r0, #0
	beq _021F4670
	ldr r0, _021F4684 ; =0x0000089E
	bl PlaySE
	ldr r1, [r5, #8]
	add r0, r4, #0
	add r2, r7, #0
	bl ov96_021F48A8
	b _021F4670
_021F4668:
	ldr r1, [r5, #8]
	add r0, r4, #0
	bl ov96_021F4A60
_021F4670:
	ldr r1, [r4, #0x14]
	cmp r1, #0
	beq _021F467C
	add r0, r5, #0
	blx r1
	pop {r3, r4, r5, r6, r7, pc}
_021F467C:
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F4684: .word 0x0000089E
	thumb_func_end ov96_021F45F4

	thumb_func_start ov96_021F4688
ov96_021F4688: ; 0x021F4688
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r6, r1, #0
	add r4, r2, #0
	bl ov96_021E5F24
	cmp r4, r0
	bne _021F46B2
	mov r0, #0x15
	lsl r0, r0, #4
	ldrb r0, [r5, r0]
	cmp r0, r6
	beq _021F46B2
	cmp r0, r6
	blo _021F46AC
	bl GF_AssertFail
_021F46AC:
	mov r0, #0x15
	lsl r0, r0, #4
	strb r6, [r5, r0]
_021F46B2:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021F4688

	thumb_func_start ov96_021F46B4
ov96_021F46B4: ; 0x021F46B4
	mov r1, #0x15
	lsl r1, r1, #4
	ldrb r0, [r0, r1]
	bx lr
	thumb_func_end ov96_021F46B4

	thumb_func_start ov96_021F46BC
ov96_021F46BC: ; 0x021F46BC
	push {r3, r4, r5, r6, r7}
	sub sp, #0xc
	mov r2, #0
	add r3, sp, #0
	add r4, r2, #0
	mov r5, #1
_021F46C8:
	ldrb r6, [r1, r2]
	cmp r6, #0
	beq _021F46DC
	add r7, r0, r2
	ldrb r6, [r7, #8]
	cmp r6, #0
	bne _021F46DC
	strb r5, [r7, #8]
	strb r5, [r3]
	b _021F46DE
_021F46DC:
	strb r4, [r3]
_021F46DE:
	add r2, r2, #1
	add r3, r3, #1
	cmp r2, #0xc
	blt _021F46C8
	mov r0, #0
	add r2, sp, #0
_021F46EA:
	ldrb r1, [r2]
	cmp r1, #0
	bne _021F46FA
	add r0, r0, #1
	add r2, r2, #1
	cmp r0, #0xc
	blt _021F46EA
	mov r0, #0xc
_021F46FA:
	add sp, #0xc
	pop {r3, r4, r5, r6, r7}
	bx lr
	thumb_func_end ov96_021F46BC

	thumb_func_start ov96_021F4700
ov96_021F4700: ; 0x021F4700
	ldr r0, [r0, #0x1c]
	cmp r0, r1
	bne _021F470A
	mov r0, #0
	bx lr
_021F470A:
	cmp r1, #1
	bne _021F4712
	mov r0, #1
	bx lr
_021F4712:
	cmp r1, #2
	bne _021F471E
	cmp r0, #1
	beq _021F471E
	mov r0, #1
	bx lr
_021F471E:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F4700

	thumb_func_start ov96_021F4724
ov96_021F4724: ; 0x021F4724
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	str r4, [r0]
	str r0, [sp]
	strh r4, [r0, #0x1a]
	add r5, r0, #0
	mov r6, #1
	add r7, r4, #0
_021F4734:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	add r1, r6, #0
	add r2, r7, #0
	bl ov96_021EB52C
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _021F4734
	ldr r0, _021F4784 ; =0x04001050
	mov r1, #0
	strh r1, [r0]
	ldr r0, [sp]
	bl ov96_021F4790
	mov r0, #8
	mov r1, #0
	bl sub_02022CC8
	mov r0, #1
	mov r1, #0
	bl sub_02022CC8
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x14]
	add r0, #0xea
	strb r1, [r0]
	ldr r0, [sp]
	add r0, #0xea
	str r0, [sp]
	ldrb r0, [r0]
	lsl r1, r0, #0x10
	ldr r0, _021F4788 ; =0x01FF0000
	and r1, r0
	ldr r0, _021F478C ; =0x04001018
	str r1, [r0]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F4784: .word 0x04001050
_021F4788: .word 0x01FF0000
_021F478C: .word 0x04001018
	thumb_func_end ov96_021F4724

	thumb_func_start ov96_021F4790
ov96_021F4790: ; 0x021F4790
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r5, r0, #0
	mov r6, #1
	add r7, r4, #0
_021F479A:
	lsl r0, r4, #2
	add r0, r5, r0
	add r0, #0xbc
	ldr r0, [r0]
	add r1, r6, #0
	add r2, r7, #0
	bl ov96_021EB52C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _021F479A
	mov r4, #0
	mov r7, #1
_021F47B8:
	lsl r6, r4, #2
	add r0, r5, r6
	add r0, #0xc8
	ldr r0, [r0]
	add r1, r7, #0
	mov r2, #0
	bl ov96_021EB52C
	add r0, r5, r6
	add r0, #0xd8
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021F47B8
	add r5, #0xc4
	ldr r0, [r5]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F4790

	thumb_func_start ov96_021F47F0
ov96_021F47F0: ; 0x021F47F0
	push {r4, lr}
	add r4, r0, #0
	bl ov96_021F4700
	cmp r0, #0
	beq _021F4806
	add r0, r4, #0
	bl ov96_021F4724
	mov r0, #1
	pop {r4, pc}
_021F4806:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F47F0

	thumb_func_start ov96_021F480C
ov96_021F480C: ; 0x021F480C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	mov r0, #1
	add r7, r1, #0
	add r1, r0, #0
	bl sub_02022CC8
	mov r4, #0
	mov r6, #1
_021F4820:
	lsl r0, r4, #2
	add r0, r5, r0
	add r0, #0xbc
	ldr r0, [r0]
	add r1, r6, #0
	add r2, r6, #0
	bl ov96_021EB52C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _021F4820
	mov r4, #0
	mov r6, #1
_021F483E:
	lsl r0, r4, #2
	add r0, r5, r0
	add r0, #0xc8
	ldr r0, [r0]
	add r1, r6, #0
	add r2, r6, #0
	bl ov96_021EB52C
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _021F483E
	add r0, r5, #0
	add r0, #0xa4
	ldr r3, [r0]
	add r0, r7, #0
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #6
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	add r0, r5, #0
	add r1, r7, #0
	bl ov96_021F4EF8
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #3
	mov r2, #0
	str r0, [sp, #8]
	add r0, r7, #0
	mov r1, #6
	add r3, r2, #0
	bl sub_0201CA4C
	add r0, r7, #0
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	ldr r0, _021F48A4 ; =ov96_021F4A9C
	str r0, [r5, #0x14]
	mov r0, #1
	str r0, [r5, #0x1c]
	str r0, [r5]
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_021F48A4: .word ov96_021F4A9C
	thumb_func_end ov96_021F480C

	thumb_func_start ov96_021F48A8
ov96_021F48A8: ; 0x021F48A8
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	add r1, r2, #0
	bl ov96_021F4E5C
	add r0, r5, #0
	add r0, #0xac
	ldr r3, [r0]
	add r0, r4, #0
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #6
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #0x20
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #3
	mov r2, #0
	str r0, [sp, #8]
	add r0, r4, #0
	mov r1, #6
	add r3, r2, #0
	bl sub_0201CA4C
	add r0, r4, #0
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	ldr r0, _021F48F8 ; =ov96_021F4AE0
	str r0, [r5, #0x14]
	mov r0, #2
	str r0, [r5, #0x1c]
	mov r0, #1
	str r0, [r5]
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_021F48F8: .word ov96_021F4AE0
	thumb_func_end ov96_021F48A8

	thumb_func_start ov96_021F48FC
ov96_021F48FC: ; 0x021F48FC
	push {r4, r5, lr}
	sub sp, #0x1c
	add r5, r0, #0
	add r4, r1, #0
	bl ov96_021F4CAC
	mov r0, #0
	mov r1, #1
	lsl r1, r1, #0xc
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	str r0, [sp, #0x14]
	str r1, [sp, #0x18]
	bl sub_020D3AB4
	mov r0, #0x60
	str r0, [sp]
	add r0, r4, #0
	mov r1, #7
	add r2, sp, #0xc
	mov r3, #0x80
	bl sub_0201BE7C
	add r0, r5, #0
	add r0, #0xa8
	ldr r3, [r0]
	add r0, r4, #0
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #6
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #3
	mov r2, #0
	str r0, [sp, #8]
	add r0, r4, #0
	mov r1, #6
	add r3, r2, #0
	bl sub_0201CA4C
	add r0, r4, #0
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add r0, r5, #0
	add r0, #0x9c
	ldr r3, [r0]
	add r0, r4, #0
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #7
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	add r0, r4, #0
	mov r1, #7
	bl ScheduleBgTilemapBufferTransfer
	ldr r0, _021F498C ; =ov96_021F4B34
	str r0, [r5, #0x14]
	mov r0, #3
	str r0, [r5, #0x1c]
	mov r0, #1
	str r0, [r5]
	add sp, #0x1c
	pop {r4, r5, pc}
	nop
_021F498C: .word ov96_021F4B34
	thumb_func_end ov96_021F48FC

	thumb_func_start ov96_021F4990
ov96_021F4990: ; 0x021F4990
	push {r3, r4, r5, lr}
	sub sp, #0x28
	add r5, r0, #0
	add r4, r1, #0
	add r1, sp, #0x1c
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	mov r0, #0xe
	lsl r0, r0, #0xe
	str r0, [sp, #0x1c]
	mov r0, #0x29
	lsl r0, r0, #0x10
	str r0, [sp, #0x20]
	add r0, r5, #0
	add r0, #0xc4
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r1, sp, #0x1c
	bl sub_020247D4
	add r3, r5, #0
	add r2, r5, #0
	add r3, #0xa8
	add r2, #0xa0
	ldr r3, [r3]
	ldr r2, [r2]
	ldr r3, [r3, #8]
	add r0, r4, #0
	mov r1, #6
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r0, #3
	mov r2, #0
	str r0, [sp, #8]
	add r0, r4, #0
	mov r1, #6
	add r3, r2, #0
	bl sub_0201CA4C
	add r0, r4, #0
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add r0, r5, #0
	add r0, #0x98
	ldr r3, [r0]
	add r0, r4, #0
	add r2, r3, #0
	ldr r3, [r3, #8]
	mov r1, #7
	add r2, #0xc
	bl BG_LoadScreenTilemapData
	add r0, r4, #0
	mov r1, #7
	bl ScheduleBgTilemapBufferTransfer
	ldr r1, _021F4A54 ; =0x3CCCCCCD
	ldr r0, _021F4A58 ; =0x45800000
	bl _fmul
	bl _ftoi
	mov r1, #0
	str r0, [sp, #0xc]
	str r1, [sp, #0x10]
	str r1, [sp, #0x14]
	str r0, [sp, #0x18]
	bl sub_020D3AB4
	mov r0, #0x60
	str r0, [sp]
	add r0, r4, #0
	mov r1, #7
	add r2, sp, #0xc
	mov r3, #0x80
	bl sub_0201BE7C
	mov r0, #8
	mov r1, #1
	bl sub_02022CC8
	ldr r0, _021F4A5C ; =ov96_021F4BB4
	str r0, [r5, #0x14]
	mov r0, #4
	str r0, [r5, #0x1c]
	mov r0, #1
	str r0, [r5]
	add sp, #0x28
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F4A54: .word 0x3CCCCCCD
_021F4A58: .word 0x45800000
_021F4A5C: .word ov96_021F4BB4
	thumb_func_end ov96_021F4990

	thumb_func_start ov96_021F4A60
ov96_021F4A60: ; 0x021F4A60
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	bl ov96_021F4724
	ldrh r0, [r5, #0x18]
	lsl r1, r0, #2
	ldr r0, _021F4A98 ; =0x0221DC04
	ldr r0, [r0, r1]
	cmp r0, #3
	bne _021F4A80
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021F48FC
	b _021F4A88
_021F4A80:
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021F4990
_021F4A88:
	ldrh r0, [r5, #0x18]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	strh r1, [r5, #0x18]
	pop {r3, r4, r5, pc}
	nop
_021F4A98: .word 0x0221DC04
	thumb_func_end ov96_021F4A60

	thumb_func_start ov96_021F4A9C
ov96_021F4A9C: ; 0x021F4A9C
	push {r3, r4, lr}
	sub sp, #0xc
	add r4, r0, #0
	ldr r0, _021F4ADC ; =0x00000151
	ldrb r1, [r4, r0]
	sub r0, r0, #1
	ldrb r0, [r4, r0]
	cmp r1, r0
	beq _021F4AD6
	add r0, r4, #0
	ldr r1, [r4, #8]
	add r0, #0x68
	bl ov96_021F4EF8
	mov r0, #0xc
	str r0, [sp]
	mov r0, #8
	str r0, [sp, #4]
	mov r2, #3
	str r2, [sp, #8]
	ldr r0, [r4, #8]
	mov r1, #6
	mov r3, #7
	bl sub_0201CA4C
	ldr r0, [r4, #8]
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
_021F4AD6:
	add sp, #0xc
	pop {r3, r4, pc}
	nop
_021F4ADC: .word 0x00000151
	thumb_func_end ov96_021F4A9C

	thumb_func_start ov96_021F4AE0
ov96_021F4AE0: ; 0x021F4AE0
	push {r4, lr}
	add r4, r0, #0
	add r4, #0x68
	ldrh r0, [r4, #0x1a]
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	cmp r0, #0x46
	bls _021F4AFA
	add r0, r4, #0
	bl ov96_021F4724
	pop {r4, pc}
_021F4AFA:
	add r2, r4, #0
	add r2, #0x90
	lsl r0, r0, #0x18
	ldr r1, _021F4B28 ; =0x0221C01C
	ldr r2, [r2]
	lsr r0, r0, #0x18
	bl ov96_021F4E9C
	add r0, r4, #0
	add r0, #0xea
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0xea
	add r1, #0x20
	add r4, #0xea
	strb r1, [r0]
	ldrb r0, [r4]
	lsl r1, r0, #0x10
	ldr r0, _021F4B2C ; =0x01FF0000
	and r1, r0
	ldr r0, _021F4B30 ; =0x04001018
	str r1, [r0]
	pop {r4, pc}
	.balign 4, 0
_021F4B28: .word 0x0221C01C
_021F4B2C: .word 0x01FF0000
_021F4B30: .word 0x04001018
	thumb_func_end ov96_021F4AE0

	thumb_func_start ov96_021F4B34
ov96_021F4B34: ; 0x021F4B34
	push {r3, r4, r5, lr}
	add r4, r0, #0
	add r4, #0x68
	ldrh r0, [r4, #0x1a]
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	cmp r0, #0x32
	bls _021F4B4E
	add r0, r4, #0
	bl ov96_021F4724
	pop {r3, r4, r5, pc}
_021F4B4E:
	cmp r0, #5
	bne _021F4B5C
	mov r0, #8
	mov r1, #1
	bl sub_02022CC8
	b _021F4B82
_021F4B5C:
	cmp r0, #0xf
	bls _021F4B82
	sub r0, #0xf
	cmp r0, #4
	bgt _021F4B82
	lsl r1, r0, #4
	asr r0, r1, #1
	lsr r0, r0, #0x1e
	add r0, r1, r0
	lsl r0, r0, #0xe
	lsr r5, r0, #0x10
	mov r3, #0x10
	ldr r0, _021F4BA8 ; =0x04001050
	mov r1, #8
	mov r2, #0x34
	sub r3, r3, r5
	str r5, [sp]
	bl sub_020CF15C
_021F4B82:
	ldrh r0, [r4, #0x1a]
	add r2, r4, #0
	add r2, #0x90
	lsl r0, r0, #0x18
	ldr r1, _021F4BAC ; =0x0221C050
	ldr r2, [r2]
	lsr r0, r0, #0x18
	bl ov96_021F4DAC
	ldrh r0, [r4, #0x1a]
	add r4, #0x94
	ldr r1, _021F4BB0 ; =0x0221C080
	lsl r0, r0, #0x18
	ldr r2, [r4]
	lsr r0, r0, #0x18
	bl ov96_021F4DAC
	pop {r3, r4, r5, pc}
	nop
_021F4BA8: .word 0x04001050
_021F4BAC: .word 0x0221C050
_021F4BB0: .word 0x0221C080
	thumb_func_end ov96_021F4B34

	thumb_func_start ov96_021F4BB4
ov96_021F4BB4: ; 0x021F4BB4
	push {r3, r4, r5, lr}
	sub sp, #0x20
	add r5, r0, #0
	add r4, r5, #0
	add r4, #0x68
	ldrh r0, [r4, #0x1a]
	add r0, r0, #1
	strh r0, [r4, #0x1a]
	ldrh r0, [r4, #0x1a]
	cmp r0, #0x50
	bls _021F4BD4
	add r0, r4, #0
	bl ov96_021F4724
	add sp, #0x20
	pop {r3, r4, r5, pc}
_021F4BD4:
	cmp r0, #0x29
	bne _021F4BE8
	add r0, r4, #0
	add r0, #0xc4
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _021F4BFA
_021F4BE8:
	cmp r0, #0x3d
	bne _021F4BFA
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_021F4BFA:
	ldrh r0, [r4, #0x1a]
	cmp r0, #0x28
	bhi _021F4C38
	bl _utof
	ldr r1, _021F4CA0 ; =0x42200000
	bl _fdiv
	add r1, r0, #0
	ldr r0, _021F4CA4 ; =0x45800000
	bl _fmul
	bl _ftoi
	mov r1, #0
	str r0, [sp, #0x10]
	str r1, [sp, #0x14]
	str r1, [sp, #0x18]
	str r0, [sp, #0x1c]
	bl sub_020D3AB4
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r5, #8]
	mov r1, #7
	add r2, sp, #0x10
	mov r3, #0x80
	bl sub_0201BE7C
	add sp, #0x20
	pop {r3, r4, r5, pc}
_021F4C38:
	bls _021F4C6E
	cmp r0, #0x3c
	bhi _021F4C6E
	mov r1, #0
	str r1, [sp, #0xc]
	sub r0, #0x28
	mov r1, #0x90
	mul r1, r0
	add r0, r1, #0
	mov r1, #0x14
	bl _s32_div_f
	add r0, #0x38
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	mov r0, #0x29
	lsl r0, r0, #0x10
	add r4, #0xc4
	str r0, [sp, #8]
	ldr r0, [r4]
	bl ov96_021EB5B8
	add r1, sp, #4
	bl sub_020247D4
	add sp, #0x20
	pop {r3, r4, r5, pc}
_021F4C6E:
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldrh r0, [r4, #0x1a]
	mov r1, #0x14
	sub r0, #0x3c
	lsl r0, r0, #4
	bl _s32_div_f
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	mov r3, #0x10
	ldr r0, _021F4CA8 ; =0x04001050
	mov r1, #8
	mov r2, #0x24
	sub r3, r3, r4
	str r4, [sp]
	bl sub_020CF15C
	add sp, #0x20
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021F4CA0: .word 0x42200000
_021F4CA4: .word 0x45800000
_021F4CA8: .word 0x04001050
	thumb_func_end ov96_021F4BB4

	thumb_func_start ov96_021F4CAC
ov96_021F4CAC: ; 0x021F4CAC
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r0, #0
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r5, r2, r1
	mov r4, #0
_021F4CC4:
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r6, r2, r1
	cmp r5, r6
	bne _021F4CE2
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xa
	blo _021F4CC4
_021F4CE2:
	cmp r4, #0xa
	bne _021F4CF4
	add r0, r5, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r6, r2, r1
_021F4CF4:
	bl LCRandom
	mov r1, #3
	bl _s32_div_f
	lsl r0, r5, #1
	add r0, r5, r0
	add r5, r0, r1
	bl LCRandom
	mov r1, #3
	bl _s32_div_f
	lsl r0, r6, #1
	add r0, r6, r0
	add r4, r0, r1
	lsl r2, r5, #0x18
	add r0, r7, #0
	mov r1, #0
	lsr r2, r2, #0x18
	bl ov96_021F4504
	lsl r2, r4, #0x18
	add r0, r7, #0
	mov r1, #1
	lsr r2, r2, #0x18
	bl ov96_021F4504
	add r0, r7, #0
	add r0, #0x90
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r4, sp, #0
	ldr r5, _021F4DA4 ; =0x0221C050
	add r3, r0, #0
	ldmia r5!, {r0, r1}
	add r2, r4, #0
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	str r0, [r4]
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0x14
	add r0, r1, r0
	str r0, [sp, #4]
	add r0, r3, #0
	add r1, r2, #0
	bl sub_020247D4
	add r0, r7, #0
	add r0, #0x94
	ldr r0, [r0]
	bl ov96_021EB5B8
	add r4, sp, #0
	ldr r5, _021F4DA8 ; =0x0221C080
	add r3, r0, #0
	ldmia r5!, {r0, r1}
	add r2, r4, #0
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	str r0, [r4]
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0x14
	add r0, r1, r0
	str r0, [sp, #4]
	add r0, r3, #0
	add r1, r2, #0
	bl sub_020247D4
	add r0, r7, #0
	add r0, #0x90
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r7, #0x94
	mov r1, #1
	ldr r0, [r7]
	add r2, r1, #0
	bl ov96_021EB52C
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_021F4DA4: .word 0x0221C050
_021F4DA8: .word 0x0221C080
	thumb_func_end ov96_021F4CAC

	thumb_func_start ov96_021F4DAC
ov96_021F4DAC: ; 0x021F4DAC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r4, r1, #0
	str r2, [sp]
	cmp r5, #5
	bhi _021F4DE0
	ldr r7, [r4]
	ldr r0, [r4, #0xc]
	ldr r6, [r4, #4]
	sub r1, r0, r7
	add r0, r1, #0
	mul r0, r5
	mov r1, #5
	bl _s32_div_f
	add r7, r7, r0
	ldr r0, [r4, #0x10]
	sub r1, r0, r6
	add r0, r1, #0
	mul r0, r5
	mov r1, #5
	bl _s32_div_f
	add r4, r6, r0
	b _021F4E3C
_021F4DE0:
	bls _021F4E12
	cmp r5, #0x2d
	bhi _021F4E12
	sub r0, r5, #5
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	ldr r7, [r4, #0xc]
	ldr r0, [r4, #0x18]
	ldr r6, [r4, #0x10]
	sub r1, r0, r7
	add r0, r1, #0
	mul r0, r5
	mov r1, #0x28
	bl _s32_div_f
	add r7, r7, r0
	ldr r0, [r4, #0x1c]
	sub r1, r0, r6
	add r0, r1, #0
	mul r0, r5
	mov r1, #0x28
	bl _s32_div_f
	add r4, r6, r0
	b _021F4E3C
_021F4E12:
	sub r5, #0x2d
	lsl r0, r5, #0x18
	lsr r5, r0, #0x18
	ldr r7, [r4, #0x18]
	ldr r0, [r4, #0x24]
	ldr r6, [r4, #0x1c]
	sub r1, r0, r7
	add r0, r1, #0
	mul r0, r5
	mov r1, #5
	bl _s32_div_f
	add r7, r7, r0
	ldr r0, [r4, #0x28]
	sub r1, r0, r6
	add r0, r1, #0
	mul r0, r5
	mov r1, #5
	bl _s32_div_f
	add r4, r6, r0
_021F4E3C:
	ldr r0, [sp]
	bl ov96_021EB5B8
	mov r1, #2
	lsl r1, r1, #0x14
	add r1, r4, r1
	str r1, [sp, #8]
	mov r1, #0
	str r1, [sp, #0xc]
	add r1, sp, #4
	str r7, [sp, #4]
	bl sub_020247D4
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F4DAC

	thumb_func_start ov96_021F4E5C
ov96_021F4E5C: ; 0x021F4E5C
	push {r3, r4, lr}
	sub sp, #0xc
	add r2, r1, #0
	add r4, r0, #0
	mov r1, #0
	bl ov96_021F4504
	add r0, r4, #0
	add r0, #0x90
	ldr r0, [r0]
	bl ov96_021EB5B8
	mov r1, #2
	lsl r1, r1, #0x12
	str r1, [sp]
	mov r1, #0x76
	lsl r1, r1, #0xe
	str r1, [sp, #4]
	mov r1, #0
	str r1, [sp, #8]
	add r1, sp, #0
	bl sub_020247D4
	add r4, #0x90
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	bl ov96_021EB52C
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F4E5C

	thumb_func_start ov96_021F4E9C
ov96_021F4E9C: ; 0x021F4E9C
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r2, #0
	cmp r0, #0xf
	bhi _021F4EB8
	ldr r5, [r1]
	ldr r1, [r1, #4]
	sub r1, r1, r5
	mul r0, r1
	mov r1, #0xf
	bl _s32_div_f
	add r5, r5, r0
	b _021F4ED8
_021F4EB8:
	bls _021F4EC2
	cmp r0, #0x3c
	bhi _021F4EC2
	ldr r5, [r1, #4]
	b _021F4ED8
_021F4EC2:
	ldr r5, [r1, #4]
	ldr r1, [r1, #8]
	sub r0, #0x3c
	lsl r0, r0, #0x18
	sub r1, r1, r5
	lsr r0, r0, #0x18
	mul r0, r1
	mov r1, #0xa
	bl _s32_div_f
	add r5, r5, r0
_021F4ED8:
	add r0, r4, #0
	bl ov96_021EB5B8
	mov r1, #2
	lsl r1, r1, #0x12
	str r1, [sp]
	lsl r1, r1, #2
	add r1, r5, r1
	str r1, [sp, #4]
	mov r1, #0
	str r1, [sp, #8]
	add r1, sp, #0
	bl sub_020247D4
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_021F4E9C

	thumb_func_start ov96_021F4EF8
ov96_021F4EF8: ; 0x021F4EF8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r5, r0, #0
	add r0, #0xe8
	ldrb r7, [r0]
	add r6, r1, #0
	mov r1, #0x64
	add r0, r7, #0
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	add r0, r7, #0
	mov r1, #0xa
	bl _s32_div_f
	mov r1, #0xa
	mul r1, r4
	sub r0, r0, r1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r7, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r7, #4
_021F4F86:
	str r7, [sp]
	mov r0, #8
	str r0, [sp, #4]
	add r0, r5, #0
	add r0, #0xb0
	ldr r0, [r0]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	add r2, r2, #3
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r1, #6
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	add r0, r6, #0
	mov r3, #7
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021F4F86
	add r0, r5, #0
	add r0, #0xe8
	ldrb r0, [r0]
	add r5, #0xe9
	strb r0, [r5]
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F4EF8

	thumb_func_start ov96_021F4FD8
ov96_021F4FD8: ; 0x021F4FD8
	push {r3, r4, r5, r6}
	add r5, r0, #0
	ldr r0, [r1, #8]
	add r3, r1, #0
	lsl r0, r0, #0xf
	lsr r4, r0, #0x10
	add r3, #0xc
	mov r2, #0
	cmp r4, #0
	ble _021F5010
	ldr r6, _021F5014 ; =0x00000FFF
_021F4FEE:
	ldrh r0, [r3]
	add r2, r2, #1
	add r1, r0, #0
	and r1, r6
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	sub r0, r0, r1
	add r1, r1, r5
	lsl r0, r0, #0x18
	lsl r1, r1, #0x10
	lsr r0, r0, #0x18
	lsr r1, r1, #0x10
	add r0, r0, r1
	strh r0, [r3]
	add r3, r3, #2
	cmp r2, r4
	blt _021F4FEE
_021F5010:
	pop {r3, r4, r5, r6}
	bx lr
	.balign 4, 0
_021F5014: .word 0x00000FFF
	thumb_func_end ov96_021F4FD8

	thumb_func_start ov96_021F5018
ov96_021F5018: ; 0x021F5018
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x120
	str r0, [sp, #0x14]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E5DD4
	cmp r0, #6
	bls _021F5030
	b _021F54AE
_021F5030:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F503C: ; jump table
	.short _021F504A - _021F503C - 2 ; case 0
	.short _021F5128 - _021F503C - 2 ; case 1
	.short _021F516A - _021F503C - 2 ; case 2
	.short _021F51CA - _021F503C - 2 ; case 3
	.short _021F522C - _021F503C - 2 ; case 4
	.short _021F5374 - _021F503C - 2 ; case 5
	.short _021F54A2 - _021F503C - 2 ; case 6
_021F504A:
	mov r2, #5
	mov r0, #0x5c
	mov r1, #0x8f
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021F53C0 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021F53C4 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021F5630
	ldr r0, [sp, #0x14]
	ldr r1, _021F53C8 ; =0x00001004
	bl ov96_021E5D94
	ldr r2, _021F53C8 ; =0x00001004
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8f
	bl sub_0201AC88
	str r0, [r4]
	ldr r0, [sp, #0x14]
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0xd5
	str r0, [sp, #0xcc]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0xd0]
	lsr r0, r0, #4
	str r0, [sp, #0xd4]
	ldr r0, [sp, #0x14]
	bl ov96_021E5DCC
	str r0, [sp, #0xd8]
	ldr r3, _021F53CC ; =0x00300010
	add r0, sp, #0xcc
	mov r1, #0xf
	mov r2, #0x8f
	str r3, [sp]
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x8f
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r0, #0x8f
	str r0, [r4, #0x54]
	ldr r1, [r4, #0x54]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r4]
	bl ov96_021F584C
	add r0, r4, #0
	bl ov96_021F6138
	ldr r0, _021F53D0 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r1, [r4, #0x54]
	mov r0, #0xc
	bl sub_0202055C
	ldr r1, [r4, #0x54]
	mov r0, #0xc
	bl sub_02020654
	mov r1, #1
	lsl r1, r1, #0xc
	str r0, [r4, r1]
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F5128:
	ldr r0, [r4, #0x54]
	bl ov96_021F74A4
	add r1, r4, #0
	add r1, #0x8c
	str r0, [r1]
	ldr r0, [sp, #0x14]
	bl ov96_021E5D34
	add r5, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E5EE8
	add r6, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E5F54
	add r3, r0, #0
	ldr r0, [sp, #0x14]
	mov r1, #4
	str r0, [sp]
	ldr r0, [r4, #0x54]
	sub r1, r1, r5
	add r2, r6, #0
	bl ov96_021F7684
	mov r1, #0x4e
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F516A:
	ldr r5, _021F53D4 ; =0x0221C0B8
	add r3, sp, #0xc0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r4, #0x54]
	bl ov96_021EB180
	mov r1, #0
	str r0, [r4, #0x60]
	str r1, [sp]
	mov r2, #3
	ldr r0, [r4, #0x60]
	lsl r2, r2, #0x12
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [r4, #0x60]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r0, [r4, #0x54]
	mov r1, #3
	mov r2, #0xa
	mov r3, #0
	bl ov96_021EA854
	mov r1, #0x63
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [r4, #0x60]
	mov r1, #0
	mov r2, #0x65
	bl ov96_021EB29C
	ldr r0, [r4, #0x60]
	bl ov96_021F6C18
	ldr r0, [r4, #0x60]
	bl ov96_021EB3A4
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F51CA:
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x18]
	mov r5, #0
	add r7, sp, #0x90
	add r6, sp, #0xdc
_021F51DC:
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x18]
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_021E6168
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x18]
	add r2, r5, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r6, #0x14]
	add r5, r5, #1
	add r7, #0x10
	add r6, r6, #4
	cmp r5, #3
	blt _021F51DC
	mov r0, #1
	mov r1, #3
	mov r2, #0
	str r2, [sp, #0xdc]
	str r0, [sp, #0xe0]
	str r0, [sp, #0xe4]
	mov r0, #0x63
	str r1, [sp, #0xe8]
	str r1, [sp, #0xec]
	str r2, [sp]
	str r2, [sp, #4]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r2, sp, #0x90
	add r3, sp, #0xdc
	bl ov96_021EA8A8
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F522C:
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EAA00
	cmp r0, #0
	bne _021F523C
	b _021F54AE
_021F523C:
	ldr r0, [r4, #0x54]
	ldr r1, _021F53D8 ; =0x000003A1
	mov r2, #1
	bl ov96_021E9A78
	mov r2, #0x62
	lsl r2, r2, #2
	str r0, [r4, r2]
	ldr r0, [sp, #0x14]
	ldr r2, [r4, r2]
	ldr r3, [r4, #0x60]
	mov r1, #0xc0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	ldr r0, [r4]
	bl ov96_021E6030
	ldr r0, [sp, #0x14]
	mov r1, #1
	bl ov96_021E5DFC
	add r0, sp, #0x78
	mov r1, #0xaa
	mov r2, #0x10
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #0x24]
	add r0, r4, #0
	str r0, [sp, #0x1c]
	add r0, #0x90
	str r0, [sp, #0x1c]
	mov r6, #0x40
	add r7, sp, #0x6c
_021F5288:
	mov r0, #0x63
	ldr r1, [sp, #0x24]
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	mov r1, #1
	add r5, r0, #0
	bl ov96_021EAB38
	ldr r0, [sp, #0x1c]
	ldr r2, [sp, #0x24]
	str r5, [r0]
	ldr r0, [sp, #0x14]
	mov r1, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x78
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r5, #0
	bl ov96_021EAF70
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EAC0C
	mov r2, #0x12
	add r0, r5, #0
	add r1, r6, #0
	lsl r2, r2, #4
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021EAF6C
	mov r2, #0x12
	ldr r1, [sp, #0x1c]
	lsl r0, r6, #0xc
	str r0, [r1, #8]
	lsl r2, r2, #0x10
	str r2, [r1, #0xc]
	str r0, [r1, #0x1c]
	add r0, sp, #0x28
	str r0, [sp]
	add r0, r5, #0
	add r1, r6, #0
	lsr r2, r2, #0xc
	add r3, sp, #0x2c
	bl ov96_021EB0A4
	ldr r0, [sp, #0x2c]
	add r6, #0x40
	strh r0, [r7]
	ldr r0, [sp, #0x28]
	strh r0, [r7, #2]
	ldr r0, [sp, #0x1c]
	add r7, r7, #4
	add r0, #0x38
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x24]
	add r0, r0, #1
	str r0, [sp, #0x24]
	cmp r0, #3
	blt _021F5288
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, sp, #0x6c
	str r0, [sp, #8]
	mov r2, #0x62
	lsl r2, r2, #2
	ldr r0, [sp, #0x14]
	ldr r2, [r4, r2]
	ldr r3, [r4, #0x60]
	mov r1, #0
	bl ov96_021E634C
	mov r0, #5
	mov r1, #3
	lsl r0, r0, #6
	strb r1, [r4, r0]
	add r0, r4, #0
	bl ov96_021F5980
	ldr r1, [r4, #0x60]
	add r0, r4, #0
	bl ov96_021F6C5C
	add r0, r4, #0
	bl ov96_021F7050
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	add r1, r0, #0
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_021F6DA4
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F5374:
	mov r0, #1
	add r1, r0, #0
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	add r0, sp, #0x30
	mov r1, #0xaa
	mov r2, #6
	bl ReadWholeNarcMemberByIdPair
	add r6, r4, #0
	mov r5, #0
	add r6, #0x90
	add r7, sp, #0x30
_021F539E:
	lsl r2, r5, #0x18
	ldr r0, [sp, #0x14]
	add r1, r7, #0
	lsr r2, r2, #0x18
	add r3, r6, #0
	bl ov96_021F715C
	add r5, r5, #1
	add r6, #0x38
	cmp r5, #3
	blt _021F539E
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	mov r1, #0x4f
	ldr r0, _021F53DC ; =0x00000708
	b _021F53E0
	.balign 4, 0
_021F53C0: .word 0xFFFFE0FF
_021F53C4: .word 0x04001000
_021F53C8: .word 0x00001004
_021F53CC: .word 0x00300010
_021F53D0: .word gMain + 0x60
_021F53D4: .word 0x0221C0B8
_021F53D8: .word 0x000003A1
_021F53DC: .word 0x00000708
_021F53E0:
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r1, [r4, r1]
	add r0, r4, #0
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	bl ov96_021F6F3C
	ldr r0, [sp, #0x14]
	add r1, r4, #0
	bl ov96_021F6F80
	mov r2, #0
	mov r7, #0x9a
	mov r0, #0xba
	mov r1, #0xda
	add r3, r4, #0
	add r5, r2, #0
	lsl r7, r7, #4
	lsl r0, r0, #4
	lsl r1, r1, #4
_021F540A:
	mov r6, #0x1a
	lsl r6, r6, #4
	str r5, [r3, r6]
	mov r6, #0x3a
	lsl r6, r6, #4
	str r5, [r3, r6]
	mov r6, #0x5a
	lsl r6, r6, #4
	str r5, [r3, r6]
	mov r6, #0x7a
	lsl r6, r6, #4
	str r5, [r3, r6]
	str r5, [r3, r7]
	str r5, [r3, r0]
	str r5, [r3, r1]
	add r2, r2, #1
	add r3, r3, #4
	cmp r2, #0x80
	blt _021F540A
	mov r6, #0x40
	add r7, r4, #0
	str r4, [sp, #0x20]
_021F5436:
	ldr r0, _021F54B4 ; =0x00000FB4
	mov r1, #0
	str r1, [r4, r0]
	lsr r0, r6, #0x1f
	add r0, r6, r0
	asr r1, r0, #1
	mov r0, #0xfa
	lsl r0, r0, #4
	str r1, [r7, r0]
	add r0, r6, #0
	bl _itof
	bl _f2d
	ldr r3, _021F54B8 ; =0x40500000
	mov r2, #0
	bl _ddiv
	mov r3, #1
	mov r2, #0
	lsl r3, r3, #0x1e
	bl _dsub
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021F54BC ; =0x40B00000
	mov r0, #0
	bl _dmul
	bl _dtoi
	mov r1, #0xfb
	lsl r1, r1, #4
	str r0, [r4, r1]
	ldr r1, [sp, #0x20]
	mov r0, #1
	add r1, #0xb8
	strb r0, [r1]
	ldr r0, [sp, #0x20]
	add r5, r5, #1
	add r0, #0x38
	add r4, #0x1c
	add r6, #0x40
	add r7, r7, #4
	str r0, [sp, #0x20]
	cmp r5, #3
	blt _021F5436
	mov r0, #1
	bl sub_0203A994
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _021F54AE
_021F54A2:
	add r0, r4, #0
	bl ov96_021F6E38
	add sp, #0x120
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F54AE:
	mov r0, #0
	add sp, #0x120
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F54B4: .word 0x00000FB4
_021F54B8: .word 0x40500000
_021F54BC: .word 0x40B00000
	thumb_func_end ov96_021F5018

	thumb_func_start ov96_021F54C0
ov96_021F54C0: ; 0x021F54C0
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x60]
	bl ov96_021EB5BC
	bl sub_02020674
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_021F54C0

	thumb_func_start ov96_021F54D4
ov96_021F54D4: ; 0x021F54D4
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E5DC4
	add r0, r5, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_021F54EE:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r0, #0x4a
	lsl r0, r0, #2
	str r0, [sp, #8]
	add r0, r5, #0
	add r1, r6, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _021F54EE
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #5
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #5
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F54D4

	thumb_func_start ov96_021F553C
ov96_021F553C: ; 0x021F553C
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	mov r0, #0x19
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl sub_02023120
	add r0, r4, #0
	add r0, #0x8c
	ldr r0, [r0]
	bl ov96_021F74C8
	ldr r0, [r4, #0x58]
	bl FreeToHeap
	ldr r0, [r4]
	mov r1, #2
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #6
	bl sub_0201BB4C
	mov r6, #0
	add r5, r4, #4
_021F5598:
	add r0, r5, #0
	bl RemoveWindow
	add r6, r6, #1
	add r5, #0x10
	cmp r6, #5
	blt _021F5598
	ldr r0, [r4]
	bl FreeToHeap
	add r0, r7, #0
	bl ov96_021E5F8C
	ldr r0, [r4, #0x60]
	bl ov96_021EB21C
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EA894
	mov r0, #0x62
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	mov r0, #0x4e
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021F7738
	mov r0, #4
	bl sub_02002DB4
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	ldr r0, _021F5628 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #1
	lsl r0, r0, #0xc
	ldr r0, [r4, r0]
	bl sub_0202067C
	bl sub_020205AC
	add r0, r7, #0
	bl ov96_021E5DAC
	ldr r0, _021F562C ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x8f
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F5628: .word gMain + 0x60
_021F562C: .word 0x04000050
	thumb_func_end ov96_021F553C

	thumb_func_start ov96_021F5630
ov96_021F5630: ; 0x021F5630
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021F564C ; =0x0221C1F4
	add r3, sp, #0
	mov r2, #5
_021F563A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021F563A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021F564C: .word 0x0221C1F4
	thumb_func_end ov96_021F5630

	thumb_func_start ov96_021F5650
ov96_021F5650: ; 0x021F5650
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #5
	bhi _021F5728
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F5670: ; jump table
	.short _021F567C - _021F5670 - 2 ; case 0
	.short _021F5692 - _021F5670 - 2 ; case 1
	.short _021F56B8 - _021F5670 - 2 ; case 2
	.short _021F56CE - _021F5670 - 2 ; case 3
	.short _021F56E6 - _021F5670 - 2 ; case 4
	.short _021F56FE - _021F5670 - 2 ; case 5
_021F567C:
	add r0, r5, #0
	bl ov96_021F5B60
	add r0, r5, #0
	mov r1, #0x14
	bl ov96_021E601C
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F5728
_021F5692:
	add r0, r5, #0
	bl ov96_021F5B60
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x54]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #2
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F5728
_021F56B8:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F56C6
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
_021F56C6:
	add r0, r5, #0
	bl ov96_021F5B60
	b _021F5728
_021F56CE:
	add r0, r5, #0
	bl ov96_021F5B60
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _021F5728
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F5728
_021F56E6:
	add r0, r5, #0
	bl ov96_021F5BA0
	add r0, r5, #0
	bl ov96_021F5A88
	cmp r0, #0
	beq _021F5728
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021F5728
_021F56FE:
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _021F5728
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x54]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
_021F5728:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F5650

	thumb_func_start ov96_021F5730
ov96_021F5730: ; 0x021F5730
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldrb r0, [r6]
	cmp r0, #0
	bne _021F5756
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F5750
	mov r0, #1
	strb r0, [r6]
_021F5750:
	add sp, #0xc
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021F5756:
	add r0, r5, #0
	bl ov96_021E5F24
	mov r2, #0
	add r6, r0, #0
	add r1, r2, #0
_021F5762:
	add r0, r4, #0
	add r0, #0xb0
	ldrh r0, [r0]
	add r1, r1, #1
	add r4, #0x38
	add r2, r2, r0
	cmp r1, #3
	blt _021F5762
	ldr r0, _021F5848 ; =0x000003E7
	cmp r2, r0
	ble _021F577A
	add r2, r0, #0
_021F577A:
	lsl r1, r6, #0x18
	lsl r2, r2, #0x10
	add r0, r5, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	cmp r6, #0
	bne _021F5842
	add r0, r5, #0
	bl ov96_021E5D34
	str r0, [sp, #8]
	cmp r0, #4
	bge _021F5842
_021F5798:
	ldr r0, [sp, #8]
	mov r4, #0
	lsl r0, r0, #0x18
	str r4, [sp, #4]
	lsr r7, r0, #0x18
_021F57A2:
	ldr r1, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E60D8
	add r6, r0, #0
	ldrb r0, [r6, #2]
	cmp r0, #0
	beq _021F57E0
	bl LCRandom
	mov r1, #0x15
	bl _s32_div_f
	add r3, r1, #0
	ldrb r0, [r6, #3]
	ldrb r2, [r6, #2]
	mov r1, #6
	lsl r0, r0, #1
	mul r1, r2
	ldrb r2, [r6, #4]
	add r1, #0x50
	lsl r2, r2, #1
	add r1, r1, r2
	add r0, r0, r1
	add r1, r0, r3
	ldr r0, [sp, #4]
	add r0, r0, r1
	str r0, [sp, #4]
	bl LCRandom
_021F57E0:
	mov r0, #0
	lsl r2, r4, #0x18
	str r0, [sp]
	add r0, r5, #0
	add r1, r7, #0
	lsr r2, r2, #0x18
	mov r3, #2
	bl ov96_021E8228
	bl LCRandom
	mov r1, #0x15
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r6, r0, #0x18
	lsl r2, r4, #0x18
	add r0, r5, #0
	add r1, r7, #0
	lsr r2, r2, #0x18
	mov r3, #4
	str r6, [sp]
	bl ov96_021E8228
	lsl r2, r4, #0x18
	add r0, r5, #0
	add r1, r7, #0
	lsr r2, r2, #0x18
	mov r3, #1
	str r6, [sp]
	bl ov96_021E8228
	add r4, r4, #1
	cmp r4, #3
	blt _021F57A2
	ldr r1, [sp, #8]
	ldr r2, [sp, #4]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x10
	add r0, r5, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _021F5798
_021F5842:
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F5848: .word 0x000003E7
	thumb_func_end ov96_021F5730

	thumb_func_start ov96_021F584C
ov96_021F584C: ; 0x021F584C
	push {r3, r4, r5, lr}
	sub sp, #0xb8
	ldr r5, _021F5964 ; =0x0221C100
	add r3, sp, #0xa8
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _021F5968 ; =0x0221C124
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #2
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #2
	bl sub_0201CAE0
	ldr r5, _021F596C ; =0x0221C140
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _021F5970 ; =0x0221C15C
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _021F5974 ; =0x0221C178
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _021F5978 ; =0x0221C194
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _021F597C ; =0x0221C1B0
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xb8
	pop {r3, r4, r5, pc}
	nop
_021F5964: .word 0x0221C100
_021F5968: .word 0x0221C124
_021F596C: .word 0x0221C140
_021F5970: .word 0x0221C15C
_021F5974: .word 0x0221C178
_021F5978: .word 0x0221C194
_021F597C: .word 0x0221C1B0
	thumb_func_end ov96_021F584C

	thumb_func_start ov96_021F5980
ov96_021F5980: ; 0x021F5980
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #2
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #1
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #0xa
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #4
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #0xc
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #2
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #1
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #0xb
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x54]
	mov r1, #0xd
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xa8
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r4, #0x54]
	mov r2, #0
	str r0, [sp, #4]
	mov r0, #0xa8
	mov r1, #4
	add r3, r2, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4, #0x54]
	mov r1, #9
	str r0, [sp, #4]
	mov r0, #0xa8
	mov r2, #4
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	ldr r0, [r4, #0x54]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xa8
	mov r1, #0xe
	mov r2, #0
	add r3, #0x5c
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x58]
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F5980

	thumb_func_start ov96_021F5A88
ov96_021F5A88: ; 0x021F5A88
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5F54
	bl ov96_021E8A20
	add r5, r0, #0
	ldr r1, _021F5B58 ; =0x00000142
	mov r0, #0
	strb r0, [r4, r1]
	sub r0, r1, #6
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021F5AB6
	sub r0, r1, #6
	ldr r0, [r4, r0]
	sub r2, r0, #1
	sub r0, r1, #6
	str r2, [r4, r0]
_021F5AB6:
	mov r0, #0x4f
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	bgt _021F5AC4
	mov r0, #1
	b _021F5AC6
_021F5AC4:
	mov r0, #0
_021F5AC6:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021F5B1C
	ldr r0, [r4, #0x60]
	mov r1, #1
	mov r5, #0
	bl ov96_021EB63C
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	bl ov96_021EB144
	add r1, r5, #0
	add r2, r4, #0
_021F5AE6:
	add r0, r2, #0
	add r0, #0xb0
	ldrh r0, [r0]
	add r1, r1, #1
	add r2, #0x38
	add r5, r5, r0
	cmp r1, #3
	blt _021F5AE6
	ldr r0, _021F5B5C ; =0x000003E7
	cmp r5, r0
	ble _021F5AFE
	add r5, r0, #0
_021F5AFE:
	lsl r1, r5, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x10
	bl ov96_021E8318
	lsl r1, r5, #0x10
	add r0, r4, #0
	lsr r1, r1, #0x10
	bl ov96_021F70AC
	add r0, r6, #0
	bl ov96_021F5B60
	mov r0, #1
	pop {r4, r5, r6, pc}
_021F5B1C:
	add r0, r6, #0
	add r1, r4, #0
	bl ov96_021F6600
	mov r0, #0x1a
	lsl r0, r0, #4
	add r0, r4, r0
	bl ov96_021F6424
	add r0, r4, #0
	bl ov96_021F6BB0
	add r0, r6, #0
	add r1, r4, #0
	bl ov96_021F7194
	add r0, r4, #0
	add r0, #0x8c
	ldr r0, [r0]
	bl ov96_021F7598
	add r0, r6, #0
	bl ov96_021F5B60
	ldr r0, _021F5B58 ; =0x00000142
	ldrb r0, [r4, r0]
	str r0, [r5]
	mov r0, #0
	pop {r4, r5, r6, pc}
	nop
_021F5B58: .word 0x00000142
_021F5B5C: .word 0x000003E7
	thumb_func_end ov96_021F5A88

	thumb_func_start ov96_021F5B60
ov96_021F5B60: ; 0x021F5B60
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021F5D3C
	mov r1, #0x4f
	lsl r1, r1, #2
	ldr r1, [r4, r1]
	add r0, r4, #0
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	bl ov96_021F6F3C
	add r0, r4, #0
	bl ov96_021F6E38
	add r0, r5, #0
	bl ov96_021F5EC4
	mov r1, #0x4f
	lsl r1, r1, #2
	ldr r1, [r4, r1]
	add r0, r5, #0
	bl ov96_021E6454
	add r0, r4, #0
	bl ov96_021F637C
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021F5B60

	thumb_func_start ov96_021F5BA0
ov96_021F5BA0: ; 0x021F5BA0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	str r0, [sp, #8]
	bl ov96_021E5F54
	add r4, r0, #0
	ldr r0, [sp, #8]
	bl ov96_021E5DC4
	add r5, r0, #0
	bl sub_02025358
	cmp r0, #0
	beq _021F5C10
	ldr r0, [sp, #8]
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
	ldr r2, _021F5D38 ; =gMain + 0x40
	add r0, r5, #0
	ldrh r1, [r2, #0x20]
	ldrh r2, [r2, #0x22]
	bl ov96_021F5F68
	cmp r0, #3
	bhs _021F5CC2
	mov r1, #5
	lsl r1, r1, #6
	ldr r2, _021F5D38 ; =gMain + 0x40
	strb r0, [r5, r1]
	ldrh r0, [r2, #0x20]
	lsl r3, r0, #0xc
	add r0, r1, #0
	add r0, #0x2c
	str r3, [r5, r0]
	ldrh r0, [r2, #0x22]
	lsl r2, r0, #0xc
	mov r0, #3
	lsl r0, r0, #0x12
	add r2, r2, r0
	add r0, r1, #0
	add r0, #0x30
	str r2, [r5, r0]
	mov r0, #0
	add r1, #0x34
	str r0, [r5, r1]
	b _021F5CC2
_021F5C10:
	bl sub_0202534C
	cmp r0, #0
	beq _021F5C74
	mov r2, #5
	lsl r2, r2, #6
	ldrb r0, [r5, r2]
	cmp r0, #3
	bhs _021F5CC2
	add r0, r2, #1
	ldrb r0, [r5, r0]
	cmp r0, #7
	bhs _021F5C36
	add r0, r2, #1
	ldrb r0, [r5, r0]
	add r1, r0, #1
	add r0, r2, #1
	strb r1, [r5, r0]
	b _021F5CC2
_021F5C36:
	add r3, sp, #0x1c
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	ldr r1, _021F5D38 ; =gMain + 0x40
	str r0, [r3, #8]
	ldrh r0, [r1, #0x20]
	ldrh r1, [r1, #0x22]
	add r2, #0x2c
	lsl r0, r0, #0x18
	lsl r1, r1, #0x18
	lsr r0, r0, #0x18
	lsr r1, r1, #0x18
	add r2, r5, r2
	bl ov96_021F5F34
	mov r1, #5
	lsl r1, r1, #6
	ldrb r1, [r5, r1]
	add r0, r5, #0
	add r2, sp, #0x1c
	bl ov96_021F6088
	mov r0, #5
	mov r1, #3
	lsl r0, r0, #6
	strb r1, [r5, r0]
	mov r1, #0
	add r0, r0, #1
	strb r1, [r5, r0]
	b _021F5CC2
_021F5C74:
	mov r2, #5
	lsl r2, r2, #6
	ldrb r0, [r5, r2]
	cmp r0, #3
	bhs _021F5CB4
	add r0, r2, #1
	ldrb r0, [r5, r0]
	cmp r0, #7
	bhs _021F5CB4
	add r3, sp, #0x10
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	ldr r1, _021F5D38 ; =gMain + 0x40
	str r0, [r3, #8]
	ldrh r0, [r1, #0x20]
	ldrh r1, [r1, #0x22]
	add r2, #0x2c
	lsl r0, r0, #0x18
	lsl r1, r1, #0x18
	lsr r0, r0, #0x18
	lsr r1, r1, #0x18
	add r2, r5, r2
	bl ov96_021F5F34
	mov r1, #5
	lsl r1, r1, #6
	ldrb r1, [r5, r1]
	add r0, r5, #0
	add r2, sp, #0x10
	bl ov96_021F6088
_021F5CB4:
	mov r0, #5
	mov r1, #3
	lsl r0, r0, #6
	strb r1, [r5, r0]
	mov r1, #0
	add r0, r0, #1
	strb r1, [r5, r0]
_021F5CC2:
	ldr r0, [sp, #8]
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F5D32
	add r0, r4, #0
	add r0, #0x28
	bl ov96_021E8A20
	add r7, r0, #0
	add r0, r4, #0
	add r0, #0x50
	bl ov96_021E8A20
	str r0, [sp, #4]
	add r0, r4, #0
	bl ov96_021E8A20
	add r3, r0, #0
	mov r6, #4
_021F5CEA:
	ldr r2, [sp, #4]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	str r2, [sp, #4]
	sub r6, r6, #1
	bne _021F5CEA
	ldr r1, [r3]
	add r0, r2, #0
	str r1, [r0]
	mov r1, #0x4e
	lsl r1, r1, #2
	ldr r0, [sp, #8]
	ldr r1, [r5, r1]
	bl ov96_021F7740
	mov r6, #0
	add r4, #0x50
	add r5, sp, #0xc
_021F5D0E:
	add r0, r4, #0
	bl ov96_021E8A20
	ldr r0, [r0]
	add r6, r6, #1
	strb r0, [r5]
	add r4, #0x28
	add r5, r5, #1
	cmp r6, #4
	blt _021F5D0E
	mov r2, #0
	add r1, sp, #0xc
_021F5D26:
	ldrb r0, [r1]
	add r1, r1, #1
	strb r0, [r7, r2]
	add r2, r2, #1
	cmp r2, #4
	blt _021F5D26
_021F5D32:
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F5D38: .word gMain + 0x40
	thumb_func_end ov96_021F5BA0

	thumb_func_start ov96_021F5D3C
ov96_021F5D3C: ; 0x021F5D3C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	str r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #4]
	ldr r4, [sp, #4]
	ldr r6, [sp, #4]
	mov r0, #0
	ldr r5, _021F5EBC ; =0x0221DC18
	str r0, [sp, #0x10]
	add r4, #0x90
	add r7, r6, #0
_021F5D56:
	ldr r0, _021F5EC0 ; =0x00000FB4
	ldr r0, [r6, r0]
	lsl r1, r0, #6
	mov r0, #0x12
	lsl r0, r0, #0x10
	sub r0, r0, r1
	str r0, [r4, #0xc]
	ldr r1, [r4, #0x1c]
	mov r0, #2
	lsl r0, r0, #0x10
	str r1, [r4, #8]
	cmp r1, r0
	bge _021F5D74
	str r0, [r4, #8]
	b _021F5D7E
_021F5D74:
	mov r0, #0xdf
	lsl r0, r0, #0xc
	cmp r1, r0
	ble _021F5D7E
	str r0, [r4, #8]
_021F5D7E:
	ldr r1, [r4, #8]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r0, #0xc
	lsr r0, r1, #0x1f
	add r0, r1, r0
	lsl r0, r0, #0x17
	lsr r1, r0, #0x18
	mov r0, #0xfa
	lsl r0, r0, #4
	str r1, [r7, r0]
	ldr r1, [r4, #8]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [r4, #0xc]
	str r0, [sp, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #8]
	ldr r0, [r4]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #8]
	bl ov96_021EAF94
	mov r1, #0
	add r0, sp, #0x14
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [sp, #0xc]
	lsl r0, r0, #0xc
	str r0, [sp, #0x14]
	ldr r0, [sp, #8]
	lsl r0, r0, #0xc
	str r0, [sp, #0x18]
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	ldr r2, [sp, #0x10]
	bl ov96_021E60C0
	ldrb r0, [r0, #5]
	cmp r0, #0
	beq _021F5DF0
	mov r0, #6
	ldr r1, [sp, #0x18]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0x18]
	b _021F5DFA
_021F5DF0:
	mov r0, #1
	ldr r1, [sp, #0x18]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x18]
_021F5DFA:
	ldr r0, [r4, #4]
	add r1, sp, #0x14
	bl ov96_021EB588
	add r0, r4, #0
	add r0, #0x26
	ldrb r0, [r0]
	cmp r0, #0
	ldr r0, [r4, #4]
	beq _021F5E34
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r4]
	mov r1, #0x14
	bl ov96_021EAD08
	ldrb r0, [r5]
	bl sub_02006190
	cmp r0, #0
	bne _021F5E5E
	ldrb r1, [r5]
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_0200606C
	b _021F5E5E
_021F5E34:
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r4]
	mov r1, #0
	bl ov96_021EAD08
	mov r0, #0x3f
	lsl r0, r0, #6
	ldr r0, [r6, r0]
	cmp r0, #0
	ldr r0, [r4]
	beq _021F5E58
	mov r1, #1
	bl ov96_021EAC0C
	b _021F5E5E
_021F5E58:
	mov r1, #2
	bl ov96_021EAC0C
_021F5E5E:
	ldr r0, [sp, #0x10]
	add r4, #0x38
	add r0, r0, #1
	add r6, #0x1c
	add r7, r7, #4
	add r5, r5, #1
	str r0, [sp, #0x10]
	cmp r0, #3
	bge _021F5E72
	b _021F5D56
_021F5E72:
	ldr r4, [sp, #4]
	mov r1, #0x51
	mov r5, #0
	lsl r1, r1, #2
	add r0, r4, #0
	add r6, r0, r1
	add r7, r5, #0
_021F5E80:
	ldr r0, [sp, #4]
	mov r1, #0x5a
	add r0, r0, r5
	lsl r1, r1, #2
	ldrb r1, [r0, r1]
	cmp r1, #0
	beq _021F5EAE
	mov r1, #0x5a
	lsl r1, r1, #2
	strb r7, [r0, r1]
	mov r1, #1
	ldr r0, [r4, #0x78]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r4, #0x78]
	add r1, r6, #0
	bl ov96_021EB588
	ldr r0, [r4, #0x78]
	mov r1, #9
	bl ov96_021EB564
_021F5EAE:
	add r5, r5, #1
	add r4, r4, #4
	add r6, #0xc
	cmp r5, #3
	blt _021F5E80
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F5EBC: .word 0x0221DC18
_021F5EC0: .word 0x00000FB4
	thumb_func_end ov96_021F5D3C

	thumb_func_start ov96_021F5EC4
ov96_021F5EC4: ; 0x021F5EC4
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r7, r0, #0
	add r0, r6, #0
	bl ov96_021E5DC4
	str r0, [sp]
	mov r4, #0
	add r5, r0, #0
_021F5EE0:
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r4, r0
	bne _021F5F0A
	ldr r1, [sp]
	ldr r0, _021F5F30 ; =0x00000142
	ldrb r0, [r1, r0]
	cmp r0, #0
	beq _021F5F24
	ldr r0, [r5, #0x68]
	bl ov96_021EB57C
	cmp r0, #0
	bne _021F5F24
	add r1, r4, #0
	ldr r0, [r5, #0x68]
	add r1, #0xd
	bl ov96_021EB564
	b _021F5F24
_021F5F0A:
	ldrb r0, [r7, r4]
	cmp r0, #0
	beq _021F5F24
	ldr r0, [r5, #0x68]
	bl ov96_021EB57C
	cmp r0, #0
	bne _021F5F24
	add r1, r4, #0
	ldr r0, [r5, #0x68]
	add r1, #0xd
	bl ov96_021EB564
_021F5F24:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _021F5EE0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F5F30: .word 0x00000142
	thumb_func_end ov96_021F5EC4

	thumb_func_start ov96_021F5F34
ov96_021F5F34: ; 0x021F5F34
	push {r3, r4, lr}
	sub sp, #0xc
	lsl r0, r0, #0xc
	str r0, [sp]
	mov r0, #3
	lsl r1, r1, #0xc
	lsl r0, r0, #0x12
	add r0, r1, r0
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	add r4, r3, #0
	add r1, r2, #0
	add r0, sp, #0
	add r2, r4, #0
	bl VEC_Subtract
	mov r0, #7
	ldr r1, [r4, #4]
	lsl r0, r0, #0x10
	cmp r1, r0
	ble _021F5F62
	str r0, [r4, #4]
_021F5F62:
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F5F34

	thumb_func_start ov96_021F5F68
ov96_021F5F68: ; 0x021F5F68
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	str r1, [sp, #0xc]
	str r0, [sp, #8]
	str r2, [sp, #0x10]
	bl ov96_021E6104
	lsl r6, r0, #0xc
	ldr r0, [sp, #8]
	mov r5, #0
	str r0, [sp, #0x14]
	add r0, #0x90
	add r4, r5, #0
	add r7, sp, #0x24
	str r0, [sp, #0x14]
_021F5F86:
	mov r0, #0x38
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x14]
	add r1, r0, r1
	add r0, r1, #0
	add r0, #0x26
	ldrb r0, [r0]
	cmp r0, #0
	beq _021F5FA8
	mov r0, #0
	strb r0, [r7, r4]
	add r1, r0, #0
	lsl r2, r4, #2
	add r0, sp, #0x28
	str r1, [r0, r2]
	b _021F6014
_021F5FA8:
	add r0, sp, #0x18
	str r0, [sp]
	ldr r0, [r1]
	ldr r1, [r1, #0x1c]
	add r3, r4, #0
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	mov r2, #0x1c
	mul r3, r2
	ldr r2, [sp, #8]
	add r3, r2, r3
	ldr r2, _021F605C ; =0x00000FB4
	ldr r2, [r3, r2]
	lsl r3, r2, #6
	mov r2, #6
	lsl r2, r2, #0x10
	sub r2, r2, r3
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, sp, #0x1c
	bl ov96_021EB0A4
	bl ov96_021E6104
	str r0, [sp]
	add r0, sp, #0x20
	str r0, [sp, #4]
	ldr r0, [sp, #0x1c]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0xc]
	ldr r3, [sp, #0x10]
	bl ov96_021E872C
	cmp r0, #0
	add r0, sp, #0x28
	beq _021F600A
	ldr r2, [sp, #0x20]
	lsl r1, r4, #2
	str r2, [r0, r1]
	mov r0, #1
	strb r0, [r7, r4]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	b _021F6014
_021F600A:
	lsl r2, r4, #2
	mov r1, #0
	str r1, [r0, r2]
	add r0, r1, #0
	strb r0, [r7, r4]
_021F6014:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021F5F86
	cmp r5, #0
	bne _021F6028
	add sp, #0x34
	mov r0, #3
	pop {r4, r5, r6, r7, pc}
_021F6028:
	mov r0, #3
	mov r3, #0
	add r1, sp, #0x28
	add r2, sp, #0x24
_021F6030:
	ldrb r4, [r2, r3]
	cmp r4, #0
	beq _021F6042
	lsl r4, r3, #2
	ldr r4, [r1, r4]
	cmp r4, r6
	bge _021F6042
	add r0, r3, #0
	add r6, r4, #0
_021F6042:
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	cmp r3, #3
	blo _021F6030
	cmp r0, #3
	bne _021F6056
	bl GF_AssertFail
	mov r0, #3
_021F6056:
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	nop
_021F605C: .word 0x00000FB4
	thumb_func_end ov96_021F5F68

	thumb_func_start ov96_021F6060
ov96_021F6060: ; 0x021F6060
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r1, r2, #0
	add r2, sp, #0
	add r4, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r1, r5, r4
	cmp r0, r1
	bgt _021F6082
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_021F6082:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_021F6060

	thumb_func_start ov96_021F6088
ov96_021F6088: ; 0x021F6088
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r2, #0
	add r6, r0, #0
	ldr r0, [r4, #4]
	add r5, r1, #0
	cmp r0, #0
	ble _021F6120
	ldr r1, _021F6124 ; =0x00000FAC
	add r2, r6, r1
	mov r1, #0x1c
	mul r1, r5
	add r7, r2, r1
	ldr r1, [r7, #0x14]
	cmp r1, #0
	bne _021F6120
	asr r1, r0, #5
	lsr r1, r1, #0x1a
	add r1, r0, r1
	asr r0, r1, #6
	bl _dflt
	ldr r3, _021F6128 ; =0x40040000
	mov r2, #0
	bl _ddiv
	bl _dtoi
	str r0, [sp]
	ldr r0, [r4]
	neg r1, r0
	asr r0, r1, #1
	lsr r0, r0, #0x1e
	add r0, r1, r0
	asr r0, r0, #2
	bmi _021F60DC
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _021F60E4
	add r0, r1, #0
	b _021F60E4
_021F60DC:
	ldr r1, _021F612C ; =0xFFFF6000
	cmp r0, r1
	bge _021F60E4
	add r0, r1, #0
_021F60E4:
	mov r1, #0x38
	add r4, r5, #0
	mul r4, r1
	add r1, r6, #0
	str r1, [sp, #4]
	add r1, #0xa8
	str r0, [r1, r4]
	add r0, r1, #0
	str r1, [sp, #4]
	ldr r1, [r0, r4]
	add r0, r6, r4
	add r0, #0xc4
	ldr r0, [r0]
	mul r0, r1
	mov r1, #0xc
	bl _s32_div_f
	ldr r1, [sp, #4]
	str r0, [r1, r4]
	ldr r0, [sp]
	ldr r1, _021F6130 ; =0x0221DC18
	neg r0, r0
	str r0, [r7]
	str r0, [r7, #0x18]
	mov r0, #1
	str r0, [r7, #0x14]
	ldrb r1, [r1, r5]
	ldr r0, _021F6134 ; =0x000008C2
	bl sub_0200606C
_021F6120:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F6124: .word 0x00000FAC
_021F6128: .word 0x40040000
_021F612C: .word 0xFFFF6000
_021F6130: .word 0x0221DC18
_021F6134: .word 0x000008C2
	thumb_func_end ov96_021F6088

	thumb_func_start ov96_021F6138
ov96_021F6138: ; 0x021F6138
	push {r3, r4, r5, lr}
	add r4, r0, #0
	bl sub_020C2698
	bl sub_020CF704
	ldr r0, _021F61B0 ; =0x04000540
	mov r3, #2
	str r3, [r0]
	ldr r0, _021F61B4 ; =0x04000008
	mov r1, #3
	ldrh r2, [r0]
	bic r2, r1
	add r1, r2, #0
	orr r1, r3
	strh r1, [r0]
	add r0, #0x58
	ldrh r1, [r0]
	ldr r2, _021F61B8 ; =0xFFFFCFFD
	ldr r3, _021F61BC ; =0x0000CFEF
	and r1, r2
	strh r1, [r0]
	ldrh r1, [r0]
	lsr r2, r2, #0x11
	and r1, r3
	strh r1, [r0]
	add r1, r3, #0
	ldrh r5, [r0]
	add r1, #0xc
	and r1, r5
	strh r1, [r0]
	add r1, r3, #0
	ldrh r5, [r0]
	add r1, #8
	sub r3, #0x10
	and r1, r5
	strh r1, [r0]
	ldrh r1, [r0]
	and r1, r3
	strh r1, [r0]
	mov r0, #0
	add r1, r0, #0
	mov r3, #0x3f
	str r0, [sp]
	bl G3X_SetClearColor
	ldr r1, _021F61C0 ; =0xBFFF0000
	ldr r0, _021F61C4 ; =0x04000580
	str r1, [r0]
	ldr r0, [r4, #0x54]
	bl sub_02023114
	mov r1, #0x19
	lsl r1, r1, #4
	str r0, [r4, r1]
	add r0, r4, #0
	bl ov96_021F6398
	pop {r3, r4, r5, pc}
	nop
_021F61B0: .word 0x04000540
_021F61B4: .word 0x04000008
_021F61B8: .word 0xFFFFCFFD
_021F61BC: .word 0x0000CFEF
_021F61C0: .word 0xBFFF0000
_021F61C4: .word 0x04000580
	thumb_func_end ov96_021F6138

	thumb_func_start ov96_021F61C8
ov96_021F61C8: ; 0x021F61C8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x4c
	ldr r5, _021F6358 ; =0x0221C0E8
	add r4, r0, #0
	ldmia r5!, {r0, r1}
	add r3, sp, #0x40
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	mov r0, #0x1b
	mov r2, #3
	bl sub_020C2528
	ldr r0, _021F635C ; =0x00310081
	add r1, sp, #0x3c
	str r0, [sp, #0x3c]
	mov r0, #0x29
	mov r2, #1
	bl sub_020C2528
	mov r0, #0xbf
	str r0, [sp, #0x38]
	mov r0, #0x20
	add r1, sp, #0x38
	mov r2, #1
	bl sub_020C2528
	bl NNS_G3dGlbFlushP
	mov r0, #3
	str r0, [sp, #0x34]
	mov r0, #0x40
	add r1, sp, #0x34
	mov r2, #1
	bl sub_020C2528
	ldr r0, _021F6360 ; =0x0221E5A0
	mov r2, #0
	str r2, [r0]
	ldr r0, _021F6364 ; =0x0221DC10
	mov r1, #0xa
	str r1, [r0, #4]
	mov r1, #0x14
	str r1, [r0]
	mov r0, #0xe
	lsl r0, r0, #0xc
	str r0, [sp, #0x2c]
	str r2, [sp, #0x30]
	mov r0, #0x23
	add r1, sp, #0x2c
	mov r2, #2
	bl sub_020C2528
	ldr r0, _021F6368 ; =0xE800E000
	add r1, sp, #0x24
	str r0, [sp, #0x24]
	mov r0, #0
	str r0, [sp, #0x28]
	mov r0, #0x23
	mov r2, #2
	bl sub_020C2528
	add r5, r4, #4
	ldr r4, _021F6364 ; =0x0221DC10
	mov r6, #1
_021F624E:
	add r0, r6, #0
	bl _itof
	bl _f2d
	ldr r3, _021F636C ; =0x40500000
	mov r2, #0
	bl _dsub
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021F6370 ; =0x40100000
	mov r0, #0
	bl _dmul
	ldr r3, _021F6374 ; =0x40600000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r7, r0, #0
	ldr r0, _021F6378 ; =0x45800000
	add r1, r7, #0
	bl _fmul
	bl _ftoi
	mov r1, #0x67
	lsl r1, r1, #2
	ldr r1, [r5, r1]
	lsl r0, r0, #0x10
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	lsr r0, r0, #0x10
	lsl r1, r1, #0x10
	orr r0, r1
	str r0, [sp, #0x1c]
	mov r0, #0
	str r0, [sp, #0x20]
	mov r0, #0x23
	add r1, sp, #0x1c
	mov r2, #2
	bl sub_020C2528
	ldr r0, _021F6378 ; =0x45800000
	add r1, r7, #0
	bl _fmul
	bl _ftoi
	lsl r0, r0, #0x10
	lsr r1, r0, #0x10
	mov r0, #0x3a
	lsl r0, r0, #0x1a
	orr r0, r1
	str r0, [sp, #0x14]
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, #0x23
	add r1, sp, #0x14
	mov r2, #2
	bl sub_020C2528
	ldr r1, _021F6360 ; =0x0221E5A0
	ldr r0, [r4]
	ldr r2, [r1]
	ldr r1, [r4, #4]
	lsl r0, r0, #0xa
	lsl r1, r1, #5
	orr r1, r2
	orr r0, r1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp, #0x10]
	mov r0, #0x20
	add r1, sp, #0x10
	mov r2, #1
	bl sub_020C2528
	ldr r0, _021F6360 ; =0x0221E5A0
	mov r1, #0x1f
	ldr r0, [r0]
	add r0, r0, #1
	bl _s32_div_f
	ldr r0, _021F6360 ; =0x0221E5A0
	str r1, [r0]
	ldr r0, [r4, #4]
	mov r1, #0x1f
	add r0, r0, #1
	bl _s32_div_f
	str r1, [r4, #4]
	ldr r0, [r4]
	mov r1, #0x1f
	add r0, r0, #1
	bl _s32_div_f
	add r6, r6, #1
	add r5, r5, #4
	str r1, [r4]
	cmp r6, #0x80
	ble _021F624E
	mov r0, #0xe
	lsl r0, r0, #0xc
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	mov r0, #0x23
	add r1, sp, #8
	mov r2, #2
	bl sub_020C2528
	ldr r0, _021F6368 ; =0xE800E000
	add r1, sp, #0
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	mov r0, #0x23
	mov r2, #2
	bl sub_020C2528
	mov r1, #0
	mov r0, #0x41
	add r2, r1, #0
	bl sub_020C2528
	add sp, #0x4c
	pop {r4, r5, r6, r7, pc}
	nop
_021F6358: .word 0x0221C0E8
_021F635C: .word 0x00310081
_021F6360: .word 0x0221E5A0
_021F6364: .word 0x0221DC10
_021F6368: .word 0xE800E000
_021F636C: .word 0x40500000
_021F6370: .word 0x40100000
_021F6374: .word 0x40600000
_021F6378: .word 0x45800000
	thumb_func_end ov96_021F61C8

	thumb_func_start ov96_021F637C
ov96_021F637C: ; 0x021F637C
	push {r4, lr}
	add r4, r0, #0
	bl sub_02026E48
	bl sub_02023154
	add r0, r4, #0
	bl ov96_021F61C8
	mov r0, #0
	add r1, r0, #0
	bl sub_02026E50
	pop {r4, pc}
	thumb_func_end ov96_021F637C

	thumb_func_start ov96_021F6398
ov96_021F6398: ; 0x021F6398
	push {r3, r4, lr}
	sub sp, #0x2c
	ldr r3, _021F6420 ; =0x0221C0F4
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x14
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0x65
	str r0, [r2]
	lsl r1, r1, #2
	mov r2, #0
	str r2, [r4, r1]
	add r0, r1, #4
	str r2, [r4, r0]
	add r0, r1, #0
	add r0, #8
	str r2, [r4, r0]
	add r0, sp, #0xc
	strh r2, [r0]
	strh r2, [r0, #2]
	strh r2, [r0, #4]
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	sub r0, r1, #4
	ldr r0, [r4, r0]
	add r2, sp, #0xc
	str r0, [sp, #8]
	add r0, r4, r1
	mov r1, #0x19
	lsl r1, r1, #0xe
	mov r3, #0xa4
	bl sub_02023254
	mov r1, #0x19
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	add r0, sp, #0x14
	bl sub_02023514
	mov r2, #0x19
	mov r0, #1
	lsl r2, r2, #4
	lsl r0, r0, #0xe
	ldr r2, [r4, r2]
	lsl r1, r0, #6
	bl sub_02023240
	mov r1, #0
	mov r0, #1
	lsl r0, r0, #0xc
	str r0, [sp, #0x24]
	str r1, [sp, #0x20]
	str r1, [sp, #0x28]
	mov r1, #0x19
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	add r0, sp, #0x20
	bl sub_02023204
	mov r0, #0x19
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl sub_0202313C
	add sp, #0x2c
	pop {r3, r4, pc}
	.balign 4, 0
_021F6420: .word 0x0221C0F4
	thumb_func_end ov96_021F6398

	thumb_func_start ov96_021F6424
ov96_021F6424: ; 0x021F6424
	push {r3, r4, r5, r6, r7, lr}
	mov r1, #0
	add r2, r1, #0
	mov r3, #1
	add r4, r0, #0
	bl ov96_021F6524
	mov r1, #1
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #2
	bl ov96_021F6524
	mov r1, #2
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #0
	bl ov96_021F6524
	mov r2, #2
	lsl r2, r2, #0xa
	mov r3, #6
	mov r0, #0
	lsl r3, r3, #8
	lsr r5, r2, #2
	lsr r6, r2, #1
_021F6458:
	ldr r7, [r4, r5]
	str r7, [r4]
	ldr r1, [r4, r6]
	cmp r7, r1
	ble _021F6464
	str r1, [r4]
_021F6464:
	ldr r7, [r4, r3]
	ldr r1, [r4]
	cmp r1, r7
	ble _021F646E
	str r7, [r4]
_021F646E:
	ldr r7, [r4, r2]
	ldr r1, [r4]
	cmp r1, r7
	ble _021F6478
	str r7, [r4]
_021F6478:
	mov r1, #0xa
	lsl r1, r1, #8
	ldr r7, [r4, r1]
	ldr r1, [r4]
	cmp r1, r7
	ble _021F6486
	str r7, [r4]
_021F6486:
	mov r1, #3
	lsl r1, r1, #0xa
	ldr r7, [r4, r1]
	ldr r1, [r4]
	cmp r1, r7
	ble _021F6494
	str r7, [r4]
_021F6494:
	add r0, r0, #1
	add r4, r4, #4
	cmp r0, #0x80
	blt _021F6458
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6424

	thumb_func_start ov96_021F64A0
ov96_021F64A0: ; 0x021F64A0
	push {r4, r5, r6, r7}
	mov r4, #1
	mov r5, #2
	mov r6, #4
	mov r3, #0
	and r4, r1
	and r5, r1
	and r1, r6
_021F64B0:
	mov r6, #0
	str r6, [r2]
	cmp r4, #0
	beq _021F64D4
	mov r6, #2
	lsl r6, r6, #8
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F64C6
	str r7, [r2]
_021F64C6:
	mov r6, #2
	lsl r6, r6, #0xa
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F64D4
	str r7, [r2]
_021F64D4:
	cmp r5, #0
	beq _021F64F4
	mov r6, #1
	lsl r6, r6, #0xa
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F64E6
	str r7, [r2]
_021F64E6:
	mov r6, #0xa
	lsl r6, r6, #8
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F64F4
	str r7, [r2]
_021F64F4:
	cmp r1, #0
	beq _021F6514
	mov r6, #6
	lsl r6, r6, #8
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F6506
	str r7, [r2]
_021F6506:
	mov r6, #3
	lsl r6, r6, #0xa
	ldr r7, [r0, r6]
	ldr r6, [r2]
	cmp r6, r7
	ble _021F6514
	str r7, [r2]
_021F6514:
	add r3, r3, #1
	add r2, r2, #4
	add r0, r0, #4
	cmp r3, #0x80
	blt _021F64B0
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F64A0

	thumb_func_start ov96_021F6524
ov96_021F6524: ; 0x021F6524
	push {r0, r1, r2, r3}
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r3, sp, #0x20
	ldrb r4, [r3, #0xc]
	add r2, r0, #0
	add r0, r1, #0
	mov r1, #0xe
	lsl r1, r1, #8
	ldrb r3, [r3, #8]
	lsl r5, r4, #2
	add r1, r2, r1
	lsl r4, r3, #2
	add r7, r1, r5
	ldr r3, [r1, r4]
	ldr r5, [r1, r5]
	cmp r3, r5
	bgt _021F6550
	add r6, r1, r4
	add r5, sp, #0x28
	add r1, sp, #0x2c
	b _021F6558
_021F6550:
	add r6, r7, #0
	add r7, r1, r4
	add r5, sp, #0x2c
	add r1, sp, #0x28
_021F6558:
	lsl r0, r0, #9
	add r3, r2, r0
	mov ip, r1
	mov r1, #0
	mov r0, #2
	str r3, [sp]
	add r4, r1, #0
	lsl r0, r0, #0xa
_021F6568:
	add r1, r1, #1
	str r4, [r3, r0]
	add r3, r3, #4
	cmp r1, #0x80
	blt _021F6568
	ldrb r1, [r5]
	ldr r0, [r6]
	lsl r1, r1, #9
	add r3, r2, r1
	lsl r1, r0, #2
	add r3, r3, r1
	mov r1, #2
	lsl r1, r1, #8
	ldr r5, [r3, r1]
	mov r3, ip
	ldrb r3, [r3]
	ldr r1, [r7]
	lsl r3, r3, #9
	add r3, r2, r3
	lsl r2, r1, #2
	add r3, r3, r2
	mov r2, #2
	lsl r2, r2, #8
	ldr r2, [r3, r2]
	sub r0, r1, r0
	str r0, [sp, #4]
	sub r0, r0, #1
	sub r7, r2, r5
	str r0, [sp, #8]
	cmp r0, #0
	ble _021F65C8
_021F65A6:
	add r0, r4, #1
	ldr r1, [sp, #4]
	mul r0, r7
	bl _s32_div_f
	ldr r1, [r6]
	add r0, r5, r0
	add r1, r1, r4
	lsl r2, r1, #2
	ldr r1, [sp]
	add r4, r4, #1
	add r2, r1, r2
	ldr r1, _021F65D4 ; =0x00000804
	str r0, [r2, r1]
	ldr r0, [sp, #8]
	cmp r4, r0
	blt _021F65A6
_021F65C8:
	add sp, #0xc
	pop {r4, r5, r6, r7}
	pop {r3}
	add sp, #0x10
	bx r3
	nop
_021F65D4: .word 0x00000804
	thumb_func_end ov96_021F6524

	thumb_func_start ov96_021F65D8
ov96_021F65D8: ; 0x021F65D8
	ldrh r1, [r0, #0x24]
	cmp r1, #5
	bhs _021F65E2
	add r1, r1, #1
	strh r1, [r0, #0x24]
_021F65E2:
	ldrh r2, [r0, #0x20]
	ldrh r1, [r0, #0x24]
	add r1, r2, r1
	strh r1, [r0, #0x20]
	ldrh r2, [r0, #0x20]
	ldr r1, _021F65FC ; =0x000003E7
	cmp r2, r1
	bls _021F65F4
	strh r1, [r0, #0x20]
_021F65F4:
	ldrh r0, [r0, #0x24]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	.balign 4, 0
_021F65FC: .word 0x000003E7
	thumb_func_end ov96_021F65D8

	thumb_func_start ov96_021F6600
ov96_021F6600: ; 0x021F6600
	push {r4, r5, r6, r7, lr}
	sub sp, #0x3c
	str r0, [sp, #8]
	add r5, r1, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
	mov r4, #0
_021F6614:
	lsl r2, r4, #0x18
	ldr r0, [sp, #8]
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021F6798
	add r4, r4, #1
	cmp r4, #3
	blt _021F6614
	mov r0, #0
	str r0, [sp, #0xc]
	add r0, r5, #0
	str r0, [sp, #0x14]
	add r0, #0x90
	ldr r7, _021F6780 ; =0x0221DC18
	str r5, [sp, #0x1c]
	str r5, [sp, #0x18]
	str r0, [sp, #0x14]
_021F6638:
	ldr r0, [sp, #0x1c]
	ldr r1, [sp, #0x1c]
	add r0, #0x90
	ldr r4, [r0]
	add r0, sp, #0x24
	str r0, [sp]
	add r1, #0xac
	ldr r2, [r1]
	ldr r3, _021F6784 ; =0x00000FB4
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, [sp, #0x18]
	add r0, r4, #0
	ldr r2, [r2, r3]
	asr r1, r1, #0xc
	lsl r3, r2, #6
	mov r2, #0x12
	lsl r2, r2, #0x10
	sub r2, r2, r3
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, sp, #0x28
	bl ov96_021EB0A4
	add r0, sp, #0x34
	str r0, [sp]
	add r0, sp, #0x2c
	str r0, [sp, #4]
	ldr r1, [sp, #0x28]
	ldr r2, [sp, #0x24]
	add r0, r4, #0
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x30
	bl ov96_021EAF78
	ldr r0, [sp, #0xc]
	mov r4, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r4, [sp, #0x38]
	str r0, [sp, #0x20]
_021F6692:
	add r0, r5, #0
	add r0, #0x8c
	lsl r1, r4, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021F75E0
	cmp r0, #0
	beq _021F671C
	add r0, r5, #0
	add r0, #0x8c
	lsl r1, r4, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021F75D4
	ldr r1, [sp, #0x2c]
	mov r3, #2
	add r2, r0, #0
	add r0, sp, #0x30
	lsl r1, r1, #0xc
	lsl r3, r3, #0xe
	bl ov96_021F6060
	cmp r0, #0
	beq _021F671C
	add r0, r5, #0
	add r0, #0x8c
	lsl r1, r4, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	bl ov96_021F75BC
	ldr r0, [sp, #0x14]
	bl ov96_021F65D8
	add r6, r0, #0
	add r0, r5, #0
	add r0, #0x8c
	lsl r1, r4, #0x18
	ldr r0, [r0]
	lsr r1, r1, #0x18
	add r2, r6, #0
	bl ov96_021F75E8
	ldr r0, _021F6788 ; =0x00000142
	mov r1, #1
	strb r1, [r5, r0]
	ldrb r1, [r7]
	ldr r0, _021F678C ; =0x0000088D
	bl sub_0200606C
	ldr r2, _021F6790 ; =0x0221C110
	lsl r3, r6, #2
	add r2, r2, r3
	sub r2, r2, #4
	ldrb r0, [r7]
	ldr r1, _021F6794 ; =0x0000FFFF
	ldr r2, [r2]
	bl sub_02005944
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x10]
	ldr r2, [sp, #0x20]
	mov r3, #3
	bl ov96_021E8228
_021F671C:
	add r4, r4, #1
	cmp r4, #0x1d
	blt _021F6692
	ldr r0, [sp, #0x1c]
	add r7, r7, #1
	add r0, #0x38
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	add r0, #0x1c
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r0, #0x38
	str r0, [sp, #0x14]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #3
	bge _021F6742
	b _021F6638
_021F6742:
	mov r1, #0
	add r0, r1, #0
_021F6746:
	add r2, r5, #0
	add r2, #0xb6
	ldrb r2, [r2]
	cmp r2, #0
	beq _021F6774
	add r2, r5, #0
	add r2, #0xb7
	ldrb r2, [r2]
	sub r3, r2, #1
	add r2, r5, #0
	add r2, #0xb7
	strb r3, [r2]
	add r2, r5, #0
	add r2, #0xb7
	ldrb r2, [r2]
	cmp r2, #0
	bne _021F6774
	add r2, r5, #0
	add r2, #0xb7
	strb r0, [r2]
	add r2, r5, #0
	add r2, #0xb6
	strb r0, [r2]
_021F6774:
	add r1, r1, #1
	add r5, #0x38
	cmp r1, #3
	blt _021F6746
	add sp, #0x3c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F6780: .word 0x0221DC18
_021F6784: .word 0x00000FB4
_021F6788: .word 0x00000142
_021F678C: .word 0x0000088D
_021F6790: .word 0x0221C110
_021F6794: .word 0x0000FFFF
	thumb_func_end ov96_021F6600

	thumb_func_start ov96_021F6798
ov96_021F6798: ; 0x021F6798
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x20
	add r6, r1, #0
	ldr r1, _021F6A5C ; =0x00000FAC
	add r5, r2, #0
	add r2, r6, r1
	mov r1, #0x1c
	mul r1, r5
	add r4, r2, r1
	ldr r1, [r4, #0x14]
	str r0, [sp, #4]
	cmp r1, #0
	bne _021F67B6
	b _021F6B20
_021F67B6:
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	lsl r0, r5, #2
	add r1, r6, r0
	mov r0, #0xfa
	lsl r0, r0, #4
	ldr r7, [r1, r0]
	cmp r5, #0
	beq _021F67D8
	cmp r5, #1
	beq _021F67DC
	cmp r5, #2
	beq _021F67E0
	b _021F67E4
_021F67D8:
	mov r1, #6
	b _021F67EE
_021F67DC:
	mov r1, #5
	b _021F67EE
_021F67E0:
	mov r1, #3
	b _021F67EE
_021F67E4:
	bl GF_AssertFail
	add sp, #0x1fc
	add sp, #0x20
	pop {r4, r5, r6, r7, pc}
_021F67EE:
	mov r0, #0x1a
	lsl r0, r0, #4
	add r0, r6, r0
	add r2, sp, #0x1c
	bl ov96_021F64A0
	ldr r0, [r4, #0x10]
	cmp r0, #0
	ldr r0, [r4, #0x18]
	bne _021F6804
	b _021F6908
_021F6804:
	cmp r0, #0
	bgt _021F683C
	bl GF_AssertFail
	mov r3, #0
	str r3, [r4, #0x10]
	lsl r1, r7, #2
	add r0, sp, #0x1c
	ldr r0, [r0, r1]
	mov r1, #0x38
	str r0, [r4, #8]
	str r3, [r4, #0x18]
	mul r1, r5
	str r3, [r4, #0x14]
	add r1, r6, r1
	lsl r2, r7, #0x18
	str r3, [r4]
	mov r0, #1
	add r1, #0xb8
	strb r0, [r1]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021F6BE4
	add sp, #0x1fc
	add sp, #0x20
	pop {r4, r5, r6, r7, pc}
_021F683C:
	ldr r1, [r4, #8]
	ldr r0, [r4]
	add r0, r1, r0
	str r0, [r4, #8]
	mov r0, #0x38
	mul r0, r5
	str r0, [sp, #8]
	add r0, r6, r0
	add r0, #0xa8
	ldr r0, [r0]
	cmp r0, #0
	beq _021F6862
	add r1, r6, #0
	ldr r0, [sp, #8]
	add r1, #0x90
	add r0, r1, r0
	add r1, r4, #0
	bl ov96_021F6B28
_021F6862:
	add r3, sp, #0x1c
	lsl r2, r7, #2
	ldr r1, [r3, r2]
	ldr r0, [r4, #8]
	cmp r0, r1
	ble _021F6890
	ldr r0, [r4]
	bl _dflt
	ldr r3, _021F6A60 ; =0x40600000
	mov r2, #0
	bl _dsub
	bl _dtoi
	str r0, [r4]
	ldr r1, [r4, #0x18]
	neg r0, r0
	cmp r0, r1
	ble _021F6894
	neg r0, r1
	str r0, [r4]
	b _021F6AD6
_021F6890:
	cmp r0, r1
	ble _021F6896
_021F6894:
	b _021F6AD6
_021F6896:
	ldr r0, [r4]
	cmp r0, #0
	bne _021F68BA
	mov r0, #0
	str r0, [r4, #0x10]
	ldr r0, [r3, r2]
	lsl r2, r7, #0x18
	str r0, [r4, #8]
	mov r0, #0
	str r0, [r4, #0x18]
	str r0, [r4, #0x14]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	mov r3, #0
	bl ov96_021F6BE4
	b _021F6AD6
_021F68BA:
	bge _021F68E8
	mov r0, #0
	str r0, [r4, #0x10]
	add r1, r6, #0
	ldr r0, [sp, #8]
	add r1, #0x90
	add r0, r1, r0
	bl ov96_021F7130
	ldr r0, [r4]
	bl _dflt
	ldr r3, _021F6A64 ; =0xC0600000
	mov r2, #0
	bl _dgr
	bls _021F68E2
	mov r0, #0x7f
	mvn r0, r0
	str r0, [r4]
_021F68E2:
	ldr r0, [r4]
	str r0, [r4, #0x18]
	b _021F6AD6
_021F68E8:
	mov r0, #0
	str r0, [r4, #0x10]
	ldr r0, [r3, r2]
	lsl r2, r7, #0x18
	str r0, [r4, #8]
	mov r0, #0
	str r0, [r4, #0x18]
	str r0, [r4, #0x14]
	str r0, [r4]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	mov r3, #0
	bl ov96_021F6BE4
	b _021F6AD6
_021F6908:
	cmp r0, #0
	ble _021F6910
	bl GF_AssertFail
_021F6910:
	ldr r1, [r4, #8]
	ldr r0, [r4]
	add r0, r1, r0
	str r0, [r4, #8]
	bl _dflt
	ldr r3, _021F6A68 ; =0xC0B80000
	mov r2, #0
	bl _dls
	bhs _021F692E
	ldr r0, _021F6A6C ; =0xFFFFE800
	str r0, [r4, #8]
	mov r0, #0
	str r0, [r4]
_021F692E:
	lsl r0, r7, #2
	add r1, sp, #0x1c
	str r0, [sp, #0x10]
	ldr r1, [r1, r0]
	ldr r0, [r4, #8]
	cmp r0, r1
	blt _021F6A28
	lsl r2, r7, #0x18
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	mov r3, #0
	bl ov96_021F6BE4
	mov r0, #0x38
	add r1, r6, #0
	mul r0, r5
	str r1, [sp, #0x18]
	add r1, #0xb8
	str r0, [sp, #0x14]
	ldrb r0, [r1, r0]
	str r1, [sp, #0x18]
	cmp r0, #0
	beq _021F6972
	ldr r0, [sp, #0x14]
	ldr r1, [r4]
	add r0, r6, r0
	add r0, #0xbc
	ldr r0, [r0]
	mul r0, r1
	mov r1, #0xc
	bl _s32_div_f
	str r0, [r4]
_021F6972:
	ldr r1, [r4]
	ldr r0, _021F6A70 ; =0x00000898
	cmp r1, r0
	ble _021F697C
	str r0, [r4]
_021F697C:
	ldr r1, [r4]
	lsl r0, r1, #3
	add r0, r1, r0
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r4]
	cmp r0, #0
	bne _021F69C0
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x14]
	ldrb r0, [r1, r0]
	cmp r0, #0
	beq _021F69A2
	ldr r1, _021F6A74 ; =0x0221DC18
	ldr r0, _021F6A78 ; =0x000005F3
	ldrb r1, [r1, #3]
	bl sub_0200606C
_021F69A2:
	mov r3, #0
	ldr r0, [sp, #0x10]
	str r3, [r4, #0x10]
	add r1, sp, #0x1c
	ldr r0, [r1, r0]
	lsl r2, r7, #0x18
	str r0, [r4, #8]
	str r3, [r4, #0x18]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	str r3, [r4, #0x14]
	bl ov96_021F6BE4
	b _021F6AD6
_021F69C0:
	bgt _021F69C4
	b _021F6AD6
_021F69C4:
	bl _dflt
	ldr r3, _021F6A7C ; =0x40960000
	mov r2, #0
	bl _dleq
	bhi _021F69FC
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x14]
	ldrb r0, [r1, r0]
	cmp r0, #0
	bne _021F69FC
	mov r3, #0
	ldr r0, [sp, #0x10]
	str r3, [r4, #0x10]
	add r1, sp, #0x1c
	ldr r0, [r1, r0]
	lsl r2, r7, #0x18
	str r0, [r4, #8]
	str r3, [r4, #0x18]
	str r3, [r4]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	str r3, [r4, #0x14]
	bl ov96_021F6BE4
	b _021F6AD6
_021F69FC:
	mov r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4]
	ldr r1, [sp, #0x18]
	str r0, [r4, #0x18]
	ldr r0, [sp, #0x14]
	mov r2, #0
	strb r2, [r1, r0]
	ldr r1, _021F6A74 ; =0x0221DC18
	ldr r0, _021F6A80 ; =0x00000656
	ldrb r1, [r1, #3]
	bl sub_0200606C
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #4]
	ldr r1, [sp, #0xc]
	add r2, r5, #0
	mov r3, #2
	bl ov96_021E8228
	b _021F6AD6
_021F6A28:
	cmp r0, r1
	bge _021F6AD6
	ldr r0, [r4]
	cmp r0, #0
	bge _021F6A4E
	bl _dflt
	ldr r2, _021F6A84 ; =0x9999999A
	ldr r3, _021F6A88 ; =0x40899999
	bl _dadd
	bl _dtoi
	str r0, [r4]
	cmp r0, #0
	blt _021F6AD6
	mov r0, #0
	str r0, [r4]
	b _021F6AD6
_021F6A4E:
	blt _021F6AD6
	bl _dflt
	ldr r2, _021F6A8C ; =0x55555555
	ldr r3, _021F6A90 ; =0x40755555
	b _021F6A94
	nop
_021F6A5C: .word 0x00000FAC
_021F6A60: .word 0x40600000
_021F6A64: .word 0xC0600000
_021F6A68: .word 0xC0B80000
_021F6A6C: .word 0xFFFFE800
_021F6A70: .word 0x00000898
_021F6A74: .word 0x0221DC18
_021F6A78: .word 0x000005F3
_021F6A7C: .word 0x40960000
_021F6A80: .word 0x00000656
_021F6A84: .word 0x9999999A
_021F6A88: .word 0x40899999
_021F6A8C: .word 0x55555555
_021F6A90: .word 0x40755555
_021F6A94:
	bl _dadd
	bl _dtoi
	str r0, [r4]
	ldr r0, [r4, #0x18]
	cmp r0, #0
	blt _021F6ACC
	bl GF_AssertFail
	mov r3, #0
	lsl r2, r7, #0x18
	ldr r0, [sp, #0x10]
	str r3, [r4, #0x10]
	add r1, sp, #0x1c
	ldr r0, [r1, r0]
	add r1, r5, #0
	str r0, [r4, #8]
	str r3, [r4, #0x18]
	str r3, [r4, #0x14]
	add r0, r6, #0
	lsr r2, r2, #0x18
	str r3, [r4]
	bl ov96_021F6BE4
	add sp, #0x1fc
	add sp, #0x20
	pop {r4, r5, r6, r7, pc}
_021F6ACC:
	neg r1, r0
	ldr r0, [r4]
	cmp r0, r1
	ble _021F6AD6
	str r1, [r4]
_021F6AD6:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _021F6AE8
	ldr r0, [r4, #0x14]
	cmp r0, #0
	beq _021F6AE8
	ldr r0, [r4]
	cmp r0, #0
	bne _021F6AF4
_021F6AE8:
	mov r1, #0x38
	mul r1, r5
	add r1, r6, r1
	mov r0, #0
	add r1, #0xb4
	strh r0, [r1]
_021F6AF4:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	bne _021F6B0E
	ldr r0, [r4, #0x14]
	cmp r0, #0
	beq _021F6B0E
	lsl r2, r7, #0x18
	ldr r3, [r4, #8]
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021F6BE4
_021F6B0E:
	ldr r0, [r4, #0x14]
	cmp r0, #0
	bne _021F6B20
	mov r0, #0x38
	mul r0, r5
	add r0, r6, r0
	mov r1, #1
	add r0, #0xb8
	strb r1, [r0]
_021F6B20:
	add sp, #0x1fc
	add sp, #0x20
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6798

	thumb_func_start ov96_021F6B28
ov96_021F6B28: ; 0x021F6B28
	ldr r1, [r1, #8]
	cmp r1, #0
	ble _021F6B4C
	ldr r2, [r0, #8]
	ldr r1, [r0, #0x18]
	add r2, r2, r1
	mov r1, #2
	lsl r1, r1, #0x10
	str r2, [r0, #0x1c]
	cmp r2, r1
	bge _021F6B42
	str r1, [r0, #0x1c]
	bx lr
_021F6B42:
	mov r1, #0xdf
	lsl r1, r1, #0xc
	cmp r2, r1
	ble _021F6B4C
	str r1, [r0, #0x1c]
_021F6B4C:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F6B28

	thumb_func_start ov96_021F6B50
ov96_021F6B50: ; 0x021F6B50
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	neg r0, r1
	str r0, [sp, #4]
	mov r0, #0x7f
	str r2, [sp]
	sub r4, r0, r7
	mov r6, #0
	cmp r7, #0
	ble _021F6B82
	add r5, r2, #0
_021F6B68:
	add r0, r6, #1
	lsl r0, r0, #0x18
	ldr r1, [sp, #4]
	lsr r0, r0, #0x18
	mul r0, r1
	add r1, r7, #1
	bl _s32_div_f
	neg r0, r0
	add r6, r6, #1
	stmia r5!, {r0}
	cmp r6, r7
	blt _021F6B68
_021F6B82:
	mov r5, #0
	cmp r4, #0
	ble _021F6BAC
	add r6, r7, #1
_021F6B8A:
	sub r0, r4, r5
	lsl r0, r0, #0x18
	ldr r1, [sp, #4]
	lsr r0, r0, #0x18
	mul r0, r1
	add r1, r4, #1
	bl _s32_div_f
	add r1, r6, r5
	lsl r1, r1, #0x18
	lsr r2, r1, #0x16
	ldr r1, [sp]
	neg r0, r0
	add r5, r5, #1
	str r0, [r1, r2]
	cmp r5, r4
	blt _021F6B8A
_021F6BAC:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F6B50

	thumb_func_start ov96_021F6BB0
ov96_021F6BB0: ; 0x021F6BB0
	push {r4, r5}
	mov r1, #0x1a
	lsl r1, r1, #4
	add r2, r0, r1
	ldr r3, _021F6BE0 ; =0x00000FAC
	mov r4, #0xe
	add r0, r0, r3
	mov r1, #0
	add r3, r2, #0
	lsl r4, r4, #8
_021F6BC4:
	ldr r5, [r0, #0x14]
	cmp r5, #0
	bne _021F6BD2
	ldr r5, [r3, r4]
	lsl r5, r5, #2
	ldr r5, [r2, r5]
	str r5, [r0, #8]
_021F6BD2:
	add r1, r1, #1
	add r0, #0x1c
	add r3, r3, #4
	cmp r1, #3
	blt _021F6BC4
	pop {r4, r5}
	bx lr
	.balign 4, 0
_021F6BE0: .word 0x00000FAC
	thumb_func_end ov96_021F6BB0

	thumb_func_start ov96_021F6BE4
ov96_021F6BE4: ; 0x021F6BE4
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	lsl r6, r1, #9
	add r7, r3, #0
	mov r1, #0x3a
	mov r3, #0
	add r0, r2, #0
	add r5, r4, r6
	add r2, r3, #0
	lsl r1, r1, #4
_021F6BF8:
	add r3, r3, #1
	str r2, [r5, r1]
	add r5, r5, #4
	cmp r3, #0x80
	blt _021F6BF8
	mov r1, #0x3a
	lsl r1, r1, #4
	add r1, r4, r1
	add r2, r1, r6
	lsl r1, r0, #2
	str r7, [r2, r1]
	ldr r1, [r2, r1]
	bl ov96_021F6B50
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6BE4

	thumb_func_start ov96_021F6C18
ov96_021F6C18: ; 0x021F6C18
	push {r4, lr}
	sub sp, #8
	mov r2, #3
	mov r1, #0xa8
	mov r3, #0x65
	add r4, r0, #0
	str r2, [sp]
	bl ov96_021EB2BC
	mov r0, #3
	str r0, [sp]
	mov r0, #4
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xa8
	mov r2, #0
	mov r3, #0x65
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xa8
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xa8
	mov r2, #1
	mov r3, #0x65
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6C18

	thumb_func_start ov96_021F6C5C
ov96_021F6C5C: ; 0x021F6C5C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #4]
	add r0, #0x8c
	ldr r0, [r0]
	add r5, r1, #0
	mov r2, #2
	bl ov96_021F74D0
	mov r2, #3
	add r0, r5, #0
	mov r1, #1
	mov r3, #0x65
	str r2, [sp]
	bl ov96_021EB3E4
	ldr r1, [sp, #4]
	str r0, [r1, #0x64]
	mov r1, #0xc
	bl ov96_021EB564
	ldr r0, [sp, #4]
	mov r1, #1
	ldr r0, [r0, #0x64]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r4, [sp, #4]
	mov r6, #0
	mov r7, #4
_021F6C98:
	add r0, r5, #0
	mov r1, #1
	mov r2, #3
	mov r3, #0x65
	str r7, [sp]
	bl ov96_021EB3E4
	add r1, r6, #0
	str r0, [r4, #0x68]
	add r1, #0xd
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r4, #0x68]
	add r2, r1, #0
	bl ov96_021EB52C
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #4
	blt _021F6C98
	ldr r4, [sp, #4]
	mov r6, #0
	mov r7, #7
_021F6CC8:
	add r0, r5, #0
	mov r1, #1
	mov r2, #3
	mov r3, #0x65
	str r7, [sp]
	bl ov96_021EB3E4
	add r1, r4, #0
	add r1, #0x94
	str r0, [r1]
	add r0, r4, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #0xb
	bl ov96_021EB564
	add r0, r4, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #9
	bl ov96_021EB630
	add r6, r6, #1
	add r4, #0x38
	cmp r6, #4
	blt _021F6CC8
	ldr r4, [sp, #4]
	mov r6, #0
	mov r7, #8
_021F6D02:
	str r7, [sp]
	add r0, r5, #0
	mov r1, #1
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r4, #0x78]
	mov r1, #9
	bl ov96_021EB564
	ldr r0, [r4, #0x78]
	mov r1, #6
	bl ov96_021EB630
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #4
	blt _021F6D02
	mov r0, #0
	ldr r4, [sp, #4]
	ldr r7, _021F6D9C ; =0x0221C0B0
	ldr r6, _021F6DA0 ; =0x0221C0B4
	str r0, [sp, #8]
_021F6D32:
	add r0, r5, #0
	bl ov96_021EB5E8
	add r1, r0, #0
	mov r0, #0x62
	ldr r3, [sp, #4]
	ldr r2, [sp, #4]
	lsl r0, r0, #2
	ldr r0, [r2, r0]
	ldr r3, [r3, #0x54]
	mov r2, #1
	bl ov96_021EA634
	add r1, r4, #0
	add r1, #0x84
	str r0, [r1]
	add r0, r4, #0
	add r0, #0x84
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024830
	ldrb r0, [r7]
	add r1, sp, #0xc
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	mov r0, #2
	lsl r0, r0, #0xe
	str r0, [sp, #0x10]
	mov r0, #0
	str r0, [sp, #0x14]
	add r0, r4, #0
	add r0, #0x84
	ldr r0, [r0]
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0x84
	ldrb r1, [r6]
	ldr r0, [r0]
	bl sub_020248F0
	ldr r0, [sp, #8]
	add r4, r4, #4
	add r0, r0, #1
	add r7, r7, #1
	add r6, r6, #1
	str r0, [sp, #8]
	cmp r0, #2
	blt _021F6D32
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F6D9C: .word 0x0221C0B0
_021F6DA0: .word 0x0221C0B4
	thumb_func_end ov96_021F6C5C

	thumb_func_start ov96_021F6DA4
ov96_021F6DA4: ; 0x021F6DA4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	add r5, r0, #0
	str r1, [sp]
	add r0, #0x8c
	ldr r0, [r0]
	bl ov96_021F7544
	ldr r4, _021F6E2C ; =0x0221C0C4
	add r3, sp, #0x28
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r5, #0x64]
	bl ov96_021EB588
	ldr r4, _021F6E30 ; =0x0221C0DC
	add r3, sp, #0x1c
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [sp]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x68]
	bl ov96_021EB588
	ldr r3, _021F6E34 ; =0x0221C0D0
	mov r4, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #4
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r6, r4, #0
	str r0, [r2]
_021F6DF6:
	add r3, sp, #4
	ldmia r3!, {r0, r1}
	add r2, sp, #0x10
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [sp]
	cmp r6, r0
	beq _021F6E20
	ldr r1, [sp, #0x14]
	lsl r0, r4, #0x10
	add r0, r1, r0
	str r0, [sp, #0x14]
	ldr r0, [r5, #0x68]
	add r1, r7, #0
	bl ov96_021EB588
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_021F6E20:
	add r6, r6, #1
	add r5, r5, #4
	cmp r6, #4
	blt _021F6DF6
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F6E2C: .word 0x0221C0C4
_021F6E30: .word 0x0221C0DC
_021F6E34: .word 0x0221C0D0
	thumb_func_end ov96_021F6DA4

	thumb_func_start ov96_021F6E38
ov96_021F6E38: ; 0x021F6E38
	push {r4, lr}
	mov r1, #0
	add r2, r1, #0
	add r3, r0, #0
_021F6E40:
	add r4, r3, #0
	add r4, #0xb0
	ldrh r4, [r4]
	add r2, r2, #1
	add r3, #0x38
	add r1, r1, r4
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	cmp r2, #3
	blt _021F6E40
	ldr r2, _021F6E64 ; =0x000003E7
	cmp r1, r2
	bls _021F6E5C
	add r1, r2, #0
_021F6E5C:
	bl ov96_021F6E68
	pop {r4, pc}
	nop
_021F6E64: .word 0x000003E7
	thumb_func_end ov96_021F6E38

	thumb_func_start ov96_021F6E68
ov96_021F6E68: ; 0x021F6E68
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	mov r0, #0x64
	mul r0, r4
	sub r0, r6, r0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_021F6EF2:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x5c]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	add r2, r2, #1
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	add r1, r6, #0
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5]
	mov r3, #0
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021F6EF2
	ldr r0, [r5]
	mov r1, #4
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6E68

	thumb_func_start ov96_021F6F3C
ov96_021F6F3C: ; 0x021F6F3C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, r1, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	add r0, r5, #0
	add r0, #0x84
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r5, #0x88
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5]
	add r1, r1, #1
	bl sub_020248F0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F6F3C

	thumb_func_start ov96_021F6F80
ov96_021F6F80: ; 0x021F6F80
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r7, r1, #0
	mov r4, #0
	str r0, [sp, #0x10]
	add r5, r7, #4
	add r6, r4, #0
_021F6F8E:
	lsl r0, r4, #4
	add r0, r5, r0
	add r1, r6, #0
	bl FillWindowPixelBuffer
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F6F8E
	ldr r0, [sp, #0x10]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	ldr r1, [sp, #0x14]
	bl ov96_021E5F34
	ldr r1, [r7, #0x54]
	bl sub_02028F68
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F704C ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r7, #4
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r0, r7, #4
	mov r4, #1
	mov r5, #0
	str r0, [sp, #0x18]
_021F6FE4:
	ldr r0, [sp, #0x14]
	cmp r5, r0
	beq _021F7026
	ldr r0, [sp, #0x10]
	add r1, r5, #0
	bl ov96_021E5F34
	ldr r1, [r7, #0x54]
	bl sub_02028F68
	add r6, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F704C ; =0x000F0E00
	lsl r1, r4, #4
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x18]
	add r2, r6, #0
	add r0, r0, r1
	mov r1, #0
	add r3, r1, #0
	bl sub_020200FC
	add r0, r6, #0
	bl String_dtor
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_021F7026:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #4
	blo _021F6FE4
	mov r4, #0
	add r5, r7, #4
_021F7034:
	lsl r0, r4, #4
	add r0, r5, r0
	bl CopyWindowToVram
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F7034
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	nop
_021F704C: .word 0x000F0E00
	thumb_func_end ov96_021F6F80

	thumb_func_start ov96_021F7050
ov96_021F7050: ; 0x021F7050
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r7, _021F70A8 ; =0x0221C1CC
	mov r4, #0
	add r6, r5, #4
_021F705A:
	lsl r1, r4, #4
	lsl r2, r4, #3
	ldr r0, [r5]
	add r1, r6, r1
	add r2, r7, r2
	bl AddWindow
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021F705A
	mov r2, #0
	str r2, [sp]
	ldr r0, [r5]
	mov r1, #6
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r5, #0x54]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	mov r2, #0
	str r2, [sp]
	ldr r0, [r5]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r5, #0x54]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F70A8: .word 0x0221C1CC
	thumb_func_end ov96_021F7050

	thumb_func_start ov96_021F70AC
ov96_021F70AC: ; 0x021F70AC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r7, r1, #0
	add r0, #0x44
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r2, _021F7128 ; =0x00000135
	ldr r3, [r5, #0x54]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r4, r0, #0
	ldr r0, [r5, #0x54]
	bl ScrStrBufs_new
	mov r1, #1
	str r1, [sp]
	str r1, [sp, #4]
	mov r1, #0
	add r2, r7, #0
	mov r3, #3
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x54]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0xa1
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F712C ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0x44
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r4, #0
	bl DestroyMsgData
	add r5, #0x44
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F7128: .word 0x00000135
_021F712C: .word 0x000F0E00
	thumb_func_end ov96_021F70AC

	thumb_func_start ov96_021F7130
ov96_021F7130: ; 0x021F7130
	ldr r2, [r0, #0x18]
	cmp r2, #0
	beq _021F715A
	ble _021F7148
	mov r1, #2
	lsl r1, r1, #0xc
	sub r1, r2, r1
	str r1, [r0, #0x18]
	bpl _021F715A
	mov r1, #0
	str r1, [r0, #0x18]
	bx lr
_021F7148:
	bge _021F715A
	mov r1, #2
	lsl r1, r1, #0xc
	add r1, r2, r1
	str r1, [r0, #0x18]
	cmp r1, #0
	ble _021F715A
	mov r1, #0
	str r1, [r0, #0x18]
_021F715A:
	bx lr
	thumb_func_end ov96_021F7130

	thumb_func_start ov96_021F715C
ov96_021F715C: ; 0x021F715C
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r5, r1, #0
	add r7, r2, #0
	add r4, r3, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	add r0, r6, #0
	add r2, r7, #0
	bl ov96_021E60D8
	ldrb r1, [r0, #2]
	lsl r1, r1, #2
	ldr r1, [r5, r1]
	str r1, [r4, #0x2c]
	ldrb r1, [r0, #3]
	lsl r1, r1, #2
	add r1, r5, r1
	ldr r1, [r1, #0x14]
	str r1, [r4, #0x30]
	ldrb r0, [r0, #4]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x28]
	str r0, [r4, #0x34]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F715C

	thumb_func_start ov96_021F7194
ov96_021F7194: ; 0x021F7194
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x60
	str r0, [sp, #8]
	mov r0, #0
	add r4, r1, #0
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	ldr r1, _021F7494 ; =0x00000FAC
	ldr r0, [sp, #0xc]
	add r4, #0x90
	add r0, r0, r1
	str r0, [sp, #0x14]
_021F71AC:
	ldr r1, _021F7494 ; =0x00000FAC
	ldr r0, [sp, #0xc]
	ldr r5, [sp, #0xc]
	add r6, r0, r1
	ldr r0, [sp, #0x10]
	mov r7, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x24]
	add r0, r4, #0
	str r0, [sp, #0x28]
	add r0, #0x1c
	add r5, #0x90
	str r0, [sp, #0x28]
_021F71C8:
	ldr r0, [sp, #0x10]
	cmp r0, r7
	beq _021F72A0
	ldr r0, [sp, #8]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x18]
	ldr r0, [r4]
	str r0, [sp, #0x20]
	ldr r0, [r5]
	str r0, [sp, #0x1c]
	add r0, sp, #0x2c
	str r0, [sp]
	ldr r1, [r4, #0x1c]
	ldr r0, [sp, #0x20]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	ldr r2, [sp, #0x14]
	ldr r2, [r2, #8]
	lsl r3, r2, #6
	mov r2, #0x12
	lsl r2, r2, #0x10
	sub r3, r2, r3
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r2, r2, #0xc
	add r3, sp, #0x30
	bl ov96_021EB0A4
	add r0, sp, #0x58
	str r0, [sp]
	add r0, sp, #0x38
	str r0, [sp, #4]
	ldr r1, [sp, #0x30]
	ldr r2, [sp, #0x2c]
	ldr r0, [sp, #0x20]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x54
	bl ov96_021EAF78
	mov r0, #0
	str r0, [sp, #0x5c]
	add r0, sp, #0x2c
	str r0, [sp]
	ldr r1, [r5, #0x1c]
	ldr r0, [sp, #0x1c]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	ldr r2, [r6, #8]
	lsl r3, r2, #6
	mov r2, #0x12
	lsl r2, r2, #0x10
	sub r3, r2, r3
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r2, r2, #0xc
	add r3, sp, #0x30
	bl ov96_021EB0A4
	add r0, sp, #0x4c
	str r0, [sp]
	add r0, sp, #0x34
	str r0, [sp, #4]
	ldr r1, [sp, #0x30]
	ldr r2, [sp, #0x2c]
	ldr r0, [sp, #0x1c]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x48
	bl ov96_021EAF78
	ldr r1, [sp, #0x38]
	ldr r3, [sp, #0x34]
	mov r0, #0
	str r0, [sp, #0x50]
	add r0, sp, #0x54
	lsl r1, r1, #0xc
	add r2, sp, #0x48
	lsl r3, r3, #0xc
	bl ov96_021F6060
	cmp r0, #0
	bne _021F7294
	add r1, r4, r7
	add r1, #0x29
	mov r0, #0
	strb r0, [r1]
	ldr r0, [sp, #0x10]
	add r1, r0, r5
	add r1, #0x29
	mov r0, #0
	strb r0, [r1]
	b _021F746C
_021F7294:
	ldr r0, [sp, #0x10]
	add r0, r0, r5
	add r0, #0x29
	ldrb r0, [r0]
	cmp r0, #0
	beq _021F72A2
_021F72A0:
	b _021F746C
_021F72A2:
	add r1, r4, #0
	add r1, #0x26
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x26
	strb r0, [r1]
	ldr r1, [r4, #0x30]
	mov r0, #0x1e
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	add r1, r4, #0
	add r1, #0x27
	strb r0, [r1]
	ldr r1, [r5, #0x30]
	mov r0, #0x1e
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	add r1, r5, #0
	add r1, #0x27
	strb r0, [r1]
	mov r1, #0
	add r0, sp, #0x3c
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, sp, #0x48
	add r1, sp, #0x54
	add r2, sp, #0x3c
	bl VEC_Subtract
	add r0, sp, #0x3c
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, [sp, #0x38]
	add r1, sp, #0x3c
	lsl r0, r0, #0xc
	add r2, sp, #0x54
	add r3, r1, #0
	bl VEC_MultAdd
	ldr r1, [sp, #0xc]
	ldr r0, _021F7498 ; =0x00000143
	ldrb r1, [r1, r0]
	mov r0, #0xc
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #0xc]
	add r1, r0, r2
	mov r0, #0x51
	lsl r0, r0, #2
	add r2, sp, #0x3c
	add r3, r1, r0
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	ldr r1, [sp, #0xc]
	str r0, [r3]
	ldr r0, _021F7498 ; =0x00000143
	ldrb r1, [r1, r0]
	ldr r0, [sp, #0xc]
	add r2, r0, r1
	mov r0, #0x5a
	mov r1, #1
	lsl r0, r0, #2
	strb r1, [r2, r0]
	ldr r1, [sp, #0xc]
	sub r0, #0x25
	ldrb r0, [r1, r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	ldr r2, [sp, #0xc]
	ldr r0, _021F7498 ; =0x00000143
	strb r1, [r2, r0]
	ldr r1, _021F749C ; =0x0221DC18
	ldr r0, _021F74A0 ; =0x000008A3
	ldrb r1, [r1, #3]
	bl sub_0200606C
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x24]
	mov r3, #4
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	lsl r2, r7, #0x18
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	lsr r2, r2, #0x18
	mov r3, #4
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x24]
	mov r3, #1
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	lsl r2, r7, #0x18
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	lsr r2, r2, #0x18
	mov r3, #1
	bl ov96_021E8228
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x10]
	cmp r0, #0
	beq _021F7404
	ldr r0, [r6, #0x10]
	cmp r0, #0
	beq _021F7404
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #8]
	cmp r0, #0
	ble _021F7404
	ldr r0, [r6, #8]
	cmp r0, #0
	ble _021F7404
	add r0, r4, r7
	add r0, #0x29
	ldrb r0, [r0]
	cmp r0, #0
	bne _021F746C
	ldr r0, [sp, #0x10]
	add r0, r0, r5
	add r0, #0x29
	ldrb r0, [r0]
	cmp r0, #0
	bne _021F746C
	add r1, r4, r7
	add r1, #0x29
	mov r0, #1
	strb r0, [r1]
	ldr r0, [sp, #0x10]
	add r1, r0, r5
	add r1, #0x29
	mov r0, #1
	strb r0, [r1]
	ldr r1, [sp, #0x14]
	ldr r0, [r6]
	ldr r1, [r1]
	str r1, [r6]
	ldr r1, [sp, #0x14]
	str r0, [r1]
	ldr r1, [r5, #0x18]
	ldr r0, [r4, #0x18]
	str r0, [r5, #0x18]
	ldr r0, [sp, #0x14]
	str r1, [r4, #0x18]
	ldr r0, [r0]
	cmp r0, #0
	bge _021F73F8
	ldr r0, [sp, #0x14]
	mov r1, #0
	str r1, [r0]
_021F73F8:
	ldr r0, [r6]
	cmp r0, #0
	bge _021F746C
	mov r0, #0
	str r0, [r6]
	b _021F746C
_021F7404:
	ldr r1, [r4, #0x1c]
	ldr r0, [r5, #0x1c]
	cmp r1, r0
	bgt _021F7424
	ldr r0, [sp, #0x28]
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0x10
	sub r1, r1, r0
	ldr r0, [sp, #0x28]
	str r1, [r0]
	mov r0, #1
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #0x10
	add r0, r1, r0
	b _021F743A
_021F7424:
	ldr r0, [sp, #0x28]
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0x10
	add r1, r1, r0
	ldr r0, [sp, #0x28]
	str r1, [r0]
	mov r0, #1
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #0x10
	sub r0, r1, r0
_021F743A:
	str r0, [r5, #0x1c]
	mov r0, #2
	ldr r1, [r4, #0x1c]
	lsl r0, r0, #0x10
	cmp r1, r0
	bge _021F744A
	str r0, [r4, #0x1c]
	b _021F7454
_021F744A:
	mov r0, #0xdf
	lsl r0, r0, #0xc
	cmp r1, r0
	ble _021F7454
	str r0, [r4, #0x1c]
_021F7454:
	mov r0, #2
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #0x10
	cmp r1, r0
	bge _021F7462
	str r0, [r5, #0x1c]
	b _021F746C
_021F7462:
	mov r0, #0xdf
	lsl r0, r0, #0xc
	cmp r1, r0
	ble _021F746C
	str r0, [r5, #0x1c]
_021F746C:
	add r7, r7, #1
	add r5, #0x38
	add r6, #0x1c
	cmp r7, #3
	bge _021F7478
	b _021F71C8
_021F7478:
	ldr r0, [sp, #0x14]
	add r4, #0x38
	add r0, #0x1c
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #3
	bge _021F748C
	b _021F71AC
_021F748C:
	mov r0, #0
	add sp, #0x60
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F7494: .word 0x00000FAC
_021F7498: .word 0x00000143
_021F749C: .word 0x0221DC18
_021F74A0: .word 0x000008A3
	thumb_func_end ov96_021F7194

	thumb_func_start ov96_021F74A4
ov96_021F74A4: ; 0x021F74A4
	push {r4, lr}
	mov r1, #0x33
	lsl r1, r1, #4
	bl AllocFromHeap
	mov r2, #0x33
	mov r1, #0
	lsl r2, r2, #4
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0xcb
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r4, r0]
	add r0, r4, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F74A4

	thumb_func_start ov96_021F74C8
ov96_021F74C8: ; 0x021F74C8
	ldr r3, _021F74CC ; =FreeToHeap
	bx r3
	.balign 4, 0
_021F74CC: .word FreeToHeap
	thumb_func_end ov96_021F74C8

	thumb_func_start ov96_021F74D0
ov96_021F74D0: ; 0x021F74D0
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	mov r7, #0
_021F74DA:
	mov r0, #2
	str r0, [sp]
	add r0, r4, #0
	add r1, r6, #0
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #1
	str r0, [r5, #0x10]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x10]
	mov r1, #8
	bl ov96_021EB564
	mov r0, #5
	str r0, [sp]
	add r0, r4, #0
	add r1, r6, #0
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r5, #0x14]
	mov r0, #6
	str r0, [sp]
	add r0, r4, #0
	add r1, r6, #0
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r5, #0x18]
	ldr r0, [r5, #0x10]
	mov r1, #0x14
	bl ov96_021EB630
	ldr r0, [r5, #0x14]
	mov r1, #7
	bl ov96_021EB630
	ldr r0, [r5, #0x18]
	mov r1, #8
	bl ov96_021EB630
	add r7, r7, #1
	add r5, #0x1c
	cmp r7, #0x1d
	blt _021F74DA
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F74D0

	thumb_func_start ov96_021F7544
ov96_021F7544: ; 0x021F7544
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	ldr r4, _021F7594 ; =0x0221C21C
	add r5, r0, #0
	mov r6, #0
	add r7, sp, #0
_021F7550:
	ldrh r0, [r4]
	add r1, r7, #0
	lsl r0, r0, #0xf
	str r0, [sp]
	ldrh r0, [r4, #2]
	lsl r0, r0, #0xf
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	ldr r0, [r5, #0x10]
	bl ov96_021EB588
	ldr r0, [r5, #0x14]
	add r1, r7, #0
	bl ov96_021EB588
	ldr r0, [r5, #0x18]
	add r1, r7, #0
	bl ov96_021EB588
	add r3, sp, #0
	add r2, r5, #4
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r6, r6, #1
	str r0, [r2]
	add r4, r4, #4
	add r5, #0x1c
	cmp r6, #0x1d
	blt _021F7550
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_021F7594: .word 0x0221C21C
	thumb_func_end ov96_021F7544

	thumb_func_start ov96_021F7598
ov96_021F7598: ; 0x021F7598
	push {r4, lr}
	mov r1, #0xcb
	add r4, r0, #0
	lsl r1, r1, #2
	ldr r2, [r4, r1]
	cmp r2, #0
	bne _021F75B4
	bl ov96_021F7620
	mov r0, #0xcb
	mov r1, #0xf0
	lsl r0, r0, #2
	str r1, [r4, r0]
	pop {r4, pc}
_021F75B4:
	sub r0, r2, #1
	str r0, [r4, r1]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F7598

	thumb_func_start ov96_021F75BC
ov96_021F75BC: ; 0x021F75BC
	mov r2, #0x1c
	mul r2, r1
	mov r1, #0
	str r1, [r0, r2]
	add r0, r0, r2
	ldr r3, _021F75D0 ; =ov96_021EB564
	ldr r0, [r0, #0x10]
	mov r1, #8
	bx r3
	nop
_021F75D0: .word ov96_021EB564
	thumb_func_end ov96_021F75BC

	thumb_func_start ov96_021F75D4
ov96_021F75D4: ; 0x021F75D4
	mov r2, #0x1c
	mul r2, r1
	add r0, r0, r2
	add r0, r0, #4
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F75D4

	thumb_func_start ov96_021F75E0
ov96_021F75E0: ; 0x021F75E0
	mov r2, #0x1c
	mul r2, r1
	ldr r0, [r0, r2]
	bx lr
	thumb_func_end ov96_021F75E0

	thumb_func_start ov96_021F75E8
ov96_021F75E8: ; 0x021F75E8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	mov r0, #0x1c
	add r6, r5, #0
	mul r4, r0
	add r6, #0x18
	ldr r0, [r6, r4]
	mov r1, #0xa
	add r7, r2, #0
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r6, r4]
	add r2, r1, #0
	bl ov96_021EB52C
	add r5, #0x14
	ldr r0, [r5, r4]
	add r1, r7, #0
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r5, r4]
	add r2, r1, #0
	bl ov96_021EB52C
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F75E8

	thumb_func_start ov96_021F7620
ov96_021F7620: ; 0x021F7620
	push {r4, r5, r6, r7, lr}
	sub sp, #0x74
	mov r4, #0
	add r3, r4, #0
	add r1, sp, #0
_021F762A:
	ldr r2, [r0]
	cmp r2, #0
	bne _021F7636
	lsl r2, r4, #2
	add r4, r4, #1
	str r0, [r1, r2]
_021F7636:
	add r3, r3, #1
	add r0, #0x1c
	cmp r3, #0x1d
	blt _021F762A
	lsl r1, r4, #2
	add r0, sp, #0
	mov r7, #0
	add r5, r0, r1
_021F7646:
	cmp r4, #0
	ble _021F767E
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r6, r0, #0x16
	add r0, sp, #0
	ldr r1, [r0, r6]
	mov r0, #1
	str r0, [r1]
	add r0, sp, #0
	ldr r0, [r0, r6]
	mov r1, #7
	ldr r0, [r0, #0x10]
	bl ov96_021EB564
	sub r0, r5, #4
	ldr r1, [r0]
	add r0, sp, #0
	add r7, r7, #1
	str r1, [r0, r6]
	sub r5, r5, #4
	sub r4, r4, #1
	cmp r7, #0x19
	blt _021F7646
_021F767E:
	add sp, #0x74
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F7620

	thumb_func_start ov96_021F7684
ov96_021F7684: ; 0x021F7684
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r1, #0
	ldr r1, [sp, #0x28]
	add r4, r3, #0
	str r1, [sp, #0x28]
	mov r1, #0x24
	bl AllocFromHeap
	str r0, [sp, #8]
	mov r1, #0
	mov r2, #0x24
	bl MIi_CpuFill8
	ldr r0, [sp, #8]
	strb r5, [r0, #0x1c]
	mov r0, #4
	sub r1, r0, r5
	ldr r0, [sp, #8]
	add r0, #0x21
	strb r1, [r0]
	ldr r0, [sp, #8]
	add r0, #0x21
	ldrb r1, [r0]
	ldr r0, [sp, #8]
	add r0, #0x20
	strb r1, [r0]
	ldr r0, [sp, #8]
	mov r1, #3
	strb r1, [r0, #0x1f]
	str r4, [r0, #4]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	ldrb r0, [r0, #0x1c]
	cmp r0, #0
	ble _021F7730
_021F76CE:
	ldr r0, [sp, #8]
	mov r4, #0
	add r0, #0x20
	ldrb r1, [r0]
	ldr r0, [sp, #0xc]
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	lsl r1, r0, #1
	str r0, [sp, #4]
	add r1, r0, r1
	ldr r0, [sp, #8]
	add r5, r0, r1
	add r1, r0, #0
	ldr r0, [sp, #4]
	add r0, r1, r0
	add r6, r0, #0
	add r7, r0, #0
	str r0, [sp]
	add r6, #8
	add r7, #0xc
_021F76F8:
	ldr r0, [sp, #0x28]
	ldr r1, [sp, #4]
	add r2, r4, #0
	bl ov96_021E60D8
	ldrb r2, [r6]
	ldrb r1, [r0, #2]
	add r4, r4, #1
	add r1, r2, r1
	strb r1, [r6]
	ldrb r1, [r7]
	ldrb r0, [r0, #4]
	add r0, r1, r0
	strb r0, [r7]
	ldr r0, [sp]
	ldrb r0, [r0, #8]
	strb r0, [r5, #0x10]
	add r5, r5, #1
	cmp r4, #3
	blt _021F76F8
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	ldrb r1, [r0, #0x1c]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	blt _021F76CE
_021F7730:
	ldr r0, [sp, #8]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F7684

	thumb_func_start ov96_021F7738
ov96_021F7738: ; 0x021F7738
	ldr r3, _021F773C ; =FreeToHeap
	bx r3
	.balign 4, 0
_021F773C: .word FreeToHeap
	thumb_func_end ov96_021F7738

	thumb_func_start ov96_021F7740
ov96_021F7740: ; 0x021F7740
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r0, [sp]
	mov r0, #4
	add r5, r1, #0
	str r0, [sp, #4]
	add r0, r5, #0
	add r0, #0x21
	ldrb r0, [r0]
	cmp r0, #4
	bne _021F775C
	add sp, #8
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021F775C:
	ldrb r0, [r5, #0x1e]
	add r0, r0, #1
	strb r0, [r5, #0x1e]
	add r0, r5, #0
	add r0, #0x20
	ldrb r6, [r0]
	cmp r6, #4
	bge _021F7788
	mov r0, #0x28
	add r4, r6, #0
	mul r4, r0
	mov r7, #0
_021F7774:
	ldr r0, [r5, #4]
	add r0, #0x50
	add r0, r0, r4
	bl ov96_021E8A20
	add r6, r6, #1
	add r4, #0x28
	str r7, [r0]
	cmp r6, #4
	blt _021F7774
_021F7788:
	ldrb r1, [r5, #0x1e]
	ldrb r0, [r5, #0x1f]
	cmp r1, r0
	blo _021F7798
	mov r0, #1
	str r0, [r5]
	mov r0, #0
	strb r0, [r5, #0x1e]
_021F7798:
	ldr r0, [r5]
	cmp r0, #0
	beq _021F77E6
	add r0, r5, #0
	add r0, #0x20
	ldrb r1, [r0]
	ldrb r0, [r5, #0x1d]
	add r4, r1, r0
	cmp r4, r1
	bge _021F77B0
	bl GF_AssertFail
_021F77B0:
	add r0, r5, #0
	add r0, #0x20
	ldrb r0, [r0]
	cmp r4, r0
	bge _021F77C0
	add sp, #8
	mov r0, #4
	pop {r3, r4, r5, r6, r7, pc}
_021F77C0:
	lsl r2, r4, #0x18
	ldr r0, [sp]
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021F77EC
	lsl r0, r4, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldrb r0, [r5, #0x1d]
	add r0, r0, #1
	strb r0, [r5, #0x1d]
	ldrb r1, [r5, #0x1d]
	ldrb r0, [r5, #0x1c]
	cmp r1, r0
	blo _021F77E6
	mov r0, #0
	strb r0, [r5, #0x1d]
	str r0, [r5]
_021F77E6:
	ldr r0, [sp, #4]
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F7740

	thumb_func_start ov96_021F77EC
ov96_021F77EC: ; 0x021F77EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r6, r1, #0
	ldr r1, [r6, #4]
	str r0, [sp, #4]
	add r5, r2, #0
	mov r0, #0x28
	add r1, #0x50
	mul r0, r5
	add r0, r1, r0
	bl ov96_021E8A20
	add r4, r6, #0
	add r4, #8
	add r7, r0, #0
	ldrb r0, [r4, r5]
	cmp r0, #0
	bne _021F7814
	mov r0, #0
	b _021F782A
_021F7814:
	bl LCRandom
	mov r1, #0x65
	bl _s32_div_f
	add r0, r6, r5
	ldrb r2, [r4, r5]
	ldrb r0, [r0, #0xc]
	lsl r2, r2, #1
	add r0, r0, r2
	add r0, r0, r1
_021F782A:
	cmp r0, #0x64
	blt _021F7874
	mov r0, #1
	str r0, [r7]
	bl LCRandom
	ldrb r1, [r4, r5]
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsl r1, r5, #1
	add r1, r5, r1
	lsr r0, r0, #0x18
	mov r4, #0
	add r1, r6, r1
_021F7848:
	add r2, r1, r4
	ldrb r2, [r2, #0x10]
	cmp r0, r2
	bhs _021F7862
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #4]
	add r1, r5, #0
	add r2, r4, #0
	mov r3, #3
	bl ov96_021E8228
	b _021F786C
_021F7862:
	add r2, r4, #1
	lsl r2, r2, #0x18
	lsr r4, r2, #0x18
	cmp r4, #3
	blo _021F7848
_021F786C:
	cmp r4, #3
	blo _021F7874
	bl GF_AssertFail
_021F7874:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F77EC

	thumb_func_start ov96_021F7878
ov96_021F7878: ; 0x021F7878
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r5, r1, #0
	add r6, r0, #0
	add r4, r2, #0
	cmp r5, #0
	bne _021F788A
	bl GF_AssertFail
_021F788A:
	ldr r2, _021F78C0 ; =0x0221C2A0
	add r0, r5, #0
	add r1, r6, #0
	bl AddWindow
	mov r1, #1
	mov r2, #0
	add r0, r5, #0
	add r3, r1, #0
	str r2, [sp]
	bl sub_0201C1F4
	mov r1, #0x1e
	mov r0, #0
	lsl r1, r1, #4
	add r2, r4, #0
	bl sub_02003030
	mov r1, #1
	mov r0, #6
	lsl r1, r1, #0xe
	add r2, r4, #0
	bl sub_02003030
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	nop
_021F78C0: .word 0x0221C2A0
	thumb_func_end ov96_021F7878

	thumb_func_start ov96_021F78C4
ov96_021F78C4: ; 0x021F78C4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r1, #0
	mov r1, #0
	add r4, r0, #0
	bl FillWindowPixelBuffer
	ldr r2, _021F7928 ; =0x00000135
	mov r0, #1
	mov r1, #0x1b
	add r3, r5, #0
	bl NewMsgDataFromNarc
	add r7, r0, #0
	add r0, r5, #0
	bl ScrStrBufs_new
	ldr r2, _021F792C ; =0x0000012F
	add r1, r7, #0
	add r3, r5, #0
	add r6, r0, #0
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r5, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F7930 ; =0x00010200
	add r2, r5, #0
	str r0, [sp, #8]
	add r0, r4, #0
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r7, #0
	bl DestroyMsgData
	add r0, r4, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F7928: .word 0x00000135
_021F792C: .word 0x0000012F
_021F7930: .word 0x00010200
	thumb_func_end ov96_021F78C4

	thumb_func_start ov96_021F7934
ov96_021F7934: ; 0x021F7934
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5DD4
	cmp r0, #5
	bls _021F794C
	b _021F7C2E
_021F794C:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F7958: ; jump table
	.short _021F7964 - _021F7958 - 2 ; case 0
	.short _021F7A04 - _021F7958 - 2 ; case 1
	.short _021F7AA0 - _021F7958 - 2 ; case 2
	.short _021F7B90 - _021F7958 - 2 ; case 3
	.short _021F7BFC - _021F7958 - 2 ; case 4
	.short _021F7C20 - _021F7958 - 2 ; case 5
_021F7964:
	mov r2, #1
	mov r0, #0x5c
	mov r1, #0x89
	lsl r2, r2, #0x12
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021F7C38 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021F7C3C ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021F7D10
	add r0, r5, #0
	mov r1, #0xac
	bl ov96_021E5D94
	mov r1, #0
	mov r2, #0xac
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r1, #0x89
	mov r0, #4
	str r1, [r4]
	bl sub_02002CEC
	mov r0, #0x89
	bl sub_0201AC88
	str r0, [r4, #0xc]
	ldr r0, [r4]
	bl ov96_021EE740
	str r0, [r4, #0x18]
	add r0, r4, #0
	ldr r2, [r4, #0xc]
	add r0, #0x1c
	mov r1, #0x89
	add r3, r5, #0
	bl ov96_021F8094
	add r0, r5, #0
	bl ov96_021E5E44
	ldr r1, [r4]
	bl ov96_021EE5B4
	add r1, r4, #0
	add r1, #0x80
	str r0, [r1]
	add r0, r4, #0
	bl ov96_021F8448
	ldr r0, _021F7C40 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021F7C32
_021F7A04:
	ldr r6, _021F7C44 ; =0x0221C2A8
	add r3, sp, #0x1c
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r4]
	bl ov96_021EB180
	mov r1, #0
	str r0, [r4, #0x10]
	mov r0, #0x4b
	lsl r0, r0, #0xe
	str r0, [sp]
	ldr r0, [r4, #0x10]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	add r0, r5, #0
	bl ov96_021E6040
	add r7, r0, #0
	bl ov96_021E9524
	add r6, r0, #0
	add r0, r7, #0
	bl ov96_021E9528
	add r3, r0, #0
	add r0, r4, #0
	lsl r2, r6, #0x18
	add r0, #0x1c
	add r1, r5, #0
	lsr r2, r2, #0x18
	bl ov96_021F80A8
	ldr r0, [r4]
	ldr r1, [r4, #0xc]
	ldr r2, [r4, #0x10]
	bl ov96_021F8EB0
	str r0, [r4, #0x14]
	mov r1, #2
	bl ov96_021F8F44
	ldr r0, [r4, #0x10]
	bl ov96_021EB3A4
	mov r2, #0x4b
	ldr r0, [r4, #0x14]
	add r1, r5, #0
	lsl r2, r2, #2
	bl ov96_021F8F94
	add r0, r4, #0
	bl ov96_021F8528
	add r0, r4, #0
	bl ov96_021F85A0
	mov r0, #2
	bl ov96_021EEBC8
	add r1, r0, #0
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	ldr r3, [r4]
	mov r2, #0xb
	bl ov96_021EEA88
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021F7C32
_021F7AA0:
	ldr r0, [r4, #0xc]
	bl ov96_021E6030
	ldr r0, [r4, #0xc]
	ldr r1, [r4]
	bl ov96_021F7D30
	add r0, r4, #0
	add r0, #0x80
	ldr r0, [r0]
	ldr r1, [r4, #0xc]
	bl ov96_021EE60C
	add r0, r4, #0
	bl ov96_021F7DA8
	add r0, r4, #0
	add r0, #0x80
	ldr r0, [r0]
	bl ov96_021EE644
	mov r0, #4
	mov r1, #0
	bl sub_02022CC8
	mov r0, #8
	mov r1, #0
	bl sub_02022CC8
	add r0, r5, #0
	bl ov96_021E5EE8
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5D60
	str r0, [sp]
	ldr r0, [r4, #0x18]
	ldr r1, [r4, #0xc]
	mov r2, #5
	add r3, r6, #0
	bl ov96_021EE75C
	add r0, r4, #0
	add r0, #0x80
	ldr r0, [r0]
	bl ov96_021EE6A0
	mov r0, #0
	mov r1, #1
	lsl r1, r1, #0xc
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	str r0, [sp, #0x14]
	str r1, [sp, #0x18]
	bl sub_020D3AB4
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #7
	mov r2, #1
	mov r3, #0
	bl sub_0201BE0C
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #7
	mov r2, #5
	mov r3, #0x10
	bl sub_0201BE0C
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #6
	mov r2, #1
	mov r3, #0
	bl sub_0201BE0C
	add r0, sp, #0xc
	str r0, [sp]
	mov r0, #0x80
	str r0, [sp, #4]
	mov r0, #0x60
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	mov r1, #6
	mov r2, #5
	mov r3, #0x10
	bl sub_0201BE0C
	add r0, r4, #0
	ldr r1, [r4, #0xc]
	ldr r2, [r4]
	add r0, #0x84
	bl ov96_021F7878
	add r0, r4, #0
	ldr r1, [r4]
	add r0, #0x84
	bl ov96_021F78C4
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021F7C32
_021F7B90:
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F7BB4
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r4, r0, #0
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	strb r1, [r4]
_021F7BB4:
	add r0, r5, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021F7BCC
	mov r0, #1
	bl sub_0203A994
	bl sub_0203A9C8
	bl sub_0203A86C
_021F7BCC:
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	mov r0, #4
	mov r1, #1
	bl sub_02022CC8
	mov r0, #8
	mov r1, #1
	bl sub_02022CC8
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021F7C32
_021F7BFC:
	ldr r0, _021F7C48 ; =0x00000473
	bl sub_02005D48
	mov r0, #6
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #8]
	mov r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	bl ov96_021E5DEC
	b _021F7C32
_021F7C20:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F7C32
	add sp, #0x28
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F7C2E:
	bl GF_AssertFail
_021F7C32:
	mov r0, #0
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F7C38: .word 0xFFFFE0FF
_021F7C3C: .word 0x04001000
_021F7C40: .word gMain + 0x60
_021F7C44: .word 0x0221C2A8
_021F7C48: .word 0x00000473
	thumb_func_end ov96_021F7934

	thumb_func_start ov96_021F7C4C
ov96_021F7C4C: ; 0x021F7C4C
	push {r4, lr}
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [r4, #0x10]
	bl ov96_021EB5BC
	add r0, r4, #0
	add r0, #0x98
	ldr r0, [r0]
	bl sub_0200D020
	ldr r0, [r4, #0x1c]
	bl ov96_021F87D0
	mov r0, #1
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F7C4C

	thumb_func_start ov96_021F7C70
ov96_021F7C70: ; 0x021F7C70
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	mov r0, #4
	bl sub_02002DB4
	ldr r0, _021F7D04 ; =0x04000050
	mov r1, #0x3f
	mov r2, #0
	bl sub_020CF178
	add r0, r4, #0
	add r0, #0x80
	ldr r0, [r0]
	bl ov96_021EE5E0
	add r0, r4, #0
	add r0, #0x84
	bl RemoveWindow
	ldr r0, [r4, #0x18]
	bl ov96_021EE808
	ldr r5, _021F7D08 ; =0x0221C290
	mov r6, #0
_021F7CB6:
	ldrb r1, [r5]
	ldr r0, [r4, #0xc]
	bl sub_0201BB4C
	add r6, r6, #1
	add r5, r5, #1
	cmp r6, #6
	blt _021F7CB6
	ldr r0, [r4, #0x14]
	bl ov96_021F8F0C
	ldr r0, [r4, #0x1c]
	bl ov96_021F8728
	ldr r0, [r4, #0x10]
	bl ov96_021EB21C
	add r0, r4, #0
	bl ov96_021F84E4
	ldr r0, [r4, #0xc]
	bl FreeToHeap
	add r0, r7, #0
	bl ov96_021E5DAC
	ldr r0, _021F7D0C ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #0x89
	bl sub_0201A9C4
	bl sub_0203A914
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F7D04: .word 0x04000050
_021F7D08: .word 0x0221C290
_021F7D0C: .word gMain + 0x60
	thumb_func_end ov96_021F7C70

	thumb_func_start ov96_021F7D10
ov96_021F7D10: ; 0x021F7D10
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021F7D2C ; =0x0221C310
	add r3, sp, #0
	mov r2, #5
_021F7D1A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021F7D1A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021F7D2C: .word 0x0221C310
	thumb_func_end ov96_021F7D10

	thumb_func_start ov96_021F7D30
ov96_021F7D30: ; 0x021F7D30
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xc0
	ldr r4, _021F7D98 ; =0x0221C2B4
	add r3, sp, #8
	add r7, r0, #0
	str r1, [sp]
	add r2, r3, #0
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r4, _021F7D9C ; =0x0221C338
	add r3, sp, #0x18
	mov r2, #0x15
_021F7D52:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021F7D52
	mov r0, #0
	ldr r4, _021F7DA0 ; =0x0221C298
	ldr r5, _021F7DA4 ; =0x0221C290
	str r0, [sp, #4]
	add r6, sp, #0x18
_021F7D64:
	ldrb r1, [r5]
	ldrb r3, [r4]
	add r0, r7, #0
	add r2, r6, #0
	bl sub_0201B1E4
	ldrb r1, [r5]
	add r0, r7, #0
	bl sub_0201CAE0
	ldrb r0, [r5]
	ldr r3, [sp]
	mov r1, #0x40
	mov r2, #0
	bl sub_0201C1C4
	ldr r0, [sp, #4]
	add r4, r4, #1
	add r0, r0, #1
	add r6, #0x1c
	add r5, r5, #1
	str r0, [sp, #4]
	cmp r0, #6
	blt _021F7D64
	add sp, #0xc0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F7D98: .word 0x0221C2B4
_021F7D9C: .word 0x0221C338
_021F7DA0: .word 0x0221C298
_021F7DA4: .word 0x0221C290
	thumb_func_end ov96_021F7D30

	thumb_func_start ov96_021F7DA8
ov96_021F7DA8: ; 0x021F7DA8
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	mov r3, #4
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	ldr r0, [r4]
	mov r2, #4
	str r0, [sp, #4]
	mov r0, #0xa0
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r4]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r4]
	mov r1, #1
	str r0, [sp, #0xc]
	ldr r2, [r4, #0xc]
	mov r0, #0xa0
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xa0
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F7DA8

	thumb_func_start ov96_021F7E64
ov96_021F7E64: ; 0x021F7E64
	push {r3, lr}
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	ldrb r0, [r0, #2]
	pop {r3, pc}
	thumb_func_end ov96_021F7E64

	thumb_func_start ov96_021F7E74
ov96_021F7E74: ; 0x021F7E74
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	mov r4, #0
	add r6, r0, #0
	add r7, r1, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x14]
	add r0, r4, #0
	str r0, [sp, #0x18]
	bl sub_02006BCC
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #1
	bne _021F7E9E
	add r0, r6, #0
	bl ov96_021F85F4
	add r4, r0, #0
_021F7E9E:
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x18]
	bl ov96_021EE830
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x18]
	bl ov96_021EEA80
	cmp r0, #0
	bne _021F7EB6
	cmp r4, #0
	beq _021F7EB8
_021F7EB6:
	b _021F8080
_021F7EB8:
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x18]
	bl ov96_021EE97C
	str r0, [sp, #0x10]
	mov r0, #0
	mvn r0, r0
	str r0, [sp, #0xc]
	ldrb r0, [r7]
	cmp r0, #8
	bhi _021F7F0A
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F7EDA: ; jump table
	.short _021F7EEC - _021F7EDA - 2 ; case 0
	.short _021F7EFC - _021F7EDA - 2 ; case 1
	.short _021F7F56 - _021F7EDA - 2 ; case 2
	.short _021F7F7E - _021F7EDA - 2 ; case 3
	.short _021F7F94 - _021F7EDA - 2 ; case 4
	.short _021F7FE0 - _021F7EDA - 2 ; case 5
	.short _021F7FF2 - _021F7EDA - 2 ; case 6
	.short _021F800A - _021F7EDA - 2 ; case 7
	.short _021F8048 - _021F7EDA - 2 ; case 8
_021F7EEC:
	add r0, r6, #0
	bl ov96_021F83DC
	str r0, [sp, #0xc]
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7EFC:
	ldr r0, [sp, #0x14]
	add r1, r6, #0
	add r0, #0x1c
	bl ov96_021F81CC
	cmp r0, #0
	bne _021F7F0C
_021F7F0A:
	b _021F805C
_021F7F0C:
	mov r4, #0
	add r5, sp, #0x1c
_021F7F10:
	add r0, r6, #0
	bl ov96_021E6040
	lsl r1, r4, #0x18
	lsr r1, r1, #0x18
	bl ov96_021E94EC
	add r4, r4, #1
	stmia r5!, {r0}
	cmp r4, #4
	blt _021F7F10
	ldr r2, [sp, #0x1c]
	ldr r0, [sp, #0x20]
	ldrb r1, [r2, #9]
	ldrb r0, [r0, #9]
	cmp r1, r0
	bne _021F7F38
	mov r0, #0xfe
	str r0, [sp, #0xc]
	b _021F7F4E
_021F7F38:
	ldr r1, [r2]
	add r0, r6, #0
	bl ov96_021E5F34
	add r2, r0, #0
	ldr r0, [sp, #0x10]
	mov r1, #0
	bl BufferPlayersName
	mov r0, #0xfd
	str r0, [sp, #0xc]
_021F7F4E:
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7F56:
	mov r0, #1
	str r0, [sp]
	mov r0, #0x10
	add r1, r0, #0
	sub r1, #0x18
	mov r2, #0
	mov r3, #0x3f
	bl sub_0200B484
	mov r0, #0x3f
	add r1, r0, #0
	bl sub_0200B600
	ldr r0, _021F8088 ; =0x04000052
	mov r1, #0x10
	strh r1, [r0]
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7F7E:
	mov r0, #1
	bl sub_0200B5C0
	cmp r0, #0
	beq _021F805C
	mov r0, #0xff
	str r0, [sp, #0xc]
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7F94:
	mov r5, #0
_021F7F96:
	add r0, r6, #0
	bl ov96_021E5E44
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E6040
	add r1, r4, #0
	add r2, r5, #0
	bl ov96_021E95D8
	add r1, r0, #0
	ldr r0, _021F808C ; =0x000003E7
	cmp r1, r0
	ble _021F7FB6
	add r1, r0, #0
_021F7FB6:
	ldr r0, [sp, #0x14]
	lsl r2, r5, #0x18
	ldr r0, [r0, #0x14]
	lsr r2, r2, #0x18
	bl ov96_021F910C
	add r5, r5, #1
	cmp r5, #4
	blt _021F7F96
	mov r0, #2
	str r0, [sp]
	mov r0, #0x10
	mov r1, #0
	add r2, r0, #0
	mov r3, #0x3f
	bl sub_0200B484
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7FE0:
	mov r0, #2
	bl sub_0200B5C0
	cmp r0, #0
	beq _021F805C
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F7FF2:
	add r0, r6, #0
	bl ov96_021F83FC
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x14]
	mov r1, #1
	add r0, #0xa8
	str r1, [r0]
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F800A:
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #0
	beq _021F801E
	add r0, r6, #0
	bl ov96_021F7E64
	cmp r0, #0
	beq _021F805C
_021F801E:
	mov r0, #0xc
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [sp, #0x14]
	ldr r3, _021F8090 ; =0x00007FFF
	ldr r0, [r0]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	bl sub_0200FA24
	mov r0, #0
	mov r1, #0xc
	bl sub_02005F50
	ldrb r0, [r7]
	add r0, r0, #1
	strb r0, [r7]
	b _021F805C
_021F8048:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F805C
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x18]
	bl ov96_021EE944
	mov r0, #1
	str r0, [sp, #0x18]
_021F805C:
	mov r1, #0
	ldr r0, [sp, #0xc]
	mvn r1, r1
	cmp r0, r1
	beq _021F8080
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0xc]
	ldr r0, [r0, #0x18]
	bl ov96_021EE8CC
	ldr r0, [sp, #0x14]
	add r0, #0xa4
	ldr r0, [r0]
	add r1, r0, #1
	ldr r0, [sp, #0x14]
	add r0, #0xa4
	str r0, [sp, #0x14]
	str r1, [r0]
_021F8080:
	ldr r0, [sp, #0x18]
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	nop
_021F8088: .word 0x04000052
_021F808C: .word 0x000003E7
_021F8090: .word 0x00007FFF
	thumb_func_end ov96_021F7E74

	thumb_func_start ov96_021F8094
ov96_021F8094: ; 0x021F8094
	push {r4, lr}
	add r4, r0, #0
	add r0, r1, #0
	add r1, r2, #0
	add r2, r3, #0
	bl ov96_021F86E8
	str r0, [r4]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8094

	thumb_func_start ov96_021F80A8
ov96_021F80A8: ; 0x021F80A8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r0, #0
	str r2, [sp, #4]
	str r1, [sp]
	add r1, r7, #0
	ldr r0, [sp, #4]
	add r1, #0x59
	strb r0, [r1]
	ldr r0, [r7]
	add r1, r3, #0
	bl ov96_021F87E0
	mov r5, #0
	str r5, [sp, #0xc]
	add r6, r5, #0
_021F80C8:
	mov r2, #1
	mov r3, #0x9c
	add r4, r5, #0
	ldr r1, [sp]
	add r0, r7, #0
	lsl r2, r2, #8
	sub r3, r3, r6
	add r4, #0xa
	bl ov96_021F8378
	str r0, [sp, #8]
	bl ov96_021F8978
	cmp r0, #0
	bne _021F80E8
	add r4, #0xa
_021F80E8:
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r4, #0
	bl ov96_021F82E4
	ldr r0, [sp, #0xc]
	add r5, #0xa
	add r0, r0, #1
	add r6, #0x28
	str r0, [sp, #0xc]
	cmp r0, #4
	blt _021F80C8
	ldr r0, [sp, #4]
	cmp r0, #4
	bls _021F811E
	mov r2, #1
	ldr r1, [sp]
	add r0, r7, #0
	lsl r2, r2, #8
	mov r3, #0x28
	bl ov96_021F8378
	add r1, r0, #0
	add r0, r7, #0
	mov r2, #0
	bl ov96_021F8334
_021F811E:
	mov r0, #1
	add r7, #0x58
	strb r0, [r7]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F80A8

	thumb_func_start ov96_021F8128
ov96_021F8128: ; 0x021F8128
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4]
	cmp r0, #0
	beq _021F815A
	ldr r0, [r4, #8]
	cmp r0, #0
	bne _021F8156
	ldr r0, [r4, #4]
	bl ov96_021F895C
	ldr r0, [r4, #0xc]
	cmp r0, #0
	bne _021F815A
	ldr r0, [r4, #4]
	bl ov96_021F8978
	ldr r0, _021F815C ; =0x000008D7
	bl PlaySE
	mov r0, #1
	str r0, [r4, #0xc]
	pop {r4, pc}
_021F8156:
	sub r0, r0, #1
	str r0, [r4, #8]
_021F815A:
	pop {r4, pc}
	.balign 4, 0
_021F815C: .word 0x000008D7
	thumb_func_end ov96_021F8128

	thumb_func_start ov96_021F8160
ov96_021F8160: ; 0x021F8160
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	add r7, r2, #0
	mov r4, #0
	add r5, r0, #4
_021F816A:
	add r0, r5, #0
	add r1, r6, #0
	add r2, r7, #0
	bl ov96_021F8128
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #4
	blt _021F816A
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8160

	thumb_func_start ov96_021F8180
ov96_021F8180: ; 0x021F8180
	push {r4, r5, r6, lr}
	sub sp, #8
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	add r1, sp, #4
	add r2, sp, #0
	mov r6, #0
	bl ov96_021F893C
	cmp r4, #0
	bne _021F81AC
	ldr r0, [sp, #4]
	cmp r0, #0
	bgt _021F81B8
	ldr r0, [r5, #4]
	ldr r2, [sp]
	add r1, r6, #0
	bl ov96_021F8948
	mov r6, #1
	b _021F81B8
_021F81AC:
	cmp r4, #1
	bne _021F81B8
	ldr r0, [sp]
	cmp r0, #0xc0
	blt _021F81B8
	mov r6, #1
_021F81B8:
	add r0, r6, #0
	add sp, #8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8180

	thumb_func_start ov96_021F81C0
ov96_021F81C0: ; 0x021F81C0
	add r2, r0, #0
	mov r3, #3
	add r2, #0x58
	strb r3, [r2]
	str r1, [r0, #0x54]
	bx lr
	thumb_func_end ov96_021F81C0

	thumb_func_start ov96_021F81CC
ov96_021F81CC: ; 0x021F81CC
	push {r3, r4, r5, r6, r7, lr}
	add r4, r0, #0
	add r6, r1, #0
	add r1, r4, #0
	add r1, #0x58
	ldrb r1, [r1]
	add r5, r4, #0
	add r5, #0x58
	cmp r1, #3
	bhi _021F82DA
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021F81EC: ; jump table
	.short _021F81F4 - _021F81EC - 2 ; case 0
	.short _021F824C - _021F81EC - 2 ; case 1
	.short _021F8296 - _021F81EC - 2 ; case 2
	.short _021F82BE - _021F81EC - 2 ; case 3
_021F81F4:
	mov r1, #0x4f
	add r0, #0x44
	mvn r1, r1
	mov r2, #0
	bl ov96_021F8128
	add r0, r4, #0
	add r0, #0x44
	mov r1, #0
	bl ov96_021F8180
	cmp r0, #0
	beq _021F82DA
	ldr r1, [r4, #0x48]
	add r0, r4, #0
	mov r2, #0
	bl ov96_021F82E4
	add r0, r4, #0
	add r0, #0x44
	bl ov96_021F8354
	add r0, r4, #0
	bl ov96_021F8360
	cmp r0, #0
	beq _021F8242
	mov r2, #1
	add r0, r4, #0
	add r1, r6, #0
	lsl r2, r2, #8
	mov r3, #0x28
	bl ov96_021F8378
	add r1, r0, #0
	add r0, r4, #0
	mov r2, #0
	bl ov96_021F8334
_021F8242:
	add r0, r4, #0
	mov r1, #0xa
	bl ov96_021F81C0
	b _021F82DA
_021F824C:
	mov r1, #0x4f
	mvn r1, r1
	mov r2, #0
	bl ov96_021F8160
	mov r6, #0
	add r5, r4, #4
	mov r7, #1
_021F825C:
	add r0, r5, #0
	mov r1, #0
	bl ov96_021F8180
	cmp r0, #0
	beq _021F8288
	ldr r0, [r4, #0x60]
	cmp r0, #0
	bne _021F8280
	ldr r0, [r5, #4]
	bl ov96_021F8978
	cmp r0, #0
	bne _021F8280
	ldr r0, _021F82E0 ; =0x000004B9
	bl sub_02006B24
	str r7, [r4, #0x60]
_021F8280:
	add r6, r6, #1
	add r5, #0x10
	cmp r6, #4
	blt _021F825C
_021F8288:
	cmp r6, #4
	bne _021F82DA
	add r0, r4, #0
	mov r1, #0xa
	bl ov96_021F81C0
	b _021F82DA
_021F8296:
	mov r1, #0
	mov r2, #8
	bl ov96_021F8160
	add r0, r4, #0
	bl ov96_021F83D0
	mov r1, #1
	add r6, r0, #0
	bl ov96_021F8180
	cmp r0, #0
	beq _021F82DA
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021F83BC
	mov r0, #0
	strb r0, [r5]
	b _021F82DA
_021F82BE:
	ldr r2, [r4, #0x54]
	sub r1, r2, #1
	str r1, [r4, #0x54]
	cmp r2, #0
	bgt _021F82DA
	bl ov96_021F8360
	cmp r0, #0
	beq _021F82D6
	mov r0, #2
	strb r0, [r5]
	b _021F82DA
_021F82D6:
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F82DA:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F82E0: .word 0x000004B9
	thumb_func_end ov96_021F81CC

	thumb_func_start ov96_021F82E4
ov96_021F82E4: ; 0x021F82E4
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r1, r5, #0
	add r1, #0x5b
	ldrb r1, [r1]
	add r0, r5, #4
	add r7, r2, #0
	lsl r1, r1, #4
	add r4, r0, r1
	ldr r0, [r0, r1]
	cmp r0, #0
	beq _021F8302
	bl GF_AssertFail
_021F8302:
	mov r0, #1
	str r0, [r4]
	str r6, [r4, #4]
	add r0, r5, #0
	str r7, [r4, #8]
	add r0, #0x5b
	ldrb r0, [r0]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r5, #0
	add r1, r2, r1
	add r0, #0x5b
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0x5a
	ldrb r0, [r0]
	add r5, #0x5a
	add r0, r0, #1
	strb r0, [r5]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F82E4

	thumb_func_start ov96_021F8334
ov96_021F8334: ; 0x021F8334
	push {r4, r5, r6, lr}
	add r4, r0, #0
	ldr r0, [r0, #0x44]
	add r5, r1, #0
	add r6, r2, #0
	add r4, #0x44
	cmp r0, #0
	beq _021F8348
	bl GF_AssertFail
_021F8348:
	mov r0, #1
	str r0, [r4]
	str r5, [r4, #4]
	str r6, [r4, #8]
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8334

	thumb_func_start ov96_021F8354
ov96_021F8354: ; 0x021F8354
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F8354

	thumb_func_start ov96_021F8360
ov96_021F8360: ; 0x021F8360
	add r1, r0, #0
	add r1, #0x59
	add r0, #0x5a
	ldrb r1, [r1]
	ldrb r0, [r0]
	mov r2, #0
	cmp r1, r0
	bls _021F8372
	mov r2, #1
_021F8372:
	add r0, r2, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F8360

	thumb_func_start ov96_021F8378
ov96_021F8378: ; 0x021F8378
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r0, r1, #0
	add r4, r2, #0
	add r6, r3, #0
	bl ov96_021E6040
	add r7, r0, #0
	bl ov96_021E9524
	add r2, r5, #0
	add r2, #0x5c
	sub r1, r0, #1
	ldrb r2, [r2]
	add r0, r7, #0
	sub r1, r1, r2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021E94EC
	add r3, r0, #0
	add r0, r5, #0
	add r0, #0x5c
	ldrb r0, [r0]
	add r2, r6, #0
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0x5c
	strb r1, [r0]
	ldr r0, [r5]
	add r1, r4, #0
	bl ov96_021F8830
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8378

	thumb_func_start ov96_021F83BC
ov96_021F83BC: ; 0x021F83BC
	push {r4, lr}
	add r4, r1, #0
	ldr r0, [r4, #4]
	bl ov96_021F8918
	add r0, r4, #0
	bl ov96_021F8354
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F83BC

	thumb_func_start ov96_021F83D0
ov96_021F83D0: ; 0x021F83D0
	add r1, r0, #4
	add r0, #0x5b
	ldrb r0, [r0]
	lsl r0, r0, #4
	add r0, r1, r0
	bx lr
	thumb_func_end ov96_021F83D0

	thumb_func_start ov96_021F83DC
ov96_021F83DC: ; 0x021F83DC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5EE0
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5EE8
	cmp r0, #0
	bne _021F83F4
	add r4, #0xf6
	b _021F83F6
_021F83F4:
	add r4, #0xf9
_021F83F6:
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F83DC

	thumb_func_start ov96_021F83FC
ov96_021F83FC: ; 0x021F83FC
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bl ov96_021E5EE0
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	ldrb r0, [r5]
	cmp r0, #5
	blo _021F841E
	bl GF_AssertFail
_021F841E:
	add r0, r6, #0
	bl ov96_021E5EE8
	cmp r0, #0
	ldrb r2, [r5]
	bne _021F8438
	lsl r0, r4, #2
	add r1, r4, r0
	mov r0, #1
	lsl r0, r0, #8
	add r0, r1, r0
	add r0, r2, r0
	pop {r4, r5, r6, pc}
_021F8438:
	lsl r0, r4, #2
	add r1, r4, r0
	ldr r0, _021F8444 ; =0x0000010F
	add r0, r1, r0
	add r0, r2, r0
	pop {r4, r5, r6, pc}
	.balign 4, 0
_021F8444: .word 0x0000010F
	thumb_func_end ov96_021F83FC

	thumb_func_start ov96_021F8448
ov96_021F8448: ; 0x021F8448
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _021F84D8 ; =0x0221C2D8
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021F84DC ; =0x0221C2F0
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _021F84E0 ; =0x0221C2C4
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x1a
	str r0, [sp]
	ldr r0, [r4]
	bl sub_0200CF18
	add r1, r4, #0
	add r1, #0x94
	str r0, [r1]
	add r0, r4, #0
	add r0, #0x94
	ldr r0, [r0]
	bl sub_0200CF38
	add r1, r4, #0
	add r1, #0x98
	str r0, [r1]
	add r0, r4, #0
	add r0, #0x94
	ldr r0, [r0]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	add r0, r4, #0
	add r1, r4, #0
	add r0, #0x94
	add r1, #0x98
	ldr r0, [r0]
	ldr r1, [r1]
	mov r2, #2
	bl sub_0200CFF4
	add r0, r4, #0
	add r0, #0x94
	add r4, #0x98
	ldr r0, [r0]
	ldr r1, [r4]
	add r2, sp, #0x34
	bl sub_0200D3F8
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_021F84D8: .word 0x0221C2D8
_021F84DC: .word 0x0221C2F0
_021F84E0: .word 0x0221C2C4
	thumb_func_end ov96_021F8448

	thumb_func_start ov96_021F84E4
ov96_021F84E4: ; 0x021F84E4
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r5, r0, #0
	add r7, r4, #0
_021F84EC:
	lsl r6, r4, #2
	add r0, r5, r6
	add r0, #0x9c
	ldr r0, [r0]
	cmp r0, #0
	beq _021F8502
	bl sub_0200D9DC
	add r0, r5, r6
	add r0, #0x9c
	str r7, [r0]
_021F8502:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _021F84EC
	add r0, r5, #0
	add r1, r5, #0
	add r0, #0x94
	add r1, #0x98
	ldr r0, [r0]
	ldr r1, [r1]
	bl sub_0200D998
	add r5, #0x94
	ldr r0, [r5]
	bl sub_0200D108
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F84E4

	thumb_func_start ov96_021F8528
ov96_021F8528: ; 0x021F8528
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r1, r0, #0
	add r1, #0x94
	add r0, #0x98
	ldr r5, [r0]
	ldr r4, [r1]
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r0, #0xfa
	lsl r0, r0, #2
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #9
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0xfa
	lsl r0, r0, #2
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #8
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	mov r0, #0xfa
	lsl r0, r0, #2
	str r0, [sp, #4]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #0xa
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	mov r0, #0xfa
	lsl r0, r0, #2
	str r0, [sp, #4]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x9a
	mov r3, #0xb
	bl sub_0200D704
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8528

	thumb_func_start ov96_021F85A0
ov96_021F85A0: ; 0x021F85A0
	push {r3, r4, lr}
	sub sp, #0x34
	add r4, r0, #0
	add r2, sp, #0
	mov r0, #0
	add r3, r2, #0
	add r1, r0, #0
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	str r0, [r3]
	mov r0, #0xfa
	lsl r0, r0, #2
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	str r0, [sp, #0x1c]
	str r0, [sp, #0x20]
	mov r0, #2
	str r0, [sp, #0x10]
	mov r0, #1
	str r0, [sp, #0x2c]
	mov r1, #0xe0
	add r0, sp, #0
	strh r1, [r0]
	mov r1, #0x70
	strh r1, [r0, #2]
	add r0, r4, #0
	add r1, r4, #0
	add r0, #0x94
	add r1, #0x98
	ldr r0, [r0]
	ldr r1, [r1]
	bl sub_0200D734
	add r4, #0x9c
	str r0, [r4]
	add sp, #0x34
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F85A0

	thumb_func_start ov96_021F85F4
ov96_021F85F4: ; 0x021F85F4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r7, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x14]
	add r0, r7, #0
	bl ov96_021E5F54
	str r0, [sp, #0x10]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #8]
	add r0, r7, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0x14]
	add r0, #0xa4
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	mov r0, #0
	str r0, [sp, #4]
	cmp r1, #0
	bne _021F86AC
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #0xc]
	strb r6, [r0, #1]
	ldr r0, [sp, #0x10]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	mov r2, #0x24
_021F8650:
	ldrb r1, [r0]
	add r0, r0, #1
	strb r1, [r4]
	add r4, r4, #1
	sub r2, r2, #1
	bne _021F8650
	add r0, r7, #0
	mov r4, #0
	bl ov96_021E5D34
	cmp r0, #0
	ble _021F869A
	ldr r5, [sp, #0x10]
	add r5, #0x50
_021F866C:
	add r0, r5, #0
	bl ov96_021E8A20
	ldrb r1, [r0]
	cmp r1, r6
	blo _021F867E
	ldrb r1, [r0, #1]
	cmp r1, #1
	bne _021F8682
_021F867E:
	mov r1, #1
	str r1, [sp, #4]
_021F8682:
	ldrb r0, [r0, #2]
	cmp r0, #0
	bne _021F868C
	mov r0, #0
	str r0, [sp]
_021F868C:
	add r0, r7, #0
	add r5, #0x28
	add r4, r4, #1
	bl ov96_021E5D34
	cmp r4, r0
	blt _021F866C
_021F869A:
	ldr r0, [sp]
	cmp r0, #0
	beq _021F86A6
	ldr r0, [sp, #0xc]
	mov r1, #1
	strb r1, [r0, #2]
_021F86A6:
	ldr r1, [sp, #4]
	ldr r0, [sp, #0xc]
	strb r1, [r0, #3]
_021F86AC:
	ldr r0, [sp, #0x10]
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x14]
	strb r6, [r4]
	ldr r0, [r0, #0x18]
	bl ov96_021EEA80
	strb r0, [r4, #1]
	ldr r0, [sp, #0x14]
	add r0, #0xa8
	str r0, [sp, #0x14]
	ldr r0, [r0]
	strb r0, [r4, #2]
	ldr r0, [sp, #8]
	ldrb r0, [r0, #3]
	cmp r0, #0
	beq _021F86E0
	ldr r0, [sp, #8]
	ldrb r0, [r0, #1]
	cmp r6, r0
	blo _021F86E0
	add sp, #0x18
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F86E0:
	mov r0, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F85F4

	thumb_func_start ov96_021F86E8
ov96_021F86E8: ; 0x021F86E8
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	mov r1, #0xcd
	lsl r1, r1, #2
	add r7, r0, #0
	add r6, r2, #0
	bl AllocFromHeap
	mov r2, #0xcd
	mov r1, #0
	lsl r2, r2, #2
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0xa
	add r1, r7, #0
	str r7, [r4]
	bl sub_02013534
	str r0, [r4, #0x10]
	str r5, [r4, #8]
	str r6, [r4, #4]
	mov r0, #0
	add r1, r4, #0
_021F8718:
	str r0, [r1, #0x48]
	add r0, r0, #1
	add r1, #0x48
	cmp r0, #5
	blt _021F8718
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F86E8

	thumb_func_start ov96_021F8728
ov96_021F8728: ; 0x021F8728
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r4, r0, #0
	str r0, [sp]
	mov r7, #0
	add r6, #0x24
	add r4, #0x34
	add r5, r0, #0
_021F8738:
	add r0, r6, #0
	bl ov96_021F8E94
	add r0, r4, #0
	bl ov96_021F8E94
	ldr r0, [r5, #0x14]
	bl sub_02024758
	ldr r0, [r5, #0x18]
	bl sub_02024758
	ldr r0, [r5, #0x1c]
	bl sub_02024758
	ldr r0, [r5, #0x20]
	bl sub_02024758
	add r7, r7, #1
	add r6, #0x48
	add r4, #0x48
	add r5, #0x48
	cmp r7, #5
	blt _021F8738
	mov r1, #0xbf
	ldr r0, [sp]
	lsl r1, r1, #2
	mov r4, #0
	add r5, r0, r1
_021F8772:
	ldr r0, [r5, #0x10]
	bl sub_02013938
	add r0, r5, #0
	bl RemoveWindow
	add r4, r4, #1
	add r5, #0x18
	cmp r4, #2
	blt _021F8772
	ldr r0, [sp]
	ldr r0, [r0, #0x10]
	bl sub_020135AC
	mov r1, #0xb
	ldr r0, [sp]
	lsl r1, r1, #6
	ldr r0, [r0, r1]
	bl sub_0200AEB0
	mov r1, #0xb1
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl sub_0200B0A8
	mov r6, #0xaa
	ldr r4, [sp]
	mov r5, #0
	lsl r6, r6, #2
_021F87AE:
	ldr r0, [r4, r6]
	bl sub_0200A0D0
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #6
	blt _021F87AE
	mov r1, #0x5f
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl sub_02024504
	ldr r0, [sp]
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8728

	thumb_func_start ov96_021F87D0
ov96_021F87D0: ; 0x021F87D0
	mov r1, #0x5f
	lsl r1, r1, #2
	ldr r3, _021F87DC ; =sub_0202457C
	ldr r0, [r0, r1]
	bx r3
	nop
_021F87DC: .word sub_0202457C
	thumb_func_end ov96_021F87D0

	thumb_func_start ov96_021F87E0
ov96_021F87E0: ; 0x021F87E0
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bl ov96_021F8980
	add r0, r6, #0
	bl ov96_021F8A50
	add r5, r6, #0
	mov r4, #0
	add r5, #0x14
_021F87F4:
	lsl r1, r4, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	add r2, r5, #0
	bl ov96_021F8AFC
	add r4, r4, #1
	add r5, #0x48
	cmp r4, #5
	blt _021F87F4
	add r0, r6, #0
	bl ov96_021F8DD4
	mov r0, #6
	lsl r0, r0, #6
	mov r2, #0x4b
	add r0, r6, r0
	mov r1, #0
	lsl r2, r2, #0xe
	bl sub_02009FC8
	mov r0, #6
	lsl r0, r0, #6
	mov r1, #0
	add r0, r6, r0
	add r2, r1, #0
	bl sub_02009FA8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F87E0

	thumb_func_start ov96_021F8830
ov96_021F8830: ; 0x021F8830
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	mov r0, #0x33
	lsl r0, r0, #4
	str r1, [sp]
	ldr r1, [r5, r0]
	str r2, [sp, #4]
	add r2, r5, #0
	mov r0, #0x48
	add r2, #0x14
	mul r0, r1
	add r4, r2, r0
	ldr r0, [r4, #0x30]
	add r6, r3, #0
	cmp r0, #0
	beq _021F8856
	bl GF_AssertFail
_021F8856:
	ldr r0, [r5, #4]
	ldr r1, [r6]
	bl ov96_021E5D40
	str r0, [sp, #8]
	ldr r0, [r0]
	cmp r0, #0
	ble _021F886A
	mov r7, #1
	b _021F886C
_021F886A:
	mov r7, #0
_021F886C:
	ldr r0, [sp]
	add r2, r4, #0
	str r0, [r4, #0x38]
	ldr r0, [sp, #4]
	str r0, [r4, #0x3c]
	ldr r0, [r6]
	str r0, [r4, #0x40]
	add r0, r4, #0
	ldrb r1, [r6, #9]
	add r0, #0x44
	strh r1, [r0]
	ldr r1, [r6, #0x10]
	add r0, r5, #0
	bl ov96_021F8C04
	ldr r1, [r6]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021F8BC0
	add r0, r4, #0
	add r0, #0x44
	ldrh r0, [r0]
	cmp r0, #0
	bne _021F88A2
	mov r1, #1
	b _021F88A4
_021F88A2:
	mov r1, #0
_021F88A4:
	mov r0, #0xcb
	lsl r0, r0, #2
	str r1, [r5, r0]
	ldr r0, [r4, #0x40]
	cmp r0, #4
	blt _021F88B4
	bl GF_AssertFail
_021F88B4:
	cmp r7, #0
	beq _021F88D6
	ldr r0, [sp, #8]
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl ov96_021E8424
	bl ov96_021EEDCC
	add r1, r0, #0
	ldr r0, [r4, #0xc]
	ldr r3, [r5]
	mov r2, #0xb
	bl ov96_021EEA94
	b _021F88E6
_021F88D6:
	ldr r2, [r4, #0x40]
	ldr r0, [r4, #0xc]
	lsl r2, r2, #0x18
	ldr r1, [r5, #4]
	lsr r2, r2, #0x18
	mov r3, #0x1b
	bl ov96_021EEB84
_021F88E6:
	add r0, r4, #0
	bl ov96_021F8C2C
	mov r0, #0xcb
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #1
	add r2, r4, #0
	bl ov96_021F8C54
	mov r0, #1
	str r0, [r4, #0x30]
	mov r0, #0x33
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	mov r1, #5
	add r0, r0, #1
	bl _s32_div_f
	mov r0, #0x33
	lsl r0, r0, #4
	str r1, [r5, r0]
	add r0, r4, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8830

	thumb_func_start ov96_021F8918
ov96_021F8918: ; 0x021F8918
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x30]
	cmp r0, #0
	bne _021F8926
	bl GF_AssertFail
_021F8926:
	mov r0, #0
	str r0, [r4, #0x30]
	add r0, r4, #0
	add r0, #0x10
	bl ov96_021F8E94
	add r4, #0x20
	add r0, r4, #0
	bl ov96_021F8E94
	pop {r4, pc}
	thumb_func_end ov96_021F8918

	thumb_func_start ov96_021F893C
ov96_021F893C: ; 0x021F893C
	ldr r3, [r0, #0x38]
	str r3, [r1]
	ldr r0, [r0, #0x3c]
	str r0, [r2]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F893C

	thumb_func_start ov96_021F8948
ov96_021F8948: ; 0x021F8948
	add r3, r0, #0
	str r1, [r3, #0x38]
	add r0, r1, #0
	str r2, [r3, #0x3c]
	add r1, r2, #0
	add r2, r3, #0
	ldr r3, _021F8958 ; =ov96_021F8C88
	bx r3
	.balign 4, 0
_021F8958: .word ov96_021F8C88
	thumb_func_end ov96_021F8948

	thumb_func_start ov96_021F895C
ov96_021F895C: ; 0x021F895C
	add r3, r0, #0
	ldr r0, [r3, #0x38]
	add r0, r0, r1
	str r0, [r3, #0x38]
	ldr r0, [r3, #0x3c]
	add r0, r0, r2
	str r0, [r3, #0x3c]
	add r0, r1, #0
	add r1, r2, #0
	add r2, r3, #0
	ldr r3, _021F8974 ; =ov96_021F8CFC
	bx r3
	.balign 4, 0
_021F8974: .word ov96_021F8CFC
	thumb_func_end ov96_021F895C

	thumb_func_start ov96_021F8978
ov96_021F8978: ; 0x021F8978
	add r0, #0x44
	ldrh r0, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021F8978

	thumb_func_start ov96_021F8980
ov96_021F8980: ; 0x021F8980
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	mov r1, #6
	lsl r1, r1, #6
	ldr r2, [r5]
	mov r0, #0x37
	add r1, r5, r1
	bl sub_02009F40
	mov r1, #0x5f
	lsl r1, r1, #2
	mov r7, #0xaa
	str r0, [r5, r1]
	mov r6, #0
	add r4, r5, #0
	lsl r7, r7, #2
_021F89A2:
	ldr r2, [r5]
	mov r0, #1
	add r1, r6, #0
	bl sub_0200A090
	str r0, [r4, r7]
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #6
	blt _021F89A2
	mov r0, #0x67
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r5]
	mov r1, #0xa0
	str r0, [sp, #8]
	mov r0, #0xaa
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r2, #9
	mov r3, #0
	bl sub_0200A1D8
	mov r1, #0xb
	lsl r1, r1, #6
	str r0, [r5, r1]
	mov r0, #0x67
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r2, #6
	str r2, [sp, #8]
	ldr r0, [r5]
	sub r1, #0x14
	str r0, [sp, #0xc]
	ldr r0, [r5, r1]
	mov r1, #0xa0
	mov r3, #0
	bl sub_0200A234
	mov r1, #0xb1
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r0, #0x67
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5]
	sub r1, #0x14
	str r0, [sp, #8]
	ldr r0, [r5, r1]
	mov r1, #0xa0
	mov r2, #8
	mov r3, #0
	bl sub_0200A294
	mov r1, #0xb2
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r0, #0x67
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r5]
	sub r1, #0x14
	str r0, [sp, #8]
	ldr r0, [r5, r1]
	mov r1, #0xa0
	mov r2, #7
	mov r3, #0
	bl sub_0200A294
	mov r1, #0xb3
	lsl r1, r1, #2
	str r0, [r5, r1]
	sub r1, #0xc
	ldr r0, [r5, r1]
	bl sub_0200ADA4
	mov r0, #0xb1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_0200AF94
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8980

	thumb_func_start ov96_021F8A50
ov96_021F8A50: ; 0x021F8A50
	push {r3, r4, lr}
	sub sp, #0x2c
	mov r1, #0x67
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x68
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	mov r4, #0xaa
	str r2, [sp, #0x10]
	lsl r4, r4, #2
	ldr r3, [r0, r4]
	str r3, [sp, #0x14]
	add r3, r4, #4
	ldr r3, [r0, r3]
	str r3, [sp, #0x18]
	add r3, r4, #0
	add r3, #8
	ldr r3, [r0, r3]
	str r3, [sp, #0x1c]
	add r3, r4, #0
	add r3, #0xc
	ldr r3, [r0, r3]
	add r4, #0x30
	str r3, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r0, r0, r4
	add r2, r1, #0
	add r3, r1, #0
	bl sub_02009D48
	add sp, #0x2c
	pop {r3, r4, pc}
	thumb_func_end ov96_021F8A50

	thumb_func_start ov96_021F8A98
ov96_021F8A98: ; 0x021F8A98
	push {r3, r4}
	mov r2, #0x5f
	lsl r2, r2, #2
	ldr r2, [r1, r2]
	mov r4, #0
	str r2, [r0]
	mov r2, #0xb6
	lsl r2, r2, #2
	add r2, r1, r2
	str r2, [r0, #4]
	str r4, [r0, #8]
	str r4, [r0, #0xc]
	mov r2, #1
	str r4, [r0, #0x10]
	lsl r2, r2, #0xc
	str r2, [r0, #0x14]
	str r2, [r0, #0x18]
	str r2, [r0, #0x1c]
	strh r4, [r0, #0x20]
	mov r2, #2
	str r2, [r0, #0x24]
	str r3, [r0, #0x28]
	ldr r1, [r1]
	str r1, [r0, #0x2c]
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021F8A98

	thumb_func_start ov96_021F8ACC
ov96_021F8ACC: ; 0x021F8ACC
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r2, #0
	bl sub_02024624
	add r4, r0, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	add r1, r5, #0
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0
	bl sub_02024830
	add r0, r4, #0
	add r1, r6, #0
	bl sub_02024ADC
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8ACC

	thumb_func_start ov96_021F8AFC
ov96_021F8AFC: ; 0x021F8AFC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	add r4, r2, #0
	mov r2, #0xb6
	add r3, r0, #0
	lsl r2, r2, #2
	add r5, r1, #0
	add r0, sp, #0x14
	add r1, r3, #0
	add r2, r3, r2
	mov r3, #1
	bl ov96_021F8A98
	add r0, sp, #0x14
	mov r1, #0x11
	mov r2, #4
	bl ov96_021F8ACC
	str r0, [r4]
	add r0, sp, #0x14
	mov r1, #5
	mov r2, #0
	bl ov96_021F8ACC
	str r0, [r4, #4]
	add r0, sp, #0x14
	mov r1, #0x12
	mov r2, #1
	bl ov96_021F8ACC
	str r0, [r4, #8]
	add r0, sp, #0x14
	mov r1, #0
	mov r2, #2
	bl ov96_021F8ACC
	str r0, [r4, #0xc]
	add r4, r0, #0
	bl sub_02024B60
	add r6, r0, #0
	add r0, r4, #0
	bl sub_02024B1C
	add r7, r0, #0
	add r0, r4, #0
	bl sub_02024B34
	str r0, [sp]
	add r0, r7, #0
	add r1, r6, #0
	bl sub_020B802C
	str r0, [sp, #4]
	lsl r0, r5, #9
	str r0, [sp, #8]
	add r0, r7, #0
	bl sub_020B8008
	ldr r3, [sp, #4]
	ldr r2, [sp, #8]
	add r0, r7, #0
	add r1, r6, #0
	add r2, r3, r2
	bl sub_020B8024
	ldr r0, [sp]
	add r1, r6, #0
	bl sub_020B8078
	str r0, [sp, #0xc]
	add r0, r5, #6
	lsl r0, r0, #5
	str r0, [sp, #0x10]
	ldr r0, [sp]
	bl sub_020B804C
	ldr r3, [sp, #0xc]
	ldr r2, [sp, #0x10]
	ldr r0, [sp]
	add r1, r6, #0
	add r2, r3, r2
	bl sub_020B806C
	add r0, r4, #0
	add r1, r7, #0
	bl sub_02024B00
	ldr r1, [sp]
	add r0, r4, #0
	bl sub_02024B20
	add r0, r4, #0
	add r1, r5, #0
	bl sub_02024A74
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8AFC

	thumb_func_start ov96_021F8BC0
ov96_021F8BC0: ; 0x021F8BC0
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r2, #0
	bl ov96_021E5F34
	ldr r1, [r5]
	bl sub_02028F68
	add r6, r0, #0
	mov r0, #0x37
	mvn r0, r0
	str r0, [sp]
	add r0, #0x28
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0xbf
	lsl r1, r1, #2
	str r0, [sp, #8]
	add r4, #0x10
	add r0, r5, #0
	add r1, r5, r1
	add r2, r6, #0
	mov r3, #0
	str r4, [sp, #0xc]
	bl ov96_021F8DF4
	add r0, r6, #0
	bl String_dtor
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8BC0

	thumb_func_start ov96_021F8C04
ov96_021F8C04: ; 0x021F8C04
	push {r4, lr}
	sub sp, #0x10
	add r4, r1, #0
	mov r1, #0x37
	mvn r1, r1
	str r1, [sp]
	mov r3, #0
	str r3, [sp, #4]
	ldr r1, [r2]
	add r2, #0x20
	str r1, [sp, #8]
	mov r1, #0xc5
	lsl r1, r1, #2
	str r2, [sp, #0xc]
	add r1, r0, r1
	add r2, r4, #0
	bl ov96_021F8DF4
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_021F8C04

	thumb_func_start ov96_021F8C2C
ov96_021F8C2C: ; 0x021F8C2C
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x38]
	ldr r1, [r4, #0x3c]
	add r2, r4, #0
	bl ov96_021F8C88
	ldr r1, [r4, #0x40]
	ldr r0, [r4]
	add r1, r1, #2
	bl sub_02024A14
	ldr r0, [r4, #4]
	add r4, #0x44
	ldrh r1, [r4]
	add r1, r1, #5
	bl sub_020248F0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8C2C

	thumb_func_start ov96_021F8C54
ov96_021F8C54: ; 0x021F8C54
	push {r4, r5, r6, lr}
	add r4, r2, #0
	add r6, r0, #0
	ldr r0, [r4]
	add r5, r1, #0
	bl sub_02024830
	ldr r0, [r4, #4]
	add r1, r5, #0
	bl sub_02024830
	cmp r6, #0
	beq _021F8C76
	ldr r0, [r4, #8]
	add r1, r5, #0
	bl sub_02024830
_021F8C76:
	ldr r0, [r4, #0x10]
	add r1, r5, #0
	bl sub_020137C0
	ldr r0, [r4, #0x20]
	add r1, r5, #0
	bl sub_020137C0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021F8C54

	thumb_func_start ov96_021F8C88
ov96_021F8C88: ; 0x021F8C88
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	ldr r6, _021F8CF8 ; =0x0221C3E0
	add r5, r2, #0
	add r4, r0, #0
	add r3, r1, #0
	add r2, sp, #0
	ldmia r6!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r6]
	str r0, [r2]
	ldr r1, [sp, #4]
	lsl r0, r3, #0xc
	add r0, r1, r0
	str r0, [sp, #4]
	add r0, r4, #0
	add r0, #0x80
	lsl r0, r0, #0xc
	str r0, [sp]
	ldr r0, [r5]
	add r1, r7, #0
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0x10
	lsl r0, r0, #0xc
	str r0, [sp]
	ldr r0, [r5, #4]
	add r1, r7, #0
	bl sub_020247D4
	add r4, #0x30
	lsl r0, r4, #0xc
	str r0, [sp]
	ldr r0, [r5, #8]
	add r1, r7, #0
	bl sub_020247D4
	mov r0, #1
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	add r1, r7, #0
	bl sub_020247D4
	ldr r0, [r5, #0x10]
	bl sub_02013728
	ldr r0, [r5, #0x20]
	bl sub_02013728
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F8CF8: .word 0x0221C3E0
	thumb_func_end ov96_021F8C88

	thumb_func_start ov96_021F8CFC
ov96_021F8CFC: ; 0x021F8CFC
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r2, #0
	add r5, r0, #0
	ldr r0, [r4]
	add r7, r1, #0
	bl sub_020248AC
	add r3, r0, #0
	add r2, sp, #0
	lsl r6, r5, #0xc
	ldmia r3!, {r0, r1}
	mov ip, r2
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	lsl r5, r7, #0xc
	str r0, [r2]
	ldr r0, [sp]
	mov r1, ip
	add r0, r0, r6
	str r0, [sp]
	ldr r0, [sp, #4]
	add r0, r0, r5
	str r0, [sp, #4]
	ldr r0, [r4]
	bl sub_020247D4
	ldr r0, [r4, #4]
	bl sub_020248AC
	add r3, r0, #0
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r7, #0
	str r0, [r2]
	ldr r0, [sp]
	add r0, r0, r6
	str r0, [sp]
	ldr r0, [sp, #4]
	add r0, r0, r5
	str r0, [sp, #4]
	ldr r0, [r4, #4]
	bl sub_020247D4
	ldr r0, [r4, #0xc]
	bl sub_020248AC
	add r3, r0, #0
	ldmia r3!, {r0, r1}
	add r2, r7, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r7, #0
	str r0, [r2]
	ldr r0, [sp]
	add r0, r0, r6
	str r0, [sp]
	ldr r0, [sp, #4]
	add r0, r0, r5
	str r0, [sp, #4]
	ldr r0, [r4, #0xc]
	bl sub_020247D4
	ldr r0, [r4, #8]
	add r1, r7, #0
	bl sub_020247D4
	ldr r0, [r4, #0x10]
	bl sub_02013728
	ldr r0, [r4, #0x20]
	bl sub_02013728
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8CFC

	thumb_func_start ov96_021F8D98
ov96_021F8D98: ; 0x021F8D98
	push {r4, r5, r6, lr}
	sub sp, #8
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	add r6, r2, #0
	bl sub_0201D3C4
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	lsl r2, r6, #0x18
	ldr r0, [r5, #8]
	add r1, r4, #0
	lsr r2, r2, #0x18
	mov r3, #2
	bl sub_0201D494
	ldr r1, [r5]
	add r0, r4, #0
	bl sub_02013910
	mov r1, #1
	str r0, [r4, #0x10]
	bl sub_02013948
	str r0, [r4, #0x14]
	add sp, #8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8D98

	thumb_func_start ov96_021F8DD4
ov96_021F8DD4: ; 0x021F8DD4
	push {r4, lr}
	mov r1, #0xbf
	add r4, r0, #0
	lsl r1, r1, #2
	add r1, r4, r1
	mov r2, #8
	bl ov96_021F8D98
	mov r1, #0xc5
	lsl r1, r1, #2
	add r0, r4, #0
	add r1, r4, r1
	mov r2, #0x18
	bl ov96_021F8D98
	pop {r4, pc}
	thumb_func_end ov96_021F8DD4

	thumb_func_start ov96_021F8DF4
ov96_021F8DF4: ; 0x021F8DF4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x58
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0
	add r7, r2, #0
	str r3, [sp, #0x18]
	ldr r6, [sp, #0x7c]
	bl sub_0201D9B0
	mov r1, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F8E90 ; =0x00010200
	ldr r3, [sp, #0x18]
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	str r1, [sp, #0x10]
	str r1, [sp, #0x14]
	add r0, r4, #0
	add r2, r7, #0
	bl AddTextPrinterParameterized3
	mov r1, #1
	ldr r0, [r4, #0x14]
	add r2, r1, #0
	add r3, sp, #0x1c
	bl sub_02021AC8
	ldr r0, [r5, #0x10]
	mov r1, #0
	str r0, [sp, #0x28]
	mov r0, #0x5f
	str r4, [sp, #0x2c]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	str r0, [sp, #0x30]
	mov r0, #0xb1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_0200B0F8
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x78]
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x20]
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0x70]
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x74]
	str r0, [sp, #0x44]
	mov r0, #0
	str r0, [sp, #0x48]
	mov r0, #3
	str r0, [sp, #0x4c]
	mov r0, #1
	str r0, [sp, #0x50]
	ldr r0, [r5]
	str r0, [sp, #0x54]
	add r0, sp, #0x28
	bl sub_020135D8
	add r4, r0, #0
	mov r1, #0
	bl sub_02013850
	str r4, [r6]
	add r3, sp, #0x1c
	ldmia r3!, {r0, r1}
	add r2, r6, #4
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	add sp, #0x58
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F8E90: .word 0x00010200
	thumb_func_end ov96_021F8DF4

	thumb_func_start ov96_021F8E94
ov96_021F8E94: ; 0x021F8E94
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4]
	cmp r0, #0
	beq _021F8EAC
	bl sub_020139C8
	add r0, r4, #4
	bl sub_02021B5C
	mov r0, #0
	str r0, [r4]
_021F8EAC:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8E94

	thumb_func_start ov96_021F8EB0
ov96_021F8EB0: ; 0x021F8EB0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r1, #0
	mov r1, #0xc4
	add r6, r0, #0
	add r5, r2, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0xc4
	bl MIi_CpuFill8
	str r6, [r4]
	mov r0, #4
	add r1, r6, #0
	bl sub_02013534
	str r0, [r4, #8]
	str r5, [r4, #4]
	add r5, r4, #0
	add r5, #0xc
	add r0, r5, #0
	bl sub_0201D3C4
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	add r0, r7, #0
	add r1, r5, #0
	mov r2, #8
	mov r3, #2
	bl sub_0201D494
	ldr r1, [r4]
	add r0, r5, #0
	bl sub_02013910
	mov r1, #2
	str r0, [r5, #0x10]
	bl sub_02013948
	str r0, [r5, #0x14]
	add r0, r4, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F8EB0

	thumb_func_start ov96_021F8F0C
ov96_021F8F0C: ; 0x021F8F0C
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r5, r6, #0
	mov r4, #0
	add r5, #0x34
_021F8F16:
	add r0, r5, #0
	bl ov96_021F91CC
	add r4, r4, #1
	add r5, #0x28
	cmp r4, #4
	blt _021F8F16
	add r4, r6, #0
	add r4, #0xc
	ldr r0, [r4, #0x10]
	bl sub_02013938
	add r0, r4, #0
	bl RemoveWindow
	ldr r0, [r6, #8]
	bl sub_020135AC
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8F0C

	thumb_func_start ov96_021F8F44
ov96_021F8F44: ; 0x021F8F44
	push {r4, lr}
	sub sp, #8
	add r4, r0, #0
	ldr r0, [r4, #4]
	mov r2, #0x68
	bl ov96_021EB29C
	mov r0, #2
	str r0, [sp]
	ldr r0, [r4, #4]
	mov r1, #0xa1
	mov r2, #3
	mov r3, #0x68
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	ldr r0, [r4, #4]
	mov r1, #0xa1
	mov r2, #0
	mov r3, #0x68
	bl ov96_021EB2F4
	ldr r0, [r4, #4]
	mov r1, #0xa1
	mov r2, #2
	mov r3, #0x68
	bl ov96_021EB334
	ldr r0, [r4, #4]
	mov r1, #0xa1
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8F44

	thumb_func_start ov96_021F8F94
ov96_021F8F94: ; 0x021F8F94
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	add r6, r0, #0
	mov r0, #0
	str r0, [sp, #0x34]
	str r0, [sp, #0x28]
	mov r0, #8
	str r0, [sp, #0x24]
	add r0, r2, #0
	add r0, #0x10
	lsl r0, r0, #0xc
	str r0, [sp, #0x20]
	add r0, r2, #0
	add r0, #0x18
	lsl r0, r0, #0xc
	str r1, [sp, #0x10]
	str r2, [sp, #0x14]
	str r0, [sp, #0x1c]
_021F8FB8:
	mov r0, #3
	str r0, [sp]
	ldr r0, [r6, #4]
	mov r1, #0
	mov r2, #2
	mov r3, #0x68
	bl ov96_021EB408
	mov r1, #0
	str r1, [sp, #0x40]
	ldr r1, [sp, #0x28]
	add r4, r0, #0
	lsl r1, r1, #0xc
	str r1, [sp, #0x38]
	ldr r1, [sp, #0x20]
	str r1, [sp, #0x3c]
	add r1, sp, #0x38
	bl sub_020247D4
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #0
	bl sub_020248F0
	ldr r1, [sp, #0x34]
	add r0, r4, #0
	bl sub_02024A48
	add r0, r4, #0
	mov r1, #2
	bl sub_02024ADC
	ldr r5, [sp, #0x24]
	mov r7, #0
_021F9002:
	mov r0, #4
	str r0, [sp]
	ldr r0, [r6, #4]
	mov r1, #0
	mov r2, #2
	mov r3, #0x68
	bl ov96_021EB408
	mov r1, #0
	str r1, [sp, #0x40]
	lsl r1, r5, #0xc
	str r1, [sp, #0x38]
	ldr r1, [sp, #0x1c]
	add r4, r0, #0
	str r1, [sp, #0x3c]
	add r1, sp, #0x38
	bl sub_020247D4
	add r0, r4, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r4, #0
	mov r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #1
	bl sub_02024ADC
	add r7, r7, #1
	add r5, #0x10
	cmp r7, #3
	blt _021F9002
	ldr r0, [sp, #0x28]
	add r0, #0x40
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x24]
	add r0, #0x40
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x34]
	add r0, r0, #1
	str r0, [sp, #0x34]
	cmp r0, #4
	blt _021F8FB8
	mov r0, #0
	str r0, [sp, #0x18]
	add r0, r6, #0
	str r0, [sp, #0x30]
	add r0, #0x24
	str r0, [sp, #0x30]
	add r0, r6, #0
	str r0, [sp, #0x2c]
	add r0, #0x34
	add r7, r6, #0
	str r0, [sp, #0x2c]
_021F9072:
	ldr r0, [r6, #4]
	mov r1, #0x68
	mov r2, #3
	bl ov96_021EB4F4
	ldr r1, [sp, #0x30]
	str r0, [r1]
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r4, [sp, #0x30]
	mov r5, #0
_021F908C:
	ldr r0, [r6, #4]
	mov r1, #0x68
	mov r2, #4
	bl ov96_021EB4F4
	mov r1, #1
	add r2, r1, #0
	str r0, [r4, #4]
	bl ov96_021EB52C
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #3
	blt _021F908C
	ldr r0, [sp, #0x10]
	ldr r1, [sp, #0x18]
	bl ov96_021E5F34
	ldr r1, [r6]
	bl sub_02028F68
	add r4, r0, #0
	ldr r0, [r7, #0x24]
	bl ov96_021EB5B8
	mov r1, #0
	str r1, [sp]
	sub r1, #0x10
	str r1, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [sp, #0x2c]
	add r1, r6, #0
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, #0xc
	add r2, r4, #0
	mov r3, #2
	bl ov96_021F9134
	add r0, r4, #0
	bl String_dtor
	ldr r0, [r7, #0x34]
	mov r1, #1
	bl sub_020137C0
	ldr r0, [sp, #0x14]
	add r0, #0x10
	str r0, [r7, #0x48]
	ldr r0, [sp, #0x30]
	add r7, #0x28
	add r0, #0x28
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x2c]
	add r0, #0x28
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x18]
	add r0, r0, #1
	str r0, [sp, #0x18]
	cmp r0, #4
	blt _021F9072
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F8F94

	thumb_func_start ov96_021F910C
ov96_021F910C: ; 0x021F910C
	push {r4, r5, r6, lr}
	add r6, r2, #0
	add r5, r0, #0
	add r4, r1, #0
	cmp r6, #4
	blo _021F911C
	bl GF_AssertFail
_021F911C:
	mov r0, #0x28
	add r1, r6, #0
	mul r1, r0
	add r0, r5, r1
	add r5, #0x24
	str r4, [r0, #0x44]
	add r0, r5, r1
	add r1, r4, #0
	bl ov96_021F91E8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021F910C

	thumb_func_start ov96_021F9134
ov96_021F9134: ; 0x021F9134
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x58
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0
	add r7, r2, #0
	str r3, [sp, #0x18]
	ldr r6, [sp, #0x7c]
	bl sub_0201D9B0
	mov r1, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021F91C8 ; =0x00010200
	ldr r3, [sp, #0x18]
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	str r1, [sp, #0x10]
	str r1, [sp, #0x14]
	add r0, r4, #0
	add r2, r7, #0
	bl AddTextPrinterParameterized3
	ldr r0, [r4, #0x14]
	mov r1, #1
	mov r2, #2
	add r3, sp, #0x1c
	bl sub_02021AC8
	ldr r0, [r5, #8]
	str r4, [sp, #0x2c]
	str r0, [sp, #0x28]
	ldr r0, [r5, #4]
	bl ov96_021EB5E8
	str r0, [sp, #0x30]
	mov r0, #0x68
	bl sub_020227AC
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x78]
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x20]
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0x70]
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x74]
	str r0, [sp, #0x44]
	mov r0, #0
	str r0, [sp, #0x48]
	str r0, [sp, #0x4c]
	mov r0, #2
	str r0, [sp, #0x50]
	ldr r0, [r5]
	str r0, [sp, #0x54]
	add r0, sp, #0x28
	bl sub_020135D8
	add r4, r0, #0
	mov r1, #4
	bl sub_02013880
	str r4, [r6]
	add r3, sp, #0x1c
	ldmia r3!, {r0, r1}
	add r2, r6, #4
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	add sp, #0x58
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F91C8: .word 0x00010200
	thumb_func_end ov96_021F9134

	thumb_func_start ov96_021F91CC
ov96_021F91CC: ; 0x021F91CC
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4]
	cmp r0, #0
	beq _021F91E4
	bl sub_020139C8
	add r0, r4, #4
	bl sub_02021B5C
	mov r0, #0
	str r0, [r4]
_021F91E4:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021F91CC

	thumb_func_start ov96_021F91E8
ov96_021F91E8: ; 0x021F91E8
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0x64
	bl _s32_div_f
	add r7, r0, #0
	mov r0, #0x64
	mul r0, r7
	sub r6, r4, r0
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	add r4, r0, #0
	ldr r0, [r5, #4]
	bl ov96_021EB5B8
	add r1, r7, #1
	bl sub_020248F0
	ldr r0, [r5, #8]
	bl ov96_021EB5B8
	add r1, r4, #1
	bl sub_020248F0
	ldr r0, [r5, #0xc]
	bl ov96_021EB5B8
	mov r1, #0xa
	mul r1, r4
	sub r1, r6, r1
	add r1, r1, #1
	bl sub_020248F0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021F91E8

	thumb_func_start ov96_021F9234
ov96_021F9234: ; 0x021F9234
	push {r3, lr}
	mov r1, #1
	bl ov96_021E5FC8
	mov r0, #0
	pop {r3, pc}
	thumb_func_end ov96_021F9234

	thumb_func_start ov96_021F9240
ov96_021F9240: ; 0x021F9240
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r1, #0
	add r7, r0, #0
	bl ov96_021E5DC4
	ldrb r1, [r6]
	add r4, r0, #0
	cmp r1, #4
	bls _021F9256
	b _021F9370
_021F9256:
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021F9262: ; jump table
	.short _021F926C - _021F9262 - 2 ; case 0
	.short _021F9284 - _021F9262 - 2 ; case 1
	.short _021F92D2 - _021F9262 - 2 ; case 2
	.short _021F9306 - _021F9262 - 2 ; case 3
	.short _021F9340 - _021F9262 - 2 ; case 4
_021F926C:
	add r0, r7, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _021F9370
	ldr r0, _021F937C ; =0x000003C7
	mov r1, #1
	strb r1, [r4, r0]
	ldrb r0, [r6]
	add r0, r0, #1
	strb r0, [r6]
	b _021F9370
_021F9284:
	bl ov96_021FBDBC
	add r0, r7, #0
	add r1, r4, #0
	bl ov96_021FA6D0
	add r5, r0, #0
	add r0, r7, #0
	bl ov96_021FB630
	cmp r5, #0
	beq _021F9370
	mov r5, #0
	add r0, r5, #0
	mov r1, #0x6c
_021F92A2:
	add r2, r0, #0
	mul r2, r1
	add r2, r4, r2
	add r2, #0xe2
	ldrh r2, [r2]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r5, r5, r2
	cmp r0, #3
	blo _021F92A2
	lsl r1, r5, #0x10
	add r0, r7, #0
	lsr r1, r1, #0x10
	bl ov96_021E8318
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021FB808
	ldrb r0, [r6]
	add r0, r0, #1
	strb r0, [r6]
	b _021F9370
_021F92D2:
	add r0, r7, #0
	bl ov96_021E667C
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	add r0, r4, #0
	bl ov96_021FB60C
	cmp r0, #0
	beq _021F92F0
	cmp r5, #0
	beq _021F92F0
	ldrb r0, [r6]
	add r0, r0, #1
	strb r0, [r6]
_021F92F0:
	add r0, r4, #0
	bl ov96_021FBDBC
	add r0, r7, #0
	add r1, r4, #0
	bl ov96_021FA6D0
	add r0, r7, #0
	bl ov96_021FB630
	b _021F9370
_021F9306:
	bl ov96_021FBDBC
	add r0, r7, #0
	bl ov96_021FB630
	add r0, r7, #0
	bl ov96_021E5F54
	bl ov96_021E8A20
	mov r1, #1
	strb r1, [r0, #9]
	add r0, r7, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	ldr r0, [r0]
	cmp r0, #0
	beq _021F9370
	ldrb r0, [r6]
	mov r1, #0
	add r0, r0, #1
	strb r0, [r6]
	mov r0, #0x8d
	lsl r0, r0, #2
	str r1, [r4, r0]
	b _021F9370
_021F9340:
	mov r0, #0x8d
	lsl r0, r0, #2
	ldr r1, [r4, r0]
	add r1, r1, #1
	str r1, [r4, r0]
	ldr r0, [r4, r0]
	cmp r0, #0x5a
	bls _021F9370
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r7, #0
	mov r1, #2
	bl ov96_021E5FC8
_021F9370:
	add r0, r7, #0
	bl ov96_021FAF1C
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021F937C: .word 0x000003C7
	thumb_func_end ov96_021F9240

	thumb_func_start ov96_021F9380
ov96_021F9380: ; 0x021F9380
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r4, r1, #0
	str r0, [sp]
	bl ov96_021E5DC4
	add r7, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	bne _021F93A6
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F93A0
	mov r0, #1
	strb r0, [r4]
_021F93A0:
	add sp, #0x18
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021F93A6:
	ldr r0, [sp]
	bl ov96_021E5F24
	add r4, r0, #0
	mov r0, #0
	add r2, r0, #0
	add r3, r7, #0
_021F93B4:
	add r1, r3, #0
	add r1, #0xe2
	ldrh r1, [r1]
	add r2, r2, #1
	add r3, #0x6c
	add r0, r0, r1
	cmp r2, #3
	blt _021F93B4
	bl ov96_021FBDEC
	add r2, r0, #0
	lsl r1, r4, #0x18
	lsl r2, r2, #0x10
	ldr r0, [sp]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	cmp r4, #0
	bne _021F94A0
	ldr r0, [sp]
	bl ov96_021E5D34
	str r0, [sp, #8]
	str r0, [sp, #0x10]
	cmp r0, #4
	bge _021F94A0
_021F93EA:
	mov r0, #0
	str r0, [sp, #4]
	str r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	ldr r0, [sp, #8]
	sub r1, r1, r0
	lsl r0, r1, #1
	add r6, r1, r0
_021F93FA:
	mov r0, #0x28
	mul r0, r6
	add r5, r7, r0
	mov r0, #0x25
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _021F9466
	mov r0, #9
	lsl r0, r0, #6
	mov r1, #0x92
	ldr r4, [r5, r0]
	lsl r1, r1, #2
	ldr r1, [r5, r1]
	add r0, r4, #0
	bl _fls
	bhs _021F9424
	mov r0, #0x92
	lsl r0, r0, #2
	ldr r4, [r5, r0]
_021F9424:
	mov r0, #0x96
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	mov r0, #1
	lsl r0, r0, #0xc
	sub r0, r0, r1
	bl _itof
	add r1, r4, #0
	bl _fdiv
	str r0, [sp, #0x14]
	bl _ftoi
	add r4, r0, #0
	bl _itof
	add r1, r0, #0
	ldr r0, [sp, #0x14]
	bl _fsub
	mov r1, #0
	bl _fgr
	bls _021F9458
	add r4, r4, #1
_021F9458:
	mov r0, #0x23
	lsl r0, r0, #4
	ldr r0, [r7, r0]
	add r1, r0, r4
	mov r0, #0x95
	lsl r0, r0, #2
	str r1, [r5, r0]
_021F9466:
	mov r0, #0x95
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	ldr r0, [sp, #4]
	add r6, r6, #1
	add r0, r0, r1
	str r0, [sp, #4]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #3
	blt _021F93FA
	ldr r0, [sp, #4]
	bl ov96_021FBDEC
	add r2, r0, #0
	ldr r1, [sp, #0x10]
	lsl r2, r2, #0x10
	lsl r1, r1, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	blt _021F93EA
_021F94A0:
	mov r0, #1
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021F9380

	thumb_func_start ov96_021F94A8
ov96_021F94A8: ; 0x021F94A8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x180
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5DD4
	cmp r0, #8
	bls _021F94C0
	b _021F9C8A
_021F94C0:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021F94CC: ; jump table
	.short _021F94DE - _021F94CC - 2 ; case 0
	.short _021F95E8 - _021F94CC - 2 ; case 1
	.short _021F9884 - _021F94CC - 2 ; case 2
	.short _021F9A94 - _021F94CC - 2 ; case 3
	.short _021F9ABA - _021F94CC - 2 ; case 4
	.short _021F9AE2 - _021F94CC - 2 ; case 5
	.short _021F9B1E - _021F94CC - 2 ; case 6
	.short _021F9B38 - _021F94CC - 2 ; case 7
	.short _021F9C7C - _021F94CC - 2 ; case 8
_021F94DE:
	mov r2, #0x12
	mov r0, #0x5c
	mov r1, #0x8a
	lsl r2, r2, #0xe
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021F986C ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021F9870 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021F9E3C
	mov r1, #0xf2
	add r0, r6, #0
	lsl r1, r1, #2
	bl ov96_021E5D94
	mov r2, #0xf2
	mov r1, #0
	lsl r2, r2, #2
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8a
	bl sub_0201AC88
	str r0, [r4, #4]
	ldr r0, [r4]
	bl ov96_021FC028
	add r1, r4, #0
	add r1, #0xd8
	str r0, [r1]
	ldr r0, [r4]
	bl ov96_021FC618
	add r1, r4, #0
	add r1, #0xdc
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xd8
	ldr r0, [r0]
	bl ov96_021FC0E4
	add r5, r0, #0
	add r0, r4, #0
	add r0, #0xd8
	ldr r0, [r0]
	bl ov96_021FC0E8
	add r7, r0, #0
	add r0, r4, #0
	add r0, #0xd8
	ldr r0, [r0]
	bl ov96_021FC0F4
	add r3, r0, #0
	add r0, r6, #0
	add r1, r5, #0
	add r2, r7, #0
	bl ov96_021E5F70
	add r0, r6, #0
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0x6b
	str r0, [sp, #0xdc]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0xe0]
	lsr r0, r0, #4
	mov r2, #0x8a
	str r0, [sp, #0xe4]
	ldr r3, _021F9874 ; =0x00300010
	str r2, [sp, #0xe8]
	add r0, sp, #0xdc
	mov r1, #0x12
	str r3, [sp]
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x8a
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x8a
	str r1, [r4]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r4, #4]
	bl ov96_021F9E5C
	add r0, r4, #0
	bl ov96_021FB7C8
	ldr r0, _021F9878 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F95E8:
	ldr r5, _021F987C ; =0x0221C404
	add r3, sp, #0xd0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r4]
	bl ov96_021EB180
	mov r2, #0x89
	lsl r2, r2, #2
	mov r1, #0
	str r0, [r4, r2]
	str r1, [sp]
	ldr r0, [r4, r2]
	mov r2, #0x11
	lsl r2, r2, #0x10
	add r3, r1, #0
	bl ov96_021EB5C8
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0
	mov r2, #0x65
	bl ov96_021EB29C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	mov r2, #0x66
	bl ov96_021EB29C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #2
	mov r2, #0x67
	bl ov96_021EB29C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #3
	mov r2, #0x68
	bl ov96_021EB29C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #4
	mov r2, #0x69
	bl ov96_021EB29C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #5
	mov r2, #0x6a
	bl ov96_021EB29C
	mov r0, #3
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #9
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #3
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #6
	mov r3, #0x65
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #8
	mov r3, #0x65
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #7
	mov r3, #0x65
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x10
	mov r3, #0x66
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xd
	mov r3, #0x66
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xf
	mov r3, #0x66
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xe
	mov r3, #0x66
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xc
	mov r3, #0x67
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #6
	mov r3, #0x67
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xb
	mov r3, #0x67
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0xa
	mov r3, #0x67
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x14
	mov r3, #0x69
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x11
	mov r3, #0x69
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x13
	mov r3, #0x69
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x12
	mov r3, #0x69
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1c
	mov r3, #0x68
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x19
	mov r3, #0x68
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1b
	mov r3, #0x68
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1a
	mov r3, #0x68
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x20
	mov r3, #0x6a
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1d
	mov r3, #0x6a
	bl ov96_021EB2F4
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1f
	mov r3, #0x6a
	bl ov96_021EB334
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0x9c
	mov r2, #0x1e
	mov r3, #0x6a
	bl ov96_021EB36C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB3A4
	ldr r0, [r4]
	ldr r1, _021F9880 ; =0x000002E7
	mov r2, #1
	bl ov96_021E9A78
	mov r1, #0x3a
	lsl r1, r1, #4
	str r0, [r4, r1]
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB5E8
	mov r3, #0x3a
	str r0, [sp]
	lsl r3, r3, #4
	ldr r0, [r4]
	ldr r3, [r4, r3]
	mov r1, #3
	mov r2, #4
	bl ov96_021EA854
	mov r1, #0xe9
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
	nop
_021F986C: .word 0xFFFFE0FF
_021F9870: .word 0x04001000
_021F9874: .word 0x00300010
_021F9878: .word gMain + 0x60
_021F987C: .word 0x0221C404
_021F9880: .word 0x000002E7
_021F9884:
	mov r5, #0
	mov r7, #2
_021F9888:
	mov r0, #0x89
	str r7, [sp]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	mov r2, #3
	mov r3, #0x65
	bl ov96_021EB408
	mov r1, #0x1b
	bl sub_02024ADC
	mov r0, #6
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	mov r3, #0x67
	bl ov96_021EB408
	mov r1, #0x1b
	bl sub_02024ADC
	add r5, r5, #1
	cmp r5, #0xc
	blt _021F9888
	mov r5, #0
	mov r7, #5
_021F98C4:
	mov r0, #0x89
	str r7, [sp]
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	mov r3, #0x66
	bl ov96_021EB408
	mov r0, #7
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	mov r3, #0x68
	bl ov96_021EB408
	mov r0, #8
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	mov r3, #0x69
	bl ov96_021EB408
	add r5, r5, #1
	cmp r5, #3
	blt _021F98C4
	mov r0, #9
	str r0, [sp]
	mov r0, #0x89
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	mov r3, #0x6a
	bl ov96_021EB3E4
	mov r1, #0xea
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [r4, r1]
	mov r1, #0
	bl ov96_021EB564
	mov r0, #0
	str r0, [sp, #0xcc]
	mov r0, #0xa
	lsl r0, r0, #0x10
	str r0, [sp, #0xc4]
	mov r0, #0x72
	lsl r0, r0, #0xe
	str r0, [sp, #0xc8]
	mov r0, #0xea
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r1, sp, #0xc4
	bl ov96_021EB588
	mov r0, #0xea
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0xea
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	bl ov96_021EB630
	mov r0, #0
	str r0, [sp, #0x14]
	ldr r0, _021F9C90 ; =0x0221C3F4
	ldr r7, _021F9C94 ; =0x0221C3EC
	add r5, r4, #0
	str r0, [sp, #0x18]
_021F9968:
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB5E8
	add r1, r0, #0
	mov r0, #0x3a
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	ldr r3, [r4]
	mov r2, #0
	bl ov96_021EA374
	mov r1, #0xeb
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r0, r1, #0
	ldr r0, [r5, r0]
	mov r1, #1
	bl sub_02024830
	ldr r0, [sp, #0x18]
	add r1, sp, #0xb8
	ldrb r0, [r0]
	lsl r0, r0, #0xc
	str r0, [sp, #0xb8]
	mov r0, #0x72
	lsl r0, r0, #0xe
	str r0, [sp, #0xbc]
	mov r0, #0
	str r0, [sp, #0xc0]
	mov r0, #0xeb
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_020247D4
	mov r0, #0xeb
	lsl r0, r0, #2
	ldrb r1, [r7]
	ldr r0, [r5, r0]
	bl sub_020248F0
	ldr r0, [sp, #0x18]
	add r5, r5, #4
	add r0, r0, #1
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r7, r7, #1
	add r0, r0, #1
	str r0, [sp, #0x14]
	cmp r0, #6
	blt _021F9968
	add r0, r4, #0
	mov r1, #0x89
	add r0, #0xdc
	lsl r1, r1, #2
	ldr r0, [r0]
	ldr r1, [r4, r1]
	mov r2, #1
	bl ov96_021FC630
	ldr r0, [r4]
	bl ov96_021FC188
	mov r1, #0x8a
	lsl r1, r1, #2
	str r0, [r4, r1]
	mov r7, #0
	add r5, sp, #0x88
_021F99F2:
	add r0, r6, #0
	add r1, r7, #0
	bl ov96_021E5D50
	mov r1, #0
_021F99FC:
	ldrh r2, [r0]
	add r1, r1, #1
	strh r2, [r5]
	ldrh r2, [r0, #2]
	add r0, #0x28
	strh r2, [r5, #2]
	add r5, r5, #4
	cmp r1, #3
	blt _021F99FC
	add r7, r7, #1
	cmp r7, #4
	blt _021F99F2
	mov r0, #0x8a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r1, sp, #0x88
	bl ov96_021FC214
	mov r0, #0x8a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #0
	bl ov96_021FC2B4
	add r0, sp, #0x58
	mov r5, #0
	str r0, [sp, #0x1c]
	add r7, sp, #0x13c
_021F9A34:
	add r0, r6, #0
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r3, [sp, #0x1c]
	add r0, r6, #0
	add r2, r5, #0
	bl ov96_021E6168
	add r0, r6, #0
	bl ov96_021E5F24
	add r1, r0, #0
	add r0, r6, #0
	add r2, r5, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r7, #0x14]
	ldr r0, [sp, #0x1c]
	add r5, r5, #1
	add r0, #0x10
	add r7, r7, #4
	str r0, [sp, #0x1c]
	cmp r5, #3
	blt _021F9A34
	mov r0, #1
	mov r1, #0
	str r1, [sp, #0x13c]
	str r0, [sp, #0x140]
	str r1, [sp, #0x144]
	str r0, [sp, #0x148]
	str r0, [sp, #0x14c]
	str r1, [sp]
	mov r0, #0xe9
	str r1, [sp, #4]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #3
	add r2, sp, #0x58
	add r3, sp, #0x13c
	bl ov96_021EA8A8
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9A94:
	mov r0, #0xe9
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EAA00
	cmp r0, #0
	bne _021F9AA4
	b _021F9C8A
_021F9AA4:
	ldr r0, [r4, #4]
	bl ov96_021E6030
	ldr r0, [r4, #4]
	ldr r1, [r4]
	bl ov96_021F9FE8
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9ABA:
	ldr r0, [r4, #4]
	ldr r1, [r4]
	bl ov96_021FA020
	mov r1, #5
	ldr r0, _021F9C98 ; =0x04000010
	lsl r1, r1, #0x16
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	mov r1, #3
	ldr r0, _021F9C9C ; =0x04001010
	lsl r1, r1, #0x14
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9AE2:
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E5DFC
	mov r7, #0xe9
	mov r5, #0
	lsl r7, r7, #2
_021F9B00:
	lsl r1, r5, #0x18
	ldr r0, [r4, r7]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	mov r1, #1
	bl ov96_021EAB38
	add r5, r5, #1
	cmp r5, #3
	blt _021F9B00
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9B1E:
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F9B30
	add r4, #0xd8
	ldr r0, [r4]
	bl ov96_021FC144
_021F9B30:
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9B38:
	add r0, r4, #0
	mov r1, #0x89
	add r0, #0xd8
	lsl r1, r1, #2
	ldr r0, [r0]
	ldr r1, [r4, r1]
	bl ov96_021FC07C
	mov r2, #0x3a
	mov r3, #0x89
	lsl r2, r2, #4
	lsl r3, r3, #2
	mov r1, #0x11
	ldr r2, [r4, r2]
	ldr r3, [r4, r3]
	add r0, r6, #0
	lsl r1, r1, #4
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	ldr r3, _021F9CA0 ; =0x0221C410
	add r2, sp, #0x4c
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0xaa
	str r0, [r2]
	add r0, sp, #0x28
	mov r2, #0xa
	bl ReadWholeNarcMemberByIdPair
	add r0, sp, #0xec
	mov r1, #0xaa
	mov r2, #0
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #0x24]
	add r0, r4, #0
	str r0, [sp, #0x20]
	add r0, #0xe0
	str r0, [sp, #0x20]
	add r7, sp, #0x4c
	add r5, sp, #0x40
_021F9B96:
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xe9
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r3, #0xd8
	str r0, [sp, #4]
	ldr r0, [sp, #0x24]
	add r1, sp, #0xec
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	ldr r0, [sp, #0x20]
	add r2, sp, #0x28
	str r0, [sp, #0xc]
	ldr r3, [r3]
	add r0, r6, #0
	bl ov96_021FA0E8
	ldr r0, [r7]
	add r7, r7, #4
	strh r0, [r5]
	mov r0, #0x62
	lsl r0, r0, #2
	strh r0, [r5, #2]
	ldr r0, [sp, #0x20]
	add r5, r5, #4
	add r0, #0x6c
	str r0, [sp, #0x20]
	ldr r0, [sp, #0x24]
	add r0, r0, #1
	str r0, [sp, #0x24]
	cmp r0, #3
	blt _021F9B96
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, sp, #0x40
	mov r2, #0x3a
	mov r3, #0x89
	str r0, [sp, #8]
	lsl r2, r2, #4
	lsl r3, r3, #2
	ldr r2, [r4, r2]
	ldr r3, [r4, r3]
	add r0, r6, #0
	mov r1, #0
	bl ov96_021E634C
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F9C12
	add r0, r6, #0
	add r1, sp, #0xec
	bl ov96_021FBBB4
_021F9C12:
	add r0, r6, #0
	bl ov96_021E5F54
	add r5, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	mov r3, #0
	mov r1, #0x11
_021F9C24:
	add r2, r0, r3
	strb r1, [r2, #0x1c]
	add r2, r3, #1
	lsl r2, r2, #0x18
	lsr r3, r2, #0x18
	cmp r3, #6
	blo _021F9C24
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021F9C56
	add r5, #0x28
	add r0, r5, #0
	bl ov96_021E8A20
	mov r3, #0
	mov r2, #0x11
_021F9C48:
	add r1, r0, r3
	strb r2, [r1, #0x1c]
	add r1, r3, #1
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	cmp r3, #6
	blo _021F9C48
_021F9C56:
	mov r0, #1
	bl sub_0203A994
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #2
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	add r0, r6, #0
	bl ov96_021E5DEC
	b _021F9C8A
_021F9C7C:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021F9C8A
	add sp, #0x180
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021F9C8A:
	mov r0, #0
	add sp, #0x180
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021F9C90: .word 0x0221C3F4
_021F9C94: .word 0x0221C3EC
_021F9C98: .word 0x04000010
_021F9C9C: .word 0x04001010
_021F9CA0: .word 0x0221C410
	thumb_func_end ov96_021F94A8

	thumb_func_start ov96_021F9CA4
ov96_021F9CA4: ; 0x021F9CA4
	push {r4, lr}
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0x8a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021FC314
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r4, pc}
	thumb_func_end ov96_021F9CA4

	thumb_func_start ov96_021F9CC4
ov96_021F9CC4: ; 0x021F9CC4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r0, #0
	bl ov96_021E5DC4
	add r0, r6, #0
	bl ov96_021E6040
	str r0, [sp, #0x1c]
	bl ov96_021E9510
	mov r5, #0
_021F9CDC:
	lsl r1, r5, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r4, r0, #0
	mov r1, #0x1e
	bl _s32_div_f
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r0, #0xa
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	str r7, [sp]
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	mov r0, #1
	str r0, [sp, #0xc]
	mov r0, #3
	str r0, [sp, #0x10]
	mov r0, #1
	str r0, [sp, #0x14]
	ldr r0, _021F9D54 ; =0x00000123
	lsl r3, r4, #0x10
	str r0, [sp, #0x18]
	ldr r1, [sp, #0x1c]
	add r0, r6, #0
	add r2, r5, #0
	lsr r3, r3, #0x10
	bl ov96_021E966C
	add r5, r5, #1
	cmp r5, #4
	blt _021F9CDC
	ldr r0, [sp, #0x1c]
	mov r1, #2
	bl ov96_021E93B4
	ldr r0, [sp, #0x1c]
	mov r1, #0
	bl ov96_0221A56C
	ldr r0, [sp, #0x1c]
	bl ov96_021E952C
	ldr r0, [sp, #0x1c]
	mov r1, #0
	bl ov96_021E9570
	mov r0, #1
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021F9D54: .word 0x00000123
	thumb_func_end ov96_021F9CC4

	thumb_func_start ov96_021F9D58
ov96_021F9D58: ; 0x021F9D58
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	add r0, r5, #0
	bl ov96_021E5F1C
	mov r1, #0
	bl ov96_021E87B0
	mov r0, #0x8a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021FC1A8
	add r0, r5, #0
	bl ov96_021E5F8C
	add r0, r4, #0
	add r0, #0xdc
	ldr r0, [r0]
	bl ov96_021FC690
	add r0, r4, #0
	add r0, #0xd8
	ldr r0, [r0]
	bl ov96_021FC05C
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #2
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #6
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #7
	bl sub_0201BB4C
	add r0, r4, #0
	add r0, #8
	bl RemoveWindow
	ldr r0, [r4, #4]
	bl FreeToHeap
	mov r0, #0xe9
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EA894
	mov r0, #0x3a
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	mov r0, #0x89
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB21C
	bl ov96_021E92D0
	mov r0, #4
	bl sub_02002DB4
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _021F9E38 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #0x8a
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	nop
_021F9E38: .word gMain + 0x60
	thumb_func_end ov96_021F9D58

	thumb_func_start ov96_021F9E3C
ov96_021F9E3C: ; 0x021F9E3C
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021F9E58 ; =0x0221C534
	add r3, sp, #0
	mov r2, #5
_021F9E46:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021F9E46
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021F9E58: .word 0x0221C534
	thumb_func_end ov96_021F9E3C

	thumb_func_start ov96_021F9E5C
ov96_021F9E5C: ; 0x021F9E5C
	push {r3, r4, r5, lr}
	sub sp, #0xf0
	ldr r5, _021F9FC4 ; =0x0221C434
	add r3, sp, #0xe0
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _021F9FC8 ; =0x0221C48C
	add r3, sp, #0xc4
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _021F9FCC ; =0x0221C4A8
	add r3, sp, #0xa8
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _021F9FD0 ; =0x0221C4C4
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #2
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #2
	bl sub_0201CAE0
	ldr r5, _021F9FD4 ; =0x0221C4E0
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _021F9FD8 ; =0x0221C454
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _021F9FDC ; =0x0221C470
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _021F9FE0 ; =0x0221C518
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	ldr r5, _021F9FE4 ; =0x0221C4FC
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #7
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #7
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xf0
	pop {r3, r4, r5, pc}
	nop
_021F9FC4: .word 0x0221C434
_021F9FC8: .word 0x0221C48C
_021F9FCC: .word 0x0221C4A8
_021F9FD0: .word 0x0221C4C4
_021F9FD4: .word 0x0221C4E0
_021F9FD8: .word 0x0221C454
_021F9FDC: .word 0x0221C470
_021F9FE0: .word 0x0221C518
_021F9FE4: .word 0x0221C4FC
	thumb_func_end ov96_021F9E5C

	thumb_func_start ov96_021F9FE8
ov96_021F9FE8: ; 0x021F9FE8
	push {r3, r4, r5, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	add r5, r0, #0
	str r3, [sp, #4]
	add r4, r1, #0
	str r3, [sp, #8]
	mov r0, #0x9c
	mov r1, #1
	add r2, r5, #0
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #1
	add r2, r5, #0
	mov r3, #4
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadCharData
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021F9FE8

	thumb_func_start ov96_021FA020
ov96_021FA020: ; 0x021FA020
	push {r3, r4, r5, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	add r5, r0, #0
	str r3, [sp, #4]
	add r4, r1, #0
	str r3, [sp, #8]
	mov r0, #0x9c
	mov r1, #2
	add r2, r5, #0
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #3
	add r2, r5, #0
	mov r3, #1
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #4
	add r2, r5, #0
	mov r3, #2
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #2
	add r2, r5, #0
	mov r3, #4
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #3
	add r2, r5, #0
	mov r3, #5
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #4
	add r2, r5, #0
	mov r3, #6
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0x9c
	mov r1, #5
	add r2, r5, #0
	mov r3, #7
	str r4, [sp, #0xc]
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	mov r0, #0x20
	str r0, [sp]
	mov r0, #0x9c
	add r2, r1, #0
	add r3, r1, #0
	str r4, [sp, #4]
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x20
	str r0, [sp]
	mov r1, #0
	mov r0, #0x9c
	mov r2, #4
	add r3, r1, #0
	str r4, [sp, #4]
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FA020

	thumb_func_start ov96_021FA0E8
ov96_021FA0E8: ; 0x021FA0E8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	ldr r5, [sp, #0x60]
	str r0, [sp]
	ldr r4, [sp, #0x64]
	mov r0, #0
	strh r0, [r4]
	add r6, r1, #0
	strh r0, [r4, #2]
	mov r1, #0x30
	strh r1, [r4, #4]
	mov r1, #5
	lsl r1, r1, #6
	strh r1, [r4, #6]
	add r1, r4, #0
	str r2, [sp, #4]
	strb r5, [r4, #0x18]
	mov r2, #1
	add r1, #0x68
	strh r2, [r1]
	mov r1, #0xfe
	lsl r1, r1, #0x16
	str r1, [r4, #0x64]
	strb r0, [r4, #8]
	add r0, r3, #0
	add r1, r5, #0
	bl ov96_021FC0D0
	str r0, [r4, #0x20]
	cmp r5, #0
	beq _021FA130
	cmp r5, #1
	beq _021FA13A
	cmp r5, #2
	beq _021FA144
	b _021FA14C
_021FA130:
	mov r0, #0
	strh r0, [r4, #0x14]
	mov r0, #4
	strh r0, [r4, #0x16]
	b _021FA14C
_021FA13A:
	mov r0, #1
	strh r0, [r4, #0x14]
	mov r0, #5
	strh r0, [r4, #0x16]
	b _021FA14C
_021FA144:
	mov r0, #2
	strh r0, [r4, #0x14]
	mov r0, #6
	strh r0, [r4, #0x16]
_021FA14C:
	cmp r5, #0
	beq _021FA15A
	cmp r5, #1
	beq _021FA162
	cmp r5, #2
	beq _021FA16A
	b _021FA172
_021FA15A:
	mov r0, #0x30
	mov r1, #0
	str r0, [sp, #8]
	b _021FA17A
_021FA162:
	mov r0, #0x80
	mov r1, #1
	str r0, [sp, #8]
	b _021FA17A
_021FA16A:
	mov r0, #0xd0
	mov r1, #2
	str r0, [sp, #8]
	b _021FA17A
_021FA172:
	bl GF_AssertFail
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
_021FA17A:
	lsl r1, r1, #0x18
	ldr r0, [sp, #0x5c]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	str r0, [sp, #0xc]
	bl ov96_021EAA20
	ldr r1, [sp, #0xc]
	str r1, [r4, #0x24]
	bl ov96_021E8BB0
	str r0, [sp, #0x10]
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	add r2, r5, #0
	bl ov96_021E60D8
	add r7, r0, #0
	ldrb r0, [r7, #2]
	lsl r0, r0, #2
	ldr r1, [r6, r0]
	add r0, r4, #0
	add r0, #0x5c
	strh r1, [r0]
	ldrb r0, [r7, #2]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r1, [r0, #0x14]
	add r0, r4, #0
	add r0, #0x5e
	strh r1, [r0]
	add r0, r4, #0
	ldrb r1, [r7, #2]
	add r0, #0x58
	strb r1, [r0]
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	add r2, r5, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	sub r0, r0, #1
	lsl r2, r0, #3
	ldr r1, [sp, #4]
	ldr r3, [sp, #4]
	ldr r1, [r1, r2]
	add r2, r3, r2
	ldr r0, [sp, #0xc]
	ldr r2, [r2, #4]
	bl ov96_021EAF70
	bl ov96_021E6104
	add r1, r0, #0
	ldr r0, [sp, #0xc]
	bl ov96_021EAF6C
	ldrb r0, [r7, #1]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x3c]
	bl _itof
	ldr r1, _021FA338 ; =0x41200000
	bl _fdiv
	str r0, [r4, #0x50]
	ldrb r0, [r7, #4]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x28]
	bl _itof
	ldr r1, _021FA33C ; =0x42C80000
	bl _fdiv
	str r0, [r4, #0x54]
	ldr r0, [sp, #0x10]
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _021FA236
	mov r0, #2
	lsl r0, r0, #0x10
	str r0, [sp, #0x38]
	str r0, [sp, #0x3c]
	b _021FA23E
_021FA236:
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0x38]
	str r0, [sp, #0x3c]
_021FA23E:
	mov r3, #0x78
	str r3, [r4, #0x3c]
	add r2, r3, #0
	add r3, #0x98
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	add r2, r2, r3
	bl ov96_021EAF94
	ldr r0, [sp, #0xc]
	mov r1, #1
	bl ov96_021EAC0C
	ldr r0, [sp, #0xc]
	mov r1, #4
	bl ov96_021EABA8
	ldr r0, [sp, #0xc]
	mov r1, #2
	bl ov96_021EABE0
	ldr r0, [sp, #0xc]
	add r1, sp, #0x38
	bl ov96_021EABF4
	ldr r0, [sp, #0x58]
	mov r1, #0x66
	mov r2, #5
	bl ov96_021EB4F4
	str r0, [r4, #0x44]
	bl ov96_021EB5B8
	mov r1, #0x12
	ldr r2, [r4, #0x3c]
	lsl r1, r1, #4
	add r1, r2, r1
	str r1, [r4, #0x40]
	mov r1, #0
	str r1, [sp, #0x34]
	ldr r1, [sp, #8]
	add r6, r0, #0
	lsl r5, r1, #0xc
	str r5, [sp, #0x2c]
	ldr r1, [r4, #0x40]
	lsl r1, r1, #0xc
	str r1, [sp, #0x30]
	add r1, sp, #0x2c
	bl sub_020247D4
	ldr r0, [r4, #0x44]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r0, r6, #0
	mov r1, #3
	bl sub_02024ADC
	ldr r0, [sp, #0x58]
	mov r1, #0x68
	mov r2, #7
	bl ov96_021EB4F4
	str r0, [r4, #0x48]
	bl ov96_021EB5B8
	mov r1, #0
	add r6, r0, #0
	bl sub_020248F0
	mov r0, #0
	str r0, [sp, #0x28]
	mov r0, #0x6b
	lsl r0, r0, #0xe
	str r0, [sp, #0x24]
	add r0, r6, #0
	add r1, sp, #0x20
	str r5, [sp, #0x20]
	bl sub_020247D4
	add r0, r6, #0
	mov r1, #4
	bl sub_02024ADC
	add r0, r6, #0
	mov r1, #2
	bl sub_0202487C
	ldr r0, [sp, #0x58]
	mov r1, #0x69
	mov r2, #8
	bl ov96_021EB4F4
	str r0, [r4, #0x4c]
	bl ov96_021EB5B8
	mov r1, #0
	add r6, r0, #0
	bl sub_020248F0
	mov r0, #0
	str r0, [sp, #0x1c]
	mov r0, #0x62
	lsl r0, r0, #0xe
	str r0, [sp, #0x18]
	str r5, [sp, #0x14]
	add r0, r6, #0
	add r1, sp, #0x14
	bl sub_020247D4
	mov r1, #1
	ldr r0, [r4, #0x4c]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r6, #0
	mov r1, #2
	bl sub_02024ADC
	mov r0, #0xfe
	lsl r0, r0, #0x16
	str r0, [r4, #0xc]
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021FA338: .word 0x41200000
_021FA33C: .word 0x42C80000
	thumb_func_end ov96_021FA0E8

	thumb_func_start ov96_021FA340
ov96_021FA340: ; 0x021FA340
	ldr r3, _021FA348 ; =ov96_021FBE44
	ldr r0, [r0, #0x20]
	bx r3
	nop
_021FA348: .word ov96_021FBE44
	thumb_func_end ov96_021FA340

	thumb_func_start ov96_021FA34C
ov96_021FA34C: ; 0x021FA34C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r4, r2, #0
	add r5, r0, #0
	ldrb r0, [r4, #8]
	add r6, r3, #0
	str r1, [sp, #4]
	cmp r0, #1
	beq _021FA38A
	ldr r0, [r4, #0x28]
	cmp r0, #2
	beq _021FA38A
	ldrb r0, [r4, #9]
	cmp r0, #0
	bne _021FA38A
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x50]
	bl _fls
	bhs _021FA38A
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x54]
	bl _fadd
	str r0, [r4, #0xc]
	ldr r1, [r4, #0x50]
	bl _fgr
	bls _021FA38A
	ldr r0, [r4, #0x50]
	str r0, [r4, #0xc]
_021FA38A:
	cmp r6, #0
	beq _021FA422
	ldr r0, [r4, #0x28]
	cmp r0, #0
	bne _021FA422
	ldrb r2, [r4, #0x18]
	add r3, r4, #0
	ldr r1, [r6, #4]
	add r0, r5, #0
	add r3, #0x24
	bl ov96_021FA7BC
	mov r0, #0
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0x58
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FA3FA
	ldr r6, [sp, #8]
_021FA3B2:
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021FA340
	add r7, r0, #0
	bl ov96_021FBEA0
	cmp r0, #0
	beq _021FA3F4
	add r0, r7, #0
	add r1, sp, #0x1c
	bl ov96_021FBF5C
	ldr r0, [r4, #0x24]
	bl ov96_021EAF8C
	mov r1, #0x11
	ldr r2, [r4, #0x3c]
	lsl r1, r1, #4
	add r1, r2, r1
	sub r0, r1, r0
	add r1, sp, #0x1c
	bl ov96_021FAB04
	cmp r0, #0
	beq _021FA3F4
	mov r0, #1
	str r0, [sp, #8]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021FBCB8
	b _021FA3FA
_021FA3F4:
	add r6, r6, #1
	cmp r6, #4
	blt _021FA3B2
_021FA3FA:
	ldr r0, [r4, #0x44]
	bl ov96_021EB5B8
	mov r1, #1
	add r6, r0, #0
	bl sub_02024830
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _021FA418
	add r0, r6, #0
	mov r1, #0
	bl sub_020248F0
	b _021FA452
_021FA418:
	add r0, r6, #0
	mov r1, #1
	bl sub_020248F0
	b _021FA452
_021FA422:
	cmp r6, #0
	beq _021FA452
	ldr r0, [r4, #0x28]
	cmp r0, #1
	bne _021FA452
	ldr r0, [r4, #0x2c]
	cmp r0, #3
	bne _021FA452
	add r0, r4, #0
	add r0, #0x58
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FA452
	add r0, r4, #0
	mov r1, #1
	add r0, #0x60
	strh r1, [r0]
	add r0, r4, #0
	add r0, #0x62
	ldrh r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x62
	strh r1, [r0]
_021FA452:
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x10]
	bl _fadd
	add r6, r0, #0
	bl _ftoi
	add r7, r0, #0
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fsub
	str r0, [r4, #0x10]
	ldrh r0, [r4]
	add r0, r0, r7
	strh r0, [r4]
	ldrh r1, [r4]
	ldrb r2, [r4, #0x18]
	ldr r0, [sp, #4]
	bl ov96_021FB6B4
	ldr r0, [sp, #4]
	add r1, r4, #0
	bl ov96_021FB6C8
	ldrh r0, [r4, #4]
	sub r0, r0, r7
	strh r0, [r4, #4]
	mov r0, #2
	ldrh r1, [r4, #4]
	lsl r0, r0, #8
	add r0, r1, r0
	cmp r0, #0
	bgt _021FA49C
	strh r0, [r4, #4]
_021FA49C:
	ldrh r1, [r4, #4]
	mov r0, #0x11
	lsl r0, r0, #4
	add r1, r1, r0
	strh r1, [r4, #6]
	ldrh r1, [r4, #6]
	add r0, #0xf0
	add r0, r1, r0
	cmp r0, #0
	bgt _021FA4B2
	strh r0, [r4, #6]
_021FA4B2:
	mov r6, #0
_021FA4B4:
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021FA340
	add r1, r7, #0
	bl ov96_021FBEFC
	add r6, r6, #1
	cmp r6, #4
	blt _021FA4B4
	ldr r0, [sp, #4]
	ldrb r1, [r4, #0x18]
	add r0, #0xdc
	ldr r0, [r0]
	add r2, r7, #0
	bl ov96_021FC6EC
	add r1, r4, #0
	add r2, r4, #0
	ldrb r0, [r4, #0x18]
	add r1, #0x24
	add r2, #0xc
	bl ov96_021FA83C
	ldrb r0, [r4, #8]
	cmp r0, #1
	bne _021FA54C
	ldr r0, [r4, #0x28]
	cmp r0, #0
	bne _021FA4F6
	mov r0, #3
	str r0, [r4, #0x28]
	b _021FA53E
_021FA4F6:
	cmp r0, #3
	beq _021FA4FE
	cmp r0, #1
	bne _021FA53E
_021FA4FE:
	ldrh r1, [r4]
	mov r0, #0x42
	lsl r0, r0, #6
	ldr r2, [r4, #0x3c]
	cmp r1, r0
	blo _021FA51A
	cmp r2, #0x78
	bne _021FA53E
	mov r0, #4
	str r0, [r4, #0x28]
	mov r0, #0
	str r0, [r4, #0xc]
	str r0, [r4, #0x10]
	b _021FA53E
_021FA51A:
	sub r0, #0x80
	cmp r1, r0
	blo _021FA53E
	mov r0, #0xfe
	lsl r0, r0, #0x16
	str r0, [r4, #0xc]
	mov r0, #0
	str r0, [r4, #0x10]
	ldr r0, [r4, #0x24]
	mov r1, #1
	bl ov96_021EAC0C
	ldr r0, [r4, #0x4c]
	bl ov96_021EB5B8
	mov r1, #0
	bl sub_020248F0
_021FA53E:
	ldr r0, [sp, #4]
	add r1, r4, #0
	ldr r0, [r0, #4]
	bl ov96_021FAB24
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
_021FA54C:
	ldr r1, [r4, #0x28]
	mov r0, #1
	cmp r1, #1
	bne _021FA556
	mov r0, #0
_021FA556:
	add r1, r4, #0
	add r1, #0x60
	ldrh r1, [r1]
	cmp r1, #1
	bne _021FA56C
	add r1, r4, #0
	add r1, #0x62
	ldrh r1, [r1]
	cmp r1, #1
	bne _021FA56C
	mov r0, #1
_021FA56C:
	cmp r0, #0
	bne _021FA572
	b _021FA67C
_021FA572:
	mov r6, #0
_021FA574:
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_021FA340
	str r0, [sp, #0xc]
	bl ov96_021FBEA0
	cmp r0, #0
	beq _021FA674
	ldr r7, [r4, #0x24]
	ldr r0, [sp, #0xc]
	add r1, sp, #0x14
	bl ov96_021FBF5C
	add r0, r7, #0
	bl ov96_021EAF90
	str r0, [sp, #0x10]
	add r0, r7, #0
	bl ov96_021EAF8C
	add r1, r0, #0
	mov r0, #0x11
	lsl r1, r1, #0x18
	ldr r2, [r4, #0x3c]
	lsl r0, r0, #4
	add r2, r2, r0
	ldr r0, [sp, #0x10]
	lsr r1, r1, #0x18
	sub r0, r2, r0
	add r2, sp, #0x14
	bl ov96_021FAAE0
	cmp r0, #0
	beq _021FA674
	ldr r0, [sp, #0xc]
	bl ov96_021FBEA4
	ldrb r2, [r4, #0x18]
	ldr r1, _021FA6C0 ; =0x0221DC2C
	ldr r0, _021FA6C4 ; =0x000008A5
	ldrb r1, [r1, r2]
	bl sub_0200606C
	ldrb r2, [r4, #0x18]
	ldr r0, _021FA6C0 ; =0x0221DC2C
	ldr r1, _021FA6C8 ; =0x0221DC28
	ldrb r0, [r0, r2]
	ldrsb r1, [r1, r2]
	bl sub_020061D0
	add r0, r4, #0
	add r0, #0x60
	ldrh r0, [r0]
	cmp r0, #1
	bne _021FA61E
	add r0, r4, #0
	add r0, #0x62
	ldrh r0, [r0]
	cmp r0, #1
	bne _021FA61E
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldrb r2, [r4, #0x18]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r3, #2
	bl ov96_021E8228
	add r1, r4, #0
	add r1, #0x30
	mov r0, #3
	strb r0, [r1]
	mov r0, #1
	str r0, [r4, #0x2c]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021FBCB8
	b _021FA666
_021FA61E:
	mov r0, #0x3f
	lsl r0, r0, #0x18
	str r0, [r4, #0xc]
	mov r0, #0
	strb r0, [r4, #9]
	mov r0, #2
	add r1, r4, #0
	str r0, [r4, #0x28]
	add r1, #0x31
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x32
	mov r0, #1
	strb r0, [r1]
	mov r0, #4
	str r0, [r4, #0x2c]
	ldr r0, [r4, #0x4c]
	bl ov96_021EB5B8
	mov r1, #0
	bl sub_020248F0
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldrb r2, [r4, #0x18]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r3, #1
	bl ov96_021E8228
_021FA666:
	add r1, r4, #0
	add r1, #0x60
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0x62
	strh r0, [r1]
_021FA674:
	add r6, r6, #1
	cmp r6, #4
	bge _021FA67C
	b _021FA574
_021FA67C:
	ldrb r0, [r4, #8]
	cmp r0, #1
	beq _021FA6B0
	ldrh r1, [r4]
	mov r0, #1
	lsl r0, r0, #0xc
	cmp r1, r0
	blo _021FA6B0
	mov r0, #1
	strb r0, [r4, #8]
	mov r1, #0x23
	ldr r0, [sp, #4]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r1, _021FA6C0 ; =0x0221DC2C
	strh r0, [r4, #2]
	ldrb r2, [r4, #0x18]
	ldr r0, _021FA6CC ; =0x000008AB
	ldrb r1, [r1, r2]
	bl sub_0200606C
	mov r1, #0xf1
	ldr r0, [sp, #4]
	mov r2, #0x1e
	lsl r1, r1, #2
	strh r2, [r0, r1]
_021FA6B0:
	ldr r0, [sp, #4]
	add r1, r4, #0
	ldr r0, [r0, #4]
	bl ov96_021FAB24
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_021FA6C0: .word 0x0221DC2C
_021FA6C4: .word 0x000008A5
_021FA6C8: .word 0x0221DC28
_021FA6CC: .word 0x000008AB
	thumb_func_end ov96_021FA34C

	thumb_func_start ov96_021FA6D0
ov96_021FA6D0: ; 0x021FA6D0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #0xc]
	sub r0, r0, #1
	str r0, [sp, #8]
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r6, r1, #0
	str r0, [sp, #0x14]
	bl sub_02025358
	cmp r0, #0
	beq _021FA71C
	ldr r0, [sp, #4]
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
	ldr r2, _021FA7A8 ; =gMain + 0x40
	add r0, r6, #0
	ldrh r1, [r2, #0x20]
	ldrh r2, [r2, #0x22]
	bl ov96_021FB784
	str r0, [sp, #8]
	cmp r0, #3
	bge _021FA71C
	str r0, [sp, #0x10]
_021FA71C:
	mov r7, #0
	add r5, r6, #0
	add r4, r7, #0
	add r5, #0xe0
_021FA724:
	ldrb r0, [r5, #8]
	mov r3, #0
	cmp r0, #0
	bne _021FA736
	ldr r0, [sp, #8]
	cmp r0, r4
	bne _021FA73C
	add r3, sp, #0x10
	b _021FA73C
_021FA736:
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
_021FA73C:
	ldr r0, [sp, #4]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_021FA34C
	add r4, r4, #1
	add r5, #0x6c
	cmp r4, #3
	blt _021FA724
	add r0, r6, #0
	add r0, #0xe6
	ldrh r0, [r0]
	ldr r1, _021FA7AC ; =0x01FF0000
	ldr r2, _021FA7B0 ; =0x04000010
	lsl r0, r0, #0x10
	and r0, r1
	str r0, [r2]
	ldr r0, _021FA7B4 ; =0x00000152
	ldrh r3, [r6, r0]
	lsl r3, r3, #0x10
	and r3, r1
	str r3, [r2, #4]
	add r3, r0, #0
	add r3, #0x6c
	ldrh r3, [r6, r3]
	lsl r3, r3, #0x10
	and r3, r1
	str r3, [r2, #8]
	add r2, r6, #0
	add r2, #0xe4
	ldrh r2, [r2]
	lsl r2, r2, #0x10
	add r3, r2, #0
	ldr r2, _021FA7B8 ; =0x04001010
	and r3, r1
	str r3, [r2]
	sub r3, r0, #2
	ldrh r3, [r6, r3]
	add r0, #0x6a
	lsl r3, r3, #0x10
	and r3, r1
	str r3, [r2, #4]
	ldrh r0, [r6, r0]
	lsl r0, r0, #0x10
	and r0, r1
	str r0, [r2, #8]
	cmp r7, #3
	blo _021FA7A0
	mov r0, #1
	str r0, [sp, #0xc]
_021FA7A0:
	ldr r0, [sp, #0xc]
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FA7A8: .word gMain + 0x40
_021FA7AC: .word 0x01FF0000
_021FA7B0: .word 0x04000010
_021FA7B4: .word 0x00000152
_021FA7B8: .word 0x04001010
	thumb_func_end ov96_021FA6D0

	thumb_func_start ov96_021FA7BC
ov96_021FA7BC: ; 0x021FA7BC
	push {r3, r4, r5, r6, r7, lr}
	add r4, r3, #0
	add r7, r0, #0
	ldr r0, [r4, #4]
	add r5, r2, #0
	cmp r0, #0
	bne _021FA82A
	add r0, r4, #0
	add r0, #0x34
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FA7FC
	ldr r1, _021FA82C ; =0x0221DC2C
	ldr r0, _021FA830 ; =0x0000060A
	add r6, r1, r5
	ldrb r1, [r1, r5]
	bl sub_0200606C
	add r0, r7, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r7, #0
	lsr r1, r1, #0x18
	add r2, r5, #0
	mov r3, #2
	bl ov96_021E8228
	b _021FA808
_021FA7FC:
	ldr r1, _021FA82C ; =0x0221DC2C
	ldr r0, _021FA834 ; =0x000008AA
	add r6, r1, r5
	ldrb r1, [r1, r5]
	bl sub_0200606C
_021FA808:
	ldr r1, _021FA838 ; =0x0221DC28
	ldrb r0, [r6]
	ldrsb r1, [r1, r5]
	bl sub_020061D0
	mov r1, #1
	str r1, [r4, #4]
	mov r0, #0
	strb r0, [r4, #0xc]
	str r1, [r4, #8]
	add r1, r4, #0
	ldr r0, [r4]
	add r4, #0x14
	add r1, #0x10
	add r2, r4, #0
	bl ov96_021EAE9C
_021FA82A:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FA82C: .word 0x0221DC2C
_021FA830: .word 0x0000060A
_021FA834: .word 0x000008AA
_021FA838: .word 0x0221DC28
	thumb_func_end ov96_021FA7BC

	thumb_func_start ov96_021FA83C
ov96_021FA83C: ; 0x021FA83C
	push {r3, r4, r5, r6, lr}
	sub sp, #0x24
	add r4, r1, #0
	add r5, r0, #0
	ldr r0, [r4, #4]
	cmp r0, #3
	bhi _021FA8F2
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FA856: ; jump table
	.short _021FAA64 - _021FA856 - 2 ; case 0
	.short _021FA85E - _021FA856 - 2 ; case 1
	.short _021FA9AE - _021FA856 - 2 ; case 2
	.short _021FAA1E - _021FA856 - 2 ; case 3
_021FA85E:
	ldrb r0, [r4, #0xc]
	add r0, r0, #1
	strb r0, [r4, #0xc]
	ldr r0, [r4, #8]
	cmp r0, #1
	beq _021FA874
	cmp r0, #2
	beq _021FA8D8
	cmp r0, #3
	beq _021FA912
	b _021FA9A8
_021FA874:
	add r0, r4, #0
	add r0, #0x34
	ldrb r0, [r0]
	ldr r3, _021FAAC8 ; =0x0221C55C
	lsl r1, r0, #3
	add r5, r0, r1
	ldrb r1, [r4, #0xc]
	sub r2, r1, #1
	add r1, r3, r5
	ldrsb r1, [r2, r1]
	ldr r2, [r4, #0x14]
	sub r5, r2, r1
	cmp r0, #0
	bne _021FA8A4
	add r0, r4, #0
	mov r1, #0
	bl ov96_021FB8FC
	ldr r0, [r4]
	ldr r1, [r4, #0x10]
	add r2, r5, #0
	bl ov96_021EAE4C
	b _021FA8B6
_021FA8A4:
	add r0, r4, #0
	bl ov96_021FB8B4
	ldr r0, [r4]
	ldr r1, [r4, #0x10]
	add r2, r5, #0
	mov r3, #0
	bl ov96_021EAD88
_021FA8B6:
	ldrb r1, [r4, #0xc]
	ldrh r0, [r4, #0x38]
	cmp r1, r0
	blt _021FA8F2
	mov r0, #2
	str r0, [r4, #8]
	mov r1, #0
	add r0, r4, #0
	strb r1, [r4, #0xc]
	add r0, #0x34
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FA8F2
	ldr r0, [r4]
	bl ov96_021EAB94
	b _021FAA6A
_021FA8D8:
	ldrb r1, [r4, #0xc]
	ldrh r0, [r4, #0x3a]
	cmp r1, r0
	blt _021FA8F2
	mov r0, #3
	str r0, [r4, #8]
	mov r0, #0
	strb r0, [r4, #0xc]
	add r0, r4, #0
	add r0, #0x34
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FA8F4
_021FA8F2:
	b _021FAA6A
_021FA8F4:
	ldr r0, [r4]
	mov r1, #1
	bl ov96_021EAB94
	ldr r6, _021FAACC ; =0x0221DC2C
	ldr r0, _021FAAD0 ; =0x000008AA
	ldrb r1, [r6, r5]
	bl sub_0200606C
	ldr r1, _021FAAD4 ; =0x0221DC28
	ldrb r0, [r6, r5]
	ldrsb r1, [r1, r5]
	bl sub_020061D0
	b _021FAA6A
_021FA912:
	add r0, r4, #0
	add r0, #0x34
	ldrb r0, [r0]
	ldr r3, _021FAAD8 ; =0x0221C589
	lsl r1, r0, #3
	add r6, r0, r1
	ldrb r1, [r4, #0xc]
	sub r2, r1, #1
	add r1, r3, r6
	ldrsb r1, [r2, r1]
	ldr r2, [r4, #0x14]
	sub r6, r2, r1
	cmp r0, #0
	bne _021FA942
	add r0, r4, #0
	mov r1, #1
	bl ov96_021FB8FC
	ldr r0, [r4]
	ldr r1, [r4, #0x10]
	add r2, r6, #0
	bl ov96_021EAE4C
	b _021FA954
_021FA942:
	add r0, r4, #0
	bl ov96_021FB8B4
	ldr r0, [r4]
	ldr r1, [r4, #0x10]
	add r2, r6, #0
	mov r3, #0
	bl ov96_021EAD88
_021FA954:
	ldrh r0, [r4, #0x38]
	ldrb r1, [r4, #0xc]
	cmp r1, r0
	blt _021FA99C
	mov r3, #0
	str r3, [r4, #4]
	str r3, [r4, #8]
	strb r3, [r4, #0xc]
	ldr r0, [r4]
	ldr r1, [r4, #0x10]
	ldr r2, [r4, #0x14]
	bl ov96_021EAD88
	add r0, r4, #0
	add r0, #0x34
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FA98C
	ldr r6, _021FAACC ; =0x0221DC2C
	ldr r0, _021FAADC ; =0x000008A8
	ldrb r1, [r6, r5]
	bl sub_0200606C
	ldr r1, _021FAAD4 ; =0x0221DC28
	ldrb r0, [r6, r5]
	ldrsb r1, [r1, r5]
	bl sub_020061D0
_021FA98C:
	add r0, r4, #0
	mov r1, #0
	bl ov96_021FB8B4
	mov r0, #0
	strh r0, [r4, #0x3c]
	strh r0, [r4, #0x3e]
	b _021FAA6A
_021FA99C:
	sub r0, r0, #5
	cmp r1, r0
	bge _021FAA6A
	mov r0, #0
	strh r0, [r4, #0x3c]
	b _021FAA6A
_021FA9A8:
	bl GF_AssertFail
	b _021FAA6A
_021FA9AE:
	ldrb r0, [r4, #0xc]
	add r0, r0, #1
	strb r0, [r4, #0xc]
	ldrb r0, [r4, #0xd]
	cmp r0, #0
	bne _021FA9F4
	ldrb r0, [r4, #0xe]
	cmp r0, #4
	bhi _021FA9EC
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FA9CC: ; jump table
	.short _021FA9EC - _021FA9CC - 2 ; case 0
	.short _021FA9D6 - _021FA9CC - 2 ; case 1
	.short _021FA9E2 - _021FA9CC - 2 ; case 2
	.short _021FA9DC - _021FA9CC - 2 ; case 3
	.short _021FA9E8 - _021FA9CC - 2 ; case 4
_021FA9D6:
	mov r0, #3
	strb r0, [r4, #0xe]
	b _021FA9EC
_021FA9DC:
	mov r0, #2
	strb r0, [r4, #0xe]
	b _021FA9EC
_021FA9E2:
	mov r0, #4
	strb r0, [r4, #0xe]
	b _021FA9EC
_021FA9E8:
	mov r0, #1
	strb r0, [r4, #0xe]
_021FA9EC:
	ldrb r1, [r4, #0xe]
	ldr r0, [r4]
	bl ov96_021EAC0C
_021FA9F4:
	ldrb r0, [r4, #0xd]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r2, r1
	strb r0, [r4, #0xd]
	ldrb r0, [r4, #0xc]
	cmp r0, #0x1e
	bls _021FAA6A
	mov r0, #0
	strb r0, [r4, #0xc]
	str r0, [r4, #4]
	str r0, [r4, #8]
	ldr r0, [r4]
	mov r1, #1
	bl ov96_021EAC0C
	b _021FAA6A
_021FAA1E:
	ldr r1, [r4, #0x18]
	mov r0, #0
	cmp r1, #0x78
	bge _021FAA36
	add r0, r1, #1
	mov r2, #1
	cmp r0, #0x78
	ble _021FAA32
	add r2, r1, #0
	sub r2, #0x78
_021FAA32:
	mov r0, #1
	b _021FAA46
_021FAA36:
	ble _021FAA46
	sub r2, r0, #1
	sub r0, r1, #1
	cmp r0, #0x78
	bge _021FAA44
	mov r0, #0x78
	sub r2, r0, r1
_021FAA44:
	mov r0, #1
_021FAA46:
	cmp r0, #0
	beq _021FAA6A
	ldr r0, [r4, #0x18]
	mov r3, #1
	add r0, r0, r2
	str r0, [r4, #0x18]
	ldr r0, [r4, #0x1c]
	mov r1, #0
	add r0, r0, r2
	str r0, [r4, #0x1c]
	str r3, [sp]
	ldr r0, [r4]
	bl ov96_021EAED4
	b _021FAA6A
_021FAA64:
	mov r0, #0
	strh r0, [r4, #0x3c]
	strh r0, [r4, #0x3e]
_021FAA6A:
	ldr r0, [r4, #0x20]
	bl ov96_021EB5B8
	add r5, r0, #0
	bl sub_020248AC
	add r6, r0, #0
	add r3, sp, #0x18
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r4, #0x1c]
	lsl r0, r0, #0xc
	str r0, [sp, #0x1c]
	add r0, r5, #0
	bl sub_020247D4
	ldr r0, [r4]
	add r1, sp, #8
	add r2, sp, #4
	bl ov96_021EAE9C
	ldr r0, [r4, #0x28]
	bl ov96_021EB5B8
	add r4, r0, #0
	bl sub_020248AC
	add r5, r0, #0
	add r3, sp, #0xc
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [sp, #4]
	lsl r0, r0, #0xc
	str r0, [sp, #0x10]
	add r0, r4, #0
	bl sub_020247D4
	add sp, #0x24
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021FAAC8: .word 0x0221C55C
_021FAACC: .word 0x0221DC2C
_021FAAD0: .word 0x000008AA
_021FAAD4: .word 0x0221DC28
_021FAAD8: .word 0x0221C589
_021FAADC: .word 0x000008A8
	thumb_func_end ov96_021FA83C

	thumb_func_start ov96_021FAAE0
ov96_021FAAE0: ; 0x021FAAE0
	push {r4, r5}
	add r4, r0, r1
	mov r3, #2
	sub r1, r0, r1
	mov r0, #6
	ldrsh r3, [r2, r3]
	ldrsh r0, [r2, r0]
	mov r5, #0
	add r0, r3, r0
	cmp r1, r0
	bgt _021FAAFC
	cmp r3, r4
	bgt _021FAAFC
	mov r5, #1
_021FAAFC:
	add r0, r5, #0
	pop {r4, r5}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FAAE0

	thumb_func_start ov96_021FAB04
ov96_021FAB04: ; 0x021FAB04
	push {r3, r4}
	mov r2, #2
	ldrsh r3, [r1, r2]
	mov r2, #6
	ldrsh r1, [r1, r2]
	mov r4, #0
	add r1, r3, r1
	cmp r0, r1
	blt _021FAB1E
	sub r0, #0x18
	cmp r0, r1
	bge _021FAB1E
	mov r4, #1
_021FAB1E:
	add r0, r4, #0
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021FAB04

	thumb_func_start ov96_021FAB24
ov96_021FAB24: ; 0x021FAB24
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r1, #0
	ldr r1, [r4, #0x1c]
	add r5, r0, #0
	cmp r1, #0
	beq _021FAB42
	cmp r1, #1
	bne _021FAB38
	b _021FAC6C
_021FAB38:
	cmp r1, #2
	bne _021FAB3E
	b _021FADBE
_021FAB3E:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
_021FAB42:
	ldrh r1, [r4]
	cmp r1, #0x70
	bhs _021FAB4A
	b _021FAF10
_021FAB4A:
	mov r2, #2
	lsl r1, r2, #9
	add r1, r2, r1
	lsl r1, r1, #0x10
	lsr r7, r1, #0x10
	mov r1, #0x32
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	str r2, [sp, #8]
	mov r1, #0x10
	str r1, [sp, #0xc]
	ldrh r1, [r4, #0x14]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, r3, #2
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	mov r0, #0x32
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrh r1, [r4, #0x14]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, r3, #3
	lsl r3, r3, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	mov r0, #0x32
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrh r1, [r4, #0x14]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, #9
	lsl r3, r3, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	add r2, r7, #0
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	mov r0, #0x32
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r2, #2
	str r2, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrh r1, [r4, #0x16]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, r3, #2
	lsl r3, r3, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	mov r0, #0x32
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrh r1, [r4, #0x16]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, r3, #3
	lsl r3, r3, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	mov r0, #0x32
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrh r1, [r4, #0x16]
	ldrb r6, [r4, #0x18]
	mov r3, #0xa
	lsl r1, r1, #0x18
	mul r3, r6
	add r3, #9
	lsl r3, r3, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	add r2, r7, #0
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	mov r0, #1
	str r0, [r4, #0x1c]
	mov r0, #0xff
	add sp, #0x10
	strb r0, [r4, #0x1a]
	pop {r3, r4, r5, r6, r7, pc}
_021FAC6C:
	ldrh r1, [r4]
	ldr r0, _021FAF14 ; =0x00000E48
	sub r1, #0x10
	cmp r1, r0
	bge _021FAC78
	b _021FAF10
_021FAC78:
	asr r0, r1, #2
	lsr r0, r0, #0x1d
	add r0, r1, r0
	asr r0, r0, #3
	lsr r1, r0, #0x1f
	lsl r0, r0, #0x1a
	sub r0, r0, r1
	mov r2, #0x1a
	ror r0, r2
	add r1, r1, r0
	mov r0, #0x40
	sub r0, r0, r1
	lsr r1, r0, #0x1f
	lsl r0, r0, #0x1a
	sub r0, r0, r1
	ror r0, r2
	add r0, r1, r0
	sub r0, r0, #2
	bpl _021FACA0
	add r0, #0x40
_021FACA0:
	strb r0, [r4, #0x1b]
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x60
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #2
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x61
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #3
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x62
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, #9
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x60
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #2
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x61
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #3
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #0x62
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, #9
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	mov r0, #2
	add sp, #0x10
	str r0, [r4, #0x1c]
	pop {r3, r4, r5, r6, r7, pc}
_021FADBE:
	ldrh r1, [r4]
	ldr r0, _021FAF18 ; =0x00001048
	sub r1, #0x10
	cmp r1, r0
	bge _021FADCA
	b _021FAF10
_021FADCA:
	asr r0, r1, #2
	lsr r0, r0, #0x1d
	add r0, r1, r0
	asr r0, r0, #3
	lsr r1, r0, #0x1f
	lsl r0, r0, #0x1a
	sub r0, r0, r1
	mov r2, #0x1a
	ror r0, r2
	add r1, r1, r0
	mov r0, #0x40
	sub r0, r0, r1
	lsr r1, r0, #0x1f
	lsl r0, r0, #0x1a
	sub r0, r0, r1
	ror r0, r2
	add r0, r1, r0
	sub r0, r0, #2
	bpl _021FADF2
	add r0, #0x40
_021FADF2:
	mov r2, #2
	strb r0, [r4, #0x1b]
	lsl r0, r2, #9
	add r0, r2, r0
	lsl r0, r0, #0x10
	lsr r7, r0, #0x10
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	str r2, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #2
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #3
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #3
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	add r2, r7, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	mul r3, r6
	add r3, #9
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r2, #2
	mov r3, #0xa
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	str r2, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #2
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	mov r2, #3
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, r3, #3
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrb r0, [r4, #0x1b]
	mov r3, #0xa
	add r2, r7, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	ldrb r6, [r4, #0x18]
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	mul r3, r6
	add r3, #9
	lsl r1, r1, #0x18
	lsl r3, r3, #0x18
	lsr r1, r1, #0x18
	lsr r3, r3, #0x18
	bl FillBgTilemapRect
	ldrh r1, [r4, #0x14]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	ldrh r1, [r4, #0x16]
	add r0, r5, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ScheduleBgTilemapBufferTransfer
	mov r0, #3
	str r0, [r4, #0x1c]
_021FAF10:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FAF14: .word 0x00000E48
_021FAF18: .word 0x00001048
	thumb_func_end ov96_021FAB24

	thumb_func_start ov96_021FAF1C
ov96_021FAF1C: ; 0x021FAF1C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	add r4, r0, #0
	bl ov96_021E8A20
	mov r7, #0x23
	add r3, r0, #0
	mov r1, #0
	add r2, r5, #0
	mov r0, #1
	lsl r7, r7, #4
_021FAF40:
	add r6, r2, #0
	add r6, #0xe0
	ldrh r6, [r6]
	strh r6, [r3]
	add r6, r2, #0
	add r6, #0xe8
	ldrb r6, [r6]
	cmp r6, #0
	beq _021FAF5E
	ldrh r6, [r3, #0x10]
	cmp r6, #0
	bne _021FAF5E
	strh r0, [r3, #0x10]
	ldr r6, [r5, r7]
	strh r6, [r3, #0xa]
_021FAF5E:
	add r1, r1, #1
	add r2, #0x6c
	add r3, r3, #2
	cmp r1, #3
	blt _021FAF40
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FAFF0
	add r0, r4, #0
	add r0, #0x28
	mov r7, #0
	bl ov96_021E8A20
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0x50
	bl ov96_021E8A20
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E8A20
	mov r2, #0x12
_021FAF90:
	ldrh r1, [r0]
	add r0, r0, #2
	strh r1, [r5]
	add r5, r5, #2
	sub r2, r2, #1
	bne _021FAF90
	mov r0, #0
	ldr r5, [sp, #8]
	str r0, [sp, #4]
	add r4, #0x50
_021FAFA4:
	add r0, r4, #0
	bl ov96_021E8A20
	add r6, r0, #0
	mov r1, #0
	add r2, r6, #0
	add r3, r5, #0
_021FAFB2:
	ldrh r0, [r2]
	add r1, r1, #1
	add r2, r2, #2
	strh r0, [r3, #4]
	add r3, r3, #2
	cmp r1, #3
	blt _021FAFB2
	ldrb r0, [r6, #9]
	cmp r0, #0
	beq _021FAFCC
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
_021FAFCC:
	ldr r0, [sp, #4]
	add r4, #0x28
	add r0, r0, #1
	add r5, r5, #6
	str r0, [sp, #4]
	cmp r0, #4
	blt _021FAFA4
	ldr r0, [sp]
	bl ov96_021E5D34
	cmp r7, r0
	bne _021FAFEA
	ldr r0, [sp, #8]
	mov r1, #1
	str r1, [r0]
_021FAFEA:
	ldr r0, [sp]
	bl ov96_021FB400
_021FAFF0:
	ldr r0, [sp]
	bl ov96_021FB0F4
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FAF1C

	thumb_func_start ov96_021FAFFC
ov96_021FAFFC: ; 0x021FAFFC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xa0
	str r0, [sp]
	add r7, r1, #0
	mov r0, #0
	add r1, sp, #0x10
	str r1, [sp, #8]
	str r0, [sp, #4]
	add r1, sp, #4
	strh r0, [r1, #8]
	strh r0, [r1, #0xa]
_021FB012:
	add r2, r0, #1
	mov r1, #0xc
	add r3, sp, #4
	mul r1, r2
	add r2, r3, r1
	lsr r1, r0, #0x1f
	add r1, r0, r1
	lsl r1, r1, #0x17
	lsr r1, r1, #0x18
	add r1, r7, r1
	ldrb r6, [r1, #0x1c]
	lsr r5, r0, #0x1f
	lsl r4, r0, #0x1f
	sub r4, r4, r5
	mov r1, #0x1f
	ror r4, r1
	add r1, r5, r4
	lsl r1, r1, #0x18
	lsr r1, r1, #0x16
	add r4, r6, #0
	asr r4, r1
	mov r1, #0xf
	and r1, r4
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	strh r1, [r2, #8]
	mov r1, #0
	strh r0, [r2, #0xa]
	str r1, [r2, #4]
	cmp r0, #0
	ble _021FB088
	ldrh r4, [r2, #8]
	ldrh r5, [r2, #0xa]
_021FB054:
	ldr r3, [r3, #4]
	ldrh r6, [r3, #8]
	cmp r6, r4
	bls _021FB06A
	ldr r4, [r3]
	str r2, [r4, #4]
	ldr r4, [r3]
	str r4, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _021FB088
_021FB06A:
	cmp r6, r4
	bne _021FB082
	ldrh r6, [r3, #0xa]
	cmp r6, r5
	bls _021FB082
	ldr r4, [r3]
	str r2, [r4, #4]
	ldr r4, [r3]
	str r4, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _021FB088
_021FB082:
	add r1, r1, #1
	cmp r1, r0
	blt _021FB054
_021FB088:
	cmp r1, r0
	bne _021FB090
	str r2, [r3, #4]
	str r3, [r2]
_021FB090:
	add r0, r0, #1
	cmp r0, #0xc
	blt _021FB012
	mov r1, #0x8a
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	mov r1, #1
	bl ov96_021FC2B4
	add r4, sp, #4
	mov r7, #0
	mov r5, #0x10
_021FB0AA:
	ldr r4, [r4, #4]
	ldrh r0, [r4, #8]
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #8
	bls _021FB0B8
	mov r6, #8
_021FB0B8:
	mov r0, #0x8a
	ldr r1, [sp]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldrh r1, [r4, #0xa]
	add r2, r5, #0
	bl ov96_021FC248
	mov r0, #0x8a
	ldr r1, [sp]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldrh r1, [r4, #0xa]
	add r2, r6, #0
	bl ov96_021FC28C
	mov r0, #0x8a
	ldr r1, [sp]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldrh r1, [r4, #0xa]
	mov r2, #1
	bl ov96_021FC2E0
	add r7, r7, #1
	add r5, #0x20
	cmp r7, #0xc
	blt _021FB0AA
	add sp, #0xa0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FAFFC

	thumb_func_start ov96_021FB0F4
ov96_021FB0F4: ; 0x021FB0F4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x3c
	str r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #4]
	ldr r0, [sp]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #8]
	ldr r2, _021FB3EC ; =0x000003C7
	ldr r0, [sp, #4]
	ldrb r0, [r0, r2]
	cmp r0, #0
	beq _021FB124
	ldr r0, [sp, #4]
	sub r1, r2, #3
	ldrh r0, [r0, r1]
	add r3, r0, #1
	ldr r0, [sp, #4]
	strh r3, [r0, r1]
_021FB124:
	ldr r0, _021FB3F0 ; =0x000003C6
	ldr r1, [sp, #4]
	ldrb r1, [r1, r0]
	cmp r1, #0
	bne _021FB21E
	ldr r1, [sp, #4]
	sub r2, r0, #2
	ldrh r1, [r1, r2]
	cmp r1, #0x96
	blo _021FB21C
	ldr r1, [sp, #4]
	mov r3, #0
	strh r3, [r1, r2]
	mov r2, #1
	strb r2, [r1, r0]
	add r0, r1, #0
	ldr r1, [sp, #8]
	bl ov96_021FAFFC
	mov r4, #0
_021FB14C:
	mov r0, #0x6c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #4]
	add r5, r0, r1
	mov r0, #0x4a
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl ov96_021EB5B8
	add r7, r0, #0
	mov r0, #0x4a
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r1, r0, #1
	add r0, r0, r1
	add r1, r4, r0
	lsr r0, r1, #0x1f
	add r0, r1, r0
	lsl r0, r0, #0x17
	lsr r6, r0, #0x18
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r1, r0, #1
	add r0, r0, r1
	add r0, r4, r0
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	lsl r1, r0, #0x18
	ldr r0, [sp, #8]
	add r0, r0, r6
	ldrb r2, [r0, #0x1c]
	lsr r0, r1, #0x16
	add r1, r2, #0
	asr r1, r0
	mov r0, #0xf
	and r0, r1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	beq _021FB1B8
	cmp r6, #0xc
	bls _021FB1BC
_021FB1B8:
	bl GF_AssertFail
_021FB1BC:
	mov r1, #0xff
	mov r0, #0x51
	lsl r1, r1, #0x16
	lsl r0, r0, #2
	str r1, [r5, r0]
	mov r1, #0x51
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r5, r1]
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0x30]
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r5, r1]
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0x34]
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r5, r1]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x38]
	mov r0, #0x52
	lsl r0, r0, #2
	strh r6, [r5, r0]
	add r0, r7, #0
	add r1, sp, #0x30
	bl sub_020247F4
	add r0, r7, #0
	sub r1, r6, #1
	bl sub_020248F0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021FB14C
_021FB21C:
	b _021FB348
_021FB21E:
	ldr r1, [sp, #4]
	sub r2, r0, #2
	ldrh r1, [r1, r2]
	cmp r1, #0x1e
	bhs _021FB22A
	b _021FB348
_021FB22A:
	sub r1, r0, #2
	ldr r0, [sp, #4]
	mov r2, #0
	strh r2, [r0, r1]
	ldr r1, [sp, #8]
	bl ov96_021FAFFC
	mov r7, #0
_021FB23A:
	mov r0, #0x6c
	add r1, r7, #0
	mul r1, r0
	ldr r0, [sp, #4]
	add r4, r0, r1
	mov r0, #0x4a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	add r6, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r1, r0, #1
	add r0, r0, r1
	add r1, r7, r0
	lsr r0, r1, #0x1f
	add r0, r1, r0
	lsl r0, r0, #0x17
	lsr r5, r0, #0x18
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r1, r0, #1
	add r0, r0, r1
	add r0, r7, r0
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	lsl r1, r0, #0x18
	ldr r0, [sp, #8]
	add r0, r0, r5
	ldrb r2, [r0, #0x1c]
	lsr r0, r1, #0x16
	add r1, r2, #0
	asr r1, r0
	mov r0, #0xf
	and r0, r1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	beq _021FB298
	cmp r5, #0xc
	bls _021FB29C
_021FB298:
	bl GF_AssertFail
_021FB29C:
	add r0, r4, #0
	add r0, #0xe8
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FB2D2
	add r0, r6, #0
	bl sub_020248AC
	add r3, r0, #0
	add r2, sp, #0x24
	ldmia r3!, {r0, r1}
	mov ip, r2
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, ip
	str r0, [r2]
	mov r0, #0x4e
	lsl r0, r0, #0xe
	str r0, [sp, #0x28]
	add r0, r6, #0
	bl sub_020247D4
	add r1, r5, #0
	add r0, r6, #0
	add r1, #0xb
	bl sub_020248F0
_021FB2D2:
	mov r0, #0x52
	lsl r0, r0, #2
	ldrsh r0, [r4, r0]
	cmp r5, r0
	beq _021FB33C
	mov r0, #0x52
	lsl r0, r0, #2
	strh r5, [r4, r0]
	add r0, r4, #0
	add r0, #0xe8
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FB33C
	mov r1, #0xff
	mov r0, #0x51
	lsl r1, r1, #0x16
	lsl r0, r0, #2
	str r1, [r4, r0]
	mov r1, #0x51
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r4, r1]
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0x18]
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r4, r1]
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0x1c]
	lsl r1, r1, #2
	ldr r0, _021FB3F4 ; =0x45800000
	ldr r1, [r4, r1]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x20]
	add r0, r6, #0
	add r1, sp, #0x18
	bl sub_020247F4
	add r0, r6, #0
	sub r1, r5, #1
	bl sub_020248F0
_021FB33C:
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #3
	bhs _021FB348
	b _021FB23A
_021FB348:
	ldr r7, _021FB3F4 ; =0x45800000
	mov r5, #0
_021FB34C:
	mov r0, #0x6c
	add r1, r5, #0
	mul r1, r0
	ldr r0, [sp, #4]
	add r4, r0, r1
	mov r0, #0x4a
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	add r6, r0, #0
	bl sub_020248B0
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0xc
	cmp r1, r0
	ble _021FB38E
	mov r0, #0x51
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl _f2d
	ldr r2, _021FB3F8 ; =0x9999999A
	ldr r3, _021FB3FC ; =0x3FB99999
	bl _dsub
	bl _d2f
	mov r1, #0x51
	lsl r1, r1, #2
	str r0, [r4, r1]
	b _021FB398
_021FB38E:
	mov r1, #0xfe
	mov r0, #0x51
	lsl r1, r1, #0x16
	lsl r0, r0, #2
	str r1, [r4, r0]
_021FB398:
	mov r1, #0x51
	lsl r1, r1, #2
	ldr r1, [r4, r1]
	add r0, r7, #0
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0xc]
	lsl r1, r1, #2
	ldr r1, [r4, r1]
	add r0, r7, #0
	bl _fmul
	bl _ftoi
	mov r1, #0x51
	str r0, [sp, #0x10]
	lsl r1, r1, #2
	ldr r1, [r4, r1]
	add r0, r7, #0
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x14]
	add r0, r6, #0
	add r1, sp, #0xc
	bl sub_020247F4
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #3
	blo _021FB34C
	ldr r0, [sp, #4]
	bl ov96_021FB994
	add sp, #0x3c
	pop {r4, r5, r6, r7, pc}
	nop
_021FB3EC: .word 0x000003C7
_021FB3F0: .word 0x000003C6
_021FB3F4: .word 0x45800000
_021FB3F8: .word 0x9999999A
_021FB3FC: .word 0x3FB99999
	thumb_func_end ov96_021FB0F4

	thumb_func_start ov96_021FB400
ov96_021FB400: ; 0x021FB400
	push {r4, r5, r6, r7, lr}
	sub sp, #0x11c
	bl ov96_021E5F54
	str r0, [sp, #8]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0x14]
	mov r0, #0
	str r0, [sp, #0x10]
	str r0, [sp, #0x18]
	add r0, sp, #0x2c
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x10]
	add r1, sp, #0x18
	strh r0, [r1, #8]
	strh r0, [r1, #0xa]
	strh r0, [r1, #0xc]
	strh r0, [r1, #0xe]
	str r0, [sp, #0x28]
	ldr r0, [sp, #8]
	add r0, #0x50
	str r0, [sp, #8]
	ldr r0, [sp, #0x10]
	str r0, [sp, #4]
_021FB434:
	ldr r0, [sp, #8]
	bl ov96_021E8A20
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #0xc]
_021FB440:
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #4]
	add r5, sp, #0x18
	add r7, r1, r0
	add r1, r7, #1
	mov r0, #0x14
	add r2, r1, #0
	mul r2, r0
	add r0, sp, #0x18
	add r4, r0, r2
	ldr r0, [sp]
	ldrh r0, [r0]
	strh r0, [r4, #8]
	ldr r0, [sp]
	ldrh r0, [r0, #0xa]
	strh r0, [r4, #0xc]
	ldr r0, [sp]
	strh r7, [r4, #0xa]
	ldrh r0, [r0, #0x10]
	strh r0, [r4, #0xe]
	mov r0, #0
	str r0, [r4, #0x10]
	add r6, r0, #0
	str r0, [r4, #4]
	cmp r7, #0
	ble _021FB498
_021FB474:
	ldrh r0, [r4, #0xe]
	ldr r5, [r5, #4]
	cmp r0, #0
	beq _021FB486
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021FB514
	b _021FB48E
_021FB486:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021FB56C
_021FB48E:
	cmp r0, #0
	bne _021FB498
	add r6, r6, #1
	cmp r6, r7
	blt _021FB474
_021FB498:
	cmp r6, r7
	bne _021FB4A0
	str r4, [r5, #4]
	str r5, [r4]
_021FB4A0:
	ldr r0, [sp]
	add r0, r0, #2
	str r0, [sp]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #3
	blt _021FB440
	ldr r0, [sp, #8]
	add r0, #0x28
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r0, r0, #3
	str r0, [sp, #4]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	blt _021FB434
	mov r7, #0
	add r5, sp, #0x18
	mov r4, #1
	add r1, r7, #0
	add r6, r7, #0
_021FB4D0:
	ldr r0, [sp, #0x14]
	add r0, r0, r1
	add r1, r1, #1
	strb r6, [r0, #0x1c]
	cmp r1, #6
	blt _021FB4D0
_021FB4DC:
	ldr r5, [r5, #4]
	cmp r5, #0
	bne _021FB4E6
	bl GF_AssertFail
_021FB4E6:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	bne _021FB4F6
	add r0, r7, r4
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	mov r4, #1
	b _021FB4FC
_021FB4F6:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_021FB4FC:
	ldrh r1, [r5, #0xa]
	ldr r0, [sp, #0x14]
	add r2, r7, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021FB5C8
	add r6, r6, #1
	cmp r6, #0xc
	blt _021FB4DC
	add sp, #0x11c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FB400

	thumb_func_start ov96_021FB514
ov96_021FB514: ; 0x021FB514
	ldrh r2, [r1, #0xe]
	cmp r2, #0
	beq _021FB556
	ldrh r3, [r0, #0xc]
	ldrh r2, [r1, #0xc]
	cmp r2, r3
	bls _021FB532
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	bx lr
_021FB532:
	cmp r2, r3
	bne _021FB566
	ldrh r3, [r1, #0xa]
	ldrh r2, [r0, #0xa]
	cmp r3, r2
	bls _021FB550
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	str r0, [r1, #0x10]
	bx lr
_021FB550:
	mov r1, #1
	str r1, [r0, #0x10]
	b _021FB566
_021FB556:
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	bx lr
_021FB566:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FB514

	thumb_func_start ov96_021FB56C
ov96_021FB56C: ; 0x021FB56C
	ldrh r3, [r0, #8]
	ldrh r2, [r1, #8]
	cmp r2, r3
	bhs _021FB584
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	bx lr
_021FB584:
	cmp r2, r3
	bne _021FB5C2
	ldrh r3, [r0, #0xc]
	ldrh r2, [r1, #0xc]
	cmp r2, r3
	bls _021FB5A0
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	bx lr
_021FB5A0:
	cmp r2, r3
	bne _021FB5C2
	ldrh r3, [r1, #0xa]
	ldrh r2, [r0, #0xa]
	cmp r3, r2
	bls _021FB5BE
	ldr r2, [r1]
	str r0, [r2, #4]
	ldr r2, [r1]
	str r2, [r0]
	str r1, [r0, #4]
	str r0, [r1]
	mov r0, #1
	str r0, [r1, #0x10]
	bx lr
_021FB5BE:
	mov r1, #1
	str r1, [r0, #0x10]
_021FB5C2:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FB56C

	thumb_func_start ov96_021FB5C8
ov96_021FB5C8: ; 0x021FB5C8
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	cmp r4, #0xc
	blo _021FB5D8
	bl GF_AssertFail
_021FB5D8:
	cmp r6, #0
	beq _021FB5E0
	cmp r6, #0xc
	bls _021FB5E4
_021FB5E0:
	bl GF_AssertFail
_021FB5E4:
	lsr r7, r4, #0x1f
	lsl r3, r4, #0x1f
	sub r3, r3, r7
	mov r2, #0x1f
	ror r3, r2
	add r2, r7, r3
	lsl r2, r2, #0x18
	lsl r0, r4, #0x17
	lsr r2, r2, #0x16
	add r3, r6, #0
	lsl r3, r2
	lsl r2, r3, #0x18
	add r5, #0x1c
	lsr r1, r0, #0x18
	ldrb r0, [r5, r1]
	lsr r2, r2, #0x18
	orr r0, r2
	strb r0, [r5, r1]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FB5C8

	thumb_func_start ov96_021FB60C
ov96_021FB60C: ; 0x021FB60C
	push {r3, r4}
	mov r4, #0
	mov r1, #0x42
	add r3, r4, #0
	lsl r1, r1, #2
_021FB616:
	ldr r2, [r0, r1]
	cmp r2, #4
	bne _021FB624
	add r3, r3, #1
	add r0, #0x6c
	cmp r3, #3
	blt _021FB616
_021FB624:
	cmp r3, #3
	bne _021FB62A
	mov r4, #1
_021FB62A:
	add r0, r4, #0
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021FB60C

	thumb_func_start ov96_021FB630
ov96_021FB630: ; 0x021FB630
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	str r0, [sp, #8]
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FB6B0
	ldr r0, [sp, #8]
	bl ov96_021E5F54
	add r4, r0, #0
	ldr r0, [sp, #8]
	bl ov96_021E5DC4
	str r0, [sp, #0x18]
	ldr r0, [sp, #8]
	bl ov96_021E5D34
	str r0, [sp, #0x14]
	str r0, [sp, #0x10]
	cmp r0, #4
	bge _021FB6B0
	mov r1, #0x28
	add r4, #0x50
	mul r1, r0
	add r0, r4, r1
	str r0, [sp, #0xc]
_021FB666:
	ldr r0, [sp, #0xc]
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r1, [sp, #0x10]
	ldr r0, [sp, #0x14]
	mov r4, #0
	sub r1, r1, r0
	lsl r0, r1, #1
	add r5, r1, r0
	ldr r0, [sp, #0x10]
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
_021FB680:
	lsl r0, r4, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	lsl r0, r5, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	add r2, r7, #0
	add r3, r6, #0
	bl ov96_021FBA3C
	add r4, r4, #1
	add r5, r5, #1
	cmp r4, #3
	blt _021FB680
	ldr r0, [sp, #0xc]
	add r0, #0x28
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	blt _021FB666
_021FB6B0:
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FB630

	thumb_func_start ov96_021FB6B4
ov96_021FB6B4: ; 0x021FB6B4
	mov r3, #0x15
	lsl r3, r3, #4
	add r1, r1, r3
	add r0, #0xd8
	ldr r3, _021FB6C4 ; =ov96_021FC0FC
	ldr r0, [r0]
	bx r3
	nop
_021FB6C4: .word ov96_021FC0FC
	thumb_func_end ov96_021FB6B4

	thumb_func_start ov96_021FB6C8
ov96_021FB6C8: ; 0x021FB6C8
	push {r3, r4, r5, lr}
	sub sp, #0x18
	ldr r3, _021FB780 ; =0x0221C428
	add r5, r0, #0
	add r4, r1, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0xc
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [r4, #0x28]
	cmp r1, #1
	beq _021FB77A
	ldrb r0, [r4, #8]
	cmp r0, #0
	bne _021FB77A
	cmp r1, #2
	bne _021FB6F0
	mov r0, #0x18
	b _021FB726
_021FB6F0:
	ldrb r0, [r4, #9]
	cmp r0, #4
	bhi _021FB720
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FB702: ; jump table
	.short _021FB70C - _021FB702 - 2 ; case 0
	.short _021FB710 - _021FB702 - 2 ; case 1
	.short _021FB714 - _021FB702 - 2 ; case 2
	.short _021FB718 - _021FB702 - 2 ; case 3
	.short _021FB71C - _021FB702 - 2 ; case 4
_021FB70C:
	mov r0, #8
	b _021FB726
_021FB710:
	mov r0, #6
	b _021FB726
_021FB714:
	mov r0, #6
	b _021FB726
_021FB718:
	mov r0, #6
	b _021FB726
_021FB71C:
	mov r0, #4
	b _021FB726
_021FB720:
	bl GF_AssertFail
	mov r0, #8
_021FB726:
	add r1, r4, #0
	add r1, #0x6a
	ldrh r1, [r1]
	add r2, r1, #1
	add r1, r4, #0
	add r1, #0x6a
	strh r2, [r1]
	add r1, r4, #0
	add r1, #0x6a
	ldrh r1, [r1]
	cmp r1, r0
	blt _021FB77A
	add r0, sp, #0
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r4, #0
	add r0, #0x6a
	strh r1, [r0]
	bl LCRandom
	mov r1, #7
	bl _s32_div_f
	ldrb r0, [r4, #0x18]
	add r5, #0xdc
	lsl r2, r0, #2
	add r0, sp, #0xc
	ldr r2, [r0, r2]
	sub r0, r1, #3
	add r0, r2, r0
	lsl r0, r0, #0xc
	str r0, [sp]
	mov r0, #0x62
	lsl r0, r0, #0xe
	str r0, [sp, #4]
	ldrb r1, [r4, #0x18]
	ldr r0, [r5]
	add r2, sp, #0
	bl ov96_021FC698
_021FB77A:
	add sp, #0x18
	pop {r3, r4, r5, pc}
	nop
_021FB780: .word 0x0221C428
	thumb_func_end ov96_021FB6C8

	thumb_func_start ov96_021FB784
ov96_021FB784: ; 0x021FB784
	push {r4, r5, r6}
	sub sp, #0xc
	ldr r6, _021FB7C4 ; =0x0221C41C
	add r4, r1, #0
	ldmia r6!, {r0, r1}
	add r5, sp, #0
	add r3, r5, #0
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	str r0, [r5]
	mov r0, #0
_021FB79A:
	lsl r1, r0, #2
	ldr r1, [r3, r1]
	sub r1, #0x18
	cmp r1, r4
	bge _021FB7B2
	add r1, #0x30
	cmp r4, r1
	bge _021FB7B2
	cmp r2, #0x58
	ble _021FB7B2
	cmp r2, #0xa8
	blt _021FB7BE
_021FB7B2:
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #3
	blo _021FB79A
	mov r0, #3
_021FB7BE:
	add sp, #0xc
	pop {r4, r5, r6}
	bx lr
	.balign 4, 0
_021FB7C4: .word 0x0221C41C
	thumb_func_end ov96_021FB784

	thumb_func_start ov96_021FB7C8
ov96_021FB7C8: ; 0x021FB7C8
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r4, #4]
	ldr r2, _021FB804 ; =0x0221C3FC
	add r1, #8
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4, #4]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	add r4, #8
	add r0, r4, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	add sp, #4
	pop {r3, r4, pc}
	nop
_021FB804: .word 0x0221C3FC
	thumb_func_end ov96_021FB7C8

	thumb_func_start ov96_021FB808
ov96_021FB808: ; 0x021FB808
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r2, _021FB8AC ; =0x00000135
	add r6, r1, #0
	ldr r3, [r5]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r7, r0, #0
	ldr r0, [r5]
	bl ScrStrBufs_new
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r1, #0
	add r2, r0, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	add r0, r4, #0
	mov r3, #3
	bl BufferIntegerAsString
	add r0, r6, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r0, #0xa
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	add r2, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r1, #1
	str r1, [sp, #4]
	add r0, r4, #0
	add r3, r1, #0
	bl BufferIntegerAsString
	ldr r3, [r5]
	add r0, r4, #0
	add r1, r7, #0
	mov r2, #0x9c
	bl ReadMsgData_ExpandPlaceholders
	add r6, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021FB8B0 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #8
	add r2, r6, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r6, #0
	bl String_dtor
	add r0, r4, #0
	bl ScrStrBufs_delete
	add r0, r7, #0
	bl DestroyMsgData
	add r5, #8
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FB8AC: .word 0x00000135
_021FB8B0: .word 0x000F0E00
	thumb_func_end ov96_021FB808

	thumb_func_start ov96_021FB8B4
ov96_021FB8B4: ; 0x021FB8B4
	push {r4, lr}
	add r4, r0, #0
	cmp r1, #0
	bge _021FB8BE
	mov r1, #0
_021FB8BE:
	add r0, r1, #0
	bl _dflt
	add r3, r1, #0
	mov r1, #1
	add r2, r0, #0
	mov r0, #0
	lsl r1, r1, #0x1e
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FB8F8 ; =0x40590000
	mov r0, #0
	bl _dadd
	ldr r3, _021FB8F8 ; =0x40590000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r0, #0
	ldr r0, [r4]
	add r2, r1, #0
	bl ov96_021EB10C
	pop {r4, pc}
	nop
_021FB8F8: .word 0x40590000
	thumb_func_end ov96_021FB8B4

	thumb_func_start ov96_021FB8FC
ov96_021FB8FC: ; 0x021FB8FC
	push {r3, r4, r5, lr}
	add r4, r0, #0
	cmp r1, #0
	beq _021FB934
	ldrb r0, [r4, #0xc]
	ldrh r1, [r4, #0x38]
	sub r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	sub r0, r1, r0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FB988 ; =0x40240000
	mov r0, #0
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FB98C ; =0x40590000
	mov r0, #0
	bl _dsub
	bl _d2f
	add r5, r0, #0
	b _021FB968
_021FB934:
	ldrb r0, [r4, #0xc]
	sub r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl _dfltu
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FB988 ; =0x40240000
	mov r0, #0
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FB98C ; =0x40590000
	mov r0, #0
	bl _dsub
	bl _d2f
	mov r1, #0
	add r5, r0, #0
	bl _fls
	bhs _021FB968
	ldr r5, _021FB990 ; =0x41200000
_021FB968:
	add r0, r5, #0
	bl _f2d
	ldr r3, _021FB98C ; =0x40590000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r0, #0
	ldr r0, [r4]
	add r2, r1, #0
	bl ov96_021EB10C
	pop {r3, r4, r5, pc}
	nop
_021FB988: .word 0x40240000
_021FB98C: .word 0x40590000
_021FB990: .word 0x41200000
	thumb_func_end ov96_021FB8FC

	thumb_func_start ov96_021FB994
ov96_021FB994: ; 0x021FB994
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r0, #0x8b
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #0x1e
	lsl r0, r0, #0x10
	lsr r6, r0, #0x10
	add r0, r6, #0
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r6, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x64
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r4, #0
	mov r1, #0x3c
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0xeb
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0x3c
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0xed
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	mov r0, #0xee
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0xf
	lsl r0, r0, #6
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021FB994

	thumb_func_start ov96_021FBA3C
ov96_021FBA3C: ; 0x021FBA3C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r6, r1, #0
	str r3, [sp, #8]
	add r7, r0, #0
	mov r0, #0x8e
	lsl r0, r0, #2
	add r1, sp, #0x18
	str r2, [sp, #4]
	ldrb r2, [r1, #0x14]
	mov r1, #0x28
	add r0, r6, r0
	mul r1, r2
	add r4, r0, r1
	ldr r0, [r4, #0x18]
	ldr r5, [sp, #0x28]
	cmp r0, #1
	beq _021FBA8C
	ldrb r0, [r4]
	cmp r0, #2
	beq _021FBA8C
	ldrb r0, [r4, #2]
	cmp r0, #0
	bne _021FBA8C
	ldr r0, [r4, #8]
	ldr r1, [r4, #0x10]
	bl _fls
	bhs _021FBA8C
	ldr r0, [r4, #8]
	ldr r1, [r4, #0x14]
	bl _fadd
	str r0, [r4, #8]
	ldr r1, [r4, #0x10]
	bl _fgr
	bls _021FBA8C
	ldr r0, [r4, #0x10]
	str r0, [r4, #8]
_021FBA8C:
	ldrb r0, [r4]
	cmp r0, #2
	bne _021FBAA4
	ldrb r0, [r4, #1]
	sub r0, r0, #1
	strb r0, [r4, #1]
	ldrb r0, [r4, #1]
	cmp r0, #0
	bne _021FBB50
	mov r0, #0
	strb r0, [r4]
	b _021FBB50
_021FBAA4:
	add r0, r6, #0
	add r0, #0xd8
	ldr r0, [r0]
	ldr r2, [r4, #0x20]
	add r1, r5, #0
	bl ov96_021FC164
	mov r1, #0
	mvn r1, r1
	str r0, [sp, #0xc]
	cmp r0, r1
	beq _021FBB50
	ldr r1, [r4, #0x24]
	cmp r1, r0
	beq _021FBB50
	bl LCRandom
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	ldrb r0, [r4, #3]
	cmp r1, r0
	bhs _021FBB14
	ldrb r0, [r4, #2]
	cmp r0, #4
	bhs _021FBAF2
	add r0, r0, #1
	strb r0, [r4, #2]
	ldrb r1, [r4, #2]
	ldr r0, [r4, #0x10]
	sub r1, r1, #1
	lsl r2, r1, #2
	ldr r1, _021FBBAC ; =0x0221C444
	ldr r1, [r1, r2]
	bl _fadd
	str r0, [r4, #8]
_021FBAF2:
	mov r0, #1
	str r0, [sp]
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r5, #0
	mov r3, #6
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r5, #0
	mov r3, #2
	bl ov96_021E8228
	b _021FBB4C
_021FBB14:
	ldrb r0, [r4, #4]
	cmp r1, r0
	bhs _021FBB3C
	mov r0, #2
	strb r0, [r4]
	mov r0, #0x1e
	strb r0, [r4, #1]
	mov r0, #0
	strb r0, [r4, #2]
	mov r0, #0x3f
	lsl r0, r0, #0x18
	str r0, [r4, #8]
	mov r3, #1
	str r3, [sp]
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r5, #0
	bl ov96_021E8228
	b _021FBB4C
_021FBB3C:
	mov r0, #1
	str r0, [sp]
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r5, #0
	mov r3, #2
	bl ov96_021E8228
_021FBB4C:
	ldr r0, [sp, #0xc]
	str r0, [r4, #0x24]
_021FBB50:
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	bl _fadd
	str r0, [sp, #0x10]
	bl _ftoi
	add r7, r0, #0
	bl _itof
	add r1, r0, #0
	ldr r0, [sp, #0x10]
	bl _fsub
	str r0, [r4, #0xc]
	ldr r0, [r4, #0x20]
	lsl r1, r5, #1
	add r2, r0, r7
	ldr r0, [sp, #4]
	str r2, [r4, #0x20]
	strh r2, [r0, r1]
	ldr r0, [r4, #0x18]
	cmp r0, #0
	bne _021FBBA6
	mov r0, #1
	ldr r2, [r4, #0x20]
	lsl r0, r0, #0xc
	cmp r2, r0
	blt _021FBBA6
	ldr r2, [sp, #4]
	mov r0, #1
	add r3, r2, r1
	mov r1, #0x23
	strh r0, [r3, #0x10]
	lsl r1, r1, #4
	ldr r2, [r6, r1]
	strh r2, [r3, #0xa]
	ldr r1, [r6, r1]
	str r1, [r4, #0x1c]
	str r0, [r4, #0x18]
	ldr r0, _021FBBB0 ; =0x000008A1
	bl PlaySE
_021FBBA6:
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_021FBBAC: .word 0x0221C444
_021FBBB0: .word 0x000008A1
	thumb_func_end ov96_021FBA3C

	thumb_func_start ov96_021FBBB4
ov96_021FBBB4: ; 0x021FBBB4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp]
	add r6, r1, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x10]
	ldr r0, [sp]
	bl ov96_021E5D34
	str r0, [sp, #4]
	cmp r0, #4
	bhs _021FBCAC
	str r0, [sp, #0xc]
_021FBBD0:
	ldr r1, [sp, #4]
	ldr r0, [sp, #0xc]
	mov r5, #0
	sub r1, r1, r0
	lsl r0, r1, #1
	add r0, r1, r0
	str r0, [sp, #8]
	mov r1, #0x8e
	ldr r0, [sp, #0x10]
	lsl r1, r1, #2
	add r0, r0, r1
	str r0, [sp, #0x14]
_021FBBE8:
	ldr r0, [sp, #8]
	add r0, r5, r0
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	add r2, r1, #0
	mov r0, #0x28
	mul r2, r0
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #4]
	add r4, r0, r2
	ldr r0, [sp]
	add r2, r5, #0
	bl ov96_021E60D8
	add r7, r0, #0
	ldrb r0, [r7, #1]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x3c]
	bl _itof
	ldr r1, _021FBCB0 ; =0x41200000
	bl _fdiv
	str r0, [r4, #0x10]
	ldrb r0, [r7, #4]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x28]
	bl _itof
	ldr r1, _021FBCB4 ; =0x42C80000
	bl _fdiv
	str r0, [r4, #0x14]
	bl LCRandom
	mov r1, #6
	bl _s32_div_f
	cmp r1, #5
	bhi _021FBC90
	add r0, r1, r1
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FBC48: ; jump table
	.short _021FBC54 - _021FBC48 - 2 ; case 0
	.short _021FBC5E - _021FBC48 - 2 ; case 1
	.short _021FBC68 - _021FBC48 - 2 ; case 2
	.short _021FBC72 - _021FBC48 - 2 ; case 3
	.short _021FBC7C - _021FBC48 - 2 ; case 4
	.short _021FBC86 - _021FBC48 - 2 ; case 5
_021FBC54:
	mov r0, #0xa
	strb r0, [r4, #3]
	mov r0, #0x32
	strb r0, [r4, #4]
	b _021FBC94
_021FBC5E:
	mov r0, #0x14
	strb r0, [r4, #3]
	mov r0, #0x32
	strb r0, [r4, #4]
	b _021FBC94
_021FBC68:
	mov r0, #0x1e
	strb r0, [r4, #3]
	mov r0, #0x3c
	strb r0, [r4, #4]
	b _021FBC94
_021FBC72:
	mov r0, #0x14
	strb r0, [r4, #3]
	mov r0, #0x46
	strb r0, [r4, #4]
	b _021FBC94
_021FBC7C:
	mov r0, #0x1e
	strb r0, [r4, #3]
	mov r0, #0x46
	strb r0, [r4, #4]
	b _021FBC94
_021FBC86:
	mov r0, #0x28
	strb r0, [r4, #3]
	mov r0, #0x50
	strb r0, [r4, #4]
	b _021FBC94
_021FBC90:
	bl GF_AssertFail
_021FBC94:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #3
	blo _021FBBE8
	ldr r0, [sp, #4]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	cmp r0, #4
	blo _021FBBD0
_021FBCAC:
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FBCB0: .word 0x41200000
_021FBCB4: .word 0x42C80000
	thumb_func_end ov96_021FBBB4

	thumb_func_start ov96_021FBCB8
ov96_021FBCB8: ; 0x021FBCB8
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r4, r1, #0
	add r5, r0, #0
	ldrb r0, [r4, #9]
	cmp r0, #4
	bhs _021FBD82
	ldr r0, [r4, #0x4c]
	bl ov96_021EB5B8
	add r6, r0, #0
	ldrb r0, [r4, #9]
	add r0, r0, #1
	strb r0, [r4, #9]
	ldrb r0, [r4, #9]
	cmp r0, #1
	bne _021FBD06
	ldrb r2, [r4, #0x18]
	ldr r1, _021FBDA0 ; =0x0221DC2C
	ldr r0, _021FBDA4 ; =0x000008A6
	ldrb r1, [r1, r2]
	bl sub_0200606C
	ldrb r2, [r4, #0x18]
	ldr r0, _021FBDA0 ; =0x0221DC2C
	ldr r1, _021FBDA8 ; =0x0221DC28
	ldrb r0, [r0, r2]
	ldrsb r1, [r1, r2]
	bl sub_020061D0
	ldr r0, [r4, #0x24]
	mov r1, #5
	bl ov96_021EAC0C
	add r0, r6, #0
	mov r1, #1
	bl sub_020248F0
	b _021FBD5A
_021FBD06:
	cmp r0, #4
	bne _021FBD36
	ldrb r2, [r4, #0x18]
	ldr r1, _021FBDA0 ; =0x0221DC2C
	ldr r0, _021FBDAC ; =0x000008A9
	ldrb r1, [r1, r2]
	bl sub_0200606C
	ldrb r2, [r4, #0x18]
	ldr r0, _021FBDA0 ; =0x0221DC2C
	ldr r1, _021FBDA8 ; =0x0221DC28
	ldrb r0, [r0, r2]
	ldrsb r1, [r1, r2]
	bl sub_020061D0
	ldr r0, [r4, #0x24]
	mov r1, #6
	bl ov96_021EAC0C
	add r0, r6, #0
	mov r1, #2
	bl sub_020248F0
	b _021FBD5A
_021FBD36:
	add r0, #0xfe
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #1
	bhi _021FBD5A
	ldrb r2, [r4, #0x18]
	ldr r1, _021FBDA0 ; =0x0221DC2C
	ldr r0, _021FBDB0 ; =0x000008A7
	ldrb r1, [r1, r2]
	bl sub_0200606C
	ldrb r2, [r4, #0x18]
	ldr r0, _021FBDA0 ; =0x0221DC2C
	ldr r1, _021FBDA8 ; =0x0221DC28
	ldrb r0, [r0, r2]
	ldrsb r1, [r1, r2]
	bl sub_020061D0
_021FBD5A:
	ldr r0, [r4, #0xc]
	bl _f2d
	ldr r3, _021FBDB4 ; =0x40240000
	mov r2, #0
	bl _dls
	bhs _021FBD7E
	ldrb r1, [r4, #9]
	ldr r0, [r4, #0x50]
	sub r1, r1, #1
	lsl r2, r1, #2
	ldr r1, _021FBDB8 ; =0x0221C444
	ldr r1, [r1, r2]
	bl _fadd
	str r0, [r4, #0xc]
	b _021FBD82
_021FBD7E:
	bl GF_AssertFail
_021FBD82:
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldrb r2, [r4, #0x18]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r3, #6
	bl ov96_021E8228
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021FBDA0: .word 0x0221DC2C
_021FBDA4: .word 0x000008A6
_021FBDA8: .word 0x0221DC28
_021FBDAC: .word 0x000008A9
_021FBDB0: .word 0x000008A7
_021FBDB4: .word 0x40240000
_021FBDB8: .word 0x0221C444
	thumb_func_end ov96_021FBCB8

	thumb_func_start ov96_021FBDBC
ov96_021FBDBC: ; 0x021FBDBC
	mov r1, #0x23
	lsl r1, r1, #4
	ldr r2, [r0, r1]
	add r3, r0, #0
	add r2, r2, #1
	str r2, [r0, r1]
	mov r2, #0
_021FBDCA:
	add r1, r3, #0
	add r1, #0xe8
	ldrb r1, [r1]
	cmp r1, #0
	bne _021FBDE0
	mov r1, #0x8b
	lsl r1, r1, #2
	ldr r2, [r0, r1]
	add r2, r2, #1
	str r2, [r0, r1]
	bx lr
_021FBDE0:
	add r2, r2, #1
	add r3, #0x6c
	cmp r2, #3
	blt _021FBDCA
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FBDBC

	thumb_func_start ov96_021FBDEC
ov96_021FBDEC: ; 0x021FBDEC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r1, #0x1e
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #0x1e
	bl _s32_div_f
	mov r0, #0xa
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	mov r1, #0x1e
	mul r1, r0
	add r0, r1, #0
	mov r1, #0xa
	bl _s32_div_f
	mov r1, #0x1e
	mul r1, r4
	add r0, r1, r0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021FBDEC

	thumb_func_start ov96_021FBE20
ov96_021FBE20: ; 0x021FBE20
	push {r3, r4, r5, lr}
	lsl r5, r0, #4
	add r0, r1, #0
	add r1, r5, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r0, #0
	add r1, r4, #0
	add r2, r5, #0
	bl MIi_CpuClearFast
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FBE20

	thumb_func_start ov96_021FBE3C
ov96_021FBE3C: ; 0x021FBE3C
	ldr r3, _021FBE40 ; =FreeToHeap
	bx r3
	.balign 4, 0
_021FBE40: .word FreeToHeap
	thumb_func_end ov96_021FBE3C

	thumb_func_start ov96_021FBE44
ov96_021FBE44: ; 0x021FBE44
	lsl r1, r1, #4
	add r0, r0, r1
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FBE44

	thumb_func_start ov96_021FBE4C
ov96_021FBE4C: ; 0x021FBE4C
	str r1, [r0, #4]
	str r2, [r0, #8]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FBE4C

	thumb_func_start ov96_021FBE54
ov96_021FBE54: ; 0x021FBE54
	push {r4, lr}
	add r4, r0, #0
	cmp r1, #0
	beq _021FBE82
	mov r1, #1
	str r1, [r4]
	str r1, [r4, #0xc]
	ldr r0, [r4, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r4, #8]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r4, #8]
	bl ov96_021EB5B8
	mov r1, #0
	bl sub_0202484C
	pop {r4, pc}
_021FBE82:
	mov r1, #0
	str r1, [r4]
	str r1, [r4, #0xc]
	ldr r0, [r4, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r1, #0
	ldr r0, [r4, #8]
	add r2, r1, #0
	bl ov96_021EB52C
	pop {r4, pc}
	thumb_func_end ov96_021FBE54

	thumb_func_start ov96_021FBE9C
ov96_021FBE9C: ; 0x021FBE9C
	ldr r0, [r0]
	bx lr
	thumb_func_end ov96_021FBE9C

	thumb_func_start ov96_021FBEA0
ov96_021FBEA0: ; 0x021FBEA0
	ldr r0, [r0, #0xc]
	bx lr
	thumb_func_end ov96_021FBEA0

	thumb_func_start ov96_021FBEA4
ov96_021FBEA4: ; 0x021FBEA4
	push {r3, r4, r5, lr}
	add r4, r0, #0
	mov r0, #0
	str r0, [r4, #0xc]
	ldr r0, [r4, #8]
	bl ov96_021EB5B8
	add r5, r0, #0
	ldr r0, [r4, #4]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	mov r1, #1
	ldr r0, [r4, #8]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r5, #0
	mov r1, #1
	bl sub_0202484C
	add r0, r5, #0
	mov r1, #1
	bl sub_020248F0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_021FBEA4

	thumb_func_start ov96_021FBEDC
ov96_021FBEDC: ; 0x021FBEDC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	bl ov96_021EB5B8
	add r1, r4, #0
	bl sub_020247D4
	ldr r0, [r5, #8]
	bl ov96_021EB5B8
	add r1, r4, #0
	bl sub_020247D4
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FBEDC

	thumb_func_start ov96_021FBEFC
ov96_021FBEFC: ; 0x021FBEFC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	cmp r0, #0
	beq _021FBF58
	ldr r0, [r5, #4]
	bl ov96_021EB5B8
	add r6, r0, #0
	ldr r0, [r5, #8]
	bl ov96_021EB5B8
	str r0, [sp]
	add r0, r6, #0
	bl sub_020248AC
	add r3, r0, #0
	add r2, sp, #4
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [sp, #8]
	lsl r0, r4, #0xc
	add r0, r1, r0
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r7, #0
	bl sub_020247D4
	ldr r0, [sp]
	add r1, r7, #0
	bl sub_020247D4
	mov r0, #0x82
	ldr r1, [sp, #8]
	lsl r0, r0, #0xe
	cmp r1, r0
	blt _021FBF58
	add r0, r5, #0
	mov r1, #0
	bl ov96_021FBE54
_021FBF58:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FBEFC

	thumb_func_start ov96_021FBF5C
ov96_021FBF5C: ; 0x021FBF5C
	push {r4, lr}
	ldr r0, [r0, #4]
	add r4, r1, #0
	bl ov96_021EB5B8
	bl sub_020248AC
	mov r1, #0x40
	strh r1, [r4, #4]
	mov r1, #0x10
	strh r1, [r4, #6]
	ldr r2, [r0]
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	asr r1, r1, #0xc
	sub r1, #0x20
	strh r1, [r4]
	ldr r1, [r0, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	sub r0, #0x10
	strh r0, [r4, #2]
	pop {r4, pc}
	thumb_func_end ov96_021FBF5C

	thumb_func_start ov96_021FBF90
ov96_021FBF90: ; 0x021FBF90
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r1, #0
	add r6, r0, #0
	lsl r4, r5, #3
	add r1, r6, r4
	ldr r1, [r1, #4]
	ldr r0, [r6, r4]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r2, [sp]
	bl ov96_021FBE44
	add r7, r0, #0
	bl ov96_021FBE9C
	cmp r0, #0
	beq _021FBFBE
	bl GF_AssertFail
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_021FBFBE:
	add r0, r6, #4
	ldr r1, [r0, r4]
	add r1, r1, #1
	lsr r3, r1, #0x1f
	lsl r2, r1, #0x1e
	sub r2, r2, r3
	mov r1, #0x1e
	ror r2, r1
	add r1, r3, r2
	ldr r3, _021FC024 ; =0x0221C5B8
	str r1, [r0, r4]
	ldmia r3!, {r0, r1}
	add r2, sp, #4
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [sp]
	ldr r1, [sp, #8]
	lsl r0, r0, #0xc
	add r0, r1, r0
	str r0, [sp, #8]
	cmp r5, #0
	beq _021FBFF6
	cmp r5, #1
	beq _021FBFFE
	cmp r5, #2
	beq _021FC006
	b _021FC00C
_021FBFF6:
	mov r0, #3
	lsl r0, r0, #0x10
	str r0, [sp, #4]
	b _021FC00C
_021FBFFE:
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp, #4]
	b _021FC00C
_021FC006:
	mov r0, #0xd
	lsl r0, r0, #0x10
	str r0, [sp, #4]
_021FC00C:
	add r0, r7, #0
	add r1, sp, #4
	bl ov96_021FBEDC
	add r0, r7, #0
	mov r1, #1
	bl ov96_021FBE54
	add r0, r7, #0
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FC024: .word 0x0221C5B8
	thumb_func_end ov96_021FBF90

	thumb_func_start ov96_021FC028
ov96_021FC028: ; 0x021FC028
	push {r3, r4, r5, r6, r7, lr}
	ldr r1, _021FC058 ; =0x00000C24
	add r6, r0, #0
	bl AllocFromHeap
	ldr r2, _021FC058 ; =0x00000C24
	mov r1, #0
	str r0, [sp]
	bl MIi_CpuFill8
	ldr r5, [sp]
	mov r4, #0
	mov r7, #4
_021FC042:
	add r0, r7, #0
	add r1, r6, #0
	bl ov96_021FBE20
	str r0, [r5]
	add r4, r4, #1
	add r5, #8
	cmp r4, #3
	blt _021FC042
	ldr r0, [sp]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FC058: .word 0x00000C24
	thumb_func_end ov96_021FC028

	thumb_func_start ov96_021FC05C
ov96_021FC05C: ; 0x021FC05C
	push {r4, r5, r6, lr}
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_021FC064:
	ldr r0, [r5]
	bl ov96_021FBE3C
	add r4, r4, #1
	add r5, #8
	cmp r4, #3
	blt _021FC064
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC05C

	thumb_func_start ov96_021FC07C
ov96_021FC07C: ; 0x021FC07C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r0, [sp]
	mov r0, #0
	add r5, r1, #0
	str r0, [sp, #4]
_021FC088:
	mov r4, #0
_021FC08A:
	ldr r0, [sp]
	add r1, r4, #0
	ldr r0, [r0]
	bl ov96_021FBE44
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #0x65
	mov r2, #2
	bl ov96_021EB4F4
	add r7, r0, #0
	add r0, r5, #0
	mov r1, #0x67
	mov r2, #6
	bl ov96_021EB4F4
	add r2, r0, #0
	add r0, r6, #0
	add r1, r7, #0
	bl ov96_021FBE4C
	add r4, r4, #1
	cmp r4, #4
	blt _021FC08A
	ldr r0, [sp]
	add r0, #8
	str r0, [sp]
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #3
	blt _021FC088
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FC07C

	thumb_func_start ov96_021FC0D0
ov96_021FC0D0: ; 0x021FC0D0
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r4, r0, #0
	cmp r5, #3
	blo _021FC0DE
	bl GF_AssertFail
_021FC0DE:
	lsl r0, r5, #3
	ldr r0, [r4, r0]
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FC0D0

	thumb_func_start ov96_021FC0E4
ov96_021FC0E4: ; 0x021FC0E4
	add r0, #0x18
	bx lr
	thumb_func_end ov96_021FC0E4

	thumb_func_start ov96_021FC0E8
ov96_021FC0E8: ; 0x021FC0E8
	ldr r1, _021FC0F0 ; =0x00000618
	add r0, r0, r1
	bx lr
	nop
_021FC0F0: .word 0x00000618
	thumb_func_end ov96_021FC0E8

	thumb_func_start ov96_021FC0F4
ov96_021FC0F4: ; 0x021FC0F4
	mov r0, #6
	lsl r0, r0, #8
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FC0F4

	thumb_func_start ov96_021FC0FC
ov96_021FC0FC: ; 0x021FC0FC
	push {r4, r5, r6, lr}
	add r3, r2, #0
	asr r2, r1, #2
	lsr r2, r2, #0x1d
	add r2, r1, r2
	asr r4, r2, #3
	beq _021FC13A
	lsl r2, r4, #3
	sub r2, r1, r2
	sub r1, r4, #1
	mov r4, #2
	lsl r4, r4, #8
	cmp r1, r4
	bge _021FC13A
	lsl r4, r3, #9
	add r4, r0, r4
	add r5, r4, r1
	ldr r4, _021FC13C ; =0x00000618
	ldrb r4, [r5, r4]
	cmp r4, #0
	beq _021FC13A
	ldr r4, _021FC140 ; =0x00000C18
	lsl r5, r3, #2
	add r6, r0, r4
	ldr r4, [r6, r5]
	cmp r4, r1
	bge _021FC13A
	str r1, [r6, r5]
	add r1, r3, #0
	bl ov96_021FBF90
_021FC13A:
	pop {r4, r5, r6, pc}
	.balign 4, 0
_021FC13C: .word 0x00000618
_021FC140: .word 0x00000C18
	thumb_func_end ov96_021FC0FC

	thumb_func_start ov96_021FC144
ov96_021FC144: ; 0x021FC144
	push {r4, lr}
	add r4, r0, #0
	bl LCRandom
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	add r4, #0x18
	lsr r2, r0, #0x18
	add r0, r4, #0
	mov r1, #0xe4
	bl ReadWholeNarcMemberByIdPair
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC144

	thumb_func_start ov96_021FC164
ov96_021FC164: ; 0x021FC164
	asr r3, r2, #2
	lsr r3, r3, #0x1d
	add r3, r2, r3
	lsl r1, r1, #9
	asr r2, r3, #3
	add r0, r0, r1
	add r1, r0, r2
	ldr r0, _021FC184 ; =0x00000618
	ldrb r0, [r1, r0]
	cmp r0, #0
	bne _021FC17E
	mov r2, #0
	mvn r2, r2
_021FC17E:
	add r0, r2, #0
	bx lr
	nop
_021FC184: .word 0x00000618
	thumb_func_end ov96_021FC164

	thumb_func_start ov96_021FC188
ov96_021FC188: ; 0x021FC188
	push {r3, r4, r5, lr}
	mov r1, #0x91
	lsl r1, r1, #2
	add r5, r0, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r2, #0x91
	mov r0, #0
	add r1, r4, #0
	lsl r2, r2, #2
	bl MIi_CpuClearFast
	str r5, [r4]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FC188

	thumb_func_start ov96_021FC1A8
ov96_021FC1A8: ; 0x021FC1A8
	push {r3, r4, r5, r6, r7, lr}
	mov r7, #0x62
	lsl r7, r7, #2
	str r0, [sp]
	mov r4, #0
	add r5, r0, #0
	add r6, r7, #4
_021FC1B6:
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_02024758
	ldr r0, [r5, r7]
	bl sub_02024758
	ldr r0, [r5, r6]
	bl sub_02024758
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #0xc
	blt _021FC1B6
	mov r1, #0x52
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl sub_0200AEB0
	mov r1, #0x53
	ldr r0, [sp]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl sub_0200B0A8
	mov r6, #0x13
	ldr r4, [sp]
	mov r5, #0
	lsl r6, r6, #4
_021FC1F4:
	ldr r0, [r4, r6]
	bl sub_0200A0D0
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #6
	blt _021FC1F4
	ldr r0, [sp]
	ldr r0, [r0, #4]
	bl sub_02024504
	ldr r0, [sp]
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC1A8

	thumb_func_start ov96_021FC214
ov96_021FC214: ; 0x021FC214
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	bl ov96_021FC320
	add r0, r5, #0
	bl ov96_021FC404
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021FC450
	add r0, r5, #0
	mov r1, #0
	add r0, #8
	add r2, r1, #0
	bl sub_02009FC8
	add r5, #8
	mov r2, #3
	add r0, r5, #0
	mov r1, #0
	lsl r2, r2, #0x12
	bl sub_02009FA8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_021FC214

	thumb_func_start ov96_021FC248
ov96_021FC248: ; 0x021FC248
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	mov r0, #0
	str r0, [sp, #8]
	lsl r0, r2, #0xc
	str r0, [sp]
	mov r0, #0xe
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	lsl r4, r1, #4
	mov r0, #0x61
	add r1, r5, r4
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r1, sp, #0
	bl sub_020247D4
	mov r0, #0x62
	add r1, r5, r4
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r1, sp, #0
	bl sub_020247D4
	mov r0, #0x63
	add r1, r5, r4
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r1, sp, #0
	bl sub_020247D4
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_021FC248

	thumb_func_start ov96_021FC28C
ov96_021FC28C: ; 0x021FC28C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r4, r2, #0
	beq _021FC29A
	cmp r4, #8
	bls _021FC29E
_021FC29A:
	bl GF_AssertFail
_021FC29E:
	lsl r0, r6, #4
	add r1, r5, r0
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r4, #0xf
	add r1, r4, #0
	bl sub_020248F0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC28C

	thumb_func_start ov96_021FC2B4
ov96_021FC2B4: ; 0x021FC2B4
	push {r3, r4, r5, r6, r7, lr}
	mov r7, #0x62
	add r5, r0, #0
	add r4, r1, #0
	mov r6, #0
	lsl r7, r7, #2
_021FC2C0:
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r4, #0
	bl sub_02024830
	ldr r0, [r5, r7]
	add r1, r4, #0
	bl sub_02024830
	add r6, r6, #1
	add r5, #0x10
	cmp r6, #0xc
	blt _021FC2C0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC2B4

	thumb_func_start ov96_021FC2E0
ov96_021FC2E0: ; 0x021FC2E0
	push {r4, r5, r6, lr}
	add r5, r0, #0
	lsl r4, r1, #4
	mov r0, #0x61
	add r1, r5, r4
	lsl r0, r0, #2
	add r6, r2, #0
	ldr r0, [r1, r0]
	add r1, r6, #0
	bl sub_02024830
	mov r0, #0x62
	add r1, r5, r4
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r1, r6, #0
	bl sub_02024830
	mov r0, #0x63
	add r1, r5, r4
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	add r1, r6, #0
	bl sub_02024830
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021FC2E0

	thumb_func_start ov96_021FC314
ov96_021FC314: ; 0x021FC314
	ldr r3, _021FC31C ; =sub_0202457C
	ldr r0, [r0, #4]
	bx r3
	nop
_021FC31C: .word sub_0202457C
	thumb_func_end ov96_021FC314

	thumb_func_start ov96_021FC320
ov96_021FC320: ; 0x021FC320
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r1, r5, #0
	ldr r2, [r5]
	mov r0, #0x24
	add r1, #8
	bl sub_02009F40
	mov r7, #0x13
	str r0, [r5, #4]
	mov r6, #0
	add r4, r5, #0
	lsl r7, r7, #4
_021FC33C:
	ldr r2, [r5]
	mov r0, #1
	add r1, r6, #0
	bl sub_0200A090
	str r0, [r4, r7]
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #6
	blt _021FC33C
	mov r1, #0x80
	str r1, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5]
	add r1, #0xb0
	str r0, [sp, #8]
	ldr r0, [r5, r1]
	mov r1, #0x9c
	mov r2, #0x18
	mov r3, #0
	bl sub_0200A1D8
	mov r1, #0x52
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r1, #0x80
	str r1, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r5]
	add r1, #0xb4
	str r0, [sp, #0xc]
	ldr r0, [r5, r1]
	mov r1, #0x9c
	mov r2, #0x15
	mov r3, #0
	bl sub_0200A234
	mov r1, #0x53
	lsl r1, r1, #2
	str r0, [r5, r1]
	mov r1, #0x80
	str r1, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5]
	add r1, #0xb8
	str r0, [sp, #8]
	ldr r0, [r5, r1]
	mov r1, #0x9c
	mov r2, #0x17
	mov r3, #0
	bl sub_0200A294
	mov r1, #0x15
	lsl r1, r1, #4
	str r0, [r5, r1]
	mov r1, #0x80
	str r1, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r5]
	add r1, #0xbc
	str r0, [sp, #8]
	ldr r0, [r5, r1]
	mov r1, #0x9c
	mov r2, #0x16
	mov r3, #0
	bl sub_0200A294
	mov r1, #0x55
	lsl r1, r1, #2
	str r0, [r5, r1]
	sub r1, #0xc
	ldr r0, [r5, r1]
	bl sub_0200ADA4
	mov r0, #0x53
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl sub_0200AF94
	bl sub_02074490
	add r1, r0, #0
	mov r0, #0
	str r0, [sp]
	ldr r0, [r5]
	mov r2, #5
	str r0, [sp, #4]
	mov r0, #0x14
	mov r3, #0x60
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC320

	thumb_func_start ov96_021FC404
ov96_021FC404: ; 0x021FC404
	push {lr}
	sub sp, #0x2c
	mov r1, #0x80
	add r2, r1, #0
	str r1, [sp]
	sub r2, #0x81
	str r2, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0
	str r2, [sp, #0xc]
	add r3, r1, #0
	str r2, [sp, #0x10]
	add r3, #0xb0
	ldr r3, [r0, r3]
	str r3, [sp, #0x14]
	add r3, r1, #0
	add r3, #0xb4
	ldr r3, [r0, r3]
	str r3, [sp, #0x18]
	add r3, r1, #0
	add r3, #0xb8
	ldr r3, [r0, r3]
	str r3, [sp, #0x1c]
	add r3, r1, #0
	add r3, #0xbc
	ldr r3, [r0, r3]
	str r3, [sp, #0x20]
	str r2, [sp, #0x24]
	str r2, [sp, #0x28]
	add r2, r1, #0
	add r2, #0xe0
	add r0, r0, r2
	add r2, r1, #0
	add r3, r1, #0
	bl sub_02009D48
	add sp, #0x2c
	pop {pc}
	thumb_func_end ov96_021FC404

	thumb_func_start ov96_021FC450
ov96_021FC450: ; 0x021FC450
	push {r4, r5, r6, r7, lr}
	sub sp, #0x54
	str r0, [sp]
	add r7, r1, #0
	ldr r1, [sp]
	mov r0, #0x14
	ldr r1, [r1]
	bl NARC_ctor
	str r0, [sp, #0x14]
	ldr r0, [sp]
	mov r1, #1
	ldr r0, [r0]
	lsl r1, r1, #0xc
	bl AllocFromHeapAtEnd
	ldr r1, [sp]
	mov r3, #0x16
	str r0, [sp, #0x10]
	lsl r3, r3, #4
	add r2, r1, #0
	add r2, r2, r3
	add r0, sp, #0x24
	mov r3, #2
	bl ov96_021FC5E0
	mov r0, #2
	lsl r0, r0, #8
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	ldr r5, [sp]
	mov r4, #0
	str r0, [sp, #0x18]
	str r0, [sp, #0x1c]
_021FC498:
	add r0, sp, #0x24
	bl sub_02024624
	mov r1, #0x61
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r0, r1, #0
	ldr r0, [r5, r0]
	mov r1, #1
	bl sub_0202484C
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r4, #0
	bl sub_020248F0
	add r0, sp, #0x24
	bl sub_02024624
	mov r1, #0x62
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0x62
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, #0xc
	bl sub_020248F0
	add r0, sp, #0x24
	bl sub_02024624
	mov r1, #0x63
	lsl r1, r1, #2
	str r0, [r5, r1]
	cmp r4, #8
	bge _021FC4F8
	add r0, r1, #0
	add r1, r4, #0
	ldr r0, [r5, r0]
	add r1, #0x10
	bl sub_020248F0
_021FC4F8:
	ldrh r0, [r7, #2]
	ldrh r6, [r7]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	cmp r6, #0
	bne _021FC52A
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #0
	bl sub_02024830
	mov r0, #0x62
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #0
	bl sub_02024830
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #0
	bl sub_02024830
_021FC52A:
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #2
	bl sub_02024ADC
	mov r0, #0x62
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #3
	bl sub_02024ADC
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #1
	bl sub_02024ADC
	ldr r0, [sp]
	ldr r2, [sp, #4]
	add r1, r4, #0
	bl ov96_021FC248
	mov r0, #0x63
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #1
	bl sub_02024830
	ldr r2, [sp, #0xc]
	add r0, r6, #0
	mov r1, #0
	bl sub_020741BC
	add r1, r0, #0
	ldr r0, [sp, #0x14]
	ldr r2, [sp, #0x10]
	bl NARC_ReadWholeMember
	ldr r0, [sp, #0x10]
	add r1, sp, #0x20
	bl NNS_G2dGetUnpackedBGCharacterData
	ldr r1, [sp, #0xc]
	add r0, r6, #0
	mov r2, #0
	bl sub_02074364
	add r0, r0, #3
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	ldr r0, [sp, #0x20]
	ldr r1, [sp, #0x18]
	ldr r0, [r0, #0x14]
	bl DC_FlushRange
	ldr r0, [sp, #0x20]
	ldr r1, [sp, #8]
	ldr r0, [r0, #0x14]
	ldr r2, [sp, #0x1c]
	bl sub_020CFECC
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r6, #0
	bl sub_02024A14
	mov r0, #2
	ldr r1, [sp, #8]
	lsl r0, r0, #8
	add r0, r1, r0
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r4, r4, #1
	add r0, #0x20
	add r5, #0x10
	add r7, r7, #4
	str r0, [sp, #4]
	cmp r4, #0xc
	bge _021FC5CE
	b _021FC498
_021FC5CE:
	ldr r0, [sp, #0x10]
	bl FreeToHeap
	ldr r0, [sp, #0x14]
	bl NARC_dtor
	add sp, #0x54
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC450

	thumb_func_start ov96_021FC5E0
ov96_021FC5E0: ; 0x021FC5E0
	push {r3, r4}
	ldr r2, [r1, #4]
	mov r4, #0
	str r2, [r0]
	mov r2, #0x16
	lsl r2, r2, #4
	add r2, r1, r2
	str r2, [r0, #4]
	mov r2, #0xf
	lsl r2, r2, #0x10
	str r2, [r0, #8]
	mov r2, #0xe
	lsl r2, r2, #0xc
	str r2, [r0, #0xc]
	mov r2, #1
	str r4, [r0, #0x10]
	lsl r2, r2, #0xc
	str r2, [r0, #0x14]
	str r2, [r0, #0x18]
	str r2, [r0, #0x1c]
	strh r4, [r0, #0x20]
	mov r2, #2
	str r2, [r0, #0x24]
	str r3, [r0, #0x28]
	ldr r1, [r1]
	str r1, [r0, #0x2c]
	pop {r3, r4}
	bx lr
	thumb_func_end ov96_021FC5E0

	thumb_func_start ov96_021FC618
ov96_021FC618: ; 0x021FC618
	push {r4, lr}
	mov r1, #0x84
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x84
	add r4, r0, #0
	bl MIi_CpuFill8
	add r0, r4, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC618

	thumb_func_start ov96_021FC630
ov96_021FC630: ; 0x021FC630
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r0, [sp, #4]
	str r2, [sp, #8]
	mov r0, #0
	add r7, r1, #0
	str r0, [sp, #0xc]
_021FC63E:
	ldr r1, [sp, #0xc]
	mov r0, #0x2c
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #4]
	mov r4, #0
	add r6, r0, r2
_021FC64C:
	lsl r0, r4, #3
	add r5, r6, r0
	mov r0, #0xa
	str r0, [sp]
	ldr r1, [sp, #8]
	add r0, r7, #0
	mov r2, #1
	mov r3, #0x6a
	bl ov96_021EB3E4
	str r0, [r5, #4]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r5, #4]
	mov r1, #5
	bl ov96_021EB630
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021FC64C
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	cmp r0, #3
	blo _021FC63E
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC630

	thumb_func_start ov96_021FC690
ov96_021FC690: ; 0x021FC690
	ldr r3, _021FC694 ; =FreeToHeap
	bx r3
	.balign 4, 0
_021FC694: .word FreeToHeap
	thumb_func_end ov96_021FC690

	thumb_func_start ov96_021FC698
ov96_021FC698: ; 0x021FC698
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	cmp r4, #3
	blo _021FC6A8
	bl GF_AssertFail
_021FC6A8:
	mov r0, #0x2c
	mul r0, r4
	add r4, r5, r0
	ldr r0, [r4, #0x28]
	lsl r0, r0, #3
	add r5, r4, r0
	ldr r0, [r4, r0]
	cmp r0, #0
	bne _021FC6E6
	mov r1, #1
	ldr r0, [r5, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #4]
	mov r1, #1
	bl ov96_021EB564
	ldr r0, [r5, #4]
	add r1, r6, #0
	bl ov96_021EB588
	mov r0, #1
	str r0, [r5]
	ldr r0, [r4, #0x28]
	mov r1, #5
	add r0, r0, #1
	bl _u32_div_f
	str r1, [r4, #0x28]
	pop {r4, r5, r6, pc}
_021FC6E6:
	bl GF_AssertFail
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021FC698

	thumb_func_start ov96_021FC6EC
ov96_021FC6EC: ; 0x021FC6EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	cmp r4, #3
	blo _021FC6FE
	bl GF_AssertFail
_021FC6FE:
	mov r0, #0x2c
	mul r0, r4
	add r0, r5, r0
	str r0, [sp]
	mov r4, #0
	lsl r7, r6, #0xc
_021FC70A:
	ldr r0, [sp]
	lsl r1, r4, #3
	add r5, r0, r1
	ldr r0, [r0, r1]
	cmp r0, #0
	beq _021FC748
	ldr r0, [r5, #4]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #4
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [sp, #8]
	add r0, r0, r7
	str r0, [sp, #8]
	ldr r0, [r5, #4]
	bl ov96_021EB588
	ldr r0, [r5, #4]
	bl ov96_021EB57C
	cmp r0, #0
	bne _021FC748
	add r0, r5, #0
	bl ov96_021FC758
_021FC748:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _021FC70A
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FC6EC

	thumb_func_start ov96_021FC758
ov96_021FC758: ; 0x021FC758
	ldr r3, _021FC764 ; =ov96_021EB52C
	mov r2, #0
	str r2, [r0]
	ldr r0, [r0, #4]
	mov r1, #1
	bx r3
	.balign 4, 0
_021FC764: .word ov96_021EB52C
	thumb_func_end ov96_021FC758

	thumb_func_start ov96_021FC768
ov96_021FC768: ; 0x021FC768
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x5c
	add r4, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x34]
	add r0, r4, #0
	bl ov96_021E5DD4
	cmp r0, #6
	bls _021FC782
	b _021FCD68
_021FC782:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FC78E: ; jump table
	.short _021FC79C - _021FC78E - 2 ; case 0
	.short _021FC870 - _021FC78E - 2 ; case 1
	.short _021FC8C6 - _021FC78E - 2 ; case 2
	.short _021FC9AC - _021FC78E - 2 ; case 3
	.short _021FCAAC - _021FC78E - 2 ; case 4
	.short _021FCD14 - _021FC78E - 2 ; case 5
	.short _021FCD52 - _021FC78E - 2 ; case 6
_021FC79C:
	mov r2, #0x1a
	mov r0, #0x5c
	mov r1, #0x90
	lsl r2, r2, #0xe
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _021FCA90 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _021FCA94 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_021FCEE0
	ldr r1, _021FCA98 ; =0x00000648
	add r0, r4, #0
	bl ov96_021E5D94
	ldr r2, _021FCA98 ; =0x00000648
	mov r1, #0
	add r5, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x90
	bl sub_0201AC88
	mov r2, #0xf9
	lsl r2, r2, #2
	add r1, r5, r2
	add r2, #0x78
	str r0, [r5]
	add r0, r4, #0
	add r2, r5, r2
	mov r3, #0x78
	bl ov96_021E5F70
	add r0, r4, #0
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0x97
	str r0, [sp, #0xa4]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0xa8]
	lsr r0, r0, #4
	mov r2, #0x90
	str r0, [sp, #0xac]
	str r2, [sp, #0xb0]
	mov r0, #0x10
	str r0, [sp]
	ldr r3, _021FCA9C ; =0x00300010
	add r0, sp, #0xa4
	mov r1, #0x16
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x90
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x90
	str r1, [r5, #0x14]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r5]
	bl ov96_021FCF00
	add r0, r5, #0
	bl ov96_021FFD4C
	ldr r0, _021FCAA0 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
_021FC870:
	ldr r0, [sp, #0x34]
	ldr r1, [sp, #0x34]
	ldr r0, [r0, #0x14]
	ldr r1, [r1]
	add r2, r4, #0
	bl ov96_021FFF3C
	mov r2, #0x3e
	ldr r1, [sp, #0x34]
	lsl r2, r2, #4
	str r0, [r1, r2]
	add r0, r4, #0
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E5EE8
	add r2, r0, #0
	ldr r0, [sp, #0x34]
	mov r1, #4
	ldr r0, [r0, #0x14]
	sub r1, r1, r5
	bl ov96_02200E3C
	mov r2, #0xf7
	ldr r1, [sp, #0x34]
	lsl r2, r2, #2
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, #0x14]
	ldr r1, _021FCAA4 ; =0x000002BF
	mov r2, #1
	bl ov96_021E9A78
	mov r2, #0xf1
	ldr r1, [sp, #0x34]
	lsl r2, r2, #2
	str r0, [r1, r2]
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
_021FC8C6:
	ldr r5, _021FCAA8 ; =0x0221C5E4
	add r3, sp, #0x98
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [sp, #0x34]
	ldr r0, [r0, #0x14]
	bl ov96_021EB180
	ldr r1, [sp, #0x34]
	str r0, [r1, #0x18]
	mov r0, #2
	lsl r0, r0, #0x14
	str r0, [sp]
	add r0, r1, #0
	mov r1, #0
	ldr r0, [r0, #0x18]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [sp, #0x34]
	ldr r0, [r0, #0x18]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r0, [sp, #0x34]
	mov r5, #0xf1
	ldr r3, [sp, #0x34]
	lsl r5, r5, #2
	ldr r0, [r0, #0x14]
	ldr r3, [r3, r5]
	mov r1, #0xc
	mov r2, #4
	bl ov96_021EA854
	ldr r1, [sp, #0x34]
	add r2, r5, #4
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, #0x18]
	mov r1, #0
	mov r2, #0x65
	bl ov96_021EB29C
	ldr r0, [sp, #0x34]
	mov r1, #1
	ldr r0, [r0, #0x18]
	mov r2, #0x66
	bl ov96_021EB29C
	ldr r0, [sp, #0x34]
	mov r1, #2
	ldr r0, [r0, #0x18]
	mov r2, #0x67
	bl ov96_021EB29C
	ldr r0, [sp, #0x34]
	mov r1, #3
	ldr r0, [r0, #0x18]
	mov r2, #0x68
	bl ov96_021EB29C
	add r1, r5, #0
	ldr r0, [sp, #0x34]
	add r1, #0x1c
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x34]
	ldr r1, [r1, #0x18]
	bl ov96_022000E4
	ldr r0, [sp, #0x34]
	ldr r0, [r0, #0x18]
	bl ov96_021FD0E4
	ldr r0, [sp, #0x34]
	ldr r0, [r0, #0x18]
	bl ov96_021EB3A4
	ldr r2, [sp, #0x34]
	add r3, r5, #0
	ldr r2, [r2, r3]
	ldr r3, [sp, #0x34]
	add r0, r4, #0
	ldr r3, [r3, #0x18]
	mov r1, #0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	ldr r0, [sp, #0x34]
	add r1, r0, #0
	ldr r1, [r1, #0x18]
	bl ov96_021FD128
	add r3, r5, #0
	ldr r1, [sp, #0x34]
	ldr r0, [sp, #0x34]
	add r3, #0x1c
	ldr r0, [r0, r3]
	ldr r2, [sp, #0x34]
	sub r3, #0x1c
	ldr r1, [r1, #0x18]
	ldr r2, [r2, r3]
	bl ov96_02200180
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
_021FC9AC:
	add r0, sp, #0x154
	mov r7, #0
	add r5, sp, #0x198
	str r0, [sp, #0x1c]
	add r6, sp, #0x68
_021FC9B6:
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x18]
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x38]
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0x18]
	add r0, r4, #0
	add r3, r5, #0
	bl ov96_021E6168
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0x18]
	add r0, r4, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	ldr r1, [sp, #0x1c]
	add r7, r7, #1
	str r0, [r1, #0x14]
	ldrh r0, [r5]
	strh r0, [r6]
	ldrh r0, [r5, #2]
	add r5, #0x10
	strh r0, [r6, #2]
	add r0, r1, #0
	add r0, r0, #4
	add r6, r6, #4
	str r0, [sp, #0x1c]
	cmp r7, #0xc
	blt _021FC9B6
	mov r1, #0x3e
	ldr r0, [sp, #0x34]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, sp, #0x68
	bl ov96_022002F8
	add r0, r4, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	mov r1, #0x3e
	ldr r0, [sp, #0x34]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	lsl r1, r3, #1
	add r1, r3, r1
	add r2, sp, #0x198
	lsl r1, r1, #4
	add r1, r2, r1
	bl ov96_022003E8
	mov r1, #0x3e
	ldr r0, [sp, #0x34]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #0
	mov r2, #1
	bl ov96_02200454
	mov r1, #0x3e
	ldr r0, [sp, #0x34]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #1
	mov r2, #2
	bl ov96_02200454
	mov r1, #0
	mov r0, #2
	str r0, [sp, #0x158]
	mov r0, #1
	str r1, [sp, #0x154]
	str r1, [sp, #0x15c]
	str r0, [sp, #0x160]
	str r0, [sp, #0x164]
	str r1, [sp]
	str r1, [sp, #4]
	mov r1, #0xf2
	ldr r0, [sp, #0x34]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	mov r1, #0xc
	add r2, sp, #0x198
	add r3, sp, #0x154
	bl ov96_021EA8A8
	add r0, r4, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r2, #0x3e
	ldr r0, [sp, #0x34]
	lsl r2, r2, #4
	ldr r0, [r0, r2]
	bl ov96_02200B04
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
	.balign 4, 0
_021FCA90: .word 0xFFFFE0FF
_021FCA94: .word 0x04001000
_021FCA98: .word 0x00000648
_021FCA9C: .word 0x00300010
_021FCAA0: .word gMain + 0x60
_021FCAA4: .word 0x000002BF
_021FCAA8: .word 0x0221C5E4
_021FCAAC:
	mov r1, #0xf2
	ldr r0, [sp, #0x34]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl ov96_021EAA00
	cmp r0, #0
	bne _021FCABE
	b _021FCD68
_021FCABE:
	add r0, r4, #0
	bl ov96_021E5F24
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x34]
	ldr r0, [r0]
	bl ov96_021E6030
	add r0, r4, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, sp, #0x50
	mov r1, #0xaa
	mov r2, #0xc
	bl ReadWholeNarcMemberByIdPair
	ldr r0, [sp, #0x34]
	mov r5, #0
	str r0, [sp, #0x40]
	add r0, #0x30
	str r0, [sp, #0x40]
_021FCAEA:
	mov r0, #0xf2
	ldr r1, [sp, #0x34]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x14]
	cmp r1, #0
	bne _021FCB12
	add r0, r6, #0
	mov r1, #1
	bl ov96_021EAB38
_021FCB12:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	add r0, r4, #0
	add r1, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x50
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r6, #0
	bl ov96_021EAF70
	mov r0, #0xf2
	ldr r1, [sp, #0x34]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0xd4
	str r0, [sp, #0x3c]
	mul r1, r0
	ldr r0, [sp, #0x40]
	add r0, r0, r1
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x14]
	lsl r1, r0, #2
	ldr r0, [sp, #0x2c]
	str r6, [r0, r1]
	ldr r0, [sp, #0x3c]
	add r1, r0, #1
	add r7, r1, #0
	ldr r1, [sp, #0x2c]
	mov r0, #0x1b
	mul r7, r0
	add r1, #0x88
	mov r0, #4
	strb r0, [r1]
	add r7, #0x28
	add r0, r6, #0
	mov r1, #4
	bl ov96_021EAC0C
	add r0, r6, #0
	mov r1, #0x50
	add r2, r7, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r6, #0
	bl ov96_021EAF6C
	ldr r0, [sp, #0x2c]
	mov r1, #0
	str r1, [r0, #0x7c]
	add r0, #0x80
	lsl r1, r7, #0xc
	str r1, [r0]
	str r0, [sp, #0x2c]
	ldr r1, [sp, #0x3c]
	ldr r0, [sp, #0x30]
	cmp r1, r0
	bne _021FCBDE
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bne _021FCBDE
	add r0, sp, #0x44
	str r0, [sp]
	add r0, r6, #0
	mov r1, #0x50
	add r2, r7, #0
	add r3, sp, #0x48
	bl ov96_021EB0A4
	ldr r1, [sp, #0x48]
	add r0, sp, #0x44
	strh r1, [r0, #8]
	ldr r1, [sp, #0x44]
	strh r1, [r0, #0xa]
_021FCBDE:
	add r5, r5, #1
	cmp r5, #0xc
	blt _021FCAEA
	ldr r6, [sp, #0x34]
	mov r5, #0
	add r6, #0x30
	mov r7, #1
_021FCBEC:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r5, r0
	bne _021FCBFA
	add r2, r7, #0
	b _021FCBFC
_021FCBFA:
	mov r2, #0
_021FCBFC:
	add r1, r6, #0
	add r1, #0x80
	ldr r1, [r1]
	add r0, r6, #0
	asr r3, r1, #0xb
	lsr r3, r3, #0x14
	add r3, r1, r3
	asr r1, r3, #0xc
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021FFB7C
	add r5, r5, #1
	add r6, #0xd4
	cmp r5, #4
	blt _021FCBEC
	add r0, sp, #0xb4
	mov r1, #0xaa
	mov r2, #2
	bl ReadWholeNarcMemberByIdPair
	mov r2, #0x19
	ldr r1, _021FCD70 ; =0x00000A8C
	ldr r0, [sp, #0x34]
	lsl r2, r2, #6
	strh r1, [r0, r2]
	mov r1, #0x3e
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x34]
	ldrh r1, [r1, r2]
	bl ov96_02200A64
	mov r0, #0
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x34]
	add r6, r0, #0
	str r0, [sp, #0x24]
	add r6, #0x30
	str r0, [sp, #0x20]
_021FCC4C:
	mov r0, #0x3b
	mov r2, #0
	ldr r1, [sp, #0x24]
	lsl r0, r0, #4
	str r2, [r1, r0]
	ldr r0, [sp, #0x28]
	add r5, r2, #0
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
_021FCC5E:
	lsl r3, r5, #0x18
	add r0, r4, #0
	add r1, sp, #0xb4
	add r2, r7, #0
	lsr r3, r3, #0x18
	str r6, [sp]
	bl ov96_021FEFE8
	add r5, r5, #1
	cmp r5, #3
	blt _021FCC5E
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FCC92
	mov r0, #0xf7
	ldr r1, [sp, #0x34]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r1, [sp, #0x28]
	add r2, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02200E78
_021FCC92:
	mov r0, #1
	ldr r2, [sp, #0x28]
	ldr r1, [sp, #0x20]
	lsl r0, r0, #8
	strb r2, [r1, r0]
	ldr r0, [sp, #0x24]
	add r6, #0xd4
	add r0, r0, #4
	str r0, [sp, #0x24]
	add r0, r1, #0
	add r0, #0xd4
	str r0, [sp, #0x20]
	add r0, r2, #0
	add r0, r0, #1
	str r0, [sp, #0x28]
	cmp r0, #4
	blt _021FCC4C
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FCCD2
	add r0, r4, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x34]
	bl ov96_021FDA30
_021FCCD2:
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	add r0, sp, #0x4c
	mov r3, #0xf1
	str r0, [sp, #8]
	ldr r2, [sp, #0x34]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	ldr r3, [sp, #0x34]
	add r0, r4, #0
	ldr r3, [r3, #0x18]
	mov r1, #0
	bl ov96_021E634C
	ldr r0, [sp, #0x34]
	bl ov96_021FD060
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	mov r0, #1
	bl sub_0203A994
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
_021FCD14:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FCD4A
	mov r5, #0xf9
	lsl r5, r5, #2
	bl LCRandom
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r2, r0, #0x18
	ldr r0, [sp, #0x34]
	mov r1, #0xe5
	add r0, r0, r5
	bl ReadWholeNarcMemberByIdPair
	add r1, r5, #0
	ldr r0, [sp, #0x34]
	sub r1, #8
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x34]
	add r1, r1, r5
	bl ov96_02200E80
_021FCD4A:
	add r0, r4, #0
	bl ov96_021E5DEC
	b _021FCD68
_021FCD52:
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _021FCD60
	bl GF_AssertFail
_021FCD60:
	add sp, #0x1fc
	add sp, #0x5c
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021FCD68:
	mov r0, #0
	add sp, #0x1fc
	add sp, #0x5c
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FCD70: .word 0x00000A8C
	thumb_func_end ov96_021FC768

	thumb_func_start ov96_021FCD74
ov96_021FCD74: ; 0x021FCD74
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x18]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_021FCD74

	thumb_func_start ov96_021FCD84
ov96_021FCD84: ; 0x021FCD84
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_021FCD98:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	lsl r0, r0, #0x10
	lsr r3, r0, #0x10
	lsr r0, r3, #0xa
	str r0, [sp]
	lsr r2, r3, #0x1f
	lsl r1, r3, #0x16
	sub r1, r1, r2
	mov r0, #0x16
	ror r1, r0
	add r0, r2, r1
	mov r1, #0xa
	mul r1, r0
	asr r0, r1, #9
	lsr r0, r0, #0x16
	add r0, r1, r0
	asr r0, r0, #0xa
	str r0, [sp, #4]
	str r7, [sp, #8]
	mov r0, #1
	str r0, [sp, #0xc]
	mov r0, #2
	str r0, [sp, #0x10]
	mov r0, #1
	str r0, [sp, #0x14]
	ldr r0, _021FCE0C ; =0x00000129
	add r1, r6, #0
	str r0, [sp, #0x18]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E966C
	add r4, r4, #1
	cmp r4, #4
	blt _021FCD98
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #6
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #6
	bl ov96_021E9570
	mov r0, #1
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	nop
_021FCE0C: .word 0x00000129
	thumb_func_end ov96_021FCD84

	thumb_func_start ov96_021FCE10
ov96_021FCE10: ; 0x021FCE10
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	add r0, r5, #0
	bl ov96_021E5F8C
	ldr r0, [r4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #2
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #6
	bl sub_0201BB4C
	add r0, r4, #4
	bl RemoveWindow
	ldr r0, [r4]
	bl FreeToHeap
	ldr r0, [r4, #0x18]
	bl ov96_021EB21C
	mov r0, #0xf2
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EA894
	mov r0, #0xf1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	mov r0, #0xf7
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_02200EEC
	mov r0, #0x3e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021FFFE8
	mov r0, #4
	bl sub_02002DB4
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _021FCED8 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _021FCEDC ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x90
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021FCED8: .word gMain + 0x60
_021FCEDC: .word 0x04000050
	thumb_func_end ov96_021FCE10

	thumb_func_start ov96_021FCEE0
ov96_021FCEE0: ; 0x021FCEE0
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _021FCEFC ; =0x0221C6F0
	add r3, sp, #0
	mov r2, #5
_021FCEEA:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _021FCEEA
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_021FCEFC: .word 0x0221C6F0
	thumb_func_end ov96_021FCEE0

	thumb_func_start ov96_021FCF00
ov96_021FCF00: ; 0x021FCF00
	push {r4, r5, lr}
	sub sp, #0xd4
	ldr r5, _021FD040 ; =0x0221C61C
	add r3, sp, #0xc4
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _021FD044 ; =0x0221C648
	add r3, sp, #0xa8
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _021FD048 ; =0x0221C664
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _021FD04C ; =0x0221C680
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #2
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #2
	bl sub_0201CAE0
	ldr r5, _021FD050 ; =0x0221C69C
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _021FD054 ; =0x0221C6B8
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _021FD058 ; =0x0221C6D4
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _021FD05C ; =0x0221C62C
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xd4
	pop {r4, r5, pc}
	nop
_021FD040: .word 0x0221C61C
_021FD044: .word 0x0221C648
_021FD048: .word 0x0221C664
_021FD04C: .word 0x0221C680
_021FD050: .word 0x0221C69C
_021FD054: .word 0x0221C6B8
_021FD058: .word 0x0221C6D4
_021FD05C: .word 0x0221C62C
	thumb_func_end ov96_021FCF00

	thumb_func_start ov96_021FD060
ov96_021FD060: ; 0x021FD060
	push {r4, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	add r4, r0, #0
	str r3, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #1
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xb2
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xb2
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #3
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xb2
	mov r3, #1
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xb2
	mov r3, #2
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4, #0x14]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xb2
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x3e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02200068
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_021FD060

	thumb_func_start ov96_021FD0E4
ov96_021FD0E4: ; 0x021FD0E4
	push {r4, lr}
	sub sp, #8
	mov r1, #1
	str r1, [sp]
	mov r1, #0xb2
	mov r2, #0x11
	mov r3, #0x68
	add r4, r0, #0
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xb2
	mov r2, #0xe
	mov r3, #0x68
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xb2
	mov r2, #0x10
	mov r3, #0x68
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xb2
	mov r2, #0xf
	mov r3, #0x68
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	thumb_func_end ov96_021FD0E4

	thumb_func_start ov96_021FD128
ov96_021FD128: ; 0x021FD128
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r0, #0
	add r5, r1, #0
	mov r4, #0
	mov r6, #6
_021FD134:
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r6, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #0x1e
	blt _021FD134
	mov r4, #0
	mov r6, #7
_021FD14C:
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r6, [sp]
	bl ov96_021EB408
	mov r0, #9
	str r0, [sp]
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB408
	mov r0, #0xb
	str r0, [sp]
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB408
	mov r0, #0xd
	str r0, [sp]
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #4
	blt _021FD14C
	mov r4, #0
	mov r6, #0xe
_021FD194:
	add r0, r5, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r6, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #4
	blt _021FD194
	mov r0, #0xc
	mov r1, #1
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	mov r3, #0x68
	bl ov96_021EB408
	mov r0, #0xf
	mov r1, #1
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	mov r3, #0x68
	bl ov96_021EB408
	mov r6, #0
	add r4, r7, #0
_021FD1CC:
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #6
	bl ov96_021EB4F4
	ldr r1, _021FD2DC ; =0x000004D8
	add r6, r6, #1
	str r0, [r4, r1]
	add r4, #0xc
	cmp r6, #0x1e
	blt _021FD1CC
	mov r6, #0
	add r4, r7, #0
_021FD1E6:
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #7
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #9
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0x9c
	str r0, [r1]
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #0xb
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xa8
	str r0, [r1]
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #0xd
	bl ov96_021EB4F4
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xa4
	ldr r0, [r0]
	mov r1, #3
	bl ov96_021EB564
	add r0, r4, #0
	add r0, #0xa0
	ldr r0, [r0]
	mov r1, #8
	bl ov96_021EB564
	add r6, r6, #1
	add r4, #0xd4
	cmp r6, #4
	blt _021FD1E6
	mov r6, #0
	add r4, r7, #0
_021FD24A:
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #0xe
	bl ov96_021EB4F4
	mov r1, #0xf3
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #4
	blt _021FD24A
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #0xc
	bl ov96_021EB4F4
	str r0, [r7, #0x1c]
	mov r1, #0xb
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r7, #0x1c]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #2
	lsl r0, r0, #0x10
	str r0, [sp, #4]
	lsr r0, r0, #1
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [r7, #0x1c]
	add r1, sp, #4
	bl ov96_021EB588
	add r0, r5, #0
	mov r1, #0x68
	mov r2, #0xf
	bl ov96_021EB4F4
	str r0, [r7, #0x28]
	mov r1, #0xa
	bl ov96_021EB564
	ldr r0, [r7, #0x18]
	bl ov96_021EB5E8
	add r1, r0, #0
	mov r0, #0xf1
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	ldr r3, [r7, #0x14]
	mov r2, #0
	bl ov96_021EA424
	str r0, [r7, #0x20]
	ldr r0, [r7, #0x18]
	bl ov96_021EB5E8
	add r1, r0, #0
	mov r0, #0xf1
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	ldr r3, [r7, #0x14]
	mov r2, #0
	bl ov96_021EA424
	str r0, [r7, #0x24]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FD2DC: .word 0x000004D8
	thumb_func_end ov96_021FD128

	thumb_func_start ov96_021FD2E0
ov96_021FD2E0: ; 0x021FD2E0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	str r1, [sp, #0x10]
	str r0, [sp, #0xc]
	bl ov96_021E5DC4
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FD300
	cmp r0, #1
	beq _021FD3A0
	cmp r0, #2
	beq _021FD3C6
	b _021FD3D6
_021FD300:
	mov r0, #0
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	ldr r1, _021FD3DC ; =0x000004D4
	str r0, [sp, #0x14]
	add r5, r0, #0
	add r7, r0, r1
_021FD30E:
	ldr r1, [sp, #0x14]
	ldr r0, _021FD3E0 ; =0x0000045C
	ldr r0, [r1, r0]
	lsl r1, r0, #0x18
	asr r2, r0, #8
	asr r0, r0, #0x10
	lsl r2, r2, #0x18
	lsl r0, r0, #0x10
	lsr r1, r1, #0x18
	lsr r6, r2, #0x18
	lsr r4, r0, #0x10
	cmp r1, #0
	beq _021FD370
	ldr r0, _021FD3DC ; =0x000004D4
	mov r2, #1
	str r2, [r5, r0]
	add r0, #0xb
	strb r1, [r5, r0]
	ldr r0, _021FD3E4 ; =0x000004DC
	sub r1, r1, #1
	strh r4, [r5, r0]
	add r0, r0, #2
	strb r6, [r5, r0]
	ldr r0, _021FD3E8 ; =0x000004D8
	ldr r0, [r5, r0]
	bl ov96_021EB564
	ldr r0, _021FD3E8 ; =0x000004D8
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0
	add r4, #0x50
	str r0, [sp, #0x28]
	lsl r0, r4, #0xc
	add r6, #0x20
	str r0, [sp, #0x20]
	lsl r0, r6, #0xc
	str r0, [sp, #0x24]
	ldr r0, _021FD3E8 ; =0x000004D8
	add r1, sp, #0x20
	ldr r0, [r5, r0]
	bl ov96_021EB588
	add r0, r7, #0
	bl ov96_021FFB44
_021FD370:
	ldr r0, [sp, #0x14]
	add r5, #0xc
	add r0, r0, #4
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x1c]
	add r7, #0xc
	add r0, r0, #1
	str r0, [sp, #0x1c]
	cmp r0, #0x1e
	blt _021FD30E
	ldr r0, [sp, #0x18]
	mov r1, #0
	bl ov96_021FEAEC
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	add r1, r0, #1
	ldr r0, [sp, #0x10]
	strb r1, [r0]
	ldr r0, [sp, #0xc]
	mov r1, #0x12
	bl ov96_021E601C
	b _021FD3D6
_021FD3A0:
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [sp, #0x18]
	mov r1, #3
	ldr r0, [r0, #0x14]
	add r2, r1, #0
	str r0, [sp, #8]
	mov r0, #2
	mov r3, #0
	bl sub_0200FA24
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	add r1, r0, #1
	ldr r0, [sp, #0x10]
	strb r1, [r0]
	b _021FD3D6
_021FD3C6:
	bl sub_0200FB5C
	cmp r0, #0
	beq _021FD3D6
	ldr r0, [sp, #0xc]
	mov r1, #1
	bl ov96_021E5FC8
_021FD3D6:
	mov r0, #0
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021FD3DC: .word 0x000004D4
_021FD3E0: .word 0x0000045C
_021FD3E4: .word 0x000004DC
_021FD3E8: .word 0x000004D8
	thumb_func_end ov96_021FD2E0

	thumb_func_start ov96_021FD3EC
ov96_021FD3EC: ; 0x021FD3EC
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _021FD40A
	cmp r0, #1
	beq _021FD41C
	cmp r0, #2
	beq _021FD434
	b _021FD464
_021FD40A:
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _021FD464
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021FD464
_021FD41C:
	add r0, r5, #0
	bl ov96_021FD4D0
	add r0, r5, #0
	bl ov96_021FDB64
	cmp r0, #0
	beq _021FD464
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _021FD464
_021FD434:
	add r0, r5, #0
	bl ov96_021FD4D0
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _021FD464
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x14]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
_021FD464:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021FD3EC

	thumb_func_start ov96_021FD46C
ov96_021FD46C: ; 0x021FD46C
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r5, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	bne _021FD48E
	bl sub_0200FB5C
	cmp r0, #0
	beq _021FD48A
	mov r0, #1
	strb r0, [r4]
_021FD48A:
	mov r0, #0
	pop {r4, r5, r6, pc}
_021FD48E:
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _021FD49C
	mov r0, #1
	pop {r4, r5, r6, pc}
_021FD49C:
	mov r4, #0
	add r5, #0x30
_021FD4A0:
	ldr r2, [r5, #0x7c]
	lsl r1, r4, #0x18
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, r5, #0
	add r3, #0x9c
	ldrb r3, [r3]
	add r0, r6, #0
	lsr r1, r1, #0x18
	lsl r3, r3, #0xa
	add r2, r2, r3
	lsl r2, r2, #0x10
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, #0xd4
	cmp r4, #4
	blt _021FD4A0
	mov r0, #1
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021FD46C

	thumb_func_start ov96_021FD4D0
ov96_021FD4D0: ; 0x021FD4D0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x68
	str r0, [sp, #4]
	bl ov96_021E5F54
	str r0, [sp, #0x2c]
	ldr r0, [sp, #4]
	bl ov96_021E5DC4
	str r0, [sp, #0x30]
	ldr r0, [sp, #4]
	bl ov96_021E5F24
	cmp r0, #0
	beq _021FD4F0
	b _021FDA18
_021FD4F0:
	mov r1, #0xf
	ldr r0, [sp, #0x30]
	lsl r1, r1, #6
	ldrb r0, [r0, r1]
	cmp r0, #0
	beq _021FD512
	ldr r0, [sp, #0x2c]
	add r0, #0x28
	str r0, [sp, #0x2c]
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x30]
	bl ov96_021FDA30
	add sp, #0x68
	pop {r3, r4, r5, r6, r7, pc}
_021FD512:
	ldr r0, [sp, #0x2c]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x2c]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_021FD526:
	ldmia r3!, {r0, r1}
	stmia r4!, {r0, r1}
	sub r2, r2, #1
	bne _021FD526
	ldr r0, [r3]
	mov r1, #0x19
	str r0, [r4]
	ldr r0, [sp, #0x30]
	lsl r1, r1, #6
	ldrh r0, [r0, r1]
	cmp r0, #0
	beq _021FD544
	sub r2, r0, #1
	ldr r0, [sp, #0x30]
	strh r2, [r0, r1]
_021FD544:
	ldr r0, [sp, #0x2c]
	add r0, #0x28
	bl ov96_021E8A20
	ldr r4, [sp, #0x30]
	mov r0, #0
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x2c]
	add r5, r4, #0
	str r0, [sp, #0x1c]
	add r0, #0x50
	str r0, [sp, #0x1c]
	add r0, r4, #0
	str r0, [sp, #0x18]
	add r0, #0x30
	str r0, [sp, #0x18]
	add r0, r4, #0
	str r0, [sp, #0x14]
	add r0, #0xe0
	str r0, [sp, #0x14]
	add r0, r4, #0
	str r0, [sp, #0x10]
	add r0, #0xec
	str r0, [sp, #0x10]
	add r0, r4, #0
	str r0, [sp, #0xc]
	add r0, #0xbc
	add r7, r4, #0
	str r0, [sp, #0xc]
	str r0, [sp, #8]
_021FD580:
	ldr r0, [sp, #0x1c]
	bl ov96_021E8A20
	add r6, r0, #0
	ldr r0, [r6]
	cmp r0, #0
	beq _021FD5C6
	mov r0, #0xe
	lsl r0, r0, #6
	ldr r1, [r4, r0]
	cmp r1, #0
	beq _021FD5AA
	add r0, r0, #4
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021FD5AA
	mov r0, #0xe
	mov r1, #0
	lsl r0, r0, #6
	str r1, [r4, r0]
	b _021FD5D2
_021FD5AA:
	cmp r1, #0
	bne _021FD5D2
	mov r0, #0xe1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	bne _021FD5D2
	mov r0, #0xe
	mov r1, #1
	lsl r0, r0, #6
	str r1, [r4, r0]
	add r0, r0, #4
	str r1, [r4, r0]
	b _021FD5D2
_021FD5C6:
	mov r0, #0xe
	mov r1, #0
	lsl r0, r0, #6
	str r1, [r4, r0]
	add r0, r0, #4
	str r1, [r4, r0]
_021FD5D2:
	ldrb r1, [r6, #4]
	ldrb r2, [r6, #5]
	ldr r0, [sp, #0x30]
	bl ov96_021FDE6C
	ldr r1, [sp, #0x34]
	add r2, r0, #0
	lsl r1, r1, #0x18
	ldr r0, [sp, #0x30]
	lsr r1, r1, #0x18
	bl ov96_021FFE5C
	add r0, r5, #0
	add r0, #0xcd
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FD674
	add r0, r5, #0
	add r0, #0xce
	ldrb r1, [r0]
	cmp r1, #1
	bne _021FD622
	ldrb r0, [r6, #8]
	cmp r0, #1
	bne _021FD622
	add r0, r5, #0
	add r0, #0xbb
	ldrb r0, [r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	add r0, r5, #0
	add r0, #0xbb
	strb r1, [r0]
	add r1, r5, #0
	add r1, #0xce
	mov r0, #2
	strb r0, [r1]
	b _021FD640
_021FD622:
	cmp r1, #2
	bne _021FD640
	ldrb r0, [r6, #8]
	cmp r0, #2
	bne _021FD640
	add r1, r5, #0
	add r1, #0xce
	mov r0, #0
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xcd
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xd3
	strb r0, [r1]
_021FD640:
	mov r0, #0x3b
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r7, r0]
	add r1, r5, #0
	add r1, #0xdc
	mov r0, #0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe4
	str r0, [r1]
	add r1, r5, #0
	add r3, r5, #0
	add r1, #0xe8
	add r2, r5, #0
	add r3, #0xe0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xec
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021FD994
_021FD674:
	add r0, r5, #0
	add r0, #0xbb
	ldrb r1, [r0]
	mov r0, #0x1c
	mul r0, r1
	add r0, r5, r0
	add r0, #0x60
	ldrb r0, [r0]
	cmp r0, #2
	bne _021FD6BC
	mov r0, #0x3b
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r7, r0]
	add r1, r5, #0
	add r1, #0xdc
	mov r0, #0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe4
	str r0, [r1]
	add r1, r5, #0
	add r3, r5, #0
	add r1, #0xe8
	add r2, r5, #0
	add r3, #0xe0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xec
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021FD994
_021FD6BC:
	add r0, r5, #0
	add r0, #0xd9
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FD6FA
	mov r0, #0x3b
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r7, r0]
	add r1, r5, #0
	add r1, #0xdc
	mov r0, #0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe4
	str r0, [r1]
	add r1, r5, #0
	add r3, r5, #0
	add r1, #0xe8
	add r2, r5, #0
	add r3, #0xe0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xec
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021FD994
_021FD6FA:
	mov r0, #0
	str r0, [sp, #0x28]
	mov r0, #0xe
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021FD786
	ldrb r1, [r6, #4]
	ldrb r2, [r6, #5]
	ldr r0, [sp, #0x30]
	bl ov96_021FDE6C
	cmp r0, #0
	beq _021FD73C
	add r1, r5, #0
	add r1, #0xcd
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xce
	strb r0, [r1]
	mov r1, #1
	add r2, r5, #0
	str r0, [sp]
	lsl r1, r1, #8
	add r2, #0xbb
	ldrb r1, [r5, r1]
	ldrb r2, [r2]
	ldr r0, [sp, #4]
	mov r3, #7
	bl ov96_021E8228
	b _021FD804
_021FD73C:
	ldr r1, [sp, #0x34]
	ldrb r2, [r6, #4]
	lsl r1, r1, #0x18
	ldrb r3, [r6, #5]
	ldr r0, [sp, #0x30]
	lsr r1, r1, #0x18
	bl ov96_021FDE08
	cmp r0, #0
	beq _021FD804
	mov r0, #0x3b
	mov r1, #1
	lsl r0, r0, #4
	str r1, [r7, r0]
	ldrb r0, [r6, #4]
	add r3, r5, #0
	add r2, r5, #0
	lsl r1, r0, #0xc
	add r0, r5, #0
	add r0, #0xe0
	str r1, [r0]
	ldrb r0, [r6, #5]
	add r3, #0xe0
	add r2, #0xec
	lsl r1, r0, #0xc
	add r0, r5, #0
	add r0, #0xe4
	str r1, [r0]
	add r1, r5, #0
	add r1, #0xe8
	mov r0, #0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _021FD804
_021FD786:
	mov r0, #0xe1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021FD7D4
	add r0, r5, #0
	add r0, #0xdc
	ldr r0, [r0]
	cmp r0, #0xff
	bge _021FD7AA
	add r0, r5, #0
	add r0, #0xdc
	ldr r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0xdc
	str r1, [r0]
	b _021FD7B2
_021FD7AA:
	ldr r1, [sp, #0x30]
	ldr r0, _021FDA1C ; =0x000003C2
	mov r2, #1
	strb r2, [r1, r0]
_021FD7B2:
	mov r0, #0x3b
	lsl r0, r0, #4
	ldr r0, [r7, r0]
	cmp r0, #0
	bne _021FD7BE
	b _021FD994
_021FD7BE:
	ldrb r0, [r6, #4]
	lsl r1, r0, #0xc
	add r0, r5, #0
	add r0, #0xec
	str r1, [r0]
	ldrb r0, [r6, #5]
	lsl r1, r0, #0xc
	add r0, r5, #0
	add r0, #0xf0
	str r1, [r0]
	b _021FD804
_021FD7D4:
	mov r0, #0x3b
	lsl r0, r0, #4
	ldr r0, [r7, r0]
	cmp r0, #0
	beq _021FD800
	add r0, r5, #0
	add r0, #0xdc
	ldr r0, [r0]
	cmp r0, #0x1e
	bgt _021FD7F0
	add r1, r5, #0
	add r1, #0xda
	mov r0, #1
	strb r0, [r1]
_021FD7F0:
	mov r0, #0x3b
	mov r1, #0
	lsl r0, r0, #4
	str r1, [r7, r0]
	add r2, r1, #0
	ldr r1, [sp, #0x30]
	add r0, #0x12
	strb r2, [r1, r0]
_021FD800:
	mov r0, #1
	str r0, [sp, #0x28]
_021FD804:
	add r0, r5, #0
	add r0, #0xda
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FD810
	b _021FD964
_021FD810:
	mov r1, #0
	add r0, sp, #0x44
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r5, #0
	add r0, #0xbb
	ldrb r1, [r0]
	mov r0, #0x1c
	mul r0, r1
	add r2, r5, r0
	ldr r0, [r2, #0x48]
	ldr r6, [r2, #0x4c]
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x18]
	bl ov96_021FF6DC
	str r0, [sp, #0x20]
	ldr r0, [sp, #0x24]
	add r1, r6, #0
	bl _fmul
	bl _f2d
	ldr r3, _021FDA20 ; =0x40200000
	mov r2, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FDA24 ; =0x40B00000
	mov r0, #0
	bl _dmul
	bl _dtoi
	add r6, r0, #0
	ldr r0, [sp, #0x10]
	ldr r1, [sp, #0x14]
	add r2, sp, #0x50
	bl VEC_Subtract
	ldr r1, [sp, #0x50]
	cmp r1, #0
	bge _021FD89C
	ldr r0, _021FDA28 ; =0xFFFF0000
	cmp r1, r0
	bge _021FD894
	add r1, r5, #0
	add r1, #0xcd
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xce
	strb r0, [r1]
	mov r1, #1
	add r2, r5, #0
	str r0, [sp]
	lsl r1, r1, #8
	add r2, #0xbb
	ldrb r1, [r5, r1]
	ldrb r2, [r2]
	ldr r0, [sp, #4]
	mov r3, #7
	bl ov96_021E8228
_021FD894:
	mov r0, #0
	str r0, [sp, #0x50]
	str r0, [sp, #0x54]
	str r0, [sp, #0x58]
_021FD89C:
	add r1, sp, #0x50
	add r0, r6, #0
	add r2, sp, #0x44
	add r3, r1, #0
	bl VEC_MultAdd
	add r0, sp, #0x50
	bl VEC_Mag
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	bl _itof
	add r3, r5, #0
	add r3, #0xbc
	add r2, sp, #0x5c
	ldmia r3!, {r0, r1}
	add r6, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, sp, #0x50
	str r0, [r2]
	add r0, r6, #0
	add r2, r6, #0
	bl ov96_021FF72C
	add r0, r6, #0
	bl VEC_Mag
	bl _itof
	add r6, r0, #0
	ldr r0, _021FDA2C ; =0x45800000
	ldr r1, [sp, #0x20]
	bl _fmul
	add r1, r0, #0
	add r0, r6, #0
	bl _fgr
	bls _021FD91C
	mov r1, #0
	add r0, sp, #0x38
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, sp, #0x5c
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, _021FDA2C ; =0x45800000
	ldr r1, [sp, #0x20]
	bl _fmul
	bl _ftoi
	ldr r3, [sp, #0xc]
	add r1, sp, #0x5c
	add r2, sp, #0x38
	bl VEC_MultAdd
	b _021FD926
_021FD91C:
	ldr r0, [sp, #8]
	ldr r2, [sp, #0xc]
	add r1, sp, #0x50
	bl ov96_021FF72C
_021FD926:
	ldr r0, [sp, #0x18]
	add r0, #0x8c
	bl VEC_Mag
	ldr r1, [sp, #0x18]
	add r1, #0x8b
	ldrb r2, [r1]
	mov r1, #0x1c
	add r3, r2, #0
	mul r3, r1
	ldr r1, [sp, #0x18]
	add r1, r1, r3
	add r1, #0x2e
	ldrb r1, [r1]
	sub r1, r1, #3
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _021FD95C
	ldr r1, [sp, #0x18]
	mov r0, #1
	str r0, [sp]
	add r1, #0xd0
	ldrb r1, [r1]
	ldr r0, [sp, #4]
	mov r3, #6
	bl ov96_021E8228
_021FD95C:
	add r1, r5, #0
	add r1, #0xda
	mov r0, #0
	strb r0, [r1]
_021FD964:
	ldr r0, [sp, #0x28]
	cmp r0, #0
	beq _021FD994
	add r1, r5, #0
	add r1, #0xdc
	mov r0, #0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe0
	str r0, [r1]
	add r1, r5, #0
	add r1, #0xe4
	str r0, [r1]
	add r1, r5, #0
	add r3, r5, #0
	add r1, #0xe8
	add r2, r5, #0
	add r3, #0xe0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xec
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_021FD994:
	ldr r0, [sp, #0x1c]
	add r4, #0xc
	add r0, #0x28
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	add r5, #0xd4
	add r0, #0xd4
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r7, r7, #4
	add r0, #0xd4
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, #0xd4
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, #0xd4
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r0, #0xd4
	str r0, [sp, #8]
	ldr r0, [sp, #0x34]
	add r0, r0, #1
	str r0, [sp, #0x34]
	cmp r0, #4
	bge _021FD9CA
	b _021FD580
_021FD9CA:
	mov r2, #0xf7
	ldr r1, [sp, #0x30]
	lsl r2, r2, #2
	ldr r1, [r1, r2]
	mov r3, #0x19
	ldr r2, [sp, #0x30]
	lsl r3, r3, #6
	ldrh r2, [r2, r3]
	ldr r0, [sp, #4]
	bl ov96_02200EF4
	ldr r0, [sp, #4]
	bl ov96_021FDE7C
	mov r1, #0x19
	ldr r0, [sp, #0x30]
	lsl r1, r1, #6
	ldrh r0, [r0, r1]
	cmp r0, #0
	bne _021FD9FC
	mov r1, #0xf
	mov r2, #1
	lsl r1, r1, #6
	ldr r0, [sp, #0x30]
	b _021FDA04
_021FD9FC:
	mov r1, #0xf
	ldr r0, [sp, #0x30]
	mov r2, #0
	lsl r1, r1, #6
_021FDA04:
	strb r2, [r0, r1]
	ldr r0, [sp, #0x2c]
	add r0, #0x28
	str r0, [sp, #0x2c]
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x30]
	bl ov96_021FDA30
_021FDA18:
	add sp, #0x68
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FDA1C: .word 0x000003C2
_021FDA20: .word 0x40200000
_021FDA24: .word 0x40B00000
_021FDA28: .word 0xFFFF0000
_021FDA2C: .word 0x45800000
	thumb_func_end ov96_021FD4D0

	thumb_func_start ov96_021FDA30
ov96_021FDA30: ; 0x021FDA30
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	mov r2, #0
	str r0, [sp]
	mov lr, r2
	add r0, r2, #0
	str r0, [sp, #0x14]
	ldr r3, [sp]
	mov r0, lr
	str r0, [sp, #0x10]
	add r0, r1, #0
	str r1, [sp, #4]
	add r7, r2, #0
	add r3, #0x30
	str r0, [sp, #0xc]
	mov r6, lr
_021FDA50:
	add r0, r3, #0
	add r0, #0x8b
	add r4, r3, #0
	add r4, #0xa2
	ldrb r4, [r4]
	ldrb r0, [r0]
	mov r1, #0
	lsl r4, r4, #2
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r0, r0, r4
	mov ip, r0
	add r0, r3, #0
	add r0, #0x9e
	ldrb r4, [r0]
	ldr r0, [sp, #0x10]
	lsl r4, r0
	mov r0, lr
	add r0, r0, r4
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov lr, r0
	add r0, r3, #0
	add r0, #0x9d
	ldrb r0, [r0]
	lsl r4, r0, #7
	add r0, r3, #0
	add r0, #0x9c
	ldrb r0, [r0]
	add r5, r4, r0
	ldr r0, [sp, #4]
	add r0, r0, r7
	str r0, [sp, #8]
	add r0, r3, #0
	add r0, #0x80
	ldr r4, [r0]
	asr r0, r4, #0xb
	lsr r0, r0, #0x14
	add r0, r4, r0
	asr r4, r0, #0xc
	ldr r0, [sp, #8]
	strb r4, [r0, #8]
	ldr r4, [r3, #0x7c]
	asr r0, r4, #0xb
	lsr r0, r0, #0x14
	add r0, r4, r0
	asr r4, r0, #0xc
	ldr r0, [sp, #0xc]
	strh r4, [r0]
	ldr r0, [sp, #8]
	mov r4, ip
	strb r4, [r0, #0xc]
	strb r5, [r0, #0x10]
	add r4, r3, #0
_021FDABE:
	add r0, r4, #0
	add r0, #0x30
	ldrb r0, [r0]
	add r5, r1, r6
	lsl r5, r5, #1
	lsl r0, r5
	add r1, r1, #1
	add r2, r2, r0
	add r4, #0x1c
	cmp r1, #3
	blt _021FDABE
	ldr r0, [sp]
	ldr r4, _021FDB60 ; =0x00000644
	add r0, r0, r7
	ldrb r1, [r0, r4]
	ldr r0, [sp, #8]
	add r6, r6, #3
	strb r1, [r0, #0x1e]
	add r0, r3, #0
	add r0, #0xd1
	ldrb r0, [r0]
	add r3, #0xd4
	add r1, r0, #0
	lsl r1, r7
	ldr r0, [sp, #0x14]
	add r7, r7, #1
	add r0, r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, r0, #2
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, r0, #2
	str r0, [sp, #0xc]
	cmp r7, #4
	blt _021FDA50
	ldr r0, [sp, #4]
	mov r1, lr
	strb r1, [r0, #0x1d]
	str r2, [r0, #0x14]
	mov r1, #0xf
	ldr r0, [sp]
	lsl r1, r1, #6
	ldrb r0, [r0, r1]
	add r1, r4, #0
	sub r1, #8
	lsl r0, r0, #0x18
	add r2, r2, r0
	ldr r0, [sp, #4]
	str r2, [r0, #0x14]
	ldr r0, [sp]
	ldrb r0, [r0, r1]
	lsl r0, r0, #0x19
	add r1, r2, r0
	ldr r0, [sp, #4]
	str r1, [r0, #0x14]
	ldr r0, [sp, #0x14]
	lsl r0, r0, #0x1a
	add r1, r1, r0
	ldr r0, [sp, #4]
	str r1, [r0, #0x14]
	ldr r0, [sp]
	sub r1, r4, #6
	ldrh r1, [r0, r1]
	ldr r0, [sp, #4]
	strh r1, [r0, #0x1a]
	ldr r0, [sp]
	sub r1, r4, #7
	ldrb r1, [r0, r1]
	ldr r0, [sp, #4]
	strb r1, [r0, #0x1c]
	ldr r0, [sp]
	sub r1, r4, #4
	ldrh r1, [r0, r1]
	ldr r0, [sp, #4]
	strh r1, [r0, #0x18]
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FDB60: .word 0x00000644
	thumb_func_end ov96_021FDA30

	thumb_func_start ov96_021FDB64
ov96_021FDB64: ; 0x021FDB64
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #4]
	add r0, r7, #0
	bl ov96_021E5F54
	add r5, r0, #0
	bl ov96_021E8A20
	add r4, r0, #0
	mov r0, #0
	add r5, #0xf0
	str r0, [r4]
	add r0, r5, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x14]
	mov r1, #1
	asr r0, r0, #0x18
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021FDC30
	ldr r0, [sp, #4]
	mov r2, #0
	ldr r0, [r0, #0x28]
	bl ov96_021EB52C
	ldr r0, [sp, #4]
	mov r1, #0
	ldr r0, [r0, #0x20]
	bl sub_02024830
	ldr r0, [sp, #4]
	mov r1, #0
	ldr r0, [r0, #0x24]
	bl sub_02024830
	ldr r0, [sp, #4]
	mov r1, #1
	ldr r0, [r0, #0x18]
	bl ov96_021EB63C
	mov r1, #0xf2
	ldr r0, [sp, #4]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	mov r1, #1
	bl ov96_021EB144
	ldr r1, _021FDC74 ; =ov96_021FFEE8
	add r0, r7, #0
	bl ov96_021E8324
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _021FDC2A
	mov r5, #0
_021FDBE2:
	mov r0, #0xd4
	add r1, r5, #0
	mul r1, r0
	ldr r0, [sp, #4]
	mov r4, #0
	add r6, r0, r1
_021FDBEE:
	lsl r0, r4, #2
	add r0, r6, r0
	ldr r1, [r0, #0x3c]
	add r2, r4, #0
	asr r0, r1, #9
	lsr r0, r0, #0x16
	add r0, r1, r0
	asr r1, r0, #0xa
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	add r0, r7, #0
	add r1, r5, #0
	mov r3, #3
	bl ov96_021E8228
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _021FDBEE
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #4
	blo _021FDBE2
_021FDC2A:
	add sp, #8
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_021FDC30:
	bl sub_02025358
	cmp r0, #0
	beq _021FDC52
	add r0, r7, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r7, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_021FDC52:
	bl sub_0202534C
	cmp r0, #0
	beq _021FDC68
	ldr r0, _021FDC78 ; =gMain + 0x40
	ldrh r1, [r0, #0x20]
	strb r1, [r4, #4]
	ldrh r0, [r0, #0x22]
	strb r0, [r4, #5]
	mov r0, #1
	str r0, [r4]
_021FDC68:
	add r0, r7, #0
	bl ov96_021FDC7C
	mov r0, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FDC74: .word ov96_021FFEE8
_021FDC78: .word gMain + 0x40
	thumb_func_end ov96_021FDB64

	thumb_func_start ov96_021FDC7C
ov96_021FDC7C: ; 0x021FDC7C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	str r0, [sp, #8]
	add r0, #0xf0
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	mov r5, #0
	add r6, r7, #0
_021FDCA8:
	mov r0, #0x3e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldrh r2, [r6]
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	bl ov96_0220050C
	add r5, r5, #1
	add r6, r6, #2
	cmp r5, #4
	blt _021FDCA8
	ldr r0, [sp, #4]
	mov r1, #0
	lsl r5, r0, #1
	ldrh r3, [r7, r5]
	ldr r0, [r4]
	add r2, r1, #0
	bl sub_0201F238
	ldrh r3, [r7, r5]
	ldr r0, [r4]
	mov r1, #1
	mov r2, #0
	lsr r3, r3, #1
	bl sub_0201F238
	ldrh r3, [r7, r5]
	ldr r0, [r4]
	mov r1, #2
	mov r2, #0
	lsl r3, r3, #1
	bl sub_0201F238
	add r2, r4, #0
	ldr r0, [sp]
	ldr r1, [sp, #4]
	ldr r3, [sp, #8]
	add r2, #0x30
	bl ov96_021FE550
	ldrh r1, [r7, r5]
	add r0, r4, #0
	bl ov96_021FEAEC
	ldr r0, [sp, #4]
	add r0, r7, r0
	ldrb r1, [r0, #0x10]
	mov r0, #0x7f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	ldr r0, [r7, #0x14]
	asr r1, r0, #0x1a
	mov r0, #0xf
	and r0, r1
	lsl r0, r0, #0x18
	ldr r1, [sp, #4]
	lsr r0, r0, #0x18
	asr r0, r1
	mov r1, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021FDD2E
	mov r2, #0
	b _021FDD30
_021FDD2E:
	ldrh r2, [r7, r5]
_021FDD30:
	mov r0, #0x3e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	add r1, r6, #0
	bl ov96_022005B4
	ldr r0, [r7, #0x14]
	asr r1, r0, #0x18
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bne _021FDD54
	add r0, r4, #0
	add r0, #0x20
	add r1, r6, #0
	bl ov96_021FFC34
_021FDD54:
	mov r0, #0x3e
	lsl r0, r0, #4
	ldrh r1, [r7, #0x18]
	ldr r0, [r4, r0]
	bl ov96_02200A64
	ldr r0, [sp, #4]
	add r0, r7, r0
	ldrb r0, [r0, #0x1e]
	cmp r0, #4
	bhi _021FDDE6
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FDD76: ; jump table
	.short _021FDD80 - _021FDD76 - 2 ; case 0
	.short _021FDDD8 - _021FDD76 - 2 ; case 1
	.short _021FDDA0 - _021FDD76 - 2 ; case 2
	.short _021FDD90 - _021FDD76 - 2 ; case 3
	.short _021FDDBC - _021FDD76 - 2 ; case 4
_021FDD80:
	ldr r0, _021FDDFC ; =0x00000642
	mov r1, #0
	strh r1, [r4, r0]
	ldr r0, [r4, #0x1c]
	mov r1, #0xb
	bl ov96_021EB570
	b _021FDDE6
_021FDD90:
	ldr r0, _021FDDFC ; =0x00000642
	mov r1, #0
	strh r1, [r4, r0]
	ldr r0, [r4, #0x1c]
	mov r1, #0xd
	bl ov96_021EB570
	b _021FDDE6
_021FDDA0:
	ldr r0, _021FDDFC ; =0x00000642
	ldrh r1, [r4, r0]
	cmp r1, #0
	bne _021FDDB2
	mov r1, #1
	strh r1, [r4, r0]
	ldr r0, _021FDE00 ; =0x0000089B
	bl PlaySE
_021FDDB2:
	ldr r0, [r4, #0x1c]
	mov r1, #0xc
	bl ov96_021EB570
	b _021FDDE6
_021FDDBC:
	ldr r0, _021FDDFC ; =0x00000642
	ldrh r1, [r4, r0]
	cmp r1, #0
	bne _021FDDCE
	mov r1, #1
	strh r1, [r4, r0]
	ldr r0, _021FDE04 ; =0x0000089C
	bl PlaySE
_021FDDCE:
	ldr r0, [r4, #0x1c]
	mov r1, #0xe
	bl ov96_021EB570
	b _021FDDE6
_021FDDD8:
	ldr r0, _021FDDFC ; =0x00000642
	mov r1, #0
	strh r1, [r4, r0]
	ldr r0, [r4, #0x1c]
	mov r1, #0xf
	bl ov96_021EB570
_021FDDE6:
	ldrh r1, [r7, r5]
	ldr r0, [r4]
	bl ov96_021FFBD8
	ldrh r1, [r7, #0x18]
	ldr r0, [sp]
	bl ov96_021E6454
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_021FDDFC: .word 0x00000642
_021FDE00: .word 0x0000089B
_021FDE04: .word 0x0000089C
	thumb_func_end ov96_021FDC7C

	thumb_func_start ov96_021FDE08
ov96_021FDE08: ; 0x021FDE08
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r7, r2, #0
	mov r2, #0xd4
	add r0, #0x30
	mul r2, r1
	add r4, r0, r2
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	add r6, r3, #0
	cmp r0, #3
	blo _021FDE26
	bl GF_AssertFail
_021FDE26:
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	mov r1, #0x50
	lsl r0, r0, #2
	ldr r5, [r4, r0]
	add r0, sp, #4
	str r0, [sp]
	add r4, #0x80
	ldr r2, [r4]
	add r0, r5, #0
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	add r3, sp, #8
	bl ov96_021EB0A4
	str r6, [sp]
	ldr r1, [sp, #8]
	ldr r2, [sp, #4]
	add r0, r5, #0
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, r7, #0
	bl ov96_021EB0CC
	cmp r0, #0
	beq _021FDE66
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_021FDE66:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FDE08

	thumb_func_start ov96_021FDE6C
ov96_021FDE6C: ; 0x021FDE6C
	cmp r1, #0x40
	bhs _021FDE78
	cmp r2, #0x20
	bhs _021FDE78
	mov r0, #1
	bx lr
_021FDE78:
	mov r0, #0
	bx lr
	thumb_func_end ov96_021FDE6C

	thumb_func_start ov96_021FDE7C
ov96_021FDE7C: ; 0x021FDE7C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x5c
	str r0, [sp, #8]
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r1, _021FE1B4 ; =0x0000063C
	mov r7, #0
	str r0, [sp, #0x14]
	strb r7, [r0, r1]
	add r4, sp, #0x1c
	add r6, r0, #0
	add r5, #0x30
_021FDE96:
	mov r0, #0
	strb r0, [r4]
	add r0, r6, #0
	add r0, #0xd9
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FDEB2
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x14]
	add r2, r5, #0
	bl ov96_021FE538
	mov r0, #1
	strb r0, [r4]
_021FDEB2:
	add r7, r7, #1
	add r4, r4, #1
	add r6, #0xd4
	add r5, #0xd4
	cmp r7, #4
	blt _021FDE96
	mov r0, #0
	ldr r5, [sp, #0x14]
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	str r0, [sp, #0x10]
	add r5, #0x30
_021FDECA:
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FDED4
	b _021FE51E
_021FDED4:
	add r3, r5, #0
	add r3, #0x7c
	ldmia r3!, {r0, r1}
	add r2, sp, #0x44
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r5, #0
	str r0, [r2]
	add r0, r5, #0
	add r0, #0x7c
	add r1, #0x8c
	add r2, r0, #0
	bl VEC_Add
	add r0, r5, #0
	add r0, #0x8b
	ldrb r0, [r0]
	lsl r0, r0, #2
	add r2, r5, r0
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r2, #0xc]
	ldr r0, [r0]
	add r0, r1, r0
	str r0, [r2, #0xc]
	add r0, r5, #0
	add r0, #0x80
	mov r1, #2
	ldr r0, [r0]
	lsl r1, r1, #0x10
	cmp r0, r1
	bge _021FDF1C
	add r0, r5, #0
	add r0, #0x80
	str r1, [r0]
	b _021FDF2A
_021FDF1C:
	mov r1, #0x2a
	lsl r1, r1, #0xe
	cmp r0, r1
	ble _021FDF2A
	add r0, r5, #0
	add r0, #0x80
	str r1, [r0]
_021FDF2A:
	add r0, r5, #0
	add r0, #0x8b
	ldrb r0, [r0]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl ov96_021EAF8C
	add r2, r0, #0
	add r0, r5, #0
	add r0, #0x7c
	str r0, [sp]
	add r1, r5, #0
	str r0, [sp, #4]
	add r1, #0xcc
	ldr r0, [sp, #0x14]
	ldr r1, [r1]
	add r3, sp, #0x44
	bl ov96_021FF5A8
	asr r1, r0, #8
	lsl r1, r1, #0x18
	lsl r0, r0, #0x18
	lsr r1, r1, #0x18
	lsr r0, r0, #0x18
	cmp r1, #1
	bne _021FDF62
	mov r2, #1
	b _021FDF64
_021FDF62:
	mov r2, #0
_021FDF64:
	add r1, r5, #0
	add r1, #0xa5
	strb r2, [r1]
	add r1, r5, #0
	add r1, #0xcc
	str r0, [r1]
	cmp r0, #9
	bhi _021FDFFE
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FDF80: ; jump table
	.short _021FE10C - _021FDF80 - 2 ; case 0
	.short _021FE10C - _021FDF80 - 2 ; case 1
	.short _021FDF94 - _021FDF80 - 2 ; case 2
	.short _021FDFB4 - _021FDF80 - 2 ; case 3
	.short _021FDFD4 - _021FDF80 - 2 ; case 4
	.short _021FDFF4 - _021FDF80 - 2 ; case 5
	.short _021FE016 - _021FDF80 - 2 ; case 6
	.short _021FE054 - _021FDF80 - 2 ; case 7
	.short _021FE092 - _021FDF80 - 2 ; case 8
	.short _021FE0D0 - _021FDF80 - 2 ; case 9
_021FDF94:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	ble _021FDFFE
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
	b _021FE10C
_021FDFB4:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	bge _021FDFFE
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
	b _021FE10C
_021FDFD4:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	bge _021FDFFE
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
	b _021FE10C
_021FDFF4:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	bgt _021FE000
_021FDFFE:
	b _021FE10C
_021FE000:
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
	b _021FE10C
_021FE016:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	ble _021FE034
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
_021FE034:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	ble _021FE10C
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
	b _021FE10C
_021FE054:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	bge _021FE072
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
_021FE072:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	ble _021FE10C
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
	b _021FE10C
_021FE092:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	bge _021FE0B0
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
_021FE0B0:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	bge _021FE10C
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
	b _021FE10C
_021FE0D0:
	add r0, r5, #0
	add r0, #0x8c
	ldr r0, [r0]
	cmp r0, #0
	ble _021FE0EE
	add r0, r5, #0
	add r0, #0x8c
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x8c
	str r2, [r0]
_021FE0EE:
	add r0, r5, #0
	add r0, #0x90
	ldr r0, [r0]
	cmp r0, #0
	bge _021FE10C
	add r0, r5, #0
	add r0, #0x90
	ldr r1, [r0]
	mov r0, #0
	mvn r0, r0
	add r2, r1, #0
	mul r2, r0
	add r0, r5, #0
	add r0, #0x90
	str r2, [r0]
_021FE10C:
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #8]
	add r1, #0x30
	add r2, sp, #0x50
	bl ov96_021FF764
	ldr r1, _021FE1B4 ; =0x0000063C
	ldr r2, [sp, #0x14]
	ldrb r2, [r2, r1]
	cmp r2, #0
	bne _021FE14C
	cmp r0, #0
	beq _021FE14C
	ldr r0, [sp, #0x14]
	mov r2, #1
	strb r2, [r0, r1]
	ldr r2, [sp, #0x50]
	asr r0, r2, #0xb
	lsr r0, r0, #0x14
	add r0, r2, r0
	asr r3, r0, #0xc
	add r2, r1, #2
	ldr r0, [sp, #0x14]
	add r1, r1, #1
	strh r3, [r0, r2]
	ldr r2, [sp, #0x54]
	asr r0, r2, #0xb
	lsr r0, r0, #0x14
	add r0, r2, r0
	asr r2, r0, #0xc
	ldr r0, [sp, #0x14]
	strb r2, [r0, r1]
_021FE14C:
	ldr r4, [r5, #0x7c]
	add r0, r4, #0
	bl _dflt
	ldr r3, _021FE1B8 ; =0x41500000
	mov r2, #0
	bl _dgeq
	blo _021FE1BC
	add r0, r4, #0
	bl _dflt
	ldr r3, _021FE1B8 ; =0x41500000
	mov r2, #0
	bl _dsub
	bl _dtoi
	str r0, [r5, #0x7c]
	add r0, r5, #0
	add r0, #0xd1
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FE194
	add r0, r5, #0
	add r0, #0x9c
	ldrb r0, [r0]
	cmp r0, #0x3c
	bhs _021FE194
	add r0, r5, #0
	add r0, #0x9c
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0x9c
	strb r1, [r0]
_021FE194:
	add r0, r5, #0
	add r0, #0x9c
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xa8
	ldrb r0, [r0]
	cmp r0, r1
	bhs _021FE1AA
	add r0, r5, #0
	add r0, #0xa8
	strb r1, [r0]
_021FE1AA:
	add r0, r5, #0
	mov r1, #0
	add r0, #0xd1
	strb r1, [r0]
	b _021FE1FC
	.balign 4, 0
_021FE1B4: .word 0x0000063C
_021FE1B8: .word 0x41500000
_021FE1BC:
	cmp r4, #0
	bge _021FE1FC
	add r0, r4, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE4EC ; =0x41500000
	mov r0, #0
	bl _dadd
	bl _dtoi
	str r0, [r5, #0x7c]
	add r0, r5, #0
	add r0, #0x9c
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FE1F2
	add r0, r5, #0
	add r0, #0x9c
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0x9c
	strb r1, [r0]
	b _021FE1FC
_021FE1F2:
	bne _021FE1FC
	add r0, r5, #0
	mov r1, #1
	add r0, #0xd1
	strb r1, [r0]
_021FE1FC:
	add r4, r5, #0
	add r4, #0x8c
	ldmia r4!, {r0, r1}
	add r3, sp, #0x38
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	str r0, [r3]
	add r0, r2, #0
	bl VEC_Mag
	add r1, r5, #0
	add r1, #0x9d
	ldrb r1, [r1]
	cmp r1, #0
	bne _021FE28C
	add r1, r5, #0
	add r1, #0xa5
	ldrb r1, [r1]
	cmp r1, #0
	beq _021FE28C
	add r1, r5, #0
	add r1, #0x8b
	ldrb r2, [r1]
	mov r1, #0x1c
	mul r1, r2
	add r1, r5, r1
	add r1, #0x2c
	ldrb r1, [r1]
	lsl r6, r1, #0xc
	cmp r0, r6
	ble _021FE28C
	add r1, sp, #0x2c
	mov r0, #0
	str r0, [r1]
	add r4, r5, #0
	str r0, [r1, #4]
	add r3, sp, #0x20
	add r4, #0x8c
	str r0, [r1, #8]
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, r2, #0
	str r0, [r3]
	add r0, r2, #0
	bl VEC_Normalize
	add r1, sp, #0x20
	add r0, r6, #0
	add r2, sp, #0x2c
	add r3, r1, #0
	bl VEC_MultAdd
	add r3, sp, #0x20
	add r2, r5, #0
	add r2, #0x8c
	ldmia r3!, {r0, r1}
	add r4, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r3, sp, #0x38
	str r0, [r2]
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	str r0, [r3]
	add r0, r2, #0
	bl VEC_Mag
_021FE28C:
	cmp r0, #0
	ble _021FE33E
	mov r0, #0xfe
	lsl r0, r0, #0x16
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _021FE4F0 ; =0x9999999A
	ldr r1, _021FE4F4 ; =0x3FD99999
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE4F8 ; =0x40B00000
	mov r0, #0
	bl _dmul
	bl _dtoi
	add r4, r0, #0
	ldr r1, _021FE4FC ; =0x000003C2
	ldr r0, [sp, #0x14]
	ldrb r0, [r0, r1]
	cmp r0, #0
	beq _021FE2C6
	mov r0, #3
	lsl r0, r0, #0xc
	add r4, r4, r0
_021FE2C6:
	add r0, sp, #0x38
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, [sp, #0x38]
	asr r6, r4, #0x1f
	asr r1, r0, #0x1f
	add r2, r4, #0
	add r3, r6, #0
	bl _ll_mul
	add r2, r0, #0
	mov r0, #2
	mov r3, #0
	lsl r0, r0, #0xa
	add r0, r2, r0
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x3c]
	add r2, r4, #0
	asr r1, r0, #0x1f
	add r3, r6, #0
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r2, r0, r2
	adc r1, r3
	lsl r0, r1, #0x14
	lsr r1, r2, #0xc
	orr r1, r0
	add r0, sp, #0x38
	str r1, [sp, #0x3c]
	bl VEC_Mag
	add r4, r0, #0
	add r0, r5, #0
	add r0, #0x8c
	bl VEC_Mag
	cmp r0, r4
	blt _021FE330
	add r0, r5, #0
	add r0, #0x8c
	add r1, sp, #0x38
	add r2, r0, #0
	bl VEC_Subtract
	b _021FE33E
_021FE330:
	add r0, r5, #0
	mov r1, #0
	add r0, #0x8c
	str r1, [r0]
	add r0, r5, #0
	add r0, #0x90
	str r1, [r0]
_021FE33E:
	add r0, r5, #0
	add r0, #0x8c
	bl VEC_Mag
	add r1, r5, #0
	add r1, #0x8b
	ldrb r2, [r1]
	mov r1, #0x1c
	mul r1, r2
	add r1, r5, r1
	add r1, #0x2e
	ldrb r2, [r1]
	sub r1, r2, #1
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _021FE368
	add r0, r5, #0
	mov r1, #3
	add r0, #0xa2
	strb r1, [r0]
	b _021FE390
_021FE368:
	sub r1, r2, #3
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _021FE37A
	add r0, r5, #0
	mov r1, #2
	add r0, #0xa2
	strb r1, [r0]
	b _021FE390
_021FE37A:
	cmp r0, #0
	bne _021FE388
	add r0, r5, #0
	mov r1, #0
	add r0, #0xa2
	strb r1, [r0]
	b _021FE390
_021FE388:
	add r0, r5, #0
	mov r1, #1
	add r0, #0xa2
	strb r1, [r0]
_021FE390:
	add r0, r5, #0
	add r0, #0x9d
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FE39C
	b _021FE51E
_021FE39C:
	add r0, r5, #0
	str r0, [sp, #0x18]
	add r0, #0xa4
	mov r7, #0
	add r4, r5, #0
	str r0, [sp, #0x18]
_021FE3A8:
	add r0, r5, #0
	add r0, #0x8b
	ldrb r0, [r0]
	ldr r6, [r4, #0x24]
	cmp r7, r0
	bne _021FE454
	add r0, r4, #0
	add r0, #0x30
	ldrb r0, [r0]
	cmp r0, #2
	beq _021FE432
	add r0, r5, #0
	add r0, #0xa2
	ldrb r0, [r0]
	cmp r0, #3
	bhi _021FE406
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FE3D4: ; jump table
	.short _021FE3DC - _021FE3D4 - 2 ; case 0
	.short _021FE3F2 - _021FE3D4 - 2 ; case 1
	.short _021FE3F2 - _021FE3D4 - 2 ; case 2
	.short _021FE3F2 - _021FE3D4 - 2 ; case 3
_021FE3DC:
	add r0, r6, #0
	bl _f2d
	ldr r3, _021FE500 ; =0x3FE00000
	mov r2, #0
	bl _dadd
	bl _d2f
	add r6, r0, #0
	b _021FE406
_021FE3F2:
	add r0, r6, #0
	bl _f2d
	ldr r3, _021FE500 ; =0x3FE00000
	mov r2, #0
	bl _dsub
	bl _d2f
	add r6, r0, #0
_021FE406:
	add r0, r5, #0
	add r0, #0xa3
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FE424
	add r0, r6, #0
	bl _f2d
	ldr r3, _021FE504 ; =0x40440000
	mov r2, #0
	bl _dgr
	bls _021FE472
	ldr r6, _021FE508 ; =0x42200000
	b _021FE472
_021FE424:
	ldr r1, [r4, #0x28]
	add r0, r6, #0
	bl _fgr
	bls _021FE472
	ldr r6, [r4, #0x28]
	b _021FE472
_021FE432:
	bne _021FE472
	ldr r0, [sp, #0x18]
	ldrb r0, [r0]
	sub r1, r0, #1
	ldr r0, [sp, #0x18]
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xa4
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FE472
	add r1, r4, #0
	add r1, #0x30
	mov r0, #1
	strb r0, [r1]
	ldr r6, _021FE508 ; =0x42200000
	b _021FE472
_021FE454:
	add r0, r6, #0
	bl _f2d
	ldr r3, _021FE500 ; =0x3FE00000
	mov r2, #0
	bl _dadd
	bl _d2f
	ldr r1, [r4, #0x28]
	add r6, r0, #0
	bl _fgr
	bls _021FE472
	ldr r6, [r4, #0x28]
_021FE472:
	add r0, r6, #0
	mov r1, #0
	bl _fleq
	bhi _021FE4CE
	add r0, r5, #0
	add r0, #0x8b
	ldrb r0, [r0]
	cmp r7, r0
	beq _021FE48A
	bl GF_AssertFail
_021FE48A:
	mov r0, #0
	str r0, [r4, #0x24]
	add r0, r4, #0
	add r0, #0x30
	ldrb r0, [r0]
	cmp r0, #2
	beq _021FE514
	add r1, r4, #0
	add r1, #0x30
	mov r0, #2
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xa3
	mov r0, #1
	strb r0, [r1]
	add r0, r4, #0
	add r0, #0x2f
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xa4
	strb r1, [r0]
	mov r0, #1
	add r1, r5, #0
	add r2, r5, #0
	str r0, [sp]
	add r1, #0xd0
	add r2, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	mov r3, #1
	bl ov96_021E8228
	b _021FE514
_021FE4CE:
	add r0, r6, #0
	bl _f2d
	ldr r3, _021FE504 ; =0x40440000
	mov r2, #0
	bl _dleq
	str r6, [r4, #0x24]
	bhi _021FE50C
	add r1, r4, #0
	add r1, #0x30
	mov r0, #1
	strb r0, [r1]
	b _021FE514
	nop
_021FE4EC: .word 0x41500000
_021FE4F0: .word 0x9999999A
_021FE4F4: .word 0x3FD99999
_021FE4F8: .word 0x40B00000
_021FE4FC: .word 0x000003C2
_021FE500: .word 0x3FE00000
_021FE504: .word 0x40440000
_021FE508: .word 0x42200000
_021FE50C:
	add r1, r4, #0
	add r1, #0x30
	mov r0, #0
	strb r0, [r1]
_021FE514:
	add r7, r7, #1
	add r4, #0x1c
	cmp r7, #3
	bge _021FE51E
	b _021FE3A8
_021FE51E:
	ldr r0, [sp, #0x10]
	add r5, #0xd4
	add r0, r0, #1
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	bge _021FE532
	b _021FDECA
_021FE532:
	add sp, #0x5c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FDE7C

	thumb_func_start ov96_021FE538
ov96_021FE538: ; 0x021FE538
	add r0, r2, #0
	add r0, #0xa9
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FE54E
	add r0, r2, #0
	add r0, #0xa9
	ldrb r0, [r0]
	add r2, #0xa9
	sub r0, r0, #1
	strb r0, [r2]
_021FE54E:
	bx lr
	thumb_func_end ov96_021FE538

	thumb_func_start ov96_021FE550
ov96_021FE550: ; 0x021FE550
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x88
	str r0, [sp, #0x18]
	add r0, r3, #0
	add r0, #0xf0
	str r1, [sp, #0x1c]
	add r5, r2, #0
	str r3, [sp, #0x20]
	bl ov96_021E8A20
	str r0, [sp, #0x58]
	ldr r0, [sp, #0x18]
	bl ov96_021E5DC4
	str r0, [sp, #0x5c]
	ldr r0, [sp, #0x1c]
	lsl r1, r0, #1
	ldr r0, [sp, #0x58]
	ldrh r0, [r0, r1]
	add r1, sp, #0x7c
	str r0, [sp, #0x60]
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [sp, #0x58]
	ldr r0, [r0, #0x14]
	asr r1, r0, #0x19
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _021FE64E
	ldr r0, [sp, #0x58]
	ldrh r1, [r0, #0x1a]
	ldr r0, [sp, #0x60]
	sub r4, r0, r1
	add r0, r4, #0
	bl _dflt
	ldr r3, _021FE8C4 ; =0x40880000
	mov r2, #0
	bl _dgeq
	blo _021FE5D0
	add r0, r4, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE8C8 ; =0x40900000
	mov r0, #0
	bl _dsub
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE8CC ; =0x40540000
	mov r0, #0
	bl _dadd
	bl _dtoi
	add r4, r0, #0
	b _021FE5D4
_021FE5D0:
	mov r0, #0x50
	sub r4, r0, r4
_021FE5D4:
	lsl r0, r4, #0xc
	str r0, [sp, #0x7c]
	ldr r0, [sp, #0x58]
	ldr r1, _021FE8D0 ; =0x000003C3
	ldrb r0, [r0, #0x1c]
	lsl r0, r0, #0xc
	str r0, [sp, #0x80]
	ldr r0, [sp, #0x5c]
	ldrb r0, [r0, r1]
	add r1, #9
	lsl r2, r0, #2
	ldr r0, [sp, #0x5c]
	add r0, r0, r2
	ldr r0, [r0, r1]
	add r1, sp, #0x7c
	bl ov96_021EB588
	ldr r1, _021FE8D0 ; =0x000003C3
	ldr r0, [sp, #0x5c]
	ldrb r0, [r0, r1]
	add r1, #9
	lsl r2, r0, #2
	ldr r0, [sp, #0x5c]
	add r0, r0, r2
	ldr r0, [r0, r1]
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, _021FE8D0 ; =0x000003C3
	ldr r0, [sp, #0x5c]
	ldrb r0, [r0, r1]
	add r1, #9
	lsl r2, r0, #2
	ldr r0, [sp, #0x5c]
	add r0, r0, r2
	ldr r0, [r0, r1]
	mov r1, #9
	bl ov96_021EB564
	ldr r0, _021FE8D0 ; =0x000003C3
	ldr r1, [sp, #0x5c]
	mov r2, #0x1e
	ldrb r1, [r1, r0]
	add r1, r1, #1
	lsr r3, r1, #0x1f
	lsl r1, r1, #0x1e
	sub r1, r1, r3
	ror r1, r2
	add r3, r3, r1
	ldr r1, [sp, #0x5c]
	cmp r4, #0
	strb r3, [r1, r0]
	blt _021FE64E
	add r2, #0xe2
	cmp r4, r2
	bge _021FE64E
	ldr r0, _021FE8D4 ; =0x000008A3
	mov r1, #5
	bl sub_0200606C
_021FE64E:
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	bne _021FE65A
	mov r0, #1
	str r0, [sp, #0x28]
	b _021FE65E
_021FE65A:
	mov r0, #0
	str r0, [sp, #0x28]
_021FE65E:
	mov r0, #0
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x58]
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x30]
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x20]
	str r0, [sp, #0x3c]
	add r0, #0x50
	str r0, [sp, #0x3c]
_021FE672:
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #0x30]
	cmp r1, r0
	bne _021FE680
	mov r0, #1
	str r0, [sp, #0x24]
	b _021FE684
_021FE680:
	mov r0, #0
	str r0, [sp, #0x24]
_021FE684:
	ldr r1, [sp, #0x58]
	ldr r0, [sp, #0x30]
	add r0, r1, r0
	str r0, [sp, #0x2c]
	ldrb r0, [r0, #0xc]
	mov r1, #3
	str r0, [sp, #0x38]
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x44]
	ldrh r4, [r0]
	ldr r0, [sp, #0x60]
	sub r6, r4, r0
	bl _dflt
	ldr r3, _021FE8D8 ; =0x4086A000
	mov r2, #0
	bl _dgr
	bls _021FE6E8
	mov r0, #0x4b
	lsl r0, r0, #2
	cmp r4, r0
	bhs _021FE738
	ldr r0, [sp, #0x60]
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE8C8 ; =0x40900000
	mov r0, #0
	bl _dsub
	add r7, r0, #0
	add r6, r1, #0
	add r0, r4, #0
	bl _dfltu
	add r2, r0, #0
	add r3, r1, #0
	add r0, r7, #0
	add r1, r6, #0
	bl _dadd
	bl _dtoi
	add r6, r0, #0
	b _021FE738
_021FE6E8:
	ldr r0, [sp, #0x60]
	cmp r0, #0x64
	bge _021FE738
	add r0, r4, #0
	bl _dfltu
	ldr r3, _021FE8DC ; =0x408CE000
	mov r2, #0
	bl _dgr
	bls _021FE738
	ldr r0, [sp, #0x60]
	bl _dflt
	add r7, r0, #0
	add r0, r4, #0
	add r6, r1, #0
	bl _dfltu
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FE8C8 ; =0x40900000
	mov r0, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	add r0, r7, #0
	add r1, r6, #0
	bl _dadd
	add r2, r0, #0
	mov r0, #0
	add r3, r1, #0
	add r1, r0, #0
	bl _dsub
	bl _dtoi
	add r6, r0, #0
_021FE738:
	ldr r1, [sp, #0x58]
	ldr r0, [sp, #0x30]
	add r6, #0x50
	add r1, r1, r0
	ldrb r0, [r1, #0x10]
	asr r2, r0, #7
	mov r0, #1
	and r0, r2
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x50]
	ldr r0, [sp, #0x58]
	ldr r3, [sp, #0x34]
	ldr r2, [sp, #0x40]
	ldr r0, [r0, #0x14]
	add r2, r3, r2
	lsl r2, r2, #0x18
	lsr r2, r2, #0x17
	asr r0, r2
	mov r2, #3
	and r0, r2
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x38]
	asr r0, r0, #2
	and r0, r2
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x4c]
	ldr r0, [sp, #0x34]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	str r0, [sp, #0x54]
	lsl r0, r6, #0xc
	str r0, [sp, #0x70]
	ldrb r0, [r1, #8]
	lsl r0, r0, #0xc
	str r0, [sp, #0x74]
	mov r0, #0
	str r0, [sp, #0x78]
	ldr r0, [sp, #0x18]
	bl ov96_021E5D34
	ldr r1, [sp, #0x30]
	cmp r0, r1
	bgt _021FE79C
	ldr r0, [sp, #0x3c]
	mov r4, #1
	bl ov96_021E8A20
	b _021FE7A4
_021FE79C:
	ldr r0, [sp, #0x20]
	mov r4, #0
	bl ov96_021E8A20
_021FE7A4:
	ldr r2, [sp, #0x1c]
	ldr r1, [sp, #0x30]
	cmp r2, r1
	add r2, sp, #0x70
	bne _021FE7D8
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp]
	ldr r1, [sp, #0x34]
	ldr r3, [sp, #0x58]
	str r1, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [sp, #0x28]
	mov r1, #0x3e
	str r0, [sp, #0xc]
	mov r0, #1
	str r0, [sp, #0x10]
	mov r0, #0
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x5c]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, r5, #0
	bl ov96_021FEECC
	b _021FE7FE
_021FE7D8:
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp]
	ldr r1, [sp, #0x34]
	ldr r3, [sp, #0x58]
	str r1, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [sp, #0x28]
	mov r1, #0x3e
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x5c]
	str r4, [sp, #0x14]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, r5, #0
	bl ov96_021FEECC
_021FE7FE:
	ldr r0, [sp, #0x48]
	mov r1, #0x3e
	str r0, [sp]
	ldr r0, [sp, #0x5c]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x30]
	ldr r2, [sp, #0x34]
	lsl r1, r1, #0x18
	ldr r3, [sp, #0x50]
	lsr r1, r1, #0x18
	bl ov96_02200950
	add r0, r5, #0
	add r0, #0xc8
	ldr r0, [r0]
	cmp r0, #0
	bne _021FE83C
	mov r0, #0x1f
	mvn r0, r0
	cmp r6, r0
	blt _021FE83C
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r6, r0
	bgt _021FE83C
	ldr r0, [sp, #0x54]
	mov r1, #1
	bl ov96_021EAB38
	b _021FE844
_021FE83C:
	ldr r0, [sp, #0x54]
	mov r1, #0
	bl ov96_021EAB38
_021FE844:
	mov r7, #0
	add r4, r5, #0
_021FE848:
	ldr r2, [sp, #0x2c]
	ldr r0, [r4]
	ldrb r2, [r2, #8]
	add r1, r6, #0
	bl ov96_021EAF94
	add r7, r7, #1
	add r4, r4, #4
	cmp r7, #3
	blt _021FE848
	ldr r0, [sp, #0x18]
	bl ov96_021E5F24
	ldr r1, [sp, #0x30]
	cmp r1, r0
	bne _021FE86C
	mov r2, #1
	b _021FE86E
_021FE86C:
	mov r2, #0
_021FE86E:
	ldr r1, [sp, #0x2c]
	add r0, r5, #0
	ldrb r1, [r1, #8]
	bl ov96_021FFB7C
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0x30]
	ldr r2, [sp, #0x34]
	bl ov96_021E60C0
	ldr r2, [r5, #0x6c]
	add r1, sp, #0x70
	bl ov96_021FFAEC
	add r4, sp, #0x70
	add r3, sp, #0x64
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	str r0, [r3]
	mov r0, #6
	ldr r1, [sp, #0x68]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0x68]
	ldr r0, [r5, #0x78]
	add r1, r2, #0
	bl ov96_021EB588
	ldr r0, [sp, #0x50]
	cmp r0, #0
	beq _021FE8B2
	b _021FEA44
_021FE8B2:
	ldr r0, [sp, #0x4c]
	mov r4, #0
	add r7, r4, #0
	cmp r0, #2
	beq _021FE8E0
	cmp r0, #3
	beq _021FE938
	b _021FE990
	nop
_021FE8C4: .word 0x40880000
_021FE8C8: .word 0x40900000
_021FE8CC: .word 0x40540000
_021FE8D0: .word 0x000003C3
_021FE8D4: .word 0x000008A3
_021FE8D8: .word 0x4086A000
_021FE8DC: .word 0x408CE000
_021FE8E0:
	add r0, r5, #0
	add r0, #0xa7
	ldrb r1, [r0]
	ldr r0, [sp, #0x4c]
	cmp r0, r1
	beq _021FE8FE
	mov r1, #1
	ldr r0, [r5, #0x78]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x78]
	mov r1, #4
	bl ov96_021EB564
_021FE8FE:
	ldr r0, [sp, #0x54]
	mov r1, #8
	bl ov96_021EAC5C
	add r0, r5, #0
	add r0, #0xd2
	ldrb r0, [r0]
	mov r4, #1
	cmp r0, #1
	bhi _021FE9AA
	add r0, r5, #0
	add r0, #0xd3
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FE9AA
	ldr r1, _021FEAE8 ; =0x000008A7
	ldr r2, [sp, #0x24]
	add r0, r6, #0
	bl ov96_021FFE38
	add r0, r5, #0
	mov r1, #2
	add r0, #0xd2
	strb r1, [r0]
	add r0, r5, #0
	add r1, r4, #0
	add r0, #0xd3
	strb r1, [r0]
	b _021FE9AA
_021FE938:
	add r0, r5, #0
	add r0, #0xa7
	ldrb r1, [r0]
	ldr r0, [sp, #0x4c]
	cmp r0, r1
	beq _021FE956
	mov r1, #1
	ldr r0, [r5, #0x78]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x78]
	mov r1, #5
	bl ov96_021EB564
_021FE956:
	ldr r0, [sp, #0x54]
	mov r1, #8
	bl ov96_021EAC5C
	add r0, r5, #0
	add r0, #0xd2
	ldrb r0, [r0]
	mov r4, #1
	cmp r0, #1
	bhi _021FE9AA
	add r0, r5, #0
	add r0, #0xd3
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FE9AA
	ldr r1, _021FEAE8 ; =0x000008A7
	ldr r2, [sp, #0x24]
	add r0, r6, #0
	bl ov96_021FFE38
	add r0, r5, #0
	mov r1, #3
	add r0, #0xd2
	strb r1, [r0]
	add r0, r5, #0
	add r1, r4, #0
	add r0, #0xd3
	strb r1, [r0]
	b _021FE9AA
_021FE990:
	ldr r0, [r5, #0x78]
	mov r1, #1
	add r2, r4, #0
	bl ov96_021EB52C
	add r1, r5, #0
	ldr r0, [sp, #0x4c]
	add r1, #0xd2
	strb r0, [r1]
	add r0, r5, #0
	add r1, r4, #0
	add r0, #0xd3
	strb r1, [r0]
_021FE9AA:
	ldr r0, [sp, #0x48]
	cmp r0, #1
	beq _021FE9B6
	cmp r0, #2
	beq _021FE9CA
	b _021FEA28
_021FE9B6:
	mov r1, #1
	ldr r0, [r5, #0x6c]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x6c]
	mov r1, #6
	bl ov96_021EB570
	b _021FEA32
_021FE9CA:
	add r0, r5, #0
	add r0, #0xa6
	ldrb r1, [r0]
	ldr r0, [sp, #0x48]
	cmp r0, r1
	beq _021FE9E8
	mov r1, #1
	ldr r0, [r5, #0x6c]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x6c]
	mov r1, #7
	bl ov96_021EB564
_021FE9E8:
	ldr r0, [sp, #0x54]
	mov r1, #0x15
	bl ov96_021EAC5C
	ldr r0, [sp, #0x24]
	mov r7, #1
	cmp r0, #0
	beq _021FEA10
	mov r0, #3
	bl sub_02006190
	cmp r0, #0
	bne _021FEA32
	mov r1, #0x89
	ldr r2, [sp, #0x24]
	add r0, r6, #0
	lsl r1, r1, #4
	bl ov96_021FFE38
	b _021FEA32
_021FEA10:
	mov r0, #4
	bl sub_02006190
	cmp r0, #0
	bne _021FEA32
	mov r1, #0x89
	ldr r2, [sp, #0x24]
	add r0, r6, #0
	lsl r1, r1, #4
	bl ov96_021FFE38
	b _021FEA32
_021FEA28:
	ldr r0, [r5, #0x6c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_021FEA32:
	cmp r4, #0
	bne _021FEA58
	cmp r7, #0
	bne _021FEA58
	ldr r0, [sp, #0x54]
	mov r1, #0
	bl ov96_021EAC5C
	b _021FEA58
_021FEA44:
	ldr r0, [r5, #0x78]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x6c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_021FEA58:
	add r1, r5, #0
	ldr r0, [sp, #0x4c]
	add r1, #0xa7
	strb r0, [r1]
	add r1, r5, #0
	ldr r0, [sp, #0x48]
	add r1, #0xa6
	strb r0, [r1]
	ldr r0, [sp, #0x44]
	add r5, #0xd4
	add r0, r0, #2
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x40]
	add r0, r0, #3
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x3c]
	add r0, #0x28
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0x30]
	add r0, r0, #1
	str r0, [sp, #0x30]
	cmp r0, #4
	bge _021FEA88
	b _021FE672
_021FEA88:
	mov r1, #0x3e
	ldr r0, [sp, #0x5c]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #0
	bl ov96_02200BC8
	add r4, r0, #0
	mov r1, #0x3e
	ldr r0, [sp, #0x5c]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #1
	bl ov96_02200BC8
	add r6, r0, #0
	ldr r0, [sp, #0x58]
	mov r2, #3
	ldr r5, [r0, #0x14]
	ldr r0, [sp, #0x1c]
	lsl r1, r0, #1
	add r3, r0, r1
	mov r1, #0x3e
	ldr r0, [sp, #0x5c]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, r4, r3
	lsl r1, r1, #0x18
	add r3, r6, r3
	lsl r3, r3, #0x18
	lsr r1, r1, #0x17
	add r4, r5, #0
	asr r4, r1
	add r1, r4, #0
	and r1, r2
	lsl r1, r1, #0x18
	lsr r3, r3, #0x17
	add r4, r5, #0
	asr r4, r3
	and r2, r4
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_02200A18
	add sp, #0x88
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FEAE8: .word 0x000008A7
	thumb_func_end ov96_021FE550

	thumb_func_start ov96_021FEAEC
ov96_021FEAEC: ; 0x021FEAEC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp]
	str r1, [sp, #4]
	mov r6, #0
_021FEAF6:
	mov r0, #0xc
	add r1, r6, #0
	mul r1, r0
	ldr r0, [sp]
	add r4, r0, r1
	ldr r0, _021FEBD4 ; =0x000004D4
	ldr r0, [r4, r0]
	cmp r0, #0
	beq _021FEBD0
	ldr r0, _021FEBD8 ; =0x000004DE
	ldrb r7, [r4, r0]
	sub r0, r0, #2
	ldrh r1, [r4, r0]
	ldr r0, [sp, #4]
	sub r5, r0, r1
	add r0, r5, #0
	bl _dflt
	ldr r3, _021FEBDC ; =0x40880000
	mov r2, #0
	bl _dgeq
	blo _021FEB4A
	add r0, r5, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FEBE0 ; =0x40900000
	mov r0, #0
	bl _dsub
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FEBE4 ; =0x40540000
	mov r0, #0
	bl _dadd
	bl _dtoi
	add r5, r0, #0
	b _021FEB84
_021FEB4A:
	add r0, r5, #0
	bl _dflt
	ldr r3, _021FEBE8 ; =0xC0880000
	mov r2, #0
	bl _dleq
	bhi _021FEB80
	add r0, r5, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FEBE0 ; =0x40900000
	mov r0, #0
	bl _dadd
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FEBE4 ; =0x40540000
	mov r0, #0
	bl _dsub
	bl _dtoi
	add r5, r0, #0
	b _021FEB84
_021FEB80:
	mov r0, #0x50
	sub r5, r0, r5
_021FEB84:
	mov r0, #0
	str r0, [sp, #0x10]
	lsl r0, r5, #0xc
	add r7, #0x20
	str r0, [sp, #8]
	lsl r0, r7, #0xc
	str r0, [sp, #0xc]
	ldr r0, _021FEBEC ; =0x000004D8
	add r1, sp, #8
	ldr r0, [r4, r0]
	bl ov96_021EB588
	mov r0, #0x1f
	mvn r0, r0
	cmp r5, r0
	blt _021FEBBA
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r5, r0
	bgt _021FEBBA
	ldr r0, _021FEBEC ; =0x000004D8
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _021FEBC6
_021FEBBA:
	ldr r0, _021FEBEC ; =0x000004D8
	mov r1, #1
	ldr r0, [r4, r0]
	mov r2, #0
	bl ov96_021EB52C
_021FEBC6:
	add r0, r6, #1
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #0x1e
	blo _021FEAF6
_021FEBD0:
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021FEBD4: .word 0x000004D4
_021FEBD8: .word 0x000004DE
_021FEBDC: .word 0x40880000
_021FEBE0: .word 0x40900000
_021FEBE4: .word 0x40540000
_021FEBE8: .word 0xC0880000
_021FEBEC: .word 0x000004D8
	thumb_func_end ov96_021FEAEC

	thumb_func_start ov96_021FEBF0
ov96_021FEBF0: ; 0x021FEBF0
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r1, #0xa0
	ldrb r1, [r1]
	add r5, r2, #0
	ldr r6, [sp, #0x24]
	cmp r1, #3
	bls _021FEC04
	b _021FED34
_021FEC04:
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_021FEC10: ; jump table
	.short _021FEC18 - _021FEC10 - 2 ; case 0
	.short _021FEC84 - _021FEC10 - 2 ; case 1
	.short _021FECDE - _021FEC10 - 2 ; case 2
	.short _021FED34 - _021FEC10 - 2 ; case 3
_021FEC18:
	ldr r0, [r4, #0x74]
	add r1, r5, #0
	bl ov96_021EB588
	ldr r0, [r4, #0x70]
	add r1, r5, #0
	bl ov96_021EB588
	mov r1, #1
	ldr r0, [r4, #0x70]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r4, #0x70]
	mov r1, #8
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r4, #0x74]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, sp, #0x10
	ldrb r0, [r0, #0x10]
	mov r1, #0
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EAB38
	add r0, r4, #0
	mov r1, #1
	add r0, #0xc8
	str r1, [r0]
	add r0, r4, #0
	mov r1, #0
	add r0, #0xa1
	strb r1, [r0]
	ldr r1, [r5]
	ldr r2, [sp, #0x2c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, _021FED38 ; =0x000008B4
	asr r0, r0, #0xc
	bl ov96_021FFE38
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0xc
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, pc}
_021FEC84:
	ldr r0, [r4, #0x74]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #5
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #4]
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [sp]
	ldr r0, [r4, #0x74]
	bl ov96_021EB588
	ldr r0, [r4, #0x70]
	add r1, r5, #0
	bl ov96_021EB588
	add r0, r4, #0
	add r0, #0xa1
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xa1
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xa1
	ldrb r0, [r0]
	cmp r0, #0x14
	blo _021FED34
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0xc
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, pc}
_021FECDE:
	ldr r1, [sp, #0x2c]
	cmp r1, #0
	beq _021FED04
	add r1, sp, #0x10
	ldrb r1, [r1, #0x10]
	bl ov96_022006BC
	cmp r0, #0
	beq _021FED34
	mov r0, #1
	strb r0, [r6, #8]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0xc
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, pc}
_021FED04:
	ldr r1, [sp, #0x28]
	cmp r1, #0
	beq _021FED28
	add r1, r3, #0
	bl ov96_02200900
	cmp r0, #0
	beq _021FED34
	mov r0, #1
	strb r0, [r6, #8]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0xc
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, pc}
_021FED28:
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add r0, r0, #1
	strb r0, [r4]
_021FED34:
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_021FED38: .word 0x000008B4
	thumb_func_end ov96_021FEBF0

	thumb_func_start ov96_021FED3C
ov96_021FED3C: ; 0x021FED3C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r4, r0, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r5, r1, #0
	add r6, r3, #0
	cmp r0, #3
	bls _021FED50
	b _021FEE56
_021FED50:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_021FED5C: ; jump table
	.short _021FED64 - _021FED5C - 2 ; case 0
	.short _021FEDC2 - _021FED5C - 2 ; case 1
	.short _021FEE1C - _021FED5C - 2 ; case 2
	.short _021FEE46 - _021FED5C - 2 ; case 3
_021FED64:
	add r3, r5, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0xc
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x19
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x10]
	ldr r0, [r4, #0x74]
	add r1, r7, #0
	bl ov96_021EB588
	mov r1, #1
	ldr r0, [r4, #0x74]
	add r2, r1, #0
	bl ov96_021EB52C
	lsl r0, r6, #2
	ldr r0, [r4, r0]
	mov r1, #0
	bl ov96_021EAB38
	add r0, r4, #0
	mov r1, #0
	add r0, #0xa1
	strb r1, [r0]
	ldr r1, [r5]
	ldr r2, [sp, #0x38]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, _021FEE5C ; =0x000008B5
	asr r0, r0, #0xc
	bl ov96_021FFE38
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0x18
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
_021FEDC2:
	ldr r0, [r4, #0x74]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #5
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	add r0, r1, r0
	str r0, [sp, #4]
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [sp]
	ldr r0, [r4, #0x74]
	bl ov96_021EB588
	add r0, r4, #0
	add r0, #0xa1
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xa1
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xa1
	ldrb r0, [r0]
	cmp r0, #0x14
	blo _021FEE56
	ldr r0, [r4, #0x70]
	add r1, r5, #0
	bl ov96_021EB588
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r4, #0xa0
	add sp, #0x18
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
_021FEE1C:
	ldr r0, [sp, #0x34]
	cmp r0, #0
	beq _021FEE28
	ldr r0, [sp, #0x30]
	mov r1, #2
	strb r1, [r0, #8]
_021FEE28:
	ldr r0, [r4, #0x74]
	add r1, r5, #0
	bl ov96_021EB588
	ldr r0, [r4, #0x70]
	add r1, r5, #0
	bl ov96_021EB588
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xa0
	strb r1, [r0]
_021FEE46:
	ldr r0, [r4, #0x74]
	add r1, r5, #0
	bl ov96_021EB588
	ldr r0, [r4, #0x70]
	add r1, r5, #0
	bl ov96_021EB588
_021FEE56:
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FEE5C: .word 0x000008B5
	thumb_func_end ov96_021FED3C

	thumb_func_start ov96_021FEE60
ov96_021FEE60: ; 0x021FEE60
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	lsl r0, r2, #2
	ldr r0, [r5, r0]
	mov r1, #1
	add r4, r3, #0
	bl ov96_021EAB38
	add r0, r5, #0
	mov r1, #0
	add r0, #0xc8
	str r1, [r0]
	mov r1, #1
	ldr r0, [r5, #0x70]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x70]
	mov r1, #8
	bl ov96_021EB564
	ldr r0, [r5, #0x74]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _021FEEA0
	mov r0, #0
	strb r0, [r4, #8]
_021FEEA0:
	ldr r0, [r5, #0x70]
	bl ov96_021EB594
	add r3, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [sp]
	ldr r2, [sp, #0x1c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, _021FEEC8 ; =0x000008B6
	asr r0, r0, #0xc
	bl ov96_021FFE38
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_021FEEC8: .word 0x000008B6
	thumb_func_end ov96_021FEE60

	thumb_func_start ov96_021FEECC
ov96_021FEECC: ; 0x021FEECC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	ldr r7, [sp, #0x40]
	str r0, [sp, #0x10]
	ldr r6, [sp, #0x44]
	mov r0, #0
	str r0, [sp, #0x14]
	add r4, r1, #0
	ldrb r0, [r3, #0x1d]
	lsl r1, r7, #1
	mov ip, r2
	asr r0, r1
	mov r1, #3
	and r0, r1
	add r1, r4, #0
	add r1, #0x9f
	lsl r0, r0, #0x18
	ldrb r1, [r1]
	lsr r0, r0, #0x18
	ldr r5, [sp, #0x50]
	cmp r1, r0
	beq _021FEF0A
	add r1, r4, #0
	add r1, #0x9f
	strb r0, [r1]
	add r1, r4, #0
	ldr r0, [sp, #0x14]
	add r1, #0xa0
	strb r0, [r1]
	mov r0, #1
	str r0, [sp, #0x14]
_021FEF0A:
	add r0, sp, #0x18
	str r0, [sp]
	mov r1, ip
	ldr r2, [r1]
	lsl r0, r6, #2
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	mov r2, ip
	ldr r3, [r2, #4]
	ldr r0, [r4, r0]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #0x1c
	bl ov96_021EB0A4
	ldr r0, [sp, #0x1c]
	lsl r0, r0, #0xc
	str r0, [sp, #0x20]
	ldr r0, [sp, #0x18]
	lsl r0, r0, #0xc
	str r0, [sp, #0x24]
	mov r0, #0
	str r0, [sp, #0x28]
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FEFB0
	cmp r0, #1
	beq _021FEF56
	cmp r0, #2
	beq _021FEF82
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
_021FEF56:
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	beq _021FEF66
	ldr r0, [sp, #0x54]
	cmp r0, #0
	beq _021FEF66
	mov r1, #1
	b _021FEF68
_021FEF66:
	mov r1, #0
_021FEF68:
	ldr r0, [sp, #0x48]
	str r6, [sp]
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [sp, #0x10]
	add r1, r4, #0
	add r2, sp, #0x20
	add r3, r7, #0
	str r5, [sp, #0xc]
	bl ov96_021FEBF0
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
_021FEF82:
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	beq _021FEF92
	ldr r0, [sp, #0x54]
	cmp r0, #0
	beq _021FEF92
	mov r1, #1
	b _021FEF94
_021FEF92:
	mov r1, #0
_021FEF94:
	ldr r0, [sp, #0x48]
	add r2, r7, #0
	str r0, [sp]
	add r0, r1, #0
	orr r0, r5
	str r0, [sp, #4]
	add r0, r4, #0
	add r1, sp, #0x20
	add r3, r6, #0
	str r5, [sp, #8]
	bl ov96_021FED3C
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
_021FEFB0:
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _021FEFDA
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	beq _021FEFC6
	ldr r0, [sp, #0x54]
	cmp r0, #0
	beq _021FEFC6
	mov r0, #1
	b _021FEFC8
_021FEFC6:
	mov r0, #0
_021FEFC8:
	orr r0, r5
	str r0, [sp]
	ldr r3, [sp, #0x48]
	add r0, r4, #0
	add r1, r7, #0
	add r2, r6, #0
	str r5, [sp, #4]
	bl ov96_021FEE60
_021FEFDA:
	ldr r0, [r4, #0x70]
	add r1, sp, #0x20
	bl ov96_021EB588
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FEECC

	thumb_func_start ov96_021FEFE8
ov96_021FEFE8: ; 0x021FEFE8
	push {r3, r4, r5, r6, r7, lr}
	str r3, [sp]
	add r5, r1, #0
	add r1, r2, #0
	ldr r2, [sp]
	ldr r6, [sp, #0x18]
	bl ov96_021E60D8
	add r4, r0, #0
	ldr r0, [sp]
	mov r1, #0x1c
	add r7, r0, #0
	ldrb r0, [r4]
	mul r7, r1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl _itof
	bl _f2d
	ldr r3, _021FF0B8 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0x20]
	ldrb r0, [r4, #3]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x14]
	bl _itof
	add r1, r6, r7
	str r0, [r1, #0x28]
	ldrb r0, [r4, #3]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x14]
	bl _itof
	add r1, r6, r7
	str r0, [r1, #0x24]
	ldrb r0, [r4, #1]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r2, [r0, #0x64]
	add r0, r1, #0
	add r0, #0x2e
	strb r2, [r0]
	ldrb r0, [r4, #1]
	lsl r0, r0, #2
	add r0, r5, r0
	add r0, #0x8c
	ldr r2, [r0]
	add r0, r1, #0
	add r0, #0x2c
	strb r2, [r0]
	ldrb r0, [r4, #1]
	add r1, #0x2d
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x78]
	strb r0, [r1]
	ldrb r0, [r4, #4]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x28]
	bl _itof
	bl _f2d
	ldr r3, _021FF0B8 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0x18]
	ldrb r0, [r4, #1]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x3c]
	bl _itof
	bl _f2d
	ldr r3, _021FF0B8 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0x1c]
	ldrb r0, [r4, #3]
	add r1, #0x2f
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x50]
	strb r0, [r1]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FF0B8: .word 0x40240000
	thumb_func_end ov96_021FEFE8

	thumb_func_start ov96_021FF0BC
ov96_021FF0BC: ; 0x021FF0BC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r5, r0, #0
	ldr r0, [sp, #0x28]
	str r2, [sp]
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x2c]
	str r3, [sp, #4]
	str r0, [sp, #0x2c]
	mov r0, #0
	add r7, r0, #0
_021FF0D2:
	stmia r2!, {r7}
	add r0, r0, #1
	stmia r3!, {r7}
	cmp r0, #0x1e
	blt _021FF0D2
	ldr r0, [sp, #0x28]
	str r5, [sp, #8]
	strb r7, [r0]
	ldr r0, [sp, #0x2c]
	strb r7, [r0]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x10]
	ldr r0, _021FF1C4 ; =0x0000045C
	add r6, r5, r0
_021FF0F4:
	ldr r0, _021FF1C8 ; =0x000004D4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _021FF1C0
	ldr r1, [sp, #8]
	ldr r0, _021FF1C4 ; =0x0000045C
	ldr r0, [r1, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	ldr r0, _021FF1CC ; =0x000004DC
	ldrh r1, [r5, r0]
	ldr r0, [sp, #0x10]
	sub r4, r0, r1
	add r0, r4, #0
	bl _dflt
	ldr r3, _021FF1D0 ; =0x40880000
	mov r2, #0
	bl _dgeq
	blo _021FF144
	add r0, r4, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FF1D4 ; =0x40900000
	mov r0, #0
	bl _dsub
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FF1D8 ; =0x40540000
	mov r0, #0
	bl _dadd
	bl _dtoi
	b _021FF17C
_021FF144:
	add r0, r4, #0
	bl _dflt
	ldr r3, _021FF1DC ; =0xC0880000
	mov r2, #0
	bl _dleq
	bhi _021FF178
	add r0, r4, #0
	bl _dflt
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FF1D4 ; =0x40900000
	mov r0, #0
	bl _dadd
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _021FF1D8 ; =0x40540000
	mov r0, #0
	bl _dsub
	bl _dtoi
	b _021FF17C
_021FF178:
	mov r0, #0x50
	sub r0, r0, r4
_021FF17C:
	mov r1, #0x1f
	mvn r1, r1
	cmp r0, r1
	blt _021FF1B0
	mov r1, #0x12
	lsl r1, r1, #4
	cmp r0, r1
	bgt _021FF1B0
	ldr r0, [sp, #0xc]
	cmp r0, #3
	bne _021FF1A2
	ldr r0, [sp, #0x2c]
	ldrb r2, [r0]
	add r1, r2, #1
	strb r1, [r0]
	ldr r0, [sp, #4]
	lsl r1, r2, #2
	str r6, [r0, r1]
	b _021FF1B0
_021FF1A2:
	ldr r0, [sp, #0x28]
	ldrb r2, [r0]
	add r1, r2, #1
	strb r1, [r0]
	ldr r0, [sp]
	lsl r1, r2, #2
	str r6, [r0, r1]
_021FF1B0:
	ldr r0, [sp, #8]
	add r7, r7, #1
	add r0, r0, #4
	add r5, #0xc
	add r6, r6, #4
	str r0, [sp, #8]
	cmp r7, #0x1e
	blt _021FF0F4
_021FF1C0:
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_021FF1C4: .word 0x0000045C
_021FF1C8: .word 0x000004D4
_021FF1CC: .word 0x000004DC
_021FF1D0: .word 0x40880000
_021FF1D4: .word 0x40900000
_021FF1D8: .word 0x40540000
_021FF1DC: .word 0xC0880000
	thumb_func_end ov96_021FF0BC

	thumb_func_start ov96_021FF1E0
ov96_021FF1E0: ; 0x021FF1E0
	push {r4, r5}
	ldr r3, [r1]
	lsl r1, r3, #0x18
	lsr r4, r1, #0x18
	asr r1, r3, #8
	lsl r1, r1, #0x18
	asr r3, r3, #0x10
	lsr r1, r1, #0x18
	lsl r3, r3, #0x10
	lsr r5, r3, #0x10
	add r1, #0x20
	str r4, [r2]
	cmp r4, #3
	bne _021FF208
	sub r5, #0x20
	str r5, [r2, #4]
	sub r1, #0x20
	str r1, [r2, #8]
	pop {r4, r5}
	bx lr
_021FF208:
	cmp r4, #1
	bne _021FF210
	mov r3, #0x30
	b _021FF212
_021FF210:
	mov r3, #0x20
_021FF212:
	lsr r4, r3, #1
	sub r5, r5, r4
	sub r4, r1, r4
	str r5, [r2, #4]
	str r4, [r2, #8]
	add r1, r5, r3
	str r1, [r2, #0xc]
	str r4, [r2, #0x10]
	str r1, [r2, #0x14]
	add r1, r4, r3
	str r1, [r2, #0x18]
	str r5, [r2, #0x1c]
	str r1, [r2, #0x20]
	ldr r3, [r2, #4]
	ldr r1, [r2, #8]
	str r3, [r2, #0x24]
	str r1, [r2, #0x28]
	ldr r3, [r2, #0xc]
	ldr r1, [r2, #0x10]
	str r3, [r2, #0x2c]
	str r1, [r2, #0x30]
	ldr r3, [r2, #0xc]
	ldr r1, [r2, #0x10]
	str r3, [r2, #0x34]
	str r1, [r2, #0x38]
	ldr r3, [r2, #0x14]
	ldr r1, [r2, #0x18]
	str r3, [r2, #0x3c]
	str r1, [r2, #0x40]
	ldr r3, [r2, #0x14]
	ldr r1, [r2, #0x18]
	str r3, [r2, #0x44]
	str r1, [r2, #0x48]
	ldr r3, [r2, #0x1c]
	ldr r1, [r2, #0x20]
	str r3, [r2, #0x4c]
	str r1, [r2, #0x50]
	ldr r3, [r2, #0x1c]
	ldr r1, [r2, #0x20]
	str r3, [r2, #0x54]
	str r1, [r2, #0x58]
	ldr r3, [r2, #4]
	ldr r1, [r2, #8]
	str r3, [r2, #0x5c]
	str r1, [r2, #0x60]
	ldr r1, [r2, #0x28]
	sub r1, r1, r0
	str r1, [r2, #0x28]
	ldr r1, [r2, #0x30]
	sub r1, r1, r0
	str r1, [r2, #0x30]
	ldr r1, [r2, #0x34]
	add r1, r1, r0
	str r1, [r2, #0x34]
	ldr r1, [r2, #0x3c]
	add r1, r1, r0
	str r1, [r2, #0x3c]
	ldr r1, [r2, #0x48]
	add r1, r1, r0
	str r1, [r2, #0x48]
	ldr r1, [r2, #0x50]
	add r1, r1, r0
	str r1, [r2, #0x50]
	ldr r1, [r2, #0x54]
	sub r1, r1, r0
	str r1, [r2, #0x54]
	ldr r1, [r2, #0x5c]
	sub r0, r1, r0
	str r0, [r2, #0x5c]
	pop {r4, r5}
	bx lr
	thumb_func_end ov96_021FF1E0

	thumb_func_start ov96_021FF2A0
ov96_021FF2A0: ; 0x021FF2A0
	push {r4, r5, r6, r7, lr}
	sub sp, #0xa4
	str r0, [sp, #4]
	ldr r0, [sp, #0xb8]
	str r1, [sp, #8]
	str r0, [sp, #0xb8]
	add r0, r3, #0
	ldr r0, [r0]
	str r2, [sp, #0xc]
	str r3, [sp, #0x10]
	cmp r0, #3
	bne _021FF2BE
	add sp, #0xa4
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_021FF2BE:
	ldr r0, [sp, #4]
	add r7, r3, #0
	ldr r1, [r0]
	add r6, r3, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x24]
	ldr r0, [sp, #4]
	add r5, r3, #0
	ldr r1, [r0, #4]
	ldr r2, _021FF56C ; =0x0221C5FC
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x28]
	ldr r0, [sp, #8]
	add r3, sp, #0x34
	ldr r1, [r0]
	mov r4, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x1c]
	ldr r0, [sp, #8]
	add r7, #0x2c
	ldr r1, [r0, #4]
	add r6, #0x24
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x20]
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
_021FF30E:
	add r3, sp, #0x34
	add r2, sp, #0x94
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	add r0, sp, #0x2c
	str r0, [sp]
	add r0, r6, #0
	add r1, r7, #0
	add r2, sp, #0x24
	add r3, sp, #0x1c
	bl sub_02020F4C
	cmp r0, #0
	beq _021FF34C
	ldr r0, [sp, #0x2c]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0xb8]
	str r1, [r0]
	ldr r0, [sp, #0x30]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0xb8]
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	add r0, sp, #0x94
	lsl r1, r4, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_021FF34C:
	mov r0, #0
	cmp r4, #0
	bne _021FF37C
	cmp r4, #2
	bne _021FF37C
	ldr r2, [sp, #0x28]
	ldr r1, [r5, #0x28]
	cmp r2, r1
	bne _021FF3A0
	ldr r2, [r5, #0x2c]
	ldr r3, [r5, #0x24]
	cmp r3, r2
	bge _021FF36A
	add r1, r3, #0
	b _021FF36E
_021FF36A:
	add r1, r2, #0
	add r2, r3, #0
_021FF36E:
	ldr r3, [sp, #0x24]
	cmp r1, r3
	bgt _021FF3A0
	cmp r3, r2
	bgt _021FF3A0
	mov r0, #1
	b _021FF3A0
_021FF37C:
	ldr r2, [sp, #0x24]
	ldr r1, [r5, #0x24]
	cmp r2, r1
	bne _021FF3A0
	ldr r2, [r5, #0x30]
	ldr r3, [r5, #0x28]
	cmp r3, r2
	bge _021FF390
	add r1, r3, #0
	b _021FF394
_021FF390:
	add r1, r2, #0
	add r2, r3, #0
_021FF394:
	ldr r3, [sp, #0x28]
	cmp r1, r3
	bgt _021FF3A0
	cmp r3, r2
	bgt _021FF3A0
	mov r0, #1
_021FF3A0:
	cmp r0, #0
	beq _021FF3C2
	ldr r2, [sp, #4]
	ldmia r2!, {r0, r1}
	str r2, [sp, #4]
	ldr r2, [sp, #0xb8]
	stmia r2!, {r0, r1}
	ldr r0, [sp, #4]
	str r2, [sp, #0xb8]
	ldr r1, [r0]
	add r0, r2, #0
	str r1, [r0]
	add r0, sp, #0x94
	lsl r1, r4, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_021FF3C2:
	add r4, r4, #1
	add r7, #0x10
	add r6, #0x10
	add r5, #0x10
	cmp r4, #4
	blt _021FF30E
	ldr r3, _021FF570 ; =0x0221C60C
	add r2, sp, #0x44
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [sp, #0xc]
	ldr r4, [sp, #0x10]
	mov r5, #0
	lsl r6, r0, #0xc
	add r7, sp, #0x6c
_021FF3E4:
	add r3, sp, #0x44
	add r2, sp, #0x84
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r4, #4]
	add r1, sp, #0x78
	lsl r0, r0, #0xc
	str r0, [sp, #0x78]
	ldr r0, [r4, #8]
	add r2, r7, #0
	lsl r0, r0, #0xc
	str r0, [sp, #0x7c]
	mov r0, #0
	str r0, [sp, #0x80]
	ldr r0, [sp, #8]
	bl VEC_Subtract
	add r0, r7, #0
	bl VEC_Mag
	cmp r0, r6
	bgt _021FF452
	ldr r3, [sp, #0xc]
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	add r2, sp, #0x78
	lsl r3, r3, #0xc
	bl ov96_021FF67C
	add r4, r0, #0
	ldr r0, [sp, #8]
	ldr r1, [sp, #4]
	add r2, sp, #0x60
	bl VEC_Subtract
	ldr r2, [sp, #4]
	add r0, r4, #0
	add r1, sp, #0x60
	add r3, sp, #0x54
	bl VEC_MultAdd
	ldr r1, [sp, #0x54]
	ldr r0, [sp, #0xb8]
	str r1, [r0]
	ldr r1, [sp, #0x58]
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	add r0, sp, #0x84
	lsl r1, r5, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_021FF452:
	add r5, r5, #1
	add r4, #8
	cmp r5, #4
	blt _021FF3E4
	ldr r0, [sp, #8]
	ldr r1, [r0]
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #4]
	lsl r0, r0, #0xc
	cmp r0, r1
	bgt _021FF564
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x14]
	lsl r0, r0, #0xc
	cmp r1, r0
	bgt _021FF564
	ldr r0, [sp, #8]
	ldr r1, [r0, #4]
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #8]
	lsl r0, r0, #0xc
	cmp r0, r1
	bgt _021FF564
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x18]
	lsl r0, r0, #0xc
	cmp r1, r0
	bgt _021FF564
	ldr r3, [sp, #8]
	ldr r2, [sp, #0xb8]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0
	str r0, [r2]
	ldr r0, [sp, #0x10]
	ldr r3, [sp, #0x10]
	ldr r0, [r0, #4]
	ldr r3, [r3, #0x14]
	str r0, [sp, #0x18]
	ldr r0, [sp, #8]
	str r3, [sp, #0x14]
	ldr r2, [r0]
	ldr r0, [sp, #0x18]
	lsl r3, r3, #0xc
	lsl r0, r0, #0xc
	sub r0, r0, r2
	sub r3, r3, r2
	mov ip, r1
	cmp r0, #0
	bge _021FF4BC
	sub r2, r1, #1
	mul r0, r2
_021FF4BC:
	cmp r3, #0
	bge _021FF4C6
	mov r2, #0
	mvn r2, r2
	mul r3, r2
_021FF4C6:
	cmp r0, r3
	bge _021FF4CE
	mov r6, #0xd
	b _021FF4D2
_021FF4CE:
	add r0, r3, #0
	mov r6, #0xb
_021FF4D2:
	ldr r2, [sp, #0x10]
	ldr r3, [sp, #8]
	ldr r4, [sp, #0x10]
	ldr r2, [r2, #8]
	ldr r5, [r3, #4]
	ldr r7, [r4, #0x18]
	lsl r3, r2, #0xc
	lsl r4, r7, #0xc
	sub r3, r3, r5
	sub r4, r4, r5
	cmp r3, #0
	bge _021FF4F0
	mov r5, #0
	mvn r5, r5
	mul r3, r5
_021FF4F0:
	cmp r4, #0
	bge _021FF4FA
	mov r5, #0
	mvn r5, r5
	mul r4, r5
_021FF4FA:
	cmp r3, r4
	bge _021FF502
	mov r4, #0xa
	b _021FF506
_021FF502:
	add r3, r4, #0
	mov r4, #0xc
_021FF506:
	cmp r0, r3
	bgt _021FF512
	mov r0, #1
	mov ip, r0
	add r0, r6, #0
	b _021FF516
_021FF512:
	mov r1, #1
	add r0, r4, #0
_021FF516:
	mov r3, ip
	cmp r3, #0
	beq _021FF540
	cmp r6, #0xd
	bne _021FF530
	ldr r2, [sp, #0x18]
	ldr r1, [sp, #0xc]
	sub r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1]
	pop {r4, r5, r6, r7, pc}
_021FF530:
	ldr r2, [sp, #0x14]
	ldr r1, [sp, #0xc]
	add r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1]
	pop {r4, r5, r6, r7, pc}
_021FF540:
	cmp r1, #0
	beq _021FF566
	cmp r4, #0xa
	bne _021FF556
	ldr r1, [sp, #0xc]
	sub r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1, #4]
	pop {r4, r5, r6, r7, pc}
_021FF556:
	ldr r1, [sp, #0xc]
	add r1, r7, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1, #4]
	pop {r4, r5, r6, r7, pc}
_021FF564:
	mov r0, #0
_021FF566:
	add sp, #0xa4
	pop {r4, r5, r6, r7, pc}
	nop
_021FF56C: .word 0x0221C5FC
_021FF570: .word 0x0221C60C
	thumb_func_end ov96_021FF2A0

	thumb_func_start ov96_021FF574
ov96_021FF574: ; 0x021FF574
	push {r3, r4}
	ldr r3, [r1, #4]
	ldr r2, [r0]
	ldr r1, [r1, #8]
	lsl r3, r3, #0xc
	ldr r0, [r0, #4]
	lsl r4, r1, #0xc
	cmp r3, r2
	bge _021FF5A0
	mov r1, #1
	lsl r1, r1, #0x12
	add r3, r3, r1
	cmp r2, r3
	bge _021FF5A0
	cmp r4, r0
	bge _021FF5A0
	add r1, r4, r1
	cmp r0, r1
	bge _021FF5A0
	mov r0, #1
	pop {r3, r4}
	bx lr
_021FF5A0:
	mov r0, #0
	pop {r3, r4}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_021FF574

	thumb_func_start ov96_021FF5A8
ov96_021FF5A8: ; 0x021FF5A8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1dc
	str r1, [sp, #8]
	ldr r1, [sp, #0x1f0]
	add r7, r3, #0
	str r1, [sp, #0x1f0]
	ldr r1, [sp, #0x1f4]
	add r6, r2, #0
	str r1, [sp, #0x1f4]
	add r1, sp, #0x14
	add r1, #1
	str r1, [sp]
	add r1, sp, #0x14
	str r1, [sp, #4]
	ldr r1, [r7]
	add r2, sp, #0x164
	add r3, sp, #0xec
	bl ov96_021FF0BC
	mov r4, #0
	str r4, [sp, #0x10]
	add r0, sp, #0x14
	ldrb r0, [r0]
	cmp r0, #0
	ble _021FF604
	add r5, sp, #0xec
_021FF5DC:
	ldr r1, [r5]
	add r0, r6, #0
	add r2, sp, #0x88
	bl ov96_021FF1E0
	add r0, r7, #0
	add r1, sp, #0x88
	bl ov96_021FF574
	cmp r0, #0
	beq _021FF5F8
	mov r0, #1
	str r0, [sp, #0x10]
	b _021FF604
_021FF5F8:
	add r0, sp, #0x14
	ldrb r0, [r0]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, r0
	blt _021FF5DC
_021FF604:
	mov r5, #0
	str r5, [sp, #0xc]
	add r0, sp, #0x14
	ldrb r0, [r0, #1]
	cmp r0, #0
	ble _021FF66C
	add r4, sp, #0x164
_021FF612:
	ldr r1, [r4]
	add r0, r6, #0
	add r2, sp, #0x24
	bl ov96_021FF1E0
	add r0, sp, #0x18
	str r0, [sp]
	ldr r1, [sp, #0x1f0]
	add r0, r7, #0
	add r2, r6, #0
	add r3, sp, #0x24
	bl ov96_021FF2A0
	cmp r0, #0
	beq _021FF660
	cmp r0, #0xa
	blt _021FF644
	ldr r2, [sp, #0x18]
	ldr r1, [sp, #0x1f4]
	str r2, [r1]
	ldr r2, [sp, #0x1c]
	str r2, [r1, #4]
	mov r2, #0
	str r2, [r1, #8]
	b _021FF658
_021FF644:
	ldr r1, [sp, #8]
	cmp r0, r1
	beq _021FF658
	ldr r2, [sp, #0x18]
	ldr r1, [sp, #0x1f4]
	str r2, [r1]
	ldr r2, [sp, #0x1c]
	str r2, [r1, #4]
	mov r2, #0
	str r2, [r1, #8]
_021FF658:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	b _021FF66C
_021FF660:
	add r0, sp, #0x14
	ldrb r0, [r0, #1]
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, r0
	blt _021FF612
_021FF66C:
	ldr r0, [sp, #0x10]
	lsl r1, r0, #8
	ldr r0, [sp, #0xc]
	add r0, r1, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	add sp, #0x1dc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FF5A8

	thumb_func_start ov96_021FF67C
ov96_021FF67C: ; 0x021FF67C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r0, #0
	add r6, r2, #0
	add r0, r1, #0
	add r1, r4, #0
	add r2, sp, #0
	add r7, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r5, r0, #0
	mul r5, r0
	add r0, sp, #0
	add r1, r6, #0
	bl VEC_DotProduct
	add r4, r0, #0
	add r0, r6, #0
	bl VEC_Mag
	add r1, r0, #0
	mul r1, r0
	add r0, r7, #0
	mul r0, r7
	sub r0, r1, r0
	mul r0, r5
	sub r0, r4, r0
	bl FX_Sqrt
	add r7, r0, #0
	sub r0, r7, r4
	add r1, r5, #0
	bl FX_Div
	add r6, r0, #0
	add r0, r4, r7
	neg r0, r0
	add r1, r5, #0
	bl FX_Div
	cmp r6, r0
	bgt _021FF6D8
	add r0, r6, #0
_021FF6D8:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_021FF67C

	thumb_func_start ov96_021FF6DC
ov96_021FF6DC: ; 0x021FF6DC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, #0xa5
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FF6F8
	mov r0, #0x1c
	mul r0, r1
	add r0, r5, r0
	add r0, #0x2c
	ldrb r0, [r0]
	bl _utof
	pop {r3, r4, r5, pc}
_021FF6F8:
	mov r0, #0x1c
	add r4, r1, #0
	mul r4, r0
	add r0, r5, r4
	ldr r0, [r0, #0x24]
	bl _f2d
	ldr r3, _021FF728 ; =0x40440000
	mov r2, #0
	bl _dleq
	bhi _021FF71C
	add r0, r5, r4
	add r0, #0x2d
	ldrb r0, [r0]
	bl _utof
	pop {r3, r4, r5, pc}
_021FF71C:
	add r0, r5, r4
	add r0, #0x2e
	ldrb r0, [r0]
	bl _utof
	pop {r3, r4, r5, pc}
	.balign 4, 0
_021FF728: .word 0x40440000
	thumb_func_end ov96_021FF6DC

	thumb_func_start ov96_021FF72C
ov96_021FF72C: ; 0x021FF72C
	push {r4, r5, r6, lr}
	add r5, r2, #0
	ldr r3, [r0]
	ldr r2, [r1]
	add r2, r3, r2
	str r2, [r5]
	ldr r4, [r1, #4]
	ldr r6, [r0, #4]
	asr r3, r4, #0x1f
	asr r1, r6, #0x1f
	add r0, r6, #0
	add r2, r4, #0
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r2, r0, r2
	adc r1, r3
	lsl r0, r1, #0x14
	lsr r1, r2, #0xc
	orr r1, r0
	bmi _021FF760
	add r0, r6, r4
	str r0, [r5, #4]
	pop {r4, r5, r6, pc}
_021FF760:
	str r4, [r5, #4]
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_021FF72C

	thumb_func_start ov96_021FF764
ov96_021FF764: ; 0x021FF764
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xa0
	str r0, [sp, #8]
	mov r0, #0
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	str r0, [sp, #0x24]
	str r0, [sp, #0x9c]
	str r0, [sp, #0x90]
	str r0, [sp, #0x18]
	add r4, r1, #0
_021FF77A:
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	str r0, [sp, #0x14]
	add r0, r4, #0
	add r0, #0x9d
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FF796
	add r0, r4, #0
	add r0, #0xa9
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FF798
_021FF796:
	b _021FFAC8
_021FF798:
	ldr r0, [sp, #0x14]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	str r0, [sp, #0x2c]
	add r0, sp, #0x3c
	str r0, [sp]
	ldr r2, [r4, #0x7c]
	ldr r0, [sp, #0x2c]
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	add r2, r4, #0
	add r2, #0x80
	ldr r3, [r2]
	asr r1, r1, #0xc
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r2, r2, #0xc
	add r3, sp, #0x40
	bl ov96_021EB0A4
	add r0, r4, #0
	str r0, [sp, #0x30]
	add r0, #0x8c
	ldr r5, [sp, #0xc]
	mov r6, #0
	str r0, [sp, #0x30]
_021FF7D0:
	ldr r0, [sp, #0x18]
	cmp r0, r6
	bne _021FF7D8
	b _021FFABE
_021FF7D8:
	add r0, r5, #0
	add r0, #0x9d
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FF8E0
	add r0, r5, #0
	add r0, #0x8b
	ldrb r0, [r0]
	ldr r7, [sp, #0x40]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	str r0, [sp, #0x28]
	add r0, sp, #0x34
	str r0, [sp]
	ldr r1, [r5, #0x7c]
	ldr r0, [sp, #0x28]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	add r2, r5, #0
	add r2, #0x80
	ldr r3, [r2]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r2, r2, #0xc
	add r3, sp, #0x38
	bl ov96_021EB0A4
	ldr r0, [r4, #0x7c]
	str r0, [sp, #0x1c]
	bl _dflt
	ldr r3, _021FFADC ; =0x41480000
	mov r2, #0
	bl _dgr
	bls _021FF846
	mov r0, #1
	ldr r1, [r5, #0x7c]
	lsl r0, r0, #0x14
	cmp r1, r0
	bge _021FF846
	ldr r0, [sp, #0x38]
	bl _dflt
	ldr r3, _021FFAE0 ; =0x40900000
	mov r2, #0
	bl _dadd
	bl _dtoi
	str r0, [sp, #0x38]
	b _021FF874
_021FF846:
	ldr r0, [r5, #0x7c]
	bl _dflt
	ldr r3, _021FFADC ; =0x41480000
	mov r2, #0
	bl _dgr
	bls _021FF874
	mov r0, #1
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #0x14
	cmp r1, r0
	bge _021FF874
	add r0, r7, #0
	bl _dflt
	ldr r3, _021FFAE0 ; =0x40900000
	mov r2, #0
	bl _dadd
	bl _dtoi
	add r7, r0, #0
_021FF874:
	add r0, sp, #0x8c
	str r0, [sp]
	add r0, sp, #0x44
	str r0, [sp, #4]
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0x34]
	ldr r0, [sp, #0x28]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x88
	bl ov96_021EAF78
	add r0, sp, #0x98
	str r0, [sp]
	add r0, sp, #0x48
	str r0, [sp, #4]
	ldr r2, [sp, #0x3c]
	ldr r0, [sp, #0x2c]
	lsl r1, r7, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x94
	bl ov96_021EAF78
	add r0, sp, #0x88
	add r1, sp, #0x94
	add r2, sp, #0x7c
	bl VEC_Subtract
	add r0, sp, #0x7c
	bl VEC_Mag
	ldr r2, [sp, #0x44]
	ldr r1, [sp, #0x48]
	add r1, r2, r1
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _021FF8C0
	b _021FFAAC
_021FF8C0:
	add r0, r4, r6
	add r0, #0x98
	ldrb r0, [r0]
	cmp r0, #0
	bne _021FF8E0
	mov r1, #0
	add r0, sp, #0x70
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r1, [sp, #0x30]
	add r0, sp, #0x7c
	bl VEC_DotProduct
	cmp r0, #0
	bgt _021FF8E2
_021FF8E0:
	b _021FFABE
_021FF8E2:
	add r0, r4, #0
	add r0, #0x8c
	bl VEC_Mag
	cmp r0, #0
	beq _021FF94C
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	mov r2, #0x1c
	str r0, [sp, #0x20]
	ldr r1, [sp, #0x20]
	ldr r0, _021FFAE4 ; =0x45800000
	mul r2, r1
	add r1, r4, r2
	ldr r1, [r1, #0x20]
	bl _fmul
	bl _ftoi
	add r1, r4, #0
	add r3, r5, #0
	add r1, #0x8c
	add r2, sp, #0x70
	add r3, #0x8c
	bl VEC_MultAdd
	add r0, r5, #0
	add r0, #0x8c
	bl VEC_Mag
	mov r1, #0xb
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _021FF94C
	add r1, sp, #0x64
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r0, r5, #0
	add r0, #0x8c
	add r1, r0, #0
	bl VEC_Normalize
	add r1, r5, #0
	mov r0, #0xb
	add r1, #0x8c
	lsl r0, r0, #0xc
	add r2, sp, #0x64
	add r3, r1, #0
	bl VEC_MultAdd
_021FF94C:
	ldr r0, [sp, #0x14]
	mov r1, #0x1c
	mul r1, r0
	add r0, r5, r1
	add r1, r0, #0
	add r1, #0x30
	ldrb r1, [r1]
	cmp r1, #1
	bne _021FF98A
	mov r1, #0
	str r1, [r0, #0x24]
	add r1, r0, #0
	mov r2, #2
	add r1, #0x30
	strb r2, [r1]
	add r0, #0x2f
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xa4
	strb r1, [r0]
	mov r3, #1
	add r1, r5, #0
	add r2, r5, #0
	str r3, [sp]
	add r1, #0xd0
	add r2, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	bl ov96_021E8228
_021FF98A:
	add r3, sp, #0x58
	mov r7, #0
	str r7, [r3]
	str r7, [r3, #4]
	str r7, [r3, #8]
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x8c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0x1c
	str r0, [r2]
	ldr r0, [sp, #0x20]
	mul r1, r0
	add r0, r4, r1
	add r1, r0, #0
	add r1, #0x30
	ldrb r1, [r1]
	cmp r1, #1
	bne _021FF9DC
	add r1, r0, #0
	str r7, [r0, #0x24]
	mov r2, #2
	add r1, #0x30
	strb r2, [r1]
	add r0, #0x2f
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0xa4
	strb r1, [r0]
	mov r3, #1
	add r1, r4, #0
	add r2, r4, #0
	str r3, [sp]
	add r1, #0xd0
	add r2, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	bl ov96_021E8228
_021FF9DC:
	add r0, r4, r6
	add r0, #0x98
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FF9EA
	bl GF_AssertFail
_021FF9EA:
	ldr r0, [sp, #0x18]
	add r0, r5, r0
	add r0, #0x98
	ldrb r0, [r0]
	cmp r0, #0
	beq _021FF9FA
	bl GF_AssertFail
_021FF9FA:
	add r1, r5, r6
	mov r0, #1
	add r1, #0x98
	strb r0, [r1]
	ldr r1, [sp, #0x18]
	add r1, r4, r1
	add r1, #0x98
	strb r0, [r1]
	ldr r1, [sp, #0x24]
	cmp r1, #0
	bne _021FFA6C
	add r2, sp, #0x4c
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	str r0, [sp, #0x24]
	add r0, sp, #0x88
	add r1, sp, #0x94
	bl VEC_Subtract
	add r0, sp, #0x4c
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, [sp, #0x48]
	add r1, sp, #0x4c
	lsl r0, r0, #0xc
	add r2, sp, #0x94
	add r3, r1, #0
	bl VEC_MultAdd
	ldr r6, [sp, #0x4c]
	add r0, r6, #0
	bl _dflt
	ldr r3, _021FFAE8 ; =0x41500000
	mov r2, #0
	bl _dgeq
	blo _021FFA60
	add r0, r6, #0
	bl _dflt
	ldr r3, _021FFAE8 ; =0x41500000
	mov r2, #0
	bl _dsub
	bl _dtoi
	str r0, [sp, #0x4c]
_021FFA60:
	add r3, sp, #0x4c
	ldr r2, [sp, #0x10]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_021FFA6C:
	add r0, r5, #0
	mov r1, #6
	add r0, #0xa9
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #0x12
	add r0, #0xa9
	strb r1, [r0]
	add r1, r5, #0
	mov r0, #1
	str r0, [sp]
	add r1, #0xd0
	add r5, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r5]
	ldr r0, [sp, #8]
	mov r3, #4
	bl ov96_021E8228
	mov r0, #1
	add r1, r4, #0
	add r2, r4, #0
	str r0, [sp]
	add r1, #0xd0
	add r2, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	mov r3, #4
	bl ov96_021E8228
	b _021FFAC8
_021FFAAC:
	add r1, r4, r6
	add r1, #0x98
	mov r0, #0
	strb r0, [r1]
	ldr r0, [sp, #0x18]
	add r1, r0, r5
	add r1, #0x98
	mov r0, #0
	strb r0, [r1]
_021FFABE:
	add r6, r6, #1
	add r5, #0xd4
	cmp r6, #4
	bge _021FFAC8
	b _021FF7D0
_021FFAC8:
	ldr r0, [sp, #0x18]
	add r4, #0xd4
	add r0, r0, #1
	str r0, [sp, #0x18]
	cmp r0, #4
	bge _021FFAD6
	b _021FF77A
_021FFAD6:
	ldr r0, [sp, #0x24]
	add sp, #0xa0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FFADC: .word 0x41480000
_021FFAE0: .word 0x40900000
_021FFAE4: .word 0x45800000
_021FFAE8: .word 0x41500000
	thumb_func_end ov96_021FF764

	thumb_func_start ov96_021FFAEC
ov96_021FFAEC: ; 0x021FFAEC
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r3, r0, #0
	add r4, r2, #0
	ldmia r5!, {r0, r1}
	add r2, sp, #0
	stmia r2!, {r0, r1}
	ldr r0, [r5]
	str r0, [r2]
	ldrb r0, [r3, #8]
	cmp r0, #1
	beq _021FFB10
	cmp r0, #2
	beq _021FFB1C
	cmp r0, #3
	beq _021FFB28
	b _021FFB34
_021FFB10:
	mov r0, #5
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #4]
	b _021FFB38
_021FFB1C:
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #4]
	b _021FFB38
_021FFB28:
	mov r0, #0xa
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #4]
	b _021FFB38
_021FFB34:
	bl GF_AssertFail
_021FFB38:
	add r0, r4, #0
	add r1, sp, #0
	bl ov96_021EB588
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_021FFAEC

	thumb_func_start ov96_021FFB44
ov96_021FFB44: ; 0x021FFB44
	push {r3, lr}
	ldrb r1, [r0, #0xb]
	cmp r1, #3
	bne _021FFB58
	mov r1, #0x96
	ldr r0, [r0, #4]
	lsl r1, r1, #2
	bl ov96_021EB630
	pop {r3, pc}
_021FFB58:
	ldrb r2, [r0, #0xa]
	mov r1, #0xa0
	add r2, #0x20
	sub r2, r1, r2
	bpl _021FFB64
	mov r2, #0
_021FFB64:
	asr r1, r2, #2
	lsr r1, r1, #0x1d
	add r1, r2, r1
	asr r1, r1, #3
	add r2, r1, #1
	mov r1, #0x1e
	mul r1, r2
	ldr r0, [r0, #4]
	add r1, r1, #3
	bl ov96_021EB630
	pop {r3, pc}
	thumb_func_end ov96_021FFB44

	thumb_func_start ov96_021FFB7C
ov96_021FFB7C: ; 0x021FFB7C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r0, #0xa8
	sub r1, r0, r1
	bpl _021FFB88
	mov r1, #0
_021FFB88:
	asr r0, r1, #2
	lsr r0, r0, #0x1d
	add r0, r1, r0
	asr r1, r0, #3
	cmp r2, #0
	beq _021FFB9C
	mov r0, #0x1e
	mul r0, r1
	add r4, r0, #4
	b _021FFBA2
_021FFB9C:
	mov r0, #0x1e
	mul r0, r1
	add r4, r0, #7
_021FFBA2:
	ldr r0, [r5, #0x70]
	add r1, r4, #0
	bl ov96_021EB630
	ldr r0, [r5, #0x78]
	add r1, r4, #1
	bl ov96_021EB630
	ldr r0, [r5, #0x6c]
	add r1, r4, #1
	bl ov96_021EB630
	ldr r0, [r5, #0x74]
	add r1, r4, #2
	bl ov96_021EB630
	mov r6, #0
_021FFBC4:
	ldr r0, [r5]
	add r1, r4, #2
	bl ov96_021EABA8
	add r6, r6, #1
	add r5, r5, #4
	cmp r6, #3
	blt _021FFBC4
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_021FFB7C

	thumb_func_start ov96_021FFBD8
ov96_021FFBD8: ; 0x021FFBD8
	push {r4, lr}
	sub sp, #0x10
	mov r2, #0x11
	lsl r2, r2, #4
	add r4, r0, #0
	cmp r1, r2
	ble _021FFC0A
	mov r2, #3
	lsl r2, r2, #8
	cmp r1, r2
	bge _021FFC0A
	mov r1, #3
	str r1, [sp]
	mov r1, #2
	str r1, [sp, #4]
	mov r1, #0x15
	str r1, [sp, #8]
	mov r1, #0x10
	str r1, [sp, #0xc]
	mov r1, #0
	mov r2, #1
	mov r3, #0xa
	bl FillBgTilemapRect
	b _021FFC26
_021FFC0A:
	mov r0, #3
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r0, #0x15
	str r0, [sp, #8]
	mov r0, #0x10
	str r0, [sp, #0xc]
	add r0, r4, #0
	mov r1, #0
	mov r2, #0x20
	mov r3, #0xa
	bl FillBgTilemapRect
_021FFC26:
	add r0, r4, #0
	mov r1, #0
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_021FFBD8

	thumb_func_start ov96_021FFC34
ov96_021FFC34: ; 0x021FFC34
	push {r3, r4, r5, r6, lr}
	sub sp, #0x24
	ldr r3, _021FFD3C ; =0x0221C5CC
	add r4, r0, #0
	add r5, r1, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x18
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _021FFD40 ; =0x0221C5D8
	str r0, [r2]
	ldmia r3!, {r0, r1}
	add r2, sp, #0xc
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _021FFD44 ; =0x0221C5F0
	str r0, [r2]
	ldmia r3!, {r0, r1}
	add r2, sp, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldrh r0, [r4, #0xe]
	cmp r0, r5
	bge _021FFC6C
	strh r5, [r4, #0xe]
	mov r0, #1
	b _021FFC6E
_021FFC6C:
	mov r0, #0
_021FFC6E:
	cmp r0, #0
	beq _021FFD0E
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r5, r0, #0x18
	cmp r6, #0
	beq _021FFCB2
	mov r0, #6
	lsl r0, r0, #0x10
	str r0, [sp, #0x18]
	mov r0, #9
	lsl r0, r0, #0x10
	str r0, [sp, #0xc]
	mov r0, #0xb
	lsl r0, r0, #0x10
	str r0, [sp]
	ldr r0, [r4]
	add r1, r6, #1
	bl sub_020248F0
	ldr r0, [r4, #4]
	add r1, r5, #1
	bl sub_020248F0
	b _021FFCCE
_021FFCB2:
	mov r0, #7
	lsl r0, r0, #0x10
	str r0, [sp, #0x18]
	mov r0, #0xa
	lsl r0, r0, #0x10
	str r0, [sp, #0xc]
	ldr r0, [r4]
	add r1, r5, #1
	bl sub_020248F0
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_020248F0
_021FFCCE:
	ldr r0, [r4, #8]
	add r1, sp, #0x18
	bl ov96_021EB588
	ldr r0, [r4]
	add r1, sp, #0xc
	bl sub_020247D4
	ldr r0, [r4, #4]
	add r1, sp, #0
	bl sub_020247D4
	mov r1, #1
	ldr r0, [r4, #8]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r4]
	mov r1, #1
	bl sub_02024830
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_02024830
	mov r0, #0x3c
	strh r0, [r4, #0xc]
	ldr r0, _021FFD48 ; =0x0000088F
	bl PlaySE
	add sp, #0x24
	pop {r3, r4, r5, r6, pc}
_021FFD0E:
	ldrh r0, [r4, #0xc]
	sub r0, r0, #1
	strh r0, [r4, #0xc]
	ldrh r0, [r4, #0xc]
	cmp r0, #0
	bne _021FFD36
	mov r2, #0
	strh r2, [r4, #0xc]
	ldr r0, [r4, #8]
	mov r1, #1
	bl ov96_021EB52C
	ldr r0, [r4]
	mov r1, #0
	bl sub_02024830
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_02024830
_021FFD36:
	add sp, #0x24
	pop {r3, r4, r5, r6, pc}
	nop
_021FFD3C: .word 0x0221C5CC
_021FFD40: .word 0x0221C5D8
_021FFD44: .word 0x0221C5F0
_021FFD48: .word 0x0000088F
	thumb_func_end ov96_021FFC34

	thumb_func_start ov96_021FFD4C
ov96_021FFD4C: ; 0x021FFD4C
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r0, [r4]
	ldr r2, _021FFD7C ; =0x0221C5C4
	add r1, r4, #4
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4, #0x14]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	nop
_021FFD7C: .word 0x0221C5C4
	thumb_func_end ov96_021FFD4C

	thumb_func_start ov96_021FFD80
ov96_021FFD80: ; 0x021FFD80
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r5, r0, #0
	str r1, [sp, #0x10]
	add r0, r5, #4
	mov r1, #0
	add r4, r2, #0
	bl FillWindowPixelBuffer
	mov r0, #0xa
	mul r0, r4
	bl _dflt
	ldr r3, _021FFE2C ; =0x40900000
	mov r2, #0
	bl _ddiv
	bl _dtoi
	add r7, r0, #0
	cmp r7, #9
	ble _021FFDB0
	bl GF_AssertFail
_021FFDB0:
	ldr r2, _021FFE30 ; =0x00000135
	ldr r3, [r5, #0x14]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r6, r0, #0
	ldr r0, [r5, #0x14]
	bl ScrStrBufs_new
	mov r3, #2
	str r3, [sp]
	mov r1, #1
	str r1, [sp, #4]
	ldr r2, [sp, #0x10]
	mov r1, #0
	add r4, r0, #0
	bl BufferIntegerAsString
	mov r0, #2
	str r0, [sp]
	mov r1, #1
	str r1, [sp, #4]
	add r0, r4, #0
	add r2, r7, #0
	add r3, r1, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x14]
	add r0, r4, #0
	add r1, r6, #0
	mov r2, #0xa2
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _021FFE34 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #4
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r4, #0
	bl ScrStrBufs_delete
	add r0, r6, #0
	bl DestroyMsgData
	add r0, r5, #4
	bl CopyWindowToVram
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_021FFE2C: .word 0x40900000
_021FFE30: .word 0x00000135
_021FFE34: .word 0x000F0E00
	thumb_func_end ov96_021FFD80

	thumb_func_start ov96_021FFE38
ov96_021FFE38: ; 0x021FFE38
	push {r3, lr}
	cmp r0, #0
	blt _021FFE5A
	mov r3, #1
	lsl r3, r3, #8
	cmp r0, r3
	bge _021FFE5A
	cmp r2, #0
	beq _021FFE4E
	mov r2, #3
	b _021FFE50
_021FFE4E:
	mov r2, #4
_021FFE50:
	lsl r0, r1, #0x10
	lsr r0, r0, #0x10
	add r1, r2, #0
	bl sub_0200606C
_021FFE5A:
	pop {r3, pc}
	thumb_func_end ov96_021FFE38

	thumb_func_start ov96_021FFE5C
ov96_021FFE5C: ; 0x021FFE5C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	ldr r1, _021FFEE4 ; =0x00000644
	add r7, r2, #0
	add r3, r0, r1
	mov r1, #0xd4
	mul r1, r5
	add r2, r0, r1
	add r1, r2, #0
	add r1, #0xbb
	ldrb r6, [r1]
	mov r1, #0x1c
	mov r4, #0
	mul r1, r6
	add r6, r2, #0
	add r6, #0xcd
	add r1, r2, r1
	add r1, #0x60
	ldrb r6, [r6]
	ldrb r1, [r1]
	cmp r6, #0
	beq _021FFE8C
	mov r4, #3
	b _021FFEA6
_021FFE8C:
	add r2, #0xd9
	ldrb r2, [r2]
	cmp r2, #0
	beq _021FFE98
	mov r4, #3
	b _021FFEA6
_021FFE98:
	cmp r1, #2
	bne _021FFEA0
	mov r4, #3
	b _021FFEA6
_021FFEA0:
	cmp r1, #1
	bne _021FFEA6
	mov r4, #1
_021FFEA6:
	cmp r7, #0
	bne _021FFEAE
	strb r4, [r3, r5]
	pop {r3, r4, r5, r6, r7, pc}
_021FFEAE:
	mov r1, #0xc
	mul r1, r5
	add r2, r0, r1
	mov r0, #0xe
	lsl r0, r0, #6
	ldr r1, [r2, r0]
	cmp r1, #0
	beq _021FFED8
	cmp r4, #1
	bhi _021FFEC8
	mov r0, #2
	strb r0, [r3, r5]
	pop {r3, r4, r5, r6, r7, pc}
_021FFEC8:
	cmp r4, #3
	bne _021FFED2
	mov r0, #4
	strb r0, [r3, r5]
	pop {r3, r4, r5, r6, r7, pc}
_021FFED2:
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
_021FFED8:
	add r0, r0, #4
	ldr r0, [r2, r0]
	cmp r0, #0
	bne _021FFEE2
	strb r4, [r3, r5]
_021FFEE2:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_021FFEE4: .word 0x00000644
	thumb_func_end ov96_021FFE5C

	thumb_func_start ov96_021FFEE8
ov96_021FFEE8: ; 0x021FFEE8
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5DC4
	add r7, r0, #0
	add r0, r6, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r1, r4, r0
	ldrb r2, [r1, #0x10]
	mov r1, #0x7f
	lsl r0, r0, #1
	and r1, r2
	lsl r1, r1, #0x18
	lsr r5, r1, #0x18
	ldrh r4, [r4, r0]
	cmp r5, #0x3c
	bls _021FFF20
	mov r5, #0x3c
_021FFF20:
	lsl r1, r5, #0xa
	add r1, r4, r1
	lsl r1, r1, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x10
	bl ov96_021E8318
	add r0, r7, #0
	add r1, r5, #0
	add r2, r4, #0
	bl ov96_021FFD80
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FFEE8

	thumb_func_start ov96_021FFF3C
ov96_021FFF3C: ; 0x021FFF3C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	mov r1, #0x1a
	lsl r1, r1, #4
	add r6, r0, #0
	str r2, [sp]
	bl AllocFromHeap
	mov r2, #0x1a
	add r7, r0, #0
	mov r1, #0
	lsl r2, r2, #4
	bl MIi_CpuFill8
	str r6, [r7]
	ldr r0, [sp]
	str r4, [r7, #8]
	str r0, [r7, #4]
	add r0, r7, #0
	bl ov96_02200DF8
	ldr r2, _021FFFE4 ; =0x00000135
	mov r0, #1
	mov r1, #0x1b
	add r3, r6, #0
	bl NewMsgDataFromNarc
	str r0, [r7, #0x2c]
	add r0, r6, #0
	bl ScrStrBufs_new
	str r0, [r7, #0x30]
	mov r4, #0
	add r5, r7, #0
_021FFF80:
	mov r0, #0xb
	add r1, r6, #0
	bl String_ctor
	mov r1, #0x17
	lsl r1, r1, #4
	str r0, [r5, r1]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _021FFF80
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	bl ov96_021E5D50
	add r4, r0, #0
	mov r6, #0
	add r5, r7, #0
_021FFFAA:
	mov r0, #0x17
	lsl r0, r0, #4
	add r1, r4, #0
	ldr r0, [r5, r0]
	add r1, #0x12
	bl CopyU16ArrayToString
	add r6, r6, #1
	add r4, #0x28
	add r5, r5, #4
	cmp r6, #3
	blt _021FFFAA
	add r0, r7, #0
	mov r1, #1
	bl ov96_02200BD8
	add r0, r7, #0
	bl ov96_02200C40
	mov r0, #0x16
	mov r1, #1
	lsl r0, r0, #4
	strh r1, [r7, r0]
	mov r1, #2
	add r0, r0, #2
	strh r1, [r7, r0]
	add r0, r7, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_021FFFE4: .word 0x00000135
	thumb_func_end ov96_021FFF3C

	thumb_func_start ov96_021FFFE8
ov96_021FFFE8: ; 0x021FFFE8
	push {r3, r4, r5, r6, r7, lr}
	mov r7, #0x4a
	lsl r7, r7, #2
	str r0, [sp]
	mov r4, #0
	add r5, r0, #0
	add r6, r7, #4
_021FFFF6:
	ldr r0, [r5, r7]
	bl FreeToHeap
	ldr r0, [r5, r6]
	bl FreeToHeap
	add r4, r4, #1
	add r5, #8
	cmp r4, #3
	blt _021FFFF6
	ldr r4, [sp]
	mov r5, #0
_0220000E:
	add r0, r4, #0
	add r0, #0xbc
	ldr r0, [r0]
	bl FreeToHeap
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #0xc
	blt _0220000E
	ldr r0, [sp]
	ldr r0, [r0, #0x34]
	bl FreeToHeap
	mov r6, #0x17
	ldr r4, [sp]
	mov r5, #0
	lsl r6, r6, #4
_02200030:
	ldr r0, [r4, r6]
	bl String_dtor
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #3
	blt _02200030
	ldr r0, [sp]
	ldr r0, [r0, #0x30]
	bl ScrStrBufs_delete
	ldr r0, [sp]
	ldr r0, [r0, #0x2c]
	bl DestroyMsgData
	ldr r0, [sp]
	add r0, #0xc
	bl RemoveWindow
	ldr r0, [sp]
	add r0, #0x1c
	bl RemoveWindow
	ldr r0, [sp]
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_021FFFE8

	thumb_func_start ov96_02200068
ov96_02200068: ; 0x02200068
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xb2
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xb2
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xb2
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	ldr r0, [r4]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xb2
	mov r1, #9
	mov r2, #0
	add r3, #0x38
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x34]
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #4]
	mov r0, #0xb2
	mov r2, #4
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02200068

	thumb_func_start ov96_022000E4
ov96_022000E4: ; 0x022000E4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	ldr r0, _0220017C ; =0x0221C728
	add r5, r1, #0
	ldr r1, [r0, #0x10]
	ldr r0, [r0, #0x14]
	add r4, sp, #8
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	mov r6, #0
	mov r7, #2
_022000FA:
	str r7, [sp]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #9
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #6
	bl ov96_021EB2F4
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB334
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB36C
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _022000FA
	mov r0, #2
	str r0, [sp]
	add r0, r5, #0
	mov r1, #0xb2
	mov r2, #0xd
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	add r0, r5, #0
	mov r1, #0xb2
	mov r2, #0xa
	mov r3, #0x65
	bl ov96_021EB2F4
	add r0, r5, #0
	mov r1, #0xb2
	mov r2, #0xc
	mov r3, #0x65
	bl ov96_021EB334
	add r0, r5, #0
	mov r1, #0xb2
	mov r2, #0xb
	mov r3, #0x65
	bl ov96_021EB36C
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220017C: .word 0x0221C728
	thumb_func_end ov96_022000E4

	thumb_func_start ov96_02200180
ov96_02200180: ; 0x02200180
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	str r0, [sp, #4]
	add r5, r1, #0
	str r2, [sp, #8]
	mov r4, #0
	mov r6, #8
	mov r7, #0xa
_02200190:
	mov r0, #2
	str r0, [sp]
	add r0, r5, #0
	mov r1, #3
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB408
	mov r0, #3
	str r0, [sp]
	add r0, r5, #0
	mov r1, #3
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB408
	add r0, r5, #0
	mov r1, #3
	mov r2, #2
	mov r3, #0x65
	str r6, [sp]
	bl ov96_021EB408
	add r0, r5, #0
	mov r1, #3
	mov r2, #2
	mov r3, #0x65
	str r7, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #4
	blt _02200190
	mov r4, #0
	mov r6, #0x10
	mov r7, #3
_022001D8:
	add r0, r5, #0
	add r1, r7, #0
	mov r2, #2
	mov r3, #0x65
	str r6, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #2
	blt _022001D8
	ldr r4, [sp, #4]
	mov r6, #0
	mov r7, #0x65
_022001F2:
	add r0, r5, #0
	add r1, r7, #0
	mov r2, #2
	bl ov96_021EB4F4
	str r0, [r4, #0x48]
	add r0, r5, #0
	mov r1, #0x65
	mov r2, #3
	bl ov96_021EB4F4
	str r0, [r4, #0x54]
	add r0, r5, #0
	mov r1, #0x65
	mov r2, #8
	bl ov96_021EB4F4
	str r0, [r4, #0x50]
	add r0, r5, #0
	mov r1, #0x65
	mov r2, #0xa
	bl ov96_021EB4F4
	str r0, [r4, #0x4c]
	ldr r0, [r4, #0x48]
	add r1, r6, #0
	bl ov96_021EB564
	ldr r0, [r4, #0x54]
	add r1, r6, #4
	bl ov96_021EB564
	ldr r0, [r4, #0x50]
	mov r1, #0xa
	bl ov96_021EB564
	add r6, r6, #1
	add r4, #0x20
	cmp r6, #4
	blt _022001F2
	mov r0, #0x11
	str r0, [sp]
	add r0, r5, #0
	mov r1, #3
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #1
	add r4, r0, #0
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r4, #0
	mov r1, #0xb
	bl ov96_021EB564
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp, #0x10]
	mov r0, #0x8e
	lsl r0, r0, #0xe
	str r0, [sp, #0x14]
	add r0, r4, #0
	add r1, sp, #0x10
	bl ov96_021EB588
	ldr r1, [sp, #4]
	add r0, r5, #0
	bl ov96_02200C8C
	mov r0, #0
	ldr r4, [sp, #4]
	ldr r7, _022002F0 ; =0x0221C718
	ldr r6, _022002F4 ; =0x0221C720
	str r0, [sp, #0xc]
_0220028E:
	add r0, r5, #0
	bl ov96_021EB5E8
	ldr r3, [sp, #4]
	add r1, r0, #0
	ldr r0, [sp, #8]
	ldr r3, [r3]
	mov r2, #3
	bl ov96_021EA2C4
	mov r1, #0x5f
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #1
	bl sub_02024830
	ldrb r0, [r7]
	add r1, sp, #0x1c
	lsl r0, r0, #0xc
	str r0, [sp, #0x1c]
	mov r0, #0x8e
	lsl r0, r0, #0xe
	str r0, [sp, #0x20]
	mov r0, #0
	str r0, [sp, #0x24]
	mov r0, #0x5f
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl sub_020247D4
	mov r0, #0x5f
	lsl r0, r0, #2
	ldrb r1, [r6]
	ldr r0, [r4, r0]
	bl sub_020248F0
	ldr r0, [sp, #0xc]
	add r4, r4, #4
	add r0, r0, #1
	add r7, r7, #1
	add r6, r6, #1
	str r0, [sp, #0xc]
	cmp r0, #6
	blt _0220028E
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022002F0: .word 0x0221C718
_022002F4: .word 0x0221C720
	thumb_func_end ov96_02200180

	thumb_func_start ov96_022002F8
ov96_022002F8: ; 0x022002F8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r0, #0
	add r5, r1, #0
	ldr r1, [r6]
	mov r0, #0x14
	bl NARC_ctor
	str r0, [sp, #0x14]
	bl sub_02074490
	add r1, r0, #0
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [r6]
	mov r2, #5
	str r0, [sp, #4]
	mov r0, #0x14
	mov r3, #0x20
	bl GfGfxLoader_GXLoadPal
	add r0, r6, #0
	str r0, [sp, #0x10]
	add r0, #0xec
	mov r7, #0
	add r4, r6, #0
	str r0, [sp, #0x10]
_0220032E:
	mov r1, #1
	ldr r0, [r6]
	lsl r1, r1, #0xc
	bl AllocFromHeapAtEnd
	add r1, r4, #0
	add r1, #0xbc
	str r0, [r1]
	ldrh r0, [r5, #2]
	mov r1, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	ldrh r0, [r5]
	ldr r2, [sp, #0xc]
	str r0, [sp, #8]
	bl sub_020741BC
	add r2, r4, #0
	add r2, #0xbc
	add r1, r0, #0
	ldr r0, [sp, #0x14]
	ldr r2, [r2]
	bl NARC_ReadWholeMember
	add r0, r4, #0
	add r0, #0xbc
	ldr r0, [r0]
	ldr r1, [sp, #0x10]
	bl NNS_G2dGetUnpackedBGCharacterData
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	mov r2, #0
	bl sub_02074364
	add r2, r0, #1
	mov r0, #0x47
	add r1, r6, r7
	lsl r0, r0, #2
	strb r2, [r1, r0]
	ldr r0, [sp, #0x10]
	add r7, r7, #1
	add r0, r0, #4
	add r4, r4, #4
	add r5, r5, #4
	str r0, [sp, #0x10]
	cmp r7, #0xc
	blt _0220032E
	ldr r0, [sp, #0x14]
	bl NARC_dtor
	mov r5, #0
	add r4, r6, #0
	add r7, sp, #0x18
_0220039C:
	lsl r1, r5, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_022004B4
	mov r1, #1
	ldr r0, [r4, #0x48]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r1, #1
	ldr r0, [r4, #0x54]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0
	str r0, [sp, #0x20]
	mov r0, #0xa
	lsl r0, r0, #0x10
	str r0, [sp, #0x18]
	mov r0, #0x2b
	lsl r0, r0, #0x10
	str r0, [sp, #0x1c]
	ldr r0, [r4, #0x48]
	add r1, r7, #0
	bl ov96_021EB588
	ldr r0, [r4, #0x54]
	add r1, r7, #0
	bl ov96_021EB588
	add r5, r5, #1
	add r4, #0x20
	cmp r5, #4
	blt _0220039C
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_022002F8

	thumb_func_start ov96_022003E8
ov96_022003E8: ; 0x022003E8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r0, #0
	mov r0, #0
	add r5, r1, #0
	str r0, [sp, #0xc]
	add r4, r6, #0
	add r7, sp, #0x10
_022003F8:
	ldrb r0, [r5, #6]
	mov r3, #2
	str r0, [sp]
	ldrh r0, [r5, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	str r0, [sp, #8]
	ldrh r1, [r5]
	ldrb r2, [r5, #7]
	add r0, sp, #0x10
	bl sub_020701E4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldrh r0, [r5]
	str r0, [sp, #8]
	ldrh r0, [r7]
	ldrh r1, [r7, #2]
	ldr r2, [r6]
	ldr r3, [r5, #0xc]
	bl sub_0201457C
	mov r1, #0x4a
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldrh r0, [r7]
	ldrh r1, [r7, #4]
	ldr r2, [r6]
	bl sub_02014450
	mov r1, #0x4b
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [sp, #0xc]
	add r5, #0x10
	add r0, r0, #1
	add r4, #8
	str r0, [sp, #0xc]
	cmp r0, #3
	blt _022003F8
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022003E8

	thumb_func_start ov96_02200454
ov96_02200454: ; 0x02200454
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	add r5, r0, #0
	add r4, r2, #0
	cmp r6, #2
	blo _02200464
	bl GF_AssertFail
_02200464:
	cmp r4, #3
	blo _0220046C
	bl GF_AssertFail
_0220046C:
	mov r0, #0x4a
	lsl r0, r0, #2
	lsl r4, r4, #3
	add r7, r5, r0
	mov r1, #0x32
	ldr r0, [r7, r4]
	lsl r1, r1, #6
	bl DC_FlushRange
	lsl r6, r6, #2
	mov r1, #5
	add r2, r5, r6
	lsl r1, r1, #6
	ldr r1, [r2, r1]
	mov r2, #0x32
	ldr r0, [r7, r4]
	lsl r2, r2, #6
	bl sub_020CFECC
	mov r0, #0x4b
	lsl r0, r0, #2
	add r7, r5, r0
	ldr r0, [r7, r4]
	mov r1, #0x20
	bl DC_FlushRange
	mov r1, #0x52
	add r2, r5, r6
	lsl r1, r1, #2
	ldr r1, [r2, r1]
	ldr r0, [r7, r4]
	mov r2, #0x20
	bl GXS_LoadOBJPltt
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02200454

	thumb_func_start ov96_022004B4
ov96_022004B4: ; 0x022004B4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r1, #0
	add r5, r0, #0
	lsl r0, r4, #5
	add r0, r5, r0
	ldr r0, [r0, #0x48]
	add r6, r2, #0
	bl ov96_021EB5B8
	str r0, [sp]
	lsl r0, r4, #1
	add r0, r4, r0
	add r6, r6, r0
	add r7, r5, #0
	lsl r0, r6, #2
	mov r1, #2
	add r7, #0xec
	str r0, [sp, #4]
	ldr r0, [r7, r0]
	lsl r1, r1, #8
	ldr r0, [r0, #0x14]
	bl DC_FlushRange
	ldr r0, [sp, #4]
	mov r1, #6
	ldr r0, [r7, r0]
	lsl r2, r4, #9
	lsl r1, r1, #8
	add r1, r2, r1
	mov r2, #2
	ldr r0, [r0, #0x14]
	lsl r2, r2, #8
	bl sub_020CFECC
	mov r1, #0x47
	add r2, r5, r6
	lsl r1, r1, #2
	ldrb r1, [r2, r1]
	ldr r0, [sp]
	bl sub_02024A14
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022004B4

	thumb_func_start ov96_0220050C
ov96_0220050C: ; 0x0220050C
	push {r4, r5, r6, lr}
	sub sp, #0x48
	add r4, r1, #0
	add r5, r0, #0
	lsr r3, r2, #0x1f
	lsl r1, r2, #0x16
	sub r1, r1, r3
	mov r0, #0x16
	ror r1, r0
	add r0, r3, r1
	lsl r1, r0, #0x10
	asr r0, r1, #9
	lsr r0, r0, #0x16
	add r0, r1, r0
	lsl r0, r0, #6
	lsr r1, r0, #0x10
	mov r0, #1
	lsl r0, r0, #0x10
	sub r0, r0, r1
	lsl r0, r0, #0x10
	ldr r6, _022005A8 ; =0x0221C748
	lsr r2, r0, #0x10
	ldmia r6!, {r0, r1}
	add r3, sp, #0x30
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	ldr r6, _022005AC ; =0x0221C754
	str r0, [r3]
	ldmia r6!, {r0, r1}
	add r3, sp, #0x24
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	asr r0, r2, #4
	lsl r2, r0, #1
	lsl r1, r2, #1
	ldr r3, _022005B0 ; =0x021094DC
	add r2, r2, #1
	lsl r2, r2, #1
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	add r0, sp, #0
	bl MTX_RotZ33_
	add r0, sp, #0x30
	add r1, sp, #0
	add r2, r0, #0
	bl MTX_MultVec33
	add r0, sp, #0x24
	add r1, sp, #0x30
	add r2, sp, #0x3c
	bl VEC_Add
	lsl r4, r4, #5
	add r0, r5, r4
	ldr r0, [r0, #0x48]
	add r1, sp, #0x3c
	bl ov96_021EB588
	add r0, r5, r4
	ldr r0, [r0, #0x54]
	add r1, sp, #0x3c
	bl ov96_021EB588
	add r0, r5, r4
	ldr r0, [r0, #0x4c]
	add r1, sp, #0x3c
	bl ov96_021EB588
	add r0, r5, r4
	ldr r0, [r0, #0x50]
	add r1, sp, #0x3c
	bl ov96_021EB588
	add sp, #0x48
	pop {r4, r5, r6, pc}
	nop
_022005A8: .word 0x0221C748
_022005AC: .word 0x0221C754
_022005B0: .word 0x021094DC
	thumb_func_end ov96_0220050C

	thumb_func_start ov96_022005B4
ov96_022005B4: ; 0x022005B4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r5, r0, #0
	add r0, r2, #0
	add r4, r1, #0
	bl _utof
	bl _f2d
	ldr r2, _022006B4 ; =0x9999999A
	ldr r3, _022006B8 ; =0x40599999
	bl _ddiv
	bl _dtou
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x1c]
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r6, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x20
	strb r1, [r0, #2]
	add r0, r6, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x20
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x20
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x20
	strb r1, [r0, #1]
	mov r4, #0
	mov r7, #4
	mov r6, #8
_0220062E:
	str r7, [sp]
	str r6, [sp, #4]
	ldr r0, [r5, #0x38]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x20
	add r0, #2
	ldrb r0, [r0, r4]
	add r2, #0xe
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x20
	ldrb r0, [r0, r4]
	mov r1, #5
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #8]
	add r3, r6, #0
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _0220062E
	ldr r0, [sp, #0x1c]
	mov r1, #5
	bl _s32_div_f
	add r4, r1, #0
	ldr r0, [sp, #0x1c]
	mov r1, #5
	bl _s32_div_f
	mov r1, #4
	lsl r0, r0, #0x1b
	str r1, [sp]
	mov r3, #8
	str r3, [sp, #4]
	ldr r1, [r5, #0x38]
	lsr r0, r0, #0x18
	add r1, #0xc
	str r1, [sp, #8]
	lsl r1, r4, #0x1a
	lsr r1, r1, #0x18
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #8]
	mov r1, #5
	mov r2, #0x18
	bl sub_0201C568
	ldr r0, [r5, #8]
	mov r1, #5
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022006B4: .word 0x9999999A
_022006B8: .word 0x40599999
	thumb_func_end ov96_022005B4

	thumb_func_start ov96_022006BC
ov96_022006BC: ; 0x022006BC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	mov r5, #0x59
	add r4, r0, #0
	lsl r5, r5, #2
	add r6, r1, #0
	ldr r1, [r4, r5]
	cmp r1, #3
	bhi _0220073A
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_022006DA: ; jump table
	.short _022006E2 - _022006DA - 2 ; case 0
	.short _0220076E - _022006DA - 2 ; case 1
	.short _022007B2 - _022006DA - 2 ; case 2
	.short _0220084C - _022006DA - 2 ; case 3
_022006E2:
	add r0, r5, #4
	ldr r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x14
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0x18
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #2
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #0x1c]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r2, #0
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0x18
	bl ov96_021EB588
	mov r0, #0x2e
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #0x10
	cmp r1, r0
	bge _0220073C
_0220073A:
	b _022008FA
_0220073C:
	mov r0, #0x76
	lsl r0, r0, #0xe
	str r0, [sp, #0x1c]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0x18
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0x18
	bl ov96_021EB588
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _022008FA
_0220076E:
	add r1, r5, #4
	ldr r1, [r4, r1]
	add r2, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02200454
	sub r1, r5, #4
	add r0, r4, r1
	add r1, #8
	ldr r1, [r4, r1]
	lsl r2, r1, #1
	ldrh r1, [r0, r2]
	cmp r1, #0
	bne _02200790
	mov r1, #2
	b _02200792
_02200790:
	sub r1, r1, #1
_02200792:
	mov r3, #0x5a
	lsl r3, r3, #2
	strh r1, [r0, r2]
	ldr r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	str r0, [r4, r3]
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _022008FA
_022007B2:
	add r0, r5, #4
	ldr r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x14
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0xc
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #2
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #0x10]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r2, #0
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	mov r0, #0xa2
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0xe
	cmp r1, r0
	blt _022008FA
	str r0, [sp, #0x10]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	add r3, r5, #4
	ldr r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	str r0, [r4, r3]
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _022008FA
_0220084C:
	add r0, r5, #4
	ldr r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x14
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r3, r0, #0
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #4]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	mov r0, #0x23
	ldr r1, [sp, #4]
	lsl r0, r0, #0x10
	cmp r1, r0
	blt _022008FA
	str r0, [sp, #4]
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x18
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	add r0, r5, #4
	ldr r1, [r4, r0]
	sub r0, #0x10
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	add r3, r5, #4
	ldr r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	str r0, [r4, r3]
	add r0, r6, #2
	mov r1, #3
	bl _s32_div_f
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_02200BD8
	mov r0, #0
	str r0, [r4, r5]
	add sp, #0x24
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_022008FA:
	mov r0, #0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_022006BC

	thumb_func_start ov96_02200900
ov96_02200900: ; 0x02200900
	push {r3, r4, r5, lr}
	add r4, r0, #0
	add r5, r1, #0
	beq _0220090C
	cmp r5, #4
	blo _02200910
_0220090C:
	bl GF_AssertFail
_02200910:
	mov r1, #0x65
	sub r0, r5, #1
	lsl r1, r1, #2
	lsl r0, r0, #2
	add r3, r4, r1
	ldrh r2, [r3, r0]
	add r2, #0x20
	strh r2, [r3, r0]
	ldrh r2, [r3, r0]
	cmp r2, #0x58
	blo _02200934
	mov r2, #0
	add r1, r1, #2
	strh r2, [r3, r0]
	add r2, r4, r1
	ldrh r1, [r2, r0]
	add r1, r1, #1
	strh r1, [r2, r0]
_02200934:
	ldr r1, _0220094C ; =0x00000196
	add r2, r4, r1
	ldrh r1, [r2, r0]
	cmp r1, #3
	blo _02200946
	mov r1, #0
	strh r1, [r2, r0]
	mov r0, #1
	pop {r3, r4, r5, pc}
_02200946:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_0220094C: .word 0x00000196
	thumb_func_end ov96_02200900

	thumb_func_start ov96_02200950
ov96_02200950: ; 0x02200950
	push {r3, r4, r5, r6, r7, lr}
	str r3, [sp]
	mov r3, #0x5b
	add r5, r0, #0
	lsl r3, r3, #2
	add r4, r1, #0
	add r7, r5, r3
	ldrb r3, [r7, r4]
	ldr r6, [sp, #0x18]
	cmp r2, r3
	beq _0220096C
	strb r2, [r7, r4]
	bl ov96_022004B4
_0220096C:
	ldr r0, [sp]
	cmp r0, #0
	beq _0220099A
	lsl r4, r4, #5
	add r0, r5, r4
	ldr r0, [r0, #0x48]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r0, r5, r4
	mov r1, #1
	ldr r0, [r0, #0x50]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r5, r4
	ldr r0, [r0, #0x4c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	b _02200A0E
_0220099A:
	lsl r4, r4, #5
	add r0, r5, r4
	mov r1, #1
	ldr r0, [r0, #0x48]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r5, r4
	ldr r0, [r0, #0x50]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	cmp r6, #1
	beq _022009BE
	cmp r6, #2
	beq _022009E0
	b _02200A02
_022009BE:
	add r0, r5, r4
	add r0, #0x58
	ldrb r0, [r0]
	cmp r6, r0
	beq _02200A0E
	add r7, r5, #0
	add r7, #0x4c
	mov r1, #1
	ldr r0, [r7, r4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r7, r4]
	mov r1, #8
	bl ov96_021EB564
	b _02200A0E
_022009E0:
	add r0, r5, r4
	add r0, #0x58
	ldrb r0, [r0]
	cmp r6, r0
	beq _02200A0E
	add r7, r5, #0
	add r7, #0x4c
	mov r1, #1
	ldr r0, [r7, r4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r7, r4]
	mov r1, #9
	bl ov96_021EB564
	b _02200A0E
_02200A02:
	add r0, r5, r4
	ldr r0, [r0, #0x4c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02200A0E:
	add r0, r5, r4
	add r0, #0x58
	strb r6, [r0]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02200950

	thumb_func_start ov96_02200A18
ov96_02200A18: ; 0x02200A18
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r2, #0
	cmp r1, #1
	bne _02200A32
	mov r0, #0x56
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02200A40
_02200A32:
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02200A40:
	cmp r4, #1
	bne _02200A54
	mov r0, #0x57
	lsl r0, r0, #2
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	pop {r3, r4, r5, pc}
_02200A54:
	mov r0, #0x57
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02200A18

	thumb_func_start ov96_02200A64
ov96_02200A64: ; 0x02200A64
	push {r4, r5, r6, lr}
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r6, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x64
	mul r0, r1
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r4, #0
	mov r1, #0x3c
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0x5f
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0x3c
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0x61
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	mov r0, #0x62
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0x19
	lsl r0, r0, #4
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02200A64

	thumb_func_start ov96_02200B04
ov96_02200B04: ; 0x02200B04
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r7, r1, #0
	mov r6, #0
	add r4, r5, #0
_02200B10:
	mov r0, #0x5f
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #2
	bl sub_02024ADC
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #6
	blt _02200B10
	mov r6, #0
	add r4, r5, #0
_02200B28:
	mov r0, #0x15
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	mov r1, #2
	bl sub_02024ADC
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _02200B28
	mov r0, #1
	mov r2, #0
	add r1, sp, #4
_02200B46:
	cmp r2, r7
	bne _02200B4C
	strb r2, [r1]
_02200B4C:
	add r2, r2, #1
	cmp r2, #4
	blt _02200B46
	mov r2, #0
	add r4, sp, #4
	add r3, sp, #4
_02200B58:
	ldrb r1, [r3]
	cmp r1, r2
	beq _02200B68
	add r1, r0, #0
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	strb r2, [r4, r1]
_02200B68:
	add r2, r2, #1
	cmp r2, #4
	blt _02200B58
	mov r0, #4
	mov r7, #0
	mov r6, #3
	add r4, sp, #4
	str r0, [sp]
_02200B78:
	ldrb r0, [r4]
	add r1, r6, #0
	lsl r0, r0, #5
	add r0, r5, r0
	ldr r0, [r0, #0x4c]
	bl ov96_021EB630
	ldrb r0, [r4]
	add r1, r6, #0
	lsl r0, r0, #5
	add r0, r5, r0
	ldr r0, [r0, #0x50]
	bl ov96_021EB630
	ldrb r0, [r4]
	ldr r1, [sp]
	lsl r0, r0, #5
	add r0, r5, r0
	ldr r0, [r0, #0x48]
	bl ov96_021EB630
	ldrb r0, [r4]
	add r1, r7, #0
	add r1, #0xb
	lsl r0, r0, #5
	add r0, r5, r0
	ldr r0, [r0, #0x54]
	bl ov96_021EB630
	ldr r0, [sp]
	add r7, r7, #1
	add r0, r0, #2
	add r6, r6, #2
	add r4, r4, #1
	str r0, [sp]
	cmp r7, #4
	blt _02200B78
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02200B04

	thumb_func_start ov96_02200BC8
ov96_02200BC8: ; 0x02200BC8
	lsl r1, r1, #1
	add r1, r0, r1
	mov r0, #0x16
	lsl r0, r0, #4
	ldrh r0, [r1, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	thumb_func_end ov96_02200BC8

	thumb_func_start ov96_02200BD8
ov96_02200BD8: ; 0x02200BD8
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r4, r0, #0
	add r5, r1, #0
	add r0, #0xc
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r0, #1
	lsl r2, r5, #2
	add r5, r4, r2
	mov r2, #0x17
	str r0, [sp]
	mov r3, #2
	str r3, [sp, #4]
	lsl r2, r2, #4
	ldr r0, [r4, #0x30]
	ldr r2, [r5, r2]
	mov r1, #0
	bl BufferString
	ldr r0, [r4, #0x30]
	ldr r1, [r4, #0x2c]
	ldr r3, [r4]
	mov r2, #0x9a
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r5, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02200C3C ; =0x000F0E00
	add r2, r5, #0
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0xc
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add r4, #0xc
	add r0, r4, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02200C3C: .word 0x000F0E00
	thumb_func_end ov96_02200BD8

	thumb_func_start ov96_02200C40
ov96_02200C40: ; 0x02200C40
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r0, #0x1c
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r0, [r5, #0x2c]
	ldr r1, _02200C84 ; =0x00000131
	bl NewString_ReadMsgData
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02200C88 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0x1c
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r5, #0x1c
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02200C84: .word 0x00000131
_02200C88: .word 0x000F0E00
	thumb_func_end ov96_02200C40

	thumb_func_start ov96_02200C8C
ov96_02200C8C: ; 0x02200C8C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	str r0, [sp, #4]
	ldr r0, _02200D78 ; =0x0221C728
	str r1, [sp, #8]
	ldr r2, [r0]
	ldr r1, [r0, #4]
	str r2, [sp, #0x14]
	str r1, [sp, #0x18]
	ldr r1, [r0, #8]
	ldr r0, [r0, #0xc]
	add r5, sp, #0x14
	add r4, sp, #0xc
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r6, #0
	mov r7, #3
_02200CAE:
	ldr r0, [r4]
	add r1, r7, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	ldr r3, [r5]
	ldr r0, [sp, #4]
	lsl r3, r3, #0x18
	mov r2, #2
	lsr r3, r3, #0x18
	bl ov96_021EB408
	add r6, r6, #1
	add r4, r4, #4
	add r5, r5, #4
	cmp r6, #2
	blt _02200CAE
	ldr r4, [sp, #8]
	mov r5, #0
	add r7, sp, #0xc
	add r6, sp, #0x14
_02200CD8:
	ldr r1, [r6]
	ldr r2, [r7]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021EB4F4
	mov r1, #0x15
	lsl r1, r1, #4
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	mov r1, #0
	str r1, [sp, #0x24]
	mov r1, #0xa
	lsl r1, r1, #0xe
	str r1, [sp, #0x1c]
	mov r1, #1
	sub r2, r1, r5
	mov r1, #0x58
	mul r1, r2
	add r1, #0x30
	lsl r2, r1, #0xc
	mov r1, #2
	lsl r1, r1, #0x14
	add r1, r2, r1
	str r1, [sp, #0x20]
	add r1, sp, #0x1c
	bl sub_020247D4
	mov r0, #0x15
	lsl r0, r0, #4
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp, #4]
	mov r1, #0x65
	mov r2, #0x10
	bl ov96_021EB4F4
	mov r1, #0x56
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #8
	bl ov96_021EB564
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	add r1, sp, #0x1c
	bl ov96_021EB588
	mov r0, #0x56
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r5, r5, #1
	add r7, r7, #4
	add r6, r6, #4
	add r4, r4, #4
	cmp r5, #2
	blt _02200CD8
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	bl ov96_02200D7C
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02200D78: .word 0x0221C728
	thumb_func_end ov96_02200C8C

	thumb_func_start ov96_02200D7C
ov96_02200D7C: ; 0x02200D7C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r7, r0, #0
	ldr r0, _02200DF4 ; =0x0221C728
	str r1, [sp]
	ldr r1, [r0, #0x18]
	ldr r0, [r0, #0x1c]
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r4, #0
_02200D90:
	lsl r0, r4, #2
	add r1, sp, #0xc
	ldr r5, [r1, r0]
	str r0, [sp, #4]
	add r0, r7, #0
	add r1, r5, #0
	mov r2, #0
	bl ov96_021EB5EC
	ldr r6, [r0]
	add r0, r7, #0
	add r1, r5, #0
	mov r2, #1
	bl ov96_021EB5EC
	ldr r5, [r0]
	add r0, r6, #0
	bl sub_0200AF00
	add r6, r0, #0
	add r0, r5, #0
	add r1, r6, #0
	bl sub_0200B0F8
	str r0, [sp, #8]
	ldr r1, [sp]
	ldr r0, [sp, #4]
	add r5, r1, r0
	add r0, r6, #0
	mov r1, #2
	bl sub_020B802C
	mov r1, #5
	lsl r1, r1, #6
	str r0, [r5, r1]
	ldr r0, [sp, #8]
	mov r1, #2
	bl sub_020B8078
	mov r1, #0x52
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _02200D90
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_02200DF4: .word 0x0221C728
	thumb_func_end ov96_02200D7C

	thumb_func_start ov96_02200DF8
ov96_02200DF8: ; 0x02200DF8
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r4, #8]
	ldr r2, _02200E34 ; =0x0221C760
	add r1, #0xc
	bl AddWindow
	add r1, r4, #0
	ldr r0, [r4, #8]
	ldr r2, _02200E38 ; =0x0221C768
	add r1, #0x1c
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4, #8]
	mov r1, #4
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_02200E34: .word 0x0221C760
_02200E38: .word 0x0221C768
	thumb_func_end ov96_02200DF8

	thumb_func_start ov96_02200E3C
ov96_02200E3C: ; 0x02200E3C
	push {r3, r4, r5, lr}
	add r5, r1, #0
	mov r1, #0xfa
	lsl r1, r1, #2
	bl AllocFromHeap
	mov r2, #0xfa
	mov r1, #0
	lsl r2, r2, #2
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x3e
	lsl r0, r0, #4
	mov r1, #4
	sub r2, r1, r5
	strb r5, [r4, r0]
	add r1, r0, #5
	strb r2, [r4, r1]
	ldrb r2, [r4, r1]
	add r1, r0, #4
	strb r2, [r4, r1]
	add r1, r0, #3
	mov r2, #0xa
	strb r2, [r4, r1]
	ldrb r1, [r4, r1]
	add r0, r0, #2
	strb r1, [r4, r0]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02200E3C

	thumb_func_start ov96_02200E78
ov96_02200E78: ; 0x02200E78
	lsl r1, r1, #4
	str r2, [r0, r1]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02200E78

	thumb_func_start ov96_02200E80
ov96_02200E80: ; 0x02200E80
	push {r4, r5, r6, r7}
	mov r5, #0
	mov r2, #1
_02200E86:
	ldr r3, [r1]
	lsl r3, r3, #0x18
	lsr r4, r3, #0x18
	str r4, [r0, #0x4c]
	ldr r3, [r1]
	asr r6, r3, #8
	asr r3, r3, #0x10
	lsl r6, r6, #0x18
	lsl r3, r3, #0x10
	lsr r6, r6, #0x18
	lsr r3, r3, #0x10
	cmp r4, #0
	beq _02200ED8
	str r2, [r0, #0x40]
	ldr r4, [r0, #0x4c]
	cmp r4, #2
	bne _02200EAE
	mov r4, #0x20
	str r4, [r0, #0x50]
	b _02200EBC
_02200EAE:
	cmp r4, #1
	bne _02200EB8
	mov r4, #0x30
	str r4, [r0, #0x50]
	b _02200EBC
_02200EB8:
	mov r4, #0x40
	str r4, [r0, #0x50]
_02200EBC:
	ldr r7, [r0, #0x50]
	add r6, #0x20
	lsr r4, r7, #0x1f
	add r4, r7, r4
	asr r4, r4, #1
	sub r3, r3, r4
	str r3, [r0, #0x44]
	ldr r4, [r0, #0x50]
	lsr r3, r4, #0x1f
	add r3, r4, r3
	asr r3, r3, #1
	sub r3, r6, r3
	str r3, [r0, #0x48]
	b _02200EDC
_02200ED8:
	mov r3, #0
	str r3, [r0, #0x40]
_02200EDC:
	add r5, r5, #1
	add r1, r1, #4
	add r0, #0x14
	cmp r5, #0x1e
	blt _02200E86
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02200E80

	thumb_func_start ov96_02200EEC
ov96_02200EEC: ; 0x02200EEC
	ldr r3, _02200EF0 ; =FreeToHeap
	bx r3
	.balign 4, 0
_02200EF0: .word FreeToHeap
	thumb_func_end ov96_02200EEC

	thumb_func_start ov96_02200EF4
ov96_02200EF4: ; 0x02200EF4
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	ldr r0, _02200F7C ; =0x000003E5
	add r5, r1, #0
	ldrb r1, [r5, r0]
	add r7, r2, #0
	mov r2, #4
	cmp r1, #4
	bne _02200F0A
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02200F0A:
	sub r1, r0, #3
	ldrb r1, [r5, r1]
	add r3, r1, #1
	sub r1, r0, #3
	strb r3, [r5, r1]
	sub r3, r0, #2
	ldrb r1, [r5, r1]
	ldrb r3, [r5, r3]
	cmp r1, r3
	blo _02200F2C
	add r1, r0, #0
	mov r3, #1
	sub r1, #9
	str r3, [r5, r1]
	mov r1, #0
	sub r0, r0, #3
	strb r1, [r5, r0]
_02200F2C:
	mov r1, #0xf7
	lsl r1, r1, #2
	ldr r0, [r5, r1]
	cmp r0, #0
	beq _02200F76
	add r0, r1, #0
	add r0, #8
	add r1, r1, #5
	ldrb r0, [r5, r0]
	ldrb r1, [r5, r1]
	add r4, r0, r1
	cmp r4, r0
	bge _02200F4A
	bl GF_AssertFail
_02200F4A:
	lsl r2, r4, #0x18
	add r0, r6, #0
	add r1, r5, #0
	lsr r2, r2, #0x18
	add r3, r7, #0
	bl ov96_02200F84
	lsl r0, r4, #0x18
	lsr r2, r0, #0x18
	ldr r0, _02200F80 ; =0x000003E1
	ldrb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, r0]
	sub r1, r0, #1
	ldrb r3, [r5, r0]
	ldrb r1, [r5, r1]
	cmp r3, r1
	blo _02200F76
	mov r1, #0
	strb r1, [r5, r0]
	sub r0, r0, #5
	str r1, [r5, r0]
_02200F76:
	add r0, r2, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02200F7C: .word 0x000003E5
_02200F80: .word 0x000003E1
	thumb_func_end ov96_02200EF4

	thumb_func_start ov96_02200F84
ov96_02200F84: ; 0x02200F84
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0xf8
	str r2, [sp, #0xc]
	str r0, [sp, #4]
	ldr r0, [sp, #0xc]
	str r1, [sp, #8]
	lsl r0, r0, #4
	str r0, [sp, #0x14]
	ldr r0, [r1, r0]
	str r3, [sp, #0x10]
	add r1, r0, #0
	add r1, #0x9d
	ldrb r1, [r1]
	cmp r1, #0
	bne _02200FC0
	add r1, r0, #0
	add r1, #0x8b
	ldrb r2, [r1]
	mov r1, #0x1c
	mul r1, r2
	add r1, r0, r1
	add r1, #0x30
	ldrb r1, [r1]
	cmp r1, #2
	beq _02200FC0
	add r0, #0xa9
	ldrb r0, [r0]
	cmp r0, #0
	beq _02200FC2
_02200FC0:
	b _02201444
_02200FC2:
	mov r1, #0
	add r0, r1, #0
	add r2, sp, #0x4c
	str r0, [sp, #0x2c]
_02200FCA:
	ldr r0, [sp, #0x2c]
	add r1, r1, #1
	stmia r2!, {r0}
	cmp r1, #4
	blt _02200FCA
	ldr r7, [sp, #8]
	add r6, r0, #0
	add r5, sp, #0x5c
_02200FDA:
	add r3, r7, #0
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r4, [r5]
	add r0, sp, #0x44
	str r0, [sp]
	ldr r1, [r4, #0x7c]
	add r0, r4, #0
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	add r2, r4, #0
	add r0, #0x8b
	add r2, #0x80
	ldrb r0, [r0]
	ldr r3, [r2]
	asr r2, r3, #0xb
	lsl r0, r0, #2
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r0, [r4, r0]
	asr r2, r2, #0xc
	add r3, sp, #0x48
	bl ov96_021EB0A4
	add r0, sp, #0x3c
	str r0, [sp]
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	ldr r1, [sp, #0x48]
	ldr r2, [sp, #0x44]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x40
	bl ov96_021EB03C
	ldr r1, [sp, #0x40]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [sp, #0x3c]
	str r0, [r5, #8]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r1, [sp, #8]
	asr r0, r0, #0xc
	str r0, [r5, #0xc]
	add r4, r1, r6
	sub r0, #0x20
	mov r1, #0x28
	bl _s32_div_f
	mov r1, #0xa6
	lsl r1, r1, #2
	strb r0, [r4, r1]
	add r0, r1, #0
	ldrb r0, [r4, r0]
	cmp r0, #4
	bls _02201066
	bl GF_AssertFail
_02201066:
	add r6, r6, #1
	add r7, #0x10
	add r5, #0x10
	cmp r6, #4
	blt _02200FDA
	ldr r0, [sp, #0x14]
	add r1, sp, #0x5c
	add r0, r1, r0
	ldr r2, [sp, #8]
	str r0, [sp, #0x28]
	mov r4, #0
	add r3, sp, #0x9c
_0220107E:
	add r6, r2, #0
	add r6, #0x40
	ldmia r6!, {r0, r1}
	add r5, r3, #0
	stmia r5!, {r0, r1}
	ldmia r6!, {r0, r1}
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	add r4, r4, #1
	str r0, [r5]
	add r2, #0x14
	add r3, #0x14
	cmp r4, #0x1e
	blt _0220107E
	ldr r0, [sp, #0x28]
	ldr r1, [r0, #8]
	mov r0, #0x36
	lsl r0, r0, #4
	cmp r1, r0
	blt _022010D6
	mov r5, #0
	add r6, r5, #0
	add r4, sp, #0x5c
	sub r6, #0xa0
_022010AE:
	add r0, r4, #0
	add r0, #8
	add r1, r6, #0
	bl ov96_0220144C
	add r5, r5, #1
	add r4, #0x10
	cmp r5, #4
	blt _022010AE
	mov r5, #0
	add r4, sp, #0x9c
	mov r6, #0x50
_022010C6:
	add r0, r4, #4
	add r1, r6, #0
	bl ov96_0220144C
	add r5, r5, #1
	add r4, #0x14
	cmp r5, #0x1e
	blt _022010C6
_022010D6:
	ldr r4, [sp, #8]
	mov r5, #0
_022010DA:
	ldr r0, _02201308 ; =0x000002AE
	lsr r2, r5, #0x1f
	lsl r1, r5, #0x1e
	strh r5, [r4, r0]
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r1, r2, r1
	mov r0, #0x28
	add r6, r1, #0
	mul r6, r0
	ldr r0, [sp, #0x28]
	ldr r0, [r0, #8]
	add r0, #0x14
	add r1, r0, r6
	mov r0, #0xa7
	lsl r0, r0, #2
	str r1, [r4, r0]
	asr r0, r5, #1
	lsr r0, r0, #0x1e
	add r0, r5, r0
	asr r1, r0, #2
	mov r0, #0x28
	add r7, r1, #0
	mul r7, r0
	add r1, r7, #0
	mov r0, #0x2a
	add r1, #0x34
	lsl r0, r0, #4
	str r1, [r4, r0]
	bl LCRandom
	mov r1, #0x28
	bl _s32_div_f
	ldr r0, [sp, #0x28]
	ldr r0, [r0, #8]
	add r0, r0, r6
	add r1, r0, r1
	mov r0, #0xa9
	lsl r0, r0, #2
	str r1, [r4, r0]
	bl LCRandom
	mov r1, #0x28
	bl _s32_div_f
	add r7, #0x20
	mov r0, #0xaa
	add r1, r7, r1
	lsl r0, r0, #2
	str r1, [r4, r0]
	add r5, r5, #1
	add r4, #0x14
	cmp r5, #0x10
	blt _022010DA
	ldr r2, _0220130C ; =0x0221C770
	ldr r3, [sp, #8]
	mov r4, #0
	add r0, r0, #4
_02201152:
	ldr r1, [r2]
	add r4, r4, #1
	strh r1, [r3, r0]
	add r2, r2, #4
	add r3, #0x14
	cmp r4, #0x10
	blt _02201152
	mov r0, #0x20
	str r0, [sp, #0x20]
	ldr r1, [sp, #8]
	ldr r0, [sp, #0xc]
	mov r6, #0
	add r0, r1, r0
	add r4, sp, #0x4c
	str r6, [sp, #0x24]
	str r0, [sp, #0x1c]
_02201172:
	ldr r0, [sp, #0x24]
	mov r1, #0x14
	mul r1, r0
	ldr r0, [sp, #8]
	mov r5, #0
	add r0, r0, r1
	add r7, sp, #0x5c
	str r0, [sp, #0x18]
_02201182:
	ldr r0, [sp, #0xc]
	cmp r5, r0
	beq _0220121A
	ldr r1, [sp, #0x28]
	ldr r0, [r7, #8]
	ldr r2, [r1, #8]
	add r1, r2, #0
	add r1, #0xa0
	cmp r1, r0
	blt _0220121A
	sub r0, r0, r2
	bmi _022011F2
	cmp r0, #0xa0
	bge _022011F2
	ldr r1, [sp, #8]
	add r2, r1, r5
	mov r1, #0xa6
	lsl r1, r1, #2
	ldrb r1, [r2, r1]
	cmp r6, r1
	bne _022011C4
	mov r1, #0xa6
	ldr r2, [sp, #0x1c]
	lsl r1, r1, #2
	ldrb r1, [r2, r1]
	cmp r6, r1
	ldr r1, [r4]
	bne _022011C0
	sub r1, r1, #4
	str r1, [r4]
	b _022011C4
_022011C0:
	sub r1, r1, #2
	str r1, [r4]
_022011C4:
	mov r1, #0x28
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	cmp r2, #4
	blo _022011D8
	bl GF_AssertFail
	b _0220121A
_022011D8:
	mov r0, #0x14
	add r1, r2, #0
	mul r1, r0
	ldr r0, [sp, #0x18]
	add r0, r0, r1
	mov r1, #0xab
	lsl r1, r1, #2
	ldrsh r1, [r0, r1]
	sub r2, r1, #3
	mov r1, #0xab
	lsl r1, r1, #2
	strh r2, [r0, r1]
	b _0220121A
_022011F2:
	mov r1, #0x4f
	mvn r1, r1
	cmp r0, r1
	blt _0220121A
	ldr r0, [sp, #8]
	add r1, r0, r5
	mov r0, #0xa6
	lsl r0, r0, #2
	ldrb r0, [r1, r0]
	cmp r6, r0
	bne _0220121A
	mov r0, #0xa6
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #2
	ldrb r0, [r1, r0]
	cmp r6, r0
	bne _0220121A
	ldr r0, [r4]
	add r0, r0, #2
	str r0, [r4]
_0220121A:
	add r5, r5, #1
	add r7, #0x10
	cmp r5, #4
	blt _02201182
	mov r0, #0
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x20]
	add r2, sp, #0x9c
	add r0, #0x28
	mov ip, r0
	ldr r0, [sp, #0x28]
	add r3, sp, #0x4c
	ldr r5, [r0, #8]
_02201234:
	ldr r0, [r2]
	cmp r0, #0
	beq _02201280
	add r0, r5, #0
	ldr r1, [r2, #4]
	add r0, #0xa0
	cmp r0, r1
	blt _02201272
	sub r0, r1, r5
	cmp r0, #0
	ble _02201272
	cmp r0, #0xa0
	bgt _02201272
	ldr r7, [r2, #8]
	ldr r0, [r2, #0x10]
	add r1, r7, r0
	ldr r0, [sp, #0x20]
	cmp r0, r1
	bge _02201272
	mov r0, ip
	cmp r7, r0
	bge _02201272
	ldr r0, [r2, #0xc]
	cmp r0, #3
	ldr r0, [r3]
	bne _0220126E
	sub r0, r0, #1
	str r0, [r3]
	b _02201272
_0220126E:
	sub r0, r0, #6
	str r0, [r3]
_02201272:
	ldr r0, [sp, #0x30]
	add r2, #0x14
	add r0, r0, #1
	add r3, r3, #4
	str r0, [sp, #0x30]
	cmp r0, #0x1e
	blt _02201234
_02201280:
	ldr r0, [sp, #0x24]
	add r6, r6, #1
	add r0, r0, #4
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x20]
	add r4, r4, #4
	add r0, #0x28
	str r0, [sp, #0x20]
	cmp r6, #4
	bge _02201296
	b _02201172
_02201296:
	mov r5, #0xab
	lsl r5, r5, #2
	ldr r3, [sp, #8]
	mov r4, #0
	add r1, sp, #0x4c
	add r0, r5, #0
_022012A2:
	asr r6, r4, #1
	lsr r6, r6, #0x1e
	add r6, r4, r6
	asr r6, r6, #2
	lsl r6, r6, #2
	ldrsh r2, [r3, r5]
	ldr r6, [r1, r6]
	add r4, r4, #1
	add r2, r2, r6
	strh r2, [r3, r0]
	add r3, #0x14
	cmp r4, #0x10
	blt _022012A2
	ldr r1, _02201310 ; =0x00000A8C
	ldr r0, [sp, #0x10]
	cmp r0, r1
	bge _022012F0
	mov r2, #0
	mov r3, #0xab
	add r1, r2, #0
	mov r7, #0x14
	lsl r3, r3, #2
	mov r4, #0x28
	mov r5, #0x3c
_022012D2:
	add r6, r1, #0
	ldr r0, [sp, #8]
	mul r6, r7
	add r0, r0, r6
	add r0, r0, r3
	ldrsh r6, [r0, r4]
	add r2, r2, #1
	add r1, r1, #4
	add r6, r6, #3
	strh r6, [r0, #0x28]
	ldrsh r6, [r0, r5]
	add r6, r6, #3
	strh r6, [r0, #0x3c]
	cmp r2, #4
	blt _022012D2
_022012F0:
	ldr r0, [sp, #0x28]
	ldr r2, [r0]
	add r0, r2, #0
	add r0, #0x8b
	ldrb r1, [r0]
	mov r0, #0x1c
	mul r0, r1
	add r0, r2, r0
	ldr r0, [r0, #0x24]
	ldr r1, _02201314 ; =0x41A00000
	b _02201318
	nop
_02201308: .word 0x000002AE
_0220130C: .word 0x0221C770
_02201310: .word 0x00000A8C
_02201314: .word 0x41A00000
_02201318:
	bl _fleq
	bhi _02201350
	mov r2, #0
	mov r3, #0xab
	add r1, r2, #0
	mov r7, #0x14
	lsl r3, r3, #2
	mov r4, #0x28
	mov r5, #0x3c
_0220132C:
	add r6, r1, #0
	ldr r0, [sp, #8]
	mul r6, r7
	add r0, r0, r6
	add r0, r0, r3
	ldrsh r6, [r0, r4]
	add r2, r2, #1
	add r1, r1, #4
	sub r6, r6, #2
	strh r6, [r0, #0x28]
	ldrsh r6, [r0, r5]
	sub r6, r6, #2
	strh r6, [r0, #0x3c]
	cmp r2, #4
	blt _0220132C
	ldr r0, [sp, #0x2c]
	add r0, #8
	str r0, [sp, #0x2c]
_02201350:
	ldr r0, [sp, #0x28]
	mov r1, #3
	ldr r4, [r0]
	add r0, r4, #0
	add r0, #0x8b
	ldrb r0, [r0]
	add r0, r0, #1
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x1c
	mul r0, r1
	add r0, r4, r0
	add r0, #0x30
	ldrb r0, [r0]
	cmp r0, #1
	bne _0220137A
	ldr r0, [sp, #0x2c]
	sub r0, r0, #5
	str r0, [sp, #0x2c]
_0220137A:
	ldr r0, [sp, #8]
	bl ov96_0220146C
	add r4, r0, #0
	mov r0, #0x10
	ldrsh r1, [r4, r0]
	ldr r0, [sp, #0x2c]
	cmp r1, r0
	blt _0220140C
	mov r1, #0xf9
	ldr r0, [sp, #8]
	lsl r1, r1, #2
	ldrb r1, [r0, r1]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	blo _02201444
	ldr r0, [sp, #0x28]
	ldr r2, [sp, #0x28]
	ldr r1, [r0]
	add r0, sp, #0x34
	str r0, [sp]
	add r0, r1, #0
	add r0, #0x8b
	ldrb r0, [r0]
	ldr r2, [r2, #0xc]
	add r3, sp, #0x38
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r1, [sp, #0x28]
	ldr r1, [r1, #8]
	bl ov96_021EB0A4
	ldr r0, [sp, #0x38]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x28]
	ldr r0, [r0]
	add r0, #0xb0
	str r1, [r0]
	ldr r0, [sp, #0x34]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x28]
	ldr r0, [r0]
	add r0, #0xb4
	str r1, [r0]
	ldr r1, [sp, #0x28]
	mov r0, #0
	ldr r1, [r1]
	add r1, #0xb8
	str r0, [r1]
	ldr r1, [r4, #8]
	lsl r2, r1, #0xc
	ldr r1, [sp, #0x28]
	ldr r1, [r1]
	add r1, #0xbc
	str r2, [r1]
	ldr r1, [r4, #0xc]
	lsl r2, r1, #0xc
	ldr r1, [sp, #0x28]
	ldr r1, [r1]
	add r1, #0xc0
	str r2, [r1]
	ldr r1, [sp, #0x28]
	ldr r1, [r1]
	add r1, #0xc4
	str r0, [r1]
	ldr r0, [sp, #0x28]
	add sp, #0x1fc
	ldr r0, [r0]
	mov r1, #1
	add r0, #0xaa
	strb r1, [r0]
	add sp, #0xf8
	pop {r4, r5, r6, r7, pc}
_0220140C:
	mov r1, #0xf9
	ldr r0, [sp, #8]
	lsl r1, r1, #2
	ldrb r1, [r0, r1]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	blo _02201444
	ldr r0, [sp, #0x28]
	mov r1, #1
	ldr r0, [r0]
	mov r3, #7
	add r0, #0x9d
	strb r1, [r0]
	ldr r0, [sp, #0x28]
	ldr r0, [r0]
	add r0, #0x9e
	strb r1, [r0]
	ldr r0, [sp, #0x28]
	ldr r2, [r0]
	ldr r0, [sp, #4]
	str r1, [sp]
	add r1, r2, #0
	add r1, #0xd0
	add r2, #0x8b
	ldrb r1, [r1]
	ldrb r2, [r2]
	bl ov96_021E8228
_02201444:
	add sp, #0x1fc
	add sp, #0xf8
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02200F84

	thumb_func_start ov96_0220144C
ov96_0220144C: ; 0x0220144C
	ldr r2, [r0]
	add r2, r2, r1
	mov r1, #1
	lsl r1, r1, #0xa
	str r2, [r0]
	cmp r2, r1
	blt _02201460
	sub r1, r2, r1
	str r1, [r0]
	bx lr
_02201460:
	cmp r2, #0
	bge _02201468
	add r1, r2, r1
	str r1, [r0]
_02201468:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220144C

	thumb_func_start ov96_0220146C
ov96_0220146C: ; 0x0220146C
	push {r4, lr}
	sub sp, #0x80
	mov r1, #0xa7
	lsl r1, r1, #2
	add r0, r0, r1
	mov r2, #0
	add r1, sp, #0
_0220147A:
	add r2, r2, #1
	stmia r1!, {r0}
	add r0, #0x14
	cmp r2, #0x10
	blt _0220147A
	add r0, sp, #0
	add r1, sp, #0x40
	bl ov96_022014A4
	add r4, r0, #0
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x16
	add r0, sp, #0x40
	ldr r0, [r0, r1]
	add sp, #0x80
	pop {r4, pc}
	thumb_func_end ov96_0220146C

	thumb_func_start ov96_022014A4
ov96_022014A4: ; 0x022014A4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xd0
	mov ip, r0
	add r0, sp, #0x10
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #0xc]
	ldr r0, [sp]
	add r7, r1, #0
_022014BA:
	add r2, r0, #1
	mov r1, #0xc
	mul r1, r2
	add r2, sp, #4
	lsl r4, r0, #2
	mov r3, ip
	ldr r3, [r3, r4]
	add r2, r2, r1
	str r3, [r2, #8]
	mov r3, #0
	str r3, [r2, #4]
	add r4, r3, #0
	add r3, sp, #4
	str r4, [r3, r1]
	add r1, r4, #0
	cmp r0, #0
	bls _02201506
	ldr r5, [r2, #8]
	mov r4, #0x10
	ldrsh r4, [r5, r4]
	mov r6, #0x10
_022014E4:
	ldr r3, [r3, #4]
	ldr r5, [r3, #8]
	ldrsh r5, [r5, r6]
	cmp r5, r4
	bge _022014FC
	ldr r4, [r3]
	str r2, [r4, #4]
	ldr r4, [r3]
	str r4, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _02201506
_022014FC:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r0
	blo _022014E4
_02201506:
	cmp r1, r0
	bne _0220150E
	str r2, [r3, #4]
	str r3, [r2]
_0220150E:
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0x10
	blo _022014BA
	ldr r0, [sp, #8]
	mov r3, #0
	ldr r1, [r0, #8]
	mov r0, #0x10
	ldrsh r2, [r1, r0]
	add r1, sp, #4
_02201524:
	ldr r1, [r1, #4]
	lsl r5, r3, #2
	ldr r4, [r1, #8]
	str r4, [r7, r5]
	ldr r4, [r7, r5]
	ldrsh r4, [r4, r0]
	cmp r2, r4
	bne _0220153E
	ldr r4, [sp]
	add r4, r4, #1
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	str r4, [sp]
_0220153E:
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	cmp r3, #0x10
	blo _02201524
	ldr r0, [sp]
	cmp r0, #0
	bne _02201552
	bl GF_AssertFail
_02201552:
	ldr r0, [sp]
	add sp, #0xd0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022014A4

	thumb_func_start ov96_02201558
ov96_02201558: ; 0x02201558
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	add r6, r0, #0
	bl ov96_021E5DC4
	add r7, r0, #0
	add r0, r6, #0
	bl ov96_021E5DD4
	cmp r0, #5
	bls _02201570
	b _02201AFE
_02201570:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220157C: ; jump table
	.short _02201588 - _0220157C - 2 ; case 0
	.short _0220166C - _0220157C - 2 ; case 1
	.short _022016A2 - _0220157C - 2 ; case 2
	.short _0220175C - _0220157C - 2 ; case 3
	.short _02201874 - _0220157C - 2 ; case 4
	.short _02201AE2 - _0220157C - 2 ; case 5
_02201588:
	mov r2, #1
	mov r0, #0x5c
	mov r1, #0x92
	lsl r2, r2, #0x12
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _022018CC ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _022018D0 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_02201C90
	ldr r1, _022018D4 ; =0x000005F4
	add r0, r6, #0
	bl ov96_021E5D94
	ldr r2, _022018D4 ; =0x000005F4
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x92
	mov r1, #0x28
	bl AllocFromHeap
	ldr r1, _022018D8 ; =0x00000598
	mov r2, #0x28
	str r0, [r4, r1]
	ldr r0, [r4, r1]
	mov r1, #0
	bl MIi_CpuFill8
	mov r0, #0x92
	bl sub_0201AC88
	str r0, [r4]
	add r0, r6, #0
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0x73
	str r0, [sp, #0x98]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0x9c]
	lsr r0, r0, #4
	str r0, [sp, #0xa0]
	add r0, r6, #0
	bl ov96_021E5DCC
	str r0, [sp, #0xa4]
	ldr r3, _022018DC ; =0x00300010
	add r0, sp, #0x98
	mov r1, #0x16
	mov r2, #0x92
	str r3, [sp]
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x92
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x92
	str r1, [r4, #0x44]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r4]
	bl ov96_02201CB0
	add r0, r4, #0
	bl ov96_02203310
	add r0, r4, #0
	add r1, r6, #0
	bl ov96_0220382C
	ldr r0, _022018E0 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r6, #0
	bl ov96_021E5DEC
	b _02201AFE
_0220166C:
	ldr r0, [r7, #0x44]
	ldr r1, [r7]
	add r2, r6, #0
	bl ov96_02203A00
	mov r1, #0x5e
	lsl r1, r1, #4
	str r0, [r7, r1]
	add r0, r6, #0
	bl ov96_021E5D34
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5EE8
	add r2, r0, #0
	mov r1, #4
	ldr r0, [r7, #0x44]
	sub r1, r1, r4
	bl ov96_02204364
	ldr r1, _022018E4 ; =0x000005DC
	str r0, [r7, r1]
	add r0, r6, #0
	bl ov96_021E5DEC
	b _02201AFE
_022016A2:
	ldr r4, _022018E8 ; =0x0221C7B8
	add r3, sp, #0x8c
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r7, #0x44]
	bl ov96_021EB180
	mov r1, #0
	str r0, [r7, #0x48]
	mov r0, #0x12
	lsl r0, r0, #0x10
	str r0, [sp]
	ldr r0, [r7, #0x48]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [r7, #0x48]
	mov r1, #0
	mov r2, #0x6a
	bl ov96_021EB29C
	ldr r0, [r7, #0x48]
	mov r1, #1
	mov r2, #0x65
	bl ov96_021EB29C
	ldr r0, [r7, #0x48]
	mov r1, #2
	mov r2, #0x69
	bl ov96_021EB29C
	ldr r0, [r7, #0x48]
	bl ov96_02201E70
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r7, r0]
	ldr r1, [r7, #0x48]
	bl ov96_02203B44
	ldr r0, [r7, #0x48]
	bl ov96_021EB3A4
	ldr r0, [r7, #0x44]
	ldr r1, _022018EC ; =0x000004E7
	mov r2, #1
	bl ov96_021E9A78
	ldr r1, _022018F0 ; =0x000005D4
	str r0, [r7, r1]
	ldr r0, [r7, #0x48]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r3, _022018F0 ; =0x000005D4
	ldr r0, [r7, #0x44]
	ldr r3, [r7, r3]
	mov r1, #9
	mov r2, #0x20
	bl ov96_021EA854
	ldr r2, _022018F4 ; =0x000005D8
	mov r1, #0
	str r0, [r7, r2]
	sub r2, r2, #4
	ldr r2, [r7, r2]
	ldr r3, [r7, #0x48]
	add r0, r6, #0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	add r0, r6, #0
	bl ov96_021E5F24
	add r2, r0, #0
	lsl r2, r2, #0x18
	ldr r1, [r7, #0x48]
	add r0, r7, #0
	lsr r2, r2, #0x18
	bl ov96_02201EF0
	add r0, r6, #0
	bl ov96_021E5DEC
	b _02201AFE
_0220175C:
	add r0, r6, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x1c]
	mov r0, #0
	str r0, [sp, #0x54]
	ldr r0, [sp, #0x1c]
	add r1, r0, #1
	lsl r0, r1, #1
	add r0, r1, r0
	mov r1, #0xc
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x24]
	add r5, sp, #0x13c
	add r4, sp, #0xf8
_02201784:
	ldr r0, [sp, #0x24]
	mov r1, #0xc
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x20]
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x14]
	ldr r0, [sp, #0x20]
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x58]
	ldr r1, [sp, #0x58]
	ldr r2, [sp, #0x14]
	add r0, r6, #0
	add r3, r5, #0
	bl ov96_021E6168
	ldr r1, [sp, #0x58]
	ldr r2, [sp, #0x14]
	add r0, r6, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r4, #0x14]
	ldr r0, [sp, #0x24]
	add r5, #0x10
	add r0, r0, #1
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x54]
	add r4, r4, #4
	add r0, r0, #1
	str r0, [sp, #0x54]
	cmp r0, #0xc
	blt _02201784
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r7, r0]
	ldr r1, [r7, #0x48]
	add r2, sp, #0x1cc
	bl ov96_02203B8C
	mov r0, #0
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x1c]
	mov r5, #0x10
	lsl r1, r0, #1
	add r0, r0, r1
	lsl r0, r0, #5
	add r4, r7, r0
_022017F2:
	mov r1, #0
	add r0, sp, #0x80
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [sp, #0x18]
	add r1, sp, #0x13c
	add r0, #9
	lsl r0, r0, #4
	add r3, r1, r0
	ldr r1, [r3, #0xc]
	mov r2, #0
	str r1, [sp]
	add r1, sp, #0x13c
	ldrh r0, [r1, r0]
	ldrb r1, [r3, #7]
	ldrh r3, [r3, #2]
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	bl sub_020708D8
	lsl r1, r5, #0xc
	str r1, [sp, #0x80]
	mov r1, #0x5e
	lsl r1, r1, #2
	add r0, r0, r1
	lsl r1, r0, #0xc
	mov r0, #1
	lsl r0, r0, #0x10
	str r1, [sp, #0x84]
	sub r0, r1, r0
	str r0, [sp, #0x84]
	ldr r0, _022018F8 ; =0x00000418
	add r1, sp, #0x80
	ldr r0, [r4, r0]
	bl ov96_021EB588
	ldr r0, [sp, #0x18]
	add r5, #0x32
	add r0, r0, #1
	add r4, #0x20
	str r0, [sp, #0x18]
	cmp r0, #3
	blt _022017F2
	mov r0, #3
	mov r1, #0
	str r0, [sp, #0xfc]
	mov r0, #1
	str r1, [sp, #0xf8]
	str r1, [sp, #0x100]
	str r0, [sp, #0x104]
	str r0, [sp, #0x108]
	str r1, [sp]
	str r1, [sp, #4]
	ldr r0, _022018F4 ; =0x000005D8
	mov r1, #9
	ldr r0, [r7, r0]
	add r2, sp, #0x13c
	add r3, sp, #0xf8
	bl ov96_021EA8A8
	add r0, r6, #0
	bl ov96_021E5DEC
	b _02201AFE
_02201874:
	ldr r0, _022018F4 ; =0x000005D8
	ldr r0, [r7, r0]
	bl ov96_021EAA00
	cmp r0, #0
	bne _02201882
	b _02201AFE
_02201882:
	ldr r3, _022018FC ; =0x0221C7D0
	add r2, sp, #0x74
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [r7]
	bl ov96_021E6030
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, r6, #0
	bl ov96_021E5F24
	mov r1, #0
	str r1, [sp, #0x50]
	add r1, r0, #1
	lsl r0, r1, #1
	add r0, r1, r0
	mov r1, #0xc
	add r5, r7, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x34]
	ldr r0, _02201900 ; =0x0221C8C8
	str r0, [sp, #0x30]
	ldr r0, _02201904 ; =0x0221C8EC
	str r0, [sp, #0x2c]
	ldr r0, _02201908 ; =0x0221CA1C
	str r0, [sp, #0x28]
_022018C6:
	ldr r0, _022018F4 ; =0x000005D8
	b _0220190C
	nop
_022018CC: .word 0xFFFFE0FF
_022018D0: .word 0x04001000
_022018D4: .word 0x000005F4
_022018D8: .word 0x00000598
_022018DC: .word 0x00300010
_022018E0: .word gMain + 0x60
_022018E4: .word 0x000005DC
_022018E8: .word 0x0221C7B8
_022018EC: .word 0x000004E7
_022018F0: .word 0x000005D4
_022018F4: .word 0x000005D8
_022018F8: .word 0x00000418
_022018FC: .word 0x0221C7D0
_02201900: .word 0x0221C8C8
_02201904: .word 0x0221C8EC
_02201908: .word 0x0221CA1C
_0220190C:
	ldr r1, [sp, #0x50]
	ldr r0, [r7, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r1, r5, #0
	add r1, #0x94
	str r0, [r1]
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #1
	str r0, [sp, #0x4c]
	bl ov96_021EAB38
	ldr r0, [sp, #0x34]
	mov r1, #0xc
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x30]
	mov r1, #3
	ldr r0, [r0]
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x2c]
	ldr r4, [r0]
	ldr r0, [sp, #0x50]
	bl _s32_div_f
	add r1, r0, #0
	lsl r2, r1, #2
	add r1, sp, #0x74
	ldr r0, [sp, #0x4c]
	ldr r1, [r1, r2]
	bl ov96_021EAC0C
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x44]
	add r2, r4, #0
	bl ov96_021EAF94
	mov r1, #0
	add r0, sp, #0x68
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [sp, #0x4c]
	bl ov96_021EAA20
	bl ov96_021E8BB0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _0220198C
	ldr r0, [sp, #0x44]
	sub r4, #0x28
	lsl r0, r0, #0xc
	str r0, [sp, #0x68]
	lsl r0, r4, #0xc
	str r0, [sp, #0x6c]
	b _02201998
_0220198C:
	ldr r0, [sp, #0x44]
	sub r4, #0x19
	lsl r0, r0, #0xc
	str r0, [sp, #0x68]
	lsl r0, r4, #0xc
	str r0, [sp, #0x6c]
_02201998:
	ldr r0, [sp, #0x48]
	lsl r0, r0, #5
	add r1, r7, r0
	ldr r0, _02201B04 ; =0x00000418
	ldr r0, [r1, r0]
	add r1, sp, #0x68
	bl ov96_021EB588
	ldr r0, [r5, #0x70]
	add r1, sp, #0x68
	bl ov96_021EB588
	ldr r1, [sp, #0x28]
	ldr r0, [sp, #0x4c]
	ldrb r1, [r1]
	add r1, #0x20
	bl ov96_021EABA8
	ldr r0, [sp, #0x34]
	add r5, r5, #4
	add r0, r0, #1
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x30]
	add r0, r0, #4
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x2c]
	add r0, r0, #4
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x28]
	add r0, r0, #1
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x50]
	add r0, r0, #1
	str r0, [sp, #0x50]
	cmp r0, #9
	bge _022019E2
	b _022018C6
_022019E2:
	add r0, sp, #0xa8
	mov r1, #0xaa
	mov r2, #3
	bl ReadWholeNarcMemberByIdPair
	ldr r1, _02201B08 ; =0x00000708
	ldr r0, _02201B0C ; =0x000005E8
	strh r1, [r7, r0]
	mov r0, #0
	str r0, [sp, #0x40]
	str r0, [sp, #0x38]
	add r0, r7, #0
	str r0, [sp, #0x64]
	add r0, #0xb8
	str r0, [sp, #0x64]
	ldr r0, _02201B04 ; =0x00000418
	add r0, r7, r0
	str r0, [sp, #0x5c]
_02201A06:
	ldr r0, [sp, #0x40]
	mov r1, #0xc
	add r2, r7, r0
	ldr r0, _02201B10 ; =0x000005CC
	mov r4, #0
	strb r1, [r2, r0]
	ldr r0, [sp, #0x40]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x60]
_02201A1A:
	ldr r0, [sp, #0x38]
	lsl r3, r4, #0x18
	add r5, r4, r0
	ldr r0, [sp, #0x5c]
	lsl r1, r5, #5
	add r0, r0, r1
	ldr r2, [sp, #0x60]
	str r0, [sp, #0x3c]
	str r0, [sp]
	add r0, r6, #0
	add r1, sp, #0xa8
	lsr r3, r3, #0x18
	bl ov96_0220329C
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02201A56
	ldr r0, _02201B14 ; =0x000005DC
	mov r3, #0x48
	lsl r1, r5, #0x18
	mul r3, r5
	ldr r5, [sp, #0x64]
	ldr r0, [r7, r0]
	ldr r2, [sp, #0x3c]
	lsr r1, r1, #0x18
	add r3, r5, r3
	bl ov96_022043AC
_02201A56:
	add r4, r4, #1
	cmp r4, #3
	blt _02201A1A
	ldr r0, [sp, #0x38]
	add r0, r0, #3
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x40]
	add r0, r0, #1
	str r0, [sp, #0x40]
	cmp r0, #4
	blt _02201A06
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02201A8A
	add r0, r6, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r7, #0
	bl ov96_02202738
_02201A8A:
	mov r2, #0x5e
	lsl r2, r2, #4
	ldr r0, [r7, r2]
	sub r2, #0xc
	ldr r1, [r7, #0x48]
	ldr r2, [r7, r2]
	bl ov96_02203D74
	add r0, r6, #0
	bl ov96_021E5F24
	add r1, r0, #0
	lsl r1, r1, #0x18
	add r0, r7, #0
	lsr r1, r1, #0x18
	bl ov96_02201E10
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	mov r0, #1
	bl sub_0203A994
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r7, #0x44]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #2
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	add r0, r6, #0
	bl ov96_021E5DEC
	b _02201AFE
_02201AE2:
	bl sub_0200FB5C
	cmp r0, #0
	beq _02201AFE
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _02201AF8
	bl GF_AssertFail
_02201AF8:
	add sp, #0x1fc
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_02201AFE:
	mov r0, #0
	add sp, #0x1fc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02201B04: .word 0x00000418
_02201B08: .word 0x00000708
_02201B0C: .word 0x000005E8
_02201B10: .word 0x000005CC
_02201B14: .word 0x000005DC
	thumb_func_end ov96_02201558

	thumb_func_start ov96_02201B18
ov96_02201B18: ; 0x02201B18
	push {r4, lr}
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02203CE4
	ldr r0, [r4, #0x48]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r4, pc}
	thumb_func_end ov96_02201B18

	thumb_func_start ov96_02201B34
ov96_02201B34: ; 0x02201B34
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_02201B48:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _02201B94 ; =0x0000012B
	add r1, r6, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _02201B48
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #8
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #8
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_02201B94: .word 0x0000012B
	thumb_func_end ov96_02201B34

	thumb_func_start ov96_02201B98
ov96_02201B98: ; 0x02201B98
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	add r0, r7, #0
	bl ov96_021E5F8C
	ldr r0, [r4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #6
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #7
	bl sub_0201BB4C
	add r0, r4, #4
	bl RemoveWindow
	add r5, r4, #0
	mov r6, #0
	add r5, #0x14
_02201BF0:
	add r0, r5, #0
	bl RemoveWindow
	add r6, r6, #1
	add r5, #0x10
	cmp r6, #3
	blt _02201BF0
	ldr r0, [r4]
	bl FreeToHeap
	ldr r0, [r4, #0x48]
	bl ov96_021EB21C
	ldr r0, _02201C78 ; =0x000005D8
	ldr r0, [r4, r0]
	bl ov96_021EA894
	ldr r0, _02201C7C ; =0x000005D4
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	ldr r0, _02201C80 ; =0x000005DC
	ldr r0, [r4, r0]
	bl ov96_022043B8
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02203A30
	mov r0, #4
	bl sub_02002DB4
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	ldr r0, _02201C84 ; =0x00000598
	ldr r0, [r4, r0]
	bl FreeToHeap
	add r0, r7, #0
	bl ov96_021E5DAC
	ldr r0, _02201C88 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _02201C8C ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x92
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02201C78: .word 0x000005D8
_02201C7C: .word 0x000005D4
_02201C80: .word 0x000005DC
_02201C84: .word 0x00000598
_02201C88: .word gMain + 0x60
_02201C8C: .word 0x04000050
	thumb_func_end ov96_02201B98

	thumb_func_start ov96_02201C90
ov96_02201C90: ; 0x02201C90
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _02201CAC ; =0x0221C934
	add r3, sp, #0
	mov r2, #5
_02201C9A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02201C9A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_02201CAC: .word 0x0221C934
	thumb_func_end ov96_02201C90

	thumb_func_start ov96_02201CB0
ov96_02201CB0: ; 0x02201CB0
	push {r4, r5, lr}
	sub sp, #0xd4
	ldr r5, _02201DF0 ; =0x0221C7DC
	add r3, sp, #0xc4
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _02201DF4 ; =0x0221C83C
	add r3, sp, #0xa8
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _02201DF8 ; =0x0221C858
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _02201DFC ; =0x0221C890
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _02201E00 ; =0x0221C8AC
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _02201E04 ; =0x0221C804
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _02201E08 ; =0x0221C820
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	ldr r5, _02201E0C ; =0x0221C874
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #7
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #7
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xd4
	pop {r4, r5, pc}
	nop
_02201DF0: .word 0x0221C7DC
_02201DF4: .word 0x0221C83C
_02201DF8: .word 0x0221C858
_02201DFC: .word 0x0221C890
_02201E00: .word 0x0221C8AC
_02201E04: .word 0x0221C804
_02201E08: .word 0x0221C820
_02201E0C: .word 0x0221C874
	thumb_func_end ov96_02201CB0

	thumb_func_start ov96_02201E10
ov96_02201E10: ; 0x02201E10
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r4, r1, #0
	mov r1, #0
	mov r0, #1
	str r1, [sp]
	lsl r0, r0, #0xe
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r5, #0x44]
	mov r1, #1
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xdb
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5, #0x44]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r5]
	mov r0, #0xdb
	mov r3, #1
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r5, #0x44]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xdb
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	add r1, r4, #0
	bl ov96_02203A64
	add sp, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02201E10

	thumb_func_start ov96_02201E70
ov96_02201E70: ; 0x02201E70
	push {r4, lr}
	sub sp, #8
	mov r1, #3
	str r1, [sp]
	mov r1, #0xdb
	mov r2, #0x15
	mov r3, #0x6a
	add r4, r0, #0
	bl ov96_021EB2BC
	mov r0, #3
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0x12
	mov r3, #0x6a
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0x14
	mov r3, #0x6a
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0x13
	mov r3, #0x6a
	bl ov96_021EB36C
	mov r0, #1
	str r0, [sp]
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0x11
	mov r3, #0x69
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xe
	mov r3, #0x69
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0x10
	mov r3, #0x69
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xf
	mov r3, #0x69
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	thumb_func_end ov96_02201E70

	thumb_func_start ov96_02201EF0
ov96_02201EF0: ; 0x02201EF0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x5c
	add r6, r0, #0
	mov r0, #0
	add r4, r1, #0
	str r2, [sp, #4]
	str r0, [sp, #0x10]
	add r5, r6, #0
	add r7, r0, #0
_02201F02:
	add r0, r4, #0
	bl ov96_021EB5E8
	add r1, r0, #0
	ldr r0, _02202148 ; =0x000005D4
	ldr r3, [r6, #0x44]
	ldr r0, [r6, r0]
	mov r2, #3
	bl ov96_021EA374
	mov r1, #1
	str r0, [r5, #0x50]
	bl sub_02024830
	mov r0, #6
	lsl r1, r7, #0xc
	lsl r0, r0, #0xe
	add r0, r1, r0
	str r0, [sp, #0x50]
	mov r0, #2
	lsl r0, r0, #0xe
	str r0, [sp, #0x54]
	mov r0, #0
	str r0, [sp, #0x58]
	ldr r0, [r5, #0x50]
	add r1, sp, #0x50
	bl sub_020247D4
	ldr r0, [r5, #0x50]
	mov r1, #2
	bl sub_02024ADC
	ldr r0, [sp, #0x10]
	add r5, r5, #4
	add r0, r0, #1
	add r7, #0x10
	str r0, [sp, #0x10]
	cmp r0, #2
	blt _02201F02
	add r0, r6, #0
	mov r1, #0x3c
	bl ov96_022038A0
	mov r7, #0
	add r5, r6, #0
_02201F5C:
	add r0, r5, #0
	add r0, #0xf9
	strb r7, [r0]
	mov r0, #3
	mov r1, #3
	str r0, [sp]
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #0x6a
	bl ov96_021EB3E4
	add r1, r5, #0
	add r1, #0xb8
	str r0, [r1]
	mov r0, #4
	mov r1, #3
	str r0, [sp]
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #0x6a
	bl ov96_021EB3E4
	add r1, r5, #0
	add r1, #0xbc
	str r0, [r1]
	mov r0, #6
	mov r1, #3
	str r0, [sp]
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #0x6a
	bl ov96_021EB3E4
	add r1, r5, #0
	add r1, #0xc0
	str r0, [r1]
	add r0, r5, #0
	add r0, #0xbc
	ldr r0, [r0]
	mov r1, #1
	bl ov96_021EB564
	add r0, r5, #0
	add r0, #0xb8
	ldr r0, [r0]
	mov r1, #0x14
	bl ov96_021EB630
	add r0, r5, #0
	add r0, #0xbc
	mov r1, #0xfa
	ldr r0, [r0]
	lsl r1, r1, #2
	bl ov96_021EB630
	add r0, r5, #0
	add r0, #0xc0
	ldr r0, [r0]
	mov r1, #5
	bl ov96_021EB630
	add r7, r7, #1
	add r5, #0x48
	cmp r7, #0xc
	blt _02201F5C
	mov r7, #0
	add r5, r6, #0
_02201FE2:
	mov r0, #9
	mov r1, #3
	str r0, [sp]
	add r0, r4, #0
	add r2, r1, #0
	mov r3, #0x6a
	bl ov96_021EB3E4
	ldr r1, _0220214C ; =0x00000418
	str r0, [r5, r1]
	add r0, r1, #0
	ldr r0, [r5, r0]
	mov r1, #2
	bl ov96_021EB564
	mov r0, #1
	lsl r0, r0, #0xc
	str r0, [sp, #0x44]
	str r0, [sp, #0x48]
	mov r0, #0
	str r0, [sp, #0x4c]
	ldr r0, _0220214C ; =0x00000418
	add r1, sp, #0x44
	ldr r0, [r5, r0]
	bl ov96_021EB588
	ldr r0, _0220214C ; =0x00000418
	mov r1, #4
	ldr r0, [r5, r0]
	bl ov96_021EB630
	add r7, r7, #1
	add r5, #0x20
	cmp r7, #0xc
	blt _02201FE2
	mov r7, #0
	add r5, r6, #0
_0220202C:
	mov r0, #0xb
	str r0, [sp]
	add r0, r4, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x69
	bl ov96_021EB3E4
	str r0, [r5, #0x64]
	mov r1, #6
	bl ov96_021EB564
	ldr r0, [r5, #0x64]
	mov r1, #2
	bl ov96_021EB630
	add r7, r7, #1
	add r5, r5, #4
	cmp r7, #3
	blt _0220202C
	mov r0, #7
	str r0, [sp]
	add r0, r4, #0
	mov r1, #3
	mov r2, #1
	mov r3, #0x69
	bl ov96_021EB3E4
	str r0, [r6, #0x4c]
	mov r0, #2
	lsl r0, r0, #0xe
	str r0, [sp, #0x38]
	str r0, [sp, #0x3c]
	mov r0, #0
	str r0, [sp, #0x40]
	ldr r0, [r6, #0x4c]
	add r1, sp, #0x38
	bl ov96_021EB588
	ldr r0, [r6, #0x4c]
	mov r1, #5
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r6, #0x4c]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r6, #0x4c]
	mov r1, #2
	bl ov96_021EB630
	ldr r5, _02202150 ; =0x0221C910
	add r3, sp, #0x14
	mov r2, #4
_0220209A:
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220209A
	ldr r0, [r5]
	add r5, r6, #0
	str r0, [r3]
	ldr r0, [sp, #4]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r2, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	mov r0, #0
	str r0, [sp, #8]
	add r0, sp, #0x14
	str r0, [sp, #0xc]
_022020C4:
	mov r0, #8
	str r0, [sp]
	add r0, r4, #0
	mov r1, #3
	mov r2, #1
	mov r3, #0x69
	bl ov96_021EB3E4
	ldr r1, [sp, #0xc]
	str r0, [r5, #0x58]
	bl ov96_021EB588
	ldr r0, [r5, #0x58]
	add r1, r7, #1
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r5, #0x58]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r7, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r0, r2, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [r5, #0x58]
	mov r1, #3
	bl ov96_021EB630
	ldr r0, [sp, #0xc]
	add r5, r5, #4
	add r0, #0xc
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #3
	blt _022020C4
	mov r5, #0
	mov r7, #0xa
_0220211E:
	str r7, [sp]
	add r0, r4, #0
	mov r1, #3
	mov r2, #1
	mov r3, #0x69
	bl ov96_021EB3E4
	str r0, [r6, #0x70]
	mov r1, #0
	bl ov96_021EB564
	ldr r0, [r6, #0x70]
	mov r1, #4
	bl ov96_021EB630
	add r5, r5, #1
	add r6, r6, #4
	cmp r5, #9
	blt _0220211E
	add sp, #0x5c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02202148: .word 0x000005D4
_0220214C: .word 0x00000418
_02202150: .word 0x0221C910
	thumb_func_end ov96_02201EF0

	thumb_func_start ov96_02202154
ov96_02202154: ; 0x02202154
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _02202172
	cmp r0, #1
	beq _02202184
	cmp r0, #2
	beq _0220219C
	b _022021CC
_02202172:
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _022021CC
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _022021CC
_02202184:
	add r0, r5, #0
	bl ov96_0220223C
	add r0, r5, #0
	bl ov96_022028BC
	cmp r0, #0
	beq _022021CC
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _022021CC
_0220219C:
	add r0, r5, #0
	bl ov96_0220223C
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _022021CC
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x44]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
_022021CC:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02202154

	thumb_func_start ov96_022021D4
ov96_022021D4: ; 0x022021D4
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	add r4, r1, #0
	bl ov96_021E5F54
	add r5, r0, #0
	add r0, r6, #0
	bl ov96_021E5DC4
	ldrb r0, [r4]
	cmp r0, #0
	bne _022021FC
	bl sub_0200FB5C
	cmp r0, #0
	beq _022021F8
	mov r0, #1
	strb r0, [r4]
_022021F8:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_022021FC:
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _0220220A
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_0220220A:
	add r5, #0x28
	add r0, r5, #0
	bl ov96_021E8A20
	ldr r7, _02202238 ; =0x000003FF
	add r5, r0, #0
	mov r4, #0
_02202218:
	ldrh r2, [r5]
	lsl r1, r4, #0x18
	add r0, r6, #0
	and r2, r7
	lsl r2, r2, #0x10
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, r5, #2
	cmp r4, #4
	blt _02202218
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02202238: .word 0x000003FF
	thumb_func_end ov96_022021D4

	thumb_func_start ov96_0220223C
ov96_0220223C: ; 0x0220223C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xa0
	str r0, [sp, #4]
	bl ov96_021E5F54
	str r0, [sp, #0x24]
	ldr r0, [sp, #4]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #4]
	bl ov96_021E5F24
	cmp r0, #0
	beq _0220225C
	b _02202706
_0220225C:
	mov r0, #0x5d
	lsl r0, r0, #4
	ldrb r0, [r4, r0]
	cmp r0, #0
	beq _0220227C
	ldr r0, [sp, #0x24]
	add r0, #0x28
	str r0, [sp, #0x24]
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_02202738
	add sp, #0xa0
	pop {r3, r4, r5, r6, r7, pc}
_0220227C:
	ldr r0, [sp, #0x24]
	add r0, #0x50
	bl ov96_021E8A20
	add r5, r0, #0
	ldr r0, [sp, #0x24]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_02202290:
	ldmia r3!, {r0, r1}
	stmia r5!, {r0, r1}
	sub r2, r2, #1
	bne _02202290
	ldr r0, [r3]
	str r0, [r5]
	ldr r0, _02202598 ; =0x000005E8
	ldrh r1, [r4, r0]
	cmp r1, #0
	beq _022022A8
	sub r1, r1, #1
	strh r1, [r4, r0]
_022022A8:
	ldr r0, [sp, #0x24]
	add r0, #0x28
	bl ov96_021E8A20
	mov r0, #0
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x24]
	add r5, r4, #0
	str r0, [sp, #0x1c]
	add r0, #0x50
	str r0, [sp, #0x1c]
	add r0, r4, #0
	str r0, [sp, #0x34]
	add r0, #0xd4
	str r0, [sp, #0x34]
	add r0, r4, #0
	str r0, [sp, #0x2c]
	add r0, #0xe0
	str r0, [sp, #0x2c]
	add r0, r4, #0
	str r0, [sp, #0x30]
	add r0, #0xec
	str r0, [sp, #0x30]
_022022D6:
	ldr r0, [sp, #0x1c]
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r0, [r7]
	cmp r0, #0
	ldr r0, _0220259C ; =0x0000059C
	beq _02202316
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _022022FC
	add r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _022022FC
	ldr r0, _0220259C ; =0x0000059C
	mov r1, #0
	str r1, [r5, r0]
	b _0220231E
_022022FC:
	cmp r1, #0
	bne _0220231E
	mov r0, #0x5a
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _0220231E
	ldr r0, _0220259C ; =0x0000059C
	mov r1, #1
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
	b _0220231E
_02202316:
	mov r1, #0
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
_0220231E:
	ldr r0, _0220259C ; =0x0000059C
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _022023EA
	add r0, sp, #0x94
	str r0, [sp]
	ldr r1, [sp, #0x28]
	ldrb r2, [r7, #4]
	lsl r1, r1, #0x18
	ldrb r3, [r7, #5]
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_022031A8
	add r6, r0, #0
	cmp r6, #0xc
	beq _022023E2
	lsl r0, r6, #5
	add r1, r4, r0
	mov r0, #0x43
	lsl r0, r0, #4
	ldrb r0, [r1, r0]
	cmp r0, #0
	bne _02202412
	mov r0, #0x48
	mul r0, r6
	add r0, r4, r0
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #0
	beq _02202360
	cmp r0, #2
	bne _022023E2
_02202360:
	ldr r0, [sp, #0x28]
	add r3, r6, #0
	add r1, r4, r0
	ldr r0, _022025A0 ; =0x000005CC
	strb r6, [r1, r0]
	mov r0, #0x48
	mul r3, r0
	add r0, sp, #0x94
	mov ip, r0
	add r0, r4, r3
	str r0, [sp, #0x48]
	add r0, #0xe0
	mov r2, ip
	str r0, [sp, #0x48]
	ldmia r2!, {r0, r1}
	mov ip, r2
	ldr r2, [sp, #0x48]
	stmia r2!, {r0, r1}
	mov r0, ip
	ldr r1, [r0]
	add r0, r2, #0
	str r1, [r0]
	ldrb r0, [r7, #4]
	str r2, [sp, #0x48]
	add r2, r4, r3
	lsl r0, r0, #0xc
	str r0, [sp, #0x88]
	ldrb r0, [r7, #5]
	add r7, sp, #0x88
	add r2, #0xec
	lsl r0, r0, #0xc
	str r0, [sp, #0x90]
	mov r0, #0
	str r0, [sp, #0x8c]
	ldmia r7!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r7]
	str r0, [r2]
	add r0, r4, r3
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #0
	bne _022023E2
	mov r0, #0xc
	add r1, r6, #0
	mul r1, r0
	ldr r0, _022025A4 ; =0x0221C98C
	add r2, r4, r3
	add r6, r0, r1
	ldmia r6!, {r0, r1}
	add r2, #0xc8
	stmia r2!, {r0, r1}
	ldr r0, [r6]
	add r1, r4, r3
	str r0, [r2]
	add r1, #0xc4
	mov r0, #2
	str r0, [r1]
	add r1, r4, r3
	add r1, #0xfc
	mov r0, #0
	strh r0, [r1]
	add r1, r4, r3
	add r1, #0xfe
	strh r0, [r1]
_022023E2:
	ldr r0, _022025A8 ; =0x000005EA
	mov r1, #0
	strb r1, [r4, r0]
	b _022026A4
_022023EA:
	mov r0, #0x5a
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02202420
	ldr r0, [sp, #0x28]
	add r1, r4, r0
	ldr r0, _022025A0 ; =0x000005CC
	ldrb r0, [r1, r0]
	cmp r0, #0xc
	beq _02202412
	ldr r0, _022025A8 ; =0x000005EA
	ldrb r0, [r4, r0]
	bl _dfltu
	ldr r3, _022025AC ; =0x403E0000
	mov r2, #0
	bl _dls
	blo _02202414
_02202412:
	b _022026A4
_02202414:
	ldr r0, _022025A8 ; =0x000005EA
	ldrb r0, [r4, r0]
	add r1, r0, #1
	ldr r0, _022025A8 ; =0x000005EA
	strb r1, [r4, r0]
	b _022026A4
_02202420:
	ldr r0, [sp, #0x28]
	add r1, r4, r0
	ldr r0, _022025A0 ; =0x000005CC
	str r1, [sp, #0x18]
	ldrb r0, [r1, r0]
	cmp r0, #0xc
	bne _02202430
	b _0220269E
_02202430:
	add r0, sp, #0x7c
	str r0, [sp]
	ldr r1, [sp, #0x28]
	ldrb r2, [r7, #4]
	lsl r1, r1, #0x18
	ldrb r3, [r7, #5]
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_022031A8
	cmp r0, #0xc
	beq _022024A8
	ldr r2, [sp, #0x18]
	ldr r1, _022025A0 ; =0x000005CC
	ldrb r1, [r2, r1]
	cmp r0, r1
	bne _022024A8
	mov r1, #0x48
	mul r1, r0
	add r0, r4, r1
	add r0, #0xfc
	ldrh r0, [r0]
	cmp r0, #4
	bhs _022024EE
	add r0, r4, r1
	add r0, #0xfc
	ldrh r0, [r0]
	add r2, r0, #1
	add r0, r4, r1
	add r0, #0xfc
	strh r2, [r0]
	add r0, r4, r1
	add r0, #0xfc
	ldrh r0, [r0]
	cmp r0, #1
	bhi _02202482
	add r1, r4, r1
	add r1, #0xfe
	mov r0, #0
	strh r0, [r1]
	b _02202696
_02202482:
	cmp r0, #2
	bhi _02202490
	add r1, r4, r1
	add r1, #0xfe
	mov r0, #1
	strh r0, [r1]
	b _02202696
_02202490:
	cmp r0, #3
	bhi _0220249E
	add r1, r4, r1
	add r1, #0xfe
	mov r0, #2
	strh r0, [r1]
	b _02202696
_0220249E:
	add r1, r4, r1
	add r1, #0xfe
	mov r0, #3
	strh r0, [r1]
	b _02202696
_022024A8:
	mov r1, #0
	add r0, sp, #0x70
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r1, [sp, #0x18]
	ldr r0, _022025A0 ; =0x000005CC
	add r2, sp, #0x64
	ldrb r1, [r1, r0]
	mov r0, #0x48
	add r6, r1, #0
	str r1, [sp, #0x10]
	mul r6, r0
	ldr r1, [sp, #0x2c]
	add r0, sp, #0x7c
	add r1, r1, r6
	bl VEC_Subtract
	ldrb r0, [r7, #4]
	ldr r1, [sp, #0x30]
	add r2, sp, #0x58
	lsl r0, r0, #0xc
	str r0, [sp, #0x4c]
	ldrb r0, [r7, #5]
	add r1, r1, r6
	lsl r0, r0, #0xc
	str r0, [sp, #0x54]
	mov r0, #0
	str r0, [sp, #0x50]
	add r0, sp, #0x4c
	bl VEC_Subtract
	ldr r0, [sp, #0x60]
	cmp r0, #0
	ble _022024F0
_022024EE:
	b _02202696
_022024F0:
	add r3, sp, #0x64
	add r2, r4, r6
	ldmia r3!, {r0, r1}
	add r2, #0xd4
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [sp, #0x10]
	lsl r0, r0, #5
	add r1, r4, r0
	ldr r0, _022025B0 ; =0x0000042E
	str r1, [sp, #0x14]
	ldrsh r0, [r1, r0]
	cmp r0, #0x3c
	bgt _02202516
	mov r0, #0x3f
	lsl r0, r0, #0x18
	str r0, [sp, #0x20]
	b _0220253A
_02202516:
	cmp r0, #0x46
	bgt _02202520
	ldr r0, _022025B4 ; =0x3F19999A
	str r0, [sp, #0x20]
	b _0220253A
_02202520:
	cmp r0, #0x50
	bgt _0220252A
	ldr r0, _022025B8 ; =0x3F333333
	str r0, [sp, #0x20]
	b _0220253A
_0220252A:
	cmp r0, #0x5a
	bgt _02202534
	ldr r0, _022025BC ; =0x3F4CCCCD
	str r0, [sp, #0x20]
	b _0220253A
_02202534:
	mov r0, #0xfe
	lsl r0, r0, #0x16
	str r0, [sp, #0x20]
_0220253A:
	ldr r0, [sp, #0x34]
	add r0, r0, r6
	bl VEC_Mag
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	bl _itof
	add r7, r0, #0
	bl _f2d
	mov r3, #1
	mov r2, #0
	lsl r3, r3, #0x1e
	bl _dgr
	bls _02202566
	mov r7, #1
	lsl r7, r7, #0x1e
	b _0220257A
_02202566:
	add r0, r7, #0
	bl _f2d
	ldr r3, _022025C0 ; =0x3FF00000
	mov r2, #0
	bl _dls
	bhs _0220257A
	mov r7, #0xfe
	lsl r7, r7, #0x16
_0220257A:
	ldr r0, _022025A8 ; =0x000005EA
	ldrb r0, [r4, r0]
	bl _utof
	bl _f2d
	ldr r3, _022025AC ; =0x403E0000
	mov r2, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022025C0 ; =0x3FF00000
	b _022025C4
	nop
_02202598: .word 0x000005E8
_0220259C: .word 0x0000059C
_022025A0: .word 0x000005CC
_022025A4: .word 0x0221C98C
_022025A8: .word 0x000005EA
_022025AC: .word 0x403E0000
_022025B0: .word 0x0000042E
_022025B4: .word 0x3F19999A
_022025B8: .word 0x3F333333
_022025BC: .word 0x3F4CCCCD
_022025C0: .word 0x3FF00000
_022025C4:
	mov r0, #0
	bl _dadd
	bl _d2f
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x20]
	bl _f2d
	str r0, [sp, #0x3c]
	add r0, r7, #0
	str r1, [sp, #0xc]
	bl _f2d
	str r0, [sp, #0x40]
	add r7, r1, #0
	ldr r1, [sp, #0x14]
	ldr r0, _0220270C ; =0x0000041C
	ldr r0, [r1, r0]
	bl _f2d
	add r3, r1, #0
	mov r1, #1
	add r2, r0, #0
	mov r0, #0
	lsl r1, r1, #0x1e
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x40]
	add r1, r7, #0
	bl _dmul
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x3c]
	ldr r1, [sp, #0xc]
	bl _dmul
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x38]
	add r7, r1, #0
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x44]
	add r1, r7, #0
	bl _ddiv
	bl _d2f
	add r7, r0, #0
	bl _f2d
	ldr r3, _02202710 ; =0x40080000
	mov r2, #0
	bl _dgr
	bls _02202642
	ldr r7, _02202714 ; =0x40400000
	b _02202656
_02202642:
	add r0, r7, #0
	bl _f2d
	ldr r3, _02202718 ; =0x3FF00000
	mov r2, #0
	bl _dls
	bhs _02202656
	mov r7, #0xfe
	lsl r7, r7, #0x16
_02202656:
	ldr r0, [sp, #0x34]
	ldr r1, [sp, #0x34]
	add r0, r0, r6
	add r1, r1, r6
	bl VEC_Normalize
	ldr r0, _0220271C ; =0x45800000
	add r1, r7, #0
	bl _fmul
	bl _ftoi
	ldr r1, [sp, #0x34]
	ldr r3, [sp, #0x34]
	add r1, r1, r6
	add r2, sp, #0x70
	add r3, r3, r6
	bl VEC_MultAdd
	ldr r1, [sp, #0x14]
	ldr r0, _02202720 ; =0x00000428
	ldr r0, [r1, r0]
	ldr r1, [sp, #0x34]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r1, r1, r6
	bl ov96_02204320
	add r1, r4, r6
	add r1, #0xc4
	mov r0, #1
	str r0, [r1]
_02202696:
	ldr r1, [sp, #0x18]
	ldr r0, _02202724 ; =0x000005CC
	mov r2, #0xc
	strb r2, [r1, r0]
_0220269E:
	ldr r0, _02202728 ; =0x000005EA
	mov r1, #0
	strb r1, [r4, r0]
_022026A4:
	ldr r0, [sp, #0x1c]
	add r5, #0xc
	add r0, #0x28
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x28]
	add r0, r0, #1
	str r0, [sp, #0x28]
	cmp r0, #4
	bge _022026B8
	b _022022D6
_022026B8:
	ldr r1, _0220272C ; =0x000005DC
	ldr r0, [r4, r1]
	add r1, #0xc
	ldrh r2, [r4, r1]
	ldr r1, _02202730 ; =0x00000708
	sub r1, r1, r2
	bl ov96_022043C0
	ldr r0, [sp, #4]
	bl ov96_022033FC
	ldr r0, [sp, #4]
	bl ov96_02203468
	add r0, r4, #0
	bl ov96_02203754
	ldr r0, [sp, #4]
	add r1, r4, #0
	bl ov96_02203544
	ldr r0, _02202734 ; =0x000005E8
	ldrh r1, [r4, r0]
	cmp r1, #0
	bne _022026EE
	mov r1, #1
	b _022026F0
_022026EE:
	mov r1, #0
_022026F0:
	sub r0, #0x18
	strb r1, [r4, r0]
	ldr r0, [sp, #0x24]
	add r0, #0x28
	str r0, [sp, #0x24]
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_02202738
_02202706:
	add sp, #0xa0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220270C: .word 0x0000041C
_02202710: .word 0x40080000
_02202714: .word 0x40400000
_02202718: .word 0x3FF00000
_0220271C: .word 0x45800000
_02202720: .word 0x00000428
_02202724: .word 0x000005CC
_02202728: .word 0x000005EA
_0220272C: .word 0x000005DC
_02202730: .word 0x00000708
_02202734: .word 0x000005E8
	thumb_func_end ov96_0220223C

	thumb_func_start ov96_02202738
ov96_02202738: ; 0x02202738
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	str r0, [sp]
	str r1, [sp, #4]
	mov r1, #0
	add r0, sp, #0x2c
	strb r1, [r0]
	strb r1, [r0, #1]
	strb r1, [r0, #2]
	strb r1, [r0, #3]
	add r0, sp, #0x24
	strh r1, [r0]
	strh r1, [r0, #2]
	strh r1, [r0, #4]
	strh r1, [r0, #6]
	add r0, r1, #0
	ldr r4, [sp]
	str r0, [sp, #0x1c]
	str r0, [sp, #0xc]
	ldr r0, [sp, #4]
	str r1, [sp, #0x18]
	add r5, r4, #0
	str r0, [sp, #8]
_02202766:
	add r0, r4, #0
	add r0, #0xc4
	ldr r1, [r0]
	ldr r0, [sp, #0xc]
	lsl r1, r0
	ldr r0, [sp, #0x18]
	orr r0, r1
	str r0, [sp, #0x18]
	ldr r0, _022028AC ; =0x00000433
	ldrb r0, [r5, r0]
	str r0, [sp, #0x10]
	add r0, r4, #0
	add r0, #0xfb
	ldrb r0, [r0]
	cmp r0, #0
	beq _0220278A
	mov r0, #1
	b _0220278C
_0220278A:
	mov r0, #0
_0220278C:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r1, r4, #0
	str r0, [sp, #0x14]
	add r1, #0xfb
	mov r0, #0
	strb r0, [r1]
	add r0, r4, #0
	add r0, #0xc8
	ldr r1, [r0]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r7, r0, #0xc
	add r0, r4, #0
	add r0, #0xd0
	ldr r1, [r0]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r6, r0, #0xc
	cmp r7, #1
	bge _022027BE
	mov r7, #1
	b _022027C4
_022027BE:
	cmp r7, #0x40
	ble _022027C4
	mov r7, #0x40
_022027C4:
	cmp r6, #1
	bge _022027CC
	mov r6, #1
	b _022027D2
_022027CC:
	cmp r6, #0x40
	ble _022027D2
	mov r6, #0x40
_022027D2:
	ldr r0, [sp, #0x1c]
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x20]
	ldr r0, [sp, #0x1c]
	mov r1, #3
	bl _s32_div_f
	ldr r0, [sp, #0x20]
	add r2, sp, #0x2c
	ldrb r2, [r2, r0]
	add r0, r4, #0
	add r0, #0xfe
	sub r3, r6, #1
	ldrh r0, [r0]
	lsl r1, r1, #1
	lsl r3, r3, #6
	lsl r0, r1
	add r2, r2, r0
	ldr r0, [sp, #0x20]
	add r1, sp, #0x2c
	strb r2, [r1, r0]
	ldr r0, [sp, #0x14]
	lsl r2, r0, #0xd
	ldr r0, [sp, #0x10]
	lsl r1, r0, #0xc
	sub r0, r7, #1
	add r0, r0, r3
	add r0, r1, r0
	add r1, r2, r0
	ldr r0, _022028B0 ; =0x00000431
	ldrb r0, [r5, r0]
	lsl r0, r0, #0xe
	add r1, r1, r0
	ldr r0, [sp, #8]
	strh r1, [r0, #8]
	ldr r0, [sp, #0x20]
	add r1, sp, #0x24
	lsl r0, r0, #1
	ldrh r2, [r1, r0]
	ldr r1, _022028B4 ; =0x0000042C
	ldrh r1, [r5, r1]
	add r2, r2, r1
	add r1, sp, #0x24
	strh r2, [r1, r0]
	ldrh r2, [r1, r0]
	ldr r1, _022028B8 ; =0x000003E7
	cmp r2, r1
	bls _0220283C
	add r2, r1, #0
	add r1, sp, #0x24
	strh r2, [r1, r0]
_0220283C:
	ldr r0, [sp, #0xc]
	add r4, #0x48
	add r0, r0, #2
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r5, #0x20
	add r0, r0, #2
	str r0, [sp, #8]
	ldr r0, [sp, #0x1c]
	add r0, r0, #1
	str r0, [sp, #0x1c]
	cmp r0, #0xc
	blt _02202766
	ldr r2, [sp, #4]
	mov r3, #0
	add r0, sp, #0x24
	add r1, sp, #0x2c
_0220285E:
	ldrb r4, [r1]
	add r3, r3, #1
	add r1, r1, #1
	lsl r5, r4, #0xa
	ldrh r4, [r0]
	add r0, r0, #2
	add r4, r5, r4
	strh r4, [r2]
	add r2, r2, #2
	cmp r3, #4
	blt _0220285E
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #4]
	str r1, [r0, #0x20]
	mov r1, #0x5d
	ldr r0, [sp]
	lsl r1, r1, #4
	ldrb r0, [r0, r1]
	add r1, #0x18
	lsl r2, r0, #0x18
	ldr r0, [sp, #0x18]
	add r2, r0, r2
	ldr r0, [sp, #4]
	str r2, [r0, #0x20]
	ldr r0, [sp]
	ldrh r0, [r0, r1]
	mov r1, #0x1e
	add r0, #0x1e
	bl _s32_div_f
	ldr r1, [sp, #4]
	lsl r0, r0, #0x19
	ldr r1, [r1, #0x20]
	add r1, r1, r0
	ldr r0, [sp, #4]
	str r1, [r0, #0x20]
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022028AC: .word 0x00000433
_022028B0: .word 0x00000431
_022028B4: .word 0x0000042C
_022028B8: .word 0x000003E7
	thumb_func_end ov96_02202738

	thumb_func_start ov96_022028BC
ov96_022028BC: ; 0x022028BC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r7, r0, #0
	bl ov96_021E8A20
	add r4, r0, #0
	mov r0, #0
	add r7, #0xf0
	str r0, [r4]
	add r0, r7, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x20]
	mov r1, #1
	asr r0, r0, #0x18
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _0220290A
	ldr r0, [r6, #0x48]
	bl ov96_021EB63C
	ldr r0, _0220294C ; =0x000005D8
	mov r1, #1
	ldr r0, [r6, r0]
	bl ov96_021EB144
	ldr r1, _02202950 ; =ov96_022038D4
	add r0, r5, #0
	bl ov96_021E8324
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_0220290A:
	bl sub_02025358
	cmp r0, #0
	beq _0220292C
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_0220292C:
	bl sub_0202534C
	cmp r0, #0
	beq _02202942
	ldr r0, _02202954 ; =gMain + 0x40
	ldrh r1, [r0, #0x20]
	strb r1, [r4, #4]
	ldrh r0, [r0, #0x22]
	strb r0, [r4, #5]
	mov r0, #1
	str r0, [r4]
_02202942:
	add r0, r5, #0
	bl ov96_02202958
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220294C: .word 0x000005D8
_02202950: .word ov96_022038D4
_02202954: .word gMain + 0x40
	thumb_func_end ov96_022028BC

	thumb_func_start ov96_02202958
ov96_02202958: ; 0x02202958
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14c
	str r0, [sp]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #0x58]
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x58]
	ldr r0, [r0, #0x20]
	asr r1, r0, #0x19
	mov r0, #0x7f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x54]
	bne _02202994
	mov r1, #0
	b _0220299C
_02202994:
	ldr r0, [sp, #0x54]
	sub r0, r0, #1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
_0220299C:
	add r0, r4, #0
	bl ov96_022038A0
	ldr r1, [sp, #0x2c]
	mov r0, #0x5e
	lsl r2, r1, #1
	ldr r1, [sp, #0x58]
	lsl r0, r0, #4
	ldrh r2, [r1, r2]
	ldr r1, _02202CE8 ; =0x000003FF
	ldr r0, [r4, r0]
	and r1, r2
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	bl ov96_02203BD0
	ldr r0, [sp, #0x2c]
	mov r1, #4
	sub r0, r1, r0
	str r0, [sp, #0x1c]
	ldr r1, [sp, #0x1c]
	ldr r0, _02202CEC ; =0x021094DC
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	lsl r1, r1, #0xe
	asr r1, r1, #4
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r5, [sp, #0x58]
	mov r6, #0
	str r0, [sp, #0x5c]
_022029DA:
	ldrh r0, [r5, #8]
	asr r1, r0, #0xd
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _02202AD2
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	ldr r1, [sp, #0x2c]
	cmp r1, r0
	bne _02202AD2
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x16
	add r0, r4, r0
	str r0, [sp, #0x30]
	mov r1, #1
	ldr r0, [r0, #0x64]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0x30]
	mov r1, #6
	ldr r0, [r0, #0x64]
	bl ov96_021EB564
	ldrh r1, [r5, #8]
	mov r0, #0x3f
	add r2, r1, #0
	asr r1, r1, #6
	and r1, r0
	add r7, r1, #1
	and r2, r0
	ldr r1, [sp, #0x2c]
	add r0, r2, #1
	cmp r1, #0
	beq _02202A8A
	mov r2, #0
	str r2, [sp, #0x108]
	lsl r1, r0, #0xc
	mov r2, #0x21
	lsl r0, r7, #0xc
	lsl r2, r2, #0xc
	str r1, [sp, #0x104]
	sub r1, r1, r2
	str r1, [sp, #0x104]
	add r1, r2, #0
	ldr r2, [sp, #0x5c]
	str r0, [sp, #0x10c]
	sub r0, r0, r1
	mov r1, #0
	str r0, [sp, #0x10c]
	ldrsh r1, [r2, r1]
	add r3, r2, #0
	mov r2, #2
	ldrsh r2, [r3, r2]
	add r0, sp, #0x110
	bl MTX_RotY43_
	add r0, sp, #0x104
	add r1, sp, #0x110
	add r2, sp, #0xf8
	bl MTX_MultVec43
	mov r0, #0x21
	ldr r1, [sp, #0xf8]
	lsl r0, r0, #0xc
	add r0, r1, r0
	mov r1, #0x21
	ldr r2, [sp, #0x100]
	lsl r1, r1, #0xc
	add r1, r2, r1
	asr r2, r0, #0xb
	lsr r2, r2, #0x14
	add r2, r0, r2
	str r0, [sp, #0xf8]
	asr r0, r2, #0xc
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	str r1, [sp, #0x100]
	asr r7, r2, #0xc
_02202A8A:
	bl _itof
	str r0, [sp, #0x60]
	add r0, r7, #0
	bl _itof
	add r1, r0, #0
	ldr r0, [sp, #0x60]
	add r2, sp, #0x88
	add r3, sp, #0x84
	bl ov96_02204134
	ldr r0, [sp, #0x88]
	ldr r7, [sp, #0x84]
	lsl r0, r0, #0xc
	str r0, [sp, #0x140]
	lsl r0, r7, #0xc
	str r0, [sp, #0x144]
	mov r0, #0
	str r0, [sp, #0x148]
	add r0, r7, #0
	mov r1, #0x14
	bl _s32_div_f
	sub r7, #8
	sub r0, r7, r0
	lsl r0, r0, #0xc
	str r0, [sp, #0x144]
	ldr r0, [sp, #0x30]
	add r1, sp, #0x140
	ldr r0, [r0, #0x64]
	bl ov96_021EB588
	ldr r0, _02202CF0 ; =0x0000088F
	bl PlaySE
_02202AD2:
	add r6, r6, #1
	add r5, r5, #2
	cmp r6, #0xc
	bge _02202ADC
	b _022029DA
_02202ADC:
	ldr r0, [sp, #0x2c]
	mov r5, #0
	lsl r1, r0, #1
	add r0, r0, r1
	str r0, [sp, #0x34]
_02202AE6:
	ldr r0, [sp, #0x34]
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp, #0x58]
	lsl r1, r7, #1
	add r0, r0, r1
	str r0, [sp, #0x28]
	ldrh r0, [r0, #8]
	asr r1, r0, #0xe
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x50]
	cmp r0, #1
	bne _02202B28
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _02202CF4 ; =0x00000418
	mov r1, #1
	ldr r0, [r6, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_02203BC0
	b _02202B70
_02202B28:
	ldr r0, [sp, #0x50]
	cmp r0, #2
	bne _02202B50
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _02202CF4 ; =0x00000418
	mov r1, #1
	ldr r0, [r6, r0]
	mov r2, #0
	bl ov96_021EB52C
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #1
	bl ov96_02203BC0
	b _02202B70
_02202B50:
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _02202CF4 ; =0x00000418
	mov r1, #1
	ldr r0, [r6, r0]
	mov r2, #0
	bl ov96_021EB52C
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_02203BC0
_02202B70:
	ldr r0, [sp, #0x28]
	ldrh r0, [r0, #8]
	asr r1, r0, #0xc
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x4c]
	ldr r0, [sp, #0x58]
	ldr r1, [r0, #0x20]
	lsl r0, r7, #1
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x50]
	cmp r0, #1
	bne _02202BD2
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #0xa
	bl ov96_02203CA4
	ldr r0, _02202CF8 ; =0x00000434
	mov r1, #0xa
	strh r1, [r6, r0]
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _02202BC2
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
_02202BC2:
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	beq _02202C88
	mov r0, #0x8b
	lsl r0, r0, #4
	bl PlaySE
	b _02202C88
_02202BD2:
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	beq _02202C02
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #7
	bl ov96_02203CA4
	ldr r0, _02202CF8 ; =0x00000434
	mov r1, #7
	strh r1, [r6, r0]
	mov r0, #0x8b
	lsl r0, r0, #4
	bl PlaySE
	mov r0, #0x5e
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02203CD4
	b _02202C88
_02202C02:
	ldr r0, [sp, #0x48]
	cmp r0, #1
	bne _02202C4C
	ldr r0, _02202CFC ; =0x00000436
	ldrh r0, [r6, r0]
	cmp r0, #0
	bne _02202C4C
	ldr r0, [sp, #0x50]
	cmp r0, #1
	bne _02202C1A
	bl GF_AssertFail
_02202C1A:
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #4
	bl ov96_02203CA4
	lsl r0, r7, #5
	ldr r1, _02202CF8 ; =0x00000434
	add r0, r4, r0
	mov r2, #4
	strh r2, [r0, r1]
	mov r2, #1
	add r1, r1, #2
	strh r2, [r0, r1]
	ldr r0, _02202D00 ; =0x000005EF
	add r1, r4, r5
	ldrb r0, [r1, r0]
	cmp r0, #0
	bne _02202C88
	ldr r0, _02202D04 ; =0x000008AC
	bl PlaySE
	b _02202C88
_02202C4C:
	ldr r0, _02202CF8 ; =0x00000434
	mov r7, #0
	ldrh r0, [r6, r0]
	cmp r0, #0xa
	bne _02202C5A
	mov r7, #1
	b _02202C6E
_02202C5A:
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	bl ov96_02203CC4
	cmp r0, #0
	bne _02202C6E
	mov r7, #1
_02202C6E:
	cmp r7, #0
	beq _02202C88
	mov r0, #0x5e
	lsl r0, r0, #4
	lsl r1, r5, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	mov r2, #1
	bl ov96_02203CA4
	ldr r0, _02202CF8 ; =0x00000434
	mov r1, #1
	strh r1, [r6, r0]
_02202C88:
	ldr r0, [sp, #0x48]
	cmp r0, #1
	beq _02202C94
	ldr r0, _02202CFC ; =0x00000436
	mov r1, #0
	strh r1, [r6, r0]
_02202C94:
	ldr r0, [sp, #0x34]
	add r5, r5, #1
	add r0, r0, #1
	str r0, [sp, #0x34]
	cmp r5, #3
	bge _02202CA2
	b _02202AE6
_02202CA2:
	mov r0, #0
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x2c]
	add r1, r0, #1
	lsl r0, r1, #1
	add r0, r1, r0
	mov r1, #0xc
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x38]
	add r5, r4, #0
_02202CBC:
	ldr r0, [sp, #0x38]
	mov r1, #0xc
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp, #0x58]
	lsl r1, r7, #1
	add r0, r0, r1
	ldrh r0, [r0, #8]
	asr r1, r0, #0xe
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
	cmp r0, #1
	bne _02202D1E
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _02202CF4 ; =0x00000418
	b _02202D08
	.balign 4, 0
_02202CE8: .word 0x000003FF
_02202CEC: .word 0x021094DC
_02202CF0: .word 0x0000088F
_02202CF4: .word 0x00000418
_02202CF8: .word 0x00000434
_02202CFC: .word 0x00000436
_02202D00: .word 0x000005EF
_02202D04: .word 0x000008AC
_02202D08:
	mov r1, #1
	ldr r0, [r6, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x70]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	b _02202D5A
_02202D1E:
	ldr r0, [sp, #0x10]
	cmp r0, #2
	bne _02202D40
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _0220305C ; =0x00000418
	mov r1, #1
	ldr r0, [r6, r0]
	mov r2, #0
	bl ov96_021EB52C
	mov r1, #1
	ldr r0, [r5, #0x70]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02202D5A
_02202D40:
	lsl r0, r7, #5
	add r6, r4, r0
	ldr r0, _0220305C ; =0x00000418
	mov r1, #1
	ldr r0, [r6, r0]
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x70]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02202D5A:
	ldr r0, [sp, #0x58]
	lsl r2, r7, #1
	add r0, r0, r2
	ldrh r0, [r0, #8]
	str r0, [sp, #0x64]
	asr r1, r0, #0xc
	mov r0, #1
	and r0, r1
	ldr r1, [sp, #0x58]
	lsl r0, r0, #0x18
	ldr r1, [r1, #0x20]
	lsr r0, r0, #0x18
	asr r1, r2
	mov r2, #3
	and r1, r2
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	ldr r2, [sp, #0x64]
	mov r1, #0x3f
	and r1, r2
	str r1, [sp, #0x78]
	add r1, r2, #0
	asr r2, r1, #6
	mov r1, #0x3f
	and r1, r2
	mov ip, r1
	ldr r1, [sp, #0x10]
	cmp r1, #1
	bne _02202DBC
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #0x14
	bl ov96_021EAC5C
	ldr r0, _02203060 ; =0x00000434
	mov r1, #0x14
	strh r1, [r6, r0]
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _02202E58
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
	b _02202E58
_02202DBC:
	cmp r0, #0
	beq _02202DD4
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #0x16
	bl ov96_021EAC5C
	ldr r0, _02203060 ; =0x00000434
	mov r1, #0x16
	strh r1, [r6, r0]
	b _02202E58
_02202DD4:
	cmp r3, #1
	bne _02202E24
	ldr r2, [sp, #0x78]
	mov r0, #0xc
	add r3, r2, #1
	ldr r2, _02203064 ; =0x0221C98C
	mul r0, r7
	ldr r1, _02203064 ; =0x0221C98C
	ldr r2, [r2, r0]
	add r1, r1, r0
	asr r0, r2, #0xb
	lsr r0, r0, #0x14
	add r0, r2, r0
	asr r0, r0, #0xc
	cmp r3, r0
	bne _02202E24
	ldr r2, [r1, #8]
	mov r0, ip
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	add r0, r0, #1
	asr r1, r1, #0xc
	cmp r0, r1
	bne _02202E24
	ldr r0, [sp, #0x10]
	cmp r0, #1
	bne _02202E10
	bl GF_AssertFail
_02202E10:
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #0x10
	bl ov96_021EAC5C
	ldr r0, _02203060 ; =0x00000434
	mov r1, #0x10
	strh r1, [r6, r0]
	b _02202E58
_02202E24:
	ldr r0, _02203060 ; =0x00000434
	mov r7, #0
	ldrh r0, [r6, r0]
	cmp r0, #0x14
	bne _02202E32
	mov r7, #1
	b _02202E42
_02202E32:
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	bl ov96_021EAD78
	cmp r0, #0
	bne _02202E42
	mov r7, #1
_02202E42:
	cmp r7, #0
	beq _02202E58
	add r0, r5, #0
	add r0, #0x94
	ldr r0, [r0]
	mov r1, #0
	bl ov96_021EAC5C
	ldr r0, _02203060 ; =0x00000434
	mov r1, #0
	strh r1, [r6, r0]
_02202E58:
	ldr r0, [sp, #0x38]
	add r5, r5, #4
	add r0, r0, #1
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x14]
	add r0, r0, #1
	str r0, [sp, #0x14]
	cmp r0, #9
	bge _02202E6C
	b _02202CBC
_02202E6C:
	ldr r0, [sp, #0x58]
	ldr r3, _02203068 ; =0x0221C7C4
	str r0, [sp, #0x3c]
	add r2, sp, #0x8c
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r1, [sp, #0x1c]
	ldr r0, [r3]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	lsl r1, r1, #0xe
	str r0, [r2]
	asr r1, r1, #4
	mov r6, #0
	ldr r0, _0220306C ; =0x021094DC
	lsl r1, r1, #2
	add r0, r0, r1
	str r6, [sp, #0x40]
	add r5, r4, #0
	str r0, [sp, #0x68]
_02202E94:
	ldr r0, [sp, #0x58]
	ldr r1, [r0, #0x20]
	ldr r0, [sp, #0x40]
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	add r0, r7, #0
	add r0, #0xff
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #1
	bls _02202EB2
	b _022030DE
_02202EB2:
	add r1, r5, #0
	add r1, #0xfa
	mov r0, #0
	strb r0, [r1]
	cmp r7, #2
	beq _02202ECE
	add r0, r5, #0
	add r0, #0xbc
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02202EDC
_02202ECE:
	add r0, r5, #0
	add r0, #0xbc
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02202EDC:
	add r0, r5, #0
	add r0, #0xb8
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x24]
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	ldr r0, [sp, #0x24]
	str r1, [sp, #0xc]
	lsl r1, r0, #1
	ldr r0, [sp, #0x58]
	ldrh r0, [r0, r1]
	asr r1, r0, #0xa
	mov r0, #0x3f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0xc]
	lsl r0, r0, #1
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp, #0x3c]
	ldrh r1, [r0, #8]
	mov r0, #0x3f
	and r0, r1
	asr r2, r1, #6
	mov r1, #0x3f
	and r1, r2
	add r1, r1, #1
	str r1, [sp, #0x44]
	ldr r1, [sp, #0x2c]
	add r0, r0, #1
	cmp r1, #0
	beq _02202F96
	mov r2, #0
	str r2, [sp, #0xb4]
	lsl r1, r0, #0xc
	mov r2, #0x21
	ldr r0, [sp, #0x44]
	lsl r2, r2, #0xc
	str r1, [sp, #0xb0]
	sub r1, r1, r2
	lsl r0, r0, #0xc
	str r1, [sp, #0xb0]
	add r1, r2, #0
	ldr r2, [sp, #0x68]
	str r0, [sp, #0xb8]
	sub r0, r0, r1
	mov r1, #0
	str r0, [sp, #0xb8]
	ldrsh r1, [r2, r1]
	add r3, r2, #0
	mov r2, #2
	ldrsh r2, [r3, r2]
	add r0, sp, #0xbc
	bl MTX_RotY43_
	add r0, sp, #0xb0
	add r1, sp, #0xbc
	add r2, sp, #0xa4
	bl MTX_MultVec43
	mov r0, #0x21
	ldr r1, [sp, #0xa4]
	lsl r0, r0, #0xc
	add r0, r1, r0
	mov r1, #0x21
	ldr r2, [sp, #0xac]
	lsl r1, r1, #0xc
	add r1, r2, r1
	asr r2, r0, #0xb
	lsr r2, r2, #0x14
	add r2, r0, r2
	str r0, [sp, #0xa4]
	asr r0, r2, #0xc
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	str r1, [sp, #0xac]
	asr r1, r2, #0xc
	str r1, [sp, #0x44]
_02202F96:
	bl _itof
	str r0, [sp, #0x6c]
	ldr r0, [sp, #0x44]
	bl _itof
	add r1, r0, #0
	ldr r0, [sp, #0x6c]
	add r2, sp, #0x80
	add r3, sp, #0x7c
	bl ov96_02204134
	ldr r0, [sp, #0x80]
	add r1, sp, #0xec
	lsl r0, r0, #0xc
	str r0, [sp, #0xec]
	ldr r0, [sp, #0x7c]
	lsl r0, r0, #0xc
	str r0, [sp, #0xf0]
	mov r0, #0
	str r0, [sp, #0xf4]
	add r0, r5, #0
	add r0, #0xbc
	ldr r0, [r0]
	bl ov96_021EB588
	ldr r0, [sp, #0x7c]
	mov r1, #0x14
	str r0, [sp, #0x18]
	bl _s32_div_f
	ldr r1, [sp, #0x18]
	sub r1, #8
	sub r0, r1, r0
	lsl r0, r0, #0xc
	str r0, [sp, #0xf0]
	add r0, r5, #0
	add r0, #0xb8
	str r1, [sp, #0x18]
	ldr r0, [r0]
	add r1, sp, #0xec
	bl ov96_021EB588
	add r3, sp, #0x8c
	ldmia r3!, {r0, r1}
	add r2, sp, #0x98
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [sp, #0x7c]
	bl _itof
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _02203070 ; =0x40738000
	mov r0, #0
	bl _dadd
	ldr r3, _02203074 ; =0x40878000
	mov r2, #0
	bl _ddiv
	str r0, [sp, #0x70]
	add r0, r7, #0
	str r1, [sp, #8]
	bl _utof
	bl _f2d
	ldr r3, _02203078 ; =0x40080000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r1, _0220307C ; =0x3FF00000
	mov r0, #0
	bl _dadd
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x70]
	ldr r1, [sp, #8]
	bl _dmul
	bl _d2f
	str r0, [sp, #0x74]
	ldr r0, _02203080 ; =0x45800000
	ldr r1, [sp, #0x74]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x98]
	ldr r0, _02203080 ; =0x45800000
	b _02203084
	.balign 4, 0
_0220305C: .word 0x00000418
_02203060: .word 0x00000434
_02203064: .word 0x0221C98C
_02203068: .word 0x0221C7C4
_0220306C: .word 0x021094DC
_02203070: .word 0x40738000
_02203074: .word 0x40878000
_02203078: .word 0x40080000
_0220307C: .word 0x3FF00000
_02203080: .word 0x45800000
_02203084:
	ldr r1, [sp, #0x74]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x9c]
	add r0, r5, #0
	add r0, #0xbc
	ldr r0, [r0]
	add r1, sp, #0x98
	mov r2, #2
	bl ov96_021EB5A0
	add r0, r5, #0
	add r0, #0xb8
	ldr r0, [r0]
	add r1, sp, #0x98
	mov r2, #2
	bl ov96_021EB5A0
	add r0, r5, #0
	add r0, #0xc0
	ldr r0, [r0]
	add r1, sp, #0x98
	mov r2, #2
	bl ov96_021EB5A0
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x2c]
	cmp r1, r0
	bne _02203168
	ldr r0, [sp, #0xc]
	add r1, r4, r0
	ldr r0, _02203198 ; =0x000005EC
	str r1, [sp, #0x20]
	ldrb r0, [r1, r0]
	cmp r7, r0
	beq _02203168
	ldr r0, _0220319C ; =0x000008B1
	bl PlaySE
	ldr r1, [sp, #0x20]
	ldr r0, _02203198 ; =0x000005EC
	strb r7, [r1, r0]
	b _02203168
_022030DE:
	add r0, r5, #0
	add r0, #0xbc
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	add r0, r5, #0
	add r0, #0xb8
	ldr r0, [r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	cmp r7, #3
	bne _02203168
	add r0, r5, #0
	add r0, #0xfa
	ldrb r0, [r0]
	cmp r0, #0
	bne _02203168
	add r1, r5, #0
	add r1, #0xfa
	mov r0, #1
	strb r0, [r1]
	add r0, r5, #0
	add r0, #0xb8
	ldr r0, [r0]
	bl ov96_021EB594
	add r1, r0, #0
	add r0, r5, #0
	add r0, #0xc0
	ldr r0, [r0]
	bl ov96_021EB588
	add r0, r5, #0
	add r0, #0xc0
	ldr r0, [r0]
	mov r1, #3
	bl ov96_021EB564
	add r0, r5, #0
	add r0, #0xc0
	mov r1, #1
	ldr r0, [r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	ldr r1, [sp, #0x2c]
	cmp r0, r1
	bne _02203168
	ldr r0, _022031A0 ; =0x000008B3
	bl PlaySE
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r0, r4, r1
	ldr r1, _022031A4 ; =0x000005EF
	mov r2, #0
	strb r2, [r0, r1]
	sub r1, r1, #3
	strb r2, [r0, r1]
_02203168:
	ldr r0, [sp, #0x40]
	add r6, r6, #1
	add r0, r0, #2
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x3c]
	add r5, #0x48
	add r0, r0, #2
	str r0, [sp, #0x3c]
	cmp r6, #0xc
	bge _0220317E
	b _02202E94
_0220317E:
	ldr r1, [sp, #0x2c]
	add r0, r4, #0
	bl ov96_02203970
	ldr r2, [sp, #0x54]
	mov r1, #0x1e
	ldr r0, [sp]
	mul r1, r2
	bl ov96_021E6454
	add sp, #0x14c
	pop {r4, r5, r6, r7, pc}
	nop
_02203198: .word 0x000005EC
_0220319C: .word 0x000008B1
_022031A0: .word 0x000008B3
_022031A4: .word 0x000005EF
	thumb_func_end ov96_02202958

	thumb_func_start ov96_022031A8
ov96_022031A8: ; 0x022031A8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x68
	add r5, r1, #0
	mov r1, #0x12
	lsl r1, r1, #4
	add r0, r2, #0
	add r1, r3, r1
	add r2, sp, #4
	add r3, sp, #0
	bl ov96_0220404C
	ldr r0, _02203290 ; =0x45800000
	ldr r1, [sp, #4]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x5c]
	ldr r0, _02203290 ; =0x45800000
	ldr r1, [sp]
	bl _fmul
	bl _ftoi
	str r0, [sp, #0x64]
	mov r0, #0
	str r0, [sp, #0x60]
	cmp r5, #0
	beq _0220323C
	add r3, sp, #0x5c
	ldmia r3!, {r0, r1}
	add r2, sp, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _02203294 ; =0x021094DC
	str r0, [r2]
	mov r0, #0x21
	ldr r1, [sp, #0x20]
	lsl r0, r0, #0xc
	sub r1, r1, r0
	str r1, [sp, #0x20]
	ldr r1, [sp, #0x28]
	sub r0, r1, r0
	str r0, [sp, #0x28]
	lsl r0, r5, #0xe
	asr r0, r0, #4
	lsl r2, r0, #1
	lsl r1, r2, #1
	add r2, r2, #1
	lsl r2, r2, #1
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	add r0, sp, #0x2c
	bl MTX_RotY43_
	add r0, sp, #0x20
	add r1, sp, #0x2c
	add r2, sp, #0x14
	bl MTX_MultVec43
	mov r0, #0x21
	ldr r1, [sp, #0x14]
	lsl r0, r0, #0xc
	add r1, r1, r0
	str r1, [sp, #0x14]
	ldr r1, [sp, #0x1c]
	add r3, sp, #0x14
	add r0, r1, r0
	str r0, [sp, #0x1c]
	ldmia r3!, {r0, r1}
	add r2, sp, #0x5c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_0220323C:
	add r2, sp, #0x5c
	ldr r3, [sp, #0x80]
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	add r1, r5, #1
	str r0, [r3]
	lsl r0, r5, #1
	add r4, r5, r0
	lsl r0, r1, #1
	add r6, r1, r0
	cmp r4, r6
	bge _02203288
	mov r0, #0xc
	ldr r1, _02203298 ; =0x0221C98C
	mul r0, r4
	add r5, r1, r0
	add r7, sp, #8
_02203260:
	add r0, r5, #0
	add r1, sp, #0x5c
	add r2, r7, #0
	bl VEC_Subtract
	add r0, r7, #0
	bl VEC_Mag
	mov r1, #1
	lsl r1, r1, #0xe
	cmp r0, r1
	bgt _02203280
	lsl r0, r4, #0x18
	add sp, #0x68
	lsr r0, r0, #0x18
	pop {r3, r4, r5, r6, r7, pc}
_02203280:
	add r4, r4, #1
	add r5, #0xc
	cmp r4, r6
	blt _02203260
_02203288:
	mov r0, #0xc
	add sp, #0x68
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02203290: .word 0x45800000
_02203294: .word 0x021094DC
_02203298: .word 0x0221C98C
	thumb_func_end ov96_022031A8

	thumb_func_start ov96_0220329C
ov96_0220329C: ; 0x0220329C
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r1, r2, #0
	add r2, r3, #0
	ldr r4, [sp, #0x10]
	bl ov96_021E60D8
	add r6, r0, #0
	ldrb r0, [r6, #4]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl _itof
	bl _f2d
	ldr r3, _0220330C ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	str r0, [r4, #4]
	ldrb r0, [r6]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x14]
	bl _itof
	bl _f2d
	ldr r3, _0220330C ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	str r0, [r4, #8]
	ldrb r0, [r6, #4]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x28]
	str r0, [r4, #0x10]
	ldrb r0, [r6, #3]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x3c]
	bl _itof
	str r0, [r4, #0xc]
	mov r0, #0
	strh r0, [r4, #0x14]
	strb r0, [r4, #0x18]
	strb r0, [r4, #0x19]
	mov r0, #0x78
	strh r0, [r4, #0x16]
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220330C: .word 0x40240000
	thumb_func_end ov96_0220329C

	thumb_func_start ov96_02203310
ov96_02203310: ; 0x02203310
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	ldr r0, [r6]
	ldr r2, _02203374 ; =0x0221C7B0
	add r1, r6, #4
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r6]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	add r0, r6, #4
	mov r1, #0
	bl FillWindowPixelBuffer
	add r5, r6, #0
	ldr r4, _02203378 ; =0x0221C7EC
	mov r7, #0
	add r5, #0x14
_0220333C:
	ldr r0, [r6]
	add r1, r5, #0
	add r2, r4, #0
	bl AddWindow
	add r0, r5, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	add r7, r7, #1
	add r4, #8
	add r5, #0x10
	cmp r7, #3
	blt _0220333C
	mov r1, #0
	str r1, [sp]
	ldr r0, [r6]
	add r2, r1, #0
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r6, #0x44]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02203374: .word 0x0221C7B0
_02203378: .word 0x0221C7EC
	thumb_func_end ov96_02203310

	thumb_func_start ov96_0220337C
ov96_0220337C: ; 0x0220337C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r7, r1, #0
	add r0, r5, #4
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r2, _022033F4 ; =0x00000135
	ldr r3, [r5, #0x44]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r4, r0, #0
	ldr r0, [r5, #0x44]
	bl ScrStrBufs_new
	mov r1, #0
	str r1, [sp]
	mov r2, #1
	str r2, [sp, #4]
	add r2, r7, #0
	mov r3, #3
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x44]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0xa4
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _022033F8 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #4
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r4, #0
	bl DestroyMsgData
	add r0, r5, #4
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022033F4: .word 0x00000135
_022033F8: .word 0x000F0E00
	thumb_func_end ov96_0220337C

	thumb_func_start ov96_022033FC
ov96_022033FC: ; 0x022033FC
	push {r3, r4, r5, r6, r7, lr}
	bl ov96_021E5DC4
	mov r5, #0
	mov r1, #0x43
	add r2, r5, #0
	mov r3, #2
	mov r4, #1
	lsl r1, r1, #4
_0220340E:
	ldrb r6, [r0, r1]
	cmp r6, #0
	beq _02203422
	mov r6, #0x43
	lsl r6, r6, #4
	ldrb r6, [r0, r6]
	sub r7, r6, #1
	mov r6, #0x43
	lsl r6, r6, #4
	strb r7, [r0, r6]
_02203422:
	ldr r6, _02203460 ; =0x0000042E
	ldrsh r6, [r0, r6]
	cmp r6, #0x78
	bge _02203434
	ldr r6, _02203460 ; =0x0000042E
	ldrsh r6, [r0, r6]
	add r7, r6, #1
	ldr r6, _02203460 ; =0x0000042E
	strh r7, [r0, r6]
_02203434:
	mov r6, #0x43
	lsl r6, r6, #4
	ldrb r6, [r0, r6]
	cmp r6, #0
	beq _02203444
	ldr r6, _02203464 ; =0x00000431
	strb r4, [r0, r6]
	b _02203454
_02203444:
	ldr r6, _02203460 ; =0x0000042E
	ldrsh r6, [r0, r6]
	cmp r6, #0x64
	ldr r6, _02203464 ; =0x00000431
	bgt _02203452
	strb r3, [r0, r6]
	b _02203454
_02203452:
	strb r2, [r0, r6]
_02203454:
	add r5, r5, #1
	add r0, #0x20
	cmp r5, #0xc
	blt _0220340E
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02203460: .word 0x0000042E
_02203464: .word 0x00000431
	thumb_func_end ov96_022033FC

	thumb_func_start ov96_02203468
ov96_02203468: ; 0x02203468
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0
	add r5, r4, #0
	str r5, [sp]
	add r5, #0xc8
	add r7, r4, #0
	str r0, [sp, #8]
	str r5, [sp]
	add r7, #0xd4
	add r6, r0, #0
_02203484:
	mov r0, #0
	str r0, [sp, #4]
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #1
	bne _022034A2
	mov r0, #1
	ldr r3, [sp]
	lsl r0, r0, #0xc
	add r1, r7, #0
	add r2, r5, #0
	bl VEC_MultAdd
	b _022034CC
_022034A2:
	cmp r0, #3
	bne _022034CC
	add r0, r4, #0
	add r0, #0xf8
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xf8
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xf8
	ldrb r0, [r0]
	cmp r0, #8
	blo _022034CC
	add r1, r4, #0
	add r1, #0xf8
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0xc4
	str r0, [r1]
_022034CC:
	add r0, r4, #0
	add r0, #0xc8
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0xc
	cmp r1, r0
	blt _022034F4
	lsl r0, r0, #6
	cmp r1, r0
	bgt _022034F4
	add r0, r4, #0
	add r0, #0xd0
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0xc
	cmp r1, r0
	blt _022034F4
	lsl r0, r0, #6
	cmp r1, r0
	ble _022034F8
_022034F4:
	mov r0, #1
	str r0, [sp, #4]
_022034F8:
	ldr r0, [sp, #4]
	cmp r0, #0
	beq _02203528
	add r0, r4, #0
	add r0, #0xc4
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xd4
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xdc
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xd8
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xe0
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xe8
	str r6, [r0]
	add r0, r4, #0
	add r0, #0xe4
	str r6, [r0]
_02203528:
	ldr r0, [sp]
	add r4, #0x48
	add r0, #0x48
	str r0, [sp]
	ldr r0, [sp, #8]
	add r5, #0x48
	add r0, r0, #1
	add r7, #0x48
	str r0, [sp, #8]
	cmp r0, #0xc
	blt _02203484
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203468

	thumb_func_start ov96_02203544
ov96_02203544: ; 0x02203544
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #0x20]
	ldr r0, _02203730 ; =0x0221C98C
	str r1, [sp, #8]
	add r4, r1, #0
	str r0, [sp, #0x18]
_02203556:
	ldr r5, [sp, #8]
	mov r0, #0
	ldr r1, _02203734 ; =0x00000433
	str r0, [sp, #0x1c]
	strb r0, [r4, r1]
	add r0, r5, #0
	str r0, [sp, #0x14]
	add r0, #0xc8
	str r0, [sp, #0x14]
	add r0, r5, #0
	str r0, [sp, #0x10]
	add r0, #0xd4
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x20]
	mov r1, #3
	add r6, r5, #0
	bl _s32_div_f
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x20]
	mov r1, #3
	bl _s32_div_f
	ldr r0, [sp, #0xc]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x24]
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x28]
_02203592:
	add r0, r5, #0
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #1
	bne _022035C4
	ldr r0, [sp, #0x1c]
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	ldr r0, [sp, #0xc]
	cmp r7, r0
	beq _022035C4
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0x14]
	add r2, sp, #0x2c
	bl VEC_Subtract
	add r0, sp, #0x2c
	bl VEC_Mag
	mov r1, #3
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _022035C6
_022035C4:
	b _022036FA
_022035C6:
	add r1, r5, #0
	add r1, #0xc4
	mov r0, #3
	str r0, [r1]
	ldr r0, [sp, #0x1c]
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r7, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #3
	bl ov96_021E8228
	ldr r0, _02203738 ; =0x0000042C
	ldrh r0, [r6, r0]
	add r1, r0, #1
	ldr r0, _02203738 ; =0x0000042C
	strh r1, [r6, r0]
	ldrh r1, [r6, r0]
	sub r0, #0x45
	cmp r1, r0
	bls _02203606
	ldr r1, _0220373C ; =0x000003E7
	add r0, r1, #0
	add r0, #0x45
	strh r1, [r6, r0]
_02203606:
	add r1, r5, #0
	add r1, #0xfb
	mov r0, #1
	strb r0, [r1]
	add r1, r0, #0
	ldr r0, _02203734 ; =0x00000433
	strb r1, [r4, r0]
	add r0, r5, #0
	add r0, #0xfe
	ldrh r0, [r0]
	cmp r0, #3
	bhi _02203644
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220362A: ; jump table
	.short _02203632 - _0220362A - 2 ; case 0
	.short _02203638 - _0220362A - 2 ; case 1
	.short _0220363C - _0220362A - 2 ; case 2
	.short _02203640 - _0220362A - 2 ; case 3
_02203632:
	mov r7, #0xfe
	lsl r7, r7, #0x16
	b _0220364C
_02203638:
	ldr r7, _02203740 ; =0x41A00000
	b _0220364C
_0220363C:
	ldr r7, _02203744 ; =0x42480000
	b _0220364C
_02203640:
	ldr r7, _02203748 ; =0x42C80000
	b _0220364C
_02203644:
	bl GF_AssertFail
	mov r7, #0xfe
	lsl r7, r7, #0x16
_0220364C:
	add r1, r5, #0
	add r1, #0xfe
	mov r0, #0
	strh r0, [r1]
	add r1, r5, #0
	add r1, #0xfc
	strh r0, [r1]
	ldr r0, [sp, #0x10]
	bl VEC_Mag
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	bl _itof
	add r1, r7, #0
	bl _fmul
	mov r1, #0x42
	lsl r1, r1, #4
	ldr r1, [r6, r1]
	bl _fmul
	add r1, r0, #0
	ldr r0, _0220374C ; =0x00000424
	ldr r0, [r4, r0]
	bl _fmul
	bl _ftoi
	add r7, r0, #0
	bpl _02203692
	bl GF_AssertFail
_02203692:
	ldr r0, _02203750 ; =0x0000042E
	ldrsh r0, [r4, r0]
	sub r1, r0, r7
	ldr r0, _02203750 ; =0x0000042E
	sub r1, #0x1e
	strh r1, [r4, r0]
	ldrsh r0, [r4, r0]
	cmp r0, #0
	bge _022036AA
	ldr r0, _02203750 ; =0x0000042E
	mov r1, #0
	strh r1, [r4, r0]
_022036AA:
	ldr r0, _02203750 ; =0x0000042E
	ldrsh r1, [r4, r0]
	mov r0, #0x78
	sub r0, r0, r1
	mov r1, #0x43
	lsl r1, r1, #4
	ldrb r1, [r4, r1]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r1, #0
	bne _022036DC
	cmp r0, #0x28
	bls _022036FA
	mov r1, #0x43
	lsl r1, r1, #4
	strb r0, [r4, r1]
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #4]
	ldr r1, [sp, #0x24]
	ldr r2, [sp, #0x28]
	mov r3, #1
	bl ov96_021E8228
	b _022036FA
_022036DC:
	mov r1, #0x43
	lsl r1, r1, #4
	ldrb r1, [r4, r1]
	ldr r2, [sp, #0x28]
	mov r3, #1
	add r1, r1, r0
	mov r0, #0x43
	lsl r0, r0, #4
	strb r1, [r4, r0]
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #4]
	ldr r1, [sp, #0x24]
	bl ov96_021E8228
_022036FA:
	ldr r0, [sp, #0x14]
	add r5, #0x48
	add r0, #0x48
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r6, #0x20
	add r0, #0x48
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x1c]
	add r0, r0, #1
	str r0, [sp, #0x1c]
	cmp r0, #0xc
	bge _02203716
	b _02203592
_02203716:
	ldr r0, [sp, #0x18]
	add r4, #0x20
	add r0, #0xc
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x20]
	add r0, r0, #1
	str r0, [sp, #0x20]
	cmp r0, #0xc
	bge _0220372A
	b _02203556
_0220372A:
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02203730: .word 0x0221C98C
_02203734: .word 0x00000433
_02203738: .word 0x0000042C
_0220373C: .word 0x000003E7
_02203740: .word 0x41A00000
_02203744: .word 0x42480000
_02203748: .word 0x42C80000
_0220374C: .word 0x00000424
_02203750: .word 0x0000042E
	thumb_func_end ov96_02203544

	thumb_func_start ov96_02203754
ov96_02203754: ; 0x02203754
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	mov r1, #0
	str r0, [sp]
	add r0, r1, #0
	add r2, sp, #0x28
	str r0, [sp, #4]
_02203762:
	ldr r0, [sp, #4]
	add r1, r1, #1
	strb r0, [r2]
	add r2, r2, #1
	cmp r1, #0xc
	blt _02203762
	ldr r0, [sp]
	str r0, [sp, #0x10]
	str r0, [sp, #0xc]
	add r0, #0xc8
	str r0, [sp, #0xc]
	add r0, sp, #0x28
	str r0, [sp, #8]
	ldr r0, [sp, #0xc]
	str r0, [sp, #0x14]
	ldr r0, [sp, #8]
	str r0, [sp, #0x18]
_02203784:
	ldr r0, [sp, #0x10]
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #1
	beq _02203792
	cmp r0, #2
	bne _022037DC
_02203792:
	ldr r7, [sp]
	ldr r6, [sp, #0x14]
	ldr r5, [sp, #0x18]
	mov r4, #0
_0220379A:
	ldr r0, [sp, #4]
	cmp r0, r4
	beq _022037D0
	add r0, r7, #0
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #1
	beq _022037AE
	cmp r0, #2
	bne _022037D0
_022037AE:
	ldr r0, [sp, #0xc]
	add r1, r6, #0
	add r2, sp, #0x1c
	bl VEC_Subtract
	add r0, sp, #0x1c
	bl VEC_Mag
	mov r1, #1
	lsl r1, r1, #0xe
	cmp r0, r1
	bge _022037D0
	ldr r0, [sp, #8]
	mov r1, #1
	strb r1, [r0]
	add r0, r1, #0
	strb r0, [r5]
_022037D0:
	add r4, r4, #1
	add r7, #0x48
	add r6, #0x48
	add r5, r5, #1
	cmp r4, #0xc
	blt _0220379A
_022037DC:
	ldr r0, [sp, #0x10]
	add r0, #0x48
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, #0x48
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #0xc
	blt _02203784
	mov r3, #0
	add r2, sp, #0x28
	mov r1, #3
	add r0, r3, #0
_02203800:
	ldrb r4, [r2]
	cmp r4, #0
	beq _02203818
	ldr r4, [sp]
	add r4, #0xc4
	str r1, [r4]
	ldr r4, [sp]
	add r4, #0xfe
	strh r0, [r4]
	ldr r4, [sp]
	add r4, #0xfc
	strh r0, [r4]
_02203818:
	ldr r4, [sp]
	add r3, r3, #1
	add r4, #0x48
	add r2, r2, #1
	str r4, [sp]
	cmp r3, #0xc
	blt _02203800
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203754

	thumb_func_start ov96_0220382C
ov96_0220382C: ; 0x0220382C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #0x10]
	add r0, r1, #0
	str r1, [sp, #0x14]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	ldr r5, [sp, #0x10]
	lsr r0, r0, #0x18
	mov r7, #0
	add r4, r0, #1
	add r5, #0x14
_02203846:
	lsr r3, r4, #0x1f
	lsl r2, r4, #0x1e
	sub r2, r2, r3
	mov r1, #0x1e
	ror r2, r1
	add r1, r3, r2
	lsl r1, r1, #0x18
	ldr r0, [sp, #0x14]
	lsr r1, r1, #0x18
	bl ov96_021E5F34
	ldr r1, [sp, #0x10]
	ldr r1, [r1, #0x44]
	bl sub_02028F68
	add r6, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _0220389C ; =0x000F0E00
	mov r1, #0
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	add r0, r5, #0
	add r2, r6, #0
	add r3, r1, #0
	bl sub_020200FC
	add r0, r6, #0
	bl String_dtor
	add r0, r5, #0
	bl CopyWindowToVram
	add r7, r7, #1
	add r4, r4, #1
	add r5, #0x10
	cmp r7, #3
	blt _02203846
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220389C: .word 0x000F0E00
	thumb_func_end ov96_0220382C

	thumb_func_start ov96_022038A0
ov96_022038A0: ; 0x022038A0
	push {r3, r4, r5, lr}
	add r5, r0, #0
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #0x50]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #0x54]
	add r1, r1, #1
	bl sub_020248F0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_022038A0

	thumb_func_start ov96_022038D4
ov96_022038D4: ; 0x022038D4
	push {r4, r5, r6, lr}
	add r4, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r4, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x17
	ldrh r1, [r5, r0]
	ldr r0, _02203920 ; =0x000003FF
	and r1, r0
	lsl r1, r1, #0x10
	lsr r5, r1, #0x10
	add r1, r0, #0
	sub r1, #0x18
	cmp r5, r1
	bls _0220390C
	add r5, r0, #0
	sub r5, #0x18
_0220390C:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E8318
	add r0, r6, #0
	add r1, r5, #0
	bl ov96_0220337C
	pop {r4, r5, r6, pc}
	nop
_02203920: .word 0x000003FF
	thumb_func_end ov96_022038D4

	thumb_func_start ov96_02203924
ov96_02203924: ; 0x02203924
	push {r4, r5}
	ldrh r2, [r0]
	ldr r3, [r1, #4]
	lsl r2, r2, #0x18
	lsr r5, r2, #0x18
	ldr r2, [r0, #4]
	cmp r2, r3
	ble _0220393A
	mov r2, #0
	mvn r2, r2
	b _02203966
_0220393A:
	cmp r2, r3
	bge _02203942
	mov r2, #1
	b _02203966
_02203942:
	ldr r4, _0220396C ; =0x0221C95C
	mov r2, #0xc
	add r3, r5, #0
	mul r3, r2
	ldrh r1, [r1, #2]
	add r3, r4, r3
	ldrh r0, [r0, #2]
	ldrb r1, [r3, r1]
	ldrb r0, [r3, r0]
	cmp r0, r1
	bhs _0220395C
	sub r2, #0xd
	b _02203966
_0220395C:
	cmp r0, r1
	bls _02203964
	mov r2, #1
	b _02203966
_02203964:
	mov r2, #0
_02203966:
	add r0, r2, #0
	pop {r4, r5}
	bx lr
	.balign 4, 0
_0220396C: .word 0x0221C95C
	thumb_func_end ov96_02203924

	thumb_func_start ov96_02203970
ov96_02203970: ; 0x02203970
	push {r4, r5, r6, r7, lr}
	sub sp, #0x64
	add r5, r0, #0
	add r7, r1, #0
	mov r4, #0
_0220397A:
	mov r0, #0x48
	add r6, r4, #0
	mul r6, r0
	add r0, r5, r6
	add r0, #0xbc
	ldr r0, [r0]
	bl ov96_021EB594
	add r3, r5, r6
	add r3, #0xf9
	ldrb r3, [r3]
	lsl r1, r4, #3
	add r2, sp, #4
	add r2, r2, r1
	strh r3, [r2, #2]
	ldr r0, [r0, #4]
	str r0, [r2, #4]
	add r0, sp, #4
	strh r7, [r0, r1]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _0220397A
	ldr r0, _022039F8 ; =0x00000598
	ldr r3, _022039FC ; =ov96_02203924
	ldr r0, [r5, r0]
	mov r1, #0xc
	str r0, [sp]
	add r0, sp, #4
	mov r2, #8
	bl sub_020E3A84
	mov r4, #0
	add r7, sp, #4
_022039C0:
	lsl r0, r4, #3
	add r0, r7, r0
	ldrh r0, [r0, #2]
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	add r6, r1, #0
	mov r0, #0x48
	mul r6, r0
	add r0, r5, r6
	add r0, #0xb8
	add r1, r4, #0
	ldr r0, [r0]
	add r1, #0x14
	bl ov96_021EB630
	add r0, r5, r6
	add r0, #0xc0
	ldr r0, [r0]
	add r1, r4, #5
	bl ov96_021EB630
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _022039C0
	add sp, #0x64
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022039F8: .word 0x00000598
_022039FC: .word ov96_02203924
	thumb_func_end ov96_02203970

	thumb_func_start ov96_02203A00
ov96_02203A00: ; 0x02203A00
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0x74
	add r5, r0, #0
	add r7, r2, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0x74
	bl MIi_CpuFill8
	str r5, [r4]
	str r6, [r4, #8]
	add r0, r4, #0
	str r7, [r4, #4]
	bl ov96_02203FBC
	add r0, r4, #0
	bl ov96_02203FFC
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203A00

	thumb_func_start ov96_02203A30
ov96_02203A30: ; 0x02203A30
	push {r4, r5, r6, lr}
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_02203A38:
	ldr r0, [r5, #0x24]
	bl FreeToHeap
	ldr r0, [r5, #0x28]
	bl FreeToHeap
	add r4, r4, #1
	add r5, #8
	cmp r4, #3
	blt _02203A38
	ldr r0, [r6, #0x1c]
	bl FreeToHeap
	add r0, r6, #0
	add r0, #0xc
	bl RemoveWindow
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02203A30

	thumb_func_start ov96_02203A64
ov96_02203A64: ; 0x02203A64
	push {r4, r5, lr}
	sub sp, #0x1c
	add r5, r0, #0
	add r4, r1, #0
	mov r1, #0
	mov r0, #2
	str r1, [sp]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r5]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r5, #8]
	mov r0, #0xdb
	mov r3, #7
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r5, #8]
	mov r0, #0xdb
	mov r3, #6
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r5, #8]
	mov r0, #0xdb
	mov r3, #7
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r2, [r5, #8]
	mov r0, #0xdb
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r5]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r2, [r5, #8]
	mov r0, #0xdb
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	ldr r0, [r5]
	add r3, r5, #0
	str r0, [sp]
	mov r0, #0xdb
	mov r1, #9
	mov r2, #0
	add r3, #0x20
	bl GfGfxLoader_GetScrnData
	str r0, [r5, #0x1c]
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r5]
	mov r1, #3
	str r0, [sp, #4]
	mov r0, #0xdb
	mov r2, #4
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #4
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [r5, #0x20]
	mov r1, #5
	add r0, #0xc
	str r0, [sp, #8]
	lsl r0, r4, #0x1a
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	mov r0, #0x10
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	ldr r0, [r5, #8]
	mov r2, #0
	mov r3, #0x12
	bl sub_0201C568
	ldr r0, [r5, #8]
	mov r1, #5
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x1c
	pop {r4, r5, pc}
	thumb_func_end ov96_02203A64

	thumb_func_start ov96_02203B44
ov96_02203B44: ; 0x02203B44
	push {r4, lr}
	sub sp, #8
	add r4, r1, #0
	mov r0, #2
	str r0, [sp]
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xd
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #4
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xa
	mov r3, #0x65
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xc
	mov r3, #0x65
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xdb
	mov r2, #0xb
	mov r3, #0x65
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02203B44

	thumb_func_start ov96_02203B8C
ov96_02203B8C: ; 0x02203B8C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp, #4]
	add r5, r1, #0
	str r2, [sp, #8]
	mov r4, #0
	mov r6, #5
	mov r7, #3
_02203B9C:
	add r0, r5, #0
	add r1, r7, #0
	mov r2, #2
	mov r3, #0x65
	str r6, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #3
	blt _02203B9C
	ldr r1, [sp, #4]
	ldr r2, [sp, #8]
	add r0, r5, #0
	bl ov96_02203E30
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203B8C

	thumb_func_start ov96_02203BC0
ov96_02203BC0: ; 0x02203BC0
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r3, _02203BCC ; =ov96_021EB52C
	ldr r0, [r0, #0x60]
	mov r1, #1
	bx r3
	.balign 4, 0
_02203BCC: .word ov96_021EB52C
	thumb_func_end ov96_02203BC0

	thumb_func_start ov96_02203BD0
ov96_02203BD0: ; 0x02203BD0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	mov r0, #0x64
	mul r0, r4
	sub r0, r6, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	mov r1, #0xa
	bl _u32_div_f
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x10
	lsr r4, r0, #0x10
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_02203C5E:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x20]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	add r2, #0x13
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r1, #5
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	ldr r0, [r5, #8]
	mov r3, #0x10
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02203C5E
	ldr r0, [r5, #8]
	mov r1, #5
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02203BD0

	thumb_func_start ov96_02203CA4
ov96_02203CA4: ; 0x02203CA4
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r6, r2, #0
	cmp r4, #3
	blo _02203CB4
	bl GF_AssertFail
_02203CB4:
	lsl r0, r4, #2
	add r0, r5, r0
	ldr r0, [r0, #0x54]
	add r1, r6, r4
	bl ov96_021EB570
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02203CA4

	thumb_func_start ov96_02203CC4
ov96_02203CC4: ; 0x02203CC4
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r3, _02203CD0 ; =ov96_021EB57C
	ldr r0, [r0, #0x54]
	bx r3
	nop
_02203CD0: .word ov96_021EB57C
	thumb_func_end ov96_02203CC4

	thumb_func_start ov96_02203CD4
ov96_02203CD4: ; 0x02203CD4
	add r1, r0, #0
	mov r2, #1
	add r1, #0x70
	strb r2, [r1]
	mov r1, #0
	add r0, #0x71
	strb r1, [r0]
	bx lr
	thumb_func_end ov96_02203CD4

	thumb_func_start ov96_02203CE4
ov96_02203CE4: ; 0x02203CE4
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, #0x70
	ldrb r0, [r0]
	cmp r0, #0
	beq _02203D4C
	add r0, r5, #0
	add r0, #0x71
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0x71
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0x71
	ldrb r0, [r0]
	mov r1, #0x1f
	lsr r3, r0, #0x1f
	lsl r2, r0, #0x1f
	sub r2, r2, r3
	ror r2, r1
	add r1, r3, r2
	lsl r1, r1, #3
	neg r4, r1
	cmp r0, #0xa
	blo _02203D26
	add r0, r5, #0
	mov r4, #0
	add r0, #0x70
	strb r4, [r0]
	add r0, r5, #0
	add r0, #0x71
	strb r4, [r0]
_02203D26:
	ldr r0, [r5, #8]
	mov r1, #4
	mov r2, #3
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	mov r1, #5
	mov r2, #3
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	mov r1, #6
	mov r2, #3
	add r3, r4, #0
	bl sub_0201F238
	pop {r3, r4, r5, pc}
_02203D4C:
	ldr r0, [r5, #8]
	mov r1, #4
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	mov r1, #5
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	mov r1, #6
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02203CE4

	thumb_func_start ov96_02203D74
ov96_02203D74: ; 0x02203D74
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r7, r0, #0
	add r5, sp, #0x18
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	mov r6, #0
	add r4, r7, #0
	str r5, [sp, #0x14]
_02203D86:
	ldr r0, [r4, #0x54]
	bl ov96_021EB594
	ldr r1, [r0]
	ldr r3, [sp, #0xc]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	strh r1, [r5]
	ldr r1, [r0, #4]
	ldr r2, [sp, #0x10]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	strh r0, [r5, #2]
	mov r0, #2
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [sp, #0x14]
	mov r1, #0
	str r0, [sp, #8]
	ldr r0, [r7, #4]
	bl ov96_021E634C
	add r6, r6, #1
	add r4, r4, #4
	add r5, r5, #4
	cmp r6, #3
	blt _02203D86
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203D74

	thumb_func_start ov96_02203DCC
ov96_02203DCC: ; 0x02203DCC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r0, #0
	mov r0, #0
	add r5, r1, #0
	str r0, [sp, #0xc]
	add r4, r6, #0
	add r7, sp, #0x10
_02203DDC:
	ldrb r0, [r5, #6]
	mov r3, #0
	str r0, [sp]
	ldrh r0, [r5, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	str r0, [sp, #8]
	ldrh r1, [r5]
	ldrb r2, [r5, #7]
	add r0, sp, #0x10
	bl sub_020701E4
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	ldrh r0, [r5]
	str r0, [sp, #8]
	ldrh r0, [r7]
	ldrh r1, [r7, #2]
	ldr r2, [r6]
	ldr r3, [r5, #0xc]
	bl sub_0201457C
	str r0, [r4, #0x24]
	ldrh r0, [r7]
	ldrh r1, [r7, #4]
	ldr r2, [r6]
	bl sub_02014450
	str r0, [r4, #0x28]
	ldr r0, [sp, #0xc]
	add r5, #0x10
	add r0, r0, #1
	add r4, #8
	str r0, [sp, #0xc]
	cmp r0, #3
	blt _02203DDC
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203DCC

	thumb_func_start ov96_02203E30
ov96_02203E30: ; 0x02203E30
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r7, r0, #0
	str r1, [sp, #4]
	str r2, [sp, #8]
	mov r4, #0
	mov r5, #2
	mov r6, #3
_02203E40:
	add r0, r7, #0
	add r1, r6, #0
	add r2, r5, #0
	mov r3, #0x65
	str r5, [sp]
	bl ov96_021EB408
	add r4, r4, #1
	cmp r4, #3
	blt _02203E40
	mov r0, #0x10
	ldr r6, [sp, #8]
	ldr r4, [sp, #4]
	mov r5, #0
	str r0, [sp, #0xc]
_02203E5E:
	add r0, r7, #0
	mov r1, #0x65
	mov r2, #2
	bl ov96_021EB4F4
	str r0, [r4, #0x54]
	mov r0, #0
	str r0, [sp, #0x18]
	ldr r0, [sp, #0xc]
	mov r2, #0
	lsl r0, r0, #0xc
	str r0, [sp, #0x10]
	ldr r0, [r6, #0xc]
	str r0, [sp]
	ldrh r3, [r6, #2]
	ldrh r0, [r6]
	ldrb r1, [r6, #7]
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	bl sub_020708D8
	mov r1, #0x5e
	lsl r1, r1, #2
	add r0, r0, r1
	lsl r0, r0, #0xc
	str r0, [sp, #0x14]
	ldr r0, [r4, #0x54]
	add r1, sp, #0x10
	bl ov96_021EB588
	ldr r0, [r4, #0x54]
	add r1, r5, #1
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r4, #0x54]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r1, #0x13
	ldr r0, [r4, #0x54]
	sub r1, r1, r5
	bl ov96_021EB630
	add r0, r7, #0
	mov r1, #0x65
	mov r2, #5
	bl ov96_021EB4F4
	str r0, [r4, #0x60]
	mov r1, #0
	bl ov96_021EB564
	mov r0, #1
	ldr r1, [sp, #0x14]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x14]
	ldr r0, [r4, #0x60]
	add r1, sp, #0x10
	bl ov96_021EB588
	ldr r0, [r4, #0x60]
	mov r1, #4
	bl ov96_021EB630
	ldr r0, [sp, #0xc]
	add r5, r5, #1
	add r0, #0x32
	add r6, #0x10
	add r4, r4, #4
	str r0, [sp, #0xc]
	cmp r5, #3
	blt _02203E5E
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	bl ov96_02203DCC
	ldr r1, [sp, #4]
	add r0, r7, #0
	bl ov96_02203F50
	ldr r0, [sp, #4]
	bl ov96_02203F0C
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02203E30

	thumb_func_start ov96_02203F0C
ov96_02203F0C: ; 0x02203F0C
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	mov r4, #0
_02203F12:
	lsl r0, r4, #3
	add r5, r6, r0
	mov r1, #0x32
	ldr r0, [r5, #0x24]
	lsl r1, r1, #6
	bl DC_FlushRange
	lsl r0, r4, #2
	add r7, r6, r0
	mov r2, #0x32
	ldr r0, [r5, #0x24]
	ldr r1, [r7, #0x3c]
	lsl r2, r2, #6
	bl sub_020CFECC
	ldr r0, [r5, #0x28]
	mov r1, #0x20
	bl DC_FlushRange
	ldr r0, [r5, #0x28]
	ldr r1, [r7, #0x48]
	mov r2, #0x20
	bl GXS_LoadOBJPltt
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02203F12
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203F0C

	thumb_func_start ov96_02203F50
ov96_02203F50: ; 0x02203F50
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0x65
	mov r2, #0
	add r5, r0, #0
	bl ov96_021EB5EC
	ldr r4, [r0]
	add r0, r5, #0
	mov r1, #0x65
	mov r2, #1
	bl ov96_021EB5EC
	ldr r5, [r0]
	add r0, r4, #0
	bl sub_0200AF00
	add r7, r0, #0
	add r0, r5, #0
	add r1, r7, #0
	bl sub_0200B0F8
	str r0, [sp]
	mov r4, #0
_02203F80:
	lsl r0, r4, #2
	add r5, r6, r0
	add r0, r7, #0
	mov r1, #2
	bl sub_020B802C
	mov r1, #0xd
	lsl r1, r1, #8
	add r2, r4, #0
	mul r2, r1
	mov r1, #3
	lsl r1, r1, #8
	add r1, r2, r1
	add r0, r1, r0
	str r0, [r5, #0x3c]
	ldr r0, [sp]
	mov r1, #2
	bl sub_020B8078
	lsl r1, r4, #5
	add r1, #0x20
	add r0, r1, r0
	str r0, [r5, #0x48]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02203F80
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02203F50

	thumb_func_start ov96_02203FBC
ov96_02203FBC: ; 0x02203FBC
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r4, #8]
	ldr r2, _02203FF8 ; =0x0221CA28
	add r1, #0xc
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4, #8]
	mov r1, #4
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	add r4, #0xc
	add r0, r4, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	add sp, #4
	pop {r3, r4, pc}
	nop
_02203FF8: .word 0x0221CA28
	thumb_func_end ov96_02203FBC

	thumb_func_start ov96_02203FFC
ov96_02203FFC: ; 0x02203FFC
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5, #4]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [r5, #4]
	bl ov96_021E5F34
	ldr r1, [r5]
	bl sub_02028F68
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02204048 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0xc
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r5, #0xc
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	nop
_02204048: .word 0x000F0E00
	thumb_func_end ov96_02203FFC

	thumb_func_start ov96_0220404C
ov96_0220404C: ; 0x0220404C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r6, r1, #0
	add r5, r2, #0
	add r4, r3, #0
	bl _itof
	str r0, [sp, #0x10]
	add r0, r6, #0
	bl _itof
	add r6, r0, #0
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _02204104 ; =0x40140000
	mov r0, #0
	bl _dmul
	ldr r3, _02204108 ; =0x404A0000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _0220410C ; =0x9D89D89E
	ldr r1, _02204110 ; =0x403689D8
	bl _dadd
	bl _d2f
	add r7, r0, #0
	ldr r0, [sp, #0x10]
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02204114 ; =0xCCCCCCCD
	ldr r1, _02204118 ; =0x3FC8CCCC
	bl _dmul
	str r0, [sp, #0x14]
	add r0, r6, #0
	str r1, [sp, #4]
	bl _f2d
	ldr r3, _0220411C ; =0x40200000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #4]
	bl _dadd
	ldr r3, _02204120 ; =0x402F0000
	mov r2, #0
	bl _dsub
	ldr r3, _02204124 ; =0x40240000
	mov r2, #0
	bl _dsub
	str r0, [sp, #0x18]
	add r0, r6, #0
	str r1, [sp, #0xc]
	bl _f2d
	ldr r3, _02204128 ; =0x40800000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _0220412C ; =0xF4DE9BD3
	ldr r1, _02204130 ; =0x3FD937A6
	bl _dadd
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0xc]
	bl _ddiv
	bl _d2f
	str r7, [r4]
	str r0, [r5]
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02204104: .word 0x40140000
_02204108: .word 0x404A0000
_0220410C: .word 0x9D89D89E
_02204110: .word 0x403689D8
_02204114: .word 0xCCCCCCCD
_02204118: .word 0x3FC8CCCC
_0220411C: .word 0x40200000
_02204120: .word 0x402F0000
_02204124: .word 0x40240000
_02204128: .word 0x40800000
_0220412C: .word 0xF4DE9BD3
_02204130: .word 0x3FD937A6
	thumb_func_end ov96_0220404C

	thumb_func_start ov96_02204134
ov96_02204134: ; 0x02204134
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	str r2, [sp]
	add r6, r3, #0
	bl _f2d
	ldr r3, _022042E8 ; =0x404C8000
	mov r2, #0
	bl _dsub
	str r0, [sp, #0x1c]
	add r0, r4, #0
	add r7, r1, #0
	bl _f2d
	ldr r3, _022042E8 ; =0x404C8000
	mov r2, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x1c]
	add r1, r7, #0
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042EC ; =0x3FF00000
	mov r0, #0
	bl _dadd
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042F0 ; =0x40100000
	mov r0, #0
	bl _ddiv
	str r0, [sp, #0x20]
	str r1, [sp, #0x18]
	add r0, r4, #0
	add r1, r4, #0
	bl _fmul
	add r1, r0, #0
	add r0, r4, #0
	bl _fmul
	bl _f2d
	ldr r3, _022042F4 ; =0x40BDB000
	mov r2, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042F8 ; =0x40260000
	mov r0, #0
	bl _dadd
	str r0, [sp, #0x24]
	str r1, [sp, #0x10]
	add r0, r4, #0
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042FC ; =0x40380000
	mov r0, #0
	bl _dsub
	str r0, [sp, #0x28]
	add r0, r4, #0
	str r1, [sp, #8]
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042FC ; =0x40380000
	mov r0, #0
	bl _dsub
	str r0, [sp, #0x2c]
	add r0, r4, #0
	add r7, r1, #0
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _022042FC ; =0x40380000
	mov r0, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x2c]
	add r1, r7, #0
	bl _dmul
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x28]
	ldr r1, [sp, #8]
	bl _dmul
	ldr r3, _02204300 ; =0x40B13000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x24]
	ldr r1, [sp, #0x10]
	bl _dsub
	ldr r3, _022042EC ; =0x3FF00000
	mov r2, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x20]
	ldr r1, [sp, #0x18]
	bl _dadd
	bl _d2f
	bl _f2d
	ldr r3, _02204304 ; =0x40200000
	mov r2, #0
	bl _dmul
	bl _d2f
	add r4, r0, #0
	bl _ftoi
	str r0, [r6]
	add r0, r5, #0
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02204308 ; =0x590B2164
	ldr r1, _0220430C ; =0x3FD642C8
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _02204310 ; =0x40240000
	mov r0, #0
	bl _dadd
	str r0, [sp, #0x30]
	add r0, r4, #0
	add r7, r1, #0
	bl _f2d
	ldr r3, _02204304 ; =0x40200000
	mov r2, #0
	bl _ddiv
	ldr r3, _02204310 ; =0x40240000
	mov r2, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02204314 ; =0x4A5294A5
	ldr r1, _02204318 ; =0x3FE4A529
	bl _dmul
	add r6, r0, #0
	add r0, r5, #0
	add r4, r1, #0
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0220431C ; =0x40500000
	mov r0, #0
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	add r0, r6, #0
	add r1, r4, #0
	bl _dmul
	ldr r3, _0220431C ; =0x40500000
	mov r2, #0
	bl _ddiv
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x30]
	add r1, r7, #0
	bl _dsub
	bl _d2f
	bl _f2d
	ldr r3, _02204304 ; =0x40200000
	mov r2, #0
	bl _dmul
	bl _d2f
	bl _ftoi
	ldr r1, [sp]
	str r0, [r1]
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022042E8: .word 0x404C8000
_022042EC: .word 0x3FF00000
_022042F0: .word 0x40100000
_022042F4: .word 0x40BDB000
_022042F8: .word 0x40260000
_022042FC: .word 0x40380000
_02204300: .word 0x40B13000
_02204304: .word 0x40200000
_02204308: .word 0x590B2164
_0220430C: .word 0x3FD642C8
_02204310: .word 0x40240000
_02204314: .word 0x4A5294A5
_02204318: .word 0x3FE4A529
_0220431C: .word 0x40500000
	thumb_func_end ov96_02204134

	thumb_func_start ov96_02204320
ov96_02204320: ; 0x02204320
	push {r3, r4, r5, lr}
	sub sp, #0x30
	add r5, r0, #0
	add r4, r1, #0
	bl LCRandom
	lsl r1, r5, #1
	bl _s32_div_f
	sub r1, r5, r1
	mov r0, #0xb6
	mul r0, r1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	asr r0, r0, #4
	lsl r2, r0, #1
	lsl r1, r2, #1
	ldr r3, _02204360 ; =0x021094DC
	add r2, r2, #1
	lsl r2, r2, #1
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	add r0, sp, #0
	bl MTX_RotY43_
	add r0, r4, #0
	add r1, sp, #0
	add r2, r4, #0
	bl MTX_MultVec43
	add sp, #0x30
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02204360: .word 0x021094DC
	thumb_func_end ov96_02204320

	thumb_func_start ov96_02204364
ov96_02204364: ; 0x02204364
	push {r3, r4, r5, lr}
	add r5, r1, #0
	mov r1, #0xcc
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0xcc
	bl MIi_CpuFill8
	add r0, r4, #0
	add r0, #0xc4
	strb r5, [r0]
	mov r0, #4
	sub r1, r0, r5
	add r0, r4, #0
	add r0, #0xc9
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xc9
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0xc8
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #0x28
	add r0, #0xc7
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xc7
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0xc6
	strb r1, [r0]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02204364

	thumb_func_start ov96_022043AC
ov96_022043AC: ; 0x022043AC
	lsl r1, r1, #2
	str r2, [r0, r1]
	add r0, r0, r1
	str r3, [r0, #0x30]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_022043AC

	thumb_func_start ov96_022043B8
ov96_022043B8: ; 0x022043B8
	ldr r3, _022043BC ; =FreeToHeap
	bx r3
	.balign 4, 0
_022043BC: .word FreeToHeap
	thumb_func_end ov96_022043B8

	thumb_func_start ov96_022043C0
ov96_022043C0: ; 0x022043C0
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r0, #0xc9
	ldrb r0, [r0]
	add r7, r1, #0
	mov r4, #0xc
	cmp r0, #4
	bne _022043D4
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_022043D4:
	add r0, r5, #0
	add r0, #0xc6
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0xc6
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xc6
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xc7
	ldrb r0, [r0]
	cmp r1, r0
	blo _02204402
	add r0, r5, #0
	mov r1, #1
	add r0, #0xc0
	str r1, [r0]
	add r0, r5, #0
	mov r1, #0
	add r0, #0xc6
	strb r1, [r0]
_02204402:
	add r0, r5, #0
	add r0, #0xc0
	ldr r0, [r0]
	cmp r0, #0
	beq _0220449A
	add r0, r5, #0
	add r1, r5, #0
	add r0, #0xc8
	add r1, #0xc5
	ldrb r0, [r0]
	ldrb r1, [r1]
	add r6, r0, r1
	add r1, r5, #0
	add r1, #0xca
	ldrb r2, [r1]
	lsl r1, r6, #1
	add r1, r6, r1
	add r4, r2, r1
	cmp r4, r0
	bge _0220442E
	bl GF_AssertFail
_0220442E:
	lsl r0, r4, #2
	add r1, r5, r0
	ldr r1, [r1, #0x30]
	ldr r1, [r1, #0xc]
	cmp r1, #0
	beq _0220443E
	cmp r1, #2
	bne _02204456
_0220443E:
	ldr r0, [r5, r0]
	ldrb r0, [r0, #0x19]
	cmp r0, #1
	beq _02204456
	lsl r1, r6, #0x18
	lsl r2, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	add r3, r7, #0
	bl ov96_022044A0
_02204456:
	lsl r0, r4, #0x18
	lsr r4, r0, #0x18
	add r0, r5, #0
	add r0, #0xc5
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0xc5
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xc5
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xc4
	ldrb r0, [r0]
	cmp r1, r0
	blo _0220449A
	add r0, r5, #0
	mov r1, #0
	add r0, #0xc5
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xca
	ldrb r0, [r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	add r0, r5, #0
	add r0, #0xca
	strb r1, [r0]
	mov r0, #0
	add r5, #0xc0
	str r0, [r5]
_0220449A:
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022043C0

	thumb_func_start ov96_022044A0
ov96_022044A0: ; 0x022044A0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x94
	str r1, [sp]
	str r2, [sp, #4]
	add r7, r0, #0
	ldr r0, [sp, #4]
	str r3, [sp, #8]
	lsl r0, r0, #2
	str r0, [sp, #0x14]
	bl LCRandom
	mov r1, #0x33
	bl _s32_div_f
	ldr r0, [sp, #0x14]
	ldr r2, [r7, r0]
	mov r0, #0x16
	ldrsh r0, [r2, r0]
	add r0, r0, r1
	cmp r0, #0x78
	bgt _02204564
	ldr r0, [sp, #0x14]
	add r0, r7, r0
	ldr r0, [r0, #0x30]
	add r1, r0, #0
	add r1, #0x44
	ldrh r1, [r1]
	cmp r1, #4
	bhs _02204564
	ldr r1, [r0, #0xc]
	cmp r1, #0
	bne _0220450C
	ldr r1, [sp, #4]
	add r7, #0x30
	lsl r2, r1, #2
	mov r1, #1
	add r0, #0x44
	strh r1, [r0]
	ldr r0, [r7, r2]
	mov r1, #2
	str r1, [r0, #0xc]
	ldr r0, [sp, #4]
	mov r1, #0xc
	mul r1, r0
	ldr r0, _02204718 ; =0x0221CA30
	ldr r2, [r7, r2]
	add r3, r0, r1
	ldmia r3!, {r0, r1}
	add r2, #0x10
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add sp, #0x94
	str r0, [r2]
	pop {r4, r5, r6, r7, pc}
_0220450C:
	cmp r1, #2
	beq _02204514
	bl GF_AssertFail
_02204514:
	ldr r0, [sp, #0x14]
	add r7, #0x30
	ldr r1, [r7, r0]
	add r0, r1, #0
	add r0, #0x44
	ldrh r0, [r0]
	add r1, #0x44
	add r0, r0, #1
	strh r0, [r1]
	ldr r0, [sp, #0x14]
	ldr r1, [r7, r0]
	add r0, r1, #0
	add r0, #0x44
	ldrh r0, [r0]
	cmp r0, #1
	bhi _0220453E
	mov r0, #0
	add r1, #0x46
	strh r0, [r1]
	add sp, #0x94
	pop {r4, r5, r6, r7, pc}
_0220453E:
	cmp r0, #2
	bhi _0220454C
	mov r0, #1
	add r1, #0x46
	strh r0, [r1]
	add sp, #0x94
	pop {r4, r5, r6, r7, pc}
_0220454C:
	cmp r0, #3
	bhi _0220455A
	mov r0, #2
	add r1, #0x46
	strh r0, [r1]
	add sp, #0x94
	pop {r4, r5, r6, r7, pc}
_0220455A:
	mov r0, #3
	add r1, #0x46
	strh r0, [r1]
	add sp, #0x94
	pop {r4, r5, r6, r7, pc}
_02204564:
	mov r6, #0
	add r4, r7, #0
	add r5, r7, #0
_0220456A:
	ldr r0, [r4]
	str r0, [r5, #0x60]
	add r0, r5, #0
	add r0, #0x64
	strh r6, [r0]
	bl LCRandom
	str r0, [sp, #0x18]
	ldr r0, [r4]
	mov r1, #0x14
	ldrh r0, [r0, #0x14]
	bl _s32_div_f
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	mov r1, #0x15
	bl _s32_div_f
	ldr r0, [sp, #0x1c]
	add r1, r0, r1
	add r0, r5, #0
	add r0, #0x66
	strh r1, [r0]
	ldr r0, [r4]
	ldrb r0, [r0, #0x19]
	cmp r0, #1
	bne _022045AE
	add r0, r5, #0
	add r0, #0x66
	ldrh r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0x66
	strh r1, [r0]
_022045AE:
	ldr r1, [r4]
	mov r0, #0x16
	ldrsh r1, [r1, r0]
	mov r0, #0x78
	sub r0, r0, r1
	mov r1, #0x14
	bl _s32_div_f
	add r1, r5, #0
	add r1, #0x66
	ldrh r1, [r1]
	add r6, r6, #1
	add r4, r4, #4
	add r1, r1, r0
	add r0, r5, #0
	add r0, #0x66
	add r5, #8
	strh r1, [r0]
	cmp r6, #0xc
	blt _0220456A
	add r0, r7, #0
	mov r2, #0
	add r0, #0x60
	add r1, sp, #0x64
_022045DE:
	add r2, r2, #1
	stmia r1!, {r0}
	add r0, #8
	cmp r2, #0xc
	blt _022045DE
	ldr r0, [sp]
	add r1, sp, #0x64
	add r2, sp, #0x40
	bl ov96_0220472C
	add r4, r0, #0
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r2, r1, #0x18
	add r1, sp, #0x28
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r1, [sp, #4]
	lsr r2, r2, #0x16
	add r4, r1, #0
	add r1, sp, #0x40
	ldr r1, [r1, r2]
	mov r3, #0xc
	ldrh r1, [r1, #4]
	ldr r0, _02204718 ; =0x0221CA30
	mul r4, r3
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r2, r1, #0
	add r4, r0, r4
	mul r2, r3
	add r0, r0, r2
	add r1, r4, #0
	add r2, sp, #0x34
	bl VEC_Subtract
	add r0, sp, #0x34
	add r1, r0, #0
	bl VEC_Normalize
	mov r0, #3
	add r1, sp, #0x34
	bl ov96_02204320
	ldr r0, [sp, #4]
	add r1, sp, #0x34
	lsl r5, r0, #2
	ldr r0, [r7, r5]
	ldr r0, [r0, #0x10]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl ov96_02204320
	bl LCRandom
	add r6, r0, #0
	ldr r0, [sp, #8]
	bl _itof
	bl _f2d
	ldr r3, _0220471C ; =0x40440000
	mov r2, #0
	bl _ddiv
	str r1, [sp, #0x10]
	str r0, [sp, #0x20]
	ldr r1, [r7, r5]
	mov r0, #0x16
	ldrsh r0, [r1, r0]
	bl _itof
	bl _f2d
	ldr r3, _02204720 ; =0x40490000
	mov r2, #0
	bl _ddiv
	str r0, [sp, #0x24]
	add r5, r1, #0
	add r0, r6, #0
	mov r1, #0x33
	bl _s32_div_f
	add r0, r1, #0
	bl _itof
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x24]
	add r1, r5, #0
	bl _dadd
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x20]
	ldr r1, [sp, #0x10]
	bl _dadd
	bl _d2f
	add r5, r0, #0
	bl _f2d
	mov r3, #1
	mov r2, #0
	lsl r3, r3, #0x1e
	bl _dgr
	bls _022046CE
	mov r5, #1
	lsl r5, r5, #0x1e
	b _022046E2
_022046CE:
	add r0, r5, #0
	bl _f2d
	ldr r3, _02204724 ; =0x3FF00000
	mov r2, #0
	bl _dls
	bhs _022046E2
	mov r5, #0xfe
	lsl r5, r5, #0x16
_022046E2:
	ldr r0, _02204728 ; =0x45800000
	add r1, r5, #0
	add r7, #0x30
	bl _fmul
	bl _ftoi
	ldr r3, [sp, #0x14]
	add r1, sp, #0x34
	ldr r3, [r7, r3]
	add r2, sp, #0x28
	add r3, #0x1c
	bl VEC_MultAdd
	ldr r0, [sp, #0x14]
	mov r1, #1
	ldr r0, [r7, r0]
	str r1, [r0, #0xc]
	ldr r0, [sp, #0x14]
	ldr r2, [r7, r0]
	ldmia r4!, {r0, r1}
	add r2, #0x10
	stmia r2!, {r0, r1}
	ldr r0, [r4]
	str r0, [r2]
	add sp, #0x94
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02204718: .word 0x0221CA30
_0220471C: .word 0x40440000
_02204720: .word 0x40490000
_02204724: .word 0x3FF00000
_02204728: .word 0x45800000
	thumb_func_end ov96_022044A0

	thumb_func_start ov96_0220472C
ov96_0220472C: ; 0x0220472C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x84
	str r0, [sp]
	add r0, sp, #0x18
	str r0, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r0, #0
	str r0, [sp, #8]
	str r0, [sp, #0x14]
	ldr r4, [sp, #8]
	str r1, [sp, #4]
	add r7, r2, #0
	add r5, r4, #0
_02204746:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	ldr r1, [sp]
	cmp r0, r1
	beq _022047A4
	add r1, r4, #1
	mov r0, #0xc
	mul r0, r1
	add r3, sp, #0xc
	ldr r1, [sp, #4]
	lsl r6, r5, #2
	ldr r1, [r1, r6]
	add r2, r3, r0
	str r1, [r2, #8]
	mov r1, #0
	str r1, [r2, #4]
	str r1, [r3, r0]
	cmp r4, #0
	bls _02204796
	ldr r0, [r2, #8]
	ldrh r0, [r0, #6]
_02204774:
	ldr r3, [r3, #4]
	ldr r6, [r3, #8]
	ldrh r6, [r6, #6]
	cmp r6, r0
	bhs _0220478C
	ldr r0, [r3]
	str r2, [r0, #4]
	ldr r0, [r3]
	str r0, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _02204796
_0220478C:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r4
	blo _02204774
_02204796:
	cmp r1, r4
	bne _0220479E
	str r2, [r3, #4]
	str r3, [r2]
_0220479E:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_022047A4:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _02204746
	ldr r0, [sp, #0x10]
	mov r2, #0
	ldr r0, [r0, #8]
	ldrh r1, [r0, #6]
	add r0, sp, #0xc
_022047B8:
	ldr r0, [r0, #4]
	lsl r4, r2, #2
	ldr r3, [r0, #8]
	str r3, [r7, r4]
	ldr r3, [r7, r4]
	ldrh r3, [r3, #6]
	cmp r1, r3
	bne _022047D2
	ldr r3, [sp, #8]
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	str r3, [sp, #8]
_022047D2:
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	cmp r2, #9
	blo _022047B8
	ldr r0, [sp, #8]
	cmp r0, #0
	bne _022047E6
	bl GF_AssertFail
_022047E6:
	ldr r0, [sp, #8]
	add sp, #0x84
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220472C

	thumb_func_start ov96_022047EC
ov96_022047EC: ; 0x022047EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x24
	add r4, r0, #0
	bl ov96_021E5DC4
	str r0, [sp, #0x38]
	add r0, r4, #0
	bl ov96_021E5DD4
	cmp r0, #6
	bls _02204806
	b _02204DD2
_02204806:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02204812: ; jump table
	.short _02204820 - _02204812 - 2 ; case 0
	.short _022048F8 - _02204812 - 2 ; case 1
	.short _0220494E - _02204812 - 2 ; case 2
	.short _02204A34 - _02204812 - 2 ; case 3
	.short _02204B2C - _02204812 - 2 ; case 4
	.short _02204DA6 - _02204812 - 2 ; case 5
	.short _02204DCA - _02204812 - 2 ; case 6
_02204820:
	mov r2, #0x1a
	mov r0, #0x5c
	mov r1, #0x8b
	lsl r2, r2, #0xe
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _02204B18 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _02204B1C ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_02204F20
	mov r1, #0x1b
	add r0, r4, #0
	lsl r1, r1, #6
	bl ov96_021E5D94
	mov r2, #0x1b
	mov r1, #0
	lsl r2, r2, #6
	add r5, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8b
	bl sub_0201AC88
	mov r2, #0xdd
	lsl r2, r2, #2
	add r1, r5, r2
	add r2, r2, #4
	str r0, [r5]
	add r0, r4, #0
	add r2, r5, r2
	mov r3, #4
	bl ov96_021E5F70
	add r0, r4, #0
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0xca
	str r0, [sp, #0xa8]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0xac]
	lsr r0, r0, #4
	mov r2, #0x8b
	str r0, [sp, #0xb0]
	str r2, [sp, #0xb4]
	mov r0, #0x10
	str r0, [sp]
	ldr r3, _02204B20 ; =0x00300010
	add r0, sp, #0xa8
	mov r1, #0x16
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #0
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x8b
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x8b
	str r1, [r5, #0x14]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r5]
	bl ov96_02204F40
	add r0, r5, #0
	bl ov96_02207740
	ldr r0, _02204B24 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
_022048F8:
	ldr r0, [sp, #0x38]
	ldr r1, [sp, #0x38]
	ldr r0, [r0, #0x14]
	ldr r1, [r1]
	add r2, r4, #0
	bl ov96_02207CCC
	mov r2, #0x37
	ldr r1, [sp, #0x38]
	lsl r2, r2, #4
	str r0, [r1, r2]
	add r0, r4, #0
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E5EE8
	add r2, r0, #0
	ldr r0, [sp, #0x38]
	mov r1, #4
	ldr r0, [r0, #0x14]
	sub r1, r1, r5
	bl ov96_02208AA8
	mov r1, #0xdb
	ldr r2, [sp, #0x38]
	lsl r1, r1, #2
	str r0, [r2, r1]
	add r0, r2, #0
	ldr r0, [r0, #0x14]
	sub r1, #0xad
	mov r2, #1
	bl ov96_021E9A78
	mov r2, #0xd1
	ldr r1, [sp, #0x38]
	lsl r2, r2, #2
	str r0, [r1, r2]
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
_0220494E:
	ldr r5, _02204B28 ; =0x0221CAD4
	add r3, sp, #0x9c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [sp, #0x38]
	ldr r0, [r0, #0x14]
	bl ov96_021EB180
	ldr r1, [sp, #0x38]
	str r0, [r1, #0x20]
	mov r0, #0xaf
	lsl r0, r0, #0xe
	str r0, [sp]
	add r0, r1, #0
	mov r1, #0
	ldr r0, [r0, #0x20]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [sp, #0x38]
	ldr r0, [r0, #0x20]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r0, [sp, #0x38]
	mov r5, #0xd1
	ldr r3, [sp, #0x38]
	lsl r5, r5, #2
	ldr r0, [r0, #0x14]
	ldr r3, [r3, r5]
	mov r1, #0xc
	mov r2, #2
	bl ov96_021EA854
	ldr r1, [sp, #0x38]
	add r2, r5, #4
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, #0x20]
	mov r1, #0
	mov r2, #0x65
	bl ov96_021EB29C
	ldr r0, [sp, #0x38]
	mov r1, #1
	ldr r0, [r0, #0x20]
	mov r2, #0x66
	bl ov96_021EB29C
	ldr r0, [sp, #0x38]
	mov r1, #2
	ldr r0, [r0, #0x20]
	mov r2, #0x67
	bl ov96_021EB29C
	ldr r0, [sp, #0x38]
	mov r1, #3
	ldr r0, [r0, #0x20]
	mov r2, #0x68
	bl ov96_021EB29C
	add r1, r5, #0
	ldr r0, [sp, #0x38]
	add r1, #0x2c
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x38]
	ldr r1, [r1, #0x20]
	bl ov96_02207E7C
	ldr r0, [sp, #0x38]
	ldr r0, [r0, #0x20]
	bl ov96_022050B4
	ldr r0, [sp, #0x38]
	ldr r0, [r0, #0x20]
	bl ov96_021EB3A4
	ldr r2, [sp, #0x38]
	add r3, r5, #0
	ldr r2, [r2, r3]
	ldr r3, [sp, #0x38]
	add r0, r4, #0
	ldr r3, [r3, #0x20]
	mov r1, #0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	ldr r0, [sp, #0x38]
	add r1, r0, #0
	ldr r1, [r1, #0x20]
	bl ov96_022050F8
	add r3, r5, #0
	ldr r1, [sp, #0x38]
	ldr r0, [sp, #0x38]
	add r3, #0x2c
	ldr r0, [r0, r3]
	ldr r2, [sp, #0x38]
	sub r3, #0x2c
	ldr r1, [r1, #0x20]
	ldr r2, [r2, r3]
	bl ov96_02207F18
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
_02204A34:
	add r0, sp, #0x11c
	mov r7, #0
	add r5, sp, #0x160
	str r0, [sp, #0x24]
	add r6, sp, #0x6c
_02204A3E:
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x18]
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x3c]
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x18]
	add r0, r4, #0
	add r3, r5, #0
	bl ov96_021E6168
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x18]
	add r0, r4, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	ldr r1, [sp, #0x24]
	add r7, r7, #1
	str r0, [r1, #0x14]
	ldrh r0, [r5]
	strh r0, [r6]
	ldrh r0, [r5, #2]
	add r5, #0x10
	strh r0, [r6, #2]
	add r0, r1, #0
	add r0, r0, #4
	add r6, r6, #4
	str r0, [sp, #0x24]
	cmp r7, #0xc
	blt _02204A3E
	mov r1, #0x37
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, sp, #0x6c
	bl ov96_022080F4
	add r0, r4, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	mov r1, #0x37
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	lsl r1, r3, #1
	add r1, r3, r1
	add r2, sp, #0x160
	lsl r1, r1, #4
	add r1, r2, r1
	bl ov96_02208250
	mov r1, #0x37
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #0
	mov r2, #1
	bl ov96_022082BC
	mov r1, #0x37
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	mov r1, #1
	mov r2, #2
	bl ov96_022082BC
	mov r1, #0
	mov r0, #2
	str r0, [sp, #0x120]
	mov r0, #1
	str r1, [sp, #0x11c]
	str r1, [sp, #0x124]
	str r0, [sp, #0x128]
	str r0, [sp, #0x12c]
	str r1, [sp]
	str r1, [sp, #4]
	mov r1, #0xd2
	ldr r0, [sp, #0x38]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	mov r1, #0xc
	add r2, sp, #0x160
	add r3, sp, #0x11c
	bl ov96_021EA8A8
	add r0, r4, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r2, #0x37
	ldr r0, [sp, #0x38]
	lsl r2, r2, #4
	ldr r0, [r0, r2]
	bl ov96_02208784
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
	.balign 4, 0
_02204B18: .word 0xFFFFE0FF
_02204B1C: .word 0x04001000
_02204B20: .word 0x00300010
_02204B24: .word gMain + 0x60
_02204B28: .word 0x0221CAD4
_02204B2C:
	mov r1, #0xd2
	ldr r0, [sp, #0x38]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl ov96_021EAA00
	cmp r0, #0
	bne _02204B3E
	b _02204DD2
_02204B3E:
	add r0, r4, #0
	bl ov96_021E5F24
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x38]
	ldr r0, [r0]
	bl ov96_021E6030
	add r0, r4, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, sp, #0x54
	mov r1, #0xaa
	mov r2, #0xe
	bl ReadWholeNarcMemberByIdPair
	ldr r0, [sp, #0x38]
	mov r5, #0
	str r0, [sp, #0x44]
	add r0, #0x24
	str r0, [sp, #0x44]
_02204B6A:
	mov r0, #0xd2
	ldr r1, [sp, #0x38]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x14]
	cmp r1, #0
	bne _02204B92
	add r0, r6, #0
	mov r1, #1
	bl ov96_021EAB38
_02204B92:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	add r0, r4, #0
	add r1, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x54
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r6, #0
	bl ov96_021EAF70
	mov r0, #0xd2
	ldr r1, [sp, #0x38]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r6, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0xb8
	str r0, [sp, #0x40]
	mul r1, r0
	ldr r0, [sp, #0x44]
	add r7, r0, r1
	ldr r0, [sp, #0x14]
	add r1, r7, #0
	lsl r0, r0, #2
	str r6, [r7, r0]
	ldr r0, [sp, #0x40]
	add r1, #0xb0
	lsl r0, r0, #5
	str r0, [sp, #0x20]
	mov r0, #1
	strb r0, [r1]
	add r0, r6, #0
	mov r1, #1
	bl ov96_021EAC0C
	ldr r0, [sp, #0x20]
	mov r2, #0x60
	str r0, [sp, #0x1c]
	add r0, #0x80
	str r0, [sp, #0x1c]
	ldr r1, [sp, #0x1c]
	add r0, r6, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r6, #0
	bl ov96_021EAF6C
	ldr r0, [sp, #0x20]
	ldr r1, _02204DDC ; =0x00000BB8
	add r0, #0xd0
	str r0, [sp, #0x20]
	lsl r0, r0, #0xc
	str r0, [r7, #0x58]
	mov r0, #0x1a
	lsl r0, r0, #0x10
	str r0, [r7, #0x5c]
	add r0, r6, #0
	bl ov96_021EABDC
	ldr r1, [sp, #0x40]
	ldr r0, [sp, #0x34]
	cmp r1, r0
	bne _02204C66
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bne _02204C66
	add r0, sp, #0x48
	str r0, [sp]
	ldr r1, [sp, #0x1c]
	add r0, r6, #0
	mov r2, #0x60
	add r3, sp, #0x4c
	bl ov96_021EB0A4
	mov r1, #0x80
	add r0, sp, #0x48
	strh r1, [r0, #8]
	ldr r1, [sp, #0x48]
	strh r1, [r0, #0xa]
_02204C66:
	add r5, r5, #1
	cmp r5, #0xc
	bge _02204C6E
	b _02204B6A
_02204C6E:
	add r0, sp, #0xb8
	mov r1, #0xaa
	mov r2, #4
	bl ReadWholeNarcMemberByIdPair
	ldr r1, _02204DE0 ; =0x00000708
	ldr r2, _02204DE4 ; =0x0000050C
	ldr r0, [sp, #0x38]
	strh r1, [r0, r2]
	mov r1, #0x37
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x38]
	ldrh r1, [r1, r2]
	bl ov96_02208740
	ldr r0, [sp, #0x38]
	bl ov96_022077F4
	mov r0, #0
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x38]
	add r6, r0, #0
	str r0, [sp, #0x2c]
	add r6, #0x24
	str r0, [sp, #0x28]
_02204CA2:
	mov r0, #0xcd
	mov r2, #0
	ldr r1, [sp, #0x2c]
	lsl r0, r0, #2
	str r2, [r1, r0]
	ldr r0, [sp, #0x30]
	add r5, r2, #0
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
_02204CB4:
	lsl r3, r5, #0x18
	add r0, r4, #0
	add r1, sp, #0xb8
	add r2, r7, #0
	lsr r3, r3, #0x18
	str r6, [sp]
	bl ov96_02206E88
	add r5, r5, #1
	cmp r5, #3
	blt _02204CB4
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02204CE8
	mov r0, #0xdb
	ldr r1, [sp, #0x38]
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r1, [sp, #0x30]
	add r2, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02208AE8
_02204CE8:
	ldr r1, [sp, #0x28]
	ldr r0, [sp, #0x30]
	add r1, #0xbc
	str r0, [r1]
	ldr r0, [sp, #0x2c]
	add r6, #0xb8
	add r0, r0, #4
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x28]
	add r0, #0xb8
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x30]
	add r0, r0, #1
	str r0, [sp, #0x30]
	cmp r0, #4
	blt _02204CA2
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02204D26
	add r0, r4, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x38]
	bl ov96_02205AFC
_02204D26:
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	add r0, sp, #0x50
	mov r3, #0xd1
	str r0, [sp, #8]
	ldr r2, [sp, #0x38]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	ldr r3, [sp, #0x38]
	add r0, r4, #0
	ldr r3, [r3, #0x20]
	mov r1, #0
	bl ov96_021E634C
	ldr r0, [sp, #0x38]
	bl ov96_02205048
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	ldr r2, [sp, #0x38]
	ldr r0, [sp, #0x34]
	mov r1, #0xb8
	add r2, #0x24
	mul r1, r0
	add r3, r2, r1
	ldr r1, [r3, #0x5c]
	ldr r3, [r3, #0x58]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r6, r3, #0xb
	asr r5, r0, #0xc
	ldr r0, [sp, #0x38]
	lsr r6, r6, #0x14
	add r6, r3, r6
	mov r1, #0
	asr r3, r6, #0xc
	ldr r0, [r0]
	add r2, r1, #0
	sub r3, #0x80
	bl sub_0201F238
	ldr r0, [sp, #0x38]
	sub r5, #0x60
	ldr r0, [r0]
	mov r1, #0
	mov r2, #3
	add r3, r5, #0
	bl sub_0201F238
	mov r0, #1
	bl sub_0203A994
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
_02204DA6:
	add r0, r4, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02204DC2
	bl LCRandom
	mov r1, #0x14
	bl _s32_div_f
	mov r2, #0xdd
	ldr r0, [sp, #0x38]
	lsl r2, r2, #2
	str r1, [r0, r2]
_02204DC2:
	add r0, r4, #0
	bl ov96_021E5DEC
	b _02204DD2
_02204DCA:
	add sp, #0x1fc
	add sp, #0x24
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02204DD2:
	mov r0, #0
	add sp, #0x1fc
	add sp, #0x24
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02204DDC: .word 0x00000BB8
_02204DE0: .word 0x00000708
_02204DE4: .word 0x0000050C
	thumb_func_end ov96_022047EC

	thumb_func_start ov96_02204DE8
ov96_02204DE8: ; 0x02204DE8
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0x20]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_02204DE8

	thumb_func_start ov96_02204DF8
ov96_02204DF8: ; 0x02204DF8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_02204E0C:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r0, #0x49
	lsl r0, r0, #2
	str r0, [sp, #8]
	add r0, r5, #0
	add r1, r6, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _02204E0C
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #1
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02204DF8

	thumb_func_start ov96_02204E58
ov96_02204E58: ; 0x02204E58
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5F8C
	ldr r0, [r4, #0x18]
	bl FreeToHeap
	ldr r0, [r4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4]
	mov r1, #6
	bl sub_0201BB4C
	add r0, r4, #4
	bl RemoveWindow
	ldr r0, [r4]
	bl FreeToHeap
	ldr r0, [r4, #0x20]
	bl ov96_021EB21C
	mov r0, #0xd2
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EA894
	mov r0, #0xd1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	mov r0, #0xdb
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_02208B2C
	mov r0, #0x37
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02207D64
	mov r0, #4
	bl sub_02002DB4
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _02204F18 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _02204F1C ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x8b
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	nop
_02204F18: .word gMain + 0x60
_02204F1C: .word 0x04000050
	thumb_func_end ov96_02204E58

	thumb_func_start ov96_02204F20
ov96_02204F20: ; 0x02204F20
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _02204F3C ; =0x0221CB9C
	add r3, sp, #0
	mov r2, #5
_02204F2A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02204F2A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_02204F3C: .word 0x0221CB9C
	thumb_func_end ov96_02204F20

	thumb_func_start ov96_02204F40
ov96_02204F40: ; 0x02204F40
	push {r4, r5, lr}
	sub sp, #0x9c
	ldr r5, _02205030 ; =0x0221CAF0
	add r3, sp, #0x8c
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _02205034 ; =0x0221CB64
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _02205038 ; =0x0221CB80
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _0220503C ; =0x0221CB10
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _02205040 ; =0x0221CB2C
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _02205044 ; =0x0221CB48
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0x9c
	pop {r4, r5, pc}
	nop
_02205030: .word 0x0221CAF0
_02205034: .word 0x0221CB64
_02205038: .word 0x0221CB80
_0220503C: .word 0x0221CB10
_02205040: .word 0x0221CB2C
_02205044: .word 0x0221CB48
	thumb_func_end ov96_02204F40

	thumb_func_start ov96_02205048
ov96_02205048: ; 0x02205048
	push {r4, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	add r4, r0, #0
	str r3, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #1
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xe2
	bl GfGfxLoader_LoadCharData
	mov r2, #0
	str r2, [sp]
	ldr r3, [r4, #0x14]
	mov r0, #0xe2
	mov r1, #3
	bl GfGfxLoader_LoadFromNarc
	add r1, r4, #0
	add r1, #0x1c
	str r0, [r4, #0x18]
	bl NNS_G2dGetUnpackedBGCharacterData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	str r3, [sp, #8]
	ldr r0, [r4, #0x14]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4]
	mov r0, #0xe2
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4, #0x14]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xe2
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x37
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02207DDC
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_02205048

	thumb_func_start ov96_022050B4
ov96_022050B4: ; 0x022050B4
	push {r4, lr}
	sub sp, #8
	mov r1, #1
	str r1, [sp]
	mov r1, #0xe2
	mov r2, #0x11
	mov r3, #0x68
	add r4, r0, #0
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xe2
	mov r2, #0xe
	mov r3, #0x68
	bl ov96_021EB2F4
	add r0, r4, #0
	mov r1, #0xe2
	mov r2, #0x10
	mov r3, #0x68
	bl ov96_021EB334
	add r0, r4, #0
	mov r1, #0xe2
	mov r2, #0xf
	mov r3, #0x68
	bl ov96_021EB36C
	add sp, #8
	pop {r4, pc}
	thumb_func_end ov96_022050B4

	thumb_func_start ov96_022050F8
ov96_022050F8: ; 0x022050F8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp, #4]
	add r6, r1, #0
	mov r5, #0
	add r4, r0, #0
	mov r7, #6
_02205106:
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r7, [sp]
	bl ov96_021EB3E4
	mov r1, #0xe
	lsl r1, r1, #6
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #1
	bl ov96_021EB564
	add r5, r5, #1
	add r4, #0xc
	cmp r5, #0x14
	blt _02205106
	ldr r4, [sp, #4]
	mov r5, #0
	mov r7, #0x11
_02205132:
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r7, [sp]
	bl ov96_021EB3E4
	mov r1, #0x47
	lsl r1, r1, #4
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #6
	bl ov96_021EB564
	mov r0, #0x12
	str r0, [sp]
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB3E4
	ldr r1, _022052A4 ; =0x00000474
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #5
	bl ov96_021EB564
	add r5, r5, #1
	add r4, #0x10
	cmp r5, #0xa
	blt _02205132
	mov r0, #0
	ldr r7, [sp, #4]
	str r0, [sp, #8]
_0220517C:
	mov r0, #9
	str r0, [sp]
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB3E4
	mov r1, #2
	str r0, [r7, #0x6c]
	bl ov96_021EB564
	mov r4, #0
_02205196:
	lsl r0, r4, #2
	add r5, r7, r0
	mov r0, #0x17
	str r0, [sp]
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB3E4
	str r0, [r5, #0x70]
	mov r1, #3
	bl ov96_021EB564
	ldr r0, [r5, #0x70]
	mov r1, #2
	bl ov96_021EB630
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _02205196
	mov r0, #0x1b
	str r0, [sp]
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	bl ov96_021EB3E4
	mov r1, #8
	str r0, [r7, #0x78]
	bl ov96_021EB564
	ldr r0, [sp, #8]
	add r7, #0xb8
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _0220517C
	ldr r4, [sp, #4]
	mov r5, #0
	mov r7, #0xe
_022051EE:
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r7, [sp]
	bl ov96_021EB3E4
	mov r1, #0xd3
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #7
	bl ov96_021EB564
	mov r0, #0xd3
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #4
	bl ov96_021EB630
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #4
	blt _022051EE
	ldr r4, [sp, #4]
	mov r5, #0
	mov r7, #0x19
_02205226:
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r7, [sp]
	bl ov96_021EB3E4
	mov r1, #0xd7
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #4
	bl ov96_021EB564
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #4
	blt _02205226
	mov r4, #0
	mov r5, #0x1a
	mov r7, #0x10
_02205252:
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	mov r3, #0x68
	str r5, [sp]
	bl ov96_021EB3E4
	ldr r2, [sp, #4]
	ldr r1, _022052A8 ; =0x0000056C
	mov r3, #0x68
	str r0, [r2, r1]
	add r0, r6, #0
	mov r1, #2
	mov r2, #1
	str r7, [sp]
	bl ov96_021EB3E4
	ldr r2, [sp, #4]
	ldr r1, _022052AC ; =0x00000568
	str r0, [r2, r1]
	ldr r0, _022052AC ; =0x00000568
	add r1, r2, #0
	ldr r0, [r1, r0]
	mov r1, #0
	bl ov96_021EB564
	ldr r1, [sp, #4]
	ldr r0, _022052A8 ; =0x0000056C
	ldr r0, [r1, r0]
	mov r1, #4
	bl ov96_021EB564
	ldr r0, [sp, #4]
	add r4, r4, #1
	add r0, #0x14
	str r0, [sp, #4]
	cmp r4, #5
	blt _02205252
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_022052A4: .word 0x00000474
_022052A8: .word 0x0000056C
_022052AC: .word 0x00000568
	thumb_func_end ov96_022050F8

	thumb_func_start ov96_022052B0
ov96_022052B0: ; 0x022052B0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x84
	str r1, [sp, #0x10]
	str r0, [sp, #0xc]
	bl ov96_021E5DC4
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	cmp r0, #0
	beq _022052D4
	cmp r0, #1
	bne _022052CC
	b _02205430
_022052CC:
	cmp r0, #2
	bne _022052D2
	b _02205456
_022052D2:
	b _02205466
_022052D4:
	ldr r0, [sp, #0xc]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	mov r3, #0xde
	ldr r2, [sp, #0x18]
	lsl r3, r3, #2
	ldr r2, [r2, r3]
	add r0, sp, #0x20
	mov r1, #0xe3
	bl ReadWholeNarcMemberByIdPair
	add r0, sp, #0x5c
	ldr r7, [sp, #0x18]
	str r0, [sp, #0x14]
	mov r0, #0
	add r6, sp, #0x20
	str r0, [sp, #0x1c]
	add r4, sp, #0x34
	add r5, r7, #0
_02205300:
	ldrb r0, [r4, #1]
	ldr r2, _02205474 ; =0x0000061C
	lsl r0, r0, #0x13
	lsr r1, r0, #0x10
	ldrb r0, [r4]
	lsl r0, r0, #0x13
	lsr r0, r0, #0x10
	strh r0, [r7, r2]
	ldrb r2, [r4, #1]
	lsl r3, r2, #3
	ldr r2, _02205478 ; =0x0000061E
	cmp r0, #0
	strh r3, [r7, r2]
	beq _0220533C
	cmp r1, #0
	beq _0220533C
	mov r2, #0xdf
	mov r3, #1
	lsl r2, r2, #2
	str r3, [r5, r2]
	add r2, #8
	strh r0, [r5, r2]
	ldr r0, _0220547C ; =0x00000386
	add r2, r3, #0
	strh r1, [r5, r0]
	sub r0, r0, #6
	ldr r0, [r5, r0]
	add r1, r3, #0
	bl ov96_021EB52C
_0220533C:
	ldr r0, [sp, #0x1c]
	add r4, r4, #2
	add r0, r0, #1
	add r7, r7, #4
	add r5, #0xc
	str r0, [sp, #0x1c]
	cmp r0, #0x14
	blt _02205300
	ldr r5, [sp, #0x18]
	mov r7, #0
	add r4, r5, #0
_02205352:
	ldrb r0, [r6, #1]
	ldr r2, _02205480 ; =0x0000066C
	lsl r0, r0, #0x13
	lsr r1, r0, #0x10
	ldrb r0, [r6]
	lsl r0, r0, #0x13
	lsr r0, r0, #0x10
	strh r0, [r5, r2]
	ldrb r2, [r6, #1]
	lsl r3, r2, #3
	ldr r2, _02205484 ; =0x0000066E
	cmp r0, #0
	strh r3, [r5, r2]
	beq _02205398
	cmp r1, #0
	beq _02205398
	ldr r2, _02205488 ; =0x0000046C
	mov r3, #1
	str r3, [r4, r2]
	add r2, #0xc
	strh r0, [r4, r2]
	ldr r0, _0220548C ; =0x0000047A
	add r2, r3, #0
	strh r1, [r4, r0]
	sub r0, #0xa
	ldr r0, [r4, r0]
	add r1, r3, #0
	bl ov96_021EB52C
	ldr r0, _02205490 ; =0x00000474
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	bl ov96_021EB52C
_02205398:
	add r7, r7, #1
	add r6, r6, #2
	add r5, r5, #4
	add r4, #0x10
	cmp r7, #0xa
	blt _02205352
	ldr r0, _02205494 ; =0x000005C8
	ldr r2, [sp, #0x18]
	mov r3, #0
	add r1, r0, #2
_022053AC:
	ldr r4, [sp, #0x14]
	add r3, r3, #1
	ldrb r4, [r4]
	lsl r4, r4, #3
	strh r4, [r2, r0]
	ldr r4, [sp, #0x14]
	ldrb r4, [r4, #1]
	lsl r4, r4, #3
	strh r4, [r2, r1]
	ldr r4, [sp, #0x14]
	add r2, r2, #4
	add r4, r4, #2
	str r4, [sp, #0x14]
	cmp r3, #0x14
	blt _022053AC
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r0, #0
	bne _02205408
	ldr r0, [sp, #0x18]
	bl ov96_02207870
	mov r1, #0xdb
	ldr r0, [sp, #0x18]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	add r1, sp, #0x34
	bl ov96_02208AF8
	mov r1, #0xdb
	ldr r0, [sp, #0x18]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	add r1, sp, #0x20
	bl ov96_02208AF8
	mov r1, #0xdb
	ldr r0, [sp, #0x18]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	ldr r2, _02205498 ; =0x00000564
	ldr r1, [sp, #0x18]
	add r1, r1, r2
	bl ov96_02208AF0
_02205408:
	ldr r0, [sp, #0x18]
	bl ov96_0220764C
	mov r0, #0x5c
	bl sub_0201AC84
	cmp r0, #0
	bne _0220541C
	bl GF_AssertFail
_0220541C:
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	add r1, r0, #1
	ldr r0, [sp, #0x10]
	strb r1, [r0]
	ldr r0, [sp, #0xc]
	mov r1, #0x13
	bl ov96_021E601C
	b _02205466
_02205430:
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [sp, #0x18]
	mov r1, #3
	ldr r0, [r0, #0x14]
	add r2, r1, #0
	str r0, [sp, #8]
	mov r0, #2
	mov r3, #0
	bl sub_0200FA24
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	add r1, r0, #1
	ldr r0, [sp, #0x10]
	strb r1, [r0]
	b _02205466
_02205456:
	bl sub_0200FB5C
	cmp r0, #0
	beq _02205466
	ldr r0, [sp, #0xc]
	mov r1, #1
	bl ov96_021E5FC8
_02205466:
	ldr r0, [sp, #0xc]
	bl ov96_02205D30
	mov r0, #0
	add sp, #0x84
	pop {r4, r5, r6, r7, pc}
	nop
_02205474: .word 0x0000061C
_02205478: .word 0x0000061E
_0220547C: .word 0x00000386
_02205480: .word 0x0000066C
_02205484: .word 0x0000066E
_02205488: .word 0x0000046C
_0220548C: .word 0x0000047A
_02205490: .word 0x00000474
_02205494: .word 0x000005C8
_02205498: .word 0x00000564
	thumb_func_end ov96_022052B0

	thumb_func_start ov96_0220549C
ov96_0220549C: ; 0x0220549C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _022054BA
	cmp r0, #1
	beq _022054D2
	cmp r0, #2
	beq _022054EA
	b _0220551A
_022054BA:
	add r0, r5, #0
	bl ov96_02205D30
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _0220551A
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _0220551A
_022054D2:
	add r0, r5, #0
	bl ov96_022055AC
	add r0, r5, #0
	bl ov96_02205C94
	cmp r0, #0
	beq _0220551A
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _0220551A
_022054EA:
	add r0, r5, #0
	bl ov96_022055AC
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _0220551A
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x14]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
_0220551A:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	thumb_func_end ov96_0220549C

	thumb_func_start ov96_02205520
ov96_02205520: ; 0x02205520
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	add r4, r1, #0
	bl ov96_021E5F54
	add r5, r0, #0
	add r0, r7, #0
	bl ov96_021E5DC4
	ldrb r0, [r4]
	cmp r0, #0
	bne _02205548
	bl sub_0200FB5C
	cmp r0, #0
	beq _02205544
	mov r0, #1
	strb r0, [r4]
_02205544:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02205548:
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _02205556
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02205556:
	add r5, #0x28
	add r0, r5, #0
	bl ov96_021E8A20
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_02205564:
	ldr r0, [r5]
	lsr r1, r0, #0x12
	ldr r0, _022055A4 ; =0x000003FF
	and r0, r1
	ldrh r1, [r6, #0x18]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	asr r2, r1, #0xb
	mov r1, #0x1f
	and r1, r2
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	add r0, r0, r1
	lsl r0, r0, #0x10
	lsr r2, r0, #0x10
	ldr r0, _022055A8 ; =0x000003E7
	cmp r2, r0
	bls _0220558A
	add r2, r0, #0
_0220558A:
	lsl r1, r4, #0x18
	add r0, r7, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FB0
	add r4, r4, #1
	add r6, r6, #2
	add r5, r5, #4
	cmp r4, #4
	blt _02205564
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022055A4: .word 0x000003FF
_022055A8: .word 0x000003E7
	thumb_func_end ov96_02205520

	thumb_func_start ov96_022055AC
ov96_022055AC: ; 0x022055AC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x78
	str r0, [sp]
	bl ov96_021E5F54
	str r0, [sp, #0x28]
	ldr r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #0x2c]
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	beq _022055CC
	b _02205AE0
_022055CC:
	ldr r1, _022058B4 ; =0x0000050E
	ldr r0, [sp, #0x2c]
	ldrb r0, [r0, r1]
	cmp r0, #0
	beq _022055EC
	ldr r0, [sp, #0x28]
	add r0, #0x28
	str r0, [sp, #0x28]
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x2c]
	bl ov96_02205AFC
	add sp, #0x78
	pop {r3, r4, r5, r6, r7, pc}
_022055EC:
	ldr r0, [sp, #0x28]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0x28]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_02205600:
	ldmia r3!, {r0, r1}
	stmia r4!, {r0, r1}
	sub r2, r2, #1
	bne _02205600
	ldr r0, [r3]
	ldr r1, _022058B8 ; =0x0000050C
	str r0, [r4]
	ldr r0, [sp, #0x2c]
	ldrh r0, [r0, r1]
	cmp r0, #0
	beq _0220561C
	sub r2, r0, #1
	ldr r0, [sp, #0x2c]
	strh r2, [r0, r1]
_0220561C:
	mov r1, #0xdb
	ldr r0, [sp, #0x2c]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl ov96_02208B34
	mov r0, #0
	ldr r5, [sp, #0x2c]
	str r0, [sp, #0x30]
	add r1, r0, #0
	ldr r2, _022058BC ; =0x0000051B
	ldr r0, [sp, #0x2c]
	add r4, r5, #0
	strb r1, [r0, r2]
	ldr r0, [sp, #0x28]
	add r6, r5, #0
	str r0, [sp, #0x18]
	add r0, #0x50
	str r0, [sp, #0x18]
	add r0, r5, #0
	str r0, [sp, #0x14]
	add r0, #0x24
	str r0, [sp, #0x14]
	add r0, r5, #0
	str r0, [sp, #0x10]
	add r0, #0xa0
	str r0, [sp, #0x10]
	add r0, r5, #0
	str r0, [sp, #0xc]
	add r0, #0xac
	str r0, [sp, #0xc]
	add r0, r5, #0
	str r0, [sp, #8]
	add r0, #0x88
	str r0, [sp, #8]
	str r0, [sp, #4]
_02205664:
	ldr r0, [sp, #0x18]
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r0, [r7]
	cmp r0, #0
	beq _022056AA
	mov r0, #0xc1
	lsl r0, r0, #2
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _0220568E
	add r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _0220568E
	mov r0, #0xc1
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r5, r0]
	b _022056B6
_0220568E:
	cmp r1, #0
	bne _022056B6
	mov r0, #0xc2
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _022056B6
	mov r0, #0xc1
	mov r1, #1
	lsl r0, r0, #2
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
	b _022056B6
_022056AA:
	mov r0, #0xc1
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
_022056B6:
	add r0, r4, #0
	add r0, #0xc0
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205750
	add r0, r4, #0
	add r0, #0xc1
	ldrb r1, [r0]
	cmp r1, #1
	bne _022056F6
	ldrb r0, [r7, #8]
	cmp r0, #1
	bne _022056F6
	add r0, r4, #0
	add r0, #0xd5
	ldrb r0, [r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	add r0, r4, #0
	add r0, #0xd5
	strb r1, [r0]
	add r1, r4, #0
	add r1, #0xc1
	mov r0, #2
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0xd4
	mov r0, #1
	strb r0, [r1]
	b _0220571C
_022056F6:
	cmp r1, #2
	bne _0220571C
	ldrb r0, [r7, #8]
	cmp r0, #2
	bne _0220571C
	add r1, r4, #0
	add r1, #0xc1
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0xc0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0xcf
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0xd4
	mov r0, #1
	strb r0, [r1]
_0220571C:
	mov r0, #0xcd
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r6, r0]
	add r1, r4, #0
	add r1, #0x9e
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r1, r4, #0
	add r3, r4, #0
	add r1, #0xa8
	add r2, r4, #0
	add r3, #0xa0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xac
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _02205A72
_02205750:
	add r0, r4, #0
	add r0, #0xca
	ldrb r0, [r0]
	cmp r0, #1
	bne _0220578E
	mov r0, #0xcd
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r6, r0]
	add r1, r4, #0
	add r1, #0x9e
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r1, r4, #0
	add r3, r4, #0
	add r1, #0xa8
	add r2, r4, #0
	add r3, #0xa0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xac
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _02205A72
_0220578E:
	add r0, r4, #0
	add r0, #0xc8
	ldrb r0, [r0]
	cmp r0, #0
	beq _022057CC
	mov r0, #0xcd
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r6, r0]
	add r1, r4, #0
	add r1, #0x9e
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r1, r4, #0
	add r3, r4, #0
	add r1, #0xa8
	add r2, r4, #0
	add r3, #0xa0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xac
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _02205A72
_022057CC:
	add r0, r4, #0
	add r0, #0xcf
	ldrb r0, [r0]
	cmp r0, #0
	beq _0220580A
	mov r0, #0xcd
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r6, r0]
	add r1, r4, #0
	add r1, #0x9e
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r1, r4, #0
	add r3, r4, #0
	add r1, #0xa8
	add r2, r4, #0
	add r3, #0xa0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xac
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _02205A72
_0220580A:
	mov r0, #0
	str r0, [sp, #0x24]
	mov r0, #0xc1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02205862
	ldr r1, [sp, #0x30]
	ldrb r2, [r7, #4]
	lsl r1, r1, #0x18
	ldrb r3, [r7, #5]
	ldr r0, [sp, #0x2c]
	lsr r1, r1, #0x18
	bl ov96_02205DD4
	cmp r0, #0
	beq _022058F2
	mov r0, #0xcd
	mov r1, #1
	lsl r0, r0, #2
	str r1, [r6, r0]
	ldrb r0, [r7, #4]
	add r3, r4, #0
	add r2, r4, #0
	lsl r1, r0, #0xc
	add r0, r4, #0
	add r0, #0xa0
	str r1, [r0]
	ldrb r0, [r7, #5]
	add r3, #0xa0
	add r2, #0xac
	lsl r1, r0, #0xc
	add r0, r4, #0
	add r0, #0xa4
	str r1, [r0]
	add r1, r4, #0
	add r1, #0xa8
	mov r0, #0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _022058F2
_02205862:
	mov r0, #0xc2
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _022058C0
	add r0, r4, #0
	add r0, #0x9e
	ldrh r0, [r0]
	cmp r0, #0xff
	bhs _02205886
	add r0, r4, #0
	add r0, #0x9e
	ldrh r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x9e
	strh r1, [r0]
	b _02205890
_02205886:
	mov r0, #0x51
	ldr r1, [sp, #0x2c]
	mov r2, #1
	lsl r0, r0, #4
	strb r2, [r1, r0]
_02205890:
	mov r0, #0xcd
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	cmp r0, #0
	bne _0220589C
	b _02205A72
_0220589C:
	ldrb r0, [r7, #4]
	lsl r1, r0, #0xc
	add r0, r4, #0
	add r0, #0xac
	str r1, [r0]
	ldrb r0, [r7, #5]
	lsl r1, r0, #0xc
	add r0, r4, #0
	add r0, #0xb0
	str r1, [r0]
	b _022058F2
	nop
_022058B4: .word 0x0000050E
_022058B8: .word 0x0000050C
_022058BC: .word 0x0000051B
_022058C0:
	mov r0, #0xcd
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	cmp r0, #0
	beq _022058EE
	add r0, r4, #0
	add r0, #0x9e
	ldrh r0, [r0]
	cmp r0, #0x1e
	bhi _022058DC
	add r1, r4, #0
	add r1, #0xc9
	mov r0, #1
	strb r0, [r1]
_022058DC:
	mov r0, #0xcd
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r6, r0]
	add r2, r1, #0
	mov r0, #0x51
	ldr r1, [sp, #0x2c]
	lsl r0, r0, #4
	strb r2, [r1, r0]
_022058EE:
	mov r0, #1
	str r0, [sp, #0x24]
_022058F2:
	add r0, r4, #0
	add r0, #0xc9
	ldrb r0, [r0]
	cmp r0, #0
	bne _022058FE
	b _02205A42
_022058FE:
	mov r1, #0
	add r0, sp, #0x54
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r4, #0
	add r0, #0xd5
	ldrb r1, [r0]
	mov r0, #0x14
	mul r0, r1
	add r2, r4, r0
	ldr r0, [r2, #0x30]
	str r0, [sp, #0x20]
	ldr r0, [r2, #0x34]
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x14]
	bl ov96_022073F0
	add r7, r0, #0
	ldr r0, [sp, #0x20]
	ldr r1, [sp, #0x1c]
	bl _fmul
	bl _f2d
	ldr r3, _02205AE4 ; =0x40200000
	mov r2, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _02205AE8 ; =0x40B00000
	mov r0, #0
	bl _dmul
	bl _dtoi
	str r0, [sp, #0x34]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, sp, #0x60
	bl VEC_Subtract
	add r1, sp, #0x60
	ldr r0, [sp, #0x34]
	add r2, sp, #0x54
	add r3, r1, #0
	bl VEC_MultAdd
	add r0, sp, #0x60
	bl VEC_Mag
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	bl _itof
	add r2, r4, #0
	add r2, #0x88
	add r3, sp, #0x6c
	ldmia r2!, {r0, r1}
	mov ip, r3
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	add r1, sp, #0x60
	str r0, [r3]
	mov r0, ip
	mov r2, ip
	bl ov96_02207400
	add r0, sp, #0x6c
	bl VEC_Mag
	bl _itof
	str r0, [sp, #0x38]
	ldr r0, _02205AEC ; =0x45800000
	add r1, r7, #0
	bl _fmul
	add r1, r0, #0
	ldr r0, [sp, #0x38]
	bl _fgr
	bls _022059EA
	mov r1, #0
	add r0, sp, #0x3c
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, sp, #0x6c
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, _02205AEC ; =0x45800000
	add r1, r7, #0
	bl _fmul
	bl _ftoi
	ldr r3, [sp, #8]
	add r1, sp, #0x6c
	add r2, sp, #0x3c
	bl VEC_MultAdd
	ldr r0, _02205AEC ; =0x45800000
	add r1, r7, #0
	bl _fmul
	bl _ftoi
	add r1, sp, #0x6c
	add r2, sp, #0x3c
	add r3, sp, #0x48
	bl VEC_MultAdd
	b _02205A00
_022059EA:
	ldr r0, [sp, #4]
	ldr r2, [sp, #8]
	add r1, sp, #0x60
	bl ov96_02207400
	add r3, sp, #0x60
	ldmia r3!, {r0, r1}
	add r2, sp, #0x48
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_02205A00:
	ldr r0, [sp, #4]
	bl ov96_022079B8
	add r1, r4, #0
	add r1, #0xd4
	strb r0, [r1]
	ldr r1, [sp, #0x2c]
	ldr r0, _02205AF0 ; =0x0000051B
	mov r2, #1
	strb r2, [r1, r0]
	ldr r1, [r4, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r2, r0, #0xc
	ldr r1, [sp, #0x2c]
	ldr r0, _02205AF4 ; =0x00000522
	strh r2, [r1, r0]
	add r0, r4, #0
	add r0, #0x80
	ldr r1, [r0]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r2, r0, #0xc
	mov r0, #0x52
	ldr r1, [sp, #0x2c]
	lsl r0, r0, #4
	strh r2, [r1, r0]
	add r1, r4, #0
	add r1, #0xc9
	mov r0, #0
	strb r0, [r1]
_02205A42:
	ldr r0, [sp, #0x24]
	cmp r0, #0
	beq _02205A72
	add r1, r4, #0
	add r1, #0x9e
	mov r0, #0
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r1, r4, #0
	add r1, #0xa4
	str r0, [r1]
	add r1, r4, #0
	add r3, r4, #0
	add r1, #0xa8
	add r2, r4, #0
	add r3, #0xa0
	str r0, [r1]
	ldmia r3!, {r0, r1}
	add r2, #0xac
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_02205A72:
	ldr r0, [sp, #0x18]
	add r5, #0xc
	add r0, #0x28
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r4, #0xb8
	add r0, #0xb8
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r6, r6, #4
	add r0, #0xb8
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, #0xb8
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r0, #0xb8
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r0, #0xb8
	str r0, [sp, #4]
	ldr r0, [sp, #0x30]
	add r0, r0, #1
	str r0, [sp, #0x30]
	cmp r0, #4
	bge _02205AA8
	b _02205664
_02205AA8:
	ldr r0, [sp]
	bl ov96_02205E30
	ldr r0, [sp, #0x2c]
	bl ov96_02207870
	ldr r1, _02205AF8 ; =0x0000050C
	ldr r0, [sp, #0x2c]
	ldrh r0, [r0, r1]
	cmp r0, #0
	bne _02205AC6
	mov r2, #1
	add r1, r1, #2
	ldr r0, [sp, #0x2c]
	b _02205ACC
_02205AC6:
	ldr r0, [sp, #0x2c]
	mov r2, #0
	add r1, r1, #2
_02205ACC:
	strb r2, [r0, r1]
	ldr r0, [sp, #0x28]
	add r0, #0x28
	str r0, [sp, #0x28]
	bl ov96_021E8A20
	add r1, r0, #0
	ldr r0, [sp, #0x2c]
	bl ov96_02205AFC
_02205AE0:
	add sp, #0x78
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02205AE4: .word 0x40200000
_02205AE8: .word 0x40B00000
_02205AEC: .word 0x45800000
_02205AF0: .word 0x0000051B
_02205AF4: .word 0x00000522
_02205AF8: .word 0x0000050C
	thumb_func_end ov96_022055AC

	thumb_func_start ov96_02205AFC
ov96_02205AFC: ; 0x02205AFC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #0x14]
	mov r0, #0
	str r0, [sp, #0xc]
	str r0, [sp, #8]
	ldr r0, [sp, #0xc]
	ldr r3, [sp, #0x14]
	str r0, [sp, #4]
	mov r0, #0x57
	ldr r2, [sp, #0xc]
	str r1, [sp]
	add r4, r1, #0
	lsl r0, r0, #4
_02205B18:
	ldr r1, [r3, r0]
	add r2, r2, #1
	strh r1, [r4, #0x18]
	add r3, #0x14
	add r4, r4, #2
	cmp r2, #5
	blt _02205B18
	ldr r0, [sp, #0x14]
	ldr r1, [sp]
	mov r3, #0
	add r0, #0x24
	add r2, r1, #0
	add r5, r3, #0
_02205B32:
	add r4, r0, #0
	add r4, #0xaa
	ldrb r4, [r4]
	ldr r6, [r0, #0x58]
	lsl r4, r4, #0x1c
	str r4, [sp, #0x10]
	add r4, r0, #0
	add r4, #0xac
	ldrh r4, [r4]
	lsl r4, r4, #0x12
	mov lr, r4
	asr r4, r6, #0xb
	lsr r4, r4, #0x14
	add r4, r6, r4
	asr r7, r4, #0xc
	ldr r4, [r0, #0x5c]
	mov ip, r4
	asr r4, r4, #0xb
	lsr r6, r4, #0x14
	mov r4, ip
	add r6, r4, r6
	asr r4, r6, #0xc
	lsl r4, r4, #9
	orr r4, r7
	mov r6, lr
	orr r6, r4
	ldr r4, [sp, #0x10]
	orr r4, r6
	stmia r1!, {r4}
	add r6, r0, #0
	add r6, #0xb1
	ldrb r6, [r6]
	ldrh r4, [r2, #0x18]
	lsl r6, r6, #5
	orr r4, r6
	add r6, r0, #0
	strh r4, [r2, #0x18]
	add r6, #0xb0
	ldrb r6, [r6]
	ldrh r4, [r2, #0x18]
	sub r6, r6, #1
	lsl r6, r6, #7
	orr r4, r6
	add r6, r0, #0
	strh r4, [r2, #0x18]
	add r6, #0xa6
	ldrb r6, [r6]
	ldrh r4, [r2, #0x18]
	lsl r6, r6, #9
	orr r4, r6
	add r6, r0, #0
	strh r4, [r2, #0x18]
	add r6, #0xa7
	ldrb r6, [r6]
	ldrh r4, [r2, #0x18]
	lsl r6, r6, #0xb
	orr r4, r6
	strh r4, [r2, #0x18]
	add r4, r0, #0
	add r4, #0xab
	ldrb r4, [r4]
	add r2, r2, #2
	add r6, r4, #0
	lsl r6, r3
	ldr r4, [sp, #8]
	orr r4, r6
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	str r4, [sp, #8]
	add r4, r0, #0
	add r4, #0x9d
	ldrb r4, [r4]
	add r0, #0xb8
	add r6, r4, #0
	lsl r6, r5
	ldr r4, [sp, #0xc]
	add r5, r5, #2
	orr r4, r6
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	str r4, [sp, #0xc]
	ldr r4, [sp, #0x14]
	add r6, r4, r3
	ldr r4, _02205C8C ; =0x000006BC
	ldrb r4, [r6, r4]
	add r6, r4, #0
	lsl r6, r3
	ldr r4, [sp, #4]
	add r3, r3, #1
	orr r4, r6
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	str r4, [sp, #4]
	cmp r3, #4
	blt _02205B32
	ldr r0, [sp]
	mov r2, #0
	str r2, [r0, #0x14]
	ldr r0, _02205C90 ; =0x0000051E
	ldr r1, [sp, #0x14]
	ldr r3, [sp]
	ldrh r1, [r1, r0]
	sub r4, r0, #2
	orr r1, r2
	str r1, [r3, #0x14]
	ldr r3, [sp, #0x14]
	ldrh r3, [r3, r4]
	sub r4, r0, #5
	lsl r3, r3, #9
	orr r1, r3
	ldr r3, [sp]
	str r1, [r3, #0x14]
	ldr r3, [sp, #0x14]
	ldrb r3, [r3, r4]
	lsl r3, r3, #0x12
	orr r3, r1
	ldr r1, [sp]
	str r3, [r1, #0x14]
	ldr r1, [sp, #4]
	lsl r1, r1, #0x13
	orr r3, r1
	ldr r1, [sp]
	str r3, [r1, #0x14]
	str r2, [r1, #0x10]
	ldr r1, [sp, #0x14]
	add r3, r0, #4
	ldrh r1, [r1, r3]
	add r3, r2, #0
	add r2, r0, #2
	orr r3, r1
	ldr r1, [sp]
	str r3, [r1, #0x10]
	ldr r1, [sp, #0x14]
	ldrh r1, [r1, r2]
	sub r2, r0, #3
	lsl r1, r1, #9
	orr r3, r1
	ldr r1, [sp]
	str r3, [r1, #0x10]
	ldr r1, [sp, #0x14]
	ldrb r1, [r1, r2]
	add r2, r3, #0
	lsl r1, r1, #0x12
	orr r2, r1
	ldr r1, [sp]
	str r2, [r1, #0x10]
	ldr r1, [sp, #8]
	lsl r1, r1, #0x13
	orr r2, r1
	ldr r1, [sp]
	add r3, r2, #0
	str r2, [r1, #0x10]
	add r2, r0, #0
	ldr r1, [sp, #0xc]
	sub r2, #0x10
	lsl r1, r1, #0x17
	orr r3, r1
	ldr r1, [sp]
	sub r0, #0x12
	str r3, [r1, #0x10]
	ldr r1, [sp, #0x14]
	ldrb r1, [r1, r2]
	add r2, r3, #0
	lsl r1, r1, #0x1f
	orr r2, r1
	ldr r1, [sp]
	str r2, [r1, #0x10]
	ldr r1, [sp, #0x14]
	ldrh r1, [r1, r0]
	ldr r0, [sp]
	strh r1, [r0, #0x22]
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02205C8C: .word 0x000006BC
_02205C90: .word 0x0000051E
	thumb_func_end ov96_02205AFC

	thumb_func_start ov96_02205C94
ov96_02205C94: ; 0x02205C94
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r7, r0, #0
	bl ov96_021E8A20
	add r4, r0, #0
	mov r0, #0
	add r7, #0xf0
	str r0, [r4]
	add r0, r7, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x10]
	mov r1, #1
	lsr r0, r0, #0x1f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _02205CE4
	ldr r0, [r6, #0x20]
	bl ov96_021EB63C
	mov r0, #0xd2
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	mov r1, #1
	bl ov96_021EB144
	ldr r1, _02205D28 ; =ov96_02207C64
	add r0, r5, #0
	bl ov96_021E8324
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02205CE4:
	bl sub_02025358
	cmp r0, #0
	beq _02205D06
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_02205D06:
	bl sub_0202534C
	cmp r0, #0
	beq _02205D1C
	ldr r0, _02205D2C ; =gMain + 0x40
	ldrh r1, [r0, #0x20]
	strb r1, [r4, #4]
	ldrh r0, [r0, #0x22]
	strb r0, [r4, #5]
	mov r0, #1
	str r0, [r4]
_02205D1C:
	add r0, r5, #0
	bl ov96_02205D30
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02205D28: .word ov96_02207C64
_02205D2C: .word gMain + 0x40
	thumb_func_end ov96_02205C94

	thumb_func_start ov96_02205D30
ov96_02205D30: ; 0x02205D30
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	str r0, [sp, #8]
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	lsl r0, r0, #2
	ldr r1, [r4, r0]
	ldr r0, _02205DD0 ; =0x000001FF
	add r7, r1, #0
	lsr r1, r1, #9
	add r6, r1, #0
	and r7, r0
	and r6, r0
	mov r1, #0
	add r3, r7, #0
	ldr r0, [r5]
	add r2, r1, #0
	sub r3, #0x80
	bl sub_0201F238
	add r3, r6, #0
	ldr r0, [r5]
	mov r1, #0
	mov r2, #3
	sub r3, #0x60
	bl sub_0201F238
	add r2, r5, #0
	ldr r0, [sp]
	ldr r1, [sp, #4]
	ldr r3, [sp, #8]
	add r2, #0x24
	bl ov96_02206380
	add r0, r5, #0
	add r1, r7, #0
	add r2, r6, #0
	bl ov96_02206A24
	add r0, r5, #0
	add r1, r7, #0
	add r2, r6, #0
	bl ov96_02206AC0
	add r0, r5, #0
	add r1, r4, #0
	add r2, r7, #0
	add r3, r6, #0
	bl ov96_02206B80
	add r0, r5, #0
	bl ov96_02207BE4
	mov r0, #0x37
	lsl r0, r0, #4
	ldrh r1, [r4, #0x22]
	ldr r0, [r5, r0]
	bl ov96_02208740
	ldrh r1, [r4, #0x22]
	ldr r0, [sp]
	bl ov96_021E6454
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02205DD0: .word 0x000001FF
	thumb_func_end ov96_02205D30

	thumb_func_start ov96_02205DD4
ov96_02205DD4: ; 0x02205DD4
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r6, r2, #0
	mov r2, #0xb8
	add r0, #0x24
	mul r2, r1
	add r5, r0, r2
	add r0, r5, #0
	add r0, #0xb1
	ldrb r0, [r0]
	add r4, r3, #0
	cmp r0, #3
	blo _02205DF2
	bl GF_AssertFail
_02205DF2:
	add r0, r5, #0
	add r0, #0xb1
	ldrb r0, [r0]
	mov r1, #0x80
	mov r2, #0x60
	lsl r0, r0, #2
	ldr r5, [r5, r0]
	add r0, sp, #4
	str r0, [sp]
	add r0, r5, #0
	add r3, sp, #8
	bl ov96_021EB0A4
	str r4, [sp]
	ldr r1, [sp, #8]
	ldr r2, [sp, #4]
	add r0, r5, #0
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, r6, #0
	bl ov96_021EB0CC
	cmp r0, #0
	beq _02205E28
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, r5, r6, pc}
_02205E28:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02205DD4

	thumb_func_start ov96_02205E30
ov96_02205E30: ; 0x02205E30
	push {r4, r5, r6, r7, lr}
	sub sp, #0x4c
	str r0, [sp, #8]
	bl ov96_021E5DC4
	add r6, r0, #0
	mov r0, #0
	ldr r1, _02206150 ; =0x00000519
	add r5, r6, #0
	str r0, [sp, #0x14]
	strb r0, [r6, r1]
	add r4, sp, #0x24
	add r7, r6, #0
	add r5, #0x24
_02205E4C:
	mov r0, #0
	strb r0, [r4]
	add r0, r7, #0
	add r0, #0xc8
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205E68
	ldr r0, [sp, #8]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_02206368
	mov r0, #1
	strb r0, [r4]
_02205E68:
	ldr r0, [sp, #0x14]
	add r4, r4, #1
	add r0, r0, #1
	add r7, #0xb8
	add r5, #0xb8
	str r0, [sp, #0x14]
	cmp r0, #4
	blt _02205E4C
	mov r0, #0
	str r0, [sp, #0xc]
	add r0, sp, #0x24
	str r0, [sp, #0x10]
	ldr r0, _02206154 ; =0x000006BC
	add r5, r6, #0
	add r5, #0x24
	add r0, r6, r0
	ldr r7, _02206158 ; =0x33333333
	str r5, [sp, #0x18]
	str r0, [sp, #0x20]
_02205E8E:
	ldr r0, [sp, #0x10]
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205E98
	b _02206326
_02205E98:
	add r0, r5, #0
	bl ov96_02207B8C
	cmp r0, #0
	beq _02205EFA
	add r0, r5, #0
	add r0, #0xaa
	ldrb r0, [r0]
	bl ov96_02207BD4
	add r1, r5, #0
	add r1, #0xa7
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xaa
	mov r0, #0
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xab
	mov r0, #1
	strb r0, [r1]
	mov r0, #0
	str r0, [r5, #0x64]
	str r0, [r5, #0x68]
	add r1, r5, #0
	str r0, [r5, #0x6c]
	add r2, r5, #0
	add r1, #0xb0
	mov r0, #2
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0xa9
	mov r0, #0xa
	strb r0, [r1]
	add r0, r5, #0
	add r0, #0xa7
	ldrb r0, [r0]
	add r1, r5, #0
	add r1, #0x98
	str r0, [sp]
	ldr r1, [r1]
	add r2, #0xb1
	lsl r1, r1, #0x18
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	mov r3, #3
	bl ov96_021E8228
_02205EFA:
	add r0, r5, #0
	add r0, #0xa9
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205FB2
	add r0, r5, #0
	add r0, #0xab
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205FB2
	add r0, r5, #0
	add r0, #0xa8
	ldrb r0, [r0]
	cmp r0, #0
	bne _02205FA4
	add r0, r5, #0
	add r0, #0xa7
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205F50
	add r0, r5, #0
	add r0, #0xac
	ldrh r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0xac
	strh r1, [r0]
	add r0, r5, #0
	add r0, #0xac
	ldrh r1, [r0]
	ldr r0, _0220615C ; =0x000003E7
	cmp r1, r0
	bls _02205F42
	add r1, r5, #0
	add r1, #0xac
	strh r0, [r1]
_02205F42:
	add r0, r5, #0
	add r0, #0xa7
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0xa7
	strb r1, [r0]
_02205F50:
	add r0, r5, #0
	add r0, #0xa9
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0xa9
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xa9
	ldrb r0, [r0]
	cmp r0, #0
	bne _02205F9A
	add r1, r5, #0
	add r1, #0xa9
	mov r0, #0
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x9c
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x9d
	strb r0, [r1]
	add r1, r5, #0
	str r0, [sp]
	add r1, #0x98
	add r2, r5, #0
	ldr r1, [r1]
	add r2, #0xb1
	lsl r1, r1, #0x18
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	mov r3, #7
	bl ov96_021E8228
	b _02205FB2
_02205F9A:
	add r1, r5, #0
	add r1, #0xa8
	mov r0, #4
	strb r0, [r1]
	b _02205FB2
_02205FA4:
	add r0, r5, #0
	add r0, #0xa8
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0xa8
	strb r1, [r0]
_02205FB2:
	add r0, r5, #0
	add r0, #0xab
	ldrb r0, [r0]
	cmp r0, #0
	beq _02205FBE
	b _02206326
_02205FBE:
	add r3, r5, #0
	add r3, #0x58
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r5, #0
	str r0, [r2]
	add r0, r5, #0
	add r0, #0x58
	add r1, #0x64
	add r2, r0, #0
	bl VEC_Add
	mov r0, #0xd
	ldr r1, [r5, #0x58]
	lsl r0, r0, #0x10
	cmp r1, r0
	blt _02205FEC
	mov r0, #0x13
	lsl r0, r0, #0x10
	cmp r1, r0
	ble _02206006
_02205FEC:
	mov r0, #0x1a
	ldr r1, [r5, #0x5c]
	lsl r0, r0, #0xe
	cmp r1, r0
	bge _02205FFA
	str r0, [r5, #0x5c]
	b _02206020
_02205FFA:
	mov r0, #0x62
	lsl r0, r0, #0xe
	cmp r1, r0
	ble _02206020
	str r0, [r5, #0x5c]
	b _02206020
_02206006:
	mov r0, #0x1a
	ldr r1, [r5, #0x5c]
	lsl r0, r0, #0xe
	cmp r1, r0
	bge _02206014
	str r0, [r5, #0x5c]
	b _02206020
_02206014:
	lsl r0, r0, #2
	cmp r1, r0
	ble _02206020
	mov r0, #0x1a
	lsl r0, r0, #0x10
	str r0, [r5, #0x5c]
_02206020:
	mov r0, #0x62
	ldr r1, [r5, #0x5c]
	lsl r0, r0, #0xe
	cmp r1, r0
	ldr r1, [r5, #0x58]
	ble _02206044
	mov r0, #0xd
	lsl r0, r0, #0x10
	cmp r1, r0
	bge _02206038
	str r0, [r5, #0x58]
	b _0220605A
_02206038:
	mov r0, #0x13
	lsl r0, r0, #0x10
	cmp r1, r0
	ble _0220605A
	str r0, [r5, #0x58]
	b _0220605A
_02206044:
	mov r0, #9
	lsl r0, r0, #0x10
	cmp r1, r0
	bge _02206050
	str r0, [r5, #0x58]
	b _0220605A
_02206050:
	mov r0, #0x17
	lsl r0, r0, #0x10
	cmp r1, r0
	ble _0220605A
	str r0, [r5, #0x58]
_0220605A:
	add r0, r5, #0
	add r0, #0xb1
	ldrb r0, [r0]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl ov96_021EAF8C
	add r2, r0, #0
	add r0, r5, #0
	add r0, #0x58
	str r0, [sp]
	str r0, [sp, #4]
	ldr r1, [r5, #0x74]
	add r0, r6, #0
	add r3, sp, #0x34
	bl ov96_02207300
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [r5, #0x74]
	cmp r0, #8
	bhi _022060DE
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02206092: ; jump table
	.short _022061EC - _02206092 - 2 ; case 0
	.short _022060A4 - _02206092 - 2 ; case 1
	.short _022060BE - _02206092 - 2 ; case 2
	.short _022060D8 - _02206092 - 2 ; case 3
	.short _022060F4 - _02206092 - 2 ; case 4
	.short _0220610E - _02206092 - 2 ; case 5
	.short _02206140 - _02206092 - 2 ; case 6
	.short _0220618A - _02206092 - 2 ; case 7
	.short _022061BC - _02206092 - 2 ; case 8
_022060A4:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	ble _022060DE
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
	b _022061EC
_022060BE:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	bge _022060DE
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
	b _022061EC
_022060D8:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	blt _022060E0
_022060DE:
	b _022061EC
_022060E0:
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
	b _022061EC
_022060F4:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	ble _022061EC
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
	b _022061EC
_0220610E:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	ble _02206126
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
_02206126:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	ble _022061EC
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
	b _022061EC
_02206140:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	bge _02206170
	bl _dflt
	ldr r3, _02206160 ; =0xBFD33333
	b _02206164
	nop
_02206150: .word 0x00000519
_02206154: .word 0x000006BC
_02206158: .word 0x33333333
_0220615C: .word 0x000003E7
_02206160: .word 0xBFD33333
_02206164:
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
_02206170:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	ble _022061EC
	bl _dflt
	ldr r3, _02206340 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
	b _022061EC
_0220618A:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	bge _022061A2
	bl _dflt
	ldr r3, _02206340 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
_022061A2:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	bge _022061EC
	bl _dflt
	ldr r3, _02206340 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
	b _022061EC
_022061BC:
	ldr r0, [r5, #0x64]
	cmp r0, #0
	ble _022061D4
	bl _dflt
	ldr r3, _02206340 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x64]
_022061D4:
	ldr r0, [r5, #0x68]
	cmp r0, #0
	bge _022061EC
	bl _dflt
	ldr r3, _02206340 ; =0xBFD33333
	add r2, r7, #0
	bl _dmul
	bl _dtoi
	str r0, [r5, #0x68]
_022061EC:
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x18]
	add r2, sp, #0x40
	bl ov96_02207418
	ldr r1, _02206344 ; =0x00000519
	ldrb r1, [r6, r1]
	cmp r1, #0
	bne _02206224
	cmp r0, #0
	beq _02206224
	ldr r0, _02206344 ; =0x00000519
	mov r1, #1
	strb r1, [r6, r0]
	ldr r1, [sp, #0x40]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r0, #0xc
	ldr r0, _02206348 ; =0x0000051E
	strh r1, [r6, r0]
	ldr r1, [sp, #0x44]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r0, #0xc
	ldr r0, _0220634C ; =0x0000051C
	strh r1, [r6, r0]
_02206224:
	add r3, r5, #0
	add r3, #0x64
	ldmia r3!, {r0, r1}
	add r2, sp, #0x28
	add r4, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	add r0, r4, #0
	bl VEC_Mag
	cmp r0, #0
	ble _022062E2
	ldr r0, _02206350 ; =0x40C00000
	bl _f2d
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02206354 ; =0x9999999A
	ldr r1, _02206358 ; =0x3FB99999
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0220635C ; =0x40B00000
	mov r0, #0
	bl _dmul
	bl _dtoi
	add r4, r0, #0
	mov r0, #0x51
	lsl r0, r0, #4
	ldrb r0, [r6, r0]
	cmp r0, #0
	beq _02206272
	mov r0, #3
	lsl r0, r0, #0xc
	add r4, r4, r0
_02206272:
	add r0, sp, #0x28
	add r1, r0, #0
	bl VEC_Normalize
	asr r0, r4, #0x1f
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x28]
	ldr r3, [sp, #0x1c]
	asr r1, r0, #0x1f
	add r2, r4, #0
	bl _ll_mul
	mov r2, #2
	lsl r2, r2, #0xa
	add r2, r0, r2
	ldr r0, _02206360 ; =0x00000000
	ldr r3, [sp, #0x1c]
	adc r1, r0
	lsl r0, r1, #0x14
	lsr r1, r2, #0xc
	orr r1, r0
	ldr r0, [sp, #0x2c]
	str r1, [sp, #0x28]
	asr r1, r0, #0x1f
	add r2, r4, #0
	bl _ll_mul
	mov r2, #2
	lsl r2, r2, #0xa
	add r0, r0, r2
	ldr r2, _02206360 ; =0x00000000
	adc r1, r2
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	str r0, [sp, #0x2c]
	add r0, sp, #0x28
	bl VEC_Mag
	add r4, r0, #0
	add r0, r5, #0
	add r0, #0x64
	bl VEC_Mag
	cmp r0, r4
	blt _022062DC
	add r0, r5, #0
	add r0, #0x64
	add r1, sp, #0x28
	add r2, r0, #0
	bl VEC_Subtract
	b _022062E2
_022062DC:
	mov r0, #0
	str r0, [r5, #0x64]
	str r0, [r5, #0x68]
_022062E2:
	add r0, r5, #0
	add r0, #0x9c
	ldrb r0, [r0]
	cmp r0, #0
	bne _02206316
	add r0, r5, #0
	add r0, #0xa6
	ldrb r0, [r0]
	cmp r0, #1
	bne _02206316
	add r0, r5, #0
	add r0, #0xa2
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0xa2
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xa2
	ldrb r0, [r0]
	cmp r0, #0
	bne _02206316
	add r1, r5, #0
	add r1, #0xa6
	mov r0, #0
	strb r0, [r1]
_02206316:
	ldr r0, _02206364 ; =0x00000564
	ldr r3, [sp, #0x20]
	ldr r2, [sp, #0xc]
	add r0, r6, r0
	add r1, r5, #0
	add r2, r3, r2
	bl ov96_022078B0
_02206326:
	ldr r0, [sp, #0x10]
	add r5, #0xb8
	add r0, r0, #1
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	bge _0220633A
	b _02205E8E
_0220633A:
	add sp, #0x4c
	pop {r4, r5, r6, r7, pc}
	nop
_02206340: .word 0xBFD33333
_02206344: .word 0x00000519
_02206348: .word 0x0000051E
_0220634C: .word 0x0000051C
_02206350: .word 0x40C00000
_02206354: .word 0x9999999A
_02206358: .word 0x3FB99999
_0220635C: .word 0x40B00000
_02206360: .word 0x00000000
_02206364: .word 0x00000564
	thumb_func_end ov96_02205E30

	thumb_func_start ov96_02206368
ov96_02206368: ; 0x02206368
	add r0, r2, #0
	add r0, #0xa4
	ldrb r0, [r0]
	cmp r0, #0
	beq _0220637E
	add r0, r2, #0
	add r0, #0xa4
	ldrb r0, [r0]
	add r2, #0xa4
	sub r0, r0, #1
	strb r0, [r2]
_0220637E:
	bx lr
	thumb_func_end ov96_02206368

	thumb_func_start ov96_02206380
ov96_02206380: ; 0x02206380
	push {r4, r5, r6, r7, lr}
	sub sp, #0x9c
	str r0, [sp, #0x14]
	str r1, [sp, #0x18]
	add r4, r2, #0
	str r3, [sp, #0x1c]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x1c]
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #0x5c]
	ldr r0, [sp, #0x14]
	bl ov96_021E5DC4
	str r0, [sp, #0x60]
	ldr r0, [sp, #0x18]
	lsl r1, r0, #2
	ldr r0, [sp, #0x5c]
	ldr r2, [r0, r1]
	ldr r0, _022066F4 ; =0x000001FF
	add r1, r2, #0
	and r1, r0
	str r1, [sp, #0x68]
	lsr r1, r2, #9
	and r1, r0
	str r1, [sp, #0x64]
	ldr r1, [sp, #0x5c]
	ldr r2, [r1, #0x14]
	mov r1, #1
	lsr r3, r2, #0x12
	and r3, r1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	beq _02206454
	add r6, r2, #0
	lsr r2, r2, #9
	add r5, r2, #0
	and r6, r0
	and r5, r0
	ldr r0, _022066F8 ; =0x00000518
	ldr r2, [sp, #0x60]
	ldrb r2, [r2, r0]
	lsl r3, r2, #2
	ldr r2, [sp, #0x60]
	add r3, r2, r3
	add r2, r0, #0
	add r2, #0xc
	str r6, [r3, r2]
	ldr r2, [sp, #0x60]
	ldrb r2, [r2, r0]
	lsl r3, r2, #2
	ldr r2, [sp, #0x60]
	add r3, r2, r3
	add r2, r0, #0
	add r2, #0x1c
	str r5, [r3, r2]
	ldr r2, [sp, #0x60]
	ldrb r0, [r2, r0]
	lsl r2, r0, #2
	ldr r0, [sp, #0x60]
	add r2, r0, r2
	mov r0, #0xd3
	lsl r0, r0, #2
	ldr r0, [r2, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, _022066F8 ; =0x00000518
	ldr r0, [sp, #0x60]
	ldrb r0, [r0, r1]
	lsl r1, r0, #2
	ldr r0, [sp, #0x60]
	add r1, r0, r1
	mov r0, #0xd3
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	mov r1, #7
	bl ov96_021EB564
	ldr r0, _022066F8 ; =0x00000518
	ldr r1, [sp, #0x60]
	add r6, #0x80
	ldrb r1, [r1, r0]
	add r5, #0x60
	add r1, r1, #1
	lsr r3, r1, #0x1f
	lsl r2, r1, #0x1e
	sub r2, r2, r3
	mov r1, #0x1e
	ror r2, r1
	add r2, r3, r2
	ldr r1, [sp, #0x60]
	mov r3, #1
	strb r2, [r1, r0]
	ldr r0, [sp, #0x68]
	ldr r1, [sp, #0x64]
	ldr r2, _022066FC ; =0x000008A3
	sub r0, r6, r0
	sub r1, r5, r1
	bl ov96_02207C38
_02206454:
	ldr r0, [sp, #0x5c]
	ldr r0, [r0, #0x14]
	lsr r1, r0, #0x13
	mov r0, #0xf
	and r0, r1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0x34]
	asr r1, r0
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _02206478
	ldr r0, _02206700 ; =0x000008CE
	mov r1, #3
	bl sub_0200606C
_02206478:
	ldr r0, [sp, #0x5c]
	mov r1, #1
	ldr r0, [r0, #0x10]
	lsr r2, r0, #0x12
	and r2, r1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	beq _02206510
	add r6, r0, #0
	ldr r2, _022066F4 ; =0x000001FF
	lsr r0, r0, #9
	add r5, r0, #0
	and r6, r2
	and r5, r2
	ldr r0, _02206704 ; =0x0000051A
	ldr r2, [sp, #0x60]
	ldrb r2, [r2, r0]
	lsl r3, r2, #2
	ldr r2, [sp, #0x60]
	add r3, r2, r3
	add r2, r0, #0
	add r2, #0x2a
	str r6, [r3, r2]
	ldr r2, [sp, #0x60]
	ldrb r2, [r2, r0]
	lsl r3, r2, #2
	ldr r2, [sp, #0x60]
	add r3, r2, r3
	add r2, r0, #0
	add r2, #0x3a
	str r5, [r3, r2]
	ldr r2, [sp, #0x60]
	ldrb r0, [r2, r0]
	lsl r2, r0, #2
	ldr r0, [sp, #0x60]
	add r2, r0, r2
	mov r0, #0xd7
	lsl r0, r0, #2
	ldr r0, [r2, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, _02206704 ; =0x0000051A
	ldr r0, [sp, #0x60]
	ldrb r0, [r0, r1]
	lsl r1, r0, #2
	ldr r0, [sp, #0x60]
	add r1, r0, r1
	mov r0, #0xd7
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	mov r1, #4
	bl ov96_021EB564
	ldr r0, _02206704 ; =0x0000051A
	ldr r1, [sp, #0x60]
	add r6, #0x80
	ldrb r1, [r1, r0]
	add r5, #0x60
	add r1, r1, #1
	lsr r3, r1, #0x1f
	lsl r2, r1, #0x1e
	sub r2, r2, r3
	mov r1, #0x1e
	ror r2, r1
	add r2, r3, r2
	ldr r1, [sp, #0x60]
	mov r3, #1
	strb r2, [r1, r0]
	ldr r0, [sp, #0x68]
	ldr r1, [sp, #0x64]
	ldr r2, _02206708 ; =0x000008CD
	sub r0, r6, r0
	sub r1, r5, r1
	bl ov96_02207C38
_02206510:
	ldr r5, [sp, #0x60]
	mov r7, #0
	add r6, sp, #0x90
_02206516:
	mov r0, #0
	str r0, [r6]
	str r0, [r6, #4]
	str r0, [r6, #8]
	ldr r0, _0220670C ; =0x00000534
	ldr r1, [r5, r0]
	ldr r0, [sp, #0x64]
	add r1, #0x60
	sub r0, r1, r0
	ldr r1, _02206710 ; =0x00000524
	lsl r0, r0, #0xc
	ldr r2, [r5, r1]
	ldr r1, [sp, #0x68]
	add r2, #0x80
	sub r1, r2, r1
	lsl r1, r1, #0xc
	str r0, [sp, #0x94]
	mov r0, #0xd3
	str r1, [sp, #0x90]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r6, #0
	bl ov96_021EB588
	add r7, r7, #1
	add r5, r5, #4
	cmp r7, #4
	blt _02206516
	ldr r5, [sp, #0x60]
	mov r7, #0
	add r6, sp, #0x84
_02206554:
	mov r0, #0
	str r0, [r6]
	str r0, [r6, #4]
	str r0, [r6, #8]
	ldr r0, _02206714 ; =0x00000554
	ldr r1, [r5, r0]
	ldr r0, [sp, #0x64]
	add r1, #0x60
	sub r0, r1, r0
	ldr r1, _02206718 ; =0x00000544
	lsl r0, r0, #0xc
	ldr r2, [r5, r1]
	ldr r1, [sp, #0x68]
	add r2, #0x80
	sub r1, r2, r1
	lsl r1, r1, #0xc
	str r0, [sp, #0x88]
	mov r0, #0xd7
	str r1, [sp, #0x84]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, r6, #0
	bl ov96_021EB588
	add r7, r7, #1
	add r5, r5, #4
	cmp r7, #4
	blt _02206554
	ldr r0, [sp, #0x60]
	bl ov96_022076E4
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bne _0220659E
	mov r0, #1
	str r0, [sp, #0x20]
	b _022065A2
_0220659E:
	mov r0, #0
	str r0, [sp, #0x20]
_022065A2:
	ldr r0, [sp, #0x5c]
	mov r6, #0
	str r0, [sp, #0x44]
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x1c]
	str r0, [sp, #0x3c]
	add r0, #0x50
	str r0, [sp, #0x3c]
_022065B2:
	ldr r0, [sp, #0x44]
	mov r2, #3
	ldr r1, [r0]
	ldr r0, _022066F4 ; =0x000001FF
	add r7, r1, #0
	lsr r1, r1, #9
	and r7, r0
	and r0, r1
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x40]
	ldrh r0, [r0, #0x18]
	asr r1, r0, #5
	and r1, r2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp, #0x30]
	asr r1, r0, #7
	and r1, r2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp, #0x54]
	asr r1, r0, #9
	mov r0, #1
	and r1, r0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	str r1, [sp, #0x4c]
	ldr r1, [sp, #0x5c]
	ldr r1, [r1, #0x10]
	lsr r2, r1, #0x13
	mov r1, #0xf
	and r1, r2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	asr r1, r6
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x50]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	str r0, [sp, #0x58]
	ldr r0, [sp, #0x14]
	bl ov96_021E5D34
	cmp r0, r6
	bgt _02206622
	ldr r0, [sp, #0x3c]
	mov r5, #1
	bl ov96_021E8A20
	b _0220662A
_02206622:
	ldr r0, [sp, #0x1c]
	mov r5, #0
	bl ov96_021E8A20
_0220662A:
	ldr r1, [sp, #0x18]
	cmp r1, r6
	bne _02206658
	ldr r1, [sp, #0x30]
	lsl r3, r6, #0x18
	str r1, [sp]
	str r0, [sp, #4]
	ldr r0, [sp, #0x20]
	mov r1, #0x37
	str r0, [sp, #8]
	mov r0, #1
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x60]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r2, [sp, #0x5c]
	add r1, r4, #0
	lsr r3, r3, #0x18
	bl ov96_02206DEC
	b _0220667C
_02206658:
	ldr r1, [sp, #0x30]
	lsl r3, r6, #0x18
	str r1, [sp]
	str r0, [sp, #4]
	ldr r0, [sp, #0x20]
	mov r1, #0x37
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x60]
	str r5, [sp, #0x10]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	ldr r2, [sp, #0x5c]
	add r1, r4, #0
	lsr r3, r3, #0x18
	bl ov96_02206DEC
_0220667C:
	ldr r0, [sp, #0x68]
	ldr r1, [sp, #0x48]
	sub r0, r7, r0
	str r0, [sp, #0x38]
	add r0, #0x80
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x64]
	sub r1, r1, r0
	mov r0, #0x70
	ldrsh r0, [r4, r0]
	add r1, #0x60
	add r0, r1, r0
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x38]
	mov r1, #0x37
	lsl r0, r0, #0xc
	str r0, [sp, #0x2c]
	str r0, [sp, #0x78]
	ldr r0, [sp, #0x24]
	lsl r1, r1, #4
	lsl r0, r0, #0xc
	str r0, [sp, #0x28]
	str r0, [sp, #0x7c]
	mov r0, #0
	str r0, [sp, #0x80]
	ldr r0, [sp, #0x4c]
	str r0, [sp]
	ldr r0, [sp, #0x60]
	ldr r2, [sp, #0x30]
	ldr r0, [r0, r1]
	lsl r1, r6, #0x18
	ldr r3, [sp, #0x50]
	lsr r1, r1, #0x18
	bl ov96_02208658
	ldr r0, [sp, #0x50]
	cmp r0, #0
	bne _02206724
	mov r1, #0x1f
	ldr r0, [sp, #0x38]
	mvn r1, r1
	cmp r0, r1
	blt _022066DA
	mov r1, #0x12
	lsl r1, r1, #4
	cmp r0, r1
	ble _022066E8
_022066DA:
	mov r1, #0x1f
	ldr r0, [sp, #0x24]
	mvn r1, r1
	cmp r0, r1
	blt _0220671C
	cmp r0, #0xe0
	bgt _0220671C
_022066E8:
	ldr r0, [sp, #0x58]
	mov r1, #1
	bl ov96_021EAB38
	b _02206724
	nop
_022066F4: .word 0x000001FF
_022066F8: .word 0x00000518
_022066FC: .word 0x000008A3
_02206700: .word 0x000008CE
_02206704: .word 0x0000051A
_02206708: .word 0x000008CD
_0220670C: .word 0x00000534
_02206710: .word 0x00000524
_02206714: .word 0x00000554
_02206718: .word 0x00000544
_0220671C:
	ldr r0, [sp, #0x58]
	mov r1, #0
	bl ov96_021EAB38
_02206724:
	mov r7, #0
	add r5, r4, #0
_02206728:
	ldr r0, [r5]
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0x24]
	bl ov96_021EAF94
	add r7, r7, #1
	add r5, r5, #4
	cmp r7, #3
	blt _02206728
	add r1, sp, #0x6c
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [sp, #0x2c]
	add r1, r6, #0
	str r0, [sp, #0x6c]
	ldr r0, [sp, #0x28]
	str r0, [sp, #0x70]
	ldr r0, [sp, #0x14]
	ldr r2, [sp, #0x30]
	bl ov96_021E60C0
	ldrb r0, [r0, #5]
	cmp r0, #0
	beq _02206768
	mov r0, #6
	ldr r1, [sp, #0x70]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0x70]
	b _02206772
_02206768:
	mov r0, #1
	ldr r1, [sp, #0x70]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x70]
_02206772:
	ldr r0, [r4, #0x48]
	add r1, sp, #0x6c
	bl ov96_021EB588
	ldr r1, [sp, #0x24]
	add r0, r4, #0
	bl ov96_02207718
	ldr r0, [sp, #0x50]
	cmp r0, #0
	bne _02206854
	ldr r0, [sp, #0x4c]
	mov r5, #0
	cmp r0, #1
	bne _02206812
	add r0, r4, #0
	add r0, #0xa3
	ldrb r1, [r0]
	ldr r0, [sp, #0x4c]
	cmp r0, r1
	beq _022067A6
	mov r1, #1
	ldr r0, [r4, #0x48]
	add r2, r1, #0
	bl ov96_021EB52C
_022067A6:
	ldr r0, [sp, #0x58]
	mov r1, #0x15
	bl ov96_021EAC5C
	add r0, r4, #0
	mov r1, #0
	add r0, #0x72
	strb r1, [r0]
	ldr r0, [sp, #0x34]
	mov r5, #1
	cmp r0, r6
	bne _022067E8
	mov r0, #3
	bl sub_02006190
	cmp r0, #0
	bne _0220681C
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	mov r2, #0x89
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	lsl r2, r2, #4
	add r3, r5, #0
	bl ov96_02207C38
	b _0220681C
_022067E8:
	mov r0, #4
	bl sub_02006190
	cmp r0, #0
	bne _0220681C
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	mov r2, #0x89
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	lsl r2, r2, #4
	mov r3, #0
	bl ov96_02207C38
	b _0220681C
_02206812:
	ldr r0, [r4, #0x48]
	mov r1, #1
	add r2, r5, #0
	bl ov96_021EB52C
_0220681C:
	cmp r5, #0
	bne _02206866
	ldr r0, [sp, #0x58]
	ldr r1, [sp, #0x54]
	bl ov96_021EAC08
	add r0, r4, #0
	add r0, #0x72
	ldrb r0, [r0]
	cmp r0, #0
	beq _0220684A
	ldr r0, [sp, #0x58]
	mov r1, #0x1a
	bl ov96_021EAC5C
	add r0, r4, #0
	add r0, #0x72
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r4, #0
	add r0, #0x72
	strb r1, [r0]
	b _02206866
_0220684A:
	ldr r0, [sp, #0x58]
	mov r1, #0
	bl ov96_021EAC5C
	b _02206866
_02206854:
	ldr r0, [r4, #0x48]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0x58]
	ldr r1, [sp, #0x54]
	bl ov96_021EAC0C
_02206866:
	add r1, r4, #0
	ldr r0, [sp, #0x4c]
	add r1, #0xa3
	strb r0, [r1]
	ldr r0, [sp, #0x44]
	ldr r0, [r0]
	lsr r1, r0, #0x1c
	mov r0, #0xf
	and r0, r1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	mov r1, #0x37
	ldr r0, [sp, #0x60]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_02208840
	add r0, r4, #0
	add r0, #0x73
	ldrb r1, [r0]
	cmp r1, r5
	bhs _022068F2
	add r0, r4, #0
	mov r1, #0xa
	add r0, #0x72
	strb r1, [r0]
	ldr r0, [r4, #0x54]
	mov r1, #8
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r4, #0x54]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0x34]
	cmp r0, r6
	bne _022068D4
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, _02206A14 ; =0x000005E2
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	mov r3, #1
	bl ov96_02207C38
	b _0220690E
_022068D4:
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, _02206A18 ; =0x000005EB
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	mov r3, #0
	bl ov96_02207C38
	b _0220690E
_022068F2:
	ldr r0, [sp, #0x50]
	cmp r0, #0
	bne _0220690E
	cmp r1, r5
	bls _0220690E
	ldr r0, [r4, #0x54]
	mov r1, #9
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r4, #0x54]
	add r2, r1, #0
	bl ov96_021EB52C
_0220690E:
	add r0, r4, #0
	add r0, #0x73
	strb r5, [r0]
	ldr r0, [r4, #0x54]
	add r1, sp, #0x78
	bl ov96_021EB588
	ldr r0, [sp, #0x44]
	ldr r1, _02206A1C ; =0x000003FF
	ldr r0, [r0]
	lsr r0, r0, #0x12
	and r0, r1
	lsl r0, r0, #0x10
	lsr r7, r0, #0x10
	ldr r0, [sp, #0x18]
	cmp r0, r6
	bne _0220693C
	ldr r0, [sp, #0x60]
	sub r1, #0x8f
	ldr r0, [r0, r1]
	add r1, r7, #0
	bl ov96_02208374
_0220693C:
	add r0, r4, #0
	add r0, #0xae
	ldrh r0, [r0]
	cmp r0, r7
	bhs _022069D4
	add r0, r4, #0
	add r0, #0x78
	ldrh r0, [r0]
	mov r1, #3
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #0x4c]
	bl ov96_021EB564
	add r0, r4, #0
	add r0, #0x78
	ldrh r0, [r0]
	mov r1, #1
	add r2, r1, #0
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #0x4c]
	bl ov96_021EB52C
	add r0, r4, #0
	add r0, #0x78
	ldrh r0, [r0]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r4, #0
	add r1, r2, r1
	add r0, #0x78
	strh r1, [r0]
	mov r1, #0x37
	ldr r0, [sp, #0x60]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	add r1, r6, #0
	bl ov96_02208864
	ldr r0, [sp, #0x34]
	cmp r0, r6
	bne _022069B8
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, _02206A20 ; =0x0000088F
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	mov r3, #1
	bl ov96_02207C38
	b _022069D4
_022069B8:
	ldr r1, [sp, #0x78]
	ldr r2, [sp, #0x7c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, _02206A20 ; =0x0000088F
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	mov r3, #0
	bl ov96_02207C38
_022069D4:
	mov r5, #0
_022069D6:
	lsl r0, r5, #2
	add r0, r4, r0
	ldr r0, [r0, #0x4c]
	add r1, sp, #0x78
	bl ov96_021EB588
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #2
	blo _022069D6
	add r0, r4, #0
	add r0, #0xae
	strh r7, [r0]
	ldr r0, [sp, #0x44]
	add r6, r6, #1
	add r0, r0, #4
	str r0, [sp, #0x44]
	ldr r0, [sp, #0x40]
	add r4, #0xb8
	add r0, r0, #2
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x3c]
	add r0, #0x28
	str r0, [sp, #0x3c]
	cmp r6, #4
	bge _02206A0E
	b _022065B2
_02206A0E:
	add sp, #0x9c
	pop {r4, r5, r6, r7, pc}
	nop
_02206A14: .word 0x000005E2
_02206A18: .word 0x000005EB
_02206A1C: .word 0x000003FF
_02206A20: .word 0x0000088F
	thumb_func_end ov96_02206380

	thumb_func_start ov96_02206A24
ov96_02206A24: ; 0x02206A24
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp]
	str r1, [sp, #4]
	str r2, [sp, #8]
	mov r7, #0
_02206A30:
	mov r0, #0xc
	add r1, r7, #0
	mul r1, r0
	ldr r0, [sp]
	add r5, r0, r1
	mov r0, #0xdf
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02206AB6
	mov r0, #0xe1
	lsl r0, r0, #2
	ldrh r1, [r5, r0]
	ldr r0, [sp, #4]
	sub r6, r1, r0
	ldr r0, _02206ABC ; =0x00000386
	add r6, #0x80
	ldrh r1, [r5, r0]
	ldr r0, [sp, #8]
	sub r4, r1, r0
	mov r0, #0
	str r0, [sp, #0x14]
	lsl r0, r6, #0xc
	add r4, #0x60
	str r0, [sp, #0xc]
	lsl r0, r4, #0xc
	str r0, [sp, #0x10]
	mov r0, #0xe
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	mov r0, #0x1f
	mvn r0, r0
	cmp r6, r0
	blt _02206A9E
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r6, r0
	bgt _02206A9E
	mov r0, #0x1f
	mvn r0, r0
	cmp r4, r0
	blt _02206A9E
	cmp r4, #0xe0
	bgt _02206A9E
	mov r0, #0xe
	lsl r0, r0, #6
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02206AAC
_02206A9E:
	mov r0, #0xe
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02206AAC:
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #0x14
	blo _02206A30
_02206AB6:
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02206ABC: .word 0x00000386
	thumb_func_end ov96_02206A24

	thumb_func_start ov96_02206AC0
ov96_02206AC0: ; 0x02206AC0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp]
	str r1, [sp, #4]
	str r2, [sp, #8]
	mov r7, #0
_02206ACC:
	ldr r0, [sp]
	lsl r1, r7, #4
	add r5, r0, r1
	ldr r0, _02206B70 ; =0x0000046C
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02206B6C
	ldr r0, _02206B74 ; =0x00000478
	ldrh r1, [r5, r0]
	ldr r0, [sp, #4]
	sub r6, r1, r0
	ldr r0, _02206B78 ; =0x0000047A
	add r6, #0x80
	ldrh r1, [r5, r0]
	ldr r0, [sp, #8]
	sub r4, r1, r0
	mov r0, #0
	str r0, [sp, #0x14]
	lsl r0, r6, #0xc
	add r4, #0x60
	str r0, [sp, #0xc]
	lsl r0, r4, #0xc
	str r0, [sp, #0x10]
	mov r0, #0x47
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	ldr r0, _02206B7C ; =0x00000474
	add r1, sp, #0xc
	ldr r0, [r5, r0]
	bl ov96_021EB588
	mov r0, #0x1f
	mvn r0, r0
	cmp r6, r0
	blt _02206B48
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r6, r0
	bgt _02206B48
	mov r0, #0x1f
	mvn r0, r0
	cmp r4, r0
	blt _02206B48
	cmp r4, #0xe0
	bgt _02206B48
	mov r0, #0x47
	lsl r0, r0, #4
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, _02206B7C ; =0x00000474
	mov r1, #1
	ldr r0, [r5, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02206B62
_02206B48:
	mov r0, #0x47
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, _02206B7C ; =0x00000474
	mov r1, #1
	ldr r0, [r5, r0]
	mov r2, #0
	bl ov96_021EB52C
_02206B62:
	add r0, r7, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #0xa
	blo _02206ACC
_02206B6C:
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02206B70: .word 0x0000046C
_02206B74: .word 0x00000478
_02206B78: .word 0x0000047A
_02206B7C: .word 0x00000474
	thumb_func_end ov96_02206AC0

	thumb_func_start ov96_02206B80
ov96_02206B80: ; 0x02206B80
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	add r5, r0, #0
	ldr r0, _02206C78 ; =0x00000564
	str r1, [sp]
	add r0, r5, r0
	str r2, [sp, #4]
	str r3, [sp, #8]
	mov r4, #0
	str r0, [sp, #0x18]
_02206B94:
	ldr r0, [sp]
	lsl r1, r4, #1
	add r0, r0, r1
	ldrh r1, [r0, #0x18]
	mov r0, #0x1f
	and r0, r1
	str r0, [sp, #0x14]
	lsl r0, r0, #2
	ldr r1, _02206C7C ; =0x000005C8
	add r0, r5, r0
	ldrh r2, [r0, r1]
	ldr r1, [sp, #4]
	sub r7, r2, r1
	ldr r1, _02206C80 ; =0x000005CA
	add r7, #0x80
	ldrh r1, [r0, r1]
	ldr r0, [sp, #8]
	sub r6, r1, r0
	mov r0, #0
	str r0, [sp, #0x24]
	lsl r0, r7, #0xc
	add r6, #0x60
	str r0, [sp, #0x1c]
	lsl r0, r6, #0xc
	str r0, [sp, #0x20]
	mov r0, #0x14
	mul r0, r4
	add r1, r5, r0
	str r0, [sp, #0x10]
	ldr r0, _02206C84 ; =0x00000568
	str r1, [sp, #0xc]
	ldr r0, [r1, r0]
	add r1, sp, #0x1c
	bl ov96_021EB588
	ldr r1, [sp, #0xc]
	ldr r0, _02206C88 ; =0x0000056C
	ldr r0, [r1, r0]
	add r1, sp, #0x1c
	bl ov96_021EB588
	mov r0, #0x1f
	mvn r0, r0
	cmp r7, r0
	blt _02206C22
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r7, r0
	bgt _02206C22
	mov r0, #0x1f
	mvn r0, r0
	cmp r6, r0
	blt _02206C22
	cmp r6, #0xe0
	bgt _02206C22
	mov r0, #0x14
	mul r0, r4
	add r7, r5, r0
	ldr r0, _02206C84 ; =0x00000568
	mov r1, #1
	ldr r0, [r7, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, _02206C88 ; =0x0000056C
	mov r1, #1
	ldr r0, [r7, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	b _02206C40
_02206C22:
	mov r0, #0x14
	mul r0, r4
	add r7, r5, r0
	ldr r0, _02206C84 ; =0x00000568
	mov r1, #1
	ldr r0, [r7, r0]
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, _02206C88 ; =0x0000056C
	mov r1, #1
	ldr r0, [r7, r0]
	mov r2, #0
	bl ov96_021EB52C
_02206C40:
	ldr r0, _02206C8C ; =0x00000513
	add r7, r5, r4
	ldrb r1, [r7, r0]
	ldr r0, [sp, #0x14]
	cmp r0, r1
	beq _02206C5E
	ldr r1, [sp, #0xc]
	ldr r0, _02206C88 ; =0x0000056C
	ldr r0, [r1, r0]
	mov r1, #4
	bl ov96_021EB564
	ldr r1, [sp, #0x14]
	ldr r0, _02206C8C ; =0x00000513
	strb r1, [r7, r0]
_02206C5E:
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x10]
	add r0, r1, r0
	add r1, r6, #0
	bl ov96_022076C0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #5
	blo _02206B94
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02206C78: .word 0x00000564
_02206C7C: .word 0x000005C8
_02206C80: .word 0x000005CA
_02206C84: .word 0x00000568
_02206C88: .word 0x0000056C
_02206C8C: .word 0x00000513
	thumb_func_end ov96_02206B80

	thumb_func_start ov96_02206C90
ov96_02206C90: ; 0x02206C90
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r1, #0x9f
	ldrb r1, [r1]
	ldr r5, [sp, #0x10]
	cmp r1, #3
	bhi _02206D54
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_02206CAA: ; jump table
	.short _02206CB2 - _02206CAA - 2 ; case 0
	.short _02206CC8 - _02206CAA - 2 ; case 1
	.short _02206D04 - _02206CAA - 2 ; case 2
	.short _02206D54 - _02206CAA - 2 ; case 3
_02206CB2:
	add r0, r4, #0
	mov r1, #0
	add r0, #0xa0
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_02206CC8:
	mov r0, #0x70
	ldrsh r1, [r4, r0]
	add r0, r4, #0
	add r0, #0x70
	add r1, #8
	strh r1, [r0]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xa0
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	cmp r0, #0x20
	blo _02206D54
	lsl r0, r3, #2
	ldr r0, [r4, r0]
	mov r1, #0
	bl ov96_021EAB38
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_02206D04:
	ldr r1, [sp, #0x18]
	cmp r1, #0
	beq _02206D26
	add r1, r3, #0
	bl ov96_02208448
	cmp r0, #0
	beq _02206D54
	mov r0, #1
	strb r0, [r5, #8]
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_02206D26:
	ldr r1, [sp, #0x14]
	cmp r1, #0
	beq _02206D48
	add r1, r2, #0
	bl ov96_02208608
	cmp r0, #0
	beq _02206D54
	mov r0, #1
	strb r0, [r5, #8]
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_02206D48:
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
_02206D54:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02206C90

	thumb_func_start ov96_02206D58
ov96_02206D58: ; 0x02206D58
	push {r4, lr}
	add r4, r0, #0
	add r0, #0x9f
	ldrb r0, [r0]
	cmp r0, #3
	bhi _02206DE8
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02206D70: ; jump table
	.short _02206D78 - _02206D70 - 2 ; case 0
	.short _02206D98 - _02206D70 - 2 ; case 1
	.short _02206DD2 - _02206D70 - 2 ; case 2
	.short _02206DE8 - _02206D70 - 2 ; case 3
_02206D78:
	add r0, r4, #0
	mov r1, #0
	add r0, #0xa0
	strb r1, [r0]
	lsl r0, r2, #2
	ldr r0, [r4, r0]
	mov r1, #1
	bl ov96_021EAB38
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r4, pc}
_02206D98:
	mov r0, #0x70
	ldrsh r1, [r4, r0]
	add r0, r4, #0
	add r0, #0x70
	sub r1, #8
	strh r1, [r0]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0xa0
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0xa0
	ldrb r0, [r0]
	cmp r0, #0x20
	blo _02206DE8
	add r0, r4, #0
	mov r1, #0
	add r0, #0x70
	strh r1, [r0]
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
	pop {r4, pc}
_02206DD2:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02206DDC
	mov r0, #2
	strb r0, [r3, #8]
_02206DDC:
	add r0, r4, #0
	add r0, #0x9f
	ldrb r0, [r0]
	add r4, #0x9f
	add r0, r0, #1
	strb r0, [r4]
_02206DE8:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02206D58

	thumb_func_start ov96_02206DEC
ov96_02206DEC: ; 0x02206DEC
	push {r3, r4, lr}
	sub sp, #0xc
	ldr r2, [r2, #0x10]
	lsr r2, r2, #0x17
	lsl r2, r2, #0x18
	lsr r4, r2, #0x18
	lsl r2, r3, #1
	asr r4, r2
	mov r2, #3
	and r2, r4
	lsl r2, r2, #0x18
	lsr r4, r2, #0x18
	add r2, r1, #0
	add r2, #0x9e
	ldrb r2, [r2]
	cmp r2, r4
	beq _02206E1C
	add r2, r1, #0
	add r2, #0x9e
	strb r4, [r2]
	add r2, r1, #0
	mov r4, #0
	add r2, #0x9f
	strb r4, [r2]
_02206E1C:
	add r2, r1, #0
	add r2, #0x9e
	ldrb r2, [r2]
	cmp r2, #0
	beq _02206E82
	cmp r2, #1
	beq _02206E32
	cmp r2, #2
	beq _02206E5C
	add sp, #0xc
	pop {r3, r4, pc}
_02206E32:
	ldr r2, [sp, #0x20]
	cmp r2, #0
	beq _02206E42
	ldr r2, [sp, #0x28]
	cmp r2, #0
	beq _02206E42
	mov r4, #1
	b _02206E44
_02206E42:
	mov r4, #0
_02206E44:
	ldr r2, [sp, #0x1c]
	str r2, [sp]
	ldr r2, [sp, #0x24]
	str r4, [sp, #4]
	str r2, [sp, #8]
	add r2, r3, #0
	add r3, sp, #8
	ldrb r3, [r3, #0x10]
	bl ov96_02206C90
	add sp, #0xc
	pop {r3, r4, pc}
_02206E5C:
	ldr r0, [sp, #0x20]
	cmp r0, #0
	beq _02206E6C
	ldr r0, [sp, #0x28]
	cmp r0, #0
	beq _02206E6C
	mov r2, #1
	b _02206E6E
_02206E6C:
	mov r2, #0
_02206E6E:
	ldr r0, [sp, #0x24]
	orr r0, r2
	str r0, [sp]
	add r2, sp, #8
	add r0, r1, #0
	add r1, r3, #0
	ldrb r2, [r2, #0x10]
	ldr r3, [sp, #0x1c]
	bl ov96_02206D58
_02206E82:
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02206DEC

	thumb_func_start ov96_02206E88
ov96_02206E88: ; 0x02206E88
	push {r3, r4, r5, r6, r7, lr}
	str r3, [sp]
	add r5, r1, #0
	add r1, r2, #0
	ldr r2, [sp]
	ldr r6, [sp, #0x18]
	bl ov96_021E60D8
	add r4, r0, #0
	ldr r0, [sp]
	mov r1, #0x14
	add r7, r0, #0
	ldrb r0, [r4]
	mul r7, r1
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl _itof
	bl _f2d
	ldr r3, _02206F18 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0x14]
	ldrb r0, [r4, #1]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x50]
	strb r0, [r1, #0x1c]
	ldrb r0, [r4, #4]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x14]
	bl _itof
	bl _f2d
	ldr r3, _02206F18 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0xc]
	ldrb r0, [r4, #1]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x28]
	bl _itof
	bl _f2d
	ldr r3, _02206F18 ; =0x40240000
	mov r2, #0
	bl _ddiv
	bl _d2f
	add r1, r6, r7
	str r0, [r1, #0x10]
	ldrb r0, [r4, #3]
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x3c]
	str r0, [r1, #0x18]
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02206F18: .word 0x40240000
	thumb_func_end ov96_02206E88

	thumb_func_start ov96_02206F1C
ov96_02206F1C: ; 0x02206F1C
	push {r3, r4, r5, r6, r7, lr}
	mov ip, r3
	mov r3, #0
	ldr r6, [sp, #0x18]
	mov r5, ip
	add r4, r3, #0
_02206F28:
	add r3, r3, #1
	stmia r5!, {r4}
	cmp r3, #0x14
	blt _02206F28
	asr r3, r1, #0xb
	lsr r3, r3, #0x14
	add r3, r1, r3
	asr r1, r3, #0xc
	mov lr, r1
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	asr r7, r1, #0xc
	ldr r1, _02206F9C ; =0x0000061C
	strb r4, [r6]
	add r3, r0, r1
_02206F48:
	mov r1, #0xdf
	lsl r1, r1, #2
	ldr r1, [r0, r1]
	cmp r1, #0
	beq _02206F98
	mov r1, #0xe1
	lsl r1, r1, #2
	ldrh r2, [r0, r1]
	mov r1, lr
	mov r5, #0x1f
	sub r2, r2, r1
	ldr r1, _02206FA0 ; =0x00000386
	add r2, #0x80
	ldrh r1, [r0, r1]
	mvn r5, r5
	sub r1, r1, r7
	add r1, #0x60
	cmp r2, r5
	blt _02206F8E
	mov r5, #0x12
	lsl r5, r5, #4
	cmp r2, r5
	bgt _02206F8E
	mov r2, #0x1f
	mvn r2, r2
	cmp r1, r2
	blt _02206F8E
	cmp r1, #0xe0
	bgt _02206F8E
	ldrb r2, [r6]
	add r1, r2, #1
	strb r1, [r6]
	lsl r2, r2, #2
	mov r1, ip
	str r3, [r1, r2]
_02206F8E:
	add r4, r4, #1
	add r0, #0xc
	add r3, r3, #4
	cmp r4, #0x14
	blt _02206F48
_02206F98:
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02206F9C: .word 0x0000061C
_02206FA0: .word 0x00000386
	thumb_func_end ov96_02206F1C

	thumb_func_start ov96_02206FA4
ov96_02206FA4: ; 0x02206FA4
	push {r4, r5}
	ldrh r5, [r1]
	ldrh r4, [r1, #2]
	add r3, r5, #0
	add r1, r4, #0
	sub r3, #0x10
	str r3, [r2]
	sub r1, #0x10
	str r1, [r2, #4]
	add r5, #0x10
	str r5, [r2, #8]
	str r1, [r2, #0xc]
	str r5, [r2, #0x10]
	add r4, #0x10
	str r4, [r2, #0x14]
	str r3, [r2, #0x18]
	str r4, [r2, #0x1c]
	ldr r3, [r2]
	ldr r1, [r2, #4]
	str r3, [r2, #0x20]
	str r1, [r2, #0x24]
	ldr r3, [r2, #8]
	ldr r1, [r2, #0xc]
	str r3, [r2, #0x28]
	str r1, [r2, #0x2c]
	ldr r3, [r2, #8]
	ldr r1, [r2, #0xc]
	str r3, [r2, #0x30]
	str r1, [r2, #0x34]
	ldr r3, [r2, #0x10]
	ldr r1, [r2, #0x14]
	str r3, [r2, #0x38]
	str r1, [r2, #0x3c]
	ldr r3, [r2, #0x10]
	ldr r1, [r2, #0x14]
	str r3, [r2, #0x40]
	str r1, [r2, #0x44]
	ldr r3, [r2, #0x18]
	ldr r1, [r2, #0x1c]
	str r3, [r2, #0x48]
	str r1, [r2, #0x4c]
	ldr r3, [r2, #0x18]
	ldr r1, [r2, #0x1c]
	str r3, [r2, #0x50]
	str r1, [r2, #0x54]
	ldr r3, [r2]
	ldr r1, [r2, #4]
	str r3, [r2, #0x58]
	str r1, [r2, #0x5c]
	ldr r1, [r2, #0x24]
	sub r1, r1, r0
	str r1, [r2, #0x24]
	ldr r1, [r2, #0x2c]
	sub r1, r1, r0
	str r1, [r2, #0x2c]
	ldr r1, [r2, #0x30]
	add r1, r1, r0
	str r1, [r2, #0x30]
	ldr r1, [r2, #0x38]
	add r1, r1, r0
	str r1, [r2, #0x38]
	ldr r1, [r2, #0x44]
	add r1, r1, r0
	str r1, [r2, #0x44]
	ldr r1, [r2, #0x4c]
	add r1, r1, r0
	str r1, [r2, #0x4c]
	ldr r1, [r2, #0x50]
	sub r1, r1, r0
	str r1, [r2, #0x50]
	add r2, #0x58
	ldr r1, [r2]
	sub r0, r1, r0
	str r0, [r2]
	pop {r4, r5}
	bx lr
	thumb_func_end ov96_02206FA4

	thumb_func_start ov96_0220703C
ov96_0220703C: ; 0x0220703C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xa4
	str r0, [sp, #4]
	ldr r0, [sp, #0xb8]
	str r2, [sp, #0xc]
	str r0, [sp, #0xb8]
	ldr r0, [sp, #4]
	str r1, [sp, #8]
	ldr r1, [r0]
	add r7, r3, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x24]
	ldr r0, [sp, #4]
	add r6, r3, #0
	ldr r1, [r0, #4]
	ldr r2, _022072F8 ; =0x0221CB00
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x28]
	ldr r0, [sp, #8]
	str r3, [sp, #0x10]
	ldr r1, [r0]
	add r5, r3, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x1c]
	ldr r0, [sp, #8]
	add r3, sp, #0x34
	ldr r1, [r0, #4]
	mov r4, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x20]
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r2!, {r0, r1}
	stmia r3!, {r0, r1}
	add r7, #0x28
	add r6, #0x20
_0220709C:
	add r3, sp, #0x34
	add r2, sp, #0x94
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	add r0, sp, #0x2c
	str r0, [sp]
	add r0, r6, #0
	add r1, r7, #0
	add r2, sp, #0x24
	add r3, sp, #0x1c
	bl sub_02020F4C
	cmp r0, #0
	beq _022070DA
	ldr r0, [sp, #0x2c]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0xb8]
	str r1, [r0]
	ldr r0, [sp, #0x30]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0xb8]
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	add r0, sp, #0x94
	lsl r1, r4, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_022070DA:
	mov r0, #0
	cmp r4, #0
	bne _0220710A
	cmp r4, #2
	bne _0220710A
	ldr r2, [sp, #0x28]
	ldr r1, [r5, #0x24]
	cmp r2, r1
	bne _0220712E
	ldr r2, [r5, #0x28]
	ldr r3, [r5, #0x20]
	cmp r3, r2
	bge _022070F8
	add r1, r3, #0
	b _022070FC
_022070F8:
	add r1, r2, #0
	add r2, r3, #0
_022070FC:
	ldr r3, [sp, #0x24]
	cmp r1, r3
	bgt _0220712E
	cmp r3, r2
	bgt _0220712E
	mov r0, #1
	b _0220712E
_0220710A:
	ldr r2, [sp, #0x24]
	ldr r1, [r5, #0x20]
	cmp r2, r1
	bne _0220712E
	ldr r2, [r5, #0x2c]
	ldr r3, [r5, #0x24]
	cmp r3, r2
	bge _0220711E
	add r1, r3, #0
	b _02207122
_0220711E:
	add r1, r2, #0
	add r2, r3, #0
_02207122:
	ldr r3, [sp, #0x28]
	cmp r1, r3
	bgt _0220712E
	cmp r3, r2
	bgt _0220712E
	mov r0, #1
_0220712E:
	cmp r0, #0
	beq _02207150
	ldr r2, [sp, #4]
	ldmia r2!, {r0, r1}
	str r2, [sp, #4]
	ldr r2, [sp, #0xb8]
	stmia r2!, {r0, r1}
	ldr r0, [sp, #4]
	str r2, [sp, #0xb8]
	ldr r1, [r0]
	add r0, r2, #0
	str r1, [r0]
	add r0, sp, #0x94
	lsl r1, r4, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_02207150:
	add r4, r4, #1
	add r7, #0x10
	add r6, #0x10
	add r5, #0x10
	cmp r4, #4
	blt _0220709C
	ldr r3, _022072FC ; =0x0221CAE0
	add r2, sp, #0x44
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [sp, #0xc]
	ldr r4, [sp, #0x10]
	mov r5, #0
	lsl r6, r0, #0xc
	add r7, sp, #0x6c
_02207172:
	add r3, sp, #0x44
	add r2, sp, #0x84
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r4]
	add r1, sp, #0x78
	lsl r0, r0, #0xc
	str r0, [sp, #0x78]
	ldr r0, [r4, #4]
	add r2, r7, #0
	lsl r0, r0, #0xc
	str r0, [sp, #0x7c]
	mov r0, #0
	str r0, [sp, #0x80]
	ldr r0, [sp, #8]
	bl VEC_Subtract
	add r0, r7, #0
	bl VEC_Mag
	cmp r0, r6
	bgt _022071E0
	ldr r3, [sp, #0xc]
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	add r2, sp, #0x78
	lsl r3, r3, #0xc
	bl ov96_02207390
	add r4, r0, #0
	ldr r0, [sp, #8]
	ldr r1, [sp, #4]
	add r2, sp, #0x60
	bl VEC_Subtract
	ldr r2, [sp, #4]
	add r0, r4, #0
	add r1, sp, #0x60
	add r3, sp, #0x54
	bl VEC_MultAdd
	ldr r1, [sp, #0x54]
	ldr r0, [sp, #0xb8]
	str r1, [r0]
	ldr r1, [sp, #0x58]
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	add r0, sp, #0x84
	lsl r1, r5, #2
	add sp, #0xa4
	ldr r0, [r0, r1]
	pop {r4, r5, r6, r7, pc}
_022071E0:
	add r5, r5, #1
	add r4, #8
	cmp r5, #4
	blt _02207172
	ldr r0, [sp, #8]
	ldr r1, [r0]
	ldr r0, [sp, #0x10]
	ldr r0, [r0]
	lsl r0, r0, #0xc
	cmp r0, r1
	bgt _022072F2
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x10]
	lsl r0, r0, #0xc
	cmp r1, r0
	bgt _022072F2
	ldr r0, [sp, #8]
	ldr r1, [r0, #4]
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #4]
	lsl r0, r0, #0xc
	cmp r0, r1
	bgt _022072F2
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x14]
	lsl r0, r0, #0xc
	cmp r1, r0
	bgt _022072F2
	ldr r3, [sp, #8]
	ldr r2, [sp, #0xb8]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0
	str r0, [r2]
	ldr r0, [sp, #0x10]
	ldr r3, [sp, #0x10]
	ldr r0, [r0]
	ldr r3, [r3, #0x10]
	str r0, [sp, #0x18]
	ldr r0, [sp, #8]
	str r3, [sp, #0x14]
	ldr r2, [r0]
	ldr r0, [sp, #0x18]
	lsl r3, r3, #0xc
	lsl r0, r0, #0xc
	sub r0, r0, r2
	sub r3, r3, r2
	mov ip, r1
	cmp r0, #0
	bge _0220724A
	sub r2, r1, #1
	mul r0, r2
_0220724A:
	cmp r3, #0
	bge _02207254
	mov r2, #0
	mvn r2, r2
	mul r3, r2
_02207254:
	cmp r0, r3
	bge _0220725C
	mov r6, #0xc
	b _02207260
_0220725C:
	add r0, r3, #0
	mov r6, #0xa
_02207260:
	ldr r2, [sp, #0x10]
	ldr r3, [sp, #8]
	ldr r4, [sp, #0x10]
	ldr r2, [r2, #4]
	ldr r5, [r3, #4]
	ldr r7, [r4, #0x14]
	lsl r3, r2, #0xc
	lsl r4, r7, #0xc
	sub r3, r3, r5
	sub r4, r4, r5
	cmp r3, #0
	bge _0220727E
	mov r5, #0
	mvn r5, r5
	mul r3, r5
_0220727E:
	cmp r4, #0
	bge _02207288
	mov r5, #0
	mvn r5, r5
	mul r4, r5
_02207288:
	cmp r3, r4
	bge _02207290
	mov r4, #9
	b _02207294
_02207290:
	add r3, r4, #0
	mov r4, #0xb
_02207294:
	cmp r0, r3
	bgt _022072A0
	mov r0, #1
	mov ip, r0
	add r0, r6, #0
	b _022072A4
_022072A0:
	mov r1, #1
	add r0, r4, #0
_022072A4:
	mov r3, ip
	cmp r3, #0
	beq _022072CE
	cmp r6, #0xc
	bne _022072BE
	ldr r2, [sp, #0x18]
	ldr r1, [sp, #0xc]
	sub r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1]
	pop {r4, r5, r6, r7, pc}
_022072BE:
	ldr r2, [sp, #0x14]
	ldr r1, [sp, #0xc]
	add r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1]
	pop {r4, r5, r6, r7, pc}
_022072CE:
	cmp r1, #0
	beq _022072F4
	cmp r4, #9
	bne _022072E4
	ldr r1, [sp, #0xc]
	sub r1, r2, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1, #4]
	pop {r4, r5, r6, r7, pc}
_022072E4:
	ldr r1, [sp, #0xc]
	add r1, r7, r1
	lsl r2, r1, #0xc
	ldr r1, [sp, #0xb8]
	add sp, #0xa4
	str r2, [r1, #4]
	pop {r4, r5, r6, r7, pc}
_022072F2:
	mov r0, #0
_022072F4:
	add sp, #0xa4
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022072F8: .word 0x0221CB00
_022072FC: .word 0x0221CAE0
	thumb_func_end ov96_0220703C

	thumb_func_start ov96_02207300
ov96_02207300: ; 0x02207300
	push {r4, r5, r6, r7, lr}
	sub sp, #0xcc
	str r1, [sp, #4]
	ldr r1, [sp, #0xe0]
	add r7, r3, #0
	str r1, [sp, #0xe0]
	ldr r1, [sp, #0xe4]
	add r6, r2, #0
	str r1, [sp, #0xe4]
	add r1, sp, #0xc
	str r1, [sp]
	ldr r1, [r7]
	ldr r2, [r7, #4]
	add r3, sp, #0x7c
	bl ov96_02206F1C
	mov r4, #0
	str r4, [sp, #8]
	add r0, sp, #0xc
	ldrb r0, [r0]
	cmp r0, #0
	ble _02207388
	add r5, sp, #0x7c
_0220732E:
	ldr r1, [r5]
	add r0, r6, #0
	add r2, sp, #0x1c
	bl ov96_02206FA4
	add r0, sp, #0x10
	str r0, [sp]
	ldr r1, [sp, #0xe0]
	add r0, r7, #0
	add r2, r6, #0
	add r3, sp, #0x1c
	bl ov96_0220703C
	cmp r0, #0
	beq _0220737C
	cmp r0, #9
	blt _02207360
	ldr r2, [sp, #0x10]
	ldr r1, [sp, #0xe4]
	str r2, [r1]
	ldr r2, [sp, #0x14]
	str r2, [r1, #4]
	mov r2, #0
	str r2, [r1, #8]
	b _02207374
_02207360:
	ldr r1, [sp, #4]
	cmp r0, r1
	beq _02207374
	ldr r2, [sp, #0x10]
	ldr r1, [sp, #0xe4]
	str r2, [r1]
	ldr r2, [sp, #0x14]
	str r2, [r1, #4]
	mov r2, #0
	str r2, [r1, #8]
_02207374:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #8]
	b _02207388
_0220737C:
	add r0, sp, #0xc
	ldrb r0, [r0]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, r0
	blt _0220732E
_02207388:
	ldr r0, [sp, #8]
	add sp, #0xcc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02207300

	thumb_func_start ov96_02207390
ov96_02207390: ; 0x02207390
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r0, #0
	add r6, r2, #0
	add r0, r1, #0
	add r1, r4, #0
	add r2, sp, #0
	add r7, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r5, r0, #0
	mul r5, r0
	add r0, sp, #0
	add r1, r6, #0
	bl VEC_DotProduct
	add r4, r0, #0
	add r0, r6, #0
	bl VEC_Mag
	add r1, r0, #0
	mul r1, r0
	add r0, r7, #0
	mul r0, r7
	sub r0, r1, r0
	mul r0, r5
	sub r0, r4, r0
	bl FX_Sqrt
	add r7, r0, #0
	sub r0, r7, r4
	add r1, r5, #0
	bl FX_Div
	add r6, r0, #0
	add r0, r4, r7
	neg r0, r0
	add r1, r5, #0
	bl FX_Div
	cmp r6, r0
	bgt _022073EC
	add r0, r6, #0
_022073EC:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02207390

	thumb_func_start ov96_022073F0
ov96_022073F0: ; 0x022073F0
	mov r2, #0x14
	mul r2, r1
	add r0, r0, r2
	ldr r3, _022073FC ; =_utof
	ldrb r0, [r0, #0x1c]
	bx r3
	.balign 4, 0
_022073FC: .word _utof
	thumb_func_end ov96_022073F0

	thumb_func_start ov96_02207400
ov96_02207400: ; 0x02207400
	push {r3, r4}
	ldr r4, [r0]
	ldr r3, [r1]
	add r3, r4, r3
	str r3, [r2]
	ldr r3, [r0, #4]
	ldr r0, [r1, #4]
	add r0, r3, r0
	str r0, [r2, #4]
	pop {r3, r4}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02207400

	thumb_func_start ov96_02207418
ov96_02207418: ; 0x02207418
	push {r4, r5, r6, r7, lr}
	sub sp, #0x84
	str r0, [sp, #8]
	mov r0, #0
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	str r0, [sp, #0x18]
	str r0, [sp, #0x80]
	str r0, [sp, #0x74]
	add r7, r0, #0
	add r6, r1, #0
_0220742E:
	add r0, r6, #0
	add r0, #0xb1
	ldrb r1, [r0]
	add r0, r6, #0
	add r0, #0xab
	ldrb r0, [r0]
	cmp r0, #0
	beq _02207440
	b _0220763C
_02207440:
	lsl r0, r1, #2
	ldr r0, [r6, r0]
	str r0, [sp, #0x20]
	add r0, sp, #0x2c
	str r0, [sp]
	ldr r2, [r6, #0x58]
	ldr r3, [r6, #0x5c]
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r0, [sp, #0x20]
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #0x30
	bl ov96_021EB0A4
	ldr r5, [sp, #0xc]
	mov r4, #0
_0220746A:
	cmp r7, r4
	beq _02207500
	add r0, r5, #0
	add r0, #0xab
	ldrb r0, [r0]
	cmp r0, #0
	bne _02207500
	ldr r0, [sp, #0x30]
	str r0, [sp, #0x14]
	add r0, r5, #0
	add r0, #0xb1
	ldrb r0, [r0]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	str r0, [sp, #0x1c]
	add r0, sp, #0x24
	str r0, [sp]
	ldr r1, [r5, #0x58]
	ldr r3, [r5, #0x5c]
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r0, [sp, #0x1c]
	asr r2, r2, #0xc
	add r3, sp, #0x28
	bl ov96_021EB0A4
	add r0, sp, #0x70
	str r0, [sp]
	add r0, sp, #0x34
	str r0, [sp, #4]
	ldr r1, [sp, #0x28]
	ldr r2, [sp, #0x24]
	ldr r0, [sp, #0x1c]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x6c
	bl ov96_021EAF78
	add r0, sp, #0x7c
	str r0, [sp]
	add r0, sp, #0x38
	str r0, [sp, #4]
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x2c]
	ldr r0, [sp, #0x20]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x78
	bl ov96_021EAF78
	add r0, sp, #0x78
	add r1, sp, #0x6c
	add r2, sp, #0x60
	bl VEC_Subtract
	add r0, sp, #0x60
	bl VEC_Mag
	ldr r2, [sp, #0x34]
	ldr r1, [sp, #0x38]
	add r1, r2, r1
	lsl r1, r1, #0xc
	cmp r0, r1
	blt _022074F6
	b _02207624
_022074F6:
	add r0, r6, r4
	add r0, #0x94
	ldrb r0, [r0]
	cmp r0, #0
	beq _02207502
_02207500:
	b _02207632
_02207502:
	ldr r0, [sp, #8]
	add r1, r6, #0
	add r2, r5, #0
	bl ov96_02207A34
	cmp r0, #0
	bne _0220751E
	add r0, r6, #0
	mov r1, #6
	add r0, #0xa4
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0xa4
	strb r1, [r0]
_0220751E:
	add r0, r6, #0
	add r0, #0x64
	bl VEC_Mag
	mov r1, #0xb
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _02207552
	add r1, sp, #0x54
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r0, r6, #0
	add r0, #0x64
	add r1, r0, #0
	bl VEC_Normalize
	add r1, r6, #0
	mov r0, #0xb
	add r1, #0x64
	lsl r0, r0, #0xc
	add r2, sp, #0x54
	add r3, r1, #0
	bl VEC_MultAdd
_02207552:
	add r0, r5, #0
	add r0, #0x64
	bl VEC_Mag
	mov r1, #0xb
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _02207586
	add r1, sp, #0x48
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r0, r5, #0
	add r0, #0x64
	add r1, r0, #0
	bl VEC_Normalize
	add r1, r5, #0
	mov r0, #0xb
	add r1, #0x64
	lsl r0, r0, #0xc
	add r2, sp, #0x48
	add r3, r1, #0
	bl VEC_MultAdd
_02207586:
	add r0, r6, r4
	add r0, #0x94
	ldrb r0, [r0]
	cmp r0, #0
	beq _02207594
	bl GF_AssertFail
_02207594:
	add r0, r5, r7
	add r0, #0x94
	ldrb r0, [r0]
	cmp r0, #0
	beq _022075A2
	bl GF_AssertFail
_022075A2:
	add r1, r6, r4
	mov r0, #1
	add r1, #0x94
	strb r0, [r1]
	add r1, r5, r7
	add r1, #0x94
	strb r0, [r1]
	ldr r1, [sp, #0x18]
	cmp r1, #0
	bne _022075EC
	add r2, sp, #0x3c
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	str r0, [sp, #0x18]
	add r0, sp, #0x6c
	add r1, sp, #0x78
	bl VEC_Subtract
	add r0, sp, #0x3c
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, [sp, #0x38]
	add r1, sp, #0x3c
	lsl r0, r0, #0xc
	add r2, sp, #0x78
	add r3, r1, #0
	bl VEC_MultAdd
	add r3, sp, #0x3c
	ldr r2, [sp, #0x10]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
_022075EC:
	mov r0, #1
	add r1, r6, #0
	str r0, [sp]
	add r1, #0x98
	add r2, r6, #0
	ldr r1, [r1]
	add r2, #0xb1
	lsl r1, r1, #0x18
	ldrb r2, [r2]
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	mov r3, #4
	bl ov96_021E8228
	add r1, r5, #0
	mov r0, #1
	str r0, [sp]
	add r1, #0x98
	ldr r1, [r1]
	add r5, #0xb1
	lsl r1, r1, #0x18
	ldrb r2, [r5]
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	mov r3, #4
	bl ov96_021E8228
	b _0220763C
_02207624:
	add r1, r6, r4
	add r1, #0x94
	mov r0, #0
	strb r0, [r1]
	add r1, r7, r5
	add r1, #0x94
	strb r0, [r1]
_02207632:
	add r4, r4, #1
	add r5, #0xb8
	cmp r4, #4
	bge _0220763C
	b _0220746A
_0220763C:
	add r7, r7, #1
	add r6, #0xb8
	cmp r7, #4
	bge _02207646
	b _0220742E
_02207646:
	ldr r0, [sp, #0x18]
	add sp, #0x84
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02207418

	thumb_func_start ov96_0220764C
ov96_0220764C: ; 0x0220764C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	mov r7, #0x47
	mov r6, #0
	add r4, r5, #0
	lsl r7, r7, #4
_02207658:
	ldr r0, _022076BC ; =0x00000474
	mov r1, #3
	ldr r0, [r4, r0]
	bl ov96_021EB630
	mov r0, #0x47
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021EB594
	ldr r1, [r0, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	bl ov96_02207BD8
	add r1, r0, #0
	ldr r0, [r4, r7]
	add r1, r1, #7
	bl ov96_021EB630
	add r6, r6, #1
	add r4, #0x10
	cmp r6, #0xa
	blt _02207658
	mov r7, #0xe
	lsl r7, r7, #6
	mov r4, #0
	add r6, r7, #0
_02207694:
	ldr r0, [r5, r7]
	bl ov96_021EB594
	ldr r1, [r0, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	bl ov96_02207BD8
	add r1, r0, #0
	ldr r0, [r5, r6]
	add r1, r1, #1
	bl ov96_021EB630
	add r4, r4, #1
	add r5, #0xc
	cmp r4, #0x14
	blt _02207694
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022076BC: .word 0x00000474
	thumb_func_end ov96_0220764C

	thumb_func_start ov96_022076C0
ov96_022076C0: ; 0x022076C0
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, r1, #0
	bl ov96_02207BD8
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r5, #4]
	add r1, #9
	bl ov96_021EB630
	add r4, #8
	ldr r0, [r5, #8]
	add r1, r4, #0
	bl ov96_021EB630
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_022076C0

	thumb_func_start ov96_022076E4
ov96_022076E4: ; 0x022076E4
	push {r3, r4, r5, r6, r7, lr}
	mov r7, #0xd7
	lsl r7, r7, #2
	add r5, r0, #0
	mov r4, #0
	add r6, r7, #0
_022076F0:
	ldr r0, [r5, r7]
	bl ov96_021EB594
	ldr r1, [r0, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	bl ov96_02207BD8
	add r1, r0, #0
	ldr r0, [r5, r6]
	add r1, r1, #2
	bl ov96_021EB630
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _022076F0
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022076E4

	thumb_func_start ov96_02207718
ov96_02207718: ; 0x02207718
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r0, r1, #0
	bl ov96_02207BD8
	add r6, r0, #0
	ldr r0, [r5, #0x48]
	add r1, r6, #3
	bl ov96_021EB630
	mov r4, #0
_0220772E:
	ldr r0, [r5]
	add r1, r6, #4
	bl ov96_021EABA8
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _0220772E
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02207718

	thumb_func_start ov96_02207740
ov96_02207740: ; 0x02207740
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r0, [r4]
	ldr r2, _02207770 ; =0x0221CAC0
	add r1, r4, #4
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4, #0x14]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	nop
_02207770: .word 0x0221CAC0
	thumb_func_end ov96_02207740

	thumb_func_start ov96_02207774
ov96_02207774: ; 0x02207774
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r7, r1, #0
	add r0, r5, #4
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r2, _022077EC ; =0x00000135
	ldr r3, [r5, #0x14]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r4, r0, #0
	ldr r0, [r5, #0x14]
	bl ScrStrBufs_new
	mov r1, #0
	str r1, [sp]
	mov r2, #1
	str r2, [sp, #4]
	add r2, r7, #0
	mov r3, #3
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x14]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0x9d
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _022077F0 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #4
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r4, #0
	bl DestroyMsgData
	add r0, r5, #4
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022077EC: .word 0x00000135
_022077F0: .word 0x000F0E00
	thumb_func_end ov96_02207774

	thumb_func_start ov96_022077F4
ov96_022077F4: ; 0x022077F4
	ldr r1, _022077FC ; =0x00000618
	mov r2, #0
	strh r2, [r0, r1]
	bx lr
	.balign 4, 0
_022077FC: .word 0x00000618
	thumb_func_end ov96_022077F4

	thumb_func_start ov96_02207800
ov96_02207800: ; 0x02207800
	push {r4, lr}
	add r4, r0, #0
	add r0, #0xb4
	ldrh r0, [r0]
	mov r1, #0x14
	add r0, r0, #1
	bl _s32_div_f
	add r4, #0xb4
	strh r1, [r4]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02207800

	thumb_func_start ov96_02207818
ov96_02207818: ; 0x02207818
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r1, #0
	add r2, r5, #0
_02207820:
	ldr r0, [r2]
	cmp r0, #0
	bne _02207862
	mov r0, #0x14
	add r4, r1, #0
	mul r4, r0
	add r0, r5, #0
	add r0, #0xb4
	ldrh r1, [r0]
	add r0, r5, r4
	str r1, [r0, #0xc]
	add r1, r5, #0
	add r1, #0xb4
	ldrh r1, [r1]
	lsl r1, r1, #2
	add r1, r5, r1
	add r1, #0x64
	ldrh r1, [r1]
	strh r1, [r0, #0x10]
	add r1, r5, #0
	add r1, #0xb4
	ldrh r1, [r1]
	lsl r1, r1, #2
	add r1, r5, r1
	add r1, #0x66
	ldrh r1, [r1]
	strh r1, [r0, #0x12]
	add r0, r5, #0
	bl ov96_02207800
	mov r0, #1
	str r0, [r5, r4]
	pop {r3, r4, r5, pc}
_02207862:
	add r1, r1, #1
	add r2, #0x14
	cmp r1, #5
	blt _02207820
	bl GF_AssertFail
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02207818

	thumb_func_start ov96_02207870
ov96_02207870: ; 0x02207870
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, _022078A8 ; =0x0000061A
	mov r4, #0
	ldrh r1, [r5, r0]
	mov r0, #5
	sub r6, r0, r1
	cmp r6, #0
	ble _022078A4
	ldr r7, _022078A8 ; =0x0000061A
_02207884:
	ldr r0, _022078AC ; =0x00000564
	add r0, r5, r0
	bl ov96_02207818
	ldrh r0, [r5, r7]
	add r0, r0, #1
	strh r0, [r5, r7]
	ldr r0, _022078A8 ; =0x0000061A
	ldrh r0, [r5, r0]
	cmp r0, #5
	bls _0220789E
	bl GF_AssertFail
_0220789E:
	add r4, r4, #1
	cmp r4, r6
	blt _02207884
_022078A4:
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022078A8: .word 0x0000061A
_022078AC: .word 0x00000564
	thumb_func_end ov96_02207870

	thumb_func_start ov96_022078B0
ov96_022078B0: ; 0x022078B0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r7, r0, #0
	add r5, r1, #0
	mov r6, #0
	add r0, r2, #0
	strb r6, [r0]
	add r0, r5, #0
	str r0, [sp, #4]
	add r0, #0x58
	str r2, [sp]
	add r4, r7, #0
	str r0, [sp, #4]
_022078CA:
	ldr r0, [r4]
	cmp r0, #0
	beq _02207978
	ldr r0, [r4, #0xc]
	lsl r0, r0, #2
	add r0, r7, r0
	add r0, #0x64
	ldrh r0, [r0]
	lsl r0, r0, #0xc
	str r0, [sp, #8]
	ldr r0, [r4, #0xc]
	lsl r0, r0, #2
	add r0, r7, r0
	add r0, #0x66
	ldrh r0, [r0]
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	add r0, r5, #0
	add r0, #0xb1
	ldrb r0, [r0]
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	bl ov96_021EAF8C
	add r2, r0, #0
	mov r3, #2
	ldr r0, [sp, #4]
	add r1, sp, #8
	lsl r2, r2, #0xc
	lsl r3, r3, #0xe
	bl ov96_02207990
	cmp r0, #0
	beq _0220796E
	add r0, r5, #0
	add r0, #0xaa
	ldrb r0, [r0]
	cmp r0, #9
	blo _02207932
	add r5, #0xb3
	ldrb r0, [r5, r6]
	cmp r0, #0
	bne _0220792C
	ldr r0, [sp]
	mov r1, #1
	strb r1, [r0]
	strb r1, [r5, r6]
_0220792C:
	add sp, #0x14
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_02207932:
	add r0, r5, r6
	mov r1, #1
	add r0, #0xb3
	strb r1, [r0]
	mov r0, #0x14
	mov r1, #0
	mul r0, r6
	str r1, [r7, r0]
	add r0, r5, #0
	add r0, #0xaa
	ldrb r0, [r0]
	add r5, #0xaa
	add r0, r0, #1
	strb r0, [r5]
	add r0, r7, #0
	add r0, #0xb6
	ldrh r0, [r0]
	cmp r0, #0
	bne _0220795C
	bl GF_AssertFail
_0220795C:
	add r0, r7, #0
	add r0, #0xb6
	ldrh r0, [r0]
	add r7, #0xb6
	add sp, #0x14
	sub r0, r0, #1
	strh r0, [r7]
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_0220796E:
	add r1, r5, r6
	add r1, #0xb3
	mov r0, #0
	strb r0, [r1]
	b _02207980
_02207978:
	add r1, r5, r6
	add r1, #0xb3
	mov r0, #0
	strb r0, [r1]
_02207980:
	add r6, r6, #1
	add r4, #0x14
	cmp r6, #5
	blt _022078CA
	mov r0, #0
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022078B0

	thumb_func_start ov96_02207990
ov96_02207990: ; 0x02207990
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r2, #0
	add r2, sp, #0
	add r4, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r1, r5, r4
	cmp r0, r1
	bge _022079B0
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_022079B0:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02207990

	thumb_func_start ov96_022079B8
ov96_022079B8: ; 0x022079B8
	push {r3, r4, lr}
	sub sp, #0x24
	add r1, sp, #0x18
	mov r4, #1
	bl VEC_Normalize
	add r0, sp, #0x18
	bl VEC_Mag
	cmp r0, #0
	beq _02207A2A
	ldr r4, _02207A30 ; =0x0221CAC8
	add r3, sp, #0xc
	ldmia r4!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r4]
	add r1, sp, #0
	str r0, [r3]
	ldr r0, [sp, #0x1c]
	str r0, [sp]
	ldr r0, [sp, #0x18]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #4]
	add r0, r2, #0
	bl sub_02020C64
	mov r2, #2
	lsl r2, r2, #0xc
	cmp r0, r2
	bls _02207A00
	mov r1, #0xe
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _02207A04
_02207A00:
	mov r4, #4
	b _02207A2A
_02207A04:
	cmp r0, r2
	bls _02207A14
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	bhs _02207A14
	mov r4, #2
	b _02207A2A
_02207A14:
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _02207A28
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	bhi _02207A28
	mov r4, #3
	b _02207A2A
_02207A28:
	mov r4, #1
_02207A2A:
	add r0, r4, #0
	add sp, #0x24
	pop {r3, r4, pc}
	.balign 4, 0
_02207A30: .word 0x0221CAC8
	thumb_func_end ov96_022079B8

	thumb_func_start ov96_02207A34
ov96_02207A34: ; 0x02207A34
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r1, #0
	add r7, r0, #0
	add r0, r4, #0
	add r5, r2, #0
	add r0, #0x64
	bl VEC_Mag
	add r6, r0, #0
	add r0, r5, #0
	add r0, #0x64
	bl VEC_Mag
	cmp r6, r0
	ble _02207A58
	add r6, r4, #0
	b _02207A68
_02207A58:
	cmp r6, r0
	bge _02207A62
	add r6, r5, #0
	add r5, r4, #0
	b _02207A68
_02207A62:
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02207A68:
	add r0, r6, #0
	add r0, #0xb0
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0xb0
	ldrb r0, [r0]
	cmp r1, r0
	beq _02207A7E
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02207A7E:
	add r0, r6, #0
	add r0, #0x64
	bl ov96_022079B8
	add r1, r6, #0
	add r1, #0xb0
	ldrb r1, [r1]
	cmp r1, r0
	beq _02207A96
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02207A96:
	add r0, r6, #0
	add r0, #0xa6
	ldrb r0, [r0]
	cmp r0, #1
	bne _02207AA6
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02207AA6:
	add r0, r5, #0
	add r0, #0xaa
	ldrb r1, [r0]
	cmp r1, #2
	blo _02207ACA
	add r0, r5, #0
	add r0, #0xaa
	ldrb r0, [r0]
	sub r1, r0, #2
	add r0, r5, #0
	add r0, #0xaa
	strb r1, [r0]
	add r0, r6, #0
	add r0, #0xaa
	ldrb r0, [r0]
	add r1, r0, #2
	add r0, r6, #0
	b _02207ADC
_02207ACA:
	add r0, r6, #0
	add r0, #0xaa
	ldrb r0, [r0]
	add r1, r0, r1
	add r0, r6, #0
	add r0, #0xaa
	strb r1, [r0]
	mov r1, #0
	add r0, r5, #0
_02207ADC:
	add r0, #0xaa
	strb r1, [r0]
	add r0, r6, #0
	add r0, #0xaa
	ldrb r0, [r0]
	cmp r0, #9
	bls _02207AF2
	add r0, r6, #0
	mov r1, #9
	add r0, #0xaa
	strb r1, [r0]
_02207AF2:
	add r0, r5, #0
	mov r3, #1
	add r0, #0xa6
	strb r3, [r0]
	add r1, r5, #0
	add r2, r5, #0
	str r3, [sp]
	add r1, #0x98
	ldr r1, [r1]
	add r2, #0xb1
	lsl r1, r1, #0x18
	ldrb r2, [r2]
	add r0, r7, #0
	lsr r1, r1, #0x18
	bl ov96_021E8228
	add r0, r5, #0
	add r0, #0xb1
	ldrb r4, [r0]
	add r0, r6, #0
	add r0, #0x64
	bl VEC_Mag
	asr r3, r0, #0xb
	lsr r3, r3, #0x14
	add r3, r0, r3
	mov r1, #0x14
	add r2, r4, #0
	mul r2, r1
	add r2, r5, r2
	ldr r2, [r2, #0x18]
	asr r0, r3, #0xc
	add r2, r2, r0
	add r0, r5, #0
	add r0, #0xa2
	strb r2, [r0]
	add r2, sp, #4
	mov r0, #0
	str r0, [r2]
	str r0, [r2, #4]
	str r0, [r2, #8]
	add r2, r6, #0
	add r2, #0xb1
	ldrb r2, [r2]
	ldr r0, _02207B88 ; =0x45800000
	mul r1, r2
	add r1, r6, r1
	ldr r1, [r1, #0x14]
	bl _fmul
	bl _ftoi
	add r1, r6, #0
	add r3, r5, #0
	add r1, #0x64
	add r2, sp, #4
	add r3, #0x64
	bl VEC_MultAdd
	add r2, r6, #0
	add r3, sp, #4
	ldmia r3!, {r0, r1}
	add r2, #0x64
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r6, #0xa4
	str r0, [r2]
	mov r0, #0x12
	strb r0, [r6]
	mov r0, #6
	add r5, #0xa4
	strb r0, [r5]
	mov r0, #1
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02207B88: .word 0x45800000
	thumb_func_end ov96_02207A34

	thumb_func_start ov96_02207B8C
ov96_02207B8C: ; 0x02207B8C
	mov r1, #0x66
	ldr r2, [r0, #0x5c]
	lsl r1, r1, #0xe
	mov r3, #0
	cmp r2, r1
	ble _02207BAC
	mov r1, #0xd
	ldr r2, [r0, #0x58]
	lsl r1, r1, #0x10
	cmp r2, r1
	blt _02207BAC
	mov r1, #0x13
	lsl r1, r1, #0x10
	cmp r2, r1
	bgt _02207BAC
	mov r3, #1
_02207BAC:
	cmp r3, #0
	bne _02207BB4
	mov r0, #0
	bx lr
_02207BB4:
	add r1, r0, #0
	add r1, #0xaa
	ldrb r1, [r1]
	cmp r1, #0
	bne _02207BC2
	mov r0, #0
	bx lr
_02207BC2:
	add r0, #0xa6
	ldrb r0, [r0]
	cmp r0, #0
	bne _02207BCE
	mov r0, #1
	bx lr
_02207BCE:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02207B8C

	thumb_func_start ov96_02207BD4
ov96_02207BD4: ; 0x02207BD4
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02207BD4

	thumb_func_start ov96_02207BD8
ov96_02207BD8: ; 0x02207BD8
	mov r1, #1
	lsl r1, r1, #8
	sub r0, r1, r0
	lsl r0, r0, #3
	add r0, r0, #5
	bx lr
	thumb_func_end ov96_02207BD8

	thumb_func_start ov96_02207BE4
ov96_02207BE4: ; 0x02207BE4
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, _02207C30 ; =0x00000512
	ldrb r1, [r5, r0]
	cmp r1, #4
	blo _02207C2A
	sub r0, r0, #1
	ldr r1, [r5, #0x1c]
	ldrb r0, [r5, r0]
	ldr r4, [r1, #0x14]
	mov r1, #2
	lsl r6, r0, #0xb
	add r0, r4, r6
	lsl r1, r1, #0xa
	bl DC_FlushRange
	mov r1, #6
	mov r2, #2
	add r0, r4, r6
	lsl r1, r1, #0xa
	lsl r2, r2, #0xa
	bl sub_020D0224
	ldr r0, _02207C30 ; =0x00000512
	mov r1, #0
	strb r1, [r5, r0]
	sub r0, r0, #1
	ldrb r0, [r5, r0]
	mov r1, #6
	add r0, r0, #1
	bl _s32_div_f
	ldr r0, _02207C34 ; =0x00000511
	strb r1, [r5, r0]
	pop {r4, r5, r6, pc}
_02207C2A:
	add r1, r1, #1
	strb r1, [r5, r0]
	pop {r4, r5, r6, pc}
	.balign 4, 0
_02207C30: .word 0x00000512
_02207C34: .word 0x00000511
	thumb_func_end ov96_02207BE4

	thumb_func_start ov96_02207C38
ov96_02207C38: ; 0x02207C38
	push {r4, lr}
	cmp r0, #0
	blt _02207C60
	mov r4, #1
	lsl r4, r4, #8
	cmp r0, r4
	bge _02207C60
	cmp r1, #0
	blt _02207C60
	cmp r1, #0xc0
	bge _02207C60
	cmp r3, #0
	beq _02207C56
	mov r1, #3
	b _02207C58
_02207C56:
	mov r1, #4
_02207C58:
	lsl r0, r2, #0x10
	lsr r0, r0, #0x10
	bl sub_0200606C
_02207C60:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02207C38

	thumb_func_start ov96_02207C64
ov96_02207C64: ; 0x02207C64
	push {r4, r5, r6, lr}
	add r4, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r4, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	lsl r0, r1, #2
	lsl r1, r1, #1
	add r1, r5, r1
	ldrh r1, [r1, #0x18]
	ldr r0, [r5, r0]
	ldr r2, _02207CC8 ; =0x000003FF
	lsr r0, r0, #0x12
	asr r3, r1, #0xb
	mov r1, #0x1f
	and r0, r2
	and r1, r3
	lsl r0, r0, #0x10
	lsl r1, r1, #0x18
	lsr r0, r0, #0x10
	lsr r1, r1, #0x18
	add r0, r0, r1
	lsl r0, r0, #0x10
	lsr r5, r0, #0x10
	add r0, r2, #0
	sub r0, #0x18
	cmp r5, r0
	bls _02207CB6
	add r5, r2, #0
	sub r5, #0x18
_02207CB6:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E8318
	add r0, r6, #0
	add r1, r5, #0
	bl ov96_02207774
	pop {r4, r5, r6, pc}
	.balign 4, 0
_02207CC8: .word 0x000003FF
	thumb_func_end ov96_02207C64

	thumb_func_start ov96_02207CCC
ov96_02207CCC: ; 0x02207CCC
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	mov r1, #0x72
	lsl r1, r1, #2
	add r6, r0, #0
	str r2, [sp]
	bl AllocFromHeap
	mov r2, #0x72
	add r7, r0, #0
	mov r1, #0
	lsl r2, r2, #2
	bl MIi_CpuFill8
	str r6, [r7]
	ldr r0, [sp]
	str r4, [r7, #8]
	str r0, [r7, #4]
	add r0, r7, #0
	bl ov96_02208A4C
	ldr r2, _02207D60 ; =0x00000135
	mov r0, #1
	mov r1, #0x1b
	add r3, r6, #0
	bl NewMsgDataFromNarc
	str r0, [r7, #0x1c]
	add r0, r6, #0
	bl ScrStrBufs_new
	str r0, [r7, #0x20]
	mov r4, #0
	add r5, r7, #0
_02207D10:
	mov r0, #0xb
	add r1, r6, #0
	bl String_ctor
	mov r1, #0x6a
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _02207D10
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	bl ov96_021E5D50
	add r4, r0, #0
	mov r6, #0
	add r5, r7, #0
_02207D3A:
	mov r0, #0x6a
	lsl r0, r0, #2
	add r1, r4, #0
	ldr r0, [r5, r0]
	add r1, #0x12
	bl CopyU16ArrayToString
	add r6, r6, #1
	add r4, #0x28
	add r5, r5, #4
	cmp r6, #3
	blt _02207D3A
	add r0, r7, #0
	mov r1, #1
	bl ov96_022088AC
	add r0, r7, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02207D60: .word 0x00000135
	thumb_func_end ov96_02207CCC

	thumb_func_start ov96_02207D64
ov96_02207D64: ; 0x02207D64
	push {r3, r4, r5, r6, r7, lr}
	mov r7, #0x42
	lsl r7, r7, #2
	str r0, [sp]
	mov r4, #0
	add r5, r0, #0
	add r6, r7, #4
_02207D72:
	ldr r0, [r5, r7]
	bl FreeToHeap
	ldr r0, [r5, r6]
	bl FreeToHeap
	add r4, r4, #1
	add r5, #8
	cmp r4, #3
	blt _02207D72
	ldr r4, [sp]
	mov r5, #0
_02207D8A:
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	bl FreeToHeap
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #0xc
	blt _02207D8A
	ldr r0, [sp]
	ldr r0, [r0, #0x24]
	bl FreeToHeap
	mov r6, #0x6a
	ldr r4, [sp]
	mov r5, #0
	lsl r6, r6, #2
_02207DAC:
	ldr r0, [r4, r6]
	bl String_dtor
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #3
	blt _02207DAC
	ldr r0, [sp]
	ldr r0, [r0, #0x20]
	bl ScrStrBufs_delete
	ldr r0, [sp]
	ldr r0, [r0, #0x1c]
	bl DestroyMsgData
	ldr r0, [sp]
	add r0, #0xc
	bl RemoveWindow
	ldr r0, [sp]
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02207D64

	thumb_func_start ov96_02207DDC
ov96_02207DDC: ; 0x02207DDC
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xe2
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r1, #0
	mov r0, #2
	str r1, [sp]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r4]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xe2
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xe2
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xe2
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	ldr r0, [r4]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xe2
	mov r1, #9
	mov r2, #0
	add r3, #0x28
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x24]
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #4]
	mov r0, #0xe2
	add r2, r1, #0
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	add r0, r4, #0
	mov r1, #0
	bl ov96_02208374
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02207DDC

	thumb_func_start ov96_02207E7C
ov96_02207E7C: ; 0x02207E7C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	ldr r0, _02207F14 ; =0x0221CBCC
	add r5, r1, #0
	ldr r1, [r0, #8]
	ldr r0, [r0, #0xc]
	add r4, sp, #8
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	mov r6, #0
	mov r7, #2
_02207E92:
	str r7, [sp]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #9
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #6
	bl ov96_021EB2F4
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB334
	ldr r3, [r4]
	add r0, r5, #0
	mov r1, #0x5d
	mov r2, #0xa
	bl ov96_021EB36C
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _02207E92
	mov r0, #2
	str r0, [sp]
	add r0, r5, #0
	mov r1, #0xe2
	mov r2, #0xd
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #8
	str r0, [sp, #4]
	add r0, r5, #0
	mov r1, #0xe2
	mov r2, #0xa
	mov r3, #0x65
	bl ov96_021EB2F4
	add r0, r5, #0
	mov r1, #0xe2
	mov r2, #0xc
	mov r3, #0x65
	bl ov96_021EB334
	add r0, r5, #0
	mov r1, #0xe2
	mov r2, #0xb
	mov r3, #0x65
	bl ov96_021EB36C
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02207F14: .word 0x0221CBCC
	thumb_func_end ov96_02207E7C

	thumb_func_start ov96_02207F18
ov96_02207F18: ; 0x02207F18
	push {r4, r5, r6, r7, lr}
	sub sp, #0x34
	str r0, [sp, #4]
	mov r0, #0
	add r5, r1, #0
	str r0, [sp, #0x18]
	ldr r0, [sp, #4]
	mov r1, #0x4f
	lsl r1, r1, #2
	add r7, r0, r1
	add r1, #0x40
	str r0, [sp, #0x14]
	add r0, r0, r1
	str r2, [sp, #8]
	str r0, [sp, #0x10]
_02207F36:
	mov r2, #2
	add r0, r5, #0
	mov r1, #3
	mov r3, #0x65
	str r2, [sp]
	bl ov96_021EB3E4
	ldr r1, [sp, #0x14]
	mov r2, #2
	str r0, [r1, #0x38]
	mov r1, #3
	add r0, r5, #0
	mov r3, #0x65
	str r1, [sp]
	bl ov96_021EB3E4
	ldr r1, [sp, #0x14]
	mov r2, #2
	str r0, [r1, #0x40]
	mov r0, #0xa
	str r0, [sp]
	add r0, r5, #0
	mov r1, #3
	mov r3, #0x65
	bl ov96_021EB3E4
	ldr r1, [sp, #0x14]
	mov r3, #0x65
	str r0, [r1, #0x3c]
	mov r0, #0x13
	mov r1, #2
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	bl ov96_021EB3E4
	str r0, [r7, #8]
	mov r1, #0
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r7, #8]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0x15
	mov r1, #2
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r7, #4]
	mov r1, #9
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r7, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0x14
	mov r1, #2
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r7]
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x18]
	ldr r0, [r0, #0x38]
	add r1, #0x13
	bl ov96_021EB564
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x18]
	ldr r0, [r0, #0x40]
	add r1, r1, #5
	bl ov96_021EB564
	ldr r0, [r7]
	mov r1, #3
	bl ov96_021EB564
	mov r1, #1
	ldr r0, [r7]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r4, [sp, #0x10]
	mov r6, #0
_02207FF2:
	mov r0, #0x18
	mov r1, #2
	str r0, [sp]
	add r0, r5, #0
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #2
	stmia r4!, {r0}
	bl ov96_021EB564
	add r6, r6, #1
	cmp r6, #2
	blt _02207FF2
	ldr r0, [sp, #0x14]
	add r7, #0x10
	add r0, #0x1c
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, #8
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x18]
	add r0, r0, #1
	str r0, [sp, #0x18]
	cmp r0, #4
	blt _02207F36
	ldr r3, _022080E8 ; =0x0221CBF4
	add r2, sp, #0x1c
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #3
	str r0, [r2]
	mov r0, #0x16
	str r0, [sp]
	add r0, r5, #0
	mov r2, #2
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r2, #0x4e
	ldr r1, [sp, #4]
	lsl r2, r2, #2
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, r2]
	mov r1, #4
	bl ov96_021EB564
	mov r1, #0x4e
	ldr r0, [sp, #4]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	mov r1, #0x4e
	ldr r0, [sp, #4]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	add r1, sp, #0x1c
	bl ov96_021EB588
	ldr r1, [sp, #4]
	add r0, r5, #0
	bl ov96_02208914
	mov r0, #0
	ldr r4, [sp, #4]
	ldr r7, _022080EC ; =0x0221CBC4
	ldr r6, _022080F0 ; =0x0221CBC8
	str r0, [sp, #0xc]
_02208086:
	add r0, r5, #0
	bl ov96_021EB5E8
	ldr r3, [sp, #4]
	add r1, r0, #0
	ldr r0, [sp, #8]
	ldr r3, [r3]
	mov r2, #3
	bl ov96_021EA2C4
	mov r1, #0x6d
	lsl r1, r1, #2
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	mov r1, #1
	bl sub_02024830
	ldrb r0, [r7]
	add r1, sp, #0x28
	lsl r0, r0, #0xc
	str r0, [sp, #0x28]
	mov r0, #0xb1
	lsl r0, r0, #0xe
	str r0, [sp, #0x2c]
	mov r0, #0
	str r0, [sp, #0x30]
	mov r0, #0x6d
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl sub_020247D4
	mov r0, #0x6d
	lsl r0, r0, #2
	ldrb r1, [r6]
	ldr r0, [r4, r0]
	bl sub_020248F0
	ldr r0, [sp, #0xc]
	add r4, r4, #4
	add r0, r0, #1
	add r7, r7, #1
	add r6, r6, #1
	str r0, [sp, #0xc]
	cmp r0, #2
	blt _02208086
	add sp, #0x34
	pop {r4, r5, r6, r7, pc}
	nop
_022080E8: .word 0x0221CBF4
_022080EC: .word 0x0221CBC4
_022080F0: .word 0x0221CBC8
	thumb_func_end ov96_02207F18

	thumb_func_start ov96_022080F4
ov96_022080F4: ; 0x022080F4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	str r0, [sp, #8]
	add r5, r1, #0
	ldr r1, [sp, #8]
	mov r0, #0x14
	ldr r1, [r1]
	bl NARC_ctor
	str r0, [sp, #0x20]
	bl sub_02074490
	add r1, r0, #0
	mov r0, #0x60
	str r0, [sp]
	ldr r0, [sp, #8]
	mov r2, #5
	ldr r0, [r0]
	mov r3, #0xc0
	str r0, [sp, #4]
	mov r0, #0x14
	bl GfGfxLoader_GXLoadPal
	ldr r4, [sp, #8]
	mov r7, #0
	add r6, r4, #0
	add r6, #0xcc
_0220812A:
	ldr r0, [sp, #8]
	mov r1, #1
	ldr r0, [r0]
	lsl r1, r1, #0xc
	bl AllocFromHeapAtEnd
	add r1, r4, #0
	add r1, #0x9c
	str r0, [r1]
	ldrh r0, [r5, #2]
	mov r1, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x14]
	ldrh r0, [r5]
	ldr r2, [sp, #0x14]
	str r0, [sp, #0x10]
	bl sub_020741BC
	add r2, r4, #0
	add r2, #0x9c
	add r1, r0, #0
	ldr r0, [sp, #0x20]
	ldr r2, [r2]
	bl NARC_ReadWholeMember
	add r0, r4, #0
	add r0, #0x9c
	ldr r0, [r0]
	add r1, r6, #0
	bl NNS_G2dGetUnpackedBGCharacterData
	ldr r0, [sp, #0x10]
	ldr r1, [sp, #0x14]
	mov r2, #0
	bl sub_02074364
	add r1, r0, #6
	ldr r0, [sp, #8]
	add r4, r4, #4
	add r0, r0, r7
	add r0, #0xfc
	add r7, r7, #1
	strb r1, [r0]
	add r5, r5, #4
	add r6, r6, #4
	cmp r7, #0xc
	blt _0220812A
	ldr r0, [sp, #0x20]
	bl NARC_dtor
	mov r0, #0
	ldr r6, [sp, #8]
	str r0, [sp, #0xc]
	mov r0, #0x70
	str r0, [sp, #0x1c]
	add r0, r6, #0
	str r0, [sp, #0x18]
	add r7, r6, #0
_022081A0:
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #8]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_0220831C
	mov r1, #1
	ldr r0, [r6, #0x38]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r1, #1
	ldr r0, [r6, #0x40]
	add r2, r1, #0
	bl ov96_021EB52C
	mov r0, #0
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x1c]
	add r1, sp, #0x24
	lsl r0, r0, #0xc
	str r0, [sp, #0x24]
	mov r0, #0x35
	lsl r0, r0, #0x10
	str r0, [sp, #0x28]
	ldr r0, [r6, #0x38]
	bl ov96_021EB588
	ldr r0, [r6, #0x40]
	add r1, sp, #0x24
	bl ov96_021EB588
	ldr r0, [r6, #0x3c]
	add r1, sp, #0x24
	bl ov96_021EB588
	ldr r5, [sp, #0x18]
	mov r4, #0
_022081EE:
	mov r0, #0x5f
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r1, sp, #0x24
	bl ov96_021EB588
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _022081EE
	mov r0, #2
	ldr r1, [sp, #0x28]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x28]
	mov r0, #0x4f
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	add r1, sp, #0x24
	bl ov96_021EB588
	mov r0, #5
	lsl r0, r0, #6
	ldr r0, [r7, r0]
	add r1, sp, #0x24
	bl ov96_021EB588
	mov r0, #0x51
	lsl r0, r0, #2
	ldr r0, [r7, r0]
	add r1, sp, #0x24
	bl ov96_021EB588
	ldr r0, [sp, #0x1c]
	add r6, #0x1c
	add r0, #0x28
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	add r7, #0x10
	add r0, #8
	str r0, [sp, #0x18]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	blt _022081A0
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022080F4

	thumb_func_start ov96_02208250
ov96_02208250: ; 0x02208250
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r0, #0
	mov r0, #0
	add r5, r1, #0
	str r0, [sp, #0xc]
	add r4, r6, #0
	add r7, sp, #0x10
_02208260:
	ldrb r0, [r5, #6]
	mov r3, #2
	str r0, [sp]
	ldrh r0, [r5, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	ldr r0, [r5, #0xc]
	str r0, [sp, #8]
	ldrh r1, [r5]
	ldrb r2, [r5, #7]
	add r0, sp, #0x10
	bl sub_020701E4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldrh r0, [r5]
	str r0, [sp, #8]
	ldrh r0, [r7]
	ldrh r1, [r7, #2]
	ldr r2, [r6]
	ldr r3, [r5, #0xc]
	bl sub_0201457C
	mov r1, #0x42
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldrh r0, [r7]
	ldrh r1, [r7, #4]
	ldr r2, [r6]
	bl sub_02014450
	mov r1, #0x43
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [sp, #0xc]
	add r5, #0x10
	add r0, r0, #1
	add r4, #8
	str r0, [sp, #0xc]
	cmp r0, #3
	blt _02208260
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02208250

	thumb_func_start ov96_022082BC
ov96_022082BC: ; 0x022082BC
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	add r5, r0, #0
	add r4, r2, #0
	cmp r6, #2
	blo _022082CC
	bl GF_AssertFail
_022082CC:
	cmp r4, #3
	blo _022082D4
	bl GF_AssertFail
_022082D4:
	mov r0, #0x42
	lsl r0, r0, #2
	lsl r4, r4, #3
	add r7, r5, r0
	mov r1, #0x32
	ldr r0, [r7, r4]
	lsl r1, r1, #6
	bl DC_FlushRange
	lsl r6, r6, #2
	mov r1, #0x12
	add r2, r5, r6
	lsl r1, r1, #4
	ldr r1, [r2, r1]
	mov r2, #0x32
	ldr r0, [r7, r4]
	lsl r2, r2, #6
	bl sub_020CFECC
	mov r0, #0x43
	lsl r0, r0, #2
	add r7, r5, r0
	ldr r0, [r7, r4]
	mov r1, #0x20
	bl DC_FlushRange
	mov r1, #0x4a
	add r2, r5, r6
	lsl r1, r1, #2
	ldr r1, [r2, r1]
	ldr r0, [r7, r4]
	mov r2, #0x20
	bl GXS_LoadOBJPltt
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022082BC

	thumb_func_start ov96_0220831C
ov96_0220831C: ; 0x0220831C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r4, r1, #0
	mov r0, #0x1c
	mul r0, r4
	add r0, r5, r0
	ldr r0, [r0, #0x38]
	add r6, r2, #0
	bl ov96_021EB5B8
	str r0, [sp]
	lsl r0, r4, #1
	add r0, r4, r0
	add r6, r6, r0
	add r7, r5, #0
	lsl r0, r6, #2
	mov r1, #2
	add r7, #0xcc
	str r0, [sp, #4]
	ldr r0, [r7, r0]
	lsl r1, r1, #8
	ldr r0, [r0, #0x14]
	bl DC_FlushRange
	ldr r0, [sp, #4]
	mov r1, #6
	ldr r0, [r7, r0]
	lsl r2, r4, #9
	lsl r1, r1, #0xa
	add r1, r2, r1
	mov r2, #2
	ldr r0, [r0, #0x14]
	lsl r2, r2, #8
	bl sub_020CFECC
	add r1, r5, r6
	add r1, #0xfc
	ldrb r1, [r1]
	ldr r0, [sp]
	bl sub_02024A14
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220831C

	thumb_func_start ov96_02208374
ov96_02208374: ; 0x02208374
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	mov r0, #0x64
	mul r0, r4
	sub r0, r6, r0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_022083FE:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x28]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	add r2, #0xe
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r1, #5
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #8]
	mov r3, #3
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _022083FE
	ldr r0, [r5, #8]
	mov r1, #5
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02208374

	thumb_func_start ov96_02208448
ov96_02208448: ; 0x02208448
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	mov r5, #0x67
	add r4, r0, #0
	lsl r5, r5, #2
	add r6, r1, #0
	ldr r1, [r4, r5]
	cmp r1, #3
	bhi _022084B4
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_02208466: ; jump table
	.short _0220846E - _02208466 - 2 ; case 0
	.short _022084D6 - _02208466 - 2 ; case 1
	.short _02208500 - _02208466 - 2 ; case 2
	.short _02208576 - _02208466 - 2 ; case 3
_0220846E:
	add r0, r5, #4
	ldrh r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x6c
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0x18
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #2
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #0x1c]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r2, #0
	bl ov96_021EB588
	mov r0, #0xe7
	ldr r1, [sp, #0x1c]
	lsl r0, r0, #0xe
	cmp r1, r0
	bge _022084B6
_022084B4:
	b _02208600
_022084B6:
	mov r0, #0xa5
	lsl r0, r0, #0xe
	str r0, [sp, #0x1c]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0x18
	bl ov96_021EB588
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _02208600
_022084D6:
	add r1, r5, #4
	ldrh r1, [r4, r1]
	add r2, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_022082BC
	add r3, r5, #4
	ldrh r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	strh r0, [r4, r3]
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _02208600
_02208500:
	add r0, r5, #4
	ldrh r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x6c
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r6, r0, #0
	add r3, sp, #0xc
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	mov r0, #2
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #0x10]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r2, #0
	bl ov96_021EB588
	mov r0, #0xd1
	ldr r1, [sp, #0x10]
	lsl r0, r0, #0xe
	cmp r1, r0
	blt _02208600
	str r0, [sp, #0x10]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0xc
	bl ov96_021EB588
	add r3, r5, #4
	ldrh r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	strh r0, [r4, r3]
	ldr r0, [r4, r5]
	add r0, r0, #1
	str r0, [r4, r5]
	b _02208600
_02208576:
	add r0, r5, #4
	ldrh r0, [r4, r0]
	lsl r0, r0, #2
	add r1, r4, r0
	add r0, r5, #0
	sub r0, #0x6c
	ldr r0, [r1, r0]
	bl ov96_021EB594
	add r3, r0, #0
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #2
	ldr r1, [sp, #4]
	lsl r0, r0, #0x10
	add r0, r1, r0
	str r0, [sp, #4]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	mov r0, #0xbb
	ldr r1, [sp, #4]
	lsl r0, r0, #0xe
	cmp r1, r0
	blt _02208600
	str r0, [sp, #4]
	add r0, r5, #4
	ldrh r1, [r4, r0]
	sub r0, #0x70
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, r7, #0
	bl ov96_021EB588
	add r3, r5, #4
	ldrh r0, [r4, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	strh r0, [r4, r3]
	add r0, r6, #2
	mov r1, #3
	bl _s32_div_f
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_022088AC
	mov r0, #0
	str r0, [r4, r5]
	add sp, #0x24
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_02208600:
	mov r0, #0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02208448

	thumb_func_start ov96_02208608
ov96_02208608: ; 0x02208608
	push {r3, r4, r5, lr}
	add r4, r0, #0
	add r5, r1, #0
	beq _02208614
	cmp r5, #4
	blo _02208618
_02208614:
	bl GF_AssertFail
_02208618:
	mov r1, #0x6f
	sub r0, r5, #1
	lsl r1, r1, #2
	lsl r0, r0, #2
	add r3, r4, r1
	ldrh r2, [r3, r0]
	add r2, #0x20
	strh r2, [r3, r0]
	ldrh r2, [r3, r0]
	cmp r2, #0x58
	blo _0220863C
	mov r2, #0
	add r1, r1, #2
	strh r2, [r3, r0]
	add r2, r4, r1
	ldrh r1, [r2, r0]
	add r1, r1, #1
	strh r1, [r2, r0]
_0220863C:
	ldr r1, _02208654 ; =0x000001BE
	add r2, r4, r1
	ldrh r1, [r2, r0]
	cmp r1, #3
	blo _0220864E
	mov r1, #0
	strh r1, [r2, r0]
	mov r0, #1
	pop {r3, r4, r5, pc}
_0220864E:
	mov r0, #0
	pop {r3, r4, r5, pc}
	nop
_02208654: .word 0x000001BE
	thumb_func_end ov96_02208608

	thumb_func_start ov96_02208658
ov96_02208658: ; 0x02208658
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	add r7, r3, #0
	mov r3, #0x69
	add r5, r0, #0
	lsl r3, r3, #2
	add r4, r1, #0
	add r6, r5, r3
	ldrb r3, [r6, r4]
	cmp r2, r3
	beq _02208674
	strb r2, [r6, r4]
	bl ov96_0220831C
_02208674:
	cmp r7, #0
	beq _022086B6
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, #0x28
	mul r0, r4
	add r0, #0x70
	lsl r0, r0, #0xc
	str r0, [sp, #0x10]
	ldr r0, _0220873C ; =0x00350004
	add r6, r4, #0
	str r0, [sp, #0x14]
	mov r0, #0x1c
	mul r6, r0
	add r0, r5, r6
	ldr r0, [r0, #0x38]
	add r1, sp, #0x10
	bl ov96_021EB588
	add r0, r5, r6
	ldr r0, [r0, #0x40]
	add r1, sp, #0x10
	bl ov96_021EB588
	mov r0, #0x4f
	lsl r0, r0, #2
	add r1, r5, r0
	lsl r0, r4, #4
	add r0, r1, r0
	mov r1, #0
	bl ov96_02208A80
	b _02208730
_022086B6:
	mov r0, #0
	str r0, [sp, #0xc]
	mov r0, #0x28
	mul r0, r4
	add r0, #0x70
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	mov r0, #0x35
	lsl r0, r0, #0x10
	str r0, [sp, #8]
	mov r0, #0x1c
	add r6, r4, #0
	mul r6, r0
	add r0, r5, r6
	ldr r0, [r0, #0x38]
	add r1, sp, #4
	bl ov96_021EB588
	add r0, r5, r6
	ldr r0, [r0, #0x40]
	add r1, sp, #4
	bl ov96_021EB588
	mov r0, #0x4f
	lsl r0, r0, #2
	add r1, r5, r0
	lsl r0, r4, #4
	add r0, r1, r0
	mov r1, #1
	bl ov96_02208A80
	ldr r1, [sp, #0x30]
	cmp r1, #1
	bne _02208724
	add r0, r5, r6
	add r0, #0x44
	ldrb r0, [r0]
	cmp r1, r0
	beq _02208730
	add r7, r5, #0
	mov r0, #0x1c
	mul r0, r4
	mov r1, #1
	add r7, #0x3c
	str r0, [sp]
	ldr r0, [r7, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp]
	mov r1, #1
	ldr r0, [r7, r0]
	bl ov96_021EB564
	b _02208730
_02208724:
	add r0, r5, r6
	ldr r0, [r0, #0x3c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02208730:
	add r0, r5, r6
	ldr r1, [sp, #0x30]
	add r0, #0x44
	strb r1, [r0]
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220873C: .word 0x00350004
	thumb_func_end ov96_02208658

	thumb_func_start ov96_02208740
ov96_02208740: ; 0x02208740
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, r1, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	mov r0, #0x6d
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	mov r0, #0x6e
	lsl r0, r0, #2
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, r0]
	add r1, r1, #1
	bl sub_020248F0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02208740

	thumb_func_start ov96_02208784
ov96_02208784: ; 0x02208784
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r7, r1, #0
	mov r6, #0
	add r4, r5, #0
_02208790:
	mov r0, #0x6d
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #2
	bl sub_02024ADC
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _02208790
	mov r6, #0
	add r4, r5, #0
_022087A8:
	mov r0, #0x13
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	mov r1, #2
	bl sub_02024ADC
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _022087A8
	mov r0, #1
	mov r2, #0
	add r1, sp, #4
_022087C6:
	cmp r2, r7
	bne _022087CC
	strb r2, [r1]
_022087CC:
	add r2, r2, #1
	cmp r2, #4
	blt _022087C6
	mov r2, #0
	add r4, sp, #4
	add r3, sp, #4
_022087D8:
	ldrb r1, [r3]
	cmp r1, r2
	beq _022087E8
	add r1, r0, #0
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	strb r2, [r4, r1]
_022087E8:
	add r2, r2, #1
	cmp r2, #4
	blt _022087D8
	mov r0, #3
	mov r6, #0
	str r0, [sp]
	add r4, sp, #4
	mov r7, #4
_022087F8:
	ldrb r1, [r4]
	mov r0, #0x1c
	mul r0, r1
	add r0, r5, r0
	ldr r0, [r0, #0x3c]
	ldr r1, [sp]
	bl ov96_021EB630
	ldrb r1, [r4]
	mov r0, #0x1c
	mul r0, r1
	add r0, r5, r0
	ldr r0, [r0, #0x38]
	add r1, r7, #0
	bl ov96_021EB630
	ldrb r1, [r4]
	mov r0, #0x1c
	mul r0, r1
	add r0, r5, r0
	add r1, r6, #0
	ldr r0, [r0, #0x40]
	add r1, #0xb
	bl ov96_021EB630
	ldr r0, [sp]
	add r6, r6, #1
	add r0, r0, #2
	str r0, [sp]
	add r4, r4, #1
	add r7, r7, #2
	cmp r6, #4
	blt _022087F8
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02208784

	thumb_func_start ov96_02208840
ov96_02208840: ; 0x02208840
	push {r4, r5, r6, lr}
	add r6, r2, #0
	add r5, r0, #0
	add r4, r1, #0
	cmp r6, #9
	bls _02208850
	bl GF_AssertFail
_02208850:
	lsl r0, r4, #4
	add r1, r5, r0
	mov r0, #5
	lsl r0, r0, #6
	ldr r0, [r1, r0]
	add r6, #9
	add r1, r6, #0
	bl ov96_021EB564
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02208840

	thumb_func_start ov96_02208864
ov96_02208864: ; 0x02208864
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r0, #0x5f
	lsl r0, r0, #2
	add r2, r5, r0
	add r0, #0x26
	ldrh r0, [r5, r0]
	lsl r1, r1, #3
	add r4, r2, r1
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	mov r1, #2
	bl ov96_021EB564
	ldr r0, _022088A8 ; =0x000001A2
	mov r1, #1
	ldrh r0, [r5, r0]
	add r2, r1, #0
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_021EB52C
	ldr r3, _022088A8 ; =0x000001A2
	ldrh r0, [r5, r3]
	add r0, r0, #1
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	strh r0, [r5, r3]
	pop {r3, r4, r5, pc}
	nop
_022088A8: .word 0x000001A2
	thumb_func_end ov96_02208864

	thumb_func_start ov96_022088AC
ov96_022088AC: ; 0x022088AC
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r4, r0, #0
	add r5, r1, #0
	add r0, #0xc
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r0, #1
	lsl r2, r5, #2
	add r5, r4, r2
	mov r2, #0x6a
	str r0, [sp]
	mov r3, #2
	str r3, [sp, #4]
	lsl r2, r2, #2
	ldr r0, [r4, #0x20]
	ldr r2, [r5, r2]
	mov r1, #0
	bl BufferString
	ldr r0, [r4, #0x20]
	ldr r1, [r4, #0x1c]
	ldr r3, [r4]
	mov r2, #0x9a
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r5, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02208910 ; =0x000F0E00
	add r2, r5, #0
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0xc
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add r4, #0xc
	add r0, r4, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02208910: .word 0x000F0E00
	thumb_func_end ov96_022088AC

	thumb_func_start ov96_02208914
ov96_02208914: ; 0x02208914
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	str r0, [sp, #4]
	ldr r0, _022089CC ; =0x0221CBCC
	str r1, [sp, #8]
	ldr r2, [r0]
	ldr r1, [r0, #4]
	str r2, [sp, #0x14]
	str r1, [sp, #0x18]
	ldr r1, [r0, #0x10]
	ldr r0, [r0, #0x14]
	add r5, sp, #0x14
	add r4, sp, #0xc
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r6, #0
	mov r7, #3
_02208936:
	ldr r0, [r4]
	add r1, r7, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	ldr r3, [r5]
	ldr r0, [sp, #4]
	lsl r3, r3, #0x18
	mov r2, #2
	lsr r3, r3, #0x18
	bl ov96_021EB408
	add r6, r6, #1
	add r4, r4, #4
	add r5, r5, #4
	cmp r6, #2
	blt _02208936
	ldr r4, [sp, #8]
	mov r5, #0
	add r7, sp, #0xc
	add r6, sp, #0x14
_02208960:
	ldr r1, [r6]
	ldr r2, [r7]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021EB4F4
	mov r1, #0x13
	lsl r1, r1, #4
	str r0, [r4, r1]
	add r0, r1, #0
	ldr r0, [r4, r0]
	bl ov96_021EB5B8
	mov r1, #0
	str r1, [sp, #0x24]
	mov r1, #0xa
	lsl r1, r1, #0xe
	str r1, [sp, #0x1c]
	mov r1, #1
	sub r2, r1, r5
	mov r1, #0x58
	mul r1, r2
	add r1, #0x30
	lsl r2, r1, #0xc
	mov r1, #0xaf
	lsl r1, r1, #0xe
	add r1, r2, r1
	str r1, [sp, #0x20]
	add r1, sp, #0x1c
	bl sub_020247D4
	mov r0, #0x13
	lsl r0, r0, #4
	mov r1, #1
	ldr r0, [r4, r0]
	add r2, r1, #0
	bl ov96_021EB52C
	add r5, r5, #1
	add r7, r7, #4
	add r6, r6, #4
	add r4, r4, #4
	cmp r5, #2
	blt _02208960
	ldr r0, [sp, #4]
	ldr r1, [sp, #8]
	bl ov96_022089D0
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022089CC: .word 0x0221CBCC
	thumb_func_end ov96_02208914

	thumb_func_start ov96_022089D0
ov96_022089D0: ; 0x022089D0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r7, r0, #0
	ldr r0, _02208A48 ; =0x0221CBCC
	str r1, [sp]
	ldr r1, [r0, #0x18]
	ldr r0, [r0, #0x1c]
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r4, #0
_022089E4:
	lsl r0, r4, #2
	add r1, sp, #0xc
	ldr r5, [r1, r0]
	str r0, [sp, #4]
	add r0, r7, #0
	add r1, r5, #0
	mov r2, #0
	bl ov96_021EB5EC
	ldr r6, [r0]
	add r0, r7, #0
	add r1, r5, #0
	mov r2, #1
	bl ov96_021EB5EC
	ldr r5, [r0]
	add r0, r6, #0
	bl sub_0200AF00
	add r6, r0, #0
	add r0, r5, #0
	add r1, r6, #0
	bl sub_0200B0F8
	str r0, [sp, #8]
	ldr r1, [sp]
	ldr r0, [sp, #4]
	add r5, r1, r0
	add r0, r6, #0
	mov r1, #2
	bl sub_020B802C
	mov r1, #0x12
	lsl r1, r1, #4
	str r0, [r5, r1]
	ldr r0, [sp, #8]
	mov r1, #2
	bl sub_020B8078
	mov r1, #0x4a
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _022089E4
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_02208A48: .word 0x0221CBCC
	thumb_func_end ov96_022089D0

	thumb_func_start ov96_02208A4C
ov96_02208A4C: ; 0x02208A4C
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r4, #8]
	ldr r2, _02208A7C ; =0x0221CBEC
	add r1, #0xc
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4, #8]
	mov r1, #4
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_02208A7C: .word 0x0221CBEC
	thumb_func_end ov96_02208A4C

	thumb_func_start ov96_02208A80
ov96_02208A80: ; 0x02208A80
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	ldr r0, [r5]
	mov r1, #1
	add r2, r4, #0
	bl ov96_021EB52C
	ldr r0, [r5, #8]
	mov r1, #1
	add r2, r4, #0
	bl ov96_021EB52C
	ldr r0, [r5, #4]
	mov r1, #1
	add r2, r4, #0
	bl ov96_021EB52C
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02208A80

	thumb_func_start ov96_02208AA8
ov96_02208AA8: ; 0x02208AA8
	push {r3, r4, r5, lr}
	add r5, r1, #0
	ldr r1, _02208AE0 ; =0x0000055C
	bl AllocFromHeap
	ldr r2, _02208AE0 ; =0x0000055C
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	ldr r0, _02208AE4 ; =0x00000554
	mov r1, #4
	sub r2, r1, r5
	strb r5, [r4, r0]
	add r1, r0, #5
	strb r2, [r4, r1]
	ldrb r2, [r4, r1]
	add r1, r0, #4
	strb r2, [r4, r1]
	add r1, r0, #3
	mov r2, #6
	strb r2, [r4, r1]
	ldrb r1, [r4, r1]
	add r0, r0, #2
	strb r1, [r4, r0]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	nop
_02208AE0: .word 0x0000055C
_02208AE4: .word 0x00000554
	thumb_func_end ov96_02208AA8

	thumb_func_start ov96_02208AE8
ov96_02208AE8: ; 0x02208AE8
	lsl r1, r1, #3
	str r2, [r0, r1]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02208AE8

	thumb_func_start ov96_02208AF0
ov96_02208AF0: ; 0x02208AF0
	mov r2, #0x62
	lsl r2, r2, #2
	str r1, [r0, r2]
	bx lr
	thumb_func_end ov96_02208AF0

	thumb_func_start ov96_02208AF8
ov96_02208AF8: ; 0x02208AF8
	push {r3, r4, r5, r6}
	mov r3, #0
	add r5, r3, #0
	mov r6, #1
_02208B00:
	ldrb r2, [r1]
	ldrb r4, [r1, #1]
	lsl r2, r2, #0x13
	lsl r4, r4, #0x13
	lsr r2, r2, #0x10
	lsr r4, r4, #0x10
	cmp r2, #0
	beq _02208B1C
	cmp r4, #0
	beq _02208B1C
	str r6, [r0, #0x20]
	str r2, [r0, #0x24]
	str r4, [r0, #0x28]
	b _02208B1E
_02208B1C:
	str r5, [r0, #0x20]
_02208B1E:
	add r3, r3, #1
	add r1, r1, #2
	add r0, #0xc
	cmp r3, #0x14
	blt _02208B00
	pop {r3, r4, r5, r6}
	bx lr
	thumb_func_end ov96_02208AF8

	thumb_func_start ov96_02208B2C
ov96_02208B2C: ; 0x02208B2C
	ldr r3, _02208B30 ; =FreeToHeap
	bx r3
	.balign 4, 0
_02208B30: .word FreeToHeap
	thumb_func_end ov96_02208B2C

	thumb_func_start ov96_02208B34
ov96_02208B34: ; 0x02208B34
	push {r3, r4, r5, lr}
	ldr r1, _02208BB0 ; =0x00000559
	add r4, r0, #0
	ldrb r2, [r4, r1]
	mov r0, #4
	cmp r2, #4
	bne _02208B46
	mov r0, #0
	pop {r3, r4, r5, pc}
_02208B46:
	sub r2, r1, #3
	ldrb r2, [r4, r2]
	add r3, r2, #1
	sub r2, r1, #3
	strb r3, [r4, r2]
	ldrb r3, [r4, r2]
	sub r2, r1, #2
	ldrb r2, [r4, r2]
	cmp r3, r2
	blo _02208B68
	add r2, r1, #0
	mov r3, #1
	sub r2, #9
	str r3, [r4, r2]
	mov r2, #0
	sub r1, r1, #3
	strb r2, [r4, r1]
_02208B68:
	mov r1, #0x55
	lsl r1, r1, #4
	ldr r2, [r4, r1]
	cmp r2, #0
	beq _02208BAE
	add r0, r1, #0
	add r0, #8
	ldrb r2, [r4, r0]
	add r0, r1, #5
	ldrb r0, [r4, r0]
	add r5, r2, r0
	cmp r5, r2
	bge _02208B86
	bl GF_AssertFail
_02208B86:
	lsl r1, r5, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_02208BB8
	ldr r1, _02208BB4 ; =0x00000555
	lsl r0, r5, #0x18
	ldrb r2, [r4, r1]
	lsr r0, r0, #0x18
	add r2, r2, #1
	strb r2, [r4, r1]
	sub r2, r1, #1
	ldrb r3, [r4, r1]
	ldrb r2, [r4, r2]
	cmp r3, r2
	blo _02208BAE
	mov r2, #0
	strb r2, [r4, r1]
	sub r1, r1, #5
	str r2, [r4, r1]
_02208BAE:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02208BB0: .word 0x00000559
_02208BB4: .word 0x00000555
	thumb_func_end ov96_02208B34

	thumb_func_start ov96_02208BB8
ov96_02208BB8: ; 0x02208BB8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x1c0
	str r0, [sp, #4]
	lsl r0, r1, #3
	str r1, [sp, #8]
	ldr r1, [sp, #4]
	str r0, [sp, #0x10]
	ldr r0, [r1, r0]
	str r0, [sp, #0x14]
	add r0, #0xab
	ldrb r0, [r0]
	cmp r0, #0
	bne _02208BE6
	ldr r0, [sp, #0x14]
	add r0, #0xa6
	ldrb r0, [r0]
	cmp r0, #1
	beq _02208BE6
	ldr r0, [sp, #0x14]
	add r0, #0xa4
	ldrb r0, [r0]
	cmp r0, #0
	beq _02208BE8
_02208BE6:
	b _02208FAC
_02208BE8:
	mov r7, #0
	add r6, r1, #0
	add r5, sp, #0x38
_02208BEE:
	ldr r1, [r6]
	ldr r0, [r6, #4]
	str r1, [r5]
	str r0, [r5, #4]
	ldr r4, [r5]
	add r0, sp, #0x30
	str r0, [sp]
	ldr r1, [r4, #0x58]
	add r0, r4, #0
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r0, #0xb1
	add r2, r1, r2
	ldrb r0, [r0]
	asr r1, r2, #0xc
	ldr r2, [r4, #0x5c]
	lsl r0, r0, #2
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	ldr r0, [r4, r0]
	add r3, sp, #0x34
	bl ov96_021EB0A4
	add r0, sp, #0x28
	str r0, [sp]
	add r0, r4, #0
	add r0, #0xb1
	ldrb r0, [r0]
	ldr r1, [sp, #0x34]
	ldr r2, [sp, #0x30]
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	add r3, sp, #0x2c
	bl ov96_021EB03C
	ldr r1, [sp, #0x2c]
	add r7, r7, #1
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [sp, #0x28]
	strh r0, [r5, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	strh r0, [r5, #6]
	add r6, #8
	add r5, #8
	cmp r7, #4
	blt _02208BEE
	ldr r0, [sp, #0x10]
	add r1, sp, #0x38
	add r0, r1, r0
	ldr r2, [sp, #4]
	str r0, [sp, #0x1c]
	mov r4, #0
	add r3, sp, #0xd0
_02208C6C:
	add r6, r2, #0
	add r6, #0x20
	ldmia r6!, {r0, r1}
	add r5, r3, #0
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	add r4, r4, #1
	str r0, [r5]
	add r2, #0xc
	add r3, #0xc
	cmp r4, #0x14
	blt _02208C6C
	mov r7, #0x11
	ldr r4, [sp, #4]
	mov r6, #0
	add r5, sp, #0x58
	lsl r7, r7, #4
_02208C8E:
	add r3, r4, r7
	ldmia r3!, {r0, r1}
	add r2, r5, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r6, r6, #1
	str r0, [r2]
	add r4, #0xc
	add r5, #0xc
	cmp r6, #0xa
	blt _02208C8E
	mov r1, #0x62
	ldr r0, [sp, #4]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	ldr r4, [sp, #4]
	str r0, [sp, #0x18]
	mov r5, #0
_02208CB2:
	ldr r0, _02208FB0 ; =0x000001A2
	mov r1, #6
	strh r5, [r4, r0]
	add r0, r5, #0
	bl _s32_div_f
	ldr r0, [sp, #0x1c]
	lsl r7, r1, #5
	ldrh r0, [r0, #4]
	sub r0, #0x50
	add r1, r0, r7
	mov r0, #0x19
	lsl r0, r0, #4
	str r1, [r4, r0]
	add r0, r5, #0
	mov r1, #6
	bl _s32_div_f
	lsl r6, r0, #5
	ldr r0, [sp, #0x1c]
	ldrh r0, [r0, #6]
	sub r0, #0x30
	add r1, r0, r6
	mov r0, #0x65
	lsl r0, r0, #2
	str r1, [r4, r0]
	bl LCRandom
	ldr r1, [sp, #0x1c]
	lsl r3, r0, #0x1b
	ldrh r1, [r1, #4]
	sub r1, #0x60
	add r2, r1, r7
	lsr r1, r0, #0x1f
	sub r3, r3, r1
	mov r0, #0x1b
	ror r3, r0
	add r0, r1, r3
	add r1, r2, r0
	mov r0, #0x66
	lsl r0, r0, #2
	str r1, [r4, r0]
	bl LCRandom
	ldr r1, [sp, #0x1c]
	lsr r3, r0, #0x1f
	lsl r2, r0, #0x1b
	ldrh r1, [r1, #6]
	sub r2, r2, r3
	mov r0, #0x1b
	sub r1, #0x80
	ror r2, r0
	add r1, r1, r6
	add r0, r3, r2
	add r1, r1, r0
	mov r0, #0x67
	lsl r0, r0, #2
	str r1, [r4, r0]
	add r5, r5, #1
	add r4, #0x14
	cmp r5, #0x30
	blt _02208CB2
	mov r2, #0
	ldr r1, [sp, #4]
	add r5, r2, #0
	add r0, r0, #4
_02208D36:
	add r2, r2, #1
	strh r5, [r1, r0]
	add r1, #0x14
	cmp r2, #0x30
	blt _02208D36
	mov r1, #0x1a
	lsl r1, r1, #4
	mov r7, #0
	mov r0, #0x14
	add r2, r1, #0
_02208D4A:
	add r4, r7, #0
_02208D4C:
	add r3, r4, #0
	add r3, #0x13
	lsl r3, r3, #0x18
	lsr r6, r3, #0x18
	add r3, r6, #0
	ldr r6, [sp, #4]
	mul r3, r0
	add r3, r6, r3
	ldrsh r6, [r3, r1]
	add r4, r4, #1
	add r6, r6, #2
	strh r6, [r3, r2]
	cmp r4, #4
	blt _02208D4C
	add r5, r5, #1
	cmp r5, #2
	blt _02208D4A
	mov r0, #0
	str r0, [sp, #0xc]
	mov r1, #0x19
	ldr r0, [sp, #4]
	lsl r1, r1, #4
	add r4, r0, r1
_02208D7A:
	add r6, r4, #0
	ldr r5, [sp, #0x18]
	mov r7, #0
	add r6, #0x10
_02208D82:
	ldr r0, [r5]
	cmp r0, #0
	beq _02208D9E
	ldrh r1, [r5, #0x10]
	ldrh r2, [r5, #0x12]
	add r0, r4, #0
	bl ov96_022090A8
	cmp r0, #0
	beq _02208D9E
	mov r0, #0
	ldrsh r0, [r6, r0]
	add r0, r0, #7
	strh r0, [r6]
_02208D9E:
	add r7, r7, #1
	add r5, #0x14
	cmp r7, #5
	blt _02208D82
	add r7, r4, #0
	mov r5, #0
	add r6, sp, #0x38
	add r7, #0x10
_02208DAE:
	ldr r0, [sp, #8]
	cmp r5, r0
	beq _02208DCA
	ldrh r1, [r6, #4]
	ldrh r2, [r6, #6]
	add r0, r4, #0
	bl ov96_022090A8
	cmp r0, #0
	beq _02208DCA
	mov r0, #0
	ldrsh r0, [r7, r0]
	sub r0, r0, #3
	strh r0, [r7]
_02208DCA:
	add r5, r5, #1
	add r6, #8
	cmp r5, #4
	blt _02208DAE
	add r6, r4, #0
	mov r7, #0
	add r5, sp, #0xd0
	add r6, #0x10
_02208DDA:
	ldr r0, [r5]
	cmp r0, #0
	beq _02208E06
	ldr r1, [r5, #4]
	ldr r2, [r5, #8]
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	add r0, r4, #0
	lsr r1, r1, #0x10
	lsr r2, r2, #0x10
	bl ov96_022090A8
	cmp r0, #0
	beq _02208DFE
	mov r0, #0
	ldrsh r0, [r6, r0]
	sub r0, r0, #2
	strh r0, [r6]
_02208DFE:
	add r7, r7, #1
	add r5, #0xc
	cmp r7, #0x14
	blt _02208DDA
_02208E06:
	add r6, r4, #0
	mov r7, #0
	add r5, sp, #0x58
	add r6, #0x10
_02208E0E:
	ldr r0, [r5]
	cmp r0, #0
	beq _02208E3A
	ldr r1, [r5, #4]
	ldr r2, [r5, #8]
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	add r0, r4, #0
	lsr r1, r1, #0x10
	lsr r2, r2, #0x10
	bl ov96_022090A8
	cmp r0, #0
	beq _02208E32
	mov r0, #0
	ldrsh r0, [r6, r0]
	add r0, r0, #2
	strh r0, [r6]
_02208E32:
	add r7, r7, #1
	add r5, #0xc
	cmp r7, #0xa
	blt _02208E0E
_02208E3A:
	add r0, r4, #0
	bl ov96_022090D8
	cmp r0, #0
	bne _02208E4C
	mov r0, #0x10
	ldrsh r0, [r4, r0]
	sub r0, #0x64
	strh r0, [r4, #0x10]
_02208E4C:
	ldr r0, [sp, #0xc]
	add r4, #0x14
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #0x30
	blt _02208D7A
	ldr r0, [sp, #0x14]
	ldr r1, [r0, #0x5c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	lsl r0, r0, #4
	lsr r1, r0, #0x10
	mov r0, #1
	lsl r0, r0, #8
	cmp r1, r0
	bls _02208E8E
	mov r4, #0x96
	add r3, r0, #0
	lsl r4, r4, #2
	ldr r1, [sp, #4]
	mov r2, #0
	add r3, #0xa0
	add r5, r4, #0
_02208E7C:
	add r0, r1, r3
	ldrsh r6, [r0, r4]
	add r2, r2, #1
	add r1, #0x14
	add r6, r6, #3
	strh r6, [r0, r5]
	cmp r2, #6
	blt _02208E7C
	b _02208EA8
_02208E8E:
	bhs _02208EA8
	mov r1, #0x1a
	ldr r3, [sp, #4]
	mov r4, #0
	add r0, #0xa0
	lsl r1, r1, #4
_02208E9A:
	ldrsh r2, [r3, r0]
	add r4, r4, #1
	add r2, r2, #3
	strh r2, [r3, r1]
	add r3, #0x14
	cmp r4, #6
	blt _02208E9A
_02208EA8:
	ldr r0, [sp, #0x14]
	add r0, #0xaa
	ldrb r0, [r0]
	cmp r0, #0
	beq _02208F2E
	mov r7, #0x1a
	lsl r7, r7, #4
	add r4, r7, #0
	add r6, r7, #0
	ldr r2, [sp, #4]
	mov r3, #0
	add r4, #0xb8
	add r6, #0xb8
_02208EC2:
	ldr r5, [sp, #0x14]
	add r1, r2, r7
	add r5, #0xaa
	ldrsh r0, [r1, r4]
	ldrb r5, [r5]
	add r3, r3, #1
	add r2, #0x14
	add r0, r0, r5
	strh r0, [r1, r6]
	cmp r3, #6
	blt _02208EC2
	ldr r0, [sp, #0x14]
	ldr r1, [r0, #0x58]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	lsl r0, r0, #4
	lsr r1, r0, #0x10
	mov r0, #1
	lsl r0, r0, #8
	cmp r1, r0
	bls _02208F0E
	mov r4, #0x96
	add r3, r0, #0
	lsl r4, r4, #2
	ldr r1, [sp, #4]
	mov r2, #0
	add r3, #0xa0
	add r5, r4, #0
_02208EFC:
	add r0, r1, r3
	ldrsh r6, [r0, r4]
	add r2, r2, #1
	add r1, #0x14
	add r6, r6, #2
	strh r6, [r0, r5]
	cmp r2, #3
	blt _02208EFC
	b _02208F2E
_02208F0E:
	bhs _02208F2E
	mov r4, #0xa5
	add r3, r0, #0
	lsl r4, r4, #2
	ldr r1, [sp, #4]
	mov r2, #0
	add r3, #0xa0
	add r5, r4, #0
_02208F1E:
	add r0, r1, r3
	ldrsh r6, [r0, r4]
	add r2, r2, #1
	add r1, #0x14
	add r6, r6, #2
	strh r6, [r0, r5]
	cmp r2, #3
	blt _02208F1E
_02208F2E:
	ldr r0, [sp, #4]
	bl ov96_02208FB8
	add r4, r0, #0
	ldr r1, _02208FB4 ; =0x00000558
	ldr r0, [sp, #4]
	ldrb r1, [r0, r1]
	ldr r0, [sp, #8]
	cmp r0, r1
	blo _02208FAC
	ldr r0, [sp, #0x1c]
	ldr r2, [sp, #0x1c]
	ldr r1, [r0]
	add r0, sp, #0x20
	str r0, [sp]
	add r0, r1, #0
	add r0, #0xb1
	ldrb r0, [r0]
	ldrh r2, [r2, #6]
	add r3, sp, #0x24
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r1, [sp, #0x1c]
	ldrh r1, [r1, #4]
	bl ov96_021EB0A4
	ldr r0, [sp, #0x24]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x1c]
	ldr r0, [r0]
	str r1, [r0, #0x7c]
	ldr r0, [sp, #0x20]
	lsl r1, r0, #0xc
	ldr r0, [sp, #0x1c]
	ldr r0, [r0]
	add r0, #0x80
	str r1, [r0]
	ldr r1, [sp, #0x1c]
	mov r0, #0
	ldr r1, [r1]
	add r1, #0x84
	str r0, [r1]
	ldr r1, [r4, #8]
	lsl r2, r1, #0xc
	ldr r1, [sp, #0x1c]
	ldr r1, [r1]
	add r1, #0x88
	str r2, [r1]
	ldr r1, [r4, #0xc]
	lsl r2, r1, #0xc
	ldr r1, [sp, #0x1c]
	ldr r1, [r1]
	add r1, #0x8c
	str r2, [r1]
	ldr r1, [sp, #0x1c]
	ldr r1, [r1]
	add r1, #0x90
	str r0, [r1]
	ldr r0, [sp, #0x1c]
	mov r1, #1
	ldr r0, [r0]
	add r0, #0xa5
	strb r1, [r0]
_02208FAC:
	add sp, #0x1c0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02208FB0: .word 0x000001A2
_02208FB4: .word 0x00000558
	thumb_func_end ov96_02208BB8

	thumb_func_start ov96_02208FB8
ov96_02208FB8: ; 0x02208FB8
	push {r4, lr}
	sub sp, #0x180
	mov r1, #0x19
	lsl r1, r1, #4
	add r0, r0, r1
	mov r2, #0
	add r1, sp, #0
_02208FC6:
	add r2, r2, #1
	stmia r1!, {r0}
	add r0, #0x14
	cmp r2, #0x30
	blt _02208FC6
	add r0, sp, #0
	add r1, sp, #0xc0
	bl ov96_02208FF0
	add r4, r0, #0
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x16
	add r0, sp, #0xc0
	ldr r0, [r0, r1]
	add sp, #0x180
	pop {r4, pc}
	thumb_func_end ov96_02208FB8

	thumb_func_start ov96_02208FF0
ov96_02208FF0: ; 0x02208FF0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x54
	mov ip, r0
	add r0, sp, #0x10
	str r0, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #0xc]
	ldr r0, [sp]
	add r7, r1, #0
_02209008:
	add r2, r0, #1
	mov r1, #0xc
	mul r1, r2
	add r2, sp, #4
	lsl r4, r0, #2
	mov r3, ip
	ldr r3, [r3, r4]
	add r2, r2, r1
	str r3, [r2, #8]
	mov r3, #0
	str r3, [r2, #4]
	add r4, r3, #0
	add r3, sp, #4
	str r4, [r3, r1]
	add r1, r4, #0
	cmp r0, #0
	bls _02209054
	ldr r5, [r2, #8]
	mov r4, #0x10
	ldrsh r4, [r5, r4]
	mov r6, #0x10
_02209032:
	ldr r3, [r3, #4]
	ldr r5, [r3, #8]
	ldrsh r5, [r5, r6]
	cmp r5, r4
	bge _0220904A
	ldr r4, [r3]
	str r2, [r4, #4]
	ldr r4, [r3]
	str r4, [r2]
	str r3, [r2, #4]
	str r2, [r3]
	b _02209054
_0220904A:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, r0
	blo _02209032
_02209054:
	cmp r1, r0
	bne _0220905C
	str r2, [r3, #4]
	str r3, [r2]
_0220905C:
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0x30
	blo _02209008
	ldr r0, [sp, #8]
	mov r3, #0
	ldr r1, [r0, #8]
	mov r0, #0x10
	ldrsh r2, [r1, r0]
	add r1, sp, #4
_02209072:
	ldr r1, [r1, #4]
	lsl r5, r3, #2
	ldr r4, [r1, #8]
	str r4, [r7, r5]
	ldr r4, [r7, r5]
	ldrsh r4, [r4, r0]
	cmp r2, r4
	bne _0220908C
	ldr r4, [sp]
	add r4, r4, #1
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	str r4, [sp]
_0220908C:
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	cmp r3, #0x30
	blo _02209072
	ldr r0, [sp]
	cmp r0, #0
	bne _022090A0
	bl GF_AssertFail
_022090A0:
	ldr r0, [sp]
	add sp, #0x1fc
	add sp, #0x54
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02208FF0

	thumb_func_start ov96_022090A8
ov96_022090A8: ; 0x022090A8
	push {r4, r5}
	ldr r5, [r0, #8]
	ldr r3, [r0, #0xc]
	add r4, r5, #0
	add r0, r3, #0
	sub r5, #0x10
	add r4, #0x10
	sub r0, #0x10
	add r3, #0x10
	cmp r5, r1
	bgt _022090D0
	cmp r1, r4
	bge _022090D0
	cmp r0, r2
	bgt _022090D0
	cmp r2, r3
	bge _022090D0
	mov r0, #1
	pop {r4, r5}
	bx lr
_022090D0:
	mov r0, #0
	pop {r4, r5}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_022090A8

	thumb_func_start ov96_022090D8
ov96_022090D8: ; 0x022090D8
	ldr r2, [r0, #0xc]
	cmp r2, #0x68
	bge _022090E2
	mov r0, #0
	bx lr
_022090E2:
	mov r1, #0x62
	lsl r1, r1, #2
	cmp r2, r1
	ldr r1, [r0, #8]
	bgt _0220910C
	cmp r1, #0x90
	blt _022090F4
	mov r2, #1
	b _022090F6
_022090F4:
	mov r2, #0
_022090F6:
	mov r0, #0x17
	lsl r0, r0, #4
	cmp r1, r0
	bgt _02209102
	mov r0, #1
	b _02209104
_02209102:
	mov r0, #0
_02209104:
	tst r0, r2
	beq _0220912C
	mov r0, #1
	bx lr
_0220910C:
	cmp r1, #0xd0
	blt _02209114
	mov r2, #1
	b _02209116
_02209114:
	mov r2, #0
_02209116:
	mov r0, #0x13
	lsl r0, r0, #4
	cmp r1, r0
	bgt _02209122
	mov r0, #1
	b _02209124
_02209122:
	mov r0, #0
_02209124:
	tst r0, r2
	beq _0220912C
	mov r0, #1
	bx lr
_0220912C:
	mov r0, #0
	bx lr
	thumb_func_end ov96_022090D8

	thumb_func_start ov96_02209130
ov96_02209130: ; 0x02209130
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldrb r0, [r5]
	cmp r0, #0
	beq _0220914A
	cmp r0, #1
	beq _0220918A
	b _022091A6
_0220914A:
	ldr r0, [r4, #0x40]
	bl ov96_0220A840
	ldr r0, [r4, #0x40]
	bl ov96_0220AD34
	cmp r0, #2
	bne _022091AA
	ldr r1, _022091B0 ; =0x0221CC00
	add r0, sp, #0xc
	ldrh r2, [r1]
	ldrh r1, [r1, #2]
	strh r2, [r0]
	strh r1, [r0, #2]
	ldr r0, [r4, #0xc]
	bl sub_0200E2B0
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	add r0, sp, #0xc
	str r0, [sp, #8]
	ldr r2, [r4, #0x14]
	add r0, r6, #0
	mov r1, #0
	bl ov96_021E62AC
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _022091AA
_0220918A:
	add r0, r6, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _022091AA
	ldr r0, [r4, #0x10]
	mov r1, #0
	bl ov96_021EB144
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _022091AA
_022091A6:
	bl GF_AssertFail
_022091AA:
	mov r0, #0
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
_022091B0: .word 0x0221CC00
	thumb_func_end ov96_02209130

	thumb_func_start ov96_022091B4
ov96_022091B4: ; 0x022091B4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	ldr r0, [r0, #0x10]
	lsl r0, r0, #0xf
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _0220920C
	ldr r0, [r4, #0x40]
	bl ov96_0220AD4C
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_0220A5DC
	add r0, r4, #0
	bl ov96_02209BF8
	ldr r0, [r4, #0x4c]
	mov r1, #0
	bl ov96_0220B708
	ldr r0, [r4, #0x44]
	bl ov96_0220B8F0
	ldr r0, [r4, #0x40]
	bl ov96_0220A87C
	ldr r0, [r4, #0x10]
	mov r1, #1
	bl ov96_021EB144
	add sp, #0x10
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_0220920C:
	bl sub_02025358
	cmp r0, #0
	beq _0220922E
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_0220922E:
	add r0, r4, #0
	bl ov96_02209E70
	ldr r0, [r4, #0x40]
	bl ov96_0220A840
	ldr r0, [r4, #0x40]
	bl ov96_0220AD34
	add r6, r0, #0
	cmp r6, #1
	bne _0220924A
	mov r1, #1
	b _0220924C
_0220924A:
	mov r1, #0
_0220924C:
	ldr r0, [r4, #0x4c]
	bl ov96_0220B528
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02209262
	ldr r0, [r4, #0x48]
	bl ov96_0220C9A0
_02209262:
	ldr r0, [r4, #0x44]
	bl ov96_0220B8D8
	ldr r0, [r4, #0x40]
	bl ov96_0220A910
	add r7, r0, #0
	add r0, r4, #0
	add r1, r7, #0
	bl ov96_0220A298
	ldr r0, [r4, #0x4c]
	bl ov96_0220B7CC
	cmp r0, #0
	beq _02209312
	cmp r6, #2
	bne _02209312
	cmp r7, #0
	beq _02209312
	ldr r0, [r4, #0x4c]
	bl ov96_0220B758
	add r6, r0, #0
	ldr r0, [r4, #0x4c]
	bl ov96_0220B774
	ldr r1, [r6]
	str r0, [sp, #8]
	ldr r0, [r4, #0x40]
	lsr r1, r1, #0x1a
	bl ov96_0220A8CC
	add r7, r0, #0
	ldr r0, [r4, #0x4c]
	bl ov96_0220B7B4
	add r1, r0, #0
	ldr r0, [sp, #8]
	add r3, r7, #0
	str r0, [sp]
	add r0, sp, #0xc
	str r0, [sp, #4]
	ldr r2, [r6]
	ldr r0, [r4, #0x40]
	lsl r2, r2, #0x17
	lsr r2, r2, #0x17
	lsl r2, r2, #0x10
	lsr r2, r2, #0x10
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	bl ov96_0220AAEC
	add r2, r0, #0
	ldr r0, [r4, #0x4c]
	add r1, r7, #0
	bl ov96_0220B634
	add r0, r4, #0
	bl ov96_02209BB0
	cmp r7, #0
	beq _022092EC
	add r0, r4, #0
	mov r1, #0x10
	mov r2, #2
	bl ov96_0220A704
	b _02209312
_022092EC:
	ldr r0, [sp, #0xc]
	cmp r0, #0
	beq _022092FE
	add r0, r4, #0
	mov r1, #4
	mov r2, #1
	bl ov96_0220A704
	b _02209312
_022092FE:
	ldr r0, [r4, #0x4c]
	bl ov96_0220B774
	cmp r0, #0
	beq _02209312
	add r0, r4, #0
	mov r1, #4
	mov r2, #1
	bl ov96_0220A704
_02209312:
	mov r0, #0x26
	lsl r0, r0, #4
	ldr r1, [r4, r0]
	cmp r1, #0
	ble _02209320
	sub r1, r1, #1
	str r1, [r4, r0]
_02209320:
	mov r1, #0x26
	lsl r1, r1, #4
	ldr r1, [r4, r1]
	add r0, r5, #0
	bl ov96_021E6454
	mov r0, #0x26
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	cmp r0, #0
	bne _02209356
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02209356
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	mov r1, #1
	ldr r2, [r0, #0x10]
	lsl r1, r1, #0x10
	orr r1, r2
	str r1, [r0, #0x10]
_02209356:
	mov r0, #0
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022091B4

	thumb_func_start ov96_0220935C
ov96_0220935C: ; 0x0220935C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _02209376
	cmp r0, #1
	beq _02209394
	b _022093C8
_02209376:
	add r0, r5, #0
	bl ov96_0220A4DC
	add r0, r5, #0
	bl ov96_0220A14C
	add r0, r5, #0
	bl ov96_022091B4
	cmp r0, #0
	beq _022093C8
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _022093C8
_02209394:
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _022093C8
	mov r0, #0x9a
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	cmp r0, #0
	bne _022093C8
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
_022093C8:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220935C

	thumb_func_start ov96_022093D0
ov96_022093D0: ; 0x022093D0
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bl ov96_021E5DC4
	add r5, r0, #0
	bl sub_0200FB5C
	cmp r0, #0
	beq _02209442
	add r0, r6, #0
	bl ov96_021E5F24
	add r4, r0, #0
	ldr r0, [r5, #0x40]
	bl ov96_0220AD4C
	lsl r1, r4, #0x18
	add r2, r0, #0
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FB0
	cmp r4, #0
	bne _0220943E
	add r0, r6, #0
	bl ov96_021E5D34
	add r4, r0, #0
	cmp r4, #4
	bge _0220943E
	mov r0, #0x28
	add r5, r4, #0
	mul r5, r0
_02209412:
	add r0, r6, #0
	bl ov96_021E5F54
	add r0, #0x50
	add r0, r0, r5
	bl ov96_021E8A20
	add r2, r0, #0
	ldr r2, [r2]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	lsl r2, r2, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, #0x28
	cmp r4, #4
	blt _02209412
_0220943E:
	mov r0, #1
	pop {r4, r5, r6, pc}
_02209442:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_022093D0

	thumb_func_start ov96_02209448
ov96_02209448: ; 0x02209448
	push {r4, r5, r6, r7, lr}
	sub sp, #0xec
	str r0, [sp, #0xc]
	bl ov96_021E5DC4
	str r0, [sp, #0x14]
	ldr r0, [sp, #0xc]
	bl ov96_021E5DD4
	cmp r0, #7
	bls _02209460
	b _0220971E
_02209460:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220946C: ; jump table
	.short _0220947C - _0220946C - 2 ; case 0
	.short _022094EE - _0220946C - 2 ; case 1
	.short _02209546 - _0220946C - 2 ; case 2
	.short _022095D2 - _0220946C - 2 ; case 3
	.short _02209618 - _0220946C - 2 ; case 4
	.short _0220963C - _0220946C - 2 ; case 5
	.short _022096F2 - _0220946C - 2 ; case 6
	.short _02209710 - _0220946C - 2 ; case 7
_0220947C:
	mov r2, #6
	mov r0, #0x5c
	mov r1, #0x8d
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _02209728 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _0220972C ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_02209820
	ldr r0, _02209730 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r1, #0x27
	ldr r0, [sp, #0xc]
	lsl r1, r1, #4
	bl ov96_021E5D94
	mov r2, #0x27
	mov r1, #0
	lsl r2, r2, #4
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8d
	str r0, [r4]
	mov r1, #0xe1
	mov r0, #0x26
	lsl r1, r1, #2
	lsl r0, r0, #4
	str r1, [r4, r0]
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_022094EE:
	ldr r0, [sp, #0x14]
	ldr r0, [r0]
	bl sub_0201AC88
	ldr r1, [sp, #0x14]
	str r0, [r1, #4]
	ldr r0, [sp, #0xc]
	mov r1, #4
	bl ov96_021E6670
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x14]
	ldr r0, [r0, #4]
	ldr r1, [r1]
	bl ov96_02209C14
	ldr r0, [sp, #0xc]
	bl ov96_02209DE4
	ldr r0, [sp, #0x14]
	bl ov96_02209D14
	ldr r0, [sp, #0x14]
	bl ov96_02209840
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0xc]
	bl sub_0200E2B0
	str r0, [sp]
	ldr r0, [sp, #0x14]
	ldr r3, [sp, #0x14]
	ldr r0, [r0]
	ldr r3, [r3, #0x14]
	mov r1, #9
	mov r2, #0x20
	bl ov96_021EA854
	ldr r1, [sp, #0x14]
	str r0, [r1, #0x10]
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_02209546:
	mov r5, #0
	add r6, sp, #0x18
	add r2, r6, #0
	add r0, r5, #0
	add r1, r5, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	str r5, [sp, #0x10]
	add r7, sp, #0x5c
_02209566:
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	ldr r1, [sp, #0x10]
	cmp r1, r0
	beq _022095A4
	mov r4, #0
_02209574:
	cmp r5, #9
	blt _0220957C
	bl GF_AssertFail
_0220957C:
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r4, #0
	add r3, r7, #0
	bl ov96_021E6168
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r4, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r6, #0x14]
	add r4, r4, #1
	add r7, #0x10
	add r6, r6, #4
	add r5, r5, #1
	cmp r4, #3
	blt _02209574
_022095A4:
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	blt _02209566
	mov r0, #1
	str r0, [sp, #0x1c]
	str r0, [sp, #0x24]
	str r0, [sp, #0x28]
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [sp, #0x14]
	mov r1, #9
	ldr r0, [r0, #0x10]
	add r2, sp, #0x5c
	add r3, sp, #0x18
	bl ov96_021EA8A8
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_022095D2:
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x10]
	bl ov96_021EAA00
	cmp r0, #0
	bne _022095E0
	b _02209722
_022095E0:
	ldr r0, [sp, #0x14]
	bl ov96_02209A14
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x14]
	ldr r0, [r0, #8]
	ldr r1, [r1, #0xc]
	bl ov96_02209B04
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0xc]
	bl sub_0200E2B0
	ldr r2, [sp, #0x14]
	add r3, r0, #0
	ldr r0, [sp, #0xc]
	ldr r2, [r2, #0x14]
	mov r1, #0
	bl ov96_021E61D8
	ldr r0, [r0]
	mov r1, #0
	bl sub_02024ADC
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_02209618:
	ldr r0, [sp, #0x14]
	bl ov96_02209910
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x14]
	ldr r0, [r0]
	ldr r1, [r1, #8]
	ldr r2, [r2, #0xc]
	ldr r3, [sp, #0xc]
	bl ov96_0220A744
	ldr r1, [sp, #0x14]
	str r0, [r1, #0x40]
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_0220963C:
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x14]
	ldr r0, [r0]
	ldr r1, [r1, #8]
	ldr r2, [r2, #0xc]
	ldr r3, [sp, #0xc]
	bl ov96_0220B374
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x14]
	str r0, [r1, #0x4c]
	add r0, r1, #0
	ldr r0, [r0, #0x10]
	ldr r3, [sp, #0xc]
	str r0, [sp]
	add r0, r1, #0
	ldr r0, [r0]
	ldr r1, [r1, #8]
	ldr r2, [r2, #0xc]
	bl ov96_0220B7F4
	ldr r1, [sp, #0x14]
	str r0, [r1, #0x44]
	add r0, r1, #0
	ldr r0, [r0, #0x10]
	mov r1, #1
	bl ov96_021EB144
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r0, #0
	bne _0220968E
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0xc]
	ldr r1, [r1]
	bl ov96_0220C93C
	ldr r1, [sp, #0x14]
	str r0, [r1, #0x48]
_0220968E:
	ldr r0, [sp, #0x14]
	bl ov96_02209F14
	ldr r0, [sp, #0xc]
	bl ov96_02209F8C
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #4]
	bl ov96_021E6030
	mov r0, #1
	bl sub_0203A994
	ldr r0, [sp, #0xc]
	mov r1, #1
	bl ov96_021E5DFC
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r0, #0
	bne _022096D2
	ldr r0, [sp, #0x14]
	ldr r0, [r0, #0x48]
	bl ov96_0220C9CC
_022096D2:
	mov r0, #6
	str r0, [sp]
	mov r1, #1
	ldr r0, [sp, #0x14]
	str r1, [sp, #4]
	ldr r0, [r0]
	ldr r3, _02209734 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_022096F2:
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r0, #0
	bne _02209702
	ldr r0, [sp, #0xc]
	bl ov96_0220A424
_02209702:
	ldr r0, [sp, #0xc]
	bl ov96_0220A4DC
	ldr r0, [sp, #0xc]
	bl ov96_021E5DEC
	b _02209722
_02209710:
	bl sub_0200FB5C
	cmp r0, #0
	beq _02209722
	add sp, #0xec
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_0220971E:
	bl GF_AssertFail
_02209722:
	mov r0, #0
	add sp, #0xec
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02209728: .word 0xFFFFE0FF
_0220972C: .word 0x04001000
_02209730: .word gMain + 0x60
_02209734: .word 0x00007FFF
	thumb_func_end ov96_02209448

	thumb_func_start ov96_02209738
ov96_02209738: ; 0x02209738
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0, #0xc]
	bl sub_0200D020
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_02209738

	thumb_func_start ov96_02209748
ov96_02209748: ; 0x02209748
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_0220975C:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _022097A8 ; =0x00000126
	add r1, r6, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _0220975C
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #3
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #3
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_022097A8: .word 0x00000126
	thumb_func_end ov96_02209748

	thumb_func_start ov96_022097AC
ov96_022097AC: ; 0x022097AC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl ov96_0220A0E0
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _022097CA
	ldr r0, [r4, #0x48]
	bl ov96_0220C998
_022097CA:
	ldr r0, [r4, #0x40]
	bl ov96_0220A7F8
	ldr r0, [r4, #0x44]
	bl ov96_0220B8A0
	ldr r0, [r4, #0x4c]
	bl ov96_0220B500
	add r0, r4, #0
	bl ov96_022099EC
	add r0, r4, #0
	bl ov96_022098E8
	add r0, r4, #0
	bl ov96_02209CA8
	bl sub_0203A914
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _0220981C ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #0x8d
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220981C: .word gMain + 0x60
	thumb_func_end ov96_022097AC

	thumb_func_start ov96_02209820
ov96_02209820: ; 0x02209820
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _0220983C ; =0x0221CCA0
	add r3, sp, #0
	mov r2, #5
_0220982A:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220982A
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_0220983C: .word 0x0221CCA0
	thumb_func_end ov96_02209820

	thumb_func_start ov96_02209840
ov96_02209840: ; 0x02209840
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _022098D8 ; =0x0221CC30
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _022098DC ; =0x0221CC80
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _022098E0 ; =0x0221CC1C
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r4]
	bl sub_0200CF18
	str r0, [r4, #8]
	bl sub_0200CF38
	str r0, [r4, #0xc]
	ldr r0, [r4, #8]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	mov r2, #1
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	lsl r2, r2, #8
	bl sub_0200CFF4
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	add r2, sp, #0x34
	bl sub_0200D3F8
	ldr r0, [r4, #8]
	bl sub_0200CF6C
	mov r2, #1
	mov r1, #0
	lsl r2, r2, #0x14
	bl sub_02009FC8
	ldr r0, [r4]
	ldr r1, _022098E4 ; =0x000002E7
	mov r2, #1
	bl ov96_021E9A78
	str r0, [r4, #0x14]
	ldr r1, [r4]
	mov r0, #0x14
	bl NARC_ctor
	str r0, [r4, #0x50]
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_022098D8: .word 0x0221CC30
_022098DC: .word 0x0221CC80
_022098E0: .word 0x0221CC1C
_022098E4: .word 0x000002E7
	thumb_func_end ov96_02209840

	thumb_func_start ov96_022098E8
ov96_022098E8: ; 0x022098E8
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x50]
	bl NARC_dtor
	ldr r0, [r4, #0x10]
	bl ov96_021EA894
	ldr r0, [r4, #0x14]
	bl ov96_021E9C0C
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	bl sub_0200D998
	ldr r0, [r4, #8]
	bl sub_0200D108
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_022098E8

	thumb_func_start ov96_02209910
ov96_02209910: ; 0x02209910
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r5, r0, #0
	mov r7, #0
	add r0, sp, #0x14
	str r7, [r0]
	str r7, [r0, #4]
	mov r6, #2
	str r7, [r0, #8]
	lsl r6, r6, #0xe
	add r4, r5, #0
_02209926:
	mov r0, #0xb
	lsl r0, r0, #0x10
	str r6, [sp, #0x14]
	str r0, [sp, #0x18]
	ldr r0, [r5, #0xc]
	bl sub_0200E2B0
	add r1, r0, #0
	ldr r0, [r5, #0x14]
	ldr r3, [r5]
	mov r2, #0
	bl ov96_021EA584
	str r0, [r4, #0x2c]
	add r1, sp, #0x14
	bl sub_020247D4
	ldr r0, [r4, #0x2c]
	mov r1, #2
	bl sub_02024ADC
	ldr r0, [r4, #0x2c]
	mov r1, #1
	bl sub_020248F0
	ldr r0, [r4, #0x2c]
	mov r1, #1
	bl sub_02024830
	mov r0, #1
	lsl r0, r0, #0x10
	add r7, r7, #1
	add r6, r6, r0
	add r4, r4, #4
	cmp r7, #3
	blt _02209926
	mov r0, #0x19
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	mov r2, #0xc0
	mov r3, #0xb8
	bl ov96_0220D13C
	str r0, [r5, #0x24]
	mov r7, #0
	add r4, r5, #0
	mov r6, #0xd4
_0220998A:
	mov r1, #0
	add r0, sp, #8
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r5, #0xc]
	bl sub_0200E2B0
	add r1, r0, #0
	ldr r0, [r5, #0x14]
	ldr r3, [r5]
	mov r2, #2
	bl ov96_021EA374
	str r0, [r4, #0x38]
	lsl r0, r6, #0xc
	str r0, [sp, #8]
	mov r0, #0x2e
	lsl r0, r0, #0xe
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [r4, #0x38]
	add r1, sp, #8
	bl sub_020247D4
	ldr r0, [r4, #0x38]
	mov r1, #1
	bl sub_02024830
	add r7, r7, #1
	add r4, r4, #4
	add r6, #0x10
	cmp r7, #2
	blt _0220998A
	mov r0, #0x13
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	mov r2, #0x20
	mov r3, #0x10
	bl ov96_0220D13C
	str r0, [r5, #0x28]
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02209910

	thumb_func_start ov96_022099EC
ov96_022099EC: ; 0x022099EC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bne _022099F6
	bl GF_AssertFail
_022099F6:
	mov r4, #0
_022099F8:
	ldr r0, [r5, #0x24]
	cmp r0, #0
	bne _02209A02
	bl GF_AssertFail
_02209A02:
	ldr r0, [r5, #0x24]
	bl sub_0200D9DC
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _022099F8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_022099EC

	thumb_func_start ov96_02209A14
ov96_02209A14: ; 0x02209A14
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r0, #0
	ldr r5, [r6, #0xc]
	ldr r4, [r6, #8]
	mov r7, #1
	str r7, [sp]
	ldr r0, _02209AF8 ; =0x00002710
	str r7, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xea
	mov r3, #8
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, _02209AF8 ; =0x00002710
	str r7, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xea
	mov r3, #7
	bl sub_0200D564
	add r0, r7, #0
	str r0, [sp]
	ldr r0, _02209AF8 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xea
	mov r3, #9
	bl sub_0200D6D4
	add r0, r7, #0
	str r0, [sp]
	ldr r0, _02209AF8 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xea
	mov r3, #0xa
	bl sub_0200D704
	mov r0, #1
	str r0, [sp]
	mov r7, #2
	ldr r0, _02209AFC ; =0x00002711
	str r7, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xea
	mov r3, #0xc
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _02209AFC ; =0x00002711
	str r7, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xea
	mov r3, #0xb
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	ldr r0, _02209AFC ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xea
	mov r3, #0xd
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _02209AFC ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xea
	mov r3, #0xe
	bl sub_0200D704
	bl sub_02074490
	add r3, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _02209B00 ; =0x00002712
	str r7, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x14
	bl sub_0200D564
	mov r1, #0x85
	lsl r1, r1, #2
	strh r0, [r6, r1]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02209AF8: .word 0x00002710
_02209AFC: .word 0x00002711
_02209B00: .word 0x00002712
	thumb_func_end ov96_02209A14

	thumb_func_start ov96_02209B04
ov96_02209B04: ; 0x02209B04
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	mov r4, #1
	str r4, [sp]
	ldr r2, _02209BA4 ; =0x00002712
	str r4, [sp, #4]
	str r2, [sp, #8]
	mov r2, #0xea
	mov r3, #0x10
	add r5, r0, #0
	add r6, r1, #0
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	add r0, r4, #0
	str r0, [sp, #4]
	ldr r0, _02209BA8 ; =0x00002713
	str r4, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r5, #0
	add r1, r6, #0
	mov r2, #0xea
	mov r3, #0xf
	bl sub_0200D564
	mov r7, #2
	mov r4, #0
_02209B3C:
	mov r0, #1
	str r0, [sp]
	ldr r0, _02209BA8 ; =0x00002713
	str r7, [sp, #4]
	add r0, r4, r0
	str r0, [sp, #8]
	add r0, r5, #0
	add r1, r6, #0
	mov r2, #0xea
	mov r3, #0x10
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, _02209BAC ; =0x00002714
	str r7, [sp, #8]
	add r0, r4, r0
	str r0, [sp, #0xc]
	add r0, r5, #0
	add r1, r6, #0
	mov r2, #0xea
	mov r3, #0xf
	bl sub_0200D564
	add r4, r4, #1
	cmp r4, #2
	blt _02209B3C
	mov r0, #1
	str r0, [sp]
	ldr r0, _02209BA4 ; =0x00002712
	add r1, r6, #0
	str r0, [sp, #4]
	add r0, r5, #0
	mov r2, #0xea
	mov r3, #0x11
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _02209BA4 ; =0x00002712
	add r1, r6, #0
	str r0, [sp, #4]
	add r0, r5, #0
	mov r2, #0xea
	mov r3, #0x12
	bl sub_0200D704
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02209BA4: .word 0x00002712
_02209BA8: .word 0x00002713
_02209BAC: .word 0x00002714
	thumb_func_end ov96_02209B04

	thumb_func_start ov96_02209BB0
ov96_02209BB0: ; 0x02209BB0
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bne _02209BBA
	bl GF_AssertFail
_02209BBA:
	ldr r0, [r6, #0x40]
	bl ov96_0220AD4C
	add r5, r0, #0
	mov r4, #0
	mov r7, #2
_02209BC6:
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	sub r0, r7, r4
	lsl r0, r0, #2
	add r0, r6, r0
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	ldr r0, [r0, #0x2c]
	add r1, r1, #1
	bl sub_020248F0
	cmp r5, #0xa
	blo _02209BF6
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x10
	add r4, r4, #1
	lsr r5, r0, #0x10
	cmp r4, #3
	blt _02209BC6
_02209BF6:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02209BB0

	thumb_func_start ov96_02209BF8
ov96_02209BF8: ; 0x02209BF8
	push {r4, r5, r6, lr}
	mov r4, #0
	add r5, r0, #0
	add r6, r4, #0
_02209C00:
	ldr r0, [r5, #0x24]
	add r1, r6, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _02209C00
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02209BF8

	thumb_func_start ov96_02209C14
ov96_02209C14: ; 0x02209C14
	push {r4, r5, r6, r7, lr}
	sub sp, #0xbc
	ldr r4, _02209C9C ; =0x0221CC0C
	add r3, sp, #4
	add r6, r0, #0
	str r1, [sp]
	add r2, r3, #0
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r4, _02209CA0 ; =0x0221CCF8
	add r3, sp, #0x14
	mov r2, #0x15
_02209C36:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02209C36
	ldr r5, _02209CA4 ; =0x0221CC48
	mov r7, #0
	add r4, sp, #0x14
_02209C44:
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r2, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201CAE0
	ldr r0, [r5]
	ldr r3, [sp]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r1, #0x20
	mov r2, #0
	bl sub_0201C1C4
	add r7, r7, #1
	add r4, #0x1c
	add r5, r5, #4
	cmp r7, #6
	blt _02209C44
	ldr r1, [sp]
	mov r0, #4
	bl sub_02002CEC
	mov r0, #4
	mov r1, #0
	bl GX_EngineAToggleLayers
	add r0, r6, #0
	mov r1, #0
	mov r2, #3
	mov r3, #0x10
	bl sub_0201BC8C
	add sp, #0xbc
	pop {r4, r5, r6, r7, pc}
	nop
_02209C9C: .word 0x0221CC0C
_02209CA0: .word 0x0221CCF8
_02209CA4: .word 0x0221CC48
	thumb_func_end ov96_02209C14

	thumb_func_start ov96_02209CA8
ov96_02209CA8: ; 0x02209CA8
	push {r4, r5, r6, lr}
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_02209CB0:
	ldr r0, [r5, #0x18]
	bl String_dtor
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _02209CB0
	mov r0, #0x97
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	bl ScrStrBufs_delete
	mov r0, #0x96
	lsl r0, r0, #2
	ldr r0, [r6, r0]
	bl DestroyMsgData
	mov r0, #0x86
	lsl r0, r0, #2
	mov r5, #0
	add r4, r6, r0
_02209CDA:
	add r0, r4, #0
	bl RemoveWindow
	add r5, r5, #1
	add r4, #0x10
	cmp r5, #4
	blt _02209CDA
	ldr r4, _02209D10 ; =0x0221CC48
	mov r5, #0
_02209CEC:
	ldr r1, [r4]
	ldr r0, [r6, #4]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201BB4C
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #6
	blt _02209CEC
	mov r0, #4
	bl sub_02002DB4
	ldr r0, [r6, #4]
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	nop
_02209D10: .word 0x0221CC48
	thumb_func_end ov96_02209CA8

	thumb_func_start ov96_02209D14
ov96_02209D14: ; 0x02209D14
	push {r4, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r1, #1
	add r4, r0, #0
	str r1, [sp, #8]
	ldr r0, [r4]
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xea
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xea
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #4]
	mov r0, #0xea
	mov r2, #4
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_02209D14

	thumb_func_start ov96_02209DE4
ov96_02209DE4: ; 0x02209DE4
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	bl ov96_021E5DC4
	add r6, r0, #0
	ldr r2, _02209E68 ; =0x00000135
	ldr r3, [r6]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	mov r1, #0x96
	lsl r1, r1, #2
	str r0, [r6, r1]
	ldr r0, [r6]
	bl ScrStrBufs_new
	mov r1, #0x97
	lsl r1, r1, #2
	str r0, [r6, r1]
	sub r1, #0x44
	ldr r4, _02209E6C ; =0x0221CC60
	mov r7, #0
	add r5, r6, r1
_02209E14:
	ldr r0, [r6, #4]
	add r1, r5, #0
	add r2, r4, #0
	bl AddWindow
	add r0, r5, #0
	mov r1, #0
	bl FillWindowPixelBuffer
	add r0, r5, #0
	bl sub_0201D634
	add r7, r7, #1
	add r4, #8
	add r5, #0x10
	cmp r7, #4
	blt _02209E14
	ldr r0, [sp]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp]
	bl ov96_021E5D50
	add r5, r0, #0
	mov r7, #0
	add r4, r6, #0
_02209E4A:
	ldr r1, [r6]
	mov r0, #0xb
	bl String_ctor
	add r1, r5, #0
	add r1, #0x12
	str r0, [r4, #0x18]
	bl CopyU16ArrayToString
	add r7, r7, #1
	add r4, r4, #4
	add r5, #0x28
	cmp r7, #3
	blt _02209E4A
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02209E68: .word 0x00000135
_02209E6C: .word 0x0221CC60
	thumb_func_end ov96_02209DE4

	thumb_func_start ov96_02209E70
ov96_02209E70: ; 0x02209E70
	push {r3, r4, r5, lr}
	sub sp, #8
	add r5, r0, #0
	bne _02209E7C
	bl GF_AssertFail
_02209E7C:
	ldr r0, [r5, #0x4c]
	cmp r0, #0
	bne _02209E86
	bl GF_AssertFail
_02209E86:
	mov r0, #0x26
	lsl r0, r0, #4
	ldr r0, [r5, r0]
	mov r1, #0x1e
	bl _s32_div_f
	cmp r0, #0
	bge _02209E98
	mov r0, #0
_02209E98:
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #0x38]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #0x3c]
	add r1, r1, #1
	bl sub_020248F0
	ldr r0, [r5, #0x4c]
	bl ov96_0220B7B4
	add r0, r0, #1
	mov r1, #3
	bl _s32_div_f
	lsl r2, r1, #0x18
	mov r0, #1
	str r0, [sp]
	mov r3, #2
	mov r0, #0x97
	lsr r2, r2, #0x16
	str r3, [sp, #4]
	lsl r0, r0, #2
	add r2, r5, r2
	ldr r0, [r5, r0]
	ldr r2, [r2, #0x18]
	mov r1, #0
	bl BufferString
	mov r2, #0x92
	ldr r0, [r5]
	lsl r2, r2, #2
	add r1, r2, #0
	str r0, [sp]
	add r0, r5, r2
	add r1, #0x14
	add r2, #0x10
	ldr r1, [r5, r1]
	ldr r2, [r5, r2]
	mov r3, #0x9a
	bl ov96_02209F40
	add sp, #8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02209E70

	thumb_func_start ov96_02209F14
ov96_02209F14: ; 0x02209F14
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	mov r3, #0x86
	lsl r3, r3, #2
	ldr r0, [r4]
	add r1, r3, #0
	add r2, r3, #0
	str r0, [sp]
	add r1, #0x44
	add r2, #0x40
	add r0, r4, r3
	ldr r1, [r4, r1]
	ldr r2, [r4, r2]
	sub r3, #0xeb
	bl ov96_02209F40
	add r0, r4, #0
	bl ov96_02209E70
	add sp, #4
	pop {r3, r4, pc}
	thumb_func_end ov96_02209F14

	thumb_func_start ov96_02209F40
ov96_02209F40: ; 0x02209F40
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r1, #0
	mov r1, #0
	add r5, r0, #0
	add r6, r2, #0
	add r7, r3, #0
	bl FillWindowPixelBuffer
	ldr r3, [sp, #0x28]
	add r0, r4, #0
	add r1, r6, #0
	add r2, r7, #0
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02209F88 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02209F88: .word 0x000F0E00
	thumb_func_end ov96_02209F40

	thumb_func_start ov96_02209F8C
ov96_02209F8C: ; 0x02209F8C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	str r0, [sp, #8]
	bl ov96_021E5DC4
	add r7, r0, #0
	bne _02209F9E
	bl GF_AssertFail
_02209F9E:
	ldr r0, [r7, #8]
	cmp r0, #0
	bne _02209FA8
	bl GF_AssertFail
_02209FA8:
	ldr r0, [r7, #0xc]
	cmp r0, #0
	bne _02209FB2
	bl GF_AssertFail
_02209FB2:
	ldr r0, [r7, #0x44]
	cmp r0, #0
	bne _02209FBC
	bl GF_AssertFail
_02209FBC:
	mov r0, #0
	str r0, [sp, #0x1c]
	add r0, r7, #0
	str r0, [sp, #0x18]
	add r0, #0x54
	str r0, [sp, #0x18]
	mov r0, #0x78
	str r0, [sp, #0x14]
	ldr r0, _0220A0DC ; =0x0221CCC8
	str r0, [sp, #0x10]
_02209FD0:
	ldr r0, [sp, #0x14]
	mov r3, #0x98
	lsl r0, r0, #0x10
	asr r4, r0, #0x10
	ldr r0, [sp, #0x1c]
	add r2, r4, #0
	add r0, #0xd
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r7, #8]
	ldr r1, [r7, #0xc]
	bl ov96_0220D1A0
	ldr r1, [sp, #0x18]
	mov r2, #0
	str r0, [r1, #4]
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #8]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_0220A254
	mov r0, #0x12
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, [r7, #8]
	ldr r1, [r7, #0xc]
	add r2, r4, #0
	mov r3, #0x98
	bl ov96_0220D1A0
	ldr r1, [sp, #0x18]
	str r0, [r1, #8]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [sp, #0x14]
	mov r6, #0
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add r0, r0, #6
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	ldr r5, [sp, #0x18]
	add r4, r6, #0
	str r0, [sp, #0x20]
_0220A034:
	ldr r0, [sp, #0x10]
	mov r3, #0x88
	ldr r0, [r0, #8]
	sub r3, r3, r4
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #0x2c
	sub r0, r0, r6
	lsl r0, r0, #0x18
	lsl r3, r3, #0x10
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	asr r3, r3, #0x10
	sub r3, #0x14
	lsl r3, r3, #0x10
	ldr r0, [r7, #8]
	ldr r1, [r7, #0xc]
	ldr r2, [sp, #0x20]
	asr r3, r3, #0x10
	bl ov96_0220D1A0
	mov r1, #0
	str r0, [r5, #0x5c]
	bl sub_0200DCE8
	add r6, r6, #1
	add r4, #0x10
	add r5, r5, #4
	cmp r6, #5
	blt _0220A034
	ldr r0, [sp, #0x14]
	mov r5, #0
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	ldr r4, [sp, #0x18]
	str r0, [sp, #0xc]
	add r6, r5, #0
_0220A080:
	ldr r0, [sp, #0x10]
	mov r3, #0x88
	ldr r0, [r0, #4]
	sub r3, r3, r6
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #0x18
	sub r0, r0, r5
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	lsl r3, r3, #0x10
	ldr r0, [r7, #8]
	ldr r1, [r7, #0xc]
	ldr r2, [sp, #0xc]
	asr r3, r3, #0x10
	bl ov96_0220D1A0
	mov r1, #0
	str r0, [r4, #0xc]
	bl sub_0200DCE8
	add r5, r5, #1
	add r6, r6, #4
	add r4, r4, #4
	cmp r5, #0x14
	blt _0220A080
	ldr r0, [sp, #0x18]
	add r0, #0x70
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r0, #0x20
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r0, #0xc
	str r0, [sp, #0x10]
	ldr r0, [sp, #0x1c]
	add r0, r0, #1
	str r0, [sp, #0x1c]
	cmp r0, #4
	bge _0220A0D6
	b _02209FD0
_0220A0D6:
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_0220A0DC: .word 0x0221CCC8
	thumb_func_end ov96_02209F8C

	thumb_func_start ov96_0220A0E0
ov96_0220A0E0: ; 0x0220A0E0
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	mov r7, #0
	add r6, #0x54
_0220A0E8:
	ldr r0, [r6, #4]
	cmp r0, #0
	bne _0220A0F2
	bl GF_AssertFail
_0220A0F2:
	ldr r0, [r6, #4]
	bl sub_0200D9DC
	ldr r0, [r6, #8]
	cmp r0, #0
	bne _0220A102
	bl GF_AssertFail
_0220A102:
	ldr r0, [r6, #8]
	bl sub_0200D9DC
	mov r4, #0
	add r5, r6, #0
_0220A10C:
	ldr r0, [r5, #0xc]
	cmp r0, #0
	bne _0220A116
	bl GF_AssertFail
_0220A116:
	ldr r0, [r5, #0xc]
	bl sub_0200D9DC
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0x14
	blt _0220A10C
	mov r5, #0
	add r4, r6, #0
_0220A128:
	ldr r0, [r4, #0x5c]
	cmp r0, #0
	bne _0220A132
	bl GF_AssertFail
_0220A132:
	ldr r0, [r4, #0x5c]
	bl sub_0200D9DC
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #5
	blt _0220A128
	add r7, r7, #1
	add r6, #0x70
	cmp r7, #4
	blt _0220A0E8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220A0E0

	thumb_func_start ov96_0220A14C
ov96_0220A14C: ; 0x0220A14C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	cmp r0, #0
	bne _0220A15A
	bl GF_AssertFail
_0220A15A:
	ldr r0, [sp]
	bl ov96_021E5DC4
	add r7, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	add r7, #0x54
_0220A176:
	ldr r0, [sp, #4]
	mov r1, #5
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bl _u32_div_f
	add r6, r0, #0
	cmp r6, #0x14
	ble _0220A1BE
	ldr r0, [r7, #0x5c]
	bl sub_0200DCFC
	cmp r0, #0
	bne _0220A1BC
	mov r4, #0
	add r5, r7, #0
_0220A198:
	ldr r0, [r5, #0x5c]
	mov r1, #1
	bl sub_0200DCE8
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #5
	blt _0220A198
	mov r5, #0
	add r4, r7, #0
_0220A1AC:
	ldr r0, [r4, #0xc]
	mov r1, #0
	bl sub_0200DCE8
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #0x14
	blt _0220A1AC
_0220A1BC:
	sub r6, #0x14
_0220A1BE:
	cmp r6, #0x14
	ble _0220A1C4
	mov r6, #0x14
_0220A1C4:
	mov r4, #0
	cmp r6, #0
	ble _0220A1EC
	add r5, r7, #0
_0220A1CC:
	ldr r0, [r5, #0xc]
	bl sub_0200DCFC
	cmp r0, #0
	bne _0220A1E4
	ldr r0, [r5, #0xc]
	bl sub_0200DCAC
	ldr r0, [r5, #0xc]
	mov r1, #1
	bl sub_0200DCE8
_0220A1E4:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, r6
	blt _0220A1CC
_0220A1EC:
	ldr r0, [sp, #4]
	ldr r0, [r0]
	lsl r1, r0, #4
	lsr r1, r1, #0x1f
	beq _0220A22C
	lsl r0, r0, #6
	lsr r2, r0, #0x1e
	ldrb r0, [r7]
	cmp r2, r0
	beq _0220A21A
	ldr r1, [sp, #8]
	lsl r2, r2, #0x18
	lsl r1, r1, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_0220A254
	ldr r0, [sp, #4]
	ldr r0, [r0]
	lsl r0, r0, #6
	lsr r0, r0, #0x1e
	strb r0, [r7]
_0220A21A:
	ldr r0, [r7, #4]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r7, #8]
	mov r1, #1
	bl sub_0200DCE8
	b _0220A23C
_0220A22C:
	ldr r0, [r7, #8]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r7, #4]
	mov r1, #1
	bl sub_0200DCE8
_0220A23C:
	ldr r0, [sp, #4]
	add r7, #0x70
	add r0, r0, #4
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _0220A176
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220A14C

	thumb_func_start ov96_0220A254
ov96_0220A254: ; 0x0220A254
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	str r2, [sp, #8]
	add r7, r0, #0
	add r5, r1, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r4, r6, #0
	ldr r2, [sp, #8]
	add r0, r7, #0
	add r1, r5, #0
	add r3, sp, #0xc
	add r4, #0x50
	bl ov96_021E6168
	lsl r0, r5, #9
	str r0, [sp]
	ldr r0, [r6]
	mov r2, #0x71
	str r0, [sp, #4]
	mov r0, #0x70
	mul r0, r5
	lsl r2, r2, #2
	add r0, r4, r0
	ldrh r2, [r4, r2]
	ldr r0, [r0, #8]
	ldr r3, [r6, #0x50]
	add r1, sp, #0xc
	bl ov96_021EECB8
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220A254

	thumb_func_start ov96_0220A298
ov96_0220A298: ; 0x0220A298
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5, #0x4c]
	add r6, r1, #0
	bl ov96_0220B730
	mov r4, #0x99
	lsl r4, r4, #2
	bl sub_02025358
	cmp r0, #0
	beq _0220A322
	add r0, sp, #0xc
	add r1, sp, #8
	bl sub_02025380
	mov r1, #0
	ldr r0, [sp, #0xc]
	add r2, r1, #0
	add r3, r1, #0
	cmp r0, #0x60
	blo _0220A2CC
	cmp r0, #0xb0
	bhi _0220A2CC
	mov r3, #1
_0220A2CC:
	cmp r3, #0
	beq _0220A2D8
	ldr r0, [sp, #8]
	cmp r0, #0x48
	blo _0220A2D8
	mov r2, #1
_0220A2D8:
	cmp r2, #0
	beq _0220A2E4
	ldr r0, [sp, #8]
	cmp r0, #0x98
	bhi _0220A2E4
	mov r1, #1
_0220A2E4:
	cmp r6, #0
	bne _0220A2EC
	cmp r1, #0
	beq _0220A3A2
_0220A2EC:
	ldr r1, [r5, r4]
	ldr r0, _0220A40C ; =0xFFFF00FF
	and r1, r0
	ldr r0, [sp, #8]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x10
	orr r0, r1
	str r0, [r5, r4]
	ldr r1, [r5, r4]
	ldr r0, _0220A410 ; =0xFF00FFFF
	and r1, r0
	ldr r0, [sp, #8]
	lsl r0, r0, #0x18
	lsr r0, r0, #8
	orr r0, r1
	str r0, [r5, r4]
	ldr r1, [r5, r4]
	mov r0, #0xff
	bic r1, r0
	mov r0, #1
	orr r1, r0
	str r1, [r5, r4]
	ldr r1, [r5, r4]
	lsl r0, r0, #0x18
	orr r0, r1
	str r0, [r5, r4]
	b _0220A3A2
_0220A322:
	ldr r0, [r5, r4]
	lsl r0, r0, #7
	lsr r0, r0, #0x1f
	beq _0220A35C
	bl sub_0202534C
	cmp r0, #0
	bne _0220A35C
	ldr r0, [r5, r4]
	lsl r1, r0, #0x10
	lsl r0, r0, #8
	lsr r1, r1, #0x18
	lsr r0, r0, #0x18
	sub r0, r1, r0
	cmp r0, #0x20
	blt _0220A352
	ldr r0, [r5, #0x4c]
	bl ov96_0220B744
	cmp r0, #0
	beq _0220A352
	ldr r0, [r5, #0x4c]
	bl ov96_0220B6EC
_0220A352:
	ldr r1, [r5, r4]
	ldr r0, _0220A414 ; =0xFEFFFFFF
	and r0, r1
	str r0, [r5, r4]
	b _0220A3A2
_0220A35C:
	ldr r0, [r5, r4]
	lsl r0, r0, #7
	lsr r0, r0, #0x1f
	beq _0220A3A2
	add r0, sp, #4
	add r1, sp, #0
	bl sub_02025364
	ldr r1, [r5, r4]
	ldr r0, _0220A410 ; =0xFF00FFFF
	and r1, r0
	ldr r0, [sp]
	lsl r0, r0, #0x18
	lsr r0, r0, #8
	orr r0, r1
	str r0, [r5, r4]
	ldr r2, [r5, r4]
	mov r1, #0xff
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x18
	lsr r1, r1, #0x18
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r0, r1
	str r0, [r5, r4]
	ldr r1, [r5, r4]
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0xa
	blo _0220A3A2
	ldr r0, _0220A414 ; =0xFEFFFFFF
	and r0, r1
	str r0, [r5, r4]
_0220A3A2:
	bl sub_02025358
	cmp r0, #0
	bne _0220A3B2
	bl sub_0202534C
	cmp r0, #0
	bgt _0220A408
_0220A3B2:
	ldr r0, _0220A418 ; =0x0221CC04
	bl sub_02025224
	mov r1, #0
	mvn r1, r1
	cmp r0, r1
	ldr r0, [r5, #0x4c]
	beq _0220A3E4
	bl ov96_0220B744
	cmp r0, #0
	beq _0220A3DA
	ldr r0, _0220A41C ; =0x0000089B
	mov r4, #0x14
	bl PlaySE
	ldr r0, [r5, #0x4c]
	bl ov96_0220B6EC
	b _0220A400
_0220A3DA:
	ldr r0, _0220A420 ; =0x0000089C
	mov r4, #0x16
	bl PlaySE
	b _0220A400
_0220A3E4:
	bl ov96_0220B744
	cmp r0, #0
	bne _0220A3F0
	mov r4, #0x15
	b _0220A400
_0220A3F0:
	ldr r0, [r5, #0x4c]
	bl ov96_0220B788
	cmp r0, #0
	beq _0220A3FE
	mov r4, #0x17
	b _0220A400
_0220A3FE:
	mov r4, #0x13
_0220A400:
	ldr r0, [r5, #0x28]
	add r1, r4, #0
	bl sub_0200DC58
_0220A408:
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220A40C: .word 0xFFFF00FF
_0220A410: .word 0xFF00FFFF
_0220A414: .word 0xFEFFFFFF
_0220A418: .word 0x0221CC04
_0220A41C: .word 0x0000089B
_0220A420: .word 0x0000089C
	thumb_func_end ov96_0220A298

	thumb_func_start ov96_0220A424
ov96_0220A424: ; 0x0220A424
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	bl ov96_021E8A20
	add r5, r0, #0
	ldr r0, [r4, #0x4c]
	bl ov96_0220B758
	add r6, r0, #0
	ldr r0, [r4, #0x4c]
	bl ov96_0220B730
	add r7, r0, #0
	ldr r0, [r4, #0x40]
	bl ov96_0220AD4C
	lsl r0, r0, #0x18
	ldr r1, [r5]
	mov r2, #0xff
	bic r1, r2
	lsr r0, r0, #0x18
	orr r1, r0
	ldr r0, _0220A4C8 ; =0xFFFF00FF
	str r1, [r5]
	and r0, r1
	ldr r1, [r6]
	lsl r1, r1, #6
	lsr r1, r1, #0x18
	lsl r1, r1, #0x18
	lsr r1, r1, #0x10
	orr r0, r1
	str r0, [r5]
	ldr r0, [r4, #0x4c]
	bl ov96_0220B79C
	lsl r0, r0, #0x18
	ldr r2, [r5]
	ldr r1, _0220A4CC ; =0xFF00FFFF
	lsr r0, r0, #8
	and r1, r2
	orr r0, r1
	str r0, [r5]
	ldr r0, [r4, #0x4c]
	bl ov96_0220B774
	lsl r0, r0, #0x1f
	ldr r2, [r5]
	ldr r1, _0220A4D0 ; =0xFBFFFFFF
	lsr r0, r0, #5
	and r1, r2
	orr r0, r1
	str r0, [r5]
	cmp r7, #3
	bne _0220A4A0
	mov r2, #1
	b _0220A4A2
_0220A4A0:
	mov r2, #0
_0220A4A2:
	ldr r1, [r5]
	ldr r0, _0220A4D4 ; =0xEFFFFFFF
	and r1, r0
	lsl r0, r2, #0x1f
	lsr r0, r0, #3
	orr r0, r1
	str r0, [r5]
	ldr r0, [r4, #0x4c]
	bl ov96_0220B7B4
	lsl r0, r0, #0x1e
	ldr r2, [r5]
	ldr r1, _0220A4D8 ; =0xFCFFFFFF
	lsr r0, r0, #6
	and r1, r2
	orr r0, r1
	str r0, [r5]
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220A4C8: .word 0xFFFF00FF
_0220A4CC: .word 0xFF00FFFF
_0220A4D0: .word 0xFBFFFFFF
_0220A4D4: .word 0xEFFFFFFF
_0220A4D8: .word 0xFCFFFFFF
	thumb_func_end ov96_0220A424

	thumb_func_start ov96_0220A4DC
ov96_0220A4DC: ; 0x0220A4DC
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	bl ov96_021E5F24
	add r6, r0, #0
	ldr r0, [sp]
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	add r4, r0, #0
	cmp r5, #0
	bne _0220A4FE
	bl GF_AssertFail
_0220A4FE:
	ldr r0, [r5, #0x4c]
	cmp r0, #0
	bne _0220A508
	bl GF_AssertFail
_0220A508:
	ldr r0, [r5, #0x40]
	cmp r0, #0
	bne _0220A512
	bl GF_AssertFail
_0220A512:
	cmp r6, #0
	bne _0220A5C0
	add r0, r4, #0
	add r0, #0x28
	bl ov96_021E8A20
	add r5, r0, #0
	add r0, r4, #0
	add r0, #0x50
	bl ov96_021E8A20
	add r6, r0, #0
	add r0, r4, #0
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_0220A534:
	ldmia r3!, {r0, r1}
	stmia r6!, {r0, r1}
	sub r2, r2, #1
	bne _0220A534
	ldr r0, [r3]
	add r4, #0x50
	str r0, [r6]
	mov r6, #0
	mov r7, #0xff
_0220A546:
	add r0, r4, #0
	bl ov96_021E8A20
	ldr r2, [r0]
	ldr r1, [r5]
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	lsl r2, r2, #0x18
	bic r1, r7
	lsr r2, r2, #0x18
	orr r2, r1
	ldr r1, _0220A5C8 ; =0xFFFF00FF
	str r2, [r5]
	and r1, r2
	ldr r2, [r0]
	add r6, r6, #1
	lsl r2, r2, #0x10
	lsr r2, r2, #0x18
	lsl r2, r2, #0x18
	lsr r2, r2, #0x10
	orr r2, r1
	ldr r1, _0220A5CC ; =0xFF00FFFF
	str r2, [r5]
	and r1, r2
	ldr r2, [r0]
	add r4, #0x28
	lsl r2, r2, #8
	lsr r2, r2, #0x18
	lsl r2, r2, #0x18
	lsr r2, r2, #8
	orr r2, r1
	ldr r1, _0220A5D0 ; =0xFCFFFFFF
	str r2, [r5]
	and r1, r2
	ldr r2, [r0]
	lsl r2, r2, #6
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x1e
	lsr r2, r2, #6
	orr r2, r1
	ldr r1, _0220A5D4 ; =0xFBFFFFFF
	str r2, [r5]
	and r1, r2
	ldr r2, [r0]
	lsl r2, r2, #5
	lsr r2, r2, #0x1f
	lsl r2, r2, #0x1f
	lsr r2, r2, #5
	orr r2, r1
	str r2, [r5]
	ldr r0, [r0]
	ldr r1, _0220A5D8 ; =0xF7FFFFFF
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	lsl r0, r0, #0x1f
	and r1, r2
	lsr r0, r0, #4
	orr r0, r1
	stmia r5!, {r0}
	cmp r6, #4
	blt _0220A546
_0220A5C0:
	ldr r0, [sp]
	bl ov96_0220A424
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220A5C8: .word 0xFFFF00FF
_0220A5CC: .word 0xFF00FFFF
_0220A5D0: .word 0xFCFFFFFF
_0220A5D4: .word 0xFBFFFFFF
_0220A5D8: .word 0xF7FFFFFF
	thumb_func_end ov96_0220A4DC

	thumb_func_start ov96_0220A5DC
ov96_0220A5DC: ; 0x0220A5DC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp, #0x10]
	add r5, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0x97
	lsl r0, r0, #2
	ldr r6, [r4, r0]
	sub r0, r0, #4
	ldr r7, [r4, r0]
	lsl r1, r5, #0x10
	ldr r0, [sp, #0x10]
	lsr r1, r1, #0x10
	bl ov96_021E8318
	mov r0, #0x8e
	lsl r0, r0, #2
	add r0, r4, r0
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r1, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	add r0, r6, #0
	add r2, r5, #0
	mov r3, #3
	bl BufferIntegerAsString
	ldr r3, [r4]
	add r0, r6, #0
	add r1, r7, #0
	mov r2, #0x9f
	bl ReadMsgData_ExpandPlaceholders
	add r5, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _0220A65C ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	mov r0, #0x8e
	lsl r0, r0, #2
	add r0, r4, r0
	add r2, r5, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	mov r0, #0x8e
	lsl r0, r0, #2
	add r0, r4, r0
	bl CopyWindowToVram
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_0220A65C: .word 0x000F0E00
	thumb_func_end ov96_0220A5DC

	thumb_func_start ov96_0220A660
ov96_0220A660: ; 0x0220A660
	push {r4, r5, r6, lr}
	add r6, r0, #0
	ldr r0, _0220A700 ; =0x0000026E
	add r5, r1, #0
	ldrb r0, [r5, r0]
	cmp r0, #0
	beq _0220A672
	mov r1, #1
	b _0220A676
_0220A672:
	mov r1, #0
	mvn r1, r1
_0220A676:
	mov r0, #0x9b
	lsl r0, r0, #2
	ldrsb r0, [r5, r0]
	mov r2, #3
	add r4, r0, #0
	mul r4, r1
	ldr r0, [r5, #4]
	mov r1, #0
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #1
	mov r2, #3
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	bl sub_0200CF6C
	neg r2, r4
	mov r1, #0
	lsl r2, r2, #0xc
	bl sub_02009FA8
	mov r1, #0x9b
	lsl r1, r1, #2
	add r0, r1, #1
	ldrsb r2, [r5, r1]
	ldrb r0, [r5, r0]
	sub r0, r2, r0
	strb r0, [r5, r1]
	add r0, r1, #2
	ldrb r2, [r5, r0]
	mov r0, #1
	eor r2, r0
	add r0, r1, #2
	strb r2, [r5, r0]
	ldrsb r0, [r5, r1]
	cmp r0, #0
	bgt _0220A6FC
	ldr r0, [r5, #4]
	mov r1, #0
	mov r2, #3
	mov r3, #0x10
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #1
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	ldr r0, [r5, #8]
	bl sub_0200CF6C
	mov r1, #0
	add r2, r1, #0
	bl sub_02009FA8
	mov r0, #0x9a
	mov r1, #0
	lsl r0, r0, #2
	str r1, [r5, r0]
	add r0, r6, #0
	bl sub_0200E390
_0220A6FC:
	pop {r4, r5, r6, pc}
	nop
_0220A700: .word 0x0000026E
	thumb_func_end ov96_0220A660

	thumb_func_start ov96_0220A704
ov96_0220A704: ; 0x0220A704
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r0, #0x9a
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	add r4, r1, #0
	add r6, r2, #0
	cmp r0, #0
	beq _0220A71A
	bl sub_0200E390
_0220A71A:
	ldr r0, _0220A73C ; =0x0000026E
	mov r1, #0
	strb r1, [r5, r0]
	sub r1, r0, #2
	strb r4, [r5, r1]
	sub r0, r0, #1
	strb r6, [r5, r0]
	ldr r0, _0220A740 ; =ov96_0220A660
	add r1, r5, #0
	mov r2, #2
	bl sub_0200E320
	mov r1, #0x9a
	lsl r1, r1, #2
	str r0, [r5, r1]
	pop {r4, r5, r6, pc}
	nop
_0220A73C: .word 0x0000026E
_0220A740: .word ov96_0220A660
	thumb_func_end ov96_0220A704

	thumb_func_start ov96_0220A744
ov96_0220A744: ; 0x0220A744
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r1, #0
	mov r1, #0x61
	lsl r1, r1, #2
	str r0, [sp, #8]
	add r7, r2, #0
	add r4, r3, #0
	bl AllocFromHeap
	mov r2, #0x61
	str r0, [sp, #0xc]
	mov r1, #0
	lsl r2, r2, #2
	bl MIi_CpuFill8
	mov r0, #6
	ldr r1, [sp, #0xc]
	lsl r0, r0, #6
	ldr r2, [r1, r0]
	mov r1, #0xf
	bic r2, r1
	add r3, r2, #0
	mov r1, #1
	ldr r2, [sp, #0xc]
	orr r3, r1
	str r3, [r2, r0]
	ldr r2, [r2, r0]
	mov r3, #0xf0
	bic r2, r3
	ldr r3, [sp, #0xc]
	str r2, [r3, r0]
	add r0, r3, #0
	str r6, [r0, #4]
	str r7, [r0, #8]
	str r4, [r0]
	mov r0, #7
	str r0, [sp]
	mov r2, #0
	str r1, [sp, #4]
	add r0, r6, #0
	add r1, r7, #0
	add r3, r2, #0
	bl ov96_0220D13C
	ldr r1, [sp, #0xc]
	str r0, [r1, #0xc]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #0x12
	str r0, [sp]
	mov r0, #1
	mov r2, #0
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r7, #0
	add r3, r2, #0
	bl ov96_0220D13C
	ldr r1, [sp, #0xc]
	str r0, [r1, #0x10]
	mov r1, #0
	bl sub_0200DCE8
	ldr r5, [sp, #0xc]
	mov r4, #0
_0220A7CA:
	lsl r3, r4, #0x10
	ldr r0, [sp, #8]
	add r1, r6, #0
	add r2, r7, #0
	lsr r3, r3, #0x10
	bl ov96_0220AE40
	mov r1, #0x55
	lsl r1, r1, #2
	str r0, [r5, r1]
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0xa
	blt _0220A7CA
	ldr r0, [sp, #0xc]
	add r1, r6, #0
	add r0, #0x14
	add r2, r7, #0
	bl ov96_0220B178
	ldr r0, [sp, #0xc]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220A744

	thumb_func_start ov96_0220A7F8
ov96_0220A7F8: ; 0x0220A7F8
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bne _0220A802
	bl GF_AssertFail
_0220A802:
	ldr r0, [r6, #0xc]
	cmp r0, #0
	bne _0220A80C
	bl GF_AssertFail
_0220A80C:
	ldr r0, [r6, #0xc]
	bl sub_0200D9DC
	ldr r0, [r6, #0x10]
	bl sub_0200D9DC
	mov r7, #0x55
	mov r4, #0
	add r5, r6, #0
	lsl r7, r7, #2
_0220A820:
	ldr r0, [r5, r7]
	bl ov96_0220AF30
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0xa
	blt _0220A820
	add r0, r6, #0
	add r0, #0x14
	bl ov96_0220B1B8
	add r0, r6, #0
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220A7F8

	thumb_func_start ov96_0220A840
ov96_0220A840: ; 0x0220A840
	push {r4, lr}
	add r4, r0, #0
	bne _0220A84A
	bl GF_AssertFail
_0220A84A:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #1
	beq _0220A85E
	cmp r0, #2
	beq _0220A866
	b _0220A86E
_0220A85E:
	add r0, r4, #0
	bl ov96_0220AD64
	b _0220A872
_0220A866:
	add r0, r4, #0
	bl ov96_0220AE28
	b _0220A872
_0220A86E:
	bl GF_AssertFail
_0220A872:
	add r4, #0x14
	add r0, r4, #0
	bl ov96_0220B324
	pop {r4, pc}
	thumb_func_end ov96_0220A840

	thumb_func_start ov96_0220A87C
ov96_0220A87C: ; 0x0220A87C
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	ldr r0, [r0, #0x10]
	mov r1, #0
	bl sub_0200DC78
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	bl sub_0200DC78
	mov r7, #0x55
	lsl r7, r7, #2
	ldr r5, [sp]
	mov r4, #0
	add r6, r7, #0
_0220A89C:
	ldr r0, [r5, r6]
	ldr r1, [r0, #0x10]
	lsl r1, r1, #4
	lsr r1, r1, #0x1f
	beq _0220A8B8
	ldr r0, [r0]
	mov r1, #0
	bl sub_0200DC78
	ldr r0, [r5, r7]
	mov r1, #0
	ldr r0, [r0, #4]
	bl sub_0200DC78
_0220A8B8:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0xa
	blt _0220A89C
	ldr r0, [sp]
	add r0, #0x14
	str r0, [sp]
	bl ov96_0220B354
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220A87C

	thumb_func_start ov96_0220A8CC
ov96_0220A8CC: ; 0x0220A8CC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	cmp r5, #0
	bne _0220A8DA
	bl GF_AssertFail
_0220A8DA:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1c
	bne _0220A8EA
	bl GF_AssertFail
_0220A8EA:
	mov r0, #6
	lsl r0, r0, #6
	ldr r1, [r5, r0]
	sub r0, #0x30
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1c
	lsl r1, r1, #2
	add r1, r5, r1
	ldr r0, [r1, r0]
	add r1, r4, #0
	bl ov96_0220B0A4
	cmp r0, #0
	beq _0220A90A
	mov r0, #1
	pop {r3, r4, r5, pc}
_0220A90A:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220A8CC

	thumb_func_start ov96_0220A910
ov96_0220A910: ; 0x0220A910
	push {r4, r5, r6, r7, lr}
	sub sp, #0x4c
	add r4, r0, #0
	bne _0220A91C
	bl GF_AssertFail
_0220A91C:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	lsl r1, r0, #0x1c
	lsr r1, r1, #0x1c
	cmp r1, #1
	bne _0220A930
	add sp, #0x4c
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_0220A930:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1c
	bne _0220A93A
	bl GF_AssertFail
_0220A93A:
	mov r0, #6
	lsl r0, r0, #6
	ldr r1, [r4, r0]
	sub r0, #0x30
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1c
	lsl r1, r1, #2
	add r1, r4, r1
	ldr r0, [r1, r0]
	add r1, sp, #0x10
	add r1, #2
	add r2, sp, #0x10
	bl ov96_0220B148
	add r0, sp, #0x18
	add r1, sp, #0x14
	bl sub_02025380
	add r1, sp, #0x10
	mov r0, #0
	ldrsh r0, [r1, r0]
	str r0, [sp]
	ldr r0, [sp]
	ldr r4, [sp, #0x14]
	sub r0, #0x12
	cmp r4, r0
	blo _0220A978
	ldr r0, [sp]
	add r0, #0xc
	cmp r4, r0
	bls _0220A97A
_0220A978:
	b _0220AAE2
_0220A97A:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _0220A992
	lsl r0, r0, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220A9A0
_0220A992:
	lsl r0, r0, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220A9A0:
	bl _ftoi
	str r0, [sp, #0xc]
	cmp r4, #0
	beq _0220A9BC
	lsl r0, r4, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220A9CA
_0220A9BC:
	lsl r0, r4, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220A9CA:
	bl _ftoi
	str r0, [sp, #8]
	mov r6, #0x3f
	add r1, sp, #0x10
	mov r0, #2
	ldrsh r0, [r1, r0]
	ldr r4, _0220AAE8 ; =0x0221CDD8
	mov r7, #0
	add r5, sp, #0x1c
	str r0, [sp, #4]
	lsl r6, r6, #0x18
_0220A9E2:
	mov r0, #0
	ldrsh r1, [r4, r0]
	ldr r0, [sp, #4]
	add r0, r0, r1
	cmp r0, #0
	ble _0220A9FE
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _0220AA0A
_0220A9FE:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_0220AA0A:
	bl _ftoi
	str r0, [r5]
	mov r0, #2
	ldrsh r1, [r4, r0]
	ldr r0, [sp]
	add r0, r0, r1
	cmp r0, #0
	ble _0220AA2C
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _0220AA38
_0220AA2C:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_0220AA38:
	bl _ftoi
	str r0, [r5, #4]
	add r7, r7, #1
	add r4, r4, #4
	add r5, #0xc
	cmp r7, #4
	blt _0220A9E2
	ldr r4, [sp, #0x1c]
	ldr r2, [sp, #0xc]
	ldr r1, [sp, #0x2c]
	ldr r0, [sp, #0x20]
	sub r2, r2, r4
	sub r0, r1, r0
	asr r1, r0, #0x1f
	asr r3, r2, #0x1f
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r0, r0, r2
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	ldr r1, [sp, #0x28]
	sub r1, r1, r4
	bl FX_Div
	ldr r1, [sp, #0x20]
	ldr r5, [sp, #0x34]
	add r4, r0, r1
	ldr r2, [sp, #0xc]
	ldr r1, [sp, #0x44]
	ldr r0, [sp, #0x38]
	sub r2, r2, r5
	sub r0, r1, r0
	asr r1, r0, #0x1f
	asr r3, r2, #0x1f
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r0, r0, r2
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	ldr r1, [sp, #0x40]
	sub r1, r1, r5
	bl FX_Div
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0xc]
	add r0, r0, r1
	ldr r1, [sp, #0x28]
	cmp r2, r1
	blt _0220AAB6
	ldr r3, [sp, #0x34]
	cmp r2, r3
	ble _0220AADC
_0220AAB6:
	ldr r2, [sp, #8]
	cmp r2, r4
	blt _0220AAC8
	ldr r3, [sp, #0x1c]
	ldr r2, [sp, #0xc]
	cmp r2, r3
	blt _0220AAC8
	cmp r2, r1
	ble _0220AADC
_0220AAC8:
	ldr r1, [sp, #8]
	cmp r1, r0
	bgt _0220AAE2
	ldr r1, [sp, #0x34]
	ldr r0, [sp, #0xc]
	cmp r0, r1
	blt _0220AAE2
	ldr r1, [sp, #0x40]
	cmp r0, r1
	bgt _0220AAE2
_0220AADC:
	add sp, #0x4c
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_0220AAE2:
	mov r0, #0
	add sp, #0x4c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220AAE8: .word 0x0221CDD8
	thumb_func_end ov96_0220A910

	thumb_func_start ov96_0220AAEC
ov96_0220AAEC: ; 0x0220AAEC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r5, r0, #0
	mov r0, #0
	str r1, [sp, #4]
	add r6, r2, #0
	add r4, r3, #0
	str r0, [sp, #8]
	cmp r5, #0
	bne _0220AB04
	bl GF_AssertFail
_0220AB04:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1c
	bne _0220AB16
	add sp, #0x24
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_0220AB16:
	add r0, sp, #0x20
	add r1, sp, #0x1c
	bl sub_02025380
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x1c]
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	ldr r0, [r5, #0xc]
	asr r1, r1, #0x10
	asr r2, r2, #0x10
	mov r7, #7
	bl sub_0200DDB8
	cmp r4, #0
	bne _0220AB3C
	ldr r0, [sp, #0x38]
	cmp r0, #0
	beq _0220AB3E
_0220AB3C:
	mov r7, #0x12
_0220AB3E:
	ldr r0, [r5, #0xc]
	add r1, r7, #0
	bl sub_0200DC4C
	ldr r0, [r5, #0xc]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [sp, #0x38]
	cmp r0, #0
	beq _0220AB62
	add r6, #0x96
	lsl r0, r6, #0x10
	asr r6, r0, #0x10
	ldr r0, _0220AD24 ; =0x000008BB
	bl PlaySE
	b _0220AB72
_0220AB62:
	cmp r4, #0
	beq _0220AB72
	add r6, #0xa0
	lsl r0, r6, #0x10
	asr r6, r0, #0x10
	ldr r0, _0220AD24 ; =0x000008BB
	bl PlaySE
_0220AB72:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	mov r7, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1c
	str r0, [sp, #0xc]
	cmp r0, #0
	ble _0220AC6A
	add r0, r5, #0
	str r0, [sp, #0x10]
	add r0, #0x14
	str r0, [sp, #0x10]
	mov r0, #0xf0
	str r0, [sp, #0x14]
_0220AB90:
	ldr r0, [sp, #0xc]
	add r1, r7, #1
	sub r0, r0, r1
	lsl r0, r0, #2
	add r1, r5, r0
	mov r0, #0x55
	lsl r0, r0, #2
	ldr r4, [r1, r0]
	cmp r6, #0
	ble _0220AC6A
	mov r0, #8
	ldrsh r0, [r4, r0]
	sub r0, r0, r6
	strh r0, [r4, #8]
	mov r0, #8
	ldrsh r0, [r4, r0]
	cmp r0, #0
	bgt _0220AC6A
	bgt _0220AC62
	mov r0, #6
	lsl r0, r0, #6
	ldr r2, [r5, r0]
	ldr r1, [sp, #0x14]
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x18
	lsr r1, r1, #0x1c
	sub r1, r1, #1
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x18
	orr r1, r0
	mov r0, #6
	lsl r0, r0, #6
	str r1, [r5, r0]
	sub r0, r0, #4
	ldr r1, [r5, r0]
	lsl r0, r1, #0x10
	lsr r1, r1, #0x10
	add r1, r1, #1
	lsr r0, r0, #0x10
	lsl r1, r1, #0x10
	orr r1, r0
	mov r0, #0x5f
	lsl r0, r0, #2
	str r1, [r5, r0]
	ldr r0, [r5, r0]
	lsr r0, r0, #0x10
	cmp r0, #0xc8
	bls _0220AC08
	mov r0, #0x5f
	lsl r0, r0, #2
	ldr r0, [r5, r0]
	lsl r0, r0, #0x10
	lsr r1, r0, #0x10
	mov r0, #0x32
	lsl r0, r0, #0x12
	orr r1, r0
	mov r0, #0x5f
	lsl r0, r0, #2
	str r1, [r5, r0]
_0220AC08:
	ldr r0, [r4]
	mov r1, #0
	bl sub_0200DC4C
	add r1, sp, #0x18
	ldr r0, [r4]
	add r1, #2
	add r2, sp, #0x18
	bl sub_0200DE44
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #8
	ldrsh r0, [r4, r0]
	add r3, sp, #0x18
	mov r2, #2
	neg r0, r0
	lsl r0, r0, #0x10
	asr r6, r0, #0x10
	ldr r0, [sp, #8]
	ldrsh r2, [r3, r2]
	add r4, r3, #0
	mov r3, #0
	add r0, r0, #1
	str r0, [sp, #8]
	ldrsh r3, [r4, r3]
	ldr r0, [sp, #0x10]
	mov r1, #4
	bl ov96_0220B1D8
	ldr r0, [r5]
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldr r0, [r5]
	ldr r2, [sp, #4]
	lsr r1, r1, #0x18
	mov r3, #3
	bl ov96_021E8228
_0220AC62:
	ldr r0, [sp, #0xc]
	add r7, r7, #1
	cmp r7, r0
	blt _0220AB90
_0220AC6A:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _0220AC78
	ldr r0, _0220AD28 ; =0x000008B9
	bl PlaySE
	b _0220ACA0
_0220AC78:
	ldr r0, _0220AD2C ; =0x000008B8
	bl PlaySE
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x1c]
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	ldr r0, [r5, #0x10]
	asr r1, r1, #0x10
	asr r2, r2, #0x10
	bl sub_0200DDB8
	ldr r0, [r5, #0x10]
	mov r1, #6
	bl sub_0200DC4C
	ldr r0, [r5, #0x10]
	mov r1, #1
	bl sub_0200DCE8
_0220ACA0:
	ldr r0, [sp, #8]
	cmp r0, #0
	bne _0220ACFC
	mov r0, #6
	lsl r0, r0, #6
	ldr r1, [r5, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1c
	beq _0220ACFC
	lsl r1, r1, #2
	add r1, r5, r1
	sub r0, #0x30
	ldr r1, [r1, r0]
	mov r0, #8
	ldrsh r0, [r1, r0]
	cmp r0, #0x14
	bgt _0220ACCC
	ldr r0, [r1]
	mov r1, #3
	bl sub_0200DC4C
	b _0220ACFC
_0220ACCC:
	cmp r0, #0x3c
	bgt _0220ACFC
	ldr r0, [r1]
	mov r1, #2
	bl sub_0200DC4C
	ldr r0, _0220AD2C ; =0x000008B8
	bl PlaySE
	bl LCRandom
	add r2, r0, #0
	lsr r4, r2, #0x1f
	lsl r3, r2, #0x19
	sub r3, r3, r4
	mov r2, #0x19
	ror r3, r2
	ldr r0, _0220AD2C ; =0x000008B8
	ldr r1, _0220AD30 ; =0x0000FFFF
	add r3, r4, r3
	mov r2, #0x40
	sub r2, r2, r3
	bl sub_0200592C
_0220ACFC:
	ldr r0, [sp, #8]
	cmp r0, #0
	ble _0220AD12
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1c
	bne _0220AD12
	mov r1, #1
	b _0220AD14
_0220AD12:
	mov r1, #0
_0220AD14:
	ldr r0, [sp, #0x3c]
	str r1, [r0]
	ldr r0, [sp, #8]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_0220AD24: .word 0x000008BB
_0220AD28: .word 0x000008B9
_0220AD2C: .word 0x000008B8
_0220AD30: .word 0x0000FFFF
	thumb_func_end ov96_0220AAEC

	thumb_func_start ov96_0220AD34
ov96_0220AD34: ; 0x0220AD34
	push {r4, lr}
	add r4, r0, #0
	bne _0220AD3E
	bl GF_AssertFail
_0220AD3E:
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220AD34

	thumb_func_start ov96_0220AD4C
ov96_0220AD4C: ; 0x0220AD4C
	push {r4, lr}
	add r4, r0, #0
	bne _0220AD56
	bl GF_AssertFail
_0220AD56:
	mov r0, #0x5f
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	lsr r0, r0, #0x10
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	pop {r4, pc}
	thumb_func_end ov96_0220AD4C

	thumb_func_start ov96_0220AD64
ov96_0220AD64: ; 0x0220AD64
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	mov r0, #6
	lsl r0, r0, #6
	ldr r1, [r5, r0]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1c
	cmp r1, #0xa
	blo _0220ADAC
	add r7, r0, #0
	mov r6, #0
	add r4, r5, #0
	sub r7, #0x2c
_0220AD7E:
	ldr r0, [r4, r7]
	bl ov96_0220B164
	cmp r0, #1
	beq _0220AD90
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #0xa
	blt _0220AD7E
_0220AD90:
	cmp r6, #0xa
	bne _0220AE06
	ldr r0, _0220AE1C ; =0x000008BD
	bl PlaySE
	mov r1, #6
	lsl r1, r1, #6
	ldr r2, [r5, r1]
	mov r0, #0xf
	bic r2, r0
	mov r0, #2
	orr r0, r2
	str r0, [r5, r1]
	b _0220AE06
_0220ADAC:
	sub r1, r0, #4
	ldr r1, [r5, r1]
	sub r3, r0, #4
	lsl r1, r1, #0x10
	lsr r2, r1, #0x10
	add r1, r3, #0
	add r6, r2, #1
	lsl r6, r6, #0x10
	ldr r1, [r5, r1]
	ldr r4, _0220AE20 ; =0xFFFF0000
	lsr r6, r6, #0x10
	and r1, r4
	orr r6, r1
	add r1, r3, #0
	str r6, [r5, r1]
	cmp r2, #2
	blo _0220AE06
	ldr r1, [r5, r3]
	and r1, r4
	str r1, [r5, r3]
	ldr r1, [r5, r0]
	sub r0, #0x2c
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1c
	lsl r1, r1, #2
	add r1, r5, r1
	ldr r0, [r1, r0]
	bl ov96_0220AED4
	ldr r0, _0220AE24 ; =0x000008C1
	bl PlaySE
	mov r2, #6
	lsl r2, r2, #6
	ldr r3, [r5, r2]
	mov r1, #0xf0
	add r0, r3, #0
	bic r0, r1
	lsl r1, r3, #0x18
	lsr r1, r1, #0x1c
	add r1, r1, #1
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x18
	orr r0, r1
	str r0, [r5, r2]
_0220AE06:
	mov r6, #0x55
	mov r4, #0
	lsl r6, r6, #2
_0220AE0C:
	ldr r0, [r5, r6]
	bl ov96_0220AF64
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0xa
	blt _0220AE0C
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220AE1C: .word 0x000008BD
_0220AE20: .word 0xFFFF0000
_0220AE24: .word 0x000008C1
	thumb_func_end ov96_0220AD64

	thumb_func_start ov96_0220AE28
ov96_0220AE28: ; 0x0220AE28
	mov r2, #6
	lsl r2, r2, #6
	ldr r3, [r0, r2]
	lsl r1, r3, #0x18
	lsr r1, r1, #0x1c
	bne _0220AE3E
	mov r1, #0xf
	bic r3, r1
	mov r1, #1
	orr r1, r3
	str r1, [r0, r2]
_0220AE3E:
	bx lr
	thumb_func_end ov96_0220AE28

	thumb_func_start ov96_0220AE40
ov96_0220AE40: ; 0x0220AE40
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r6, r1, #0
	add r4, r0, #0
	add r7, r2, #0
	add r5, r3, #0
	cmp r6, #0
	bne _0220AE54
	bl GF_AssertFail
_0220AE54:
	cmp r7, #0
	bne _0220AE5C
	bl GF_AssertFail
_0220AE5C:
	add r0, r4, #0
	mov r1, #0x14
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0x14
	bl MIi_CpuFill8
	mov r2, #0
	ldr r1, [r4, #0x10]
	ldr r0, _0220AED0 ; =0xF80FFFFF
	add r3, r2, #0
	and r1, r0
	lsl r0, r5, #0x19
	lsr r0, r0, #5
	orr r0, r1
	str r0, [r4, #0x10]
	lsl r1, r5, #1
	mov r0, #0x16
	sub r0, r0, r1
	lsl r0, r0, #0x10
	lsr r5, r0, #0x10
	mov r0, #4
	str r0, [sp]
	add r0, r6, #0
	add r1, r7, #0
	str r5, [sp, #4]
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r4, #4]
	bl sub_0200DCE8
	mov r0, #1
	str r0, [sp]
	add r0, r5, #1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r7, #0
	mov r2, #0x78
	mov r3, #0
	bl ov96_0220D13C
	str r0, [r4]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4]
	mov r1, #1
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220AED0: .word 0xF80FFFFF
	thumb_func_end ov96_0220AE40

	thumb_func_start ov96_0220AED4
ov96_0220AED4: ; 0x0220AED4
	push {r4, lr}
	add r4, r0, #0
	bne _0220AEDE
	bl GF_AssertFail
_0220AEDE:
	mov r0, #0x64
	strh r0, [r4, #8]
	ldr r1, [r4, #0x10]
	ldr r0, _0220AF28 ; =0xFFFFF00F
	and r1, r0
	ldr r0, _0220AF2C ; =0xFFF00FFF
	and r1, r0
	mov r0, #1
	lsl r0, r0, #0xc
	orr r1, r0
	lsl r0, r0, #0xf
	orr r0, r1
	str r0, [r4, #0x10]
	ldr r0, [r4]
	mov r1, #1
	bl sub_0200DC4C
	ldr r0, [r4]
	mov r1, #0x78
	mov r2, #0
	bl sub_0200DDB8
	ldr r0, [r4]
	mov r1, #1
	bl sub_0200DCE8
	add r0, r4, #0
	bl ov96_0220AFF8
	add r0, r4, #0
	bl ov96_0220B068
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0200DCE8
	pop {r4, pc}
	.balign 4, 0
_0220AF28: .word 0xFFFFF00F
_0220AF2C: .word 0xFFF00FFF
	thumb_func_end ov96_0220AED4

	thumb_func_start ov96_0220AF30
ov96_0220AF30: ; 0x0220AF30
	push {r4, lr}
	add r4, r0, #0
	bne _0220AF3A
	bl GF_AssertFail
_0220AF3A:
	ldr r0, [r4]
	cmp r0, #0
	bne _0220AF44
	bl GF_AssertFail
_0220AF44:
	ldr r0, [r4, #4]
	cmp r0, #0
	bne _0220AF4E
	bl GF_AssertFail
_0220AF4E:
	ldr r0, [r4]
	bl sub_0200D9DC
	ldr r0, [r4, #4]
	bl sub_0200D9DC
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220AF30

	thumb_func_start ov96_0220AF64
ov96_0220AF64: ; 0x0220AF64
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r1, [r5, #0x10]
	lsl r0, r1, #0xc
	lsr r0, r0, #0x18
	cmp r0, #1
	bne _0220AFEE
	lsl r0, r1, #5
	lsr r0, r0, #0x19
	lsl r2, r0, #2
	mov r0, #0xa8
	sub r4, r0, r2
	ldr r0, _0220AFF0 ; =0xFFFFF00F
	and r0, r1
	lsl r1, r1, #0x14
	lsr r1, r1, #0x18
	add r1, #0x14
	lsl r1, r1, #0x18
	lsr r1, r1, #0x14
	add r2, r0, #0
	orr r2, r1
	str r2, [r5, #0x10]
	lsl r2, r2, #0x14
	ldr r0, [r5]
	mov r1, #0
	lsr r2, r2, #0x18
	bl sub_0200DED0
	ldr r2, [r5, #0x10]
	ldr r0, [r5, #4]
	lsl r2, r2, #0x14
	mov r1, #0
	lsr r2, r2, #0x18
	bl sub_0200DED0
	add r1, sp, #0
	ldr r0, [r5, #4]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	add r1, sp, #0
	ldr r0, [r5]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	add r3, sp, #0
	mov r2, #0
	ldrsh r0, [r3, r2]
	cmp r0, r4
	blo _0220AFEE
	strh r4, [r3]
	mov r1, #2
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	ldr r0, [r5]
	bl sub_0200DDB8
	add r0, r5, #0
	bl ov96_0220B068
	ldr r1, [r5, #0x10]
	ldr r0, _0220AFF4 ; =0xFFF00FFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0xc
	orr r0, r1
	str r0, [r5, #0x10]
_0220AFEE:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220AFF0: .word 0xFFFFF00F
_0220AFF4: .word 0xFFF00FFF
	thumb_func_end ov96_0220AF64

	thumb_func_start ov96_0220AFF8
ov96_0220AFF8: ; 0x0220AFF8
	push {r4, lr}
	add r4, r0, #0
	bne _0220B002
	bl GF_AssertFail
_0220B002:
	bl MTRandom
	mov r1, #3
	bl _u32_div_f
	lsl r0, r1, #0x18
	ldr r1, [r4, #0x10]
	lsr r0, r0, #0x18
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x1c
	cmp r0, r1
	blo _0220B020
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
_0220B020:
	ldr r2, [r4, #0x10]
	mov r1, #0xf
	bic r2, r1
	mov r1, #0xf
	and r0, r1
	orr r0, r2
	str r0, [r4, #0x10]
	bl MTRandom
	ldr r1, [r4, #0x10]
	lsl r1, r1, #0x1c
	lsr r2, r1, #0x1a
	ldr r1, _0220B060 ; =0x0221CDC8
	ldrsh r2, [r1, r2]
	mov r1, #0xf
	and r0, r1
	add r0, r2, r0
	strh r0, [r4, #0xa]
	bl MTRandom
	mov r1, #0xc
	bl _u32_div_f
	ldr r0, [r4, #0x10]
	lsl r0, r0, #0x1c
	lsr r2, r0, #0x1a
	ldr r0, _0220B064 ; =0x0221CDCA
	ldrsh r0, [r0, r2]
	add r0, r0, r1
	strh r0, [r4, #0xc]
	pop {r4, pc}
	nop
_0220B060: .word 0x0221CDC8
_0220B064: .word 0x0221CDCA
	thumb_func_end ov96_0220AFF8

	thumb_func_start ov96_0220B068
ov96_0220B068: ; 0x0220B068
	push {r3, r4, r5, lr}
	add r4, r0, #0
	bne _0220B072
	bl GF_AssertFail
_0220B072:
	add r1, sp, #0
	add r0, r4, #0
	add r1, #2
	add r2, sp, #0
	bl ov96_0220B148
	mov r0, #0xa
	add r2, sp, #0
	mov r1, #2
	ldrsh r3, [r2, r1]
	ldrsh r0, [r4, r0]
	add r0, r3, r0
	strh r0, [r2, #2]
	mov r3, #0
	mov r0, #0xc
	ldrsh r5, [r2, r3]
	ldrsh r0, [r4, r0]
	add r0, r5, r0
	strh r0, [r2]
	ldrsh r1, [r2, r1]
	ldrsh r2, [r2, r3]
	ldr r0, [r4, #4]
	bl sub_0200DDB8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220B068

	thumb_func_start ov96_0220B0A4
ov96_0220B0A4: ; 0x0220B0A4
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r6, r0, #0
	add r5, r1, #0
	mov r0, #0
	add r1, sp, #4
	strb r0, [r1]
	strb r0, [r1, #1]
	strb r0, [r1, #2]
	strb r0, [r1, #3]
	strb r0, [r1, #4]
	strb r0, [r1, #5]
	strb r0, [r1, #6]
	strb r0, [r1, #7]
	strb r0, [r1, #8]
	strb r0, [r1, #9]
	strb r0, [r1, #0xa]
	strb r0, [r1, #0xb]
	cmp r5, #3
	blt _0220B0D0
	bl GF_AssertFail
_0220B0D0:
	ldr r0, _0220B140 ; =0x0221DC68
	lsl r1, r5, #2
	ldr r4, [r0, r1]
	ldr r0, _0220B144 ; =0x0221CDA0
	add r1, sp, #0
	ldrb r0, [r0, r5]
	add r1, #2
	add r2, sp, #0
	sub r0, r0, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	ldr r0, [r6, #4]
	bl sub_0200DE44
	mov r0, #0
	cmp r5, #0
	ble _0220B11E
	add r6, sp, #0
	mov r3, #2
	ldrsh r2, [r6, r0]
	ldrsh r3, [r6, r3]
	add r1, sp, #4
_0220B0FC:
	ldrb r6, [r4]
	add r0, r0, #1
	add r6, r2, r6
	strb r6, [r1]
	ldrb r6, [r4, #1]
	add r6, r2, r6
	strb r6, [r1, #1]
	ldrb r6, [r4, #2]
	add r6, r3, r6
	strb r6, [r1, #2]
	ldrb r6, [r4, #3]
	add r4, r4, #4
	add r6, r3, r6
	strb r6, [r1, #3]
	add r1, r1, #4
	cmp r0, r5
	blt _0220B0FC
_0220B11E:
	mov r2, #0xff
	lsl r1, r5, #2
	add r0, sp, #4
	strb r2, [r0, r1]
	bl sub_02025224
	mov r1, #0
	mvn r1, r1
	cmp r0, r1
	beq _0220B138
	add sp, #0x10
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220B138:
	mov r0, #0
	add sp, #0x10
	pop {r4, r5, r6, pc}
	nop
_0220B140: .word 0x0221DC68
_0220B144: .word 0x0221CDA0
	thumb_func_end ov96_0220B0A4

	thumb_func_start ov96_0220B148
ov96_0220B148: ; 0x0220B148
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	cmp r5, #0
	bne _0220B158
	bl GF_AssertFail
_0220B158:
	ldr r0, [r5]
	add r1, r4, #0
	add r2, r6, #0
	bl sub_0200DE44
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220B148

	thumb_func_start ov96_0220B164
ov96_0220B164: ; 0x0220B164
	push {r4, lr}
	add r4, r0, #0
	bne _0220B16E
	bl GF_AssertFail
_0220B16E:
	ldr r0, [r4, #0x10]
	lsl r0, r0, #0xc
	lsr r0, r0, #0x18
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B164

	thumb_func_start ov96_0220B178
ov96_0220B178: ; 0x0220B178
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	mov r4, #0
_0220B184:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r1, #0x1c
	lsl r0, r1, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #1
	mov r2, #0
	str r0, [sp, #4]
	add r0, r6, #0
	add r1, r7, #0
	add r3, r2, #0
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r5]
	bl sub_0200DCE8
	add r4, r4, #1
	add r5, #0x14
	cmp r4, #0x10
	blt _0220B184
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220B178

	thumb_func_start ov96_0220B1B8
ov96_0220B1B8: ; 0x0220B1B8
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r4, #0
_0220B1BE:
	ldr r0, [r5]
	cmp r0, #0
	bne _0220B1C8
	bl GF_AssertFail
_0220B1C8:
	ldr r0, [r5]
	bl sub_0200D9DC
	add r4, r4, #1
	add r5, #0x14
	cmp r4, #0x10
	blt _0220B1BE
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220B1B8

	thumb_func_start ov96_0220B1D8
ov96_0220B1D8: ; 0x0220B1D8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r1, [sp]
	mov r4, #0
	add r5, r0, #0
	add r7, r2, #0
	str r3, [sp, #4]
	add r6, r4, #0
_0220B1E8:
	ldr r0, [r5, #4]
	cmp r0, #0
	bne _0220B2C0
	mov r0, #1
	str r0, [r5, #4]
	strh r7, [r5, #0x10]
	ldr r0, [sp, #4]
	strh r0, [r5, #0x12]
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, r0, #4
	beq _0220B220
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, r0, #4
	lsl r0, r0, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220B238
_0220B220:
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, r0, #4
	lsl r0, r0, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220B238:
	lsr r2, r6, #0x1f
	lsl r1, r6, #0x1f
	add r3, r0, #0
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	bne _0220B24E
	mov r0, #1
	str r0, [sp, #8]
	b _0220B254
_0220B24E:
	mov r0, #0
	mvn r0, r0
	str r0, [sp, #8]
_0220B254:
	add r0, r3, #0
	bl _ftoi
	ldr r1, [sp, #8]
	mul r0, r1
	str r0, [r5, #8]
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, #8
	beq _0220B288
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, #8
	lsl r0, r0, #0xc
	bl _utof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220B2A0
_0220B288:
	bl MTRandom
	mov r1, #7
	and r0, r1
	add r0, #8
	lsl r0, r0, #0xc
	bl _utof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220B2A0:
	bl _ftoi
	str r0, [r5, #0xc]
	ldr r0, [r5]
	ldr r2, [sp, #4]
	add r1, r7, #0
	bl sub_0200DDB8
	ldr r0, [r5]
	bl sub_0200DCAC
	ldr r0, [r5]
	mov r1, #1
	bl sub_0200DCE8
	add r4, r4, #1
_0220B2C0:
	ldr r0, [sp]
	cmp r4, r0
	bge _0220B2CE
	add r6, r6, #1
	add r5, #0x14
	cmp r6, #0x10
	blt _0220B1E8
_0220B2CE:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B1D8

	thumb_func_start ov96_0220B2D4
ov96_0220B2D4: ; 0x0220B2D4
	push {r4, lr}
	add r4, r0, #0
	mov r0, #0x10
	ldrsh r1, [r4, r0]
	ldr r0, [r4, #8]
	asr r0, r0, #0xc
	add r0, r1, r0
	strh r0, [r4, #0x10]
	ldr r0, [r4, #8]
	mov r1, #3
	lsl r0, r0, #2
	bl _s32_div_f
	str r0, [r4, #8]
	mov r2, #0x12
	ldr r0, [r4, #0xc]
	ldrsh r1, [r4, r2]
	asr r0, r0, #0xc
	sub r0, r1, r0
	strh r0, [r4, #0x12]
	ldr r0, [r4, #0xc]
	mov r1, #0x10
	sub r0, r0, #4
	str r0, [r4, #0xc]
	ldrsh r1, [r4, r1]
	ldrsh r2, [r4, r2]
	ldr r0, [r4]
	bl sub_0200DDB8
	mov r0, #0x10
	ldrsh r1, [r4, r0]
	cmp r1, #0
	blt _0220B31C
	add r0, #0xf0
	cmp r1, r0
	ble _0220B320
_0220B31C:
	mov r0, #1
	pop {r4, pc}
_0220B320:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_0220B2D4

	thumb_func_start ov96_0220B324
ov96_0220B324: ; 0x0220B324
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	add r5, r0, #0
	add r7, r4, #0
	add r6, r4, #0
_0220B32E:
	ldr r0, [r5, #4]
	cmp r0, #1
	bne _0220B348
	add r0, r5, #0
	bl ov96_0220B2D4
	cmp r0, #0
	beq _0220B348
	ldr r0, [r5]
	add r1, r7, #0
	bl sub_0200DCE8
	str r6, [r5, #4]
_0220B348:
	add r4, r4, #1
	add r5, #0x14
	cmp r4, #0x10
	blt _0220B32E
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B324

	thumb_func_start ov96_0220B354
ov96_0220B354: ; 0x0220B354
	push {r4, r5, r6, lr}
	mov r4, #0
	add r5, r0, #0
	add r6, r4, #0
_0220B35C:
	ldr r0, [r5, #4]
	cmp r0, #1
	bne _0220B36A
	ldr r0, [r5]
	add r1, r6, #0
	bl sub_0200DC78
_0220B36A:
	add r4, r4, #1
	add r5, #0x14
	cmp r4, #0x10
	blt _0220B35C
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220B354

	thumb_func_start ov96_0220B374
ov96_0220B374: ; 0x0220B374
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r7, r0, #0
	add r0, r3, #0
	add r5, r1, #0
	add r6, r2, #0
	str r3, [sp, #8]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	add r0, r7, #0
	mov r1, #0x48
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0x48
	bl MIi_CpuFill8
	str r7, [r4]
	str r5, [r4, #4]
	ldr r0, [sp, #8]
	str r6, [r4, #8]
	str r0, [r4, #0xc]
	ldr r1, [r4, #0x44]
	mov r0, #0xff
	bic r1, r0
	str r1, [r4, #0x44]
	add r0, r4, #0
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #8]
	add r0, #0x34
	bl ov96_0220D200
	add r0, r4, #0
	ldr r1, [r4, #4]
	ldr r2, [r4, #8]
	add r0, #0x10
	bl ov96_0220C490
	add r1, sp, #0x14
	mov r3, #1
	ldr r0, [r4, #0x24]
	add r1, #2
	add r2, sp, #0x14
	lsl r3, r3, #0x14
	bl sub_0200DE94
	add r3, sp, #0x10
	mov r7, #4
	ldrsh r0, [r3, r7]
	mov r2, #6
	add r1, r6, #0
	sub r0, #0x18
	strh r0, [r3, #4]
	mov r0, #0x11
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldrsh r2, [r3, r2]
	ldrsh r3, [r3, r7]
	add r0, r5, #0
	bl ov96_0220D1A0
	str r0, [r4, #0x2c]
	mov r1, #0
	bl sub_0200DCE8
	add r1, sp, #0x14
	ldr r0, [r4, #0x28]
	add r1, #2
	add r2, sp, #0x14
	lsl r3, r7, #0x12
	bl sub_0200DE94
	add r3, sp, #0x10
	ldrsh r0, [r3, r7]
	mov r2, #6
	add r1, r6, #0
	sub r0, #0x18
	strh r0, [r3, #4]
	mov r0, #0x11
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldrsh r2, [r3, r2]
	ldrsh r3, [r3, r7]
	add r0, r5, #0
	bl ov96_0220D1A0
	str r0, [r4, #0x30]
	mov r1, #0
	bl sub_0200DCE8
	add r1, sp, #0x10
	ldr r0, [r4, #0x10]
	add r1, #2
	add r2, sp, #0x10
	bl sub_0200DE44
	mov r0, #0x11
	str r0, [sp]
	mov r0, #0x1a
	str r0, [sp, #4]
	add r7, sp, #0x10
	mov r2, #2
	mov r3, #0
	ldrsh r2, [r7, r2]
	ldrsh r3, [r7, r3]
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r4, #0x14]
	bl sub_0200DCE8
	mov r0, #0xf
	str r0, [sp]
	mov r0, #0x17
	str r0, [sp, #4]
	mov r2, #2
	mov r3, #0
	ldrsh r2, [r7, r2]
	ldrsh r3, [r7, r3]
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r4, #0x1c]
	bl sub_0200DCE8
	mov r0, #0x1b
	str r0, [sp]
	mov r0, #0x18
	str r0, [sp, #4]
	mov r2, #2
	mov r3, #0
	ldrsh r2, [r7, r2]
	ldrsh r3, [r7, r3]
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r4, #0x20]
	bl sub_0200DCE8
	add r3, r7, #0
	mov r7, #0
	ldrsh r0, [r3, r7]
	mov r2, #2
	add r1, r6, #0
	sub r0, #0x18
	strh r0, [r3]
	mov r0, #0x18
	str r0, [sp]
	mov r0, #0x19
	str r0, [sp, #4]
	ldrsh r2, [r3, r2]
	ldrsh r3, [r3, r7]
	add r0, r5, #0
	bl ov96_0220D13C
	add r1, r7, #0
	str r0, [r4, #0x18]
	bl sub_0200DCE8
	mov r0, #1
	str r0, [sp]
	add r1, r7, #0
	ldr r2, [sp, #0xc]
	add r0, r4, #0
	add r3, r1, #0
	bl ov96_0220C54C
	add r0, r7, #0
	str r0, [sp]
	ldr r2, [sp, #0xc]
	add r0, r4, #0
	mov r1, #5
	mov r3, #2
	bl ov96_0220C54C
	add r0, r7, #0
	str r0, [sp]
	ldr r2, [sp, #0xc]
	add r0, r4, #0
	mov r1, #6
	mov r3, #1
	bl ov96_0220C54C
	add r0, r4, #0
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220B374

	thumb_func_start ov96_0220B500
ov96_0220B500: ; 0x0220B500
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bne _0220B50A
	bl GF_AssertFail
_0220B50A:
	mov r4, #0
	add r5, r6, #0
_0220B50E:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _0220B518
	bl sub_0200D9DC
_0220B518:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #9
	blt _0220B50E
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220B500

	thumb_func_start ov96_0220B528
ov96_0220B528: ; 0x0220B528
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r4, r0, #0
	add r5, r1, #0
	cmp r4, #0
	bne _0220B538
	bl GF_AssertFail
_0220B538:
	ldr r0, [r4, #0x40]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	cmp r0, #3
	bhi _0220B578
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220B54E: ; jump table
	.short _0220B556 - _0220B54E - 2 ; case 0
	.short _0220B560 - _0220B54E - 2 ; case 1
	.short _0220B568 - _0220B54E - 2 ; case 2
	.short _0220B570 - _0220B54E - 2 ; case 3
_0220B556:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_0220B940
	b _0220B57C
_0220B560:
	add r0, r4, #0
	bl ov96_0220B95C
	b _0220B57C
_0220B568:
	add r0, r4, #0
	bl ov96_0220B988
	b _0220B57C
_0220B570:
	add r0, r4, #0
	bl ov96_0220B9A8
	b _0220B57C
_0220B578:
	bl GF_AssertFail
_0220B57C:
	ldr r0, _0220B62C ; =0x0221E5A4
	ldr r1, [r0]
	add r1, r1, #1
	str r1, [r0]
	cmp r5, #0
	bne _0220B58E
	add r0, r4, #0
	bl ov96_0220C680
_0220B58E:
	add r0, r4, #0
	bl ov96_0220BD38
	ldr r2, [r4, #0x40]
	add r0, r4, #0
	lsl r1, r2, #0xb
	lsl r2, r2, #0x1e
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	add r0, #0x34
	lsr r1, r1, #0x15
	lsr r2, r2, #0x18
	bl ov96_0220D2AC
	ldr r1, [r4, #0x40]
	ldr r0, _0220B630 ; =0xFFE003FF
	and r0, r1
	lsl r1, r1, #0xb
	lsr r1, r1, #0x15
	add r1, r1, #1
	lsl r1, r1, #0x15
	lsr r1, r1, #0xb
	orr r0, r1
	str r0, [r4, #0x40]
	ldr r0, [r4, #0x10]
	bl sub_0200DCA0
	cmp r0, #0
	beq _0220B628
	ldr r0, [r4, #0x10]
	ldr r0, [r0]
	bl sub_02024CB8
	add r6, r0, #0
	bl sub_020B75CC
	add r5, r0, #0
	ldr r0, [r6, #0xc]
	cmp r0, #0
	bne _0220B5E2
	bl GF_AssertFail
_0220B5E2:
	add r1, sp, #0
	ldr r0, [r4, #0x10]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	mov r0, #4
	add r3, sp, #0
	mov r1, #2
	ldrsh r2, [r3, r1]
	ldrsh r0, [r5, r0]
	mov r6, #6
	add r0, r2, r0
	strh r0, [r3, #2]
	mov r2, #0
	ldrsh r0, [r3, r2]
	ldrsh r5, [r5, r6]
	add r0, r0, r5
	strh r0, [r3]
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	ldr r0, [r4, #0x14]
	bl sub_0200DDB8
	add r3, sp, #0
	mov r2, #0
	ldrsh r0, [r3, r2]
	mov r1, #2
	sub r0, #0x18
	strh r0, [r3]
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	ldr r0, [r4, #0x18]
	bl sub_0200DDB8
_0220B628:
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_0220B62C: .word 0x0221E5A4
_0220B630: .word 0xFFE003FF
	thumb_func_end ov96_0220B528

	thumb_func_start ov96_0220B634
ov96_0220B634: ; 0x0220B634
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r7, r1, #0
	ldr r0, _0220B6E4 ; =0x0221E5A4
	str r2, [sp, #4]
	mov r1, #0
	str r1, [r0]
	ldr r0, [r5, #0x40]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	cmp r0, #2
	bne _0220B652
	bl GF_AssertFail
_0220B652:
	ldr r0, [r5, #0x40]
	lsl r1, r0, #0x16
	lsr r1, r1, #0x18
	cmp r1, #1
	bne _0220B69C
	lsl r0, r0, #0x1e
	add r4, r5, #0
	lsr r0, r0, #0x1e
	ldr r1, [r5, #0x44]
	add r4, #0x34
	lsl r6, r0, #2
	ldr r0, [r4, r6]
	lsl r1, r1, #8
	lsr r1, r1, #0x18
	lsl r0, r0, #6
	lsl r1, r1, #0x10
	lsr r0, r0, #0x18
	lsr r1, r1, #0x10
	bl ov96_0220D33C
	lsl r0, r0, #0x18
	ldr r2, [r4, r6]
	ldr r1, _0220B6E8 ; =0xFC03FFFF
	lsr r0, r0, #6
	and r1, r2
	orr r0, r1
	str r0, [r4, r6]
	ldr r0, [r4, r6]
	lsl r0, r0, #6
	lsr r0, r0, #0x18
	bne _0220B69C
	add r0, r5, #0
	mov r1, #2
	bl ov96_0220C578
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
_0220B69C:
	ldr r0, [r5, #0x44]
	lsl r0, r0, #0x17
	lsr r0, r0, #0x1f
	bne _0220B6AE
	ldr r2, [sp, #4]
	add r0, r5, #0
	add r1, r7, #0
	bl ov96_0220C714
_0220B6AE:
	ldr r0, [r5, #0x10]
	mov r1, #2
	bl sub_0200DC4C
	ldr r0, [r5, #0xc]
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r2, [r5, #0x40]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x1e
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	ldr r0, [r5, #0xc]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #4
	bl ov96_021E8228
	add r0, r5, #0
	mov r1, #1
	bl ov96_0220C578
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220B6E4: .word 0x0221E5A4
_0220B6E8: .word 0xFC03FFFF
	thumb_func_end ov96_0220B634

	thumb_func_start ov96_0220B6EC
ov96_0220B6EC: ; 0x0220B6EC
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x40]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	cmp r0, #3
	bne _0220B6FE
	bl GF_AssertFail
_0220B6FE:
	add r0, r4, #0
	mov r1, #3
	bl ov96_0220C578
	pop {r4, pc}
	thumb_func_end ov96_0220B6EC

	thumb_func_start ov96_0220B708
ov96_0220B708: ; 0x0220B708
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r6, r1, #0
	cmp r5, #0
	bne _0220B716
	bl GF_AssertFail
_0220B716:
	mov r4, #0
_0220B718:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _0220B724
	add r1, r6, #0
	bl sub_0200DC78
_0220B724:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #9
	blt _0220B718
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B708

	thumb_func_start ov96_0220B730
ov96_0220B730: ; 0x0220B730
	push {r4, lr}
	add r4, r0, #0
	bne _0220B73A
	bl GF_AssertFail
_0220B73A:
	ldr r0, [r4, #0x40]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B730

	thumb_func_start ov96_0220B744
ov96_0220B744: ; 0x0220B744
	ldr r0, [r0, #0x40]
	mov r1, #1
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	beq _0220B754
	cmp r0, #1
	beq _0220B754
	mov r1, #0
_0220B754:
	add r0, r1, #0
	bx lr
	thumb_func_end ov96_0220B744

	thumb_func_start ov96_0220B758
ov96_0220B758: ; 0x0220B758
	push {r4, lr}
	add r4, r0, #0
	bne _0220B762
	bl GF_AssertFail
_0220B762:
	ldr r0, [r4, #0x40]
	add r1, r4, #0
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	add r1, #0x34
	lsl r0, r0, #2
	add r0, r1, r0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B758

	thumb_func_start ov96_0220B774
ov96_0220B774: ; 0x0220B774
	push {r4, lr}
	add r4, r0, #0
	bne _0220B77E
	bl GF_AssertFail
_0220B77E:
	ldr r0, [r4, #0x44]
	lsl r0, r0, #0x17
	lsr r0, r0, #0x1f
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B774

	thumb_func_start ov96_0220B788
ov96_0220B788: ; 0x0220B788
	push {r4, lr}
	add r4, r0, #0
	bne _0220B792
	bl GF_AssertFail
_0220B792:
	ldr r0, [r4, #0x44]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x1f
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B788

	thumb_func_start ov96_0220B79C
ov96_0220B79C: ; 0x0220B79C
	push {r4, lr}
	add r4, r0, #0
	bne _0220B7A6
	bl GF_AssertFail
_0220B7A6:
	ldr r0, [r4, #0x44]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B79C

	thumb_func_start ov96_0220B7B4
ov96_0220B7B4: ; 0x0220B7B4
	push {r4, lr}
	add r4, r0, #0
	bne _0220B7BE
	bl GF_AssertFail
_0220B7BE:
	ldr r0, [r4, #0x40]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B7B4

	thumb_func_start ov96_0220B7CC
ov96_0220B7CC: ; 0x0220B7CC
	push {r4, lr}
	add r4, r0, #0
	bne _0220B7D6
	bl GF_AssertFail
_0220B7D6:
	ldr r1, [r4, #0x40]
	mov r0, #1
	lsl r1, r1, #0x16
	lsr r1, r1, #0x18
	beq _0220B7F0
	cmp r1, #1
	bne _0220B7EE
	ldr r1, [r4, #0x44]
	lsl r1, r1, #8
	lsr r1, r1, #0x18
	cmp r1, #2
	bhs _0220B7F0
_0220B7EE:
	mov r0, #0
_0220B7F0:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B7CC

	thumb_func_start ov96_0220B7F4
ov96_0220B7F4: ; 0x0220B7F4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x68
	add r7, r3, #0
	add r4, r0, #0
	add r0, r7, #0
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x14]
	add r0, sp, #0x2c
	mov r1, #0xaa
	mov r2, #5
	bl ReadWholeNarcMemberByIdPair
	add r0, r4, #0
	mov r1, #0xc8
	bl AllocFromHeap
	str r0, [sp, #0x1c]
	mov r1, #0
	mov r2, #0xc8
	bl MIi_CpuFill8
	ldr r0, [sp, #0x1c]
	ldr r1, [sp, #0xc]
	str r4, [r0]
	str r1, [r0, #4]
	ldr r1, [sp, #0x10]
	str r1, [r0, #8]
	str r7, [r0, #0xc]
	ldr r0, [sp, #0x80]
	ldr r1, [sp, #0x1c]
	str r0, [r1, #0x10]
	ldr r1, [sp, #0x14]
	bl ov96_0220C844
	ldr r0, [sp, #0x1c]
	mov r6, #0
	str r0, [sp, #0x18]
	add r0, #0x14
	str r0, [sp, #0x18]
_0220B84C:
	ldr r0, [sp, #0x14]
	cmp r6, r0
	beq _0220B892
	mov r4, #0
	add r5, sp, #0x20
_0220B856:
	add r0, r7, #0
	add r1, r6, #0
	add r2, r4, #0
	bl ov96_021E60D8
	ldrb r0, [r0, #3]
	add r4, r4, #1
	lsl r1, r0, #2
	add r0, sp, #0x2c
	add r0, r0, r1
	ldr r0, [r0, #0x14]
	cmp r4, #3
	stmia r5!, {r0}
	blt _0220B856
	lsl r0, r6, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	str r7, [sp, #4]
	add r0, sp, #0x20
	str r0, [sp, #8]
	ldr r3, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0x10]
	ldr r3, [r3, #0x10]
	bl ov96_0220BE28
	ldr r0, [sp, #0x18]
	add r0, #0x3c
	str r0, [sp, #0x18]
_0220B892:
	add r6, r6, #1
	cmp r6, #4
	blt _0220B84C
	ldr r0, [sp, #0x1c]
	add sp, #0x68
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B7F4

	thumb_func_start ov96_0220B8A0
ov96_0220B8A0: ; 0x0220B8A0
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	cmp r0, #0
	bne _0220B8AC
	bl GF_AssertFail
_0220B8AC:
	ldr r6, [sp]
	mov r7, #0
_0220B8B0:
	mov r4, #0
	add r5, r6, #0
_0220B8B4:
	ldr r0, [r5, #0x30]
	cmp r0, #0
	beq _0220B8BE
	bl sub_0200D9DC
_0220B8BE:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #6
	blt _0220B8B4
	add r7, r7, #1
	add r6, #0x3c
	cmp r7, #3
	blt _0220B8B0
	ldr r0, [sp]
	bl FreeToHeap
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B8A0

	thumb_func_start ov96_0220B8D8
ov96_0220B8D8: ; 0x0220B8D8
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r4, #0
	add r5, #0x14
_0220B8E0:
	add r0, r5, #0
	bl ov96_0220C40C
	add r4, r4, #1
	add r5, #0x3c
	cmp r4, #3
	blt _0220B8E0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220B8D8

	thumb_func_start ov96_0220B8F0
ov96_0220B8F0: ; 0x0220B8F0
	push {r3, r4, r5, r6, r7, lr}
	mov r1, #0
	add r6, r0, #0
	str r1, [sp]
	add r6, #0x14
	add r7, r1, #0
_0220B8FC:
	ldr r0, [r6, #0x38]
	mov r1, #0xc
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #4]
	bl ov96_021EAC5C
	ldr r0, [r6, #0x34]
	cmp r0, #0
	beq _0220B91C
	bl sub_0200E390
	mov r0, #0
	str r0, [r6, #0x34]
_0220B91C:
	mov r4, #0
	add r5, r6, #0
_0220B920:
	ldr r0, [r5, #0x1c]
	add r1, r7, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #6
	blt _0220B920
	ldr r0, [sp]
	add r6, #0x3c
	add r0, r0, #1
	str r0, [sp]
	cmp r0, #3
	blt _0220B8FC
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B8F0

	thumb_func_start ov96_0220B940
ov96_0220B940: ; 0x0220B940
	push {r4, lr}
	add r4, r0, #0
	cmp r1, #0
	bne _0220B95A
	ldr r0, [r4, #0x10]
	bl sub_0200DCA0
	cmp r0, #0
	bne _0220B95A
	ldr r0, [r4, #0x10]
	mov r1, #1
	bl sub_0200DC4C
_0220B95A:
	pop {r4, pc}
	thumb_func_end ov96_0220B940

	thumb_func_start ov96_0220B95C
ov96_0220B95C: ; 0x0220B95C
	push {r3, lr}
	ldr r2, [r0, #0x44]
	ldr r1, _0220B984 ; =0xFF00FFFF
	and r1, r2
	lsl r2, r2, #8
	lsr r2, r2, #0x18
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #8
	orr r1, r2
	str r1, [r0, #0x44]
	lsl r1, r1, #8
	lsr r1, r1, #0x18
	cmp r1, #0xa
	blo _0220B980
	mov r1, #0
	bl ov96_0220C578
_0220B980:
	pop {r3, pc}
	nop
_0220B984: .word 0xFF00FFFF
	thumb_func_end ov96_0220B95C

	thumb_func_start ov96_0220B988
ov96_0220B988: ; 0x0220B988
	push {r3, lr}
	ldr r1, [r0, #0x40]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #2
	add r1, r0, r1
	ldr r1, [r1, #0x34]
	lsl r1, r1, #6
	lsr r1, r1, #0x18
	cmp r1, #8
	blo _0220B9A4
	mov r1, #0
	bl ov96_0220C578
_0220B9A4:
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_0220B988

	thumb_func_start ov96_0220B9A8
ov96_0220B9A8: ; 0x0220B9A8
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r4, r0, #0
	ldr r1, [r4, #0x44]
	lsl r2, r1, #0x10
	lsr r2, r2, #0x1a
	cmp r2, #6
	bls _0220B9BA
	b _0220BD1A
_0220B9BA:
	add r2, r2, r2
	add r2, pc
	ldrh r2, [r2, #6]
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	add pc, r2
_0220B9C6: ; jump table
	.short _0220B9D4 - _0220B9C6 - 2 ; case 0
	.short _0220BA02 - _0220B9C6 - 2 ; case 1
	.short _0220BA68 - _0220B9C6 - 2 ; case 2
	.short _0220BB4E - _0220B9C6 - 2 ; case 3
	.short _0220BC2E - _0220B9C6 - 2 ; case 4
	.short _0220BCB0 - _0220B9C6 - 2 ; case 5
	.short _0220BD10 - _0220B9C6 - 2 ; case 6
_0220B9D4:
	ldr r0, [r4, #0x1c]
	bl sub_0200DCAC
	ldr r0, [r4, #0x1c]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, _0220BD24 ; =0x000008B4
	bl PlaySE
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r2
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BA02:
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	lsr r0, r1, #0x18
	add r0, r0, #1
	lsl r0, r0, #0x18
	orr r0, r2
	str r0, [r4, #0x44]
	lsr r0, r0, #0x18
	cmp r0, #2
	bhs _0220BA1A
	b _0220BD1E
_0220BA1A:
	ldr r0, [r4, #0x20]
	bl sub_0200DCAC
	ldr r0, [r4, #0x20]
	mov r1, #0
	bl sub_0200DC78
	ldr r0, [r4, #0x20]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x10]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x14]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x18]
	mov r1, #0
	bl sub_0200DCE8
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r1
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BA68:
	add r1, sp, #0xc
	ldr r0, [r4, #0x20]
	add r1, #2
	add r2, sp, #0xc
	bl sub_0200DE44
	mov r3, #8
	add r1, sp, #4
	add r0, r3, #0
	ldrsh r5, [r1, r3]
	sub r0, #0x48
	sub r2, r0, r5
	asr r0, r2, #1
	lsr r0, r0, #0x1e
	add r0, r2, r0
	lsl r0, r0, #0xe
	asr r2, r0, #0x10
	add r0, r3, #0
	sub r0, #0x3c
	cmp r5, r0
	ble _0220BA96
	cmp r2, #0
	bne _0220BAF0
_0220BA96:
	ldr r0, [r4, #0x40]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	sub r0, r0, #1
	lsl r0, r0, #0x18
	asr r5, r0, #0x18
	bpl _0220BAA6
	mov r5, #2
_0220BAA6:
	ldr r0, [r4, #0xc]
	bl ov96_021E5F24
	add r2, r0, #0
	mov r0, #0
	lsl r2, r2, #0x18
	lsl r3, r5, #0x18
	str r0, [sp]
	add r0, r4, #0
	mov r1, #6
	lsr r2, r2, #0x18
	lsr r3, r3, #0x18
	bl ov96_0220C54C
	mov r2, #0x28
	add r0, sp, #4
	add r3, r2, #0
	strh r2, [r0, #0xa]
	sub r3, #0x50
	strh r3, [r0, #8]
	add r0, r4, #0
	mov r1, #6
	bl ov96_0220C90C
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r2
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BAF0:
	mov r6, #0xa
	add r2, r5, r2
	lsl r2, r2, #0x10
	ldrsh r1, [r1, r6]
	ldr r0, [r4, #0x20]
	asr r2, r2, #0x10
	lsl r3, r3, #0x11
	bl sub_0200DDF4
	add r1, sp, #0xc
	mov r3, #1
	ldr r0, [r4, #0x28]
	add r1, #2
	add r2, sp, #0xc
	lsl r3, r3, #0x14
	bl sub_0200DE94
	add r1, sp, #4
	mov r0, #8
	ldrsh r1, [r1, r0]
	mov r0, #0x11
	lsl r0, r0, #4
	sub r2, r0, r1
	bpl _0220BB22
	neg r2, r2
_0220BB22:
	add r1, sp, #4
	mov r0, #8
	ldrsh r3, [r1, r0]
	asr r2, r2, #2
	add r2, r3, r2
	strh r2, [r1, #8]
	ldrsh r0, [r1, r0]
	cmp r0, #0xd8
	ble _0220BB36
	mov r0, #0xd8
_0220BB36:
	add r5, sp, #4
	strh r0, [r5, #8]
	mov r2, #0xa
	mov r3, #8
	ldrsh r2, [r5, r2]
	ldrsh r3, [r5, r3]
	add r0, r4, #0
	mov r1, #6
	bl ov96_0220C90C
	add sp, #0x10
	pop {r4, r5, r6, pc}
_0220BB4E:
	add r1, sp, #8
	mov r3, #1
	ldr r0, [r4, #0x24]
	add r1, #2
	add r2, sp, #8
	lsl r3, r3, #0x14
	bl sub_0200DE94
	add r1, sp, #4
	mov r0, #4
	ldrsh r1, [r1, r0]
	mov r0, #0x88
	sub r0, r0, r1
	bpl _0220BB6C
	neg r0, r0
_0220BB6C:
	lsl r0, r0, #0xf
	asr r5, r0, #0x10
	cmp r1, #0x88
	bge _0220BBB6
	cmp r5, #0
	bne _0220BB7A
	mov r5, #1
_0220BB7A:
	add r6, sp, #4
	mov r3, #4
	ldrsh r0, [r6, r3]
	mov r2, #6
	mov r1, #5
	add r0, r0, r5
	strh r0, [r6, #4]
	ldrsh r2, [r6, r2]
	ldrsh r3, [r6, r3]
	add r0, r4, #0
	bl ov96_0220C90C
	add r1, sp, #8
	mov r3, #1
	ldr r0, [r4, #0x28]
	add r1, #2
	add r2, sp, #8
	lsl r3, r3, #0x14
	bl sub_0200DE94
	mov r3, #4
	ldrsh r0, [r6, r3]
	mov r1, #6
	add r0, r0, r5
	strh r0, [r6, #4]
	ldrsh r2, [r6, r1]
	ldrsh r3, [r6, r3]
	add r0, r4, #0
	bl ov96_0220C90C
_0220BBB6:
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	lsr r0, r1, #0x18
	add r0, r0, #1
	lsl r0, r0, #0x18
	orr r0, r2
	str r0, [r4, #0x44]
	lsr r0, r0, #0x18
	cmp r0, #4
	bhs _0220BBD0
	b _0220BD1E
_0220BBD0:
	ldr r1, [r4, #0x24]
	ldr r0, [r4, #0x28]
	mov r2, #0x28
	str r0, [r4, #0x24]
	str r1, [r4, #0x28]
	ldr r1, [r4, #0x2c]
	ldr r0, [r4, #0x30]
	mov r3, #0x30
	str r0, [r4, #0x2c]
	str r1, [r4, #0x30]
	add r0, r4, #0
	mov r1, #5
	bl ov96_0220C90C
	add r0, r4, #0
	mov r1, #6
	mov r2, #0x28
	mov r3, #0x88
	bl ov96_0220C90C
	mov r1, #0x88
	add r2, r1, #0
	mov r3, #1
	ldr r0, [r4, #0x20]
	sub r2, #0x90
	lsl r3, r3, #0x14
	bl sub_0200DDF4
	ldr r0, _0220BD30 ; =0x000008B5
	bl PlaySE
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r1
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BC2E:
	add r1, sp, #4
	ldr r0, [r4, #0x20]
	add r1, #2
	add r2, sp, #4
	bl sub_0200DE44
	add r1, sp, #4
	mov r0, #0
	ldrsh r1, [r1, r0]
	sub r0, #0x18
	sub r0, r0, r1
	bpl _0220BC48
	neg r0, r0
_0220BC48:
	lsl r0, r0, #0x10
	asr r2, r0, #0x10
	beq _0220BC56
	lsr r0, r2, #0x1f
	add r0, r2, r0
	lsl r0, r0, #0xf
	asr r2, r0, #0x10
_0220BC56:
	add r1, sp, #4
	mov r0, #0
	ldrsh r3, [r1, r0]
	add r2, r2, #2
	add r2, r3, r2
	strh r2, [r1]
	ldrsh r2, [r1, r0]
	cmp r2, #0x70
	blt _0220BCA0
	ldr r0, _0220BD34 ; =0x000008B6
	bl PlaySE
	ldr r0, [r4, #0x20]
	mov r1, #0x88
	mov r2, #0x70
	bl sub_0200DDB8
	ldr r0, [r4, #0x20]
	mov r1, #1
	bl sub_0200DC78
	ldr r0, [r4, #0x1c]
	bl sub_0200DCAC
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r2
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BCA0:
	mov r3, #2
	ldrsh r1, [r1, r3]
	ldr r0, [r4, #0x20]
	lsl r3, r3, #0x13
	bl sub_0200DDF4
	add sp, #0x10
	pop {r4, r5, r6, pc}
_0220BCB0:
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	lsr r0, r1, #0x18
	add r0, r0, #1
	lsl r0, r0, #0x18
	orr r0, r2
	str r0, [r4, #0x44]
	lsr r0, r0, #0x18
	cmp r0, #2
	blo _0220BD1E
	ldr r0, [r4, #0x20]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0xc]
	bl ov96_021E5F24
	add r2, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r3, [r4, #0x40]
	lsl r2, r2, #0x18
	lsl r3, r3, #0x1e
	lsr r3, r3, #0x1e
	lsl r3, r3, #0x18
	add r0, r4, #0
	mov r1, #0
	lsr r2, r2, #0x18
	lsr r3, r3, #0x18
	bl ov96_0220C54C
	ldr r1, [r4, #0x44]
	ldr r0, _0220BD2C ; =0x00FFFFFF
	add r2, r1, #0
	and r2, r0
	ldr r0, _0220BD28 ; =0xFFFF03FF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #0x10
	lsr r0, r0, #0x1a
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x10
	orr r0, r1
	add sp, #0x10
	str r0, [r4, #0x44]
	pop {r4, r5, r6, pc}
_0220BD10:
	mov r1, #0
	bl ov96_0220C578
	add sp, #0x10
	pop {r4, r5, r6, pc}
_0220BD1A:
	bl GF_AssertFail
_0220BD1E:
	add sp, #0x10
	pop {r4, r5, r6, pc}
	nop
_0220BD24: .word 0x000008B4
_0220BD28: .word 0xFFFF03FF
_0220BD2C: .word 0x00FFFFFF
_0220BD30: .word 0x000008B5
_0220BD34: .word 0x000008B6
	thumb_func_end ov96_0220B9A8

	thumb_func_start ov96_0220BD38
ov96_0220BD38: ; 0x0220BD38
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r0, #0
	ldr r0, [r6, #0x40]
	lsl r0, r0, #0x16
	lsr r0, r0, #0x18
	cmp r0, #3
	beq _0220BE20
	add r0, r6, #0
	str r0, [sp]
	add r0, #0x34
	add r7, r6, #0
	mov r5, #0
	str r0, [sp]
	add r7, #0x44
_0220BD56:
	ldr r0, [r6, #0x40]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	cmp r5, r0
	bne _0220BD74
	mov r0, #0x1a
	str r0, [sp, #8]
	mov r0, #0x18
	str r0, [sp, #4]
	ldr r1, [r7]
	ldr r0, _0220BE24 ; =0xFFFFFDFF
	ldr r4, [r6, #0x18]
	and r0, r1
	str r0, [r7]
	b _0220BD90
_0220BD74:
	add r0, r0, #1
	cmp r0, #3
	blt _0220BD7C
	mov r0, #0
_0220BD7C:
	cmp r0, r5
	bne _0220BD84
	mov r0, #1
	b _0220BD86
_0220BD84:
	mov r0, #0
_0220BD86:
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r4, [r0, #0x2c]
	mov r0, #0x11
	str r0, [sp, #4]
_0220BD90:
	ldr r0, [sp]
	ldr r2, [r0]
	lsl r0, r2, #6
	lsr r1, r0, #0x18
	bne _0220BDCA
	ldr r1, [sp, #8]
	add r0, r4, #0
	bl sub_0200DC58
	add r0, r4, #0
	bl sub_0200DCFC
	cmp r0, #0
	bne _0220BDB4
	add r0, r4, #0
	mov r1, #1
	bl sub_0200DCE8
_0220BDB4:
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _0220BE14
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
	b _0220BE14
_0220BDCA:
	lsl r2, r2, #0xe
	lsr r2, r2, #0x17
	add r0, r4, #0
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	bl ov96_0220C768
	cmp r0, #0
	beq _0220BE02
	ldr r1, [sp, #4]
	add r0, r4, #0
	bl sub_0200DC58
	add r0, r4, #0
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r6, #0x40]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	cmp r5, r0
	bne _0220BE14
	mov r0, #2
	ldr r1, [r7]
	lsl r0, r0, #8
	orr r0, r1
	str r0, [r7]
	b _0220BE14
_0220BE02:
	add r0, r4, #0
	mov r1, #0
	bl sub_0200DCE8
	mov r1, #1
	add r0, r4, #0
	lsl r1, r1, #0xc
	bl sub_0200DC8C
_0220BE14:
	ldr r0, [sp]
	add r5, r5, #1
	add r0, r0, #4
	str r0, [sp]
	cmp r5, #3
	blt _0220BD56
_0220BE20:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220BE24: .word 0xFFFFFDFF
	thumb_func_end ov96_0220BD38

	thumb_func_start ov96_0220BE28
ov96_0220BE28: ; 0x0220BE28
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	mov r1, #0
	mov r2, #0x3c
	add r5, r0, #0
	str r3, [sp, #0x10]
	bl MIi_CpuFill8
	add r0, sp, #0x20
	ldrb r0, [r0, #0x10]
	ldr r1, [r5, #0x38]
	str r0, [sp, #0x14]
	ldr r0, _0220BFA4 ; =0xF9FFFFFF
	and r1, r0
	ldr r0, [sp, #0x14]
	lsl r3, r0, #0x1e
	lsr r0, r3, #5
	orr r0, r1
	str r0, [r5, #0x38]
	ldr r0, [sp, #0x34]
	ldr r1, _0220BFA8 ; =0xE7FFFFFF
	str r0, [r5]
	ldr r2, [r5, #0x38]
	and r2, r1
	lsr r1, r3, #3
	orr r1, r2
	str r1, [r5, #0x38]
	bl ov96_021E5F24
	ldr r2, [r5, #0x38]
	lsl r1, r2, #5
	lsr r1, r1, #0x1e
	cmp r1, r0
	bls _0220BE84
	ldr r0, _0220BFA8 ; =0xE7FFFFFF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #3
	lsr r0, r0, #0x1e
	sub r0, r0, #1
	lsl r0, r0, #0x1e
	lsr r0, r0, #3
	orr r0, r1
	str r0, [r5, #0x38]
_0220BE84:
	ldr r6, [sp, #0x38]
	mov r7, #0
	add r4, r5, #0
_0220BE8A:
	ldr r1, [r5, #0x38]
	ldr r0, [sp, #0x10]
	lsl r1, r1, #3
	lsr r2, r1, #0x1e
	lsl r1, r2, #1
	add r1, r2, r1
	add r1, r7, r1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	str r0, [r4, #4]
	ldr r0, [r6]
	add r7, r7, #1
	str r0, [r4, #0x10]
	add r4, r4, #4
	add r6, r6, #4
	cmp r7, #3
	blt _0220BE8A
	ldr r0, [sp, #0x34]
	bl ov96_021E5F54
	ldr r1, [sp, #0x14]
	mov r2, #0x28
	add r0, #0x50
	mul r2, r1
	add r0, r0, r2
	bl ov96_021E8A20
	ldr r2, [r0]
	ldr r1, _0220BFAC ; =0xFFFF00FF
	mov r3, #0x38
	and r2, r1
	ldr r1, [sp, #0x38]
	ldr r1, [r1]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x10
	orr r1, r2
	str r1, [r0]
	ldr r0, [r5, #0x38]
	ldr r1, [sp, #0xc]
	lsl r0, r0, #3
	lsr r0, r0, #0x1e
	lsl r4, r0, #6
	mov r0, #0xc
	add r4, #0x48
	str r0, [sp]
	mov r0, #0x1d
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	asr r2, r2, #0x10
	bl ov96_0220D13C
	str r0, [r5, #0x1c]
	mov r0, #5
	str r0, [sp]
	mov r0, #0x1c
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x38
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r5, #0x20]
	bl sub_0200DCE8
	mov r0, #0x10
	str r0, [sp]
	mov r0, #0x1f
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x28
	bl ov96_0220D13C
	mov r1, #1
	str r0, [r5, #0x28]
	bl sub_0200DF98
	ldr r1, _0220BFB0 ; =0x3F333333
	ldr r0, [r5, #0x28]
	add r2, r1, #0
	bl sub_0200E024
	ldr r0, [r5, #0x28]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #0x18
	str r0, [sp]
	mov r0, #0x1f
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x28
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r5, #0x24]
	bl sub_0200DCE8
	mov r0, #0xe
	str r0, [sp]
	mov r0, #0x1e
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x28
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r5, #0x2c]
	bl sub_0200DCE8
	mov r0, #0x1b
	str r0, [sp]
	mov r0, #0x1e
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x28
	bl ov96_0220D13C
	mov r1, #0
	str r0, [r5, #0x30]
	bl sub_0200DCE8
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220BFA4: .word 0xF9FFFFFF
_0220BFA8: .word 0xE7FFFFFF
_0220BFAC: .word 0xFFFF00FF
_0220BFB0: .word 0x3F333333
	thumb_func_end ov96_0220BE28

	thumb_func_start ov96_0220BFB4
ov96_0220BFB4: ; 0x0220BFB4
	push {r3, r4, r5, r6, r7, lr}
	ldr r2, [r0, #0x38]
	add r7, r1, #0
	lsl r1, r2, #3
	lsr r1, r1, #0x1e
	lsl r1, r1, #6
	add r1, #0x48
	lsl r1, r1, #0x10
	asr r6, r1, #0x10
	lsl r1, r2, #7
	lsr r1, r1, #0x1e
	lsl r1, r1, #2
	ldr r5, [r0, #0x24]
	add r0, r0, r1
	ldr r0, [r0, #4]
	mov r4, #0x28
	bl ov96_021EAA20
	bl ov96_021E8BB0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _0220BFE8
	sub r4, #0x10
	lsl r0, r4, #0x10
	asr r4, r0, #0x10
_0220BFE8:
	add r0, r5, #0
	add r1, r6, #0
	add r2, r4, #0
	bl sub_0200DDB8
	add r0, r5, #0
	add r1, r7, #0
	bl sub_0200DC58
	add r0, r5, #0
	mov r1, #1
	bl sub_0200DCE8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220BFB4

	thumb_func_start ov96_0220C004
ov96_0220C004: ; 0x0220C004
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	ldr r0, [r4]
	lsl r1, r0, #5
	lsr r1, r1, #0x1f
	beq _0220C024
	ldr r0, [r5, #0x28]
	mov r1, #0x10
	bl sub_0200DC58
	ldr r0, [r5, #0x28]
	mov r1, #1
	bl sub_0200DCE8
	b _0220C040
_0220C024:
	lsl r0, r0, #8
	lsr r1, r0, #0x18
	cmp r1, #0x32
	ldr r0, [r5, #0x28]
	blo _0220C03A
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	mov r2, #0
	bl ov96_0220C8B8
	b _0220C040
_0220C03A:
	mov r1, #0
	bl sub_0200DCE8
_0220C040:
	ldr r0, [r4]
	lsl r0, r0, #0x10
	lsr r1, r0, #0x18
	bne _0220C06C
	add r0, r5, #0
	mov r1, #0x1a
	bl ov96_0220BFB4
	ldr r0, [r5, #0x28]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0x38]
	mov r1, #0xc
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #4]
	bl ov96_021EAC5C
	pop {r3, r4, r5, pc}
_0220C06C:
	ldr r2, [r5, #0x38]
	ldr r0, [r5, #0x24]
	lsl r2, r2, #7
	lsr r2, r2, #0x1e
	lsl r2, r2, #2
	add r2, r5, r2
	ldr r2, [r2, #0x10]
	lsl r1, r1, #0xc
	lsl r2, r2, #0xc
	bl ov96_0220C768
	cmp r0, #0
	beq _0220C0A2
	add r0, r5, #0
	mov r1, #0x18
	bl ov96_0220BFB4
	ldr r0, [r5, #0x38]
	mov r1, #0
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #4]
	bl ov96_021EAC5C
	pop {r3, r4, r5, pc}
_0220C0A2:
	ldr r0, [r4]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _0220C0BE
	ldr r0, [r5, #0x38]
	mov r1, #8
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #4]
	bl ov96_021EAC5C
	pop {r3, r4, r5, pc}
_0220C0BE:
	ldr r0, [r5, #0x24]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0x38]
	mov r1, #4
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #4]
	bl ov96_021EAC5C
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C004

	thumb_func_start ov96_0220C0DC
ov96_0220C0DC: ; 0x0220C0DC
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r6, r1, #0
	ldr r0, [r6]
	ldr r1, [r5, #0x38]
	lsl r0, r0, #0x18
	lsl r1, r1, #9
	lsr r0, r0, #0x18
	lsr r1, r1, #0x18
	cmp r1, r0
	beq _0220C154
	mov r1, #0xa
	bl _u32_div_f
	lsr r4, r1, #1
	mov r0, #0xc
	sub r2, r0, r4
	cmp r1, #0
	ldr r0, [r5, #0x1c]
	beq _0220C10C
	add r1, r2, #0
	bl sub_0200DC58
	b _0220C112
_0220C10C:
	mov r1, #0xd
	bl sub_0200DC58
_0220C112:
	ldr r1, [r5, #0x38]
	lsl r2, r4, #1
	lsl r1, r1, #3
	lsr r1, r1, #0x1e
	lsl r1, r1, #6
	add r2, r4, r2
	add r1, #0x48
	add r2, #0x30
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	ldr r0, [r5, #0x20]
	asr r1, r1, #0x10
	asr r2, r2, #0x10
	bl sub_0200DDB8
	ldr r0, [r5, #0x20]
	mov r1, #5
	bl sub_0200DC4C
	ldr r0, [r5, #0x20]
	mov r1, #1
	bl sub_0200DCE8
	ldr r1, [r5, #0x38]
	ldr r0, _0220C158 ; =0xFF807FFF
	and r1, r0
	ldr r0, [r6]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	lsl r0, r0, #0x18
	lsr r0, r0, #9
	orr r0, r1
	str r0, [r5, #0x38]
_0220C154:
	pop {r4, r5, r6, pc}
	nop
_0220C158: .word 0xFF807FFF
	thumb_func_end ov96_0220C0DC

	thumb_func_start ov96_0220C15C
ov96_0220C15C: ; 0x0220C15C
	push {r3, r4, r5, lr}
	sub sp, #8
	add r4, r1, #0
	ldr r1, [r4, #0x38]
	lsl r2, r1, #0x1a
	lsr r2, r2, #0x1c
	cmp r2, #6
	bls _0220C16E
	b _0220C3CA
_0220C16E:
	add r2, r2, r2
	add r2, pc
	ldrh r2, [r2, #6]
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	add pc, r2
_0220C17A: ; jump table
	.short _0220C188 - _0220C17A - 2 ; case 0
	.short _0220C1B2 - _0220C17A - 2 ; case 1
	.short _0220C216 - _0220C17A - 2 ; case 2
	.short _0220C274 - _0220C17A - 2 ; case 3
	.short _0220C2B2 - _0220C17A - 2 ; case 4
	.short _0220C33E - _0220C17A - 2 ; case 5
	.short _0220C3B6 - _0220C17A - 2 ; case 6
_0220C188:
	ldr r5, [r4, #0x2c]
	add r0, r5, #0
	bl sub_0200DCAC
	add r0, r5, #0
	mov r1, #1
	bl sub_0200DCE8
	ldr r2, [r4, #0x38]
	mov r1, #0x3c
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x1a
	lsr r1, r1, #0x1c
	add r1, r1, #1
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x1a
	orr r0, r1
	add sp, #8
	str r0, [r4, #0x38]
	pop {r3, r4, r5, pc}
_0220C1B2:
	ldr r0, _0220C3D4 ; =0xFFFFC03F
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x18
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x12
	orr r1, r0
	lsl r0, r1, #0x12
	lsr r0, r0, #0x18
	str r1, [r4, #0x38]
	cmp r0, #2
	blo _0220C294
	lsl r0, r1, #7
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r5, [r4, #0x30]
	ldr r0, [r0, #4]
	mov r1, #0
	bl ov96_021EAB38
	add r0, r5, #0
	mov r1, #0x1b
	bl sub_0200DC4C
	add r0, r5, #0
	mov r1, #0
	bl sub_0200DC78
	add r0, r5, #0
	mov r1, #1
	bl sub_0200DCE8
	ldr r1, [r4, #0x38]
	ldr r0, _0220C3D4 ; =0xFFFFC03F
	add r2, r1, #0
	and r2, r0
	mov r0, #0x3c
	add r1, r2, #0
	bic r1, r0
	lsl r0, r2, #0x1a
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1a
	orr r0, r1
	add sp, #8
	str r0, [r4, #0x38]
	pop {r3, r4, r5, pc}
_0220C216:
	add r1, sp, #4
	ldr r0, [r4, #0x30]
	add r1, #2
	add r2, sp, #4
	bl sub_0200DE44
	mov r3, #4
	add r1, sp, #0
	add r0, r3, #0
	ldrsh r5, [r1, r3]
	sub r0, #0x44
	sub r2, r0, r5
	asr r0, r2, #1
	lsr r0, r0, #0x1e
	add r0, r2, r0
	lsl r0, r0, #0xe
	asr r2, r0, #0x10
	add r0, r3, #0
	sub r0, #0x44
	cmp r5, r0
	ble _0220C244
	cmp r2, #0
	bne _0220C25E
_0220C244:
	ldr r2, [r4, #0x38]
	mov r1, #0x3c
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x1a
	lsr r1, r1, #0x1c
	add r1, r1, #1
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x1a
	orr r0, r1
	add sp, #8
	str r0, [r4, #0x38]
	pop {r3, r4, r5, pc}
_0220C25E:
	ldr r0, [r4, #0x30]
	mov r4, #6
	add r2, r5, r2
	lsl r2, r2, #0x10
	ldrsh r1, [r1, r4]
	asr r2, r2, #0x10
	lsl r3, r3, #0x12
	bl sub_0200DDF4
	add sp, #8
	pop {r3, r4, r5, pc}
_0220C274:
	add r0, r1, #0
	lsl r1, r1, #0x12
	lsr r1, r1, #0x18
	ldr r3, _0220C3D4 ; =0xFFFFC03F
	add r1, r1, #1
	lsl r1, r1, #0x18
	and r0, r3
	lsr r1, r1, #0x12
	orr r0, r1
	str r0, [r4, #0x38]
	lsl r0, r0, #0x12
	add r2, r4, #0
	lsr r0, r0, #0x18
	add r2, #0x38
	cmp r0, #4
	bhs _0220C296
_0220C294:
	b _0220C3CE
_0220C296:
	ldr r0, [r2]
	add sp, #8
	and r3, r0
	mov r0, #0x3c
	add r1, r3, #0
	bic r1, r0
	lsl r0, r3, #0x1a
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1a
	orr r0, r1
	str r0, [r2]
	pop {r3, r4, r5, pc}
_0220C2B2:
	add r1, sp, #0
	ldr r0, [r4, #0x30]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	add r1, sp, #0
	mov r0, #0
	ldrsh r1, [r1, r0]
	sub r0, #0x18
	sub r0, r0, r1
	bpl _0220C2CC
	neg r0, r0
_0220C2CC:
	lsl r0, r0, #0x10
	asr r1, r0, #0x10
	beq _0220C2DA
	lsr r0, r1, #0x1f
	add r0, r1, r0
	lsl r0, r0, #0xf
	asr r1, r0, #0x10
_0220C2DA:
	add r5, sp, #0
	mov r0, #0
	ldrsh r2, [r5, r0]
	add r1, r1, #2
	add r1, r2, r1
	strh r1, [r5]
	ldrsh r2, [r5, r0]
	cmp r2, #0x30
	blt _0220C32E
	ldr r0, [r4, #0x38]
	mov r2, #0x30
	lsl r0, r0, #3
	lsr r0, r0, #0x1e
	lsl r0, r0, #6
	add r0, #0x48
	strh r0, [r5, #2]
	strh r2, [r5]
	mov r1, #2
	ldrsh r1, [r5, r1]
	ldr r0, [r4, #0x30]
	bl sub_0200DDB8
	ldr r0, [r4, #0x30]
	mov r1, #1
	bl sub_0200DC78
	ldr r0, [r4, #0x2c]
	bl sub_0200DCAC
	ldr r2, [r4, #0x38]
	mov r1, #0x3c
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x1a
	lsr r1, r1, #0x1c
	add r1, r1, #1
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x1a
	orr r0, r1
	add sp, #8
	str r0, [r4, #0x38]
	pop {r3, r4, r5, pc}
_0220C32E:
	mov r3, #2
	ldrsh r1, [r5, r3]
	ldr r0, [r4, #0x30]
	lsl r3, r3, #0x13
	bl sub_0200DDF4
	add sp, #8
	pop {r3, r4, r5, pc}
_0220C33E:
	ldr r0, _0220C3D4 ; =0xFFFFC03F
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x18
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x12
	orr r0, r1
	str r0, [r4, #0x38]
	lsl r0, r0, #0x12
	lsr r0, r0, #0x18
	cmp r0, #2
	blo _0220C3CE
	ldr r0, [r4, #0x30]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x38]
	mov r1, #1
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #4]
	bl ov96_021EAB38
	ldr r0, [r4, #0x38]
	mov r1, #0
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r4, r0
	ldr r0, [r0, #4]
	bl ov96_021EAB74
	ldr r1, [r4, #0x38]
	ldr r0, _0220C3D8 ; =0xFE7FFFFF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x1e
	lsr r0, r0, #0x1e
	lsl r0, r0, #0x1e
	lsr r0, r0, #7
	add r1, r2, #0
	orr r1, r0
	ldr r0, _0220C3D4 ; =0xFFFFC03F
	add r2, r1, #0
	and r2, r0
	mov r0, #0x3c
	add r1, r2, #0
	bic r1, r0
	lsl r0, r2, #0x1a
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1a
	orr r0, r1
	add sp, #8
	str r0, [r4, #0x38]
	pop {r3, r4, r5, pc}
_0220C3B6:
	mov r1, #0
	str r1, [r4, #0x34]
	ldr r2, [r4, #0x38]
	ldr r1, _0220C3DC ; =0xFFFFBFFF
	and r1, r2
	str r1, [r4, #0x38]
	bl sub_0200E390
	add sp, #8
	pop {r3, r4, r5, pc}
_0220C3CA:
	bl GF_AssertFail
_0220C3CE:
	add sp, #8
	pop {r3, r4, r5, pc}
	nop
_0220C3D4: .word 0xFFFFC03F
_0220C3D8: .word 0xFE7FFFFF
_0220C3DC: .word 0xFFFFBFFF
	thumb_func_end ov96_0220C15C

	thumb_func_start ov96_0220C3E0
ov96_0220C3E0: ; 0x0220C3E0
	push {r4, lr}
	add r4, r0, #0
	ldr r1, [r4, #0x38]
	mov r0, #0x3c
	bic r1, r0
	ldr r0, _0220C404 ; =0xFFFFC03F
	mov r2, #1
	and r1, r0
	mov r0, #1
	lsl r0, r0, #0xe
	orr r0, r1
	str r0, [r4, #0x38]
	ldr r0, _0220C408 ; =ov96_0220C15C
	add r1, r4, #0
	bl sub_0200E320
	str r0, [r4, #0x34]
	pop {r4, pc}
	.balign 4, 0
_0220C404: .word 0xFFFFC03F
_0220C408: .word ov96_0220C15C
	thumb_func_end ov96_0220C3E0

	thumb_func_start ov96_0220C40C
ov96_0220C40C: ; 0x0220C40C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r6, r0, #0
	ldr r0, [r5, #0x38]
	lsl r1, r0, #5
	lsr r1, r1, #0x1e
	lsl r4, r1, #2
	lsl r0, r0, #7
	lsr r1, r0, #0x1e
	ldr r0, [r6, r4]
	lsl r0, r0, #6
	lsr r0, r0, #0x1e
	cmp r1, r0
	bne _0220C43E
	add r0, r5, #0
	add r1, r6, r4
	bl ov96_0220C004
	b _0220C44E
_0220C43E:
	ldr r0, [r5, #0x24]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0x28]
	mov r1, #0
	bl sub_0200DCE8
_0220C44E:
	add r0, r5, #0
	add r1, r6, r4
	bl ov96_0220C0DC
	ldr r2, [r5, #0x38]
	lsl r0, r2, #0x11
	lsr r0, r0, #0x1f
	bne _0220C48E
	ldr r0, [r6, r4]
	lsl r0, r0, #6
	lsr r1, r0, #0x1e
	lsl r0, r2, #7
	lsr r0, r0, #0x1e
	cmp r0, r1
	beq _0220C48E
	cmp r1, #3
	blo _0220C474
	bl GF_AssertFail
_0220C474:
	ldr r0, [r5, #0x38]
	mov r1, #3
	bic r0, r1
	ldr r1, [r6, r4]
	lsl r1, r1, #6
	lsr r2, r1, #0x1e
	mov r1, #3
	and r1, r2
	orr r0, r1
	str r0, [r5, #0x38]
	add r0, r5, #0
	bl ov96_0220C3E0
_0220C48E:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220C40C

	thumb_func_start ov96_0220C490
ov96_0220C490: ; 0x0220C490
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	add r5, r0, #0
	str r2, [sp]
	mov r0, #0
	add r7, r1, #0
	add r1, r0, #0
	add r2, sp, #4
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	cmp r7, #0
	bne _0220C4B6
	bl GF_AssertFail
_0220C4B6:
	ldr r0, [sp]
	cmp r0, #0
	bne _0220C4C0
	bl GF_AssertFail
_0220C4C0:
	ldr r1, _0220C540 ; =0x00002712
	mov r3, #2
	add r0, r1, #1
	str r0, [sp, #0x1c]
	mov r0, #1
	str r0, [sp, #0x14]
	str r1, [sp, #0x18]
	str r1, [sp, #0x20]
	str r1, [sp, #0x24]
	mov r1, #0x88
	add r0, sp, #4
	strh r1, [r0]
	mov r1, #0x70
	strh r1, [r0, #2]
	mov r0, #0x1b
	str r0, [sp, #0xc]
	str r3, [sp, #0x30]
	ldr r1, [sp]
	add r0, r7, #0
	add r2, sp, #4
	lsl r3, r3, #0x13
	bl sub_0200D740
	mov r1, #1
	str r0, [r5]
	bl sub_0200DC78
	mov r4, #0
	mov r6, #0x30
_0220C4FA:
	ldr r0, _0220C544 ; =0x00002713
	mov r3, #1
	add r0, r4, r0
	str r0, [sp, #0x18]
	ldr r0, _0220C548 ; =0x00002714
	mov r1, #0x28
	add r0, r4, r0
	str r0, [sp, #0x1c]
	ldr r0, _0220C540 ; =0x00002712
	add r2, sp, #4
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	mov r0, #2
	str r0, [sp, #0x14]
	add r0, sp, #4
	strh r1, [r0]
	strh r6, [r0, #2]
	add r0, r4, #1
	str r0, [sp, #0xc]
	ldr r1, [sp]
	add r0, r7, #0
	lsl r3, r3, #0x14
	bl sub_0200D740
	mov r1, #1
	str r0, [r5, #0x14]
	bl sub_0200DC78
	add r4, r4, #1
	add r6, #0x58
	add r5, r5, #4
	cmp r4, #2
	blt _0220C4FA
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220C540: .word 0x00002712
_0220C544: .word 0x00002713
_0220C548: .word 0x00002714
	thumb_func_end ov96_0220C490

	thumb_func_start ov96_0220C54C
ov96_0220C54C: ; 0x0220C54C
	push {r4, r5, lr}
	sub sp, #0x14
	lsl r1, r1, #2
	add r1, r0, r1
	ldr r4, [r0]
	ldr r5, [r1, #0x10]
	add r1, r2, #0
	add r2, r3, #0
	ldr r0, [r0, #0xc]
	add r3, sp, #4
	bl ov96_021E6168
	ldr r2, [sp, #0x20]
	add r0, r5, #0
	add r1, sp, #4
	mov r3, #0
	str r4, [sp]
	bl ov96_021EEBE4
	add sp, #0x14
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C54C

	thumb_func_start ov96_0220C578
ov96_0220C578: ; 0x0220C578
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r4, r1, #0
	add r5, r0, #0
	cmp r4, #2
	beq _0220C58A
	cmp r4, #3
	beq _0220C5C8
	b _0220C648
_0220C58A:
	ldr r0, [r5, #0xc]
	bl ov96_021E5F24
	mov r3, #1
	str r3, [sp]
	add r1, r0, #0
	ldr r2, [r5, #0x40]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x1e
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	ldr r0, [r5, #0xc]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	ldr r1, [r5, #0x40]
	add r0, r5, #0
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r3, r1, #2
	add r0, #0x34
	ldr r2, [r0, r3]
	ldr r1, _0220C668 ; =0xFC03FFFF
	and r1, r2
	str r1, [r0, r3]
	ldr r1, [r5, #0x40]
	ldr r0, _0220C66C ; =0xFFE003FF
	and r0, r1
	str r0, [r5, #0x40]
	b _0220C648
_0220C5C8:
	ldr r0, [r5, #0xc]
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r2, [r5, #0x40]
	lsl r1, r1, #0x18
	lsl r2, r2, #0x1e
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	ldr r0, [r5, #0xc]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #7
	bl ov96_021E8228
	ldr r1, [r5, #0x44]
	ldr r0, _0220C670 ; =0x00FFFFFF
	and r0, r1
	str r0, [r5, #0x44]
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	sub r2, #0xa
	cmp r2, #0x64
	ble _0220C600
	mov r2, #0x64
	b _0220C606
_0220C600:
	cmp r2, #0
	bge _0220C606
	mov r2, #0
_0220C606:
	ldr r1, [r5, #0x44]
	mov r0, #0xff
	bic r1, r0
	lsl r0, r2, #0x18
	lsr r0, r0, #0x18
	orr r0, r1
	str r0, [r5, #0x44]
	lsl r0, r0, #0x17
	lsr r0, r0, #0x1f
	beq _0220C620
	add r0, r5, #0
	bl ov96_0220C7FC
_0220C620:
	ldr r3, [r5, #0x40]
	add r1, r5, #0
	add r0, r3, #0
	lsl r3, r3, #0x1e
	lsr r3, r3, #0x1e
	mov r2, #3
	add r6, r3, #1
	mov r3, #3
	bic r0, r2
	and r3, r6
	orr r0, r3
	str r0, [r5, #0x40]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	add r1, #0x40
	cmp r0, #3
	blo _0220C648
	ldr r0, [r1]
	bic r0, r2
	str r0, [r1]
_0220C648:
	ldr r1, [r5, #0x40]
	ldr r0, _0220C674 ; =0xFFFFFC03
	and r1, r0
	lsl r0, r4, #0x18
	lsr r0, r0, #0x16
	orr r0, r1
	str r0, [r5, #0x40]
	ldr r1, [r5, #0x44]
	ldr r0, _0220C678 ; =0xFFFF03FF
	and r1, r0
	ldr r0, _0220C67C ; =0xFF00FFFF
	and r0, r1
	str r0, [r5, #0x44]
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	nop
_0220C668: .word 0xFC03FFFF
_0220C66C: .word 0xFFE003FF
_0220C670: .word 0x00FFFFFF
_0220C674: .word 0xFFFFFC03
_0220C678: .word 0xFFFF03FF
_0220C67C: .word 0xFF00FFFF
	thumb_func_end ov96_0220C578

	thumb_func_start ov96_0220C680
ov96_0220C680: ; 0x0220C680
	push {r4, lr}
	ldr r3, [r0, #0x40]
	lsl r1, r3, #0x16
	lsr r1, r1, #0x18
	cmp r1, #3
	beq _0220C70C
	ldr r1, [r0, #0x44]
	lsl r2, r1, #0x17
	lsr r2, r2, #0x1f
	beq _0220C6B0
	ldr r1, _0220C710 ; =0x001FFFFF
	add r2, r3, #0
	and r2, r1
	lsr r1, r3, #0x15
	add r1, r1, #1
	lsl r1, r1, #0x15
	orr r1, r2
	str r1, [r0, #0x40]
	lsr r1, r1, #0x15
	cmp r1, #0x5a
	blo _0220C70C
	bl ov96_0220C7FC
	pop {r4, pc}
_0220C6B0:
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	beq _0220C704
	add r1, r3, #0
	ldr r4, _0220C710 ; =0x001FFFFF
	lsr r3, r3, #0x15
	add r3, r3, #1
	add r2, r0, #0
	and r1, r4
	lsl r3, r3, #0x15
	orr r1, r3
	str r1, [r0, #0x40]
	lsr r1, r1, #0x15
	add r2, #0x40
	cmp r1, #2
	blo _0220C6EC
	ldr r1, [r2]
	and r1, r4
	str r1, [r2]
	ldr r3, [r0, #0x44]
	mov r2, #0xff
	add r1, r3, #0
	bic r1, r2
	lsl r2, r3, #0x18
	lsr r2, r2, #0x18
	sub r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	orr r1, r2
	str r1, [r0, #0x44]
_0220C6EC:
	ldr r1, [r0, #0x44]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, #0x32
	blo _0220C70C
	lsl r1, r1, #0x10
	ldr r0, [r0, #0x14]
	lsr r1, r1, #0x10
	mov r2, #1
	bl ov96_0220C8B8
	pop {r4, pc}
_0220C704:
	ldr r0, [r0, #0x14]
	mov r1, #0
	bl sub_0200DCE8
_0220C70C:
	pop {r4, pc}
	nop
_0220C710: .word 0x001FFFFF
	thumb_func_end ov96_0220C680

	thumb_func_start ov96_0220C714
ov96_0220C714: ; 0x0220C714
	push {r3, r4, r5, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x44]
	add r5, r1, #0
	lsl r0, r0, #0x17
	lsr r0, r0, #0x1f
	beq _0220C726
	bl GF_AssertFail
_0220C726:
	cmp r5, #0
	beq _0220C740
	ldr r2, [r4, #0x44]
	mov r1, #0xff
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x18
	lsr r1, r1, #0x18
	add r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r0, r1
	str r0, [r4, #0x44]
_0220C740:
	ldr r1, [r4, #0x44]
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0x64
	bls _0220C754
	mov r0, #0xff
	bic r1, r0
	mov r0, #0x64
	orr r0, r1
	str r0, [r4, #0x44]
_0220C754:
	ldr r0, [r4, #0x44]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0x64
	blo _0220C764
	add r0, r4, #0
	bl ov96_0220C7C4
_0220C764:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C714

	thumb_func_start ov96_0220C768
ov96_0220C768: ; 0x0220C768
	push {r4, lr}
	add r4, r0, #0
	add r0, r1, #0
	add r1, r2, #0
	bl FX_Div
	mov r1, #0x64
	add r2, r0, #0
	mul r2, r1
	asr r0, r2, #0xc
	cmp r0, #0x28
	bgt _0220C7BE
	sub r0, r1, r0
	lsl r0, r0, #1
	cmp r0, #0
	ble _0220C79A
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220C7A8
_0220C79A:
	lsl r0, r0, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220C7A8:
	bl _ftoi
	mov r1, #0x64
	bl _s32_div_f
	add r1, r0, #0
	add r0, r4, #0
	bl sub_0200DC8C
	mov r0, #1
	pop {r4, pc}
_0220C7BE:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C768

	thumb_func_start ov96_0220C7C4
ov96_0220C7C4: ; 0x0220C7C4
	push {r4, lr}
	add r4, r0, #0
	mov r0, #1
	ldr r1, [r4, #0x44]
	lsl r0, r0, #8
	orr r0, r1
	str r0, [r4, #0x44]
	ldr r1, [r4, #0x40]
	ldr r0, _0220C7F4 ; =0x001FFFFF
	and r0, r1
	str r0, [r4, #0x40]
	ldr r0, [r4, #0x14]
	mov r1, #0x10
	bl sub_0200DC4C
	mov r1, #1
	ldr r0, [r4, #0x14]
	lsl r1, r1, #0xc
	bl sub_0200DC8C
	ldr r0, _0220C7F8 ; =0x000008BF
	bl PlaySE
	pop {r4, pc}
	.balign 4, 0
_0220C7F4: .word 0x001FFFFF
_0220C7F8: .word 0x000008BF
	thumb_func_end ov96_0220C7C4

	thumb_func_start ov96_0220C7FC
ov96_0220C7FC: ; 0x0220C7FC
	push {r4, lr}
	ldr r2, [r0, #0x44]
	ldr r1, _0220C83C ; =0xFFFFFEFF
	ldr r3, _0220C840 ; =0xFC03FFFF
	and r2, r1
	str r2, [r0, #0x44]
	ldr r2, [r0, #0x40]
	lsr r1, r1, #0xb
	and r1, r2
	str r1, [r0, #0x40]
	ldr r2, [r0, #0x44]
	mov r1, #0xff
	bic r2, r1
	str r2, [r0, #0x44]
	ldr r1, [r0, #0x40]
	add r2, r0, #0
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	add r2, #0x34
	lsl r1, r1, #2
	ldr r4, [r2, r1]
	and r4, r3
	mov r3, #0xa
	lsl r3, r3, #0x12
	orr r3, r4
	str r3, [r2, r1]
	ldr r0, [r0, #0x14]
	mov r1, #0
	bl sub_0200DCE8
	pop {r4, pc}
	nop
_0220C83C: .word 0xFFFFFEFF
_0220C840: .word 0xFC03FFFF
	thumb_func_end ov96_0220C7FC

	thumb_func_start ov96_0220C844
ov96_0220C844: ; 0x0220C844
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	mov r5, #0
	str r0, [sp]
	str r1, [sp, #4]
	str r5, [sp, #8]
	mov r7, #0x48
_0220C852:
	ldr r1, [sp, #8]
	ldr r0, [sp, #4]
	cmp r1, r0
	beq _0220C8A8
	mov r6, #0
_0220C85C:
	add r1, r6, r5
	lsl r1, r1, #0x18
	ldr r0, [sp]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r4, r0, #0
	mov r1, #0x20
	bl ov96_021EABA8
	add r0, r4, #0
	add r1, r7, #0
	mov r2, #0x30
	bl ov96_021EAF94
	add r0, r4, #0
	mov r1, #2
	bl ov96_021EAC0C
	cmp r6, #0
	bne _0220C88A
	mov r1, #1
	b _0220C88C
_0220C88A:
	mov r1, #0
_0220C88C:
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_021EAB38
	add r0, r4, #0
	mov r1, #0
	bl ov96_021EAB74
	add r6, r6, #1
	cmp r6, #3
	blt _0220C85C
	add r5, r5, #3
	add r7, #0x40
_0220C8A8:
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	blt _0220C852
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C844

	thumb_func_start ov96_0220C8B8
ov96_0220C8B8: ; 0x0220C8B8
	push {r3, r4, r5, lr}
	add r4, r2, #0
	add r5, r0, #0
	mov r2, #0
	sub r1, #0x32
	beq _0220C8CE
	lsl r0, r1, #0xc
	mov r1, #0xa
	bl _s32_div_f
	add r2, r0, #0
_0220C8CE:
	ldr r0, _0220C908 ; =0x0000099A
	cmp r2, r0
	bge _0220C8D6
	add r2, r0, #0
_0220C8D6:
	add r0, r5, #0
	add r1, r2, #0
	bl sub_0200DC8C
	add r0, r5, #0
	mov r1, #0x11
	bl sub_0200DC58
	cmp r4, #0
	beq _0220C8FC
	add r0, r5, #0
	bl sub_0200DCFC
	cmp r0, #0
	bne _0220C8FC
	mov r0, #0x23
	lsl r0, r0, #6
	bl PlaySE
_0220C8FC:
	add r0, r5, #0
	mov r1, #1
	bl sub_0200DCE8
	pop {r3, r4, r5, pc}
	nop
_0220C908: .word 0x0000099A
	thumb_func_end ov96_0220C8B8

	thumb_func_start ov96_0220C90C
ov96_0220C90C: ; 0x0220C90C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	lsl r6, r1, #2
	add r0, r5, r6
	add r7, r2, #0
	add r4, r3, #0
	mov r3, #1
	ldr r0, [r0, #0x10]
	add r1, r7, #0
	add r2, r4, #0
	lsl r3, r3, #0x14
	bl sub_0200DDF4
	add r0, r5, r6
	sub r4, #0x18
	lsl r2, r4, #0x10
	mov r3, #1
	ldr r0, [r0, #0x18]
	add r1, r7, #0
	asr r2, r2, #0x10
	lsl r3, r3, #0x14
	bl sub_0200DDF4
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220C90C

	thumb_func_start ov96_0220C93C
ov96_0220C93C: ; 0x0220C93C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	str r0, [sp]
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0x78
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x78
	add r6, r0, #0
	bl MIi_CpuFill8
	ldr r0, [sp]
	str r4, [r6]
	str r0, [r6, #4]
	mov r0, #4
	sub r0, r0, r5
	str r0, [r6, #0x74]
	cmp r0, #3
	bls _0220C96E
	bl GF_AssertFail
_0220C96E:
	ldr r0, [r6, #0x74]
	mov r7, #0
	cmp r0, #0
	bls _0220C992
	add r4, r6, #0
	add r4, #8
_0220C97A:
	lsl r1, r5, #0x18
	ldr r2, [sp]
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_0220C9F4
	ldr r0, [r6, #0x74]
	add r7, r7, #1
	add r5, r5, #1
	add r4, #0x24
	cmp r7, r0
	blo _0220C97A
_0220C992:
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220C93C

	thumb_func_start ov96_0220C998
ov96_0220C998: ; 0x0220C998
	ldr r3, _0220C99C ; =FreeToHeap
	bx r3
	.balign 4, 0
_0220C99C: .word FreeToHeap
	thumb_func_end ov96_0220C998

	thumb_func_start ov96_0220C9A0
ov96_0220C9A0: ; 0x0220C9A0
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #0x74]
	mov r6, #0
	cmp r0, #0
	bls _0220C9CA
	add r4, r5, #0
	add r4, #8
_0220C9B0:
	add r0, r4, #0
	bl ov96_0220CA28
	add r1, r0, #0
	ldr r2, [r5, #4]
	add r0, r4, #0
	bl ov96_0220CF50
	ldr r0, [r5, #0x74]
	add r6, r6, #1
	add r4, #0x24
	cmp r6, r0
	blo _0220C9B0
_0220C9CA:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220C9A0

	thumb_func_start ov96_0220C9CC
ov96_0220C9CC: ; 0x0220C9CC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5, #0x74]
	mov r6, #0
	cmp r0, #0
	bls _0220C9F2
	add r4, r5, #0
	add r4, #8
	add r7, r6, #0
_0220C9DE:
	ldr r2, [r5, #4]
	add r0, r4, #0
	add r1, r7, #0
	bl ov96_0220CF50
	ldr r0, [r5, #0x74]
	add r6, r6, #1
	add r4, #0x24
	cmp r6, r0
	blo _0220C9DE
_0220C9F2:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220C9CC

	thumb_func_start ov96_0220C9F4
ov96_0220C9F4: ; 0x0220C9F4
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r6, r2, #0
	add r5, r0, #0
	mov r1, #0
	mov r2, #0x24
	bl MIi_CpuFill8
	str r6, [r5]
	ldr r1, [r5, #0x18]
	ldr r0, _0220CA24 ; =0x3FFFFFFF
	add r2, r6, #0
	and r1, r0
	lsl r0, r4, #0x1e
	orr r0, r1
	str r0, [r5, #0x18]
	mov r0, #0x64
	str r0, [r5, #0x10]
	add r0, r5, #4
	add r1, r4, #0
	bl ov96_0220D200
	pop {r4, r5, r6, pc}
	nop
_0220CA24: .word 0x3FFFFFFF
	thumb_func_end ov96_0220C9F4

	thumb_func_start ov96_0220CA28
ov96_0220CA28: ; 0x0220CA28
	push {r3, r4, r5, lr}
	add r4, r0, #0
	ldr r5, _0220CABC ; =0x00000000
	bne _0220CA34
	bl GF_AssertFail
_0220CA34:
	ldr r0, [r4, #0x14]
	lsl r0, r0, #2
	lsr r0, r0, #0x1a
	cmp r0, #3
	bhi _0220CA7A
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220CA4A: ; jump table
	.short _0220CA52 - _0220CA4A - 2 ; case 0
	.short _0220CA5C - _0220CA4A - 2 ; case 1
	.short _0220CA66 - _0220CA4A - 2 ; case 2
	.short _0220CA70 - _0220CA4A - 2 ; case 3
_0220CA52:
	add r0, r4, #0
	bl ov96_0220CAC4
	add r5, r0, #0
	b _0220CA7E
_0220CA5C:
	add r0, r4, #0
	bl ov96_0220CBC0
	add r5, r0, #0
	b _0220CA7E
_0220CA66:
	add r0, r4, #0
	bl ov96_0220CC18
	add r5, r0, #0
	b _0220CA7E
_0220CA70:
	add r0, r4, #0
	bl ov96_0220CBEC
	add r5, r0, #0
	b _0220CA7E
_0220CA7A:
	bl GF_AssertFail
_0220CA7E:
	ldr r0, [r4, #0x14]
	lsl r0, r0, #2
	lsr r0, r0, #0x1a
	cmp r0, #3
	beq _0220CA8E
	add r0, r4, #0
	bl ov96_0220D07C
_0220CA8E:
	ldr r2, [r4, #0x14]
	ldr r1, [r4, #0x18]
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x15
	lsl r2, r2, #0x18
	add r0, r4, #4
	lsr r1, r1, #0x15
	lsr r2, r2, #0x18
	bl ov96_0220D2AC
	ldr r2, [r4, #0x18]
	ldr r1, _0220CAC0 ; =0xFFFFF800
	add r0, r2, #0
	lsl r2, r2, #0x15
	lsr r2, r2, #0x15
	and r0, r1
	add r2, r2, #1
	lsr r1, r1, #0x15
	and r1, r2
	orr r0, r1
	str r0, [r4, #0x18]
	add r0, r5, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220CABC: .word 0x00000000
_0220CAC0: .word 0xFFFFF800
	thumb_func_end ov96_0220CA28

	thumb_func_start ov96_0220CAC4
ov96_0220CAC4: ; 0x0220CAC4
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r2, [r5, #0x14]
	ldr r1, _0220CBB4 ; =0xFFFF00FF
	mov r4, #0
	and r1, r2
	lsl r2, r2, #0x10
	lsr r2, r2, #0x18
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x10
	orr r1, r2
	str r1, [r5, #0x14]
	lsl r1, r1, #0x10
	lsr r2, r1, #0x18
	ldr r1, [r5, #0x18]
	lsl r1, r1, #2
	lsr r1, r1, #0x18
	cmp r2, r1
	blo _0220CB7E
	bl ov96_0220CD00
	cmp r0, #0
	beq _0220CB20
	add r0, r5, #0
	bl ov96_0220D0F8
	mov r0, #1
	str r0, [sp]
	ldr r1, [r5, #0x18]
	ldr r2, [r5, #0x14]
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #7
	bl ov96_021E8228
	add r0, r5, #0
	mov r1, #1
	bl ov96_0220CD84
	b _0220CB5C
_0220CB20:
	add r0, r5, #0
	bl ov96_0220CCBC
	cmp r0, #0
	beq _0220CB2C
	add r4, r4, #2
_0220CB2C:
	ldr r0, [r5, #0x1c]
	lsl r1, r0, #0x17
	lsr r1, r1, #0x1f
	beq _0220CB52
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #2
	blo _0220CB5C
	add r0, r5, #0
	bl ov96_0220CC38
	cmp r0, #0
	beq _0220CB5C
	mov r1, #2
	add r0, r5, #0
	and r1, r4
	bl ov96_0220CE04
	b _0220CB5C
_0220CB52:
	mov r1, #2
	add r0, r5, #0
	and r1, r4
	bl ov96_0220CE04
_0220CB5C:
	ldr r1, [r5, #0x14]
	ldr r0, _0220CBB4 ; =0xFFFF00FF
	and r0, r1
	str r0, [r5, #0x14]
	bl MTRandom
	mov r1, #3
	bl _u32_div_f
	ldr r2, [r5, #0x18]
	ldr r0, _0220CBB8 ; =0xC03FFFFF
	and r2, r0
	add r0, r1, #4
	lsl r0, r0, #0x18
	lsr r0, r0, #2
	orr r0, r2
	str r0, [r5, #0x18]
_0220CB7E:
	ldr r3, [r5, #0x1c]
	lsl r0, r3, #0x17
	lsr r0, r0, #0x1f
	beq _0220CBB0
	add r0, r3, #0
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	add r3, r3, #1
	mov r2, #0xff
	lsl r3, r3, #0x18
	bic r0, r2
	lsr r3, r3, #0x18
	orr r0, r3
	str r0, [r5, #0x1c]
	lsl r0, r0, #0x18
	add r1, r5, #0
	lsr r0, r0, #0x18
	add r1, #0x1c
	cmp r0, #0xa
	blo _0220CBB0
	ldr r3, [r1]
	ldr r0, _0220CBBC ; =0xFFFFFEFF
	bic r3, r2
	and r0, r3
	str r0, [r1]
_0220CBB0:
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220CBB4: .word 0xFFFF00FF
_0220CBB8: .word 0xC03FFFFF
_0220CBBC: .word 0xFFFFFEFF
	thumb_func_end ov96_0220CAC4

	thumb_func_start ov96_0220CBC0
ov96_0220CBC0: ; 0x0220CBC0
	push {r3, lr}
	ldr r2, [r0, #0x14]
	ldr r1, _0220CBE8 ; =0xFFFF00FF
	and r1, r2
	lsl r2, r2, #0x10
	lsr r2, r2, #0x18
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x10
	orr r1, r2
	str r1, [r0, #0x14]
	lsl r1, r1, #0x10
	lsr r1, r1, #0x18
	cmp r1, #0x1a
	blo _0220CBE4
	mov r1, #0
	bl ov96_0220CD84
_0220CBE4:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
_0220CBE8: .word 0xFFFF00FF
	thumb_func_end ov96_0220CBC0

	thumb_func_start ov96_0220CBEC
ov96_0220CBEC: ; 0x0220CBEC
	push {r3, lr}
	ldr r2, [r0, #0x14]
	ldr r1, _0220CC14 ; =0xFFFF00FF
	and r1, r2
	lsl r2, r2, #0x10
	lsr r2, r2, #0x18
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x10
	orr r1, r2
	str r1, [r0, #0x14]
	lsl r1, r1, #0x10
	lsr r1, r1, #0x18
	cmp r1, #0x2a
	blo _0220CC10
	mov r1, #0
	bl ov96_0220CD84
_0220CC10:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
_0220CC14: .word 0xFFFF00FF
	thumb_func_end ov96_0220CBEC

	thumb_func_start ov96_0220CC18
ov96_0220CC18: ; 0x0220CC18
	push {r3, lr}
	ldr r1, [r0, #0x14]
	lsr r1, r1, #0x1e
	lsl r1, r1, #2
	add r1, r0, r1
	ldr r1, [r1, #4]
	lsl r1, r1, #6
	lsr r1, r1, #0x18
	cmp r1, #8
	blo _0220CC32
	mov r1, #0
	bl ov96_0220CD84
_0220CC32:
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_0220CC18

	thumb_func_start ov96_0220CC38
ov96_0220CC38: ; 0x0220CC38
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r4, #0
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	lsl r0, r1, #0x18
	lsr r6, r0, #0x18
	cmp r5, #0
	bne _0220CC54
	bl GF_AssertFail
_0220CC54:
	ldr r2, [r5, #0x14]
	ldr r1, _0220CCAC ; =0x0221CE34
	lsr r2, r2, #0x1e
	lsl r2, r2, #2
	add r2, r5, r2
	ldr r2, [r2, #4]
	mov r0, #0
	lsl r2, r2, #6
	lsr r3, r2, #0x18
_0220CC66:
	ldr r2, [r1]
	cmp r3, r2
	blo _0220CC76
	lsl r1, r0, #2
	ldr r0, _0220CCB0 ; =0x0221CE48
	ldr r0, [r0, r1]
	add r4, r4, r0
	b _0220CC7E
_0220CC76:
	add r0, r0, #1
	add r1, r1, #4
	cmp r0, #5
	blt _0220CC66
_0220CC7E:
	ldr r1, [r5, #0x14]
	ldr r2, _0220CCB4 ; =0x0221CE14
	lsl r1, r1, #8
	mov r0, #0
	lsr r3, r1, #0x18
_0220CC88:
	ldr r1, [r2]
	cmp r3, r1
	blo _0220CC98
	lsl r1, r0, #2
	ldr r0, _0220CCB8 ; =0x0221CE24
	ldr r0, [r0, r1]
	add r4, r4, r0
	b _0220CCA0
_0220CC98:
	add r0, r0, #1
	add r2, r2, #4
	cmp r0, #4
	blt _0220CC88
_0220CCA0:
	cmp r6, r4
	bge _0220CCA8
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220CCA8:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220CCAC: .word 0x0221CE34
_0220CCB0: .word 0x0221CE48
_0220CCB4: .word 0x0221CE14
_0220CCB8: .word 0x0221CE24
	thumb_func_end ov96_0220CC38

	thumb_func_start ov96_0220CCBC
ov96_0220CCBC: ; 0x0220CCBC
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r6, #0
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	ldr r0, [r5, #0x14]
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #4]
	lsr r0, r0, #0x1a
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #3
	blo _0220CCE8
	bl GF_AssertFail
_0220CCE8:
	ldr r0, _0220CCFC ; =0x0221CE08
	lsl r1, r5, #2
	ldr r0, [r0, r1]
	add r0, r6, r0
	cmp r4, r0
	bge _0220CCF8
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220CCF8:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220CCFC: .word 0x0221CE08
	thumb_func_end ov96_0220CCBC

	thumb_func_start ov96_0220CD00
ov96_0220CD00: ; 0x0220CD00
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r4, #0
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	lsl r0, r1, #0x18
	lsr r6, r0, #0x18
	cmp r5, #0
	bne _0220CD1C
	bl GF_AssertFail
_0220CD1C:
	ldr r2, [r5, #0x14]
	ldr r1, _0220CD74 ; =0x0221CDF4
	lsr r2, r2, #0x1e
	lsl r2, r2, #2
	add r2, r5, r2
	ldr r2, [r2, #4]
	mov r0, #0
	lsl r2, r2, #6
	lsr r3, r2, #0x18
_0220CD2E:
	ldrh r2, [r1]
	cmp r3, r2
	bhs _0220CD3E
	lsl r1, r0, #1
	ldr r0, _0220CD78 ; =0x0221CDFE
	ldrsh r0, [r0, r1]
	add r4, r4, r0
	b _0220CD46
_0220CD3E:
	add r0, r0, #1
	add r1, r1, #2
	cmp r0, #5
	blt _0220CD2E
_0220CD46:
	ldr r1, [r5, #0x14]
	ldr r2, _0220CD7C ; =0x0221CDE8
	lsl r1, r1, #8
	mov r0, #0
	lsr r3, r1, #0x18
_0220CD50:
	ldrh r1, [r2]
	cmp r3, r1
	blo _0220CD60
	lsl r1, r0, #1
	ldr r0, _0220CD80 ; =0x0221CDEE
	ldrsh r0, [r0, r1]
	add r4, r4, r0
	b _0220CD68
_0220CD60:
	add r0, r0, #1
	add r2, r2, #2
	cmp r0, #3
	blt _0220CD50
_0220CD68:
	cmp r6, r4
	bge _0220CD70
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220CD70:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220CD74: .word 0x0221CDF4
_0220CD78: .word 0x0221CDFE
_0220CD7C: .word 0x0221CDE8
_0220CD80: .word 0x0221CDEE
	thumb_func_end ov96_0220CD00

	thumb_func_start ov96_0220CD84
ov96_0220CD84: ; 0x0220CD84
	push {r4, r5}
	cmp r1, #1
	beq _0220CD98
	cmp r1, #2
	bne _0220CDDA
	ldr r3, [r0, #0x18]
	ldr r2, _0220CDF0 ; =0xFFFFF800
	and r2, r3
	str r2, [r0, #0x18]
	b _0220CDDA
_0220CD98:
	ldr r2, [r0, #0x14]
	lsl r2, r2, #8
	lsr r5, r2, #0x18
	sub r5, #0xa
	cmp r5, #0x64
	ble _0220CDA8
	mov r5, #0x64
	b _0220CDAE
_0220CDA8:
	cmp r5, #0
	bge _0220CDAE
	mov r5, #0
_0220CDAE:
	ldr r4, [r0, #0x14]
	ldr r3, _0220CDF4 ; =0xFF00FFFF
	add r2, r0, #0
	and r4, r3
	lsl r3, r5, #0x18
	lsr r3, r3, #8
	orr r4, r3
	add r5, r4, #0
	ldr r3, _0220CDF8 ; =0x3FFFFFFF
	lsr r4, r4, #0x1e
	add r4, r4, #1
	and r5, r3
	lsl r4, r4, #0x1e
	orr r4, r5
	str r4, [r0, #0x14]
	lsr r4, r4, #0x1e
	add r2, #0x14
	cmp r4, #3
	blo _0220CDDA
	ldr r4, [r2]
	and r3, r4
	str r3, [r2]
_0220CDDA:
	ldr r3, [r0, #0x14]
	ldr r2, _0220CDFC ; =0xC0FFFFFF
	lsl r1, r1, #0x1a
	and r2, r3
	lsr r1, r1, #2
	orr r2, r1
	ldr r1, _0220CE00 ; =0xFFFF00FF
	and r1, r2
	str r1, [r0, #0x14]
	pop {r4, r5}
	bx lr
	.balign 4, 0
_0220CDF0: .word 0xFFFFF800
_0220CDF4: .word 0xFF00FFFF
_0220CDF8: .word 0x3FFFFFFF
_0220CDFC: .word 0xC0FFFFFF
_0220CE00: .word 0xFFFF00FF
	thumb_func_end ov96_0220CD84

	thumb_func_start ov96_0220CE04
ov96_0220CE04: ; 0x0220CE04
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	str r1, [sp, #4]
	ldr r6, _0220CF48 ; =0x00000000
	bne _0220CE14
	bl GF_AssertFail
_0220CE14:
	add r0, r5, #4
	str r0, [sp, #8]
	ldr r0, [r5, #0x14]
	ldr r1, [sp, #8]
	lsr r0, r0, #0x1e
	lsl r0, r0, #2
	str r0, [sp, #0xc]
	ldr r0, [r1, r0]
	lsl r0, r0, #0x17
	lsr r7, r0, #0x17
	ldr r0, [sp, #4]
	cmp r0, #0
	beq _0220CE34
	add r7, #0xa0
	lsl r0, r7, #0x10
	asr r7, r0, #0x10
_0220CE34:
	add r4, r5, #0
	add r4, #0x10
_0220CE38:
	ldr r0, [r4]
	sub r0, r0, r7
	str r0, [r4]
	ldr r0, [r5, #0x10]
	cmp r0, #0
	bgt _0220CE72
	neg r0, r0
	lsl r0, r0, #0x10
	asr r7, r0, #0x10
	mov r0, #0x64
	str r0, [r5, #0x10]
	mov r0, #1
	str r0, [sp]
	ldr r1, [r5, #0x18]
	ldr r2, [r5, #0x14]
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #3
	bl ov96_021E8228
	add r0, r6, #1
	lsl r0, r0, #0x10
	lsr r6, r0, #0x10
	b _0220CE38
_0220CE72:
	ldr r2, [r5, #0x14]
	mov r1, #0xff
	add r0, r2, #0
	bic r0, r1
	lsl r1, r2, #0x18
	lsr r1, r1, #0x18
	add r1, r1, r6
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r0, r1
	str r0, [r5, #0x14]
	ldr r1, [r5, #0x1c]
	lsl r0, r1, #0x16
	lsr r0, r0, #0x1f
	bne _0220CEFC
	lsl r0, r1, #0x17
	lsr r0, r0, #0x1f
	beq _0220CEF2
	ldr r2, [sp, #8]
	ldr r0, [sp, #0xc]
	lsl r1, r1, #0x18
	ldr r0, [r2, r0]
	lsr r1, r1, #0x18
	lsl r0, r0, #6
	lsl r1, r1, #0x10
	lsr r0, r0, #0x18
	lsr r1, r1, #0x10
	bl ov96_0220D33C
	lsl r0, r0, #0x18
	ldr r2, [sp, #8]
	ldr r1, [sp, #0xc]
	lsr r0, r0, #6
	ldr r2, [r2, r1]
	ldr r1, _0220CF4C ; =0xFC03FFFF
	and r1, r2
	add r2, r1, #0
	orr r2, r0
	ldr r1, [sp, #8]
	ldr r0, [sp, #0xc]
	str r2, [r1, r0]
	ldr r0, [r1, r0]
	lsl r0, r0, #6
	lsr r0, r0, #0x18
	bne _0220CEF2
	mov r3, #1
	str r3, [sp]
	ldr r1, [r5, #0x18]
	ldr r2, [r5, #0x14]
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	add r0, r5, #0
	mov r1, #2
	bl ov96_0220CD84
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
_0220CEF2:
	ldr r1, [sp, #4]
	add r0, r5, #0
	add r2, r6, #0
	bl ov96_0220D014
_0220CEFC:
	cmp r6, #0
	beq _0220CF1A
	ldr r0, [r5, #0x14]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _0220CF1A
	mov r1, #0xa
	bl _u32_div_f
	cmp r1, #0
	bne _0220CF1A
	add r0, r5, #0
	mov r1, #3
	bl ov96_0220CD84
_0220CF1A:
	mov r0, #1
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #8
	orr r1, r0
	mov r0, #0xff
	bic r1, r0
	str r1, [r5, #0x1c]
	mov r0, #1
	str r0, [sp]
	ldr r1, [r5, #0x18]
	ldr r2, [r5, #0x14]
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #4
	bl ov96_021E8228
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220CF48: .word 0x00000000
_0220CF4C: .word 0xFC03FFFF
	thumb_func_end ov96_0220CE04

	thumb_func_start ov96_0220CF50
ov96_0220CF50: ; 0x0220CF50
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r0, r2, #0
	add r4, r1, #0
	bl ov96_021E5F54
	ldr r1, [r5, #0x18]
	add r0, #0x50
	lsr r2, r1, #0x1e
	mov r1, #0x28
	mul r1, r2
	add r0, r0, r1
	bl ov96_021E8A20
	ldr r7, [r5, #0x14]
	mov r6, #0xff
	lsr r1, r7, #0x1e
	lsl r2, r1, #2
	ldr r1, [r0]
	add r3, r5, #4
	bic r1, r6
	lsl r6, r7, #0x18
	lsr r6, r6, #0x18
	lsl r6, r6, #0x18
	lsr r6, r6, #0x18
	orr r6, r1
	str r6, [r0]
	ldr r2, [r3, r2]
	ldr r1, _0220CFFC ; =0xFFFF00FF
	lsl r2, r2, #6
	lsr r2, r2, #0x18
	lsl r2, r2, #0x18
	and r1, r6
	lsr r2, r2, #0x10
	orr r2, r1
	ldr r1, _0220D000 ; =0xFF00FFFF
	str r2, [r0]
	and r1, r2
	ldr r2, [r5, #0x14]
	lsl r2, r2, #8
	lsr r2, r2, #0x18
	lsl r2, r2, #0x18
	lsr r2, r2, #8
	orr r2, r1
	ldr r1, _0220D004 ; =0xFBFFFFFF
	str r2, [r0]
	and r1, r2
	ldr r2, [r5, #0x1c]
	lsl r2, r2, #0x16
	lsr r2, r2, #0x1f
	lsl r2, r2, #0x1f
	lsr r2, r2, #5
	orr r2, r1
	ldr r1, _0220D008 ; =0xF7FFFFFF
	and r2, r1
	mov r1, #2
	and r1, r4
	lsl r1, r1, #0x1f
	lsr r1, r1, #4
	orr r2, r1
	ldr r1, _0220D00C ; =0xFCFFFFFF
	str r2, [r0]
	and r2, r1
	ldr r1, [r5, #0x14]
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x1e
	lsr r1, r1, #6
	orr r1, r2
	str r1, [r0]
	ldr r1, [r5, #0x14]
	lsl r1, r1, #2
	lsr r1, r1, #0x1a
	cmp r1, #1
	bne _0220CFE8
	mov r3, #1
	b _0220CFEA
_0220CFE8:
	mov r3, #0
_0220CFEA:
	ldr r2, [r0]
	ldr r1, _0220D010 ; =0xEFFFFFFF
	and r2, r1
	lsl r1, r3, #0x1f
	lsr r1, r1, #3
	orr r1, r2
	str r1, [r0]
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220CFFC: .word 0xFFFF00FF
_0220D000: .word 0xFF00FFFF
_0220D004: .word 0xFBFFFFFF
_0220D008: .word 0xF7FFFFFF
_0220D00C: .word 0xFCFFFFFF
_0220D010: .word 0xEFFFFFFF
	thumb_func_end ov96_0220CF50

	thumb_func_start ov96_0220D014
ov96_0220D014: ; 0x0220D014
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5, #0x1c]
	add r4, r1, #0
	lsl r0, r0, #0x16
	lsr r0, r0, #0x1f
	beq _0220D026
	bl GF_AssertFail
_0220D026:
	cmp r4, #0
	beq _0220D040
	ldr r1, [r5, #0x14]
	ldr r0, _0220D074 ; =0xFF00FFFF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #8
	lsr r0, r0, #0x18
	add r0, #0x1e
	lsl r0, r0, #0x18
	lsr r0, r0, #8
	orr r0, r2
	str r0, [r5, #0x14]
_0220D040:
	ldr r1, [r5, #0x14]
	lsl r0, r1, #8
	lsr r0, r0, #0x18
	cmp r0, #0x64
	bls _0220D056
	ldr r0, _0220D074 ; =0xFF00FFFF
	and r1, r0
	mov r0, #0x19
	lsl r0, r0, #0x12
	orr r0, r1
	str r0, [r5, #0x14]
_0220D056:
	ldr r0, [r5, #0x14]
	lsl r0, r0, #8
	lsr r0, r0, #0x18
	cmp r0, #0x64
	blo _0220D072
	mov r0, #2
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #8
	orr r0, r1
	str r0, [r5, #0x1c]
	ldr r1, [r5, #0x18]
	ldr r0, _0220D078 ; =0xFFC007FF
	and r0, r1
	str r0, [r5, #0x18]
_0220D072:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220D074: .word 0xFF00FFFF
_0220D078: .word 0xFFC007FF
	thumb_func_end ov96_0220D014

	thumb_func_start ov96_0220D07C
ov96_0220D07C: ; 0x0220D07C
	push {r4, lr}
	ldr r1, [r0, #0x1c]
	lsl r1, r1, #0x16
	lsr r1, r1, #0x1f
	beq _0220D0A8
	ldr r2, [r0, #0x18]
	ldr r1, _0220D0F0 ; =0xFFC007FF
	and r1, r2
	lsl r2, r2, #0xa
	lsr r2, r2, #0x15
	add r2, r2, #1
	lsl r2, r2, #0x15
	lsr r2, r2, #0xa
	orr r1, r2
	str r1, [r0, #0x18]
	lsl r1, r1, #0xa
	lsr r1, r1, #0x15
	cmp r1, #0x5a
	blo _0220D0EE
	bl ov96_0220D0F8
	pop {r4, pc}
_0220D0A8:
	ldr r1, [r0, #0x14]
	lsl r1, r1, #8
	lsr r1, r1, #0x18
	beq _0220D0EE
	ldr r4, [r0, #0x18]
	add r2, r0, #0
	add r1, r4, #0
	lsl r4, r4, #0xa
	lsr r4, r4, #0x15
	ldr r3, _0220D0F0 ; =0xFFC007FF
	add r4, r4, #1
	lsl r4, r4, #0x15
	and r1, r3
	lsr r4, r4, #0xa
	orr r1, r4
	str r1, [r0, #0x18]
	lsl r1, r1, #0xa
	lsr r1, r1, #0x15
	add r2, #0x18
	cmp r1, #2
	blo _0220D0EE
	ldr r1, [r2]
	and r1, r3
	str r1, [r2]
	ldr r2, [r0, #0x14]
	ldr r1, _0220D0F4 ; =0xFF00FFFF
	add r3, r2, #0
	and r3, r1
	lsl r1, r2, #8
	lsr r1, r1, #0x18
	sub r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #8
	orr r1, r3
	str r1, [r0, #0x14]
_0220D0EE:
	pop {r4, pc}
	.balign 4, 0
_0220D0F0: .word 0xFFC007FF
_0220D0F4: .word 0xFF00FFFF
	thumb_func_end ov96_0220D07C

	thumb_func_start ov96_0220D0F8
ov96_0220D0F8: ; 0x0220D0F8
	push {r3, r4}
	ldr r4, [r0, #0x1c]
	ldr r3, _0220D12C ; =0xFFFFFDFF
	ldr r1, [r0, #0x14]
	and r3, r4
	str r3, [r0, #0x1c]
	ldr r4, [r0, #0x18]
	ldr r3, _0220D130 ; =0xFFC007FF
	lsr r1, r1, #0x1e
	and r3, r4
	str r3, [r0, #0x18]
	ldr r4, [r0, #0x14]
	ldr r3, _0220D134 ; =0xFF00FFFF
	add r2, r0, #4
	and r3, r4
	str r3, [r0, #0x14]
	lsl r1, r1, #2
	ldr r3, [r2, r1]
	ldr r0, _0220D138 ; =0xFC03FFFF
	and r3, r0
	mov r0, #0xa
	lsl r0, r0, #0x12
	orr r0, r3
	str r0, [r2, r1]
	pop {r3, r4}
	bx lr
	.balign 4, 0
_0220D12C: .word 0xFFFFFDFF
_0220D130: .word 0xFFC007FF
_0220D134: .word 0xFF00FFFF
_0220D138: .word 0xFC03FFFF
	thumb_func_end ov96_0220D0F8

	thumb_func_start ov96_0220D13C
ov96_0220D13C: ; 0x0220D13C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _0220D19C ; =0x0221CE84
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_0220D14E:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220D14E
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _0220D162
	bl GF_AssertFail
_0220D162:
	cmp r4, #0
	bne _0220D16A
	bl GF_AssertFail
_0220D16A:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #1
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	str r3, [sp, #0x30]
	add r0, r5, #0
	lsl r3, r3, #0x14
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220D19C: .word 0x0221CE84
	thumb_func_end ov96_0220D13C

	thumb_func_start ov96_0220D1A0
ov96_0220D1A0: ; 0x0220D1A0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _0220D1FC ; =0x0221CEB8
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_0220D1B2:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220D1B2
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _0220D1C6
	bl GF_AssertFail
_0220D1C6:
	cmp r4, #0
	bne _0220D1CE
	bl GF_AssertFail
_0220D1CE:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #1
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x14
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220D1FC: .word 0x0221CEB8
	thumb_func_end ov96_0220D1A0

	thumb_func_start ov96_0220D200
ov96_0220D200: ; 0x0220D200
	push {r4, r5, r6, r7, lr}
	sub sp, #0x44
	add r5, r0, #0
	str r1, [sp]
	str r2, [sp, #4]
	add r0, sp, #8
	mov r1, #0xaa
	mov r2, #5
	bl ReadWholeNarcMemberByIdPair
	mov r6, #0
	add r7, sp, #8
_0220D218:
	ldr r0, [sp, #4]
	ldr r1, [sp]
	add r2, r6, #0
	bl ov96_021E60D8
	add r4, r0, #0
	ldrb r0, [r4]
	cmp r0, #5
	blo _0220D22E
	bl GF_AssertFail
_0220D22E:
	ldrb r0, [r4, #3]
	cmp r0, #5
	blo _0220D238
	bl GF_AssertFail
_0220D238:
	ldrb r0, [r4, #4]
	cmp r0, #5
	blo _0220D242
	bl GF_AssertFail
_0220D242:
	ldr r1, [r5]
	ldr r0, _0220D298 ; =0xFFFFFE00
	add r6, r6, #1
	and r0, r1
	ldrb r1, [r4]
	lsl r1, r1, #2
	ldr r2, [r7, r1]
	ldr r1, _0220D29C ; =0x000001FF
	and r1, r2
	orr r1, r0
	ldr r0, _0220D2A0 ; =0xFFFC01FF
	str r1, [r5]
	and r0, r1
	ldrb r1, [r4, #3]
	lsl r1, r1, #2
	add r1, r7, r1
	ldr r1, [r1, #0x14]
	lsl r1, r1, #0x17
	lsr r1, r1, #0xe
	orr r1, r0
	ldr r0, _0220D2A4 ; =0x03FFFFFF
	str r1, [r5]
	and r0, r1
	ldrb r1, [r4, #4]
	lsl r1, r1, #2
	add r1, r7, r1
	ldr r1, [r1, #0x28]
	lsl r1, r1, #0x1a
	orr r1, r0
	ldr r0, _0220D2A8 ; =0xFC03FFFF
	str r1, [r5]
	and r0, r1
	lsl r1, r1, #0xe
	lsr r1, r1, #0x17
	lsl r1, r1, #0x18
	lsr r1, r1, #6
	orr r0, r1
	stmia r5!, {r0}
	cmp r6, #3
	blt _0220D218
	add sp, #0x44
	pop {r4, r5, r6, r7, pc}
	nop
_0220D298: .word 0xFFFFFE00
_0220D29C: .word 0x000001FF
_0220D2A0: .word 0xFFFC01FF
_0220D2A4: .word 0x03FFFFFF
_0220D2A8: .word 0xFC03FFFF
	thumb_func_end ov96_0220D200

	thumb_func_start ov96_0220D2AC
ov96_0220D2AC: ; 0x0220D2AC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r1, #0
	add r5, r0, #0
	add r0, r7, #0
	mov r1, #0x3c
	str r2, [sp]
	mov r4, #0
	bl _u32_div_f
	str r1, [sp, #4]
	add r0, r7, #0
	mov r1, #0x1e
	bl _u32_div_f
	add r6, r1, #0
_0220D2CC:
	ldr r1, [r5]
	lsl r0, r1, #6
	lsl r3, r1, #0xe
	lsr r2, r0, #0x18
	lsr r3, r3, #0x17
	lsl r0, r2, #0x10
	lsl r3, r3, #0x10
	lsr r0, r0, #0x10
	lsr r3, r3, #0x10
	cmp r7, #0
	beq _0220D32A
	cmp r0, r3
	bhs _0220D32A
	ldr r0, [sp]
	cmp r4, r0
	bne _0220D302
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _0220D314
	ldr r0, _0220D338 ; =0xFC03FFFF
	add r2, #8
	and r0, r1
	lsl r1, r2, #0x18
	lsr r1, r1, #6
	orr r0, r1
	str r0, [r5]
	b _0220D314
_0220D302:
	cmp r6, #0
	bne _0220D314
	ldr r0, _0220D338 ; =0xFC03FFFF
	and r0, r1
	add r1, r2, #5
	lsl r1, r1, #0x18
	lsr r1, r1, #6
	orr r0, r1
	str r0, [r5]
_0220D314:
	ldr r1, [r5]
	lsl r0, r1, #6
	lsr r0, r0, #0x18
	cmp r0, r3
	bls _0220D32A
	ldr r0, _0220D338 ; =0xFC03FFFF
	and r0, r1
	lsl r1, r3, #0x18
	lsr r1, r1, #6
	orr r0, r1
	str r0, [r5]
_0220D32A:
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _0220D2CC
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220D338: .word 0xFC03FFFF
	thumb_func_end ov96_0220D2AC

	thumb_func_start ov96_0220D33C
ov96_0220D33C: ; 0x0220D33C
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r4, r0, #0
	cmp r5, #0xa
	blo _0220D34A
	bl GF_AssertFail
_0220D34A:
	ldr r0, _0220D35C ; =0x0221CE5C
	lsl r1, r5, #2
	ldr r0, [r0, r1]
	sub r0, r4, r0
	cmp r0, #0
	bgt _0220D358
	mov r0, #0
_0220D358:
	pop {r3, r4, r5, pc}
	nop
_0220D35C: .word 0x0221CE5C
	thumb_func_end ov96_0220D33C

	thumb_func_start ov96_0220D360
ov96_0220D360: ; 0x0220D360
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r0, #0
	ldr r0, [r5, #0x10]
	cmp r0, #0
	bne _0220D370
	mov r1, #1
	b _0220D374
_0220D370:
	mov r1, #0
	mvn r1, r1
_0220D374:
	mov r0, #0xc
	ldrsb r0, [r5, r0]
	mov r2, #3
	add r4, r0, #0
	mul r4, r1
	add r3, r4, #0
	ldr r0, [r5, #4]
	mov r1, #1
	add r3, #8
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #0
	mov r2, #3
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5]
	bl sub_0200CF6C
	neg r2, r4
	mov r1, #0
	lsl r2, r2, #0xc
	bl sub_02009FA8
	mov r0, #0xd
	ldrsb r0, [r5, r0]
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	cmp r0, #1
	bne _0220D3C2
	mov r0, #0xc
	ldrsb r0, [r5, r0]
	sub r0, r0, #1
	strb r0, [r5, #0xc]
_0220D3C2:
	ldr r0, [r5, #0x10]
	mov r1, #1
	eor r0, r1
	str r0, [r5, #0x10]
	mov r0, #0xd
	ldrsb r2, [r5, r0]
	sub r2, r2, #1
	strb r2, [r5, #0xd]
	ldrsb r0, [r5, r0]
	cmp r0, #0
	bgt _0220D406
	ldr r0, [r5, #4]
	mov r2, #3
	mov r3, #8
	bl sub_0201F238
	mov r1, #0
	ldr r0, [r5, #4]
	mov r2, #3
	add r3, r1, #0
	bl sub_0201F238
	ldr r0, [r5]
	bl sub_0200CF6C
	mov r1, #0
	add r2, r1, #0
	bl sub_02009FA8
	mov r0, #0
	str r0, [r5, #8]
	add r0, r6, #0
	bl sub_0200E390
_0220D406:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220D360

	thumb_func_start ov96_0220D408
ov96_0220D408: ; 0x0220D408
	push {r4, lr}
	add r4, r0, #0
	bne _0220D412
	bl GF_AssertFail
_0220D412:
	ldr r0, [r4, #8]
	cmp r0, #0
	bne _0220D41C
	mov r0, #1
	pop {r4, pc}
_0220D41C:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_0220D408

	thumb_func_start ov96_0220D420
ov96_0220D420: ; 0x0220D420
	str r1, [r0, #4]
	str r2, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220D420

	thumb_func_start ov96_0220D428
ov96_0220D428: ; 0x0220D428
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	add r6, r2, #0
	cmp r0, #0
	bne _0220D43A
	bl GF_AssertFail
_0220D43A:
	ldr r0, [r5]
	cmp r0, #0
	bne _0220D444
	bl GF_AssertFail
_0220D444:
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _0220D44E
	bl sub_0200E390
_0220D44E:
	mov r0, #0
	str r0, [r5, #0x10]
	strb r4, [r5, #0xc]
	ldr r0, _0220D464 ; =ov96_0220D360
	add r1, r5, #0
	mov r2, #2
	strb r6, [r5, #0xd]
	bl sub_0200E320
	str r0, [r5, #8]
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220D464: .word ov96_0220D360
	thumb_func_end ov96_0220D428

	thumb_func_start ov96_0220D468
ov96_0220D468: ; 0x0220D468
	push {r3, r4, r5, lr}
	add r4, r1, #0
	add r5, r0, #0
	ldrh r0, [r4, #0xe]
	cmp r0, #0
	beq _0220D47A
	cmp r0, #1
	beq _0220D4C4
	b _0220D51A
_0220D47A:
	ldrh r0, [r4, #0xc]
	bl _dfltu
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _0220D520 ; =0x33333333
	ldr r1, _0220D524 ; =0x3FD33333
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0220D528 ; =0x3FF00000
	mov r0, #0
	bl _dsub
	bl _d2f
	str r0, [r4, #8]
	ldrh r0, [r4, #0xc]
	cmp r0, #1
	bls _0220D4B0
	mov r0, #0
	strh r0, [r4, #0xc]
	ldrh r0, [r4, #0xe]
	add r0, r0, #1
	strh r0, [r4, #0xe]
	pop {r3, r4, r5, pc}
_0220D4B0:
	mov r1, #0xfe
	ldr r0, [r4]
	ldr r2, [r4, #8]
	lsl r1, r1, #0x16
	bl ov96_021EB10C
	ldrh r0, [r4, #0xc]
	add r0, r0, #1
	strh r0, [r4, #0xc]
	pop {r3, r4, r5, pc}
_0220D4C4:
	ldrh r0, [r4, #0xc]
	bl _dfltu
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _0220D520 ; =0x33333333
	ldr r1, _0220D524 ; =0x3FD33333
	bl _dmul
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0220D528 ; =0x3FF00000
	mov r0, #0
	bl _dadd
	bl _d2f
	str r0, [r4, #8]
	ldrh r0, [r4, #0xc]
	cmp r0, #1
	bls _0220D506
	mov r0, #0
	mov r1, #0xfe
	str r0, [r4, #4]
	lsl r1, r1, #0x16
	ldr r0, [r4]
	add r2, r1, #0
	bl ov96_021EB10C
	add r0, r5, #0
	bl sub_0200E390
	pop {r3, r4, r5, pc}
_0220D506:
	mov r1, #0xfe
	ldr r0, [r4]
	ldr r2, [r4, #8]
	lsl r1, r1, #0x16
	bl ov96_021EB10C
	ldrh r0, [r4, #0xc]
	add r0, r0, #1
	strh r0, [r4, #0xc]
	pop {r3, r4, r5, pc}
_0220D51A:
	bl GF_AssertFail
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220D520: .word 0x33333333
_0220D524: .word 0x3FD33333
_0220D528: .word 0x3FF00000
	thumb_func_end ov96_0220D468

	thumb_func_start ov96_0220D52C
ov96_0220D52C: ; 0x0220D52C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	cmp r0, #0
	beq _0220D53C
	bl sub_0200E390
_0220D53C:
	str r4, [r5]
	mov r2, #0
	strh r2, [r5, #0xc]
	ldr r0, _0220D550 ; =ov96_0220D468
	add r1, r5, #0
	strh r2, [r5, #0xe]
	bl sub_0200E320
	str r0, [r5, #4]
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220D550: .word ov96_0220D468
	thumb_func_end ov96_0220D52C

	thumb_func_start ov96_0220D554
ov96_0220D554: ; 0x0220D554
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r0, #0
	add r7, r1, #0
	bl ov96_021EAA20
	add r5, r0, #0
	bl ov96_021E90FC
	add r4, r0, #0
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r0, r5, #0
	bl ov96_021E8BB0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _0220D58A
	add r0, r6, #0
	mov r1, #1
	mov r5, #0x40
	bl ov96_021EABE0
	b _0220D594
_0220D58A:
	add r0, r6, #0
	mov r1, #2
	mov r5, #0x20
	bl ov96_021EABE0
_0220D594:
	cmp r7, #0
	beq _0220D5B2
	lsr r0, r5, #0x1f
	add r0, r5, r0
	asr r0, r0, #1
	lsl r0, r0, #0xc
	sub r1, r5, r4
	str r0, [sp]
	lsr r0, r1, #0x1f
	add r0, r1, r0
	asr r0, r0, #1
	add r0, r4, r0
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	b _0220D5C2
_0220D5B2:
	lsr r0, r5, #0x1f
	add r0, r5, r0
	asr r0, r0, #1
	lsl r0, r0, #0xc
	str r0, [sp]
	sub r0, r5, #1
	lsl r0, r0, #0xc
	str r0, [sp, #4]
_0220D5C2:
	add r0, r6, #0
	add r1, sp, #0
	bl ov96_021EABF4
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220D554

	thumb_func_start ov96_0220D5D0
ov96_0220D5D0: ; 0x0220D5D0
	push {r3, r4, lr}
	sub sp, #0x34
	add r2, r0, #0
	add r0, sp, #0x20
	str r0, [sp]
	add r0, sp, #0xc
	str r0, [sp, #4]
	add r4, r1, #0
	ldr r0, [r2, #4]
	ldr r1, [r2, #0x1c]
	ldr r2, [r2, #0x20]
	add r3, sp, #0x1c
	bl ov96_021EAF78
	add r0, sp, #0x14
	str r0, [sp]
	add r0, sp, #8
	str r0, [sp, #4]
	ldr r0, [r4, #4]
	ldr r1, [r4, #0x1c]
	ldr r2, [r4, #0x20]
	add r3, sp, #0x10
	bl ov96_021EAF78
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #8]
	add r2, sp, #0x28
	add r0, r1, r0
	lsl r4, r0, #0xc
	mov r0, #0
	str r0, [sp, #0x24]
	str r0, [sp, #0x18]
	add r0, sp, #0x1c
	add r1, sp, #0x10
	bl VEC_Subtract
	add r0, sp, #0x28
	bl VEC_Mag
	cmp r0, r4
	bgt _0220D628
	add sp, #0x34
	mov r0, #1
	pop {r3, r4, pc}
_0220D628:
	mov r0, #0
	add sp, #0x34
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220D5D0

	thumb_func_start ov96_0220D630
ov96_0220D630: ; 0x0220D630
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	add r2, r4, #0
	add r1, #0x45
	add r2, #0x46
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [r4]
	bl ov96_0220F378
	ldrb r0, [r0, #2]
	cmp r0, #0
	beq _0220D67E
	mov r0, #1
	add r1, r4, #0
	add r2, r4, #0
	str r0, [sp]
	add r1, #0x45
	add r2, #0x46
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [r4]
	mov r3, #2
	bl ov96_021E8228
	ldr r0, [r4, #8]
	bl ov96_0220F3B4
	lsl r0, r0, #0x18
	ldr r2, [r4, #0x40]
	mov r1, #0xff
	bic r2, r1
	lsr r0, r0, #0x18
	orr r0, r2
	str r0, [r4, #0x40]
	mov r0, #1
	str r0, [r4, #0xc]
_0220D67E:
	ldr r1, [r4, #0x40]
	ldr r0, _0220D690 ; =0xFFFF00FF
	and r1, r0
	mov r0, #0xa
	lsl r0, r0, #8
	orr r0, r1
	str r0, [r4, #0x40]
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_0220D690: .word 0xFFFF00FF
	thumb_func_end ov96_0220D630

	thumb_func_start ov96_0220D694
ov96_0220D694: ; 0x0220D694
	push {r4, lr}
	add r4, r0, #0
	bne _0220D69E
	bl GF_AssertFail
_0220D69E:
	ldr r1, [r4, #0xc]
	mov r0, #1
	cmp r1, #2
	beq _0220D6AC
	cmp r1, #1
	beq _0220D6AC
	mov r0, #0
_0220D6AC:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220D694

	thumb_func_start ov96_0220D6B0
ov96_0220D6B0: ; 0x0220D6B0
	mov r2, #0
	ldrsh r2, [r1, r2]
	lsl r2, r2, #0xc
	str r2, [r0, #0x10]
	mov r2, #2
	ldrsh r1, [r1, r2]
	lsl r1, r1, #0xc
	str r1, [r0, #0x14]
	mov r1, #2
	ldr r2, [r0, #0x40]
	lsl r1, r1, #0x1a
	orr r1, r2
	str r1, [r0, #0x40]
	bx lr
	thumb_func_end ov96_0220D6B0

	thumb_func_start ov96_0220D6CC
ov96_0220D6CC: ; 0x0220D6CC
	push {r3, r4, r5, lr}
	sub sp, #0x18
	ldr r5, _0220D740 ; =0x0221CF00
	add r3, r0, #0
	ldmia r5!, {r0, r1}
	add r4, sp, #0xc
	add r2, r4, #0
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add r1, sp, #0
	str r0, [r4]
	mov r4, #0
	str r4, [r1]
	str r4, [r1, #4]
	str r4, [r1, #8]
	ldr r0, [r3, #4]
	str r0, [sp]
	ldr r0, [r3]
	str r0, [sp, #8]
	add r0, r2, #0
	str r4, [sp, #4]
	bl sub_02020C64
	mov r2, #2
	lsl r2, r2, #0xc
	cmp r0, r2
	bls _0220D70A
	mov r1, #0xe
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _0220D710
_0220D70A:
	add sp, #0x18
	mov r0, #4
	pop {r3, r4, r5, pc}
_0220D710:
	cmp r0, r2
	bls _0220D722
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	bhs _0220D722
	add sp, #0x18
	mov r0, #2
	pop {r3, r4, r5, pc}
_0220D722:
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _0220D738
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	bhi _0220D738
	add sp, #0x18
	mov r0, #3
	pop {r3, r4, r5, pc}
_0220D738:
	mov r0, #1
	add sp, #0x18
	pop {r3, r4, r5, pc}
	nop
_0220D740: .word 0x0221CF00
	thumb_func_end ov96_0220D6CC

	thumb_func_start ov96_0220D744
ov96_0220D744: ; 0x0220D744
	push {r4, r5, r6, lr}
	sub sp, #0x60
	add r5, r0, #0
	ldr r0, [r5, #0xc]
	cmp r0, #0
	bne _0220D752
	b _0220D8B0
_0220D752:
	add r0, r5, #0
	add r1, r5, #0
	add r0, #0x10
	add r1, #0x1c
	add r2, sp, #0x54
	bl VEC_Subtract
	add r0, sp, #0x54
	bl VEC_Mag
	add r4, r0, #0
	cmp r4, #0
	ble _0220D770
	mov r2, #1
	b _0220D772
_0220D770:
	mov r2, #0
_0220D772:
	ldr r1, [r5, #0x40]
	ldr r0, _0220D8B4 ; =0xEFFFFFFF
	and r1, r0
	lsl r0, r2, #0x1f
	lsr r0, r0, #3
	orr r0, r1
	str r0, [r5, #0x40]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _0220D844
	mov r2, #0
	add r0, sp, #0x24
	str r2, [r0]
	add r1, sp, #0x30
	str r2, [r0, #4]
	str r2, [r1]
	str r2, [r0, #8]
	add r0, r5, #0
	str r2, [r1, #4]
	add r0, #0x34
	str r2, [r1, #8]
	bl VEC_Normalize
	ldr r0, _0220D8B8 ; =0x00000CCD
	add r1, sp, #0x30
	add r2, sp, #0x24
	add r3, sp, #0x18
	bl VEC_MultAdd
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bge _0220D7B4
	neg r0, r0
_0220D7B4:
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	bge _0220D7BE
	neg r0, r0
_0220D7BE:
	str r0, [sp, #0x1c]
	ldr r0, [r5, #0x40]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	beq _0220D806
	ldr r0, [r5, #8]
	mov r1, #0x64
	ldr r0, [r0, #4]
	bl _s32_div_f
	add r6, r0, #0
	add r0, sp, #0x54
	add r1, sp, #0x48
	bl VEC_Normalize
	add r1, r5, #0
	add r0, r6, #0
	add r1, #0x28
	add r2, sp, #0x24
	add r3, sp, #0xc
	bl VEC_MultAdd
	ldr r1, [sp, #0xc]
	cmp r1, #0
	bge _0220D7F2
	neg r1, r1
_0220D7F2:
	ldr r0, [sp, #0x18]
	add r0, r0, r1
	ldr r1, [sp, #0x10]
	str r0, [sp, #0x18]
	cmp r1, #0
	bge _0220D800
	neg r1, r1
_0220D800:
	ldr r0, [sp, #0x1c]
	add r0, r0, r1
	str r0, [sp, #0x1c]
_0220D806:
	add r0, r5, #0
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x1c]
	add r0, #0x34
	bl ov96_0220E960
	add r0, r5, #0
	add r0, #0x1c
	add r1, r5, #0
	add r1, #0x34
	add r2, r0, #0
	bl VEC_Add
	add r3, r5, #0
	add r3, #0x1c
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	add r2, #0x10
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [r5, #0x34]
	cmp r0, #0
	bne _0220D8B0
	ldr r0, [r5, #0x38]
	cmp r0, #0
	bne _0220D8B0
	ldr r1, [r5, #0x40]
	ldr r0, _0220D8BC ; =0xFBFFFFFF
	and r0, r1
	str r0, [r5, #0x40]
_0220D844:
	ldr r0, [r5, #0x40]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _0220D8B0
	add r0, sp, #0x54
	add r1, sp, #0x48
	bl VEC_Normalize
	ldr r0, [r5, #0x40]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	bne _0220D870
	add r0, sp, #0x48
	bl ov96_0220D6CC
	lsl r0, r0, #0x1c
	ldr r2, [r5, #0x40]
	ldr r1, _0220D8C0 ; =0xFF0FFFFF
	lsr r0, r0, #8
	and r1, r2
	orr r0, r1
	str r0, [r5, #0x40]
_0220D870:
	ldr r0, [r5, #8]
	ldr r0, [r0, #8]
	cmp r4, r0
	bgt _0220D886
	add r3, sp, #0x54
	ldmia r3!, {r0, r1}
	add r2, sp, #0x3c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _0220D898
_0220D886:
	add r2, sp, #0
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	add r1, sp, #0x48
	add r3, sp, #0x3c
	bl VEC_MultAdd
_0220D898:
	add r0, r5, #0
	add r0, #0x1c
	add r1, sp, #0x3c
	add r2, r0, #0
	bl VEC_Add
	add r2, sp, #0x48
	ldmia r2!, {r0, r1}
	add r5, #0x28
	stmia r5!, {r0, r1}
	ldr r0, [r2]
	str r0, [r5]
_0220D8B0:
	add sp, #0x60
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220D8B4: .word 0xEFFFFFFF
_0220D8B8: .word 0x00000CCD
_0220D8BC: .word 0xFBFFFFFF
_0220D8C0: .word 0xFF0FFFFF
	thumb_func_end ov96_0220D744

	thumb_func_start ov96_0220D8C4
ov96_0220D8C4: ; 0x0220D8C4
	push {lr}
	sub sp, #0xc
	add r3, sp, #4
	str r3, [sp]
	ldr r0, [r0, #4]
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #8
	bl ov96_021EB06C
	ldr r1, [sp, #8]
	cmp r1, #0
	ble _0220D8EC
	ldr r0, [sp, #4]
	cmp r0, #0
	ble _0220D8EC
	cmp r1, #0xff
	bge _0220D8EC
	cmp r0, #0xff
	blt _0220D8F2
_0220D8EC:
	add sp, #0xc
	mov r0, #1
	pop {pc}
_0220D8F2:
	cmp r1, #8
	blt _0220D902
	cmp r1, #0xf8
	bge _0220D902
	cmp r0, #8
	blt _0220D902
	cmp r0, #0xb4
	blt _0220D908
_0220D902:
	add sp, #0xc
	mov r0, #1
	pop {pc}
_0220D908:
	mov r0, #0
	add sp, #0xc
	pop {pc}
	.balign 4, 0
	thumb_func_end ov96_0220D8C4

	thumb_func_start ov96_0220D910
ov96_0220D910: ; 0x0220D910
	push {r4, r5, r6, lr}
	sub sp, #0x18
	add r5, r0, #0
	ldr r0, [r5, #0x40]
	mov r1, #3
	lsl r0, r0, #0xc
	lsr r0, r0, #0x1c
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r6, #0
	bl _s32_div_f
	lsl r4, r1, #2
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r0, #0
	mov r1, #0xc
	mul r2, r1
	ldr r1, _0220D994 ; =0x0221CFBC
	add r0, sp, #4
	add r1, r1, r2
	ldr r3, _0220D998 ; =0x0221CFBE
	str r0, [sp]
	add r2, r3, r2
	ldrsh r1, [r4, r1]
	ldrsh r2, [r4, r2]
	ldr r0, [r5, #4]
	add r3, sp, #8
	bl ov96_021EB0A4
	ldr r0, [sp, #8]
	add r2, r5, #0
	lsl r0, r0, #0xc
	str r0, [r5, #0x1c]
	ldr r0, [sp, #4]
	add r3, sp, #0xc
	lsl r0, r0, #0xc
	str r0, [r5, #0x20]
	ldr r0, [sp, #8]
	add r2, #0x34
	lsl r0, r0, #0xc
	str r0, [r5, #0x10]
	ldr r0, [sp, #4]
	lsl r0, r0, #0xc
	str r0, [r5, #0x14]
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	str r0, [r3, #8]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [r5, #0x40]
	ldr r0, _0220D99C ; =0xFF0FFFFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x14
	orr r1, r0
	ldr r0, _0220D9A0 ; =0xFBFFFFFF
	and r0, r1
	str r0, [r5, #0x40]
	add sp, #0x18
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220D994: .word 0x0221CFBC
_0220D998: .word 0x0221CFBE
_0220D99C: .word 0xFF0FFFFF
_0220D9A0: .word 0xFBFFFFFF
	thumb_func_end ov96_0220D910

	thumb_func_start ov96_0220D9A4
ov96_0220D9A4: ; 0x0220D9A4
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r2, [r4, #0xc]
	cmp r2, #4
	bhi _0220DA94
	add r2, r2, r2
	add r2, pc
	ldrh r2, [r2, #6]
	lsl r2, r2, #0x10
	asr r2, r2, #0x10
	add pc, r2
_0220D9BC: ; jump table
	.short _0220DA94 - _0220D9BC - 2 ; case 0
	.short _0220DA6A - _0220D9BC - 2 ; case 1
	.short _0220D9F2 - _0220D9BC - 2 ; case 2
	.short _0220D9CE - _0220D9BC - 2 ; case 3
	.short _0220D9C6 - _0220D9BC - 2 ; case 4
_0220D9C6:
	mov r0, #2
	add sp, #4
	str r0, [r4, #0xc]
	pop {r3, r4, pc}
_0220D9CE:
	add r1, r4, #0
	add r1, #0x44
	ldrb r1, [r1]
	sub r2, r1, #1
	add r1, r4, #0
	add r1, #0x44
	strb r2, [r1]
	add r1, r4, #0
	add r1, #0x44
	ldrb r1, [r1]
	cmp r1, #0
	bne _0220DA98
	bl ov96_0220D910
	mov r0, #4
	add sp, #4
	str r0, [r4, #0xc]
	pop {r3, r4, pc}
_0220D9F2:
	bl ov96_0220D744
	ldr r1, [r4, #0x1c]
	ldr r2, [r4, #0x20]
	add r0, r4, #0
	bl ov96_0220D8C4
	cmp r0, #0
	beq _0220DA98
	mov r3, #1
	add r1, r4, #0
	add r2, r4, #0
	str r3, [sp]
	add r1, #0x45
	add r2, #0x46
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [r4]
	bl ov96_021E8228
	mov r0, #1
	add r1, r4, #0
	add r2, r4, #0
	str r0, [sp]
	add r1, #0x45
	add r2, #0x46
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [r4]
	mov r3, #5
	bl ov96_021E8228
	ldr r0, [r4, #0x40]
	lsl r0, r0, #2
	lsr r0, r0, #0x1f
	beq _0220DA52
	mov r0, #1
	add r1, r4, #0
	add r2, r4, #0
	str r0, [sp]
	add r1, #0x45
	add r2, #0x46
	ldrb r1, [r1]
	ldrb r2, [r2]
	ldr r0, [r4]
	mov r3, #8
	bl ov96_021E8228
_0220DA52:
	ldr r1, [r4, #0x40]
	ldr r0, _0220DA9C ; =0xDFFFFFFF
	add sp, #4
	and r0, r1
	str r0, [r4, #0x40]
	add r0, r4, #0
	mov r1, #0x5a
	add r0, #0x44
	strb r1, [r0]
	mov r0, #3
	str r0, [r4, #0xc]
	pop {r3, r4, pc}
_0220DA6A:
	ldr r3, [r4, #0x40]
	mov r2, #0xff
	add r0, r3, #0
	bic r0, r2
	lsl r2, r3, #0x18
	lsr r2, r2, #0x18
	sub r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	orr r0, r2
	str r0, [r4, #0x40]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bne _0220DA8A
	mov r0, #2
	str r0, [r4, #0xc]
_0220DA8A:
	add r0, r4, #0
	bl ov96_0220D744
	add sp, #4
	pop {r3, r4, pc}
_0220DA94:
	bl GF_AssertFail
_0220DA98:
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_0220DA9C: .word 0xDFFFFFFF
	thumb_func_end ov96_0220D9A4

	thumb_func_start ov96_0220DAA0
ov96_0220DAA0: ; 0x0220DAA0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	ldr r3, _0220DB38 ; =0x0221CEF4
	add r5, r0, #0
	mov r0, #0xc
	str r1, [sp, #4]
	str r0, [sp, #0x14]
	str r2, [sp, #8]
	add r2, sp, #0x24
	ldmia r3!, {r0, r1}
	add r4, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r7, #1
	str r0, [r2]
	ldr r0, [sp, #4]
	lsl r7, r7, #0x14
	lsl r0, r0, #0xc
	str r0, [sp, #0x10]
	ldr r0, [sp, #8]
	mov r6, #0
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
_0220DACE:
	ldr r0, [sp, #8]
	str r0, [sp]
	ldr r0, [r5, #4]
	ldr r1, [r5, #0x1c]
	ldr r2, [r5, #0x20]
	ldr r3, [sp, #4]
	bl ov96_021EB0CC
	cmp r0, #0
	beq _0220DB0C
	mov r1, #0
	add r0, sp, #0x18
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r1, [r5, #0x1c]
	ldr r0, [sp, #0x10]
	sub r0, r0, r1
	bpl _0220DAF6
	neg r0, r0
_0220DAF6:
	str r0, [sp, #0x18]
	ldr r1, [r5, #0x20]
	ldr r0, [sp, #0xc]
	sub r0, r0, r1
	bpl _0220DB02
	neg r0, r0
_0220DB02:
	str r0, [sp, #0x1c]
	add r0, sp, #0x18
	bl VEC_Mag
	str r0, [r4]
_0220DB0C:
	add r6, r6, #1
	add r5, #0x48
	add r4, r4, #4
	cmp r6, #3
	blt _0220DACE
	mov r2, #0
	add r1, sp, #0x24
_0220DB1A:
	ldr r0, [r1]
	cmp r0, r7
	bge _0220DB24
	add r7, r0, #0
	str r2, [sp, #0x14]
_0220DB24:
	add r2, r2, #1
	add r1, r1, #4
	cmp r2, #3
	blt _0220DB1A
	ldr r0, [sp, #0x14]
	lsl r0, r0, #0x18
	asr r0, r0, #0x18
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220DB38: .word 0x0221CEF4
	thumb_func_end ov96_0220DAA0

	thumb_func_start ov96_0220DB3C
ov96_0220DB3C: ; 0x0220DB3C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r2, #0
	cmp r1, #0
	beq _0220DB50
	cmp r1, #1
	beq _0220DB7C
	cmp r1, #2
	beq _0220DBA8
	pop {r4, r5, r6, pc}
_0220DB50:
	ldr r0, [r5]
	add r1, r4, #0
	bl sub_0200DCE8
	cmp r4, #0
	bne _0220DB60
	mov r6, #1
	b _0220DB62
_0220DB60:
	mov r6, #0
_0220DB62:
	ldr r0, [r5, #4]
	add r1, r6, #0
	bl sub_0200DCE8
	ldr r0, [r5, #8]
	add r1, r4, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0xc]
	add r1, r6, #0
	bl sub_0200DCE8
	pop {r4, r5, r6, pc}
_0220DB7C:
	cmp r4, #0
	bne _0220DB84
	mov r6, #1
	b _0220DB86
_0220DB84:
	mov r6, #0
_0220DB86:
	ldr r0, [r5]
	add r1, r6, #0
	bl sub_0200DCE8
	ldr r0, [r5, #4]
	add r1, r4, #0
	bl sub_0200DCE8
	ldr r0, [r5, #8]
	add r1, r6, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0xc]
	add r1, r4, #0
	bl sub_0200DCE8
	pop {r4, r5, r6, pc}
_0220DBA8:
	ldr r0, [r5]
	add r1, r4, #0
	bl sub_0200DCE8
	ldr r0, [r5, #4]
	add r1, r4, #0
	bl sub_0200DCE8
	ldr r0, [r5, #8]
	add r1, r4, #0
	bl sub_0200DCE8
	ldr r0, [r5, #0xc]
	add r1, r4, #0
	bl sub_0200DCE8
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220DB3C

	thumb_func_start ov96_0220DBCC
ov96_0220DBCC: ; 0x0220DBCC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	ldr r0, [r5]
	add r2, r4, #0
	bl sub_0200E024
	ldr r0, [r5, #4]
	add r1, r4, #0
	add r2, r4, #0
	bl sub_0200E024
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220DBCC

	thumb_func_start ov96_0220DBE8
ov96_0220DBE8: ; 0x0220DBE8
	push {r3, r4, r5, r6, r7, lr}
	sub r7, r1, #3
	add r5, r0, #0
	add r4, r2, #0
	add r6, r3, #0
	cmp r7, #4
	blt _0220DBFA
	bl GF_AssertFail
_0220DBFA:
	mov r3, #0x1e
	ldr r0, [r5, #0x10]
	add r1, r4, #0
	add r2, r6, #0
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	mov r3, #0x1e
	ldr r0, [r5, #0x14]
	add r1, r4, #0
	add r2, r6, #0
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r5, #0x10]
	add r1, r7, #0
	bl sub_0200DC4C
	ldr r0, [r5, #0x14]
	bl sub_0200DCAC
	ldr r0, [r5, #0x10]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r5, #0x14]
	mov r1, #1
	bl sub_0200DCE8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220DBE8

	thumb_func_start ov96_0220DC38
ov96_0220DC38: ; 0x0220DC38
	push {r4, lr}
	cmp r0, #6
	bhi _0220DC68
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220DC4A: ; jump table
	.short _0220DC68 - _0220DC4A - 2 ; case 0
	.short _0220DC68 - _0220DC4A - 2 ; case 1
	.short _0220DC68 - _0220DC4A - 2 ; case 2
	.short _0220DC58 - _0220DC4A - 2 ; case 3
	.short _0220DC5C - _0220DC4A - 2 ; case 4
	.short _0220DC60 - _0220DC4A - 2 ; case 5
	.short _0220DC64 - _0220DC4A - 2 ; case 6
_0220DC58:
	mov r4, #0
	b _0220DC6C
_0220DC5C:
	mov r4, #0x80
	b _0220DC6C
_0220DC60:
	mov r4, #0
	b _0220DC6C
_0220DC64:
	mov r4, #0xc0
	b _0220DC6C
_0220DC68:
	bl GF_AssertFail
_0220DC6C:
	ldr r0, _0220DC78 ; =0x0000088D
	add r1, r4, #0
	bl sub_02006134
	pop {r4, pc}
	nop
_0220DC78: .word 0x0000088D
	thumb_func_end ov96_0220DC38

	thumb_func_start ov96_0220DC7C
ov96_0220DC7C: ; 0x0220DC7C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r6, r2, #0
	add r4, r0, #0
	add r0, r6, #0
	add r5, r1, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	add r0, r6, #0
	bl ov96_021E5DC4
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #8]
	add r4, r4, #4
_0220DCA0:
	ldrh r1, [r5]
	lsl r0, r1, #0x19
	lsr r2, r0, #0x16
	lsr r0, r2, #0x1f
	add r0, r2, r0
	lsl r1, r1, #0x12
	lsl r0, r0, #0xf
	lsr r1, r1, #0x1d
	asr r0, r0, #0x10
	cmp r1, #2
	bne _0220DCC0
	mov r1, #0x1e
	lsl r1, r1, #4
	add r0, r0, r1
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
_0220DCC0:
	mov r1, #0x12
	lsl r1, r1, #4
	add r7, r0, #0
	cmp r0, r1
	blt _0220DCCE
	mov r6, #1
	b _0220DCD0
_0220DCCE:
	mov r6, #0
_0220DCD0:
	cmp r6, #0
	beq _0220DCDE
	mov r1, #0x12
	lsl r1, r1, #4
	sub r1, r7, r1
	lsl r1, r1, #0x10
	asr r7, r1, #0x10
_0220DCDE:
	ldrh r1, [r5]
	lsl r1, r1, #0x15
	lsr r1, r1, #0x1c
	bl ov96_0220E6DC
	str r0, [sp, #4]
	ldrh r0, [r5]
	lsl r0, r0, #0x12
	lsr r0, r0, #0x1d
	bne _0220DD0E
	add r0, r4, #0
	mov r1, #2
	mov r2, #0
	bl ov96_0220DB3C
	ldr r0, [r4, #0x10]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x14]
	mov r1, #0
	bl sub_0200DCE8
	b _0220DD90
_0220DD0E:
	cmp r0, #3
	blo _0220DD72
	ldr r1, [r4, #0x18]
	lsl r1, r1, #8
	lsr r1, r1, #0x18
	cmp r1, #3
	bhs _0220DD72
	add r0, r4, #0
	mov r1, #2
	mov r2, #0
	bl ov96_0220DB3C
	ldrh r1, [r5]
	add r3, r7, #0
	sub r3, #0x28
	lsl r1, r1, #0x12
	lsl r3, r3, #0x10
	ldr r2, [sp, #4]
	add r0, r4, #0
	lsr r1, r1, #0x1d
	asr r3, r3, #0x10
	bl ov96_0220DBE8
	ldrh r0, [r5]
	lsl r0, r0, #0x10
	lsr r1, r0, #0x1e
	ldr r0, [sp]
	cmp r1, r0
	bne _0220DD62
	ldr r1, [sp, #0xc]
	ldr r0, _0220DE70 ; =0x000006A8
	add r0, r1, r0
	mov r1, #4
	add r2, r1, #0
	bl ov96_0220D428
	ldrh r0, [r5]
	lsl r0, r0, #0x12
	lsr r0, r0, #0x1d
	bl ov96_0220DC38
	b _0220DD6A
_0220DD62:
	ldr r0, [r4, #0x10]
	mov r1, #0
	bl sub_0200DCE8
_0220DD6A:
	ldr r0, _0220DE74 ; =0x000008C4
	bl PlaySE
	b _0220DD90
_0220DD72:
	cmp r0, #1
	bne _0220DD90
	add r0, r4, #0
	add r1, r6, #0
	mov r2, #1
	bl ov96_0220DB3C
	ldr r0, [r4, #0x10]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #0x14]
	mov r1, #0
	bl sub_0200DCE8
_0220DD90:
	ldr r0, [r4, #0x18]
	lsl r1, r0, #8
	lsr r1, r1, #0x18
	bne _0220DDB6
	ldrh r1, [r5]
	lsl r1, r1, #0x12
	lsr r1, r1, #0x1d
	cmp r1, #1
	bne _0220DDB6
	ldr r1, _0220DE78 ; =0xFFFF0000
	and r0, r1
	str r0, [r4, #0x18]
	ldr r1, _0220DE7C ; =0x3F99999A
	add r0, r4, #0
	bl ov96_0220DBCC
	ldr r0, _0220DE80 ; =0x000008C3
	bl PlaySE
_0220DDB6:
	ldrh r0, [r5]
	lsl r0, r0, #0x12
	lsr r1, r0, #0x1d
	ldr r0, _0220DE84 ; =0x0000FFFF
	add r0, r1, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	cmp r0, #1
	bhi _0220DE46
	cmp r6, #0
	beq _0220DDDE
	ldr r0, [sp, #4]
	cmp r0, #0x10
	ble _0220DDDE
	lsl r0, r6, #2
	add r0, r4, r0
	ldr r0, [r0, #8]
	mov r1, #1
	bl sub_0200DC58
_0220DDDE:
	ldr r0, [r4, #0x18]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	bl sub_0201FCAC
	mov r1, #0x12
	bl _s32_div_f
	bl _itof
	ldr r1, _0220DE88 ; =0x45800000
	bl _fdiv
	add r1, r0, #0
	ldr r0, _0220DE7C ; =0x3F99999A
	bl _fadd
	add r1, r0, #0
	ldr r0, [r4, #0x18]
	ldr r2, _0220DE78 ; =0xFFFF0000
	and r2, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	add r0, #0xa
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	orr r0, r2
	str r0, [r4, #0x18]
	add r0, r4, #0
	bl ov96_0220DBCC
	add r2, r7, #0
	lsl r0, r6, #2
	sub r2, #0x28
	add r6, r4, r0
	lsl r2, r2, #0x10
	mov r3, #0x1e
	ldr r0, [r4, r0]
	ldr r1, [sp, #4]
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	mov r3, #0x1e
	ldr r0, [r6, #8]
	ldr r1, [sp, #4]
	add r2, r7, #0
	lsl r3, r3, #0x10
	bl sub_0200DDF4
_0220DE46:
	ldr r1, [r4, #0x18]
	ldr r0, _0220DE8C ; =0xFF00FFFF
	and r0, r1
	ldrh r1, [r5]
	add r5, r5, #2
	lsl r1, r1, #0x12
	lsr r1, r1, #0x1d
	lsl r1, r1, #0x18
	lsr r1, r1, #8
	orr r0, r1
	str r0, [r4, #0x18]
	ldr r0, [sp, #8]
	add r4, #0x1c
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #2
	bge _0220DE6A
	b _0220DCA0
_0220DE6A:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220DE70: .word 0x000006A8
_0220DE74: .word 0x000008C4
_0220DE78: .word 0xFFFF0000
_0220DE7C: .word 0x3F99999A
_0220DE80: .word 0x000008C3
_0220DE84: .word 0x0000FFFF
_0220DE88: .word 0x45800000
_0220DE8C: .word 0xFF00FFFF
	thumb_func_end ov96_0220DC7C

	thumb_func_start ov96_0220DE90
ov96_0220DE90: ; 0x0220DE90
	ldrb r1, [r1]
	ldrb r0, [r0]
	cmp r0, r1
	bne _0220DE9C
	mov r0, #0
	bx lr
_0220DE9C:
	cmp r0, r1
	bhs _0220DEA4
	mov r0, #1
	bx lr
_0220DEA4:
	mov r0, #0
	mvn r0, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220DE90

	thumb_func_start ov96_0220DEAC
ov96_0220DEAC: ; 0x0220DEAC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xa0
	add r5, r0, #0
	str r2, [sp, #8]
	mov r0, #0
	str r1, [sp, #4]
	add r3, sp, #0x40
	add r1, r0, #0
	mov r2, #6
_0220DEBE:
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220DEBE
	ldr r0, [sp, #8]
	bl ov96_021E5DC4
	str r0, [sp, #0x1c]
	add r0, sp, #0x40
	mov r6, #0
	str r0, [sp, #0x14]
	mov r0, #0xff
	add r5, #0x3c
	str r6, [sp, #0x10]
	str r0, [sp, #0x28]
	str r0, [sp, #0x24]
_0220DEDE:
	ldr r0, [sp, #0x1c]
	lsl r1, r6, #0x18
	ldr r0, [r0, #0x20]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r4, r0, #0
	cmp r5, #0
	bne _0220DEF4
	bl GF_AssertFail
_0220DEF4:
	cmp r4, #0
	bne _0220DEFC
	bl GF_AssertFail
_0220DEFC:
	ldr r0, [sp, #4]
	add r3, sp, #0x3c
	add r0, r0, r6
	ldrb r7, [r0, #0x10]
	str r0, [sp, #0xc]
	add r0, sp, #0x38
	str r0, [sp]
	ldr r1, [sp, #0xc]
	add r0, r4, #0
	ldrb r1, [r1, #4]
	add r2, r7, #0
	bl ov96_021EB0A4
	ldr r0, [sp, #0x14]
	strb r7, [r0]
	str r4, [r0, #4]
	ldr r0, [sp, #4]
	ldr r0, [r0, #0x20]
	lsl r0, r0, #0xd
	lsr r0, r0, #0x14
	add r1, r0, #0
	lsr r1, r6
	mov r0, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x18]
	cmp r0, #1
	bne _0220DF68
	ldr r0, [r5, #0x18]
	lsl r0, r0, #0xc
	lsr r0, r0, #0x1f
	bne _0220DF68
	add r0, r4, #0
	mov r1, #1
	bl ov96_0220D554
	mov r0, #1
	ldr r1, [r5, #0x18]
	lsl r0, r0, #0x12
	orr r1, r0
	ldr r0, _0220E1FC ; =0xFFFF00FF
	and r1, r0
	mov r0, #6
	lsl r0, r0, #8
	orr r0, r1
	str r0, [r5, #0x18]
	mov r0, #1
	lsl r0, r0, #0xc
	str r0, [r5, #0x14]
	ldr r0, _0220E200 ; =0x0000089E
	bl PlaySE
	b _0220DFC6
_0220DF68:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bne _0220DFC6
	ldr r0, [r5, #0x18]
	lsl r0, r0, #0xc
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _0220DFC6
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x38]
	lsl r1, r1, #0x10
	lsl r2, r2, #0x10
	mov r3, #0x1e
	ldr r0, [r5]
	asr r1, r1, #0x10
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r5]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r5]
	bl sub_0200DCAC
	add r0, r4, #0
	mov r1, #0
	bl ov96_0220D554
	mov r1, #0xfe
	lsl r1, r1, #0x16
	add r0, r4, #0
	add r2, r1, #0
	bl ov96_021EB10C
	add r0, r4, #0
	mov r1, #1
	bl ov96_021EAB38
	ldr r1, [r5, #0x18]
	ldr r0, _0220E204 ; =0xFFFBFFFF
	and r0, r1
	str r0, [r5, #0x18]
	ldr r0, _0220E208 ; =0x000008B6
	bl PlaySE
_0220DFC6:
	ldr r2, [r5, #0x18]
	ldr r1, _0220E20C ; =0xFFF7FFFF
	add r0, r5, #0
	and r1, r2
	ldr r2, [sp, #0x18]
	add r0, #0x18
	lsl r2, r2, #0x1f
	lsr r2, r2, #0xc
	orr r1, r2
	str r1, [r5, #0x18]
	lsl r1, r1, #0xd
	lsr r1, r1, #0x1f
	beq _0220E058
	ldr r1, [r0]
	ldr r2, _0220E1FC ; =0xFFFF00FF
	and r2, r1
	lsl r1, r1, #0x10
	lsr r1, r1, #0x18
	sub r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x10
	orr r1, r2
	str r1, [r0]
	ldr r0, [r5, #0x18]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x18
	bne _0220E006
	add r0, r4, #0
	mov r1, #0
	bl ov96_021EAB38
	b _0220E1B4
_0220E006:
	ldr r1, [r5, #0x14]
	ldr r0, _0220E210 ; =0x0000019A
	sub r0, r1, r0
	str r0, [r5, #0x14]
	bl _itof
	ldr r1, _0220E214 ; =0x45800000
	bl _fdiv
	add r1, r0, #0
	add r0, r4, #0
	add r2, r1, #0
	bl ov96_021EB10C
	add r0, sp, #0x30
	str r0, [sp]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0xc]
	ldrb r1, [r1, #4]
	ldrb r2, [r2, #0x10]
	add r0, r4, #0
	add r3, sp, #0x34
	bl ov96_021EB06C
	ldr r0, [sp, #0x30]
	cmp r0, #0xb4
	bge _0220E03E
	b _0220E1B4
_0220E03E:
	ldr r0, [r5, #0x18]
	mov r3, #1
	lsl r0, r0, #0x10
	lsr r1, r0, #0x18
	mov r0, #6
	sub r0, r0, r1
	lsl r2, r0, #2
	ldr r1, [sp, #0x3c]
	add r0, r4, #0
	add r2, r7, r2
	bl ov96_021EB01C
	b _0220E1B4
_0220E058:
	ldr r0, [sp, #4]
	ldr r2, [sp, #0x38]
	ldr r0, [r0, #0x1c]
	mov r3, #1
	lsl r0, r0, #8
	lsr r1, r0, #8
	ldr r0, [sp, #0x10]
	lsr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r1, [sp, #0x3c]
	add r0, r4, #0
	bl ov96_021EB01C
	add r0, r4, #0
	add r1, r7, #1
	bl ov96_021EAC0C
	ldr r0, [sp, #4]
	ldr r0, [r0, #0x20]
	lsl r0, r0, #1
	lsr r0, r0, #0x14
	add r1, r0, #0
	lsr r1, r6
	mov r0, #1
	tst r0, r1
	beq _0220E10C
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x20]
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	ldr r1, [sp, #0x20]
	lsl r2, r2, #0x18
	lsl r1, r1, #0x18
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_0220F378
	add r7, r0, #0
	ldr r0, [sp, #8]
	bl ov96_021E5F24
	ldr r1, [sp, #0x20]
	cmp r1, r0
	bne _0220E0E6
	ldr r0, [r5, #0x18]
	lsl r1, r0, #0xf
	lsr r1, r1, #0x1f
	bne _0220E0E6
	lsl r0, r0, #0xe
	lsr r0, r0, #0x1f
	bne _0220E0E6
	ldrb r0, [r7, #2]
	cmp r0, #0
	bne _0220E0E0
	ldr r0, _0220E218 ; =0x000005F3
	bl PlaySE
	b _0220E0E6
_0220E0E0:
	ldr r0, _0220E21C ; =0x000008C5
	bl PlaySE
_0220E0E6:
	ldrb r0, [r7, #2]
	cmp r0, #0
	bne _0220E100
	add r0, r5, #4
	add r1, r4, #0
	bl ov96_0220D52C
	mov r0, #2
	ldr r1, [r5, #0x18]
	lsl r0, r0, #0x10
	orr r0, r1
	str r0, [r5, #0x18]
	b _0220E114
_0220E100:
	mov r0, #1
	ldr r1, [r5, #0x18]
	lsl r0, r0, #0x10
	orr r0, r1
	str r0, [r5, #0x18]
	b _0220E114
_0220E10C:
	ldr r1, [r5, #0x18]
	ldr r0, _0220E220 ; =0xFFFDFFFF
	and r0, r1
	str r0, [r5, #0x18]
_0220E114:
	ldr r0, [r5, #0x18]
	lsl r0, r0, #0xf
	lsr r0, r0, #0x1f
	beq _0220E1B4
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	lsl r1, r7, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_0220F378
	ldr r1, [r5, #0x18]
	add r2, sp, #0x2c
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r7, r0, #0
	bl ov96_0220E8C0
	add r3, r0, #0
	ldr r2, [sp, #0x38]
	ldr r1, [sp, #0x3c]
	add r2, r2, r3
	add r0, r4, #0
	mov r3, #0
	bl ov96_021EB01C
	ldr r1, [sp, #0x2c]
	add r0, r4, #0
	add r2, r1, #0
	bl ov96_021EB10C
	add r0, r7, #0
	bl ov96_0220F3B4
	ldr r7, [r5, #0x18]
	add r3, r0, #0
	add r2, r5, #0
	ldr r0, [sp, #0x24]
	add r1, r7, #0
	bic r1, r0
	lsl r0, r7, #0x18
	lsr r0, r0, #0x18
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	orr r0, r1
	str r0, [r5, #0x18]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	add r2, #0x18
	cmp r0, r3
	bls _0220E1B4
	ldr r1, [r2]
	ldr r0, _0220E224 ; =0xFFFEFFFF
	mov r3, #0
	and r1, r0
	ldr r0, [sp, #0x28]
	bic r1, r0
	str r1, [r2]
	ldr r1, [sp, #0x3c]
	ldr r2, [sp, #0x38]
	add r0, r4, #0
	bl ov96_021EB01C
	mov r1, #0xfe
	lsl r1, r1, #0x16
	add r0, r4, #0
	add r2, r1, #0
	bl ov96_021EB10C
_0220E1B4:
	ldr r0, [sp, #0x14]
	add r6, r6, #1
	add r0, #8
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	add r5, #0x1c
	add r0, r0, #2
	str r0, [sp, #0x10]
	cmp r6, #0xc
	bge _0220E1CA
	b _0220DEDE
_0220E1CA:
	mov r0, #0
	str r0, [sp]
	ldr r3, _0220E228 ; =ov96_0220DE90
	add r0, sp, #0x40
	mov r1, #0xc
	mov r2, #8
	bl sub_020E3A84
	mov r5, #0
	add r4, sp, #0x40
_0220E1DE:
	ldr r0, [r4, #4]
	cmp r0, #0
	bne _0220E1E8
	bl GF_AssertFail
_0220E1E8:
	ldr r0, [r4, #4]
	add r1, r5, #7
	bl ov96_021EABA8
	add r5, r5, #1
	add r4, #8
	cmp r5, #0xc
	blt _0220E1DE
	add sp, #0xa0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220E1FC: .word 0xFFFF00FF
_0220E200: .word 0x0000089E
_0220E204: .word 0xFFFBFFFF
_0220E208: .word 0x000008B6
_0220E20C: .word 0xFFF7FFFF
_0220E210: .word 0x0000019A
_0220E214: .word 0x45800000
_0220E218: .word 0x000005F3
_0220E21C: .word 0x000008C5
_0220E220: .word 0xFFFDFFFF
_0220E224: .word 0xFFFEFFFF
_0220E228: .word ov96_0220DE90
	thumb_func_end ov96_0220DEAC

	thumb_func_start ov96_0220E22C
ov96_0220E22C: ; 0x0220E22C
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r6, r0, #0
	add r5, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, _0220E2A0 ; =0x000006A4
	ldr r1, [r4, #8]
	ldr r2, [r4]
	add r0, r4, r0
	bl ov96_0220EFD0
	ldrb r0, [r5]
	cmp r0, #0
	beq _0220E256
	cmp r0, #1
	beq _0220E272
	cmp r0, #2
	beq _0220E282
	b _0220E296
_0220E256:
	mov r0, #6
	mov r1, #1
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4]
	ldr r3, _0220E2A4 ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
_0220E272:
	bl sub_0200FB5C
	cmp r0, #0
	beq _0220E29A
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	b _0220E29A
_0220E282:
	add r0, r6, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _0220E29A
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _0220E29A
_0220E296:
	bl GF_AssertFail
_0220E29A:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_0220E2A0: .word 0x000006A4
_0220E2A4: .word 0x00007FFF
	thumb_func_end ov96_0220E22C

	thumb_func_start ov96_0220E2A8
ov96_0220E2A8: ; 0x0220E2A8
	push {r3, r4, r5, lr}
	add r4, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r0, r4, #0
	bl ov96_021E5DC4
	add r0, #0xc4
	ldr r0, [r0]
	bl ov96_022104C4
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E8318
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_0220E9A0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0220E2A8

	thumb_func_start ov96_0220E2DC
ov96_0220E2DC: ; 0x0220E2DC
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r6, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, _0220E38C ; =0x000006A4
	ldr r1, [r4, #8]
	ldr r2, [r4]
	add r0, r4, r0
	bl ov96_0220EFD0
	ldrb r0, [r6]
	cmp r0, #0
	beq _0220E302
	cmp r0, #1
	beq _0220E31A
	b _0220E382
_0220E302:
	add r0, r5, #0
	bl ov96_0220F03C
	add r0, r5, #0
	bl ov96_0220F1CC
	cmp r0, #0
	beq _0220E386
	ldrb r0, [r6]
	add r0, r0, #1
	strb r0, [r6]
	b _0220E386
_0220E31A:
	add r0, r5, #0
	bl ov96_0220F03C
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r2, r0, #0
	ldr r1, [r2, #0x1c]
	ldr r2, [r2, #0x20]
	add r0, r4, #0
	lsl r2, r2, #0x19
	add r0, #0xc4
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x19
	lsl r1, r1, #0x18
	lsl r2, r2, #0x10
	ldr r0, [r0]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_02210324
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _0220E386
	ldr r0, _0220E390 ; =0x000006A8
	add r0, r4, r0
	bl ov96_0220D408
	cmp r0, #0
	beq _0220E386
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
	b _0220E386
_0220E382:
	bl GF_AssertFail
_0220E386:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_0220E38C: .word 0x000006A4
_0220E390: .word 0x000006A8
	thumb_func_end ov96_0220E2DC

	thumb_func_start ov96_0220E394
ov96_0220E394: ; 0x0220E394
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	ldrb r0, [r4]
	cmp r0, #0
	bne _0220E3E6
	bl sub_0200FB5C
	cmp r0, #0
	beq _0220E3EA
	add r0, r6, #0
	bl ov96_021E5F24
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5DC4
	cmp r4, #0
	bne _0220E3E2
	mov r1, #0x8f
	lsl r1, r1, #2
	mov r4, #0
	add r5, r0, r1
_0220E3C6:
	ldr r2, [r5]
	lsl r1, r4, #0x18
	lsl r2, r2, #0xe
	lsr r2, r2, #0x10
	lsl r2, r2, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, #0xe4
	cmp r4, #4
	blt _0220E3C6
_0220E3E2:
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220E3E6:
	bl GF_AssertFail
_0220E3EA:
	mov r0, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220E394

	thumb_func_start ov96_0220E3F0
ov96_0220E3F0: ; 0x0220E3F0
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5DD4
	cmp r0, #3
	bls _0220E408
	b _0220E5C6
_0220E408:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220E414: ; jump table
	.short _0220E41C - _0220E414 - 2 ; case 0
	.short _0220E488 - _0220E414 - 2 ; case 1
	.short _0220E4C4 - _0220E414 - 2 ; case 2
	.short _0220E4F6 - _0220E414 - 2 ; case 3
_0220E41C:
	mov r2, #6
	mov r0, #0x5c
	mov r1, #0x8e
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _0220E5D0 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _0220E5D4 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_0220E868
	ldr r0, _0220E5D8 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r1, _0220E5DC ; =0x000006BC
	add r0, r5, #0
	bl ov96_021E5D94
	ldr r2, _0220E5DC ; =0x000006BC
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x8e
	str r0, [r4]
	ldr r1, _0220E5E0 ; =0x00000708
	ldr r0, _0220E5E4 ; =0x0000050C
	str r5, [r4, #4]
	str r1, [r4, r0]
	add r0, r5, #0
	bl ov96_021E5DEC
	b _0220E5CA
_0220E488:
	ldr r0, [r4]
	bl sub_0201AC88
	str r0, [r4, #8]
	add r0, r5, #0
	mov r1, #4
	bl ov96_021E6670
	add r0, r4, #0
	bl ov96_0220ED9C
	add r0, r4, #0
	bl ov96_0220EE8C
	add r0, r4, #0
	bl ov96_0221022C
	mov r0, #2
	bl sub_0203A994
	add r0, r4, #0
	bl ov96_0220EA08
	add r0, r4, #0
	bl ov96_0220F3FC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _0220E5CA
_0220E4C4:
	ldr r0, [r4, #0x20]
	bl ov96_021EAA00
	cmp r0, #0
	beq _0220E5CA
	add r0, r4, #0
	bl ov96_0220EB3C
	ldr r0, [r4, #0x10]
	bl sub_0200E2B0
	add r3, r0, #0
	ldr r2, [r4, #0x1c]
	add r0, r5, #0
	mov r1, #0
	bl ov96_021E61D8
	ldr r0, [r0]
	mov r1, #0
	bl sub_02024ADC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _0220E5CA
_0220E4F6:
	add r0, r5, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [r4, #0x14]
	str r0, [sp]
	str r1, [sp, #4]
	ldr r0, [r4]
	str r0, [sp, #8]
	str r5, [sp, #0xc]
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x10]
	ldr r2, [r4, #8]
	ldr r3, [r4, #0x18]
	bl ov96_02210240
	add r1, r4, #0
	add r1, #0xc4
	str r0, [r1]
	add r3, r4, #0
	mov r0, #0x51
	add r3, #0xc4
	lsl r0, r0, #4
	ldr r1, [r4, #0xc]
	ldr r2, [r4, #0x10]
	ldr r3, [r3]
	add r0, r4, r0
	bl ov96_0221007C
	ldr r1, [r4]
	add r0, r5, #0
	bl ov96_022107F0
	add r1, r4, #0
	add r1, #0xc8
	str r0, [r1]
	add r0, r5, #0
	bl ov96_021E64B8
	ldr r0, _0220E5E8 ; =0x000006A8
	ldr r1, [r4, #8]
	ldr r2, [r4, #0xc]
	add r0, r4, r0
	bl ov96_0220D420
	ldr r0, [r4, #8]
	bl ov96_021E6030
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, r4, #0
	bl ov96_0220F4A0
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _0220E5A2
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r6, r0, #0
	ldr r0, _0220E5E4 ; =0x0000050C
	mov r1, #0x1e
	ldr r0, [r4, r0]
	add r0, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x1a
	ldr r2, [r6, #0x1c]
	ldr r1, _0220E5EC ; =0xC0FFFFFF
	lsr r0, r0, #2
	and r1, r2
	orr r0, r1
	str r0, [r6, #0x1c]
	add r0, r4, #0
	add r0, #0xcc
	add r1, r5, #0
	bl ov96_0220FA18
_0220E5A2:
	ldr r0, _0220E5F0 ; =0x000004EC
	mov r1, #0x57
	lsl r1, r1, #2
	add r0, r4, r0
	add r1, r4, r1
	bl ov96_0220FF64
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	add sp, #0x10
	mov r0, #1
	pop {r4, r5, r6, pc}
_0220E5C6:
	bl GF_AssertFail
_0220E5CA:
	mov r0, #0
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220E5D0: .word 0xFFFFE0FF
_0220E5D4: .word 0x04001000
_0220E5D8: .word gMain + 0x60
_0220E5DC: .word 0x000006BC
_0220E5E0: .word 0x00000708
_0220E5E4: .word 0x0000050C
_0220E5E8: .word 0x000006A8
_0220E5EC: .word 0xC0FFFFFF
_0220E5F0: .word 0x000004EC
	thumb_func_end ov96_0220E3F0

	thumb_func_start ov96_0220E5F4
ov96_0220E5F4: ; 0x0220E5F4
	push {r4, lr}
	bl ov96_021E5DC4
	add r4, r0, #0
	bne _0220E602
	bl GF_AssertFail
_0220E602:
	ldr r0, [r4, #0x10]
	bl sub_0200D020
	mov r0, #1
	pop {r4, pc}
	thumb_func_end ov96_0220E5F4

	thumb_func_start ov96_0220E60C
ov96_0220E60C: ; 0x0220E60C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_0220E620:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _0220E66C ; =0x00000127
	add r1, r6, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _0220E620
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #4
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #4
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_0220E66C: .word 0x00000127
	thumb_func_end ov96_0220E60C

	thumb_func_start ov96_0220E670
ov96_0220E670: ; 0x0220E670
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E6550
	add r0, r4, #0
	add r0, #0xc8
	ldr r0, [r0]
	bl ov96_02210850
	add r0, r4, #0
	add r0, #0xc4
	ldr r0, [r0]
	bl ov96_022102D4
	mov r0, #0x51
	lsl r0, r0, #4
	add r0, r4, r0
	bl ov96_022101D0
	add r0, r4, #0
	bl ov96_0220EAA4
	add r0, r4, #0
	bl ov96_0220EE4C
	bl sub_0203A914
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _0220E6D8 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #0x8e
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0220E6D8: .word gMain + 0x60
	thumb_func_end ov96_0220E670

	thumb_func_start ov96_0220E6DC
ov96_0220E6DC: ; 0x0220E6DC
	push {r3, r4, r5, lr}
	add r5, r0, #0
	sub r0, r1, #7
	add r1, r5, #0
	mul r1, r0
	mov r0, #0x26
	mul r0, r1
	mov r1, #0xfa
	lsl r1, r1, #2
	bl _s32_div_f
	add r0, #0x80
	lsl r0, r0, #0x10
	asr r4, r0, #0x10
	lsl r0, r5, #0x11
	lsr r0, r0, #0x10
	bl sub_0201FCAC
	lsl r0, r0, #6
	asr r0, r0, #0x10
	add r0, r4, r0
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220E6DC

	thumb_func_start ov96_0220E70C
ov96_0220E70C: ; 0x0220E70C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	cmp r5, #0
	bne _0220E71C
	bl GF_AssertFail
_0220E71C:
	cmp r4, #4
	blo _0220E724
	bl GF_AssertFail
_0220E724:
	cmp r6, #3
	blo _0220E72C
	bl GF_AssertFail
_0220E72C:
	mov r2, #0xe4
	add r1, r4, #0
	mul r1, r2
	add r3, r5, r1
	mov r1, #0x48
	mul r1, r6
	add r1, r3, r1
	add r2, #0x8c
	ldr r1, [r1, r2]
	mov r0, #1
	cmp r1, #2
	beq _0220E74A
	cmp r1, #1
	beq _0220E74A
	mov r0, #0
_0220E74A:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220E70C

	thumb_func_start ov96_0220E74C
ov96_0220E74C: ; 0x0220E74C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	cmp r5, #0
	bne _0220E75A
	bl GF_AssertFail
_0220E75A:
	cmp r4, #2
	blo _0220E762
	bl GF_AssertFail
_0220E762:
	mov r0, #0x4f
	lsl r0, r0, #4
	add r1, r5, r0
	mov r0, #0xc
	mul r0, r4
	add r0, r1, r0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220E74C

	thumb_func_start ov96_0220E770
ov96_0220E770: ; 0x0220E770
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	add r7, r3, #0
	cmp r5, #0
	bne _0220E782
	bl GF_AssertFail
_0220E782:
	cmp r4, #4
	blo _0220E78A
	bl GF_AssertFail
_0220E78A:
	cmp r6, #3
	blo _0220E792
	bl GF_AssertFail
_0220E792:
	mov r0, #0x59
	lsl r0, r0, #2
	add r1, r5, r0
	mov r0, #0xe4
	mul r0, r4
	add r1, r1, r0
	mov r0, #0x48
	mul r0, r6
	add r1, r1, r0
	ldr r0, [r1, #0x1c]
	asr r0, r0, #0xc
	strh r0, [r7]
	ldr r0, [r1, #0x20]
	asr r0, r0, #0xc
	strh r0, [r7, #2]
	ldr r0, [r1, #4]
	bl ov96_021EAF8C
	ldr r1, [sp, #0x18]
	str r0, [r1]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220E770

	thumb_func_start ov96_0220E7BC
ov96_0220E7BC: ; 0x0220E7BC
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r5, r1, #0
	mov r4, #0
	cmp r6, #0
	bne _0220E7CC
	bl GF_AssertFail
_0220E7CC:
	add r0, r6, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	bne _0220E7DA
	bl GF_AssertFail
_0220E7DA:
	mov r1, #0xe4
	mul r1, r5
	mov r2, #0x8f
	add r1, r6, r1
	lsl r2, r2, #2
	ldr r1, [r1, r2]
	mov r0, #0
	lsl r1, r1, #0xe
	lsr r1, r1, #0x10
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	add r2, r6, r2
_0220E7F2:
	ldr r3, [r2]
	lsl r3, r3, #0xe
	lsr r3, r3, #0x10
	lsl r3, r3, #0x10
	lsr r3, r3, #0x10
	cmp r0, r5
	beq _0220E80A
	cmp r1, r3
	bhs _0220E80A
	add r3, r4, #1
	lsl r3, r3, #0x18
	lsr r4, r3, #0x18
_0220E80A:
	add r0, r0, #1
	add r2, #0xe4
	cmp r0, #4
	blt _0220E7F2
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220E7BC

	thumb_func_start ov96_0220E818
ov96_0220E818: ; 0x0220E818
	push {r4, lr}
	mov r4, #0x59
	lsl r4, r4, #2
	add r4, r0, r4
	mov r0, #0xe4
	mul r0, r2
	add r2, r4, r0
	mov r0, #0x48
	mul r0, r3
	add r0, r2, r0
	bl ov96_0220D6B0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220E818

	thumb_func_start ov96_0220E834
ov96_0220E834: ; 0x0220E834
	mov r3, #0x59
	lsl r3, r3, #2
	add r3, r0, r3
	mov r0, #0xe4
	mul r0, r1
	add r1, r3, r0
	mov r0, #0x48
	mul r0, r2
	ldr r3, _0220E84C ; =ov96_0220D630
	add r0, r1, r0
	bx r3
	nop
_0220E84C: .word ov96_0220D630
	thumb_func_end ov96_0220E834

	thumb_func_start ov96_0220E850
ov96_0220E850: ; 0x0220E850
	mov r2, #0xe4
	mul r2, r1
	add r1, r0, r2
	mov r0, #0x8f
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r0, r0, #0xe
	lsr r0, r0, #0x10
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220E850

	thumb_func_start ov96_0220E868
ov96_0220E868: ; 0x0220E868
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _0220E884 ; =0x0221CF94
	add r3, sp, #0
	mov r2, #5
_0220E872:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220E872
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_0220E884: .word 0x0221CF94
	thumb_func_end ov96_0220E868

	thumb_func_start ov96_0220E888
ov96_0220E888: ; 0x0220E888
	add r1, r0, #0
	mul r1, r0
	add r0, r1, #0
	bx lr
	thumb_func_end ov96_0220E888

	thumb_func_start ov96_0220E890
ov96_0220E890: ; 0x0220E890
	ldr r2, [r0]
	cmp r2, #0
	beq _0220E8BC
	bge _0220E89C
	neg r3, r2
	b _0220E89E
_0220E89C:
	add r3, r2, #0
_0220E89E:
	cmp r3, r1
	bge _0220E8A8
	mov r1, #0
	str r1, [r0]
	bx lr
_0220E8A8:
	cmp r2, #0
	ble _0220E8B0
	mov r2, #1
	b _0220E8B4
_0220E8B0:
	mov r2, #0
	mvn r2, r2
_0220E8B4:
	ldr r3, [r0]
	mul r2, r1
	sub r1, r3, r2
	str r1, [r0]
_0220E8BC:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220E890

	thumb_func_start ov96_0220E8C0
ov96_0220E8C0: ; 0x0220E8C0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	mov r7, #0xfe
	add r5, r0, #0
	add r4, r1, #0
	str r2, [sp]
	mov r6, #0
	lsl r7, r7, #0x16
	cmp r5, #0
	bne _0220E8D8
	bl GF_AssertFail
_0220E8D8:
	ldrb r0, [r5]
	str r0, [sp, #4]
	sub r0, r4, r0
	bl ov96_0220E888
	add r4, r0, #0
	ldr r0, [sp, #4]
	bl ov96_0220E888
	sub r4, r4, r0
	beq _0220E94E
	ldrb r0, [r5, #1]
	cmp r0, #0
	beq _0220E906
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220E914
_0220E906:
	lsl r0, r0, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220E914:
	bl _ftoi
	cmp r0, #0
	beq _0220E94E
	mov r1, #0xa
	bl _s32_div_f
	add r6, r0, #0
	ldr r0, _0220E958 ; =0xFFFE8000
	mul r6, r4
	cmp r6, r0
	bgt _0220E92E
	add r6, r0, #0
_0220E92E:
	mov r0, #1
	lsl r0, r0, #0xe
	sub r0, r6, r0
	mov r1, #0x64
	bl _s32_div_f
	bl _itof
	ldr r1, _0220E95C ; =0x45800000
	bl _fdiv
	add r1, r0, #0
	add r0, r7, #0
	bl _fsub
	add r7, r0, #0
_0220E94E:
	ldr r0, [sp]
	str r7, [r0]
	asr r0, r6, #0xc
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220E958: .word 0xFFFE8000
_0220E95C: .word 0x45800000
	thumb_func_end ov96_0220E8C0

	thumb_func_start ov96_0220E960
ov96_0220E960: ; 0x0220E960
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r2, #0
	bl ov96_0220E890
	add r0, r5, #4
	add r1, r4, #0
	bl ov96_0220E890
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0220E960

	thumb_func_start ov96_0220E974
ov96_0220E974: ; 0x0220E974
	ldr r2, [r0]
	neg r3, r1
	cmp r2, #0
	ble _0220E984
	cmp r2, r1
	ble _0220E98A
	str r1, [r0]
	b _0220E98A
_0220E984:
	cmp r2, r3
	bge _0220E98A
	str r3, [r0]
_0220E98A:
	ldr r2, [r0, #4]
	cmp r2, #0
	ble _0220E998
	cmp r2, r1
	ble _0220E99E
	str r1, [r0, #4]
	bx lr
_0220E998:
	cmp r2, r3
	bge _0220E99E
	str r3, [r0, #4]
_0220E99E:
	bx lr
	thumb_func_end ov96_0220E974

	thumb_func_start ov96_0220E9A0
ov96_0220E9A0: ; 0x0220E9A0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r5, [r4, #0x14]
	ldr r6, [r4, #0x18]
	add r0, #0x24
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r1, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	add r0, r5, #0
	add r2, r7, #0
	mov r3, #3
	bl BufferIntegerAsString
	ldr r3, [r4]
	add r0, r5, #0
	add r1, r6, #0
	mov r2, #0xa0
	bl ReadMsgData_ExpandPlaceholders
	add r5, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _0220EA04 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0x24
	add r2, r5, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add r4, #0x24
	add r0, r4, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220EA04: .word 0x000F0E00
	thumb_func_end ov96_0220E9A0

	thumb_func_start ov96_0220EA08
ov96_0220EA08: ; 0x0220EA08
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _0220EA94 ; =0x0221CF40
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _0220EA98 ; =0x0221CF74
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _0220EA9C ; =0x0221CF2C
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r4]
	bl sub_0200CF18
	str r0, [r4, #0xc]
	bl sub_0200CF38
	str r0, [r4, #0x10]
	ldr r0, [r4, #0xc]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x10]
	mov r2, #0x80
	bl sub_0200CFF4
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x10]
	add r2, sp, #0x34
	bl sub_0200D3F8
	ldr r0, [r4, #0xc]
	bl sub_0200CF6C
	mov r2, #0x1e
	mov r1, #0
	lsl r2, r2, #0x10
	bl sub_02009FC8
	ldr r0, [r4]
	ldr r1, _0220EAA0 ; =0x00000AA7
	mov r2, #1
	bl ov96_021E9A78
	str r0, [r4, #0x1c]
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_0220EA94: .word 0x0221CF40
_0220EA98: .word 0x0221CF74
_0220EA9C: .word 0x0221CF2C
_0220EAA0: .word 0x00000AA7
	thumb_func_end ov96_0220EA08

	thumb_func_start ov96_0220EAA4
ov96_0220EAA4: ; 0x0220EAA4
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x20]
	bl ov96_021EA894
	ldr r0, [r4, #0x1c]
	bl ov96_021E9C0C
	ldr r0, [r4, #0xc]
	ldr r1, [r4, #0x10]
	bl sub_0200D998
	ldr r0, [r4, #0xc]
	bl sub_0200D108
	pop {r4, pc}
	thumb_func_end ov96_0220EAA4

	thumb_func_start ov96_0220EAC4
ov96_0220EAC4: ; 0x0220EAC4
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	str r0, [sp]
	ldr r0, [r0, #0x20]
	mov r1, #1
	bl ov96_021EB144
	ldr r0, [sp]
	add r0, #0xc4
	ldr r0, [r0]
	bl ov96_0221031C
	mov r4, #0
	ldr r5, [sp]
	ldr r6, _0220EB34 ; =0x0000054C
	add r7, r4, #0
_0220EAE4:
	ldr r0, [r5, r6]
	add r1, r7, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, #0x1c
	cmp r4, #0xc
	blt _0220EAE4
	mov r0, #0
	str r0, [sp, #4]
	ldr r1, _0220EB38 ; =0x00000514
	ldr r0, [sp]
	mov r6, #0
	add r0, r0, r1
	str r0, [sp, #8]
	add r7, r6, #0
_0220EB04:
	ldr r5, [sp, #8]
	mov r4, #0
_0220EB08:
	ldr r0, [r5]
	add r1, r6, #0
	bl sub_0200DC78
	ldr r0, [r5, #8]
	add r1, r7, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _0220EB08
	ldr r0, [sp, #8]
	add r0, #0x1c
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #2
	blt _0220EB04
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220EB34: .word 0x0000054C
_0220EB38: .word 0x00000514
	thumb_func_end ov96_0220EAC4

	thumb_func_start ov96_0220EB3C
ov96_0220EB3C: ; 0x0220EB3C
	push {r4, r5, r6, lr}
	sub sp, #0x10
	ldr r4, [r0, #0xc]
	ldr r5, [r0, #0x10]
	cmp r4, #0
	bne _0220EB4C
	bl GF_AssertFail
_0220EB4C:
	cmp r5, #0
	bne _0220EB54
	bl GF_AssertFail
_0220EB54:
	mov r6, #1
	str r6, [sp]
	ldr r0, _0220EC94 ; =0x00002710
	str r6, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x16
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, _0220EC94 ; =0x00002710
	str r6, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x13
	bl sub_0200D564
	add r0, r6, #0
	str r0, [sp]
	ldr r0, _0220EC94 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x15
	bl sub_0200D6D4
	add r0, r6, #0
	str r0, [sp]
	ldr r0, _0220EC94 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x14
	bl sub_0200D704
	mov r0, #1
	str r0, [sp]
	mov r6, #2
	ldr r0, _0220EC98 ; =0x00002711
	str r6, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x1a
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, _0220EC98 ; =0x00002711
	str r6, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x17
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	ldr r0, _0220EC98 ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x19
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _0220EC98 ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x18
	bl sub_0200D704
	mov r6, #1
	str r6, [sp]
	ldr r0, _0220EC9C ; =0x00002712
	str r6, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x12
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	add r0, r6, #0
	str r0, [sp, #4]
	ldr r0, _0220EC9C ; =0x00002712
	str r6, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0xf
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	mov r6, #2
	ldr r0, _0220ECA0 ; =0x00002713
	str r6, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0x12
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, _0220ECA0 ; =0x00002713
	str r6, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0xed
	mov r3, #0xf
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	ldr r0, _0220EC9C ; =0x00002712
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x11
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _0220EC9C ; =0x00002712
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r4, #0
	mov r2, #0xed
	mov r3, #0x10
	bl sub_0200D704
	add sp, #0x10
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220EC94: .word 0x00002710
_0220EC98: .word 0x00002711
_0220EC9C: .word 0x00002712
_0220ECA0: .word 0x00002713
	thumb_func_end ov96_0220EB3C

	thumb_func_start ov96_0220ECA4
ov96_0220ECA4: ; 0x0220ECA4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x6c
	ldr r4, _0220ED2C ; =0x0221CFEC
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r6, r1, #0
	add r3, sp, #0x38
	mov r2, #6
_0220ECB6:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220ECB6
	ldr r0, [r4]
	ldr r4, _0220ED30 ; =0x0221D020
	str r0, [r3]
	add r3, sp, #4
	mov r2, #6
_0220ECC8:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220ECC8
	ldr r0, [r4]
	str r0, [r3]
	ldr r0, [sp, #0x88]
	cmp r0, #0
	beq _0220ECDE
	add r4, sp, #4
	b _0220ECE0
_0220ECDE:
	add r4, sp, #0x38
_0220ECE0:
	cmp r5, #0
	bne _0220ECE8
	bl GF_AssertFail
_0220ECE8:
	cmp r6, #0
	bne _0220ECF0
	bl GF_AssertFail
_0220ECF0:
	strh r7, [r4]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r4, #2]
	add r0, sp, #0x70
	ldrh r1, [r0, #0x10]
	add r2, r4, #0
	lsl r3, r3, #0x10
	strh r1, [r4, #6]
	ldrh r0, [r0, #0x14]
	add r1, r6, #0
	str r0, [r4, #8]
	add r0, r5, #0
	bl sub_0200D740
	add r4, r0, #0
	mov r1, #2
	bl sub_0200DF98
	add r0, r4, #0
	mov r1, #1
	bl sub_0200DC78
	add r0, r4, #0
	mov r1, #0
	bl sub_0200DCE8
	add r0, r4, #0
	add sp, #0x6c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220ED2C: .word 0x0221CFEC
_0220ED30: .word 0x0221D020
	thumb_func_end ov96_0220ECA4

	thumb_func_start ov96_0220ED34
ov96_0220ED34: ; 0x0220ED34
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _0220ED98 ; =0x0221D054
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_0220ED46:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220ED46
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _0220ED5A
	bl GF_AssertFail
_0220ED5A:
	cmp r4, #0
	bne _0220ED62
	bl GF_AssertFail
_0220ED62:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x10
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	add r4, r0, #0
	mov r1, #1
	bl sub_0200DC78
	add r0, r4, #0
	mov r1, #0
	bl sub_0200DCE8
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220ED98: .word 0x0221D054
	thumb_func_end ov96_0220ED34

	thumb_func_start ov96_0220ED9C
ov96_0220ED9C: ; 0x0220ED9C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xdc
	str r0, [sp]
	ldr r6, [r0, #8]
	ldr r0, [r0]
	add r3, sp, #8
	ldr r4, _0220EE3C ; =0x0221CF0C
	str r0, [sp, #4]
	add r2, r3, #0
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r4, _0220EE40 ; =0x0221D088
	add r3, sp, #0x18
	mov r2, #0x18
_0220EDC2:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0220EDC2
	ldr r0, [r4]
	ldr r5, _0220EE44 ; =0x0221CF58
	str r0, [r3]
	mov r7, #0
	add r4, sp, #0x18
_0220EDD4:
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r2, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201CAE0
	ldr r0, [r5]
	ldr r3, [sp, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r1, #0x20
	mov r2, #0
	bl sub_0201C1C4
	add r7, r7, #1
	add r4, #0x1c
	add r5, r5, #4
	cmp r7, #7
	blt _0220EDD4
	ldr r3, [sp]
	ldr r2, _0220EE48 ; =0x00000135
	ldr r3, [r3]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	ldr r1, [sp]
	str r0, [r1, #0x18]
	add r0, r1, #0
	ldr r0, [r0]
	bl ScrStrBufs_new
	ldr r1, [sp]
	str r0, [r1, #0x14]
	ldr r1, [r1]
	mov r0, #4
	bl sub_02002CEC
	mov r0, #4
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xdc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0220EE3C: .word 0x0221CF0C
_0220EE40: .word 0x0221D088
_0220EE44: .word 0x0221CF58
_0220EE48: .word 0x00000135
	thumb_func_end ov96_0220ED9C

	thumb_func_start ov96_0220EE4C
ov96_0220EE4C: ; 0x0220EE4C
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r0, #0x24
	bl RemoveWindow
	ldr r0, [r6, #0x14]
	bl ScrStrBufs_delete
	ldr r0, [r6, #0x18]
	bl DestroyMsgData
	ldr r5, _0220EE88 ; =0x0221CF58
	mov r4, #0
_0220EE66:
	ldr r1, [r5]
	ldr r0, [r6, #8]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201BB4C
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #7
	blt _0220EE66
	mov r0, #4
	bl sub_02002DB4
	ldr r0, [r6, #8]
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0220EE88: .word 0x0221CF58
	thumb_func_end ov96_0220EE4C

	thumb_func_start ov96_0220EE8C
ov96_0220EE8C: ; 0x0220EE8C
	push {r4, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	add r4, r0, #0
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r3, #1
	str r3, [sp, #8]
	ldr r0, [r4]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	mov r1, #1
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldr r0, [r4]
	add r3, r1, #0
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xed
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	ldr r0, [r4, #8]
	mov r1, #1
	mov r2, #4
	mov r3, #8
	bl sub_0201F238
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xb
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xb
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	mov r3, #6
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xc
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xd
	str r0, [sp, #0xc]
	ldr r2, [r4, #8]
	mov r0, #0xed
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #4]
	mov r0, #0xed
	mov r2, #4
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_0220EE8C

	thumb_func_start ov96_0220EFD0
ov96_0220EFD0: ; 0x0220EFD0
	push {r4, r5, r6, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	cmp r5, #0
	bne _0220EFE2
	bl GF_AssertFail
_0220EFE2:
	cmp r4, #0
	bne _0220EFEA
	bl GF_AssertFail
_0220EFEA:
	ldrb r0, [r5]
	add r0, r0, #1
	strb r0, [r5]
	ldrb r0, [r5]
	cmp r0, #4
	blo _0220F038
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	str r6, [sp, #0xc]
	ldrb r1, [r5, #1]
	mov r0, #0xed
	add r2, r4, #0
	add r1, r1, #5
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	str r6, [sp, #0xc]
	ldrb r1, [r5, #1]
	mov r0, #0xed
	add r2, r4, #0
	add r1, r1, #5
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	ldrb r0, [r5, #1]
	mov r1, #6
	add r0, r0, #1
	bl _s32_div_f
	strb r1, [r5, #1]
	mov r0, #0
	strb r0, [r5]
_0220F038:
	add sp, #0x10
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0220EFD0

	thumb_func_start ov96_0220F03C
ov96_0220F03C: ; 0x0220F03C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r0, [sp]
	bl ov96_021E5DC4
	add r7, r0, #0
	ldr r0, [sp]
	bl ov96_021E5F54
	str r0, [sp, #0xc]
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	beq _0220F05C
	b _0220F1A4
_0220F05C:
	mov r0, #0
	str r0, [sp, #8]
	ldr r0, [sp, #0xc]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #4]
	ldr r0, [r0, #0x20]
	lsr r0, r0, #0x1f
	beq _0220F07E
	add r7, #0xcc
	ldr r1, [sp]
	add r0, r7, #0
	bl ov96_0220FA18
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
_0220F07E:
	ldr r0, _0220F1A8 ; =0x0000050C
	ldr r1, [r7, r0]
	cmp r1, #0
	ble _0220F0AA
	sub r1, r1, #1
	str r1, [r7, r0]
	ldr r0, [r7, r0]
	mov r1, #0x1e
	add r0, #0x1e
	bl _s32_div_f
	str r0, [sp, #8]
	ldr r0, [sp, #4]
	ldr r1, [r0, #0x1c]
	ldr r0, _0220F1AC ; =0xC0FFFFFF
	and r1, r0
	ldr r0, [sp, #8]
	lsl r0, r0, #0x1a
	lsr r0, r0, #2
	orr r1, r0
	ldr r0, [sp, #4]
	str r1, [r0, #0x1c]
_0220F0AA:
	ldr r0, [sp, #0xc]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_0220F0BE:
	ldmia r3!, {r0, r1}
	stmia r4!, {r0, r1}
	sub r2, r2, #1
	bne _0220F0BE
	ldr r0, [r3]
	mov r6, #0
	str r0, [r4]
	ldr r4, [sp, #0xc]
	mov r0, #0x57
	lsl r0, r0, #2
	add r4, #0x50
	add r5, r7, r0
_0220F0D6:
	add r0, r4, #0
	bl ov96_021E8A20
	add r2, r0, #0
	ldr r0, [r2]
	ldr r1, [r5, #4]
	lsl r0, r0, #0xf
	lsr r0, r0, #0x1f
	beq _0220F13A
	lsl r0, r1, #0x11
	lsr r3, r0, #0x1f
	beq _0220F0FC
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	beq _0220F0FC
	ldr r0, _0220F1B0 ; =0xFFFFBFFF
	and r0, r1
	str r0, [r5, #4]
	b _0220F114
_0220F0FC:
	cmp r3, #0
	bne _0220F114
	ldr r1, [r5, #4]
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	bne _0220F114
	mov r0, #1
	lsl r0, r0, #0xe
	orr r1, r0
	lsl r0, r0, #1
	orr r0, r1
	str r0, [r5, #4]
_0220F114:
	ldr r0, [r2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	strh r0, [r5]
	ldr r0, [r2]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x18
	strh r0, [r5, #2]
	ldr r1, [r5, #4]
	ldr r0, _0220F1B4 ; =0xFFFFC000
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x12
	add r2, r1, #1
	ldr r1, _0220F1B8 ; =0x00003FFF
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	b _0220F156
_0220F13A:
	ldr r0, _0220F1BC ; =0xE000FFFF
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x12
	lsl r1, r1, #0x13
	lsr r1, r1, #3
	orr r1, r0
	ldr r0, _0220F1B4 ; =0xFFFFC000
	and r1, r0
	sub r0, r0, #1
	and r1, r0
	ldr r0, _0220F1C0 ; =0xFFFF7FFF
	and r0, r1
	str r0, [r5, #4]
_0220F156:
	add r6, r6, #1
	add r4, #0x28
	add r5, #0xe4
	cmp r6, #4
	blt _0220F0D6
	add r0, r7, #0
	add r0, #0xc8
	ldr r0, [r0]
	bl ov96_02210858
	ldr r0, _0220F1C4 ; =0x000004EC
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #8]
	add r0, r7, r0
	bl ov96_02210030
	mov r0, #0x57
	lsl r0, r0, #2
	ldr r1, [sp]
	add r0, r7, r0
	bl ov96_0220F8C8
	ldr r0, _0220F1A8 ; =0x0000050C
	ldr r0, [r7, r0]
	cmp r0, #0
	bgt _0220F19A
	ldr r0, [sp, #4]
	ldr r1, [r0, #0x20]
	ldr r0, _0220F1C8 ; =0x7FFFFFFF
	and r1, r0
	add r0, r0, #1
	orr r1, r0
	ldr r0, [sp, #4]
	str r1, [r0, #0x20]
_0220F19A:
	add r7, #0xcc
	ldr r1, [sp]
	add r0, r7, #0
	bl ov96_0220FA18
_0220F1A4:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220F1A8: .word 0x0000050C
_0220F1AC: .word 0xC0FFFFFF
_0220F1B0: .word 0xFFFFBFFF
_0220F1B4: .word 0xFFFFC000
_0220F1B8: .word 0x00003FFF
_0220F1BC: .word 0xE000FFFF
_0220F1C0: .word 0xFFFF7FFF
_0220F1C4: .word 0x000004EC
_0220F1C8: .word 0x7FFFFFFF
	thumb_func_end ov96_0220F03C

	thumb_func_start ov96_0220F1CC
ov96_0220F1CC: ; 0x0220F1CC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r4, r0, #0
	add r0, #0xf0
	bl ov96_021E8A20
	add r7, r0, #0
	add r0, r4, #0
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [r7, #0x20]
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _0220F20C
	add r0, r6, #0
	bl ov96_0220EAC4
	add r0, r5, #0
	bl ov96_021E65A4
	add r0, r5, #0
	bl ov96_0220E2A8
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_0220F20C:
	bl sub_02025358
	cmp r0, #0
	beq _0220F22E
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_0220F22E:
	bl sub_0202534C
	cmp r0, #0
	ldr r1, [r4]
	beq _0220F25C
	mov r0, #0xff
	bic r1, r0
	ldr r0, _0220F274 ; =gMain + 0x40
	ldrh r2, [r0, #0x20]
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	orr r2, r1
	str r2, [r4]
	ldrh r0, [r0, #0x22]
	ldr r1, _0220F278 ; =0xFFFF00FF
	lsl r0, r0, #0x18
	and r1, r2
	lsr r0, r0, #0x10
	orr r1, r0
	mov r0, #1
	lsl r0, r0, #0x10
	orr r0, r1
	b _0220F260
_0220F25C:
	ldr r0, _0220F27C ; =0xFFFEFFFF
	and r0, r1
_0220F260:
	str r0, [r4]
	mov r0, #0x51
	lsl r0, r0, #4
	add r0, r6, r0
	add r1, r5, #0
	bl ov96_0221013C
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220F274: .word gMain + 0x40
_0220F278: .word 0xFFFF00FF
_0220F27C: .word 0xFFFEFFFF
	thumb_func_end ov96_0220F1CC

	thumb_func_start ov96_0220F280
ov96_0220F280: ; 0x0220F280
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x58
	add r7, r0, #0
	add r0, sp, #8
	mov r1, #0xaa
	mov r2, #7
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp]
_0220F294:
	ldr r0, [sp]
	mov r6, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
_0220F29E:
	ldr r1, [sp]
	add r0, r7, #0
	add r2, r6, #0
	bl ov96_021E60D8
	lsl r2, r6, #0x18
	add r4, r0, #0
	ldr r1, [sp, #4]
	add r0, r7, #0
	lsr r2, r2, #0x18
	bl ov96_0220F378
	add r5, r0, #0
	ldrb r0, [r4, #2]
	cmp r0, #5
	blo _0220F2C2
	bl GF_AssertFail
_0220F2C2:
	ldrb r0, [r4]
	cmp r0, #5
	blo _0220F2CC
	bl GF_AssertFail
_0220F2CC:
	ldrb r0, [r4, #1]
	cmp r0, #5
	blo _0220F2D6
	bl GF_AssertFail
_0220F2D6:
	ldrb r0, [r4, #2]
	strb r0, [r5, #2]
	ldrb r0, [r4, #2]
	lsl r1, r0, #2
	add r0, sp, #8
	ldr r0, [r0, r1]
	strb r0, [r5]
	ldrb r0, [r4, #2]
	lsl r1, r0, #2
	add r0, sp, #8
	add r0, r0, r1
	ldr r0, [r0, #0x14]
	strb r0, [r5, #1]
	ldrb r0, [r4]
	lsl r1, r0, #2
	add r0, sp, #8
	add r0, r0, r1
	ldr r0, [r0, #0x28]
	cmp r0, #0
	ble _0220F310
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220F31E
_0220F310:
	lsl r0, r0, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220F31E:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5, #4]
	ldrb r0, [r4, #1]
	lsl r1, r0, #2
	add r0, sp, #8
	add r0, r0, r1
	ldr r0, [r0, #0x3c]
	cmp r0, #0
	ble _0220F34A
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0220F358
_0220F34A:
	lsl r0, r0, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0220F358:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	add r6, r6, #1
	str r0, [r5, #8]
	cmp r6, #3
	blt _0220F29E
	ldr r0, [sp]
	add r0, r0, #1
	str r0, [sp]
	cmp r0, #4
	blt _0220F294
	add sp, #0x58
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220F280

	thumb_func_start ov96_0220F378
ov96_0220F378: ; 0x0220F378
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bne _0220F38A
	bl GF_AssertFail
_0220F38A:
	cmp r5, #4
	blo _0220F392
	bl GF_AssertFail
_0220F392:
	cmp r6, #3
	blo _0220F39A
	bl GF_AssertFail
_0220F39A:
	lsl r0, r5, #1
	add r0, r5, r0
	add r1, r6, r0
	mov r0, #0xc
	add r4, #0x34
	mul r0, r1
	add r4, r4, r0
	bne _0220F3AE
	bl GF_AssertFail
_0220F3AE:
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0220F378

	thumb_func_start ov96_0220F3B4
ov96_0220F3B4: ; 0x0220F3B4
	ldrb r0, [r0]
	lsl r0, r0, #0x11
	lsr r0, r0, #0x10
	bx lr
	thumb_func_end ov96_0220F3B4

	thumb_func_start ov96_0220F3BC
ov96_0220F3BC: ; 0x0220F3BC
	push {r3, lr}
	ldr r0, [r0, #4]
	lsl r0, r0, #0x1b
	lsr r0, r0, #0x1d
	cmp r0, #6
	bhi _0220F3F2
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220F3D4: ; jump table
	.short _0220F3F2 - _0220F3D4 - 2 ; case 0
	.short _0220F3F2 - _0220F3D4 - 2 ; case 1
	.short _0220F3F2 - _0220F3D4 - 2 ; case 2
	.short _0220F3E2 - _0220F3D4 - 2 ; case 3
	.short _0220F3E6 - _0220F3D4 - 2 ; case 4
	.short _0220F3EA - _0220F3D4 - 2 ; case 5
	.short _0220F3EE - _0220F3D4 - 2 ; case 6
_0220F3E2:
	mov r0, #1
	pop {r3, pc}
_0220F3E6:
	mov r0, #2
	pop {r3, pc}
_0220F3EA:
	mov r0, #3
	pop {r3, pc}
_0220F3EE:
	mov r0, #5
	pop {r3, pc}
_0220F3F2:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_0220F3BC

	thumb_func_start ov96_0220F3FC
ov96_0220F3FC: ; 0x0220F3FC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x118
	str r0, [sp, #8]
	ldr r0, [r0, #0x10]
	bl sub_0200E2B0
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r3, [sp, #8]
	ldr r0, [r0]
	ldr r3, [r3, #0x1c]
	mov r1, #0xc
	mov r2, #7
	bl ov96_021EA854
	ldr r1, [sp, #8]
	str r0, [r1, #0x20]
	bl ov96_021EB138
	mov r4, #0
	add r5, sp, #0x14
	add r2, r5, #0
	add r0, r4, #0
	add r1, r4, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	ldr r0, [sp, #8]
	add r6, sp, #0x58
	ldr r0, [r0, #4]
	str r0, [sp, #0xc]
_0220F446:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r1, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	add r3, r6, #0
	bl ov96_021E6168
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r5, #0x14]
	add r4, r4, #1
	add r6, #0x10
	add r5, r5, #4
	cmp r4, #0xc
	blt _0220F446
	mov r0, #1
	str r0, [sp, #0x18]
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	mov r1, #0xc
	ldr r0, [r0, #0x20]
	add r2, sp, #0x58
	add r3, sp, #0x14
	bl ov96_021EA8A8
	add sp, #0x118
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0220F3FC

	thumb_func_start ov96_0220F4A0
ov96_0220F4A0: ; 0x0220F4A0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x58
	str r0, [sp, #0xc]
	add r0, sp, #0x40
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	str r1, [r0, #0xc]
	str r1, [r0, #0x10]
	str r1, [r0, #0x14]
	mov r1, #0xaa
	mov r2, #0x11
	bl ReadWholeNarcMemberByIdPair
	ldr r0, [sp, #0xc]
	cmp r0, #0
	bne _0220F4C8
	bl GF_AssertFail
_0220F4C8:
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #4]
	cmp r0, #0
	bne _0220F4D4
	bl GF_AssertFail
_0220F4D4:
	ldr r0, [sp, #0xc]
	ldr r7, [r0, #4]
	add r0, r7, #0
	bl ov96_0220F280
	mov r2, #0x8f
	ldr r1, [sp, #0xc]
	lsl r2, r2, #2
	add r1, r1, r2
	mov r0, #0
	mov r2, #3
	mov r3, #3
_0220F4EC:
	ldr r5, [r1]
	add r4, r0, #0
	bic r5, r2
	and r4, r3
	orr r4, r5
	str r4, [r1]
	add r0, r0, #1
	add r1, #0xe4
	cmp r0, #4
	blt _0220F4EC
	mov r1, #0x59
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	add r0, r0, r1
	mov r6, #0
	str r0, [sp, #0x20]
_0220F50C:
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x10]
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0xe4
	str r0, [sp, #0x1c]
	mul r1, r0
	ldr r0, [sp, #0x20]
	add r2, r0, r1
	ldr r1, [sp, #0x10]
	mov r0, #0x48
	mul r0, r1
	add r5, r2, r0
	ldr r0, [sp, #0xc]
	lsl r1, r6, #0x18
	ldr r0, [r0, #0x20]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	mov r1, #1
	str r0, [sp, #0x24]
	bl ov96_021EAB38
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	add r0, r7, #0
	add r1, r4, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x40
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r0, [sp, #0x24]
	ldr r1, [r1]
	ldr r2, [r2]
	bl ov96_021EAF70
	ldr r0, [sp, #0xc]
	lsl r1, r6, #0x18
	ldr r0, [r0, #0x20]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r4, r0, #0
	bl ov96_021EAA20
	bl ov96_021E8BB0
	str r0, [sp, #0x28]
	add r0, r4, #0
	mov r1, #0
	bl ov96_0220D554
	mov r1, #0xfe
	lsl r1, r1, #0x16
	add r0, r4, #0
	add r2, r1, #0
	bl ov96_021EB10C
	ldr r1, [sp, #0x1c]
	mov r0, #0xc
	add r2, r1, #0
	mul r2, r0
	ldr r0, _0220F700 ; =0x0221CFBC
	add r1, r0, r2
	ldr r0, [sp, #0x10]
	lsl r0, r0, #2
	add r0, r1, r0
	mov r1, #0
	ldrsh r1, [r0, r1]
	str r1, [sp, #0x18]
	mov r1, #2
	ldrsh r0, [r0, r1]
	str r0, [sp, #0x14]
	add r0, r4, #0
	bl ov96_021EAC0C
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x14]
	add r0, r4, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_021EAF6C
	add r0, sp, #0x2c
	str r0, [sp]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x14]
	add r0, r4, #0
	add r3, sp, #0x30
	bl ov96_021EB0A4
	str r7, [r5]
	ldr r1, [r5, #0x40]
	ldr r0, _0220F704 ; =0xFFF0FFFF
	and r1, r0
	lsl r0, r6, #0x1c
	lsr r0, r0, #0xc
	orr r0, r1
	str r0, [r5, #0x40]
	ldr r0, [sp, #0x1c]
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	add r0, r5, #0
	add r0, #0x45
	strb r1, [r0]
	ldr r0, [sp, #0x10]
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	add r0, r5, #0
	add r0, #0x46
	strb r3, [r0]
	str r4, [r5, #4]
	ldr r2, [r5, #0x40]
	ldr r0, _0220F708 ; =0xFCFFFFFF
	and r0, r2
	ldr r2, [sp, #0x28]
	ldrh r2, [r2, #4]
	lsl r2, r2, #0x1e
	lsr r2, r2, #6
	orr r0, r2
	str r0, [r5, #0x40]
	add r0, r7, #0
	add r2, r3, #0
	bl ov96_0220F378
	str r0, [r5, #8]
	mov r0, #2
	str r0, [r5, #0xc]
	ldr r1, [r5, #0x40]
	ldr r0, _0220F70C ; =0xFF0FFFFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x14
	orr r0, r1
	str r0, [r5, #0x40]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #0xc
	str r0, [r5, #0x1c]
	ldr r0, [sp, #0x2c]
	lsl r0, r0, #0xc
	str r0, [r5, #0x20]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #0xc
	str r0, [r5, #0x10]
	ldr r0, [sp, #0x2c]
	lsl r0, r0, #0xc
	str r0, [r5, #0x14]
	add r0, r7, #0
	bl ov96_021E5F24
	ldr r1, [sp, #0x1c]
	cmp r1, r0
	bne _0220F6A8
	ldr r0, [sp, #0x10]
	ldr r3, [sp, #0x18]
	lsl r0, r0, #2
	add r1, sp, #0x34
	add r2, sp, #0x34
	add r1, r1, r0
	strh r3, [r2, r0]
	ldr r0, [sp, #0x14]
	strh r0, [r1, #2]
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0x10]
	bl sub_0200E2B0
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r2, [sp, #0xc]
	add r0, r7, #0
	ldr r2, [r2, #0x1c]
	add r1, r4, #0
	bl ov96_021E64F8
	mov r1, #4
	bl sub_02024ADC
	add r0, r4, #0
	mov r1, #6
	bl ov96_021EABA8
	b _0220F6B0
_0220F6A8:
	add r0, r4, #0
	mov r1, #7
	bl ov96_021EABA8
_0220F6B0:
	add r0, r7, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _0220F6D0
	add r0, r7, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, r6
	ldr r0, [sp, #0x30]
	strb r0, [r1, #4]
	ldr r0, [sp, #0x2c]
	strb r0, [r1, #0x10]
_0220F6D0:
	add r6, r6, #1
	cmp r6, #0xc
	bge _0220F6D8
	b _0220F50C
_0220F6D8:
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0x10]
	bl sub_0200E2B0
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, sp, #0x34
	str r0, [sp, #8]
	ldr r2, [sp, #0xc]
	add r0, r7, #0
	ldr r2, [r2, #0x1c]
	mov r1, #0
	bl ov96_021E62AC
	add sp, #0x58
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220F700: .word 0x0221CFBC
_0220F704: .word 0xFFF0FFFF
_0220F708: .word 0xFCFFFFFF
_0220F70C: .word 0xFF0FFFFF
	thumb_func_end ov96_0220F4A0

	thumb_func_start ov96_0220F710
ov96_0220F710: ; 0x0220F710
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	bl ov96_021E5DC4
	str r0, [sp, #8]
	str r0, [sp, #4]
	add r0, #0xcc
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #4]
	str r0, [sp]
_0220F728:
	ldr r0, [sp, #0xc]
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	ldr r0, [sp, #0xc]
	mov r1, #3
	bl _s32_div_f
	mov r2, #0x59
	ldr r0, [sp, #8]
	lsl r2, r2, #2
	add r0, r0, r2
	str r0, [sp, #0x10]
	mov r0, #0xe4
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #0x10]
	add r2, r0, r2
	mov r0, #0x48
	mul r0, r1
	add r7, r2, r0
	ldr r0, [sp, #0xc]
	add r4, r0, #1
	cmp r4, #0xc
	blt _0220F75E
	b _0220F8AE
_0220F75E:
	ldr r1, [sp, #4]
	add r1, r1, r0
	mov r0, #0xc
	mul r0, r4
	add r6, r1, r0
	add r0, r7, #0
	str r0, [sp, #0x14]
	add r0, #0x1c
	str r0, [sp, #0x14]
	add r0, r7, #0
	str r0, [sp, #0x18]
	add r0, #0x28
	str r0, [sp, #0x18]
	add r0, r7, #0
	str r0, [sp, #0x1c]
	add r0, #0x34
	str r0, [sp, #0x1c]
	add r0, r7, #0
	str r0, [sp, #0x20]
	add r0, #0x40
	str r0, [sp, #0x20]
_0220F788:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0xe4
	add r2, r5, #0
	mul r2, r0
	ldr r0, [sp, #0x10]
	add r2, r0, r2
	mov r0, #0x48
	mul r0, r1
	add r5, r2, r0
	add r0, r7, #0
	bl ov96_0220D694
	cmp r0, #0
	beq _0220F89A
	add r0, r5, #0
	bl ov96_0220D694
	cmp r0, #0
	beq _0220F89A
	add r0, r7, #0
	add r1, r5, #0
	bl ov96_0220D5D0
	cmp r0, #0
	beq _0220F89A
	ldr r0, [sp]
	ldrb r0, [r0, r4]
	cmp r0, #0
	bne _0220F89A
	mov r1, #0
	add r0, sp, #0x24
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	mov r0, #1
	strb r0, [r6]
	ldrb r1, [r6]
	ldr r0, [sp]
	add r2, sp, #0x24
	strb r1, [r0, r4]
	add r1, r5, #0
	ldr r0, [sp, #0x14]
	add r1, #0x1c
	bl VEC_Subtract
	add r0, sp, #0x24
	add r1, r0, #0
	bl VEC_Normalize
	ldr r0, [r5, #8]
	ldr r1, [r0, #4]
	ldr r0, [r7, #0x40]
	lsl r0, r0, #6
	lsr r0, r0, #0x1e
	bne _0220F812
	mov r0, #6
	mul r0, r1
	mov r1, #5
	bl _s32_div_f
	add r1, r0, #0
_0220F812:
	ldr r2, [sp, #0x18]
	add r0, r1, #0
	ldr r3, [sp, #0x1c]
	add r1, sp, #0x24
	bl VEC_MultAdd
	ldr r0, [r7, #8]
	ldr r1, [r0, #4]
	ldr r0, [r5, #0x40]
	lsl r0, r0, #6
	lsr r0, r0, #0x1e
	bne _0220F836
	mov r0, #6
	mul r0, r1
	mov r1, #5
	bl _s32_div_f
	add r1, r0, #0
_0220F836:
	add r2, r5, #0
	add r3, r5, #0
	add r0, r1, #0
	add r1, sp, #0x24
	add r2, #0x28
	add r3, #0x34
	bl VEC_MultAdd
	mov r0, #0
	ldr r1, [r5, #0x34]
	mvn r0, r0
	mul r0, r1
	str r0, [r5, #0x34]
	mov r0, #0
	ldr r1, [r5, #0x38]
	mvn r0, r0
	mul r0, r1
	str r0, [r5, #0x38]
	mov r1, #2
	ldr r0, [sp, #0x1c]
	lsl r1, r1, #0xe
	bl ov96_0220E974
	add r0, r5, #0
	mov r1, #2
	add r0, #0x34
	lsl r1, r1, #0xe
	bl ov96_0220E974
	add r0, sp, #0x24
	bl ov96_0220D6CC
	lsl r0, r0, #0x1c
	ldr r2, [r5, #0x40]
	ldr r1, _0220F8C4 ; =0xFF0FFFFF
	lsr r0, r0, #8
	and r1, r2
	orr r1, r0
	mov r0, #1
	lsl r0, r0, #0x1a
	orr r0, r1
	str r0, [r5, #0x40]
	ldr r0, [sp, #0x20]
	ldr r1, [r0]
	mov r0, #1
	lsl r0, r0, #0x1a
	orr r1, r0
	ldr r0, [sp, #0x20]
	str r1, [r0]
	b _0220F8A4
_0220F89A:
	mov r0, #0
	strb r0, [r6]
	ldrb r1, [r6]
	ldr r0, [sp]
	strb r1, [r0, r4]
_0220F8A4:
	add r4, r4, #1
	add r6, #0xc
	cmp r4, #0xc
	bge _0220F8AE
	b _0220F788
_0220F8AE:
	ldr r0, [sp]
	add r0, #0xc
	str r0, [sp]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #0xc
	bge _0220F8C0
	b _0220F728
_0220F8C0:
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220F8C4: .word 0xFF0FFFFF
	thumb_func_end ov96_0220F710

	thumb_func_start ov96_0220F8C8
ov96_0220F8C8: ; 0x0220F8C8
	push {r3, r4, r5, r6, r7, lr}
	add r7, r1, #0
	add r5, r0, #0
	add r0, r7, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	mov r0, #0
	str r0, [sp]
_0220F8DE:
	ldr r0, [r5, #4]
	add r1, r5, #0
	lsr r3, r0, #0x1e
	add r0, r3, #0
	mov r2, #0x48
	add r1, #0x48
	mul r0, r2
	ldr r4, [r1, r0]
	ldr r3, _0220FA0C ; =0xF7FFFFFF
	and r3, r4
	str r3, [r1, r0]
	ldr r1, [r5, #4]
	lsl r0, r1, #0x11
	lsr r0, r0, #0x1f
	beq _0220F928
	mov r1, #0
	mov r2, #2
	add r0, r5, #0
	ldrsh r1, [r5, r1]
	ldrsh r2, [r5, r2]
	add r0, #8
	bl ov96_0220DAA0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #0xc
	beq _0220F9DE
	mov r1, #2
	ldr r2, [r5, #4]
	lsl r1, r1, #0x1c
	orr r2, r1
	ldr r1, _0220FA10 ; =0x3FFFFFFF
	lsl r0, r0, #0x1e
	and r1, r2
	orr r0, r1
	str r0, [r5, #4]
	b _0220F9DE
_0220F928:
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	beq _0220F998
	lsl r0, r1, #2
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _0220F9DE
	add r3, r5, #0
	lsr r0, r1, #0x1e
	add r3, #8
	mul r2, r0
	add r4, r3, r2
	ldr r0, [r4, #0x1c]
	ldr r2, [r4, #0x20]
	lsl r0, r0, #4
	lsl r2, r2, #4
	ldr r3, [r4, #0xc]
	asr r0, r0, #0x10
	asr r2, r2, #0x10
	cmp r3, #3
	bne _0220F95A
	ldr r0, _0220FA14 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r5, #4]
	b _0220F9DE
_0220F95A:
	mov r1, #0
	ldrsh r1, [r5, r1]
	sub r0, r1, r0
	bpl _0220F964
	neg r0, r0
_0220F964:
	cmp r0, #8
	bgt _0220F976
	mov r0, #2
	ldrsh r0, [r5, r0]
	sub r0, r0, r2
	bpl _0220F972
	neg r0, r0
_0220F972:
	cmp r0, #8
	ble _0220F9DE
_0220F976:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_0220D6B0
	ldr r1, [r4, #0x10]
	ldr r2, [r4, #0x14]
	add r0, r4, #0
	bl ov96_0220D8C4
	lsl r0, r0, #0x1f
	ldr r2, [r4, #0x40]
	ldr r1, _0220FA14 ; =0xDFFFFFFF
	lsr r0, r0, #2
	and r1, r2
	orr r0, r1
	str r0, [r4, #0x40]
	b _0220F9DE
_0220F998:
	lsl r0, r1, #2
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _0220F9D6
	add r0, r5, #0
	lsr r1, r1, #0x1e
	mul r2, r1
	add r0, #8
	add r4, r0, r2
	mov r1, #0
	mov r2, #2
	ldrsh r1, [r5, r1]
	ldrsh r2, [r5, r2]
	bl ov96_0220DAA0
	lsl r0, r0, #0x18
	lsr r2, r0, #0x18
	ldr r0, [r4, #0xc]
	cmp r0, #2
	bne _0220F9D6
	ldr r0, [r5, #4]
	lsr r1, r0, #0x1e
	cmp r2, r1
	bne _0220F9D6
	lsl r0, r0, #3
	lsr r0, r0, #0x13
	cmp r0, #5
	bhi _0220F9D6
	add r0, r4, #0
	bl ov96_0220D630
_0220F9D6:
	ldr r1, [r5, #4]
	ldr r0, _0220FA14 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r5, #4]
_0220F9DE:
	add r4, r5, #0
	mov r6, #0
	add r4, #8
_0220F9E4:
	add r0, r4, #0
	add r1, r7, #0
	bl ov96_0220D9A4
	add r6, r6, #1
	add r4, #0x48
	cmp r6, #3
	blt _0220F9E4
	ldr r0, [sp]
	add r5, #0xe4
	add r0, r0, #1
	str r0, [sp]
	cmp r0, #4
	bge _0220FA02
	b _0220F8DE
_0220FA02:
	add r0, r7, #0
	bl ov96_0220F710
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220FA0C: .word 0xF7FFFFFF
_0220FA10: .word 0x3FFFFFFF
_0220FA14: .word 0xDFFFFFFF
	thumb_func_end ov96_0220F8C8

	thumb_func_start ov96_0220FA18
ov96_0220FA18: ; 0x0220FA18
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #4]
	add r0, r1, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #8]
	str r0, [sp, #0xc]
	add r0, #0x1c
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	mov r4, #0
	ldr r1, [r0, #0x1c]
	ldr r0, _0220FB84 ; =0x3FFFFFFF
	add r2, r1, #0
	and r2, r0
	lsr r0, r1, #0x1e
	add r0, r0, #1
	lsl r0, r0, #0x1e
	orr r2, r0
	ldr r0, [sp, #8]
	mov r1, #0x7f
	add r6, r0, #0
	str r2, [r0, #0x1c]
	ldr r0, [r0, #0x20]
	add r6, #0x20
	bic r0, r1
	lsr r1, r2, #0x1e
	add r3, r1, #0
	mov r2, #0xe4
	mul r3, r2
	ldr r1, [sp, #4]
	add r2, #0x8c
	add r1, r1, r3
	ldr r1, [r1, r2]
	add r7, r4, #0
	lsl r1, r1, #0xe
	lsr r2, r1, #0x10
	mov r1, #0x7f
	and r2, r1
	and r1, r2
	add r2, r0, #0
	orr r2, r1
	ldr r1, _0220FB88 ; =0x8007FFFF
	ldr r0, [sp, #8]
	and r2, r1
	str r2, [r0, #0x20]
	ldr r2, [r0, #0x1c]
	lsl r0, r1, #0x18
	and r2, r0
	ldr r0, [sp, #8]
	str r2, [r0, #0x1c]
	ldr r2, [r0, #0x20]
	asr r0, r1, #0xc
	add r1, r2, #0
	and r1, r0
	ldr r0, [sp, #8]
	str r1, [r0, #0x20]
	ldr r0, [sp, #4]
	add r0, #0x98
	str r0, [sp, #4]
_0220FA98:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0xe4
	add r2, r5, #0
	mul r2, r0
	ldr r0, [sp, #4]
	add r3, sp, #0x14
	add r2, r0, r2
	mov r0, #0x48
	mul r0, r1
	add r5, r2, r0
	add r0, sp, #0x10
	str r0, [sp]
	ldr r1, [r5, #0x1c]
	ldr r2, [r5, #0x20]
	lsl r1, r1, #4
	lsl r2, r2, #4
	ldr r0, [r5, #4]
	asr r1, r1, #0x10
	asr r2, r2, #0x10
	bl ov96_021EB06C
	ldr r1, [sp, #0x14]
	cmp r1, #0xff
	ble _0220FADC
	mov r1, #0xff
	b _0220FAE2
_0220FADC:
	cmp r1, #0
	bge _0220FAE2
	mov r1, #0
_0220FAE2:
	ldr r0, [sp, #8]
	add r0, r0, r4
	strb r1, [r0, #4]
	ldr r1, [sp, #0x10]
	cmp r1, #0xff
	ble _0220FAF2
	mov r1, #0xff
	b _0220FAF8
_0220FAF2:
	cmp r1, #0
	bge _0220FAF8
	mov r1, #0
_0220FAF8:
	strb r1, [r0, #0x10]
	ldr r0, [r5, #0x40]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x18
	beq _0220FB30
	ldr r2, [r6]
	ldr r0, _0220FB88 ; =0x8007FFFF
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #1
	mov r2, #1
	lsl r2, r4
	lsr r0, r0, #0x14
	orr r0, r2
	lsl r0, r0, #0x14
	lsr r0, r0, #1
	orr r0, r1
	str r0, [r6]
	ldr r1, [r5, #0x40]
	ldr r0, _0220FB8C ; =0xFFFF00FF
	and r0, r1
	lsl r1, r1, #0x10
	lsr r1, r1, #0x18
	sub r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x10
	orr r0, r1
	str r0, [r5, #0x40]
_0220FB30:
	ldr r0, [r5, #0xc]
	cmp r0, #3
	bne _0220FB50
	ldr r2, [r6]
	ldr r0, _0220FB90 ; =0xFFF8007F
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #0xd
	mov r2, #1
	lsl r2, r4
	lsr r0, r0, #0x14
	orr r0, r2
	lsl r0, r0, #0x14
	lsr r0, r0, #0xd
	orr r0, r1
	str r0, [r6]
_0220FB50:
	ldr r0, [sp, #0xc]
	add r4, r4, #1
	ldr r2, [r0]
	mov r0, #0xff
	lsl r0, r0, #0x18
	add r1, r2, #0
	and r1, r0
	lsl r0, r2, #8
	ldr r2, [r5, #0x40]
	lsr r0, r0, #8
	lsl r2, r2, #8
	lsr r2, r2, #0x1c
	sub r2, r2, #1
	lsl r2, r7
	add r2, r0, r2
	ldr r0, _0220FB94 ; =0x00FFFFFF
	add r7, r7, #2
	and r0, r2
	orr r1, r0
	ldr r0, [sp, #0xc]
	cmp r4, #0xc
	str r1, [r0]
	blt _0220FA98
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0220FB84: .word 0x3FFFFFFF
_0220FB88: .word 0x8007FFFF
_0220FB8C: .word 0xFFFF00FF
_0220FB90: .word 0xFFF8007F
_0220FB94: .word 0x00FFFFFF
	thumb_func_end ov96_0220FA18

	thumb_func_start ov96_0220FB98
ov96_0220FB98: ; 0x0220FB98
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	ldr r1, [r5, #4]
	mov r0, #0x20
	orr r0, r1
	str r0, [r5, #4]
	mov r0, #0x80
	strh r0, [r5]
	mov r0, #0
	strh r0, [r5, #2]
	strh r0, [r5]
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #4
	orr r0, r1
	str r0, [r5, #4]
	strb r2, [r5, #8]
	bl MTRandom
	mov r1, #0xf
	bl _u32_div_f
	strb r1, [r5, #9]
	ldr r1, [r5, #4]
	ldr r0, _0220FBD8 ; =0xFFFFC03F
	and r0, r1
	str r0, [r5, #4]
	strb r4, [r5, #0xa]
	pop {r3, r4, r5, pc}
	nop
_0220FBD8: .word 0xFFFFC03F
	thumb_func_end ov96_0220FB98

	thumb_func_start ov96_0220FBDC
ov96_0220FBDC: ; 0x0220FBDC
	ldr r2, [r0, #4]
	mov r1, #0x20
	bic r2, r1
	mov r1, #0x1c
	bic r2, r1
	str r2, [r0, #4]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0220FBDC

	thumb_func_start ov96_0220FBEC
ov96_0220FBEC: ; 0x0220FBEC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	str r1, [sp, #8]
	mov r1, #2
	ldrsh r1, [r0, r1]
	str r0, [sp, #4]
	mov r0, #0x12
	lsl r0, r0, #4
	str r2, [sp, #0xc]
	cmp r1, r0
	bge _0220FC08
	add sp, #0x2c
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_0220FC08:
	sub r0, r1, r0
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	mov r4, #0
	str r0, [sp, #0x10]
_0220FC12:
	mov r1, #0
	add r0, sp, #0x20
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r1, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0xe4
	str r0, [sp, #0x14]
	mul r1, r0
	ldr r0, [sp, #8]
	add r1, r0, r1
	mov r0, #0x48
	add r1, #8
	mul r0, r6
	add r5, r1, r0
	ldr r0, [r5, #0xc]
	cmp r0, #1
	bne _0220FCA2
	add r0, sp, #0x18
	str r0, [sp]
	ldr r1, [r5, #0x1c]
	ldr r2, [r5, #0x20]
	ldr r0, [r5, #4]
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #0x1c
	bl ov96_021EB06C
	ldr r1, [sp, #4]
	mov r0, #0
	ldrsh r0, [r1, r0]
	ldr r2, [sp, #0x1c]
	ldr r1, [sp, #0x18]
	sub r2, r2, r0
	ldr r0, [sp, #0x10]
	str r2, [sp, #0x20]
	sub r1, r1, r0
	lsl r0, r2, #0xc
	str r0, [sp, #0x20]
	str r1, [sp, #0x24]
	lsl r0, r1, #0xc
	str r0, [sp, #0x24]
	add r0, sp, #0x20
	bl VEC_Mag
	add r7, r0, #0
	ldr r0, [r5, #4]
	bl ov96_021EAF8C
	add r0, #0xe
	lsl r0, r0, #0xc
	cmp r7, r0
	bgt _0220FCA2
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0xc]
	strb r1, [r0, #4]
	strb r6, [r0, #5]
	ldr r1, [sp, #0x1c]
	strh r1, [r0]
	ldr r1, [sp, #0x18]
	add sp, #0x2c
	strh r1, [r0, #2]
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_0220FCA2:
	add r4, r4, #1
	cmp r4, #0xc
	blt _0220FC12
	mov r0, #0
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0220FBEC

	thumb_func_start ov96_0220FCB0
ov96_0220FCB0: ; 0x0220FCB0
	push {r4, r5, r6, r7}
	mov r5, #2
	ldrsh r5, [r0, r5]
	mov r2, #1
	sub r6, r1, #1
	add r3, r2, #0
	mov r4, #0
	cmp r5, r6
	bne _0220FCD6
	ldrsh r6, [r0, r4]
	add r7, r2, #0
	cmp r6, #8
	blt _0220FCD0
	cmp r6, #0x17
	bgt _0220FCD0
	add r7, r4, #0
_0220FCD0:
	cmp r7, #0
	beq _0220FCD6
	mov r4, #1
_0220FCD6:
	cmp r4, #0
	bne _0220FCFC
	sub r4, r1, #2
	mov r6, #0
	cmp r5, r4
	bne _0220FCF6
	ldrsh r4, [r0, r6]
	mov r7, #1
	cmp r4, #5
	blt _0220FCF0
	cmp r4, #0x1a
	bgt _0220FCF0
	add r7, r6, #0
_0220FCF0:
	cmp r7, #0
	beq _0220FCF6
	mov r6, #1
_0220FCF6:
	cmp r6, #0
	bne _0220FCFC
	mov r3, #0
_0220FCFC:
	cmp r3, #0
	bne _0220FD22
	sub r1, r1, #3
	mov r3, #0
	cmp r5, r1
	bne _0220FD1C
	ldrsh r0, [r0, r3]
	mov r1, #1
	cmp r0, #2
	blt _0220FD16
	cmp r0, #0x1d
	bgt _0220FD16
	add r1, r3, #0
_0220FD16:
	cmp r1, #0
	beq _0220FD1C
	mov r3, #1
_0220FD1C:
	cmp r3, #0
	bne _0220FD22
	mov r2, #0
_0220FD22:
	add r0, r2, #0
	pop {r4, r5, r6, r7}
	bx lr
	thumb_func_end ov96_0220FCB0

	thumb_func_start ov96_0220FD28
ov96_0220FD28: ; 0x0220FD28
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r4, r2, #0
	mov r0, #0
	add r6, r1, #0
	ldrsh r1, [r4, r0]
	asr r0, r1, #2
	lsr r0, r0, #0x1d
	add r0, r1, r0
	asr r0, r0, #3
	add r1, sp, #4
	strh r0, [r1]
	mov r0, #2
	ldrsh r2, [r4, r0]
	asr r3, r2, #2
	lsr r3, r3, #0x1d
	add r3, r2, r3
	asr r2, r3, #3
	strh r2, [r1, #2]
	ldrsh r0, [r1, r0]
	cmp r0, #9
	bge _0220FD7C
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0xc
	orr r0, r1
	str r0, [r5, #4]
	add r0, sp, #4
	mov r1, #9
	bl ov96_0220FCB0
	cmp r0, #0
	beq _0220FDDC
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0x10
	orr r0, r1
	str r0, [r5, #4]
	b _0220FDDC
_0220FD7C:
	cmp r0, #0xf
	bge _0220FDA6
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0x10
	orr r0, r1
	str r0, [r5, #4]
	add r0, sp, #4
	mov r1, #0xf
	bl ov96_0220FCB0
	cmp r0, #0
	beq _0220FDDC
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0x14
	orr r0, r1
	str r0, [r5, #4]
	b _0220FDDC
_0220FDA6:
	cmp r0, #0x14
	bge _0220FDD0
	ldr r2, [r5, #4]
	mov r0, #0x1c
	bic r2, r0
	mov r1, #0x14
	add r0, r2, #0
	orr r0, r1
	str r0, [r5, #4]
	add r0, sp, #4
	bl ov96_0220FCB0
	cmp r0, #0
	beq _0220FDDC
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0x18
	orr r0, r1
	str r0, [r5, #4]
	b _0220FDDC
_0220FDD0:
	ldr r1, [r5, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #0x18
	orr r0, r1
	str r0, [r5, #4]
_0220FDDC:
	ldrb r1, [r4, #4]
	mov r0, #0xe4
	mul r0, r1
	add r6, r6, r0
	add r0, r5, #0
	ldr r7, [r6, #8]
	bl ov96_0220F3BC
	add r1, r6, #0
	add r1, #0xe0
	ldr r1, [r1]
	lsl r1, r1, #0xe
	lsr r1, r1, #0x10
	add r1, r1, r0
	cmp r1, #0xc8
	ble _0220FDFE
	mov r1, #0xc8
_0220FDFE:
	add r0, r6, #0
	add r0, #0xe0
	ldr r2, [r0]
	ldr r0, _0220FE34 ; =0xFFFC0003
	lsl r1, r1, #0x10
	and r0, r2
	lsr r1, r1, #0xe
	orr r0, r1
	add r6, #0xe0
	str r0, [r6]
	ldr r0, [r5, #4]
	mov r1, #3
	bic r0, r1
	ldrb r1, [r4, #4]
	mov r3, #3
	and r1, r3
	orr r0, r1
	str r0, [r5, #4]
	mov r0, #1
	str r0, [sp]
	ldrb r1, [r4, #4]
	ldrb r2, [r4, #5]
	add r0, r7, #0
	bl ov96_021E8228
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0220FE34: .word 0xFFFC0003
	thumb_func_end ov96_0220FD28

	thumb_func_start ov96_0220FE38
ov96_0220FE38: ; 0x0220FE38
	push {r4, r5, r6, lr}
	sub sp, #8
	add r4, r0, #0
	add r6, r2, #0
	ldr r2, [r4, #4]
	add r5, r1, #0
	lsl r1, r2, #0x1a
	lsr r1, r1, #0x1f
	bne _0220FE4C
	b _0220FF4E
_0220FE4C:
	lsl r1, r2, #0x1b
	lsr r1, r1, #0x1d
	cmp r1, #6
	bhi _0220FEEC
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_0220FE60: ; jump table
	.short _0220FEEC - _0220FE60 - 2 ; case 0
	.short _0220FE6E - _0220FE60 - 2 ; case 1
	.short _0220FEB6 - _0220FE60 - 2 ; case 2
	.short _0220FECC - _0220FE60 - 2 ; case 3
	.short _0220FECC - _0220FE60 - 2 ; case 4
	.short _0220FECC - _0220FE60 - 2 ; case 5
	.short _0220FECC - _0220FE60 - 2 ; case 6
_0220FE6E:
	add r1, r6, #0
	add r2, sp, #0
	bl ov96_0220FBEC
	cmp r0, #0
	beq _0220FE86
	add r0, r4, #0
	add r1, r6, #0
	add r2, sp, #0
	bl ov96_0220FD28
	b _0220FEF0
_0220FE86:
	mov r0, #2
	ldrsh r2, [r4, r0]
	mov r1, #0x1e
	lsl r1, r1, #4
	cmp r2, r1
	blt _0220FEA4
	mov r0, #0
	strh r0, [r4, #2]
	ldr r1, [r4, #4]
	mov r0, #0x1c
	bic r1, r0
	mov r0, #8
	orr r0, r1
	str r0, [r4, #4]
	b _0220FEF0
_0220FEA4:
	ldrb r1, [r4, #0xa]
	add r1, r2, r1
	strh r1, [r4, #2]
	ldrsh r0, [r4, r0]
	ldrb r1, [r4, #9]
	bl ov96_0220E6DC
	strh r0, [r4]
	b _0220FEF0
_0220FEB6:
	mov r1, #2
	ldrsh r3, [r4, r1]
	ldrb r2, [r4, #0xa]
	add r2, r3, r2
	strh r2, [r4, #2]
	ldrsh r1, [r4, r1]
	cmp r1, #0x30
	blt _0220FEF0
	bl ov96_0220FBDC
	b _0220FEF0
_0220FECC:
	ldr r1, _0220FF54 ; =0xFFFFC03F
	and r1, r2
	lsl r2, r2, #0x12
	lsr r2, r2, #0x18
	add r2, r2, #1
	lsl r2, r2, #0x18
	lsr r2, r2, #0x12
	orr r1, r2
	str r1, [r4, #4]
	lsl r1, r1, #0x12
	lsr r1, r1, #0x18
	cmp r1, #0x14
	blo _0220FEF0
	bl ov96_0220FBDC
	b _0220FEF0
_0220FEEC:
	bl GF_AssertFail
_0220FEF0:
	ldrh r0, [r5]
	mov r1, #0x7f
	bic r0, r1
	mov r1, #2
	ldrsh r1, [r4, r1]
	lsl r2, r1, #1
	asr r1, r2, #2
	lsr r1, r1, #0x1d
	add r1, r2, r1
	lsl r1, r1, #0xd
	lsr r2, r1, #0x10
	mov r1, #0x7f
	and r1, r2
	orr r0, r1
	strh r0, [r5]
	ldrh r1, [r5]
	ldr r0, _0220FF58 ; =0xFFFFF87F
	and r1, r0
	ldrb r0, [r4, #9]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x15
	orr r0, r1
	strh r0, [r5]
	ldrh r1, [r5]
	ldr r0, _0220FF5C ; =0xFFFFC7FF
	and r0, r1
	ldr r1, [r4, #4]
	lsl r1, r1, #0x1b
	lsr r1, r1, #0x1d
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	lsl r1, r1, #0x1d
	lsr r1, r1, #0x12
	orr r0, r1
	strh r0, [r5]
	ldrh r1, [r5]
	ldr r0, _0220FF60 ; =0xFFFF3FFF
	and r0, r1
	ldr r1, [r4, #4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x10
	orr r0, r1
	strh r0, [r5]
_0220FF4E:
	add sp, #8
	pop {r4, r5, r6, pc}
	nop
_0220FF54: .word 0xFFFFC03F
_0220FF58: .word 0xFFFFF87F
_0220FF5C: .word 0xFFFFC7FF
_0220FF60: .word 0xFFFF3FFF
	thumb_func_end ov96_0220FE38

	thumb_func_start ov96_0220FF64
ov96_0220FF64: ; 0x0220FF64
	str r1, [r0]
	bx lr
	thumb_func_end ov96_0220FF64

	thumb_func_start ov96_0220FF68
ov96_0220FF68: ; 0x0220FF68
	ldr r3, _0220FF84 ; =0x0221CF1C
	mov r2, #0
_0220FF6C:
	ldr r1, [r3]
	cmp r1, r0
	bhi _0220FF76
	add r0, r2, #0
	bx lr
_0220FF76:
	add r2, r2, #1
	add r3, r3, #4
	cmp r2, #4
	blt _0220FF6C
	mov r0, #0
	mvn r0, r0
	bx lr
	.balign 4, 0
_0220FF84: .word 0x0221CF1C
	thumb_func_end ov96_0220FF68

	thumb_func_start ov96_0220FF88
ov96_0220FF88: ; 0x0220FF88
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, r1, #0
	mov r4, #1
	bl ov96_0220FF68
	lsl r0, r0, #0x1c
	add r2, r5, #0
	ldr r3, [r5, #0x1c]
	ldr r1, _0221002C ; =0xFFFFF0FF
	lsr r0, r0, #0x14
	and r1, r3
	orr r0, r1
	str r0, [r5, #0x1c]
	lsl r0, r0, #0x14
	lsr r0, r0, #0x1c
	add r2, #0x1c
	cmp r0, #3
	bhi _0220FFD8
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_0220FFBA: ; jump table
	.short _0220FFC2 - _0220FFBA - 2 ; case 0
	.short _0220FFD0 - _0220FFBA - 2 ; case 1
	.short _0220FFC2 - _0220FFBA - 2 ; case 2
	.short _0220FFD0 - _0220FFBA - 2 ; case 3
_0220FFC2:
	ldr r1, [r2]
	mov r0, #0xff
	bic r1, r0
	mov r0, #0x1e
	orr r0, r1
	str r0, [r2]
	b _0220FFD8
_0220FFD0:
	ldr r1, [r2]
	mov r0, #0xff
	bic r1, r0
	str r1, [r2]
_0220FFD8:
	ldr r0, [r5, #0x1c]
	lsl r0, r0, #0x14
	lsr r0, r0, #0x1c
	cmp r0, #3
	bhs _0220FFE6
	mov r1, #4
	b _0220FFF4
_0220FFE6:
	bl MTRandom
	mov r1, #1
	and r0, r1
	add r0, r0, #1
	lsl r0, r0, #0x1a
	lsr r1, r0, #0x18
_0220FFF4:
	ldr r0, [r5, #0x1c]
	lsl r0, r0, #0x14
	lsr r0, r0, #0x1c
	beq _0220FFFE
	mov r4, #2
_0220FFFE:
	mov r2, #0
	cmp r4, #0
	ble _0221002A
	add r0, r5, #0
	add r0, #8
_02210008:
	ldr r3, [r0]
	lsl r3, r3, #0x1a
	lsr r3, r3, #0x1f
	bne _02210022
	mov r0, #0xc
	mul r0, r2
	add r3, r5, #4
	lsl r2, r2, #0x18
	add r0, r3, r0
	lsr r2, r2, #0x18
	bl ov96_0220FB98
	pop {r3, r4, r5, pc}
_02210022:
	add r2, r2, #1
	add r0, #0xc
	cmp r2, r4
	blt _02210008
_0221002A:
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0221002C: .word 0xFFFFF0FF
	thumb_func_end ov96_0220FF88

	thumb_func_start ov96_02210030
ov96_02210030: ; 0x02210030
	push {r3, r4, r5, r6, r7, lr}
	add r1, #0x28
	add r7, r0, #0
	add r0, r1, #0
	add r5, r2, #0
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [r7, #0x1c]
	lsl r1, r0, #0x18
	lsr r2, r1, #0x18
	bne _02210052
	add r0, r7, #0
	add r1, r5, #0
	bl ov96_0220FF88
	b _02210060
_02210052:
	mov r1, #0xff
	bic r0, r1
	sub r1, r2, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r0, r1
	str r0, [r7, #0x1c]
_02210060:
	mov r6, #0
	add r5, r7, #4
_02210064:
	ldr r2, [r7]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_0220FE38
	add r6, r6, #1
	add r4, r4, #2
	add r5, #0xc
	cmp r6, #2
	blt _02210064
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02210030

	thumb_func_start ov96_0221007C
ov96_0221007C: ; 0x0221007C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1c
	str r0, [sp, #0xc]
	add r7, r1, #0
	str r2, [sp, #0x10]
	str r3, [r0]
	mov r5, #0
	add r4, r0, #0
	mov r6, #5
_0221008E:
	mov r2, #0
	str r6, [sp]
	ldr r1, [sp, #0x10]
	add r0, r7, #0
	add r3, r2, #0
	str r6, [sp, #4]
	bl ov96_0220ED34
	str r0, [r4, #0x3c]
	add r5, r5, #1
	add r4, #0x1c
	cmp r5, #0xc
	blt _0221008E
	mov r0, #0
	str r0, [sp, #0x14]
	ldr r0, [sp, #0xc]
	add r0, r0, #4
	str r0, [sp, #0x18]
_022100B2:
	ldr r4, [sp, #0x18]
	mov r6, #0
_022100B6:
	cmp r6, #1
	bne _022100BE
	mov r5, #1
	b _022100C0
_022100BE:
	mov r5, #0
_022100C0:
	mov r0, #0
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r2, #0
	ldr r1, [sp, #0x10]
	str r5, [sp, #8]
	add r0, r7, #0
	add r3, r2, #0
	bl ov96_0220ECA4
	str r0, [r4]
	mov r0, #2
	str r0, [sp]
	mov r0, #0x14
	str r0, [sp, #4]
	mov r2, #0
	ldr r1, [sp, #0x10]
	add r0, r7, #0
	add r3, r2, #0
	str r5, [sp, #8]
	bl ov96_0220ECA4
	str r0, [r4, #8]
	add r6, r6, #1
	add r4, r4, #4
	cmp r6, #2
	blt _022100B6
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	mov r2, #0
	str r0, [sp, #4]
	ldr r1, [sp, #0x10]
	add r0, r7, #0
	add r3, r2, #0
	bl ov96_0220ED34
	ldr r1, [sp, #0x18]
	mov r2, #0
	str r0, [r1, #0x10]
	mov r0, #4
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r1, [sp, #0x10]
	add r0, r7, #0
	add r3, r2, #0
	bl ov96_0220ED34
	ldr r1, [sp, #0x18]
	str r0, [r1, #0x14]
	add r0, r1, #0
	add r0, #0x1c
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x14]
	add r0, r0, #1
	str r0, [sp, #0x14]
	cmp r0, #2
	blt _022100B2
	add sp, #0x1c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_0221007C

	thumb_func_start ov96_0221013C
ov96_0221013C: ; 0x0221013C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r5, r0, #0
	add r0, r1, #0
	str r1, [sp]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #4]
	ldr r2, [sp]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_0220DC7C
	ldr r2, [sp]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_0220DEAC
	ldr r0, [r4, #0x1c]
	lsr r0, r0, #0x1e
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x63
	lsl r0, r0, #2
	add r6, r5, r0
	ldr r0, [r4, #0x20]
	lsl r7, r1, #1
	lsl r0, r0, #0x19
	lsr r2, r0, #0x19
	ldrh r0, [r6, r7]
	cmp r2, r0
	beq _02210194
	lsl r2, r2, #0x10
	ldr r0, [r5]
	lsr r2, r2, #0x10
	bl ov96_02210390
_02210194:
	ldr r0, [r4, #0x20]
	lsl r0, r0, #0x19
	lsr r0, r0, #0x19
	strh r0, [r6, r7]
	ldr r0, [r4, #0x1c]
	lsl r0, r0, #2
	lsr r0, r0, #0x1a
	sub r1, r0, #1
	cmp r1, #0
	bgt _022101AA
	mov r1, #0
_022101AA:
	cmp r1, #0
	bgt _022101B0
	mov r1, #0
_022101B0:
	ldr r0, [sp, #4]
	add r0, #0xc4
	str r0, [sp, #4]
	ldr r0, [r0]
	bl ov96_0221040C
	ldr r1, [r4, #0x1c]
	ldr r0, [sp]
	lsl r1, r1, #2
	lsr r2, r1, #0x1a
	mov r1, #0x1e
	mul r1, r2
	bl ov96_021E6454
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0221013C

	thumb_func_start ov96_022101D0
ov96_022101D0: ; 0x022101D0
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	mov r4, #0
	add r5, r6, #0
_022101D8:
	ldr r0, [r5, #0x3c]
	cmp r0, #0
	bne _022101E2
	bl GF_AssertFail
_022101E2:
	ldr r0, [r5, #0x3c]
	bl sub_0200D9DC
	ldr r0, [r5, #0x44]
	cmp r0, #0
	beq _022101F2
	bl sub_0200E390
_022101F2:
	add r4, r4, #1
	add r5, #0x1c
	cmp r4, #0xc
	blt _022101D8
	mov r7, #0
	add r6, r6, #4
_022101FE:
	mov r4, #0
	add r5, r6, #0
_02210202:
	ldr r0, [r5]
	bl sub_0200D9DC
	ldr r0, [r5, #8]
	bl sub_0200D9DC
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _02210202
	ldr r0, [r6, #0x10]
	bl sub_0200D9DC
	ldr r0, [r6, #0x14]
	bl sub_0200D9DC
	add r7, r7, #1
	add r6, #0x1c
	cmp r7, #2
	blt _022101FE
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022101D0

	thumb_func_start ov96_0221022C
ov96_0221022C: ; 0x0221022C
	ldr r3, _02210238 ; =AddWindow
	add r1, r0, #0
	ldr r0, [r1, #8]
	add r1, #0x24
	ldr r2, _0221023C ; =0x0221CEEC
	bx r3
	.balign 4, 0
_02210238: .word AddWindow
_0221023C: .word 0x0221CEEC
	thumb_func_end ov96_0221022C

	thumb_func_start ov96_02210240
ov96_02210240: ; 0x02210240
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r6, r1, #0
	ldr r0, [sp, #0x28]
	mov r1, #0xe8
	add r7, r2, #0
	str r3, [sp, #8]
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0xe8
	bl MIi_CpuFill8
	str r5, [r4, #8]
	str r6, [r4, #0xc]
	add r0, sp, #0x10
	ldrb r0, [r0, #0x14]
	strb r0, [r4, #0x1c]
	ldr r0, [sp, #0x28]
	str r0, [r4, #4]
	ldr r0, [sp, #8]
	str r7, [r4, #0x10]
	str r0, [r4, #0x14]
	ldr r0, [sp, #0x20]
	str r0, [r4, #0x18]
	ldr r0, [sp, #0x2c]
	str r0, [r4]
	add r0, r4, #0
	bl ov96_02210538
	mov r0, #8
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	mov r2, #0xd2
	mov r3, #0x4c
	bl ov96_022104D8
	str r0, [r4, #0x68]
	add r0, r4, #0
	bl ov96_0221075C
	add r0, r4, #0
	bl ov96_0221065C
	add r0, r4, #0
	bl ov96_0221069C
	ldr r0, [r4, #4]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xed
	mov r1, #0xe
	mov r2, #1
	add r3, #0x24
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x20]
	add r0, r4, #0
	mov r1, #0x3c
	bl ov96_0221040C
	add r0, r4, #0
	mov r1, #0
	bl ov96_0221058C
	add r0, r4, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02210240

	thumb_func_start ov96_022102D4
ov96_022102D4: ; 0x022102D4
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bne _022102DE
	bl GF_AssertFail
_022102DE:
	ldr r0, [r6, #0x20]
	bl FreeToHeap
	add r5, r6, #0
	mov r4, #0
	add r5, #0x28
_022102EA:
	add r0, r5, #0
	bl RemoveWindow
	add r4, r4, #1
	add r5, #0x10
	cmp r4, #4
	blt _022102EA
	mov r5, #0
	add r4, r6, #0
_022102FC:
	ldr r0, [r4, #0x68]
	cmp r0, #0
	bne _02210306
	bl GF_AssertFail
_02210306:
	ldr r0, [r4, #0x68]
	bl sub_0200D9DC
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #0x1f
	blt _022102FC
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_022102D4

	thumb_func_start ov96_0221031C
ov96_0221031C: ; 0x0221031C
	ldr r3, _02210320 ; =ov96_022107D4
	bx r3
	.balign 4, 0
_02210320: .word ov96_022107D4
	thumb_func_end ov96_0221031C

	thumb_func_start ov96_02210324
ov96_02210324: ; 0x02210324
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r7, r1, #0
	add r4, r2, #0
	bl ov96_021E5F24
	cmp r7, r0
	bne _02210386
	add r0, r5, #0
	add r0, #0xe6
	ldrh r0, [r0]
	cmp r4, r0
	beq _02210386
	cmp r0, r4
	bls _02210352
	add r0, r5, #0
	add r0, #0xe5
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r5, #0
	add r0, #0xe5
	strb r1, [r0]
_02210352:
	add r0, r5, #0
	add r0, #0xe5
	ldrb r0, [r0]
	lsl r0, r0, #7
	add r1, r4, r0
	ldr r0, _0221038C ; =0x000003E7
	cmp r1, r0
	ble _02210366
	add r1, r0, #0
	b _0221036C
_02210366:
	cmp r1, #0
	bge _0221036C
	mov r1, #0
_0221036C:
	lsl r1, r1, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_0221058C
	add r0, r5, #0
	add r0, #0xe6
	ldrh r0, [r0]
	add r5, #0xe6
	sub r0, r4, r0
	lsl r0, r0, #0x10
	lsr r6, r0, #0x10
	strh r4, [r5]
_02210386:
	lsl r0, r6, #0x18
	lsr r0, r0, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0221038C: .word 0x000003E7
	thumb_func_end ov96_02210324

	thumb_func_start ov96_02210390
ov96_02210390: ; 0x02210390
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	cmp r5, #0
	bne _022103A0
	bl GF_AssertFail
_022103A0:
	cmp r4, #4
	blo _022103A8
	bl GF_AssertFail
_022103A8:
	add r0, r4, #3
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x68]
	add r1, r4, #4
	bl sub_0200DC4C
	ldr r0, [r5]
	bl ov96_021E5F24
	cmp r4, r0
	bne _02210402
	add r0, r5, #0
	add r0, #0xe6
	ldrh r0, [r0]
	cmp r6, r0
	beq _02210402
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_02210324
	cmp r0, #1
	beq _022103FE
	cmp r0, #2
	bne _022103E6
	ldr r0, _02210408 ; =0x0000088D
	mov r1, #0x80
	bl sub_02006134
	b _022103FE
_022103E6:
	cmp r0, #3
	ldr r0, _02210408 ; =0x0000088D
	bne _022103F6
	mov r1, #1
	lsl r1, r1, #8
	bl sub_02006134
	b _022103FE
_022103F6:
	mov r1, #5
	lsl r1, r1, #6
	bl sub_02006134
_022103FE:
	mov r0, #1
	pop {r4, r5, r6, pc}
_02210402:
	mov r0, #0
	pop {r4, r5, r6, pc}
	nop
_02210408: .word 0x0000088D
	thumb_func_end ov96_02210390

	thumb_func_start ov96_0221040C
ov96_0221040C: ; 0x0221040C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r6, r0, #0
	add r0, r1, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	add r0, r6, #0
	add r0, #0xe4
	ldrb r0, [r0]
	cmp r0, #0
	beq _0221044E
	cmp r0, #1
	beq _02210478
	cmp r0, #2
	beq _022104A6
	b _022104A2
_0221044E:
	cmp r4, #0x14
	bhi _022104A6
	mov r4, #0
	add r5, r6, #0
	mov r7, #2
_02210458:
	ldr r0, [r5, #0x6c]
	add r1, r7, #0
	bl sub_0200DD10
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _02210458
	add r0, r6, #0
	add r0, #0xe4
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r6, #0
	add r0, #0xe4
	strb r1, [r0]
	b _022104A6
_02210478:
	cmp r4, #3
	bhi _022104A6
	mov r4, #0
	add r5, r6, #0
	mov r7, #3
_02210482:
	ldr r0, [r5, #0x6c]
	add r1, r7, #0
	bl sub_0200DD10
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _02210482
	add r0, r6, #0
	add r0, #0xe4
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r6, #0
	add r0, #0xe4
	strb r1, [r0]
	b _022104A6
_022104A2:
	bl GF_AssertFail
_022104A6:
	ldr r1, [sp, #4]
	ldr r0, [r6, #0x6c]
	add r1, #9
	str r1, [sp, #4]
	bl sub_0200DC4C
	ldr r1, [sp]
	ldr r0, [r6, #0x70]
	add r1, #9
	str r1, [sp]
	bl sub_0200DC4C
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221040C

	thumb_func_start ov96_022104C4
ov96_022104C4: ; 0x022104C4
	add r1, r0, #0
	add r0, #0xe5
	add r1, #0xe6
	ldrb r0, [r0]
	ldrh r1, [r1]
	lsl r0, r0, #7
	add r0, r1, r0
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	bx lr
	thumb_func_end ov96_022104C4

	thumb_func_start ov96_022104D8
ov96_022104D8: ; 0x022104D8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _02210534 ; =0x0221D17C
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_022104EA:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _022104EA
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _022104FE
	bl GF_AssertFail
_022104FE:
	cmp r4, #0
	bne _02210506
	bl GF_AssertFail
_02210506:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x10
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02210534: .word 0x0221D17C
	thumb_func_end ov96_022104D8

	thumb_func_start ov96_02210538
ov96_02210538: ; 0x02210538
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bne _02210542
	bl GF_AssertFail
_02210542:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	bne _0221054C
	bl GF_AssertFail
_0221054C:
	add r6, r5, #0
	ldr r7, _02210588 ; =0x0221D15C
	mov r4, #0
	add r6, #0x28
_02210554:
	lsl r1, r4, #4
	lsl r2, r4, #3
	ldr r0, [r5, #0x10]
	add r1, r6, r1
	add r2, r7, r2
	bl AddWindow
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _02210554
	mov r2, #0
	str r2, [sp]
	ldr r0, [r5, #0x10]
	mov r1, #7
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r5, #4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02210588: .word 0x0221D15C
	thumb_func_end ov96_02210538

	thumb_func_start ov96_0221058C
ov96_0221058C: ; 0x0221058C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	mov r0, #0x64
	mul r0, r4
	sub r0, r6, r0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_02210616:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x24]
	lsl r2, r4, #0x1a
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	mov r1, #6
	lsr r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r3, #0
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #0x10]
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02210616
	ldr r0, [r5, #0x10]
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221058C

	thumb_func_start ov96_0221065C
ov96_0221065C: ; 0x0221065C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	mov r6, #0
	mov r4, #0xe6
	add r5, r7, #0
_02210668:
	add r0, r6, #0
	add r0, #9
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	lsl r2, r4, #0x10
	ldr r0, [r7, #8]
	ldr r1, [r7, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x4c
	bl ov96_022104D8
	mov r1, #1
	str r0, [r5, #0x6c]
	bl sub_0200DD10
	add r6, r6, #1
	add r4, #0x10
	add r5, r5, #4
	cmp r6, #2
	blt _02210668
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221065C

	thumb_func_start ov96_0221069C
ov96_0221069C: ; 0x0221069C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r5, r0, #0
	ldr r0, _02210750 ; =0x00000000
	str r0, [sp, #0x1c]
	bne _022106AC
	bl GF_AssertFail
_022106AC:
	add r6, r5, #0
	mov r4, #0
	str r5, [sp, #0x10]
	add r6, #0x28
_022106B4:
	ldrb r0, [r5, #0x1c]
	cmp r4, r0
	bne _022106C6
	mov r0, #8
	str r0, [sp, #0x18]
	mov r0, #0x48
	mov r7, #0
	str r0, [sp, #0x14]
	b _022106E4
_022106C6:
	ldr r0, [sp, #0x1c]
	ldr r1, _02210754 ; =0x0221D14C
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp, #0x1c]
	ldr r2, _02210754 ; =0x0221D14C
	lsl r0, r0, #2
	add r1, r1, r0
	ldrsh r0, [r2, r0]
	str r0, [sp, #0x18]
	mov r0, #2
	ldrsh r0, [r1, r0]
	str r0, [sp, #0x14]
	str r7, [sp, #0x1c]
_022106E4:
	ldr r0, [r5]
	add r1, r4, #0
	bl ov96_021E5F34
	ldr r1, [r5, #4]
	bl sub_02028F68
	lsl r7, r7, #4
	str r0, [sp, #0x20]
	add r0, r6, r7
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r0, #0
	str r0, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02210758 ; =0x000F0E00
	mov r1, #0
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r2, [sp, #0x20]
	add r0, r6, r7
	add r3, r1, #0
	bl sub_020200FC
	add r0, r6, r7
	bl CopyWindowToVram
	ldr r0, [sp, #0x20]
	bl String_dtor
	lsl r0, r4, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #0x41
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	ldr r2, [sp, #0x18]
	ldr r3, [sp, #0x14]
	bl ov96_022104D8
	ldr r1, [sp, #0x10]
	add r4, r4, #1
	str r0, [r1, #0x74]
	add r0, r1, #0
	add r0, r0, #4
	str r0, [sp, #0x10]
	cmp r4, #4
	blt _022106B4
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02210750: .word 0x00000000
_02210754: .word 0x0221D14C
_02210758: .word 0x000F0E00
	thumb_func_end ov96_0221069C

	thumb_func_start ov96_0221075C
ov96_0221075C: ; 0x0221075C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	add r5, r0, #0
	mov r0, #0
	str r0, [sp, #0x10]
	mov r0, #8
	mov r7, #7
	str r0, [sp, #0xc]
_0221076C:
	ldr r0, [sp, #0x10]
	mov r4, #0
	add r0, r0, #4
	lsl r0, r0, #3
	str r0, [sp, #8]
	ldr r0, [sp, #0xc]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	str r0, [sp, #0x14]
_0221077E:
	add r0, r4, r7
	cmp r4, #0
	bne _02210788
	mov r2, #1
	b _0221078C
_02210788:
	mov r2, #0
	mvn r2, r2
_0221078C:
	ldr r1, [sp, #8]
	lsl r0, r0, #2
	mul r2, r1
	mov r1, #0x80
	add r6, r5, r0
	mov r0, #0x14
	add r1, r1, r2
	str r0, [sp]
	mov r0, #0x40
	lsl r1, r1, #0x10
	str r0, [sp, #4]
	asr r2, r1, #0x10
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	ldr r3, [sp, #0x14]
	bl ov96_022104D8
	mov r1, #3
	str r0, [r6, #0x68]
	bl sub_0200DD54
	add r4, r4, #1
	cmp r4, #2
	blt _0221077E
	ldr r0, [sp, #0xc]
	add r7, r7, #2
	add r0, #0x10
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #0xc
	blt _0221076C
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221075C

	thumb_func_start ov96_022107D4
ov96_022107D4: ; 0x022107D4
	push {r4, r5, r6, lr}
	mov r4, #0
	add r5, r0, #0
	add r6, r4, #0
_022107DC:
	ldr r0, [r5, #0x68]
	add r1, r6, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #0x1f
	blt _022107DC
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_022107D4

	thumb_func_start ov96_022107F0
ov96_022107F0: ; 0x022107F0
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	str r0, [sp]
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0xc0
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0xc0
	add r7, r0, #0
	bl MIi_CpuFill8
	str r4, [r7]
	ldr r0, [sp]
	mov r4, #0
	str r0, [r7, #4]
	mov r0, #4
	sub r1, r0, r5
	add r0, r7, #0
	add r0, #0xbc
	strb r1, [r0]
	add r0, r7, #0
	add r0, #0xbc
	ldrb r0, [r0]
	cmp r0, #0
	ble _0221084A
	add r6, r7, #0
	add r6, #8
_0221082E:
	lsl r1, r5, #0x18
	ldr r2, [sp]
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_022108BC
	add r0, r7, #0
	add r0, #0xbc
	ldrb r0, [r0]
	add r4, r4, #1
	add r5, r5, #1
	add r6, #0x3c
	cmp r4, r0
	blt _0221082E
_0221084A:
	add r0, r7, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022107F0

	thumb_func_start ov96_02210850
ov96_02210850: ; 0x02210850
	ldr r3, _02210854 ; =FreeToHeap
	bx r3
	.balign 4, 0
_02210854: .word FreeToHeap
	thumb_func_end ov96_02210850

	thumb_func_start ov96_02210858
ov96_02210858: ; 0x02210858
	push {r3, r4, r5, r6, r7, lr}
	str r0, [sp]
	ldr r0, [r0, #4]
	bl ov96_021E5DC4
	mov r7, #0
	add r6, r0, #0
	add r4, r7, #0
_02210868:
	lsl r1, r4, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_0220E850
	add r4, r4, #1
	add r7, r7, r0
	cmp r4, #4
	blt _02210868
	ldr r0, [sp]
	mov r5, #0
	add r0, #0xbc
	ldrb r0, [r0]
	cmp r0, #0
	ble _022108BA
	asr r0, r7, #1
	lsr r0, r0, #0x1e
	ldr r4, [sp]
	add r0, r7, r0
	lsl r0, r0, #0xe
	add r4, #8
	lsr r7, r0, #0x10
_02210894:
	lsl r1, r5, #0x18
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_0220E850
	add r2, r0, #0
	lsl r2, r2, #0x10
	add r0, r4, #0
	add r1, r7, #0
	lsr r2, r2, #0x10
	bl ov96_022108EC
	ldr r0, [sp]
	add r5, r5, #1
	add r0, #0xbc
	ldrb r0, [r0]
	add r4, #0x3c
	cmp r5, r0
	blt _02210894
_022108BA:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02210858

	thumb_func_start ov96_022108BC
ov96_022108BC: ; 0x022108BC
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r7, r2, #0
	mov r1, #0
	mov r2, #0x3c
	add r5, r0, #0
	bl MIi_CpuFill8
	lsl r0, r4, #1
	mov r6, #0
	add r4, r4, r0
_022108D2:
	lsl r2, r4, #0x18
	add r0, r5, #0
	add r1, r7, #0
	lsr r2, r2, #0x18
	bl ov96_02210980
	add r6, r6, #1
	add r4, r4, #1
	add r5, #0x14
	cmp r6, #3
	blt _022108D2
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022108BC

	thumb_func_start ov96_022108EC
ov96_022108EC: ; 0x022108EC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	mov r4, #0
_022108F6:
	add r0, r5, #0
	add r1, r6, #0
	add r2, r7, #0
	bl ov96_02210AE0
	add r4, r4, #1
	add r5, #0x14
	cmp r4, #3
	blt _022108F6
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022108EC

	thumb_func_start ov96_0221090C
ov96_0221090C: ; 0x0221090C
	push {r3, r4, r5, lr}
	add r4, r0, #0
	ldr r0, [r4, #0xc]
	lsl r0, r0, #0x19
	lsr r0, r0, #0x1e
	lsl r5, r0, #1
	bl MTRandom
	ldr r1, _02210970 ; =0x0221D1B1
	ldrb r1, [r1, r5]
	bl _u32_div_f
	ldr r0, _02210974 ; =0x0221D1B0
	ldrb r0, [r0, r5]
	add r0, r0, r1
	strh r0, [r4, #6]
	mov r0, #6
	ldrsh r0, [r4, r0]
	lsl r0, r0, #3
	strh r0, [r4, #6]
	ldr r1, [r4, #0xc]
	lsl r0, r1, #0x1b
	lsr r2, r0, #0x1e
	mov r0, #0xc
	mul r0, r2
	ldr r2, _02210978 ; =0x0221D1C4
	lsl r1, r1, #0x19
	lsr r1, r1, #0x1e
	lsl r1, r1, #2
	add r0, r2, r0
	ldrsh r0, [r1, r0]
	strh r0, [r4, #8]
	bl MTRandom
	mov r1, #5
	bl _u32_div_f
	mov r0, #8
	ldrsh r2, [r4, r0]
	sub r0, r1, #2
	lsl r0, r0, #3
	add r0, r2, r0
	strh r0, [r4, #8]
	ldr r1, [r4, #0xc]
	mov r0, #1
	bic r1, r0
	ldr r0, _0221097C ; =0xFFFFF87F
	and r0, r1
	str r0, [r4, #0xc]
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02210970: .word 0x0221D1B1
_02210974: .word 0x0221D1B0
_02210978: .word 0x0221D1C4
_0221097C: .word 0xFFFFF87F
	thumb_func_end ov96_0221090C

	thumb_func_start ov96_02210980
ov96_02210980: ; 0x02210980
	push {r3, r4, r5, r6, r7, lr}
	add r7, r2, #0
	add r5, r0, #0
	add r6, r1, #0
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	str r6, [r5]
	ldr r2, [r5, #0xc]
	mov r1, #0x18
	bic r2, r1
	lsl r1, r4, #0x1e
	lsr r1, r1, #0x1b
	orr r2, r1
	mov r1, #0x60
	lsr r0, r0, #0x18
	bic r2, r1
	lsl r1, r0, #0x1e
	lsr r1, r1, #0x19
	orr r1, r2
	lsl r2, r4, #1
	lsl r0, r0, #3
	add r0, r2, r0
	ldr r2, _022109D4 ; =0xFFF807FF
	and r2, r1
	lsl r1, r0, #0x18
	lsr r1, r1, #0xd
	orr r1, r2
	str r1, [r5, #0xc]
	strb r0, [r5, #0x10]
	add r0, r5, #0
	bl ov96_0221090C
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022109D4: .word 0xFFF807FF
	thumb_func_end ov96_02210980

	thumb_func_start ov96_022109D8
ov96_022109D8: ; 0x022109D8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r6, r0, #0
	ldr r0, [r6]
	bl ov96_021E5DC4
	ldr r1, [r6, #0xc]
	add r7, r0, #0
	lsl r1, r1, #0x1b
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	ldr r0, [r6]
	lsr r1, r1, #0x18
	bl ov96_0220E7BC
	ldr r0, [r6, #0xc]
	lsl r1, r0, #0x15
	lsr r1, r1, #0x1c
	beq _02210A04
	cmp r1, #1
	beq _02210A68
	b _02210ABA
_02210A04:
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	beq _02210A0E
	bl GF_AssertFail
_02210A0E:
	mov r0, #8
	ldrsh r0, [r6, r0]
	add r4, r6, #0
	mov r5, #0
	strh r0, [r6, #4]
	mov r0, #6
	str r0, [sp, #4]
	mov r0, #1
	add r4, #0xc
	str r0, [sp]
_02210A22:
	lsl r1, r5, #0x18
	add r0, r7, #0
	lsr r1, r1, #0x18
	bl ov96_0220E74C
	ldr r0, [r0, #4]
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x1f
	beq _02210A60
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0x38
	bl ov96_02210BD0
	cmp r0, #0
	beq _02210A60
	ldr r0, [r4]
	ldr r1, [sp, #4]
	bic r0, r1
	lsl r1, r5, #0x1e
	lsr r1, r1, #0x1d
	orr r1, r0
	ldr r0, [sp]
	bic r1, r0
	mov r0, #1
	orr r1, r0
	ldr r0, _02210ADC ; =0xFFFFF87F
	and r1, r0
	mov r0, #0x80
	orr r0, r1
	str r0, [r4]
_02210A60:
	add r5, r5, #1
	cmp r5, #2
	blt _02210A22
	b _02210ABE
_02210A68:
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	cmp r0, #1
	beq _02210A74
	bl GF_AssertFail
_02210A74:
	ldr r1, [r6, #0xc]
	lsl r0, r1, #0x1f
	lsr r0, r0, #0x1f
	beq _02210ABE
	lsl r1, r1, #0x1d
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	add r0, r7, #0
	lsr r1, r1, #0x18
	bl ov96_0220E74C
	add r1, r0, #0
	ldr r0, [r1, #4]
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x1f
	beq _02210AAC
	mov r0, #6
	ldrsh r2, [r6, r0]
	mov r0, #0x12
	lsl r0, r0, #4
	add r0, r2, r0
	lsl r0, r0, #0x10
	ldrb r1, [r1, #9]
	asr r0, r0, #0x10
	bl ov96_0220E6DC
	strh r0, [r6, #4]
	b _02210ABE
_02210AAC:
	ldr r1, [r6, #0xc]
	mov r0, #1
	bic r1, r0
	ldr r0, _02210ADC ; =0xFFFFF87F
	and r0, r1
	str r0, [r6, #0xc]
	b _02210ABE
_02210ABA:
	bl GF_AssertFail
_02210ABE:
	ldr r3, [r6, #0xc]
	add r0, r7, #0
	lsl r2, r3, #0x1b
	lsl r3, r3, #0x19
	lsr r2, r2, #0x1e
	lsr r3, r3, #0x1e
	lsl r2, r2, #0x18
	lsl r3, r3, #0x18
	add r1, r6, #4
	lsr r2, r2, #0x18
	lsr r3, r3, #0x18
	bl ov96_0220E818
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02210ADC: .word 0xFFFFF87F
	thumb_func_end ov96_022109D8

	thumb_func_start ov96_02210AE0
ov96_02210AE0: ; 0x02210AE0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	ldr r2, [r5, #0xc]
	str r0, [sp, #4]
	lsl r1, r2, #0x1b
	lsl r2, r2, #0x19
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_0220E70C
	cmp r0, #0
	beq _02210BC4
	ldrb r0, [r5, #0x10]
	sub r0, r0, #1
	strb r0, [r5, #0x10]
	ldrb r0, [r5, #0x10]
	cmp r0, #0
	bne _02210B22
	add r0, r5, #0
	bl ov96_0221090C
	mov r0, #0x5a
	strb r0, [r5, #0x10]
_02210B22:
	ldr r1, [r5, #0xc]
	ldr r0, _02210BC8 ; =0xFFF807FF
	and r0, r1
	lsl r1, r1, #0xd
	lsr r1, r1, #0x18
	sub r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0xd
	orr r0, r1
	str r0, [r5, #0xc]
	lsl r0, r0, #0xd
	lsr r0, r0, #0x18
	bne _02210B50
	add r0, r5, #0
	bl ov96_022109D8
	ldr r1, [r5, #0xc]
	ldr r0, _02210BC8 ; =0xFFF807FF
	and r1, r0
	mov r0, #0xa
	lsl r0, r0, #0xc
	orr r0, r1
	str r0, [r5, #0xc]
_02210B50:
	ldr r1, [r5, #0xc]
	lsl r0, r1, #0x1f
	lsr r0, r0, #0x1f
	beq _02210BC4
	lsl r1, r1, #0x1d
	add r0, r5, #0
	lsr r1, r1, #0x1e
	mov r2, #0x10
	bl ov96_02210BD0
	cmp r0, #0
	beq _02210BC4
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	add r0, sp, #8
	str r0, [sp]
	ldr r2, [r5, #0xc]
	add r7, r1, #0
	lsl r1, r2, #0x1b
	lsl r2, r2, #0x19
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	add r3, sp, #0xc
	bl ov96_0220E770
	add r4, #0x14
	cmp r4, r6
	bge _02210B9C
	mov r0, #0
	b _02210BA8
_02210B9C:
	ldr r0, [r5, #0xc]
	lsl r0, r0, #0x19
	lsr r0, r0, #0x1e
	lsl r1, r0, #2
	ldr r0, _02210BCC ; =0x0221D1B8
	ldr r0, [r0, r1]
_02210BA8:
	cmp r7, r0
	bge _02210BC4
	ldr r2, [r5, #0xc]
	ldr r0, [sp, #4]
	lsl r1, r2, #0x1b
	lsl r2, r2, #0x19
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_0220E834
_02210BC4:
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02210BC8: .word 0xFFF807FF
_02210BCC: .word 0x0221D1B8
	thumb_func_end ov96_02210AE0

	thumb_func_start ov96_02210BD0
ov96_02210BD0: ; 0x02210BD0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r0, #0
	ldr r0, [r4]
	add r5, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	add r7, r0, #0
	bl ov96_0220E74C
	add r5, r0, #0
	mov r0, #2
	ldrsh r1, [r5, r0]
	mov r0, #0x12
	lsl r0, r0, #4
	cmp r1, r0
	bge _02210BFE
	add sp, #0x10
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02210BFE:
	add r0, sp, #8
	str r0, [sp]
	ldr r2, [r4, #0xc]
	add r0, r7, #0
	lsl r1, r2, #0x1b
	lsl r2, r2, #0x19
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	add r3, sp, #0xc
	bl ov96_0220E770
	mov r0, #2
	ldrsh r1, [r5, r0]
	mov r0, #0x12
	lsl r0, r0, #4
	sub r0, r1, r0
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	str r0, [sp]
	str r6, [sp, #4]
	mov r3, #0
	add r2, sp, #8
	mov r0, #4
	mov r1, #6
	ldrsh r0, [r2, r0]
	ldrsh r1, [r2, r1]
	ldrsh r3, [r5, r3]
	ldr r2, [sp, #8]
	bl ov96_02210C48
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02210BD0

	thumb_func_start ov96_02210C48
ov96_02210C48: ; 0x02210C48
	push {r4, r5}
	ldr r5, _02210C94 ; =0xFFFFFFF8
	mov r4, #0x10
	add r5, sp
	ldrsh r4, [r5, r4]
	sub r4, r1, r4
	bpl _02210C5A
	neg r1, r4
	b _02210C5C
_02210C5A:
	add r1, r4, #0
_02210C5C:
	cmp r4, #0
	bge _02210C62
	neg r4, r4
_02210C62:
	sub r3, r0, r3
	bpl _02210C6A
	neg r0, r3
	b _02210C6C
_02210C6A:
	add r0, r3, #0
_02210C6C:
	cmp r3, #0
	bge _02210C72
	neg r3, r3
_02210C72:
	ldr r5, [sp, #0xc]
	add r2, r2, r5
	add r5, r2, #0
	mul r5, r2
	add r2, r3, #0
	mul r2, r0
	add r0, r4, #0
	mul r0, r1
	add r0, r2, r0
	cmp r5, r0
	blt _02210C8E
	mov r0, #1
	pop {r4, r5}
	bx lr
_02210C8E:
	mov r0, #0
	pop {r4, r5}
	bx lr
	.balign 4, 0
_02210C94: .word 0xFFFFFFF8
	thumb_func_end ov96_02210C48

	thumb_func_start ov96_02210C98
ov96_02210C98: ; 0x02210C98
	push {r4, r5, r6, r7, lr}
	sub sp, #0x1fc
	sub sp, #0x98
	str r0, [sp, #0x14]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E5DD4
	cmp r0, #5
	bls _02210CB4
	bl _02211626
_02210CB4:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02210CC0: ; jump table
	.short _02210CCC - _02210CC0 - 2 ; case 0
	.short _02210DCE - _02210CC0 - 2 ; case 1
	.short _02210E1A - _02210CC0 - 2 ; case 2
	.short _022111D4 - _02210CC0 - 2 ; case 3
	.short _0221123C - _02210CC0 - 2 ; case 4
	.short _02211616 - _02210CC0 - 2 ; case 5
_02210CCC:
	mov r2, #5
	mov r0, #0x5c
	mov r1, #0x93
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _02211078 ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _0221107C ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_022117CC
	mov r1, #0x82
	ldr r0, [sp, #0x14]
	lsl r1, r1, #4
	bl ov96_021E5D94
	mov r2, #0x82
	mov r1, #0
	lsl r2, r2, #4
	add r5, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x93
	mov r1, #0x28
	bl AllocFromHeap
	ldr r1, _02211080 ; =0x0000081C
	mov r2, #0x28
	str r0, [r5, r1]
	ldr r0, [r5, r1]
	mov r1, #0
	bl MIi_CpuFill8
	mov r0, #0x93
	bl sub_0201AC88
	str r0, [r5, #4]
	ldr r0, [sp, #0x14]
	mov r1, #8
	bl ov96_021E6670
	mov r0, #0x85
	str r0, [sp, #0x108]
	mov r0, #1
	lsl r0, r0, #0x12
	str r0, [sp, #0x10c]
	lsr r0, r0, #4
	mov r2, #0x93
	str r0, [sp, #0x110]
	ldr r3, _02211084 ; =0x00300010
	str r2, [sp, #0x114]
	mov r1, #0x10
	add r0, sp, #0x108
	str r1, [sp]
	bl ov96_021E92B0
	bl sub_020B78D4
	mov r0, #1
	str r0, [sp]
	mov r1, #0x7e
	str r1, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	mov r3, #0x20
	str r3, [sp, #0xc]
	mov r2, #0x93
	str r2, [sp, #0x10]
	add r2, r0, #0
	bl sub_0200B150
	mov r1, #0x93
	str r1, [r5, #0x58]
	mov r0, #4
	bl sub_02002CEC
	ldr r0, [r5, #4]
	bl ov96_022118C4
	add r0, r5, #0
	bl ov96_0221362C
	ldr r0, [sp, #0x14]
	bl ov96_022140F4
	mov r4, #0
	add r6, r4, #0
_02210DA0:
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_02214044
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _02210DA0
	add r0, r5, #0
	bl ov96_022141F8
	ldr r0, _02211088 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	bl _02211626
_02210DCE:
	ldr r0, [r4, #0x58]
	ldr r1, [r4, #4]
	ldr r2, [sp, #0x14]
	bl ov96_0221464C
	mov r1, #0x75
	lsl r1, r1, #4
	str r0, [r4, r1]
	ldr r0, [sp, #0x14]
	bl ov96_021E5D34
	add r5, r0, #0
	ldr r0, [sp, #0x14]
	bl ov96_021E5EE8
	add r2, r0, #0
	mov r1, #4
	ldr r0, [r4, #0x58]
	sub r1, r1, r5
	bl ov96_02214A24
	ldr r1, _0221108C ; =0x0000074C
	mov r2, #1
	str r0, [r4, r1]
	ldr r0, [r4, #0x58]
	ldr r1, _02211090 ; =0x00000AAF
	bl ov96_021E9A78
	ldr r1, _02211094 ; =0x00000744
	str r0, [r4, r1]
	ldr r0, [sp, #0x14]
	bl ov96_021E64B8
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	bl _02211626
_02210E1A:
	ldr r5, _02211098 ; =0x0221D238
	add r3, sp, #0xfc
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	ldr r0, [r4, #0x58]
	bl ov96_021EB180
	mov r1, #0
	str r0, [r4]
	mov r0, #2
	lsl r0, r0, #0x14
	str r0, [sp]
	ldr r0, [r4]
	add r2, r1, #0
	add r3, r1, #0
	bl ov96_021EB5C8
	ldr r0, [r4]
	bl ov96_021EB5E8
	str r0, [sp]
	ldr r3, _02211094 ; =0x00000744
	ldr r0, [r4, #0x58]
	ldr r3, [r4, r3]
	mov r1, #0xc
	mov r2, #8
	bl ov96_021EA854
	ldr r1, _0221109C ; =0x00000748
	mov r2, #0x65
	str r0, [r4, r1]
	ldr r0, [r4]
	mov r1, #0
	bl ov96_021EB29C
	ldr r0, [r4]
	mov r1, #1
	mov r2, #0x66
	bl ov96_021EB29C
	mov r0, #1
	str r0, [sp]
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0x12
	mov r3, #0x65
	bl ov96_021EB2BC
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0xf
	mov r3, #0x65
	bl ov96_021EB2F4
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0x11
	mov r3, #0x65
	bl ov96_021EB334
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0x10
	mov r3, #0x65
	bl ov96_021EB36C
	mov r0, #2
	str r0, [sp]
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0xe
	mov r3, #0x66
	bl ov96_021EB2BC
	mov r0, #2
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0xb
	mov r3, #0x66
	bl ov96_021EB2F4
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0xd
	mov r3, #0x66
	bl ov96_021EB334
	ldr r0, [r4]
	mov r1, #0xec
	mov r2, #0xc
	mov r3, #0x66
	bl ov96_021EB36C
	ldr r0, [r4]
	bl ov96_021EB3A4
	mov r0, #0
	str r0, [sp, #0x54]
	mov r7, #7
_02210EF6:
	ldr r0, [sp, #0x54]
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	ldr r0, [sp, #0x54]
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	mul r0, r5
	add r2, r4, r0
	mov r0, #0x7c
	mul r0, r1
	add r5, r2, r0
	mov r0, #2
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #5
	str r0, [r5, #0x60]
	bl ov96_021EB630
	mov r6, #0
_02210F30:
	str r7, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #0x2f
	str r0, [r5, #0x64]
	bl ov96_021EB630
	add r6, r6, #1
	add r5, r5, #4
	cmp r6, #3
	blt _02210F30
	ldr r0, [sp, #0x54]
	add r0, r0, #1
	str r0, [sp, #0x54]
	cmp r0, #0xc
	blt _02210EF6
	ldr r0, _022110A0 ; =0x0000062C
	mov r6, #0
	add r5, r4, r0
	add r7, sp, #0xf0
_02210F60:
	mov r0, #0
	str r0, [r7]
	str r0, [r7, #4]
	str r0, [r7, #8]
	mov r0, #3
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r5]
	mov r0, #8
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	str r0, [r5, #4]
	ldr r0, [r5]
	mov r1, #0xa
	bl ov96_021EB564
	ldr r0, [r5, #4]
	mov r1, #0xd
	bl ov96_021EB564
	ldr r0, [r5]
	mov r1, #0x2e
	bl ov96_021EB630
	ldr r0, [r5, #4]
	mov r1, #0x2d
	bl ov96_021EB630
	add r0, r5, #0
	bl ov96_02213444
	add r1, r5, #0
	add r1, #0x39
	mov r0, #0
	strb r0, [r1]
	mov r0, #2
	lsl r0, r0, #0x12
	str r0, [sp, #0xf0]
	mov r0, #0x1a
	lsl r0, r0, #0xe
	str r0, [sp, #0xf4]
	ldr r0, [r5]
	add r1, r7, #0
	bl ov96_021EB588
	ldr r0, [r5, #4]
	add r1, r7, #0
	bl ov96_021EB588
	add r3, sp, #0xf0
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	add r2, #8
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r5, #0
	str r0, [r2]
	add r1, #0x42
	mov r0, #7
	strb r0, [r1]
	cmp r6, #0
	bne _02211002
	mov r1, #1
	ldr r0, [r5]
	add r2, r1, #0
	bl ov96_021EB52C
	add r1, r5, #0
	add r1, #0x38
	mov r0, #1
	strb r0, [r1]
_02211002:
	add r6, r6, #1
	add r5, #0x4c
	cmp r6, #2
	blt _02210F60
	ldr r1, _022110A4 ; =0x0221D1F4
	add r0, sp, #0x68
	ldrh r2, [r1, #0xc]
	ldr r5, _022110A8 ; =0x0221D3D8
	add r3, sp, #0xc0
	strh r2, [r0, #8]
	ldrh r2, [r1, #0xe]
	strh r2, [r0, #0xa]
	ldrh r2, [r1, #0x10]
	ldrh r1, [r1, #0x12]
	strh r2, [r0, #0xc]
	strh r1, [r0, #0xe]
	mov r2, #6
_02211024:
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02211024
	mov r0, #0
	str r0, [sp, #0x20]
	add r0, sp, #0xc0
	str r0, [sp, #0x38]
	add r0, sp, #0x70
	str r0, [sp, #0x34]
	mov r0, #2
	str r0, [sp, #0x30]
	ldr r0, _022110AC ; =0x0221D4B4
	str r4, [sp, #0x3c]
	str r0, [sp, #0x2c]
	ldr r0, _022110B0 ; =0x0221D3A8
	str r0, [sp, #0x28]
_02211046:
	mov r0, #5
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	ldr r2, _022110B4 ; =0x000006C4
	ldr r1, [sp, #0x3c]
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, r2]
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r1, _022110B4 ; =0x000006C4
	ldr r0, [sp, #0x3c]
	ldr r0, [r0, r1]
	mov r1, #1
	bl ov96_021EB564
	ldr r1, _022110B4 ; =0x000006C4
	b _022110B8
	.balign 4, 0
_02211078: .word 0xFFFFE0FF
_0221107C: .word 0x04001000
_02211080: .word 0x0000081C
_02211084: .word 0x00300010
_02211088: .word gMain + 0x60
_0221108C: .word 0x0000074C
_02211090: .word 0x00000AAF
_02211094: .word 0x00000744
_02211098: .word 0x0221D238
_0221109C: .word 0x00000748
_022110A0: .word 0x0000062C
_022110A4: .word 0x0221D1F4
_022110A8: .word 0x0221D3D8
_022110AC: .word 0x0221D4B4
_022110B0: .word 0x0221D3A8
_022110B4: .word 0x000006C4
_022110B8:
	ldr r0, [sp, #0x3c]
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x38]
	bl ov96_021EB588
	ldr r1, _02211428 ; =0x000006C4
	ldr r0, [sp, #0x3c]
	mov r2, #1
	ldr r0, [r0, r1]
	ldr r1, [sp, #0x34]
	ldrh r1, [r1]
	bl ov96_021EB5AC
	ldr r1, _02211428 ; =0x000006C4
	ldr r0, [sp, #0x3c]
	ldr r0, [r0, r1]
	mov r1, #3
	bl ov96_021EB630
	ldr r7, [sp, #0x2c]
	mov r6, #0
_022110E2:
	mov r0, #6
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	mov r1, #1
	add r2, r1, #0
	add r5, r0, #0
	bl ov96_021EB52C
	ldr r1, [sp, #0x30]
	add r0, r5, #0
	add r1, r6, r1
	bl ov96_021EB564
	add r0, r5, #0
	add r1, r7, #0
	bl ov96_021EB588
	add r0, r5, #0
	mov r1, #0x67
	bl ov96_021EB630
	add r6, r6, #1
	add r7, #0xc
	cmp r6, #2
	blt _022110E2
	mov r0, #0xb
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	ldr r2, _0221142C ; =0x000006D4
	ldr r1, [sp, #0x3c]
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, r2]
	ldr r1, [sp, #0x28]
	bl ov96_021EB588
	ldr r1, _0221142C ; =0x000006D4
	ldr r0, [sp, #0x3c]
	ldr r0, [r0, r1]
	mov r1, #2
	bl ov96_021EB630
	mov r0, #0xc
	str r0, [sp]
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	mov r3, #0x65
	bl ov96_021EB3E4
	ldr r2, _02211430 ; =0x000006E4
	ldr r1, [sp, #0x3c]
	str r0, [r1, r2]
	add r0, r1, #0
	ldr r0, [r0, r2]
	ldr r1, [sp, #0x38]
	bl ov96_021EB588
	ldr r1, _02211430 ; =0x000006E4
	ldr r0, [sp, #0x3c]
	ldr r0, [r0, r1]
	mov r1, #0x66
	bl ov96_021EB630
	ldr r0, [sp, #0x3c]
	add r0, r0, #4
	str r0, [sp, #0x3c]
	ldr r0, [sp, #0x38]
	add r0, #0xc
	str r0, [sp, #0x38]
	ldr r0, [sp, #0x34]
	add r0, r0, #2
	str r0, [sp, #0x34]
	ldr r0, [sp, #0x30]
	add r0, r0, #2
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x2c]
	add r0, #0x18
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x28]
	add r0, #0xc
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x20]
	add r0, r0, #1
	str r0, [sp, #0x20]
	cmp r0, #4
	bge _022111A6
	b _02211046
_022111A6:
	ldr r2, _02211434 ; =0x00000744
	ldr r0, [sp, #0x14]
	ldr r2, [r4, r2]
	ldr r3, [r4]
	mov r1, #0
	bl ov96_021E6290
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024ADC
	mov r2, #0x75
	lsl r2, r2, #4
	ldr r1, [r4, r2]
	sub r2, #0xc
	ldr r0, [r4]
	ldr r2, [r4, r2]
	bl ov96_02214718
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _02211626
_022111D4:
	mov r5, #0
	add r7, sp, #0x1d4
	add r6, sp, #0x190
_022111DA:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x1c]
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x58]
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x58]
	ldr r2, [sp, #0x1c]
	add r3, r7, #0
	bl ov96_021E6168
	ldr r0, [sp, #0x14]
	ldr r1, [sp, #0x58]
	ldr r2, [sp, #0x1c]
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r6, #0x14]
	add r5, r5, #1
	add r7, #0x10
	add r6, r6, #4
	cmp r5, #0xc
	blt _022111DA
	mov r0, #1
	mov r1, #0
	str r1, [sp, #0x190]
	str r0, [sp, #0x194]
	str r1, [sp, #0x198]
	str r0, [sp, #0x19c]
	str r0, [sp, #0x1a0]
	str r1, [sp]
	str r1, [sp, #4]
	ldr r0, _02211438 ; =0x00000748
	mov r1, #0xc
	ldr r0, [r4, r0]
	add r2, sp, #0x1d4
	add r3, sp, #0x190
	bl ov96_021EA8A8
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _02211626
_0221123C:
	ldr r0, _02211438 ; =0x00000748
	ldr r0, [r4, r0]
	bl ov96_021EAA00
	cmp r0, #0
	bne _0221124A
	b _02211626
_0221124A:
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	str r0, [sp, #0x50]
	ldr r0, [r4, #4]
	bl ov96_021E6030
	ldr r0, [sp, #0x14]
	mov r1, #1
	bl ov96_021E5DFC
	add r0, sp, #0x9c
	mov r1, #0xaa
	mov r2, #0xb
	bl ReadWholeNarcMemberByIdPair
	add r0, r4, #0
	str r0, [sp, #0x60]
	add r0, #0x5c
	mov r7, #0
	str r0, [sp, #0x60]
_02211274:
	ldr r0, _02211438 ; =0x00000748
	lsl r1, r7, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	mov r1, #1
	add r5, r0, #0
	bl ov96_021EAB38
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	add r6, r0, #0
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	ldr r0, [sp, #0x14]
	add r1, r6, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x9c
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r5, #0
	bl ov96_021EAF70
	ldr r0, _02211438 ; =0x00000748
	lsl r1, r7, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r5, r0, #0
	bl ov96_021EAA20
	str r0, [sp, #0x5c]
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x18]
	add r0, r7, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0x5d
	lsl r1, r1, #2
	str r0, [sp, #0x24]
	mul r1, r0
	ldr r0, [sp, #0x60]
	ldr r2, [sp, #0x18]
	add r0, r0, r1
	mov r1, #0x7c
	mul r1, r2
	add r6, r0, r1
	str r5, [r0, r1]
	add r0, r5, #0
	bl ov96_021EAF8C
	str r0, [r6, #0x20]
	mov r0, #0
	str r0, [r6, #0x78]
	ldr r0, [sp, #0x5c]
	bl ov96_021E90FC
	ldr r1, [sp, #0x24]
	mov r0, #0xc
	add r2, r1, #0
	mul r2, r0
	ldr r0, _0221143C ; =0x0221D408
	ldr r1, [sp, #0x18]
	add r0, r0, r2
	lsl r2, r1, #2
	add r1, r0, r2
	ldrh r0, [r0, r2]
	str r0, [sp, #0x4c]
	ldrh r0, [r1, #2]
	str r0, [sp, #0x48]
	add r1, r6, #0
	add r1, #0x5c
	mov r0, #2
	strh r0, [r1]
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EAC0C
	ldr r1, [sp, #0x4c]
	ldr r2, [sp, #0x48]
	add r0, r5, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021EAF6C
	add r0, sp, #0x68
	str r0, [sp]
	ldr r1, [sp, #0x4c]
	ldr r2, [sp, #0x48]
	add r0, r5, #0
	add r3, sp, #0x6c
	bl ov96_021EB0A4
	ldr r0, [sp, #0x6c]
	lsl r0, r0, #0xc
	str r0, [r6, #0x14]
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r6, #0x18]
	ldr r0, [sp, #0x6c]
	lsl r0, r0, #0xc
	str r0, [r6, #0x30]
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r6, #0x34]
	ldr r0, [sp, #0x6c]
	lsl r0, r0, #0xc
	str r0, [r6, #0x24]
	ldr r0, [sp, #0x68]
	lsl r0, r0, #0xc
	str r0, [r6, #0x28]
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	ldr r1, [sp, #0x24]
	cmp r1, r0
	bne _02211396
	add r0, r5, #0
	mov r1, #8
	bl ov96_021EABA8
	b _0221139E
_02211396:
	add r0, r5, #0
	mov r1, #0x10
	bl ov96_021EABA8
_0221139E:
	add r0, r5, #0
	mov r1, #0x14
	bl ov96_021EABDC
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x50]
	cmp r1, r0
	bne _022113D8
	ldr r0, [sp, #0x18]
	ldr r3, [sp, #0x6c]
	lsl r0, r0, #2
	add r1, sp, #0xb4
	add r2, sp, #0xb4
	add r1, r1, r0
	strh r3, [r2, r0]
	ldr r0, [sp, #0x68]
	strh r0, [r1, #2]
	ldr r0, [r4]
	bl ov96_021EB5E8
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	ldr r2, _02211434 ; =0x00000744
	ldr r0, [sp, #0x14]
	ldr r2, [r4, r2]
	add r1, r5, #0
	bl ov96_021E64F8
_022113D8:
	add r7, r7, #1
	cmp r7, #0xc
	bge _022113E0
	b _02211274
_022113E0:
	mov r0, #1
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	add r0, sp, #0xb4
	str r0, [sp, #8]
	ldr r2, _02211434 ; =0x00000744
	ldr r0, [sp, #0x14]
	ldr r2, [r4, r2]
	ldr r3, [r4]
	mov r1, #0
	bl ov96_021E634C
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	cmp r0, #0
	beq _02211406
	b _022115A0
_02211406:
	add r0, sp, #0x118
	mov r1, #0xaa
	mov r2, #8
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #0x44]
	add r0, r4, #0
	str r0, [sp, #0x40]
	add r0, #0x5c
	ldr r7, [sp, #0x44]
	str r0, [sp, #0x40]
_0221141E:
	ldr r0, [sp, #0x44]
	mov r1, #0xc
	add r2, r4, r0
	ldr r0, _02211440 ; =0x00000734
	b _02211444
	.balign 4, 0
_02211428: .word 0x000006C4
_0221142C: .word 0x000006D4
_02211430: .word 0x000006E4
_02211434: .word 0x00000744
_02211438: .word 0x00000748
_0221143C: .word 0x0221D408
_02211440: .word 0x00000734
_02211444:
	ldr r6, [sp, #0x40]
	strb r1, [r2, r0]
	ldr r0, [sp, #0x44]
	mov r5, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x64]
_02211452:
	lsl r3, r5, #0x18
	ldr r0, [sp, #0x14]
	ldr r2, [sp, #0x64]
	add r1, sp, #0x118
	lsr r3, r3, #0x18
	str r6, [sp]
	bl ov96_0221359C
	ldr r0, _02211630 ; =0x0000074C
	add r1, r5, r7
	lsl r1, r1, #0x18
	ldr r0, [r4, r0]
	lsr r1, r1, #0x18
	add r2, r6, #0
	bl ov96_02214A6C
	add r5, r5, #1
	add r6, #0x7c
	cmp r5, #3
	blt _02211452
	mov r0, #0x5d
	ldr r1, [sp, #0x40]
	lsl r0, r0, #2
	add r0, r1, r0
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x44]
	add r7, r7, #3
	add r0, r0, #1
	str r0, [sp, #0x44]
	cmp r0, #4
	blt _0221141E
	ldr r0, _02211630 ; =0x0000074C
	ldr r1, _02211634 ; =0x0000062C
	ldr r0, [r4, r0]
	add r1, r4, r1
	bl ov96_02214B74
	ldr r0, _02211630 ; =0x0000074C
	ldr r0, [r4, r0]
	bl ov96_02214A9C
	ldr r5, _02211638 ; =0x0221D220
	add r3, sp, #0x90
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r2, #0
	str r0, [r3]
	add r0, r2, #0
	bl VEC_Normalize
	ldr r3, _0221163C ; =0x0221D250
	add r2, sp, #0x84
	add r6, r2, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r7, #0
	str r0, [r2]
	add r5, r6, #0
	ldr r2, _02211640 ; =0x00000754
	ldmia r5!, {r0, r1}
	add r3, r4, r2
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mvn r7, r7
	str r0, [r3]
	add r0, r2, #0
	add r0, #0xc
	add r5, r4, r0
	ldmia r6!, {r0, r1}
	add r3, r5, #0
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	str r0, [r5]
	ldr r0, [r3]
	ldr r5, _02211644 ; =0x0221D208
	add r1, r0, #0
	mul r1, r7
	str r1, [r3]
	add r3, sp, #0x78
	ldmia r5!, {r0, r1}
	add r6, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r5, r6, #0
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x18
	add r3, r4, r0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r5, sp, #0x90
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x24
	add r3, r4, r0
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r6, sp, #0x90
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x28
	ldr r0, [r4, r0]
	add r1, r0, #0
	add r0, r2, #0
	mul r1, r7
	add r0, #0x28
	str r1, [r4, r0]
	add r0, r2, #0
	add r0, #0x30
	add r3, r4, r0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x3c
	add r5, r4, r0
	ldmia r6!, {r0, r1}
	add r3, r5, #0
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	str r0, [r5]
	ldr r0, [r3]
	add r5, sp, #0x90
	add r1, r0, #0
	add r0, r2, #0
	mul r1, r7
	add r0, #0x48
	str r1, [r3]
	add r3, r4, r0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x4c
	ldr r0, [r4, r0]
	add r1, r0, #0
	add r0, r2, #0
	mul r1, r7
	add r0, #0x4c
	str r1, [r4, r0]
	add r0, r2, #0
	add r0, #0x54
	add r5, r4, r0
	add r6, sp, #0x90
	ldmia r6!, {r0, r1}
	add r3, r5, #0
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	str r0, [r5]
	ldr r0, [r3]
	add r1, r0, #0
	add r0, r2, #0
	mul r1, r7
	str r1, [r3]
	add r0, #0x58
	ldr r0, [r4, r0]
	add r2, #0x58
	add r1, r0, #0
	mul r1, r7
	str r1, [r4, r2]
_022115A0:
	ldr r0, [sp, #0x14]
	bl ov96_021E5F24
	cmp r0, #0
	bne _022115BE
	ldr r0, [sp, #0x14]
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_02211DE4
_022115BE:
	add r0, r4, #0
	bl ov96_02211A24
	mov r0, #0x75
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_022147FC
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	ldr r0, _02211648 ; =0x00000A8C
	ldr r1, _0221164C ; =0x00000738
	str r0, [r4, r1]
	add r0, r1, #0
	add r0, #0x18
	ldr r0, [r4, r0]
	ldr r1, [r4, r1]
	bl ov96_0221490C
	mov r0, #2
	bl sub_0203A994
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r4, #0x58]
	mov r1, #3
	str r0, [sp, #8]
	mov r0, #2
	add r2, r1, #0
	mov r3, #0
	bl sub_0200FA24
	ldr r0, [sp, #0x14]
	bl ov96_021E5DEC
	b _02211626
_02211616:
	bl sub_0200FB5C
	cmp r0, #0
	beq _02211626
	add sp, #0x1fc
	add sp, #0x98
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_02211626:
	mov r0, #0
	add sp, #0x1fc
	add sp, #0x98
	pop {r4, r5, r6, r7, pc}
	nop
_02211630: .word 0x0000074C
_02211634: .word 0x0000062C
_02211638: .word 0x0221D220
_0221163C: .word 0x0221D250
_02211640: .word 0x00000754
_02211644: .word 0x0221D208
_02211648: .word 0x00000A8C
_0221164C: .word 0x00000738
	thumb_func_end ov96_02210C98

	thumb_func_start ov96_02211650
ov96_02211650: ; 0x02211650
	push {r3, lr}
	bl ov96_021E5DC4
	ldr r0, [r0]
	bl ov96_021EB5BC
	mov r0, #1
	pop {r3, pc}
	thumb_func_end ov96_02211650

	thumb_func_start ov96_02211660
ov96_02211660: ; 0x02211660
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E5DC4
	add r0, r5, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_0221167A:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r0, #0x4b
	lsl r0, r0, #2
	str r0, [sp, #8]
	add r0, r5, #0
	add r1, r6, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _0221167A
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #9
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #9
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02211660

	thumb_func_start ov96_022116C8
ov96_022116C8: ; 0x022116C8
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bl sub_0203A914
	add r0, r7, #0
	bl ov96_021E6550
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #2
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #3
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #4
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #5
	bl sub_0201BB4C
	ldr r0, [r4, #4]
	mov r1, #6
	bl sub_0201BB4C
	add r0, r4, #0
	bl ov96_02214234
	add r0, r7, #0
	bl ov96_022141B0
	add r0, r4, #0
	add r0, #8
	bl RemoveWindow
	add r5, r4, #0
	mov r6, #0
	add r5, #0x18
_0221172E:
	add r0, r5, #0
	bl RemoveWindow
	add r6, r6, #1
	add r5, #0x10
	cmp r6, #4
	blt _0221172E
	ldr r0, [r4, #4]
	bl FreeToHeap
	ldr r0, [r4]
	bl ov96_021EB21C
	ldr r0, _022117B4 ; =0x00000748
	ldr r0, [r4, r0]
	bl ov96_021EA894
	ldr r0, _022117B8 ; =0x00000744
	ldr r0, [r4, r0]
	bl ov96_021E9C0C
	bl sub_0200B244
	bl sub_0202168C
	bl sub_02022608
	ldr r0, _022117BC ; =0x0000074C
	ldr r0, [r4, r0]
	bl ov96_02214B7C
	mov r0, #0x75
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_02214690
	mov r0, #4
	bl sub_02002DB4
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	ldr r0, _022117C0 ; =0x0000081C
	ldr r0, [r4, r0]
	bl FreeToHeap
	add r0, r7, #0
	bl ov96_021E5DAC
	ldr r0, _022117C4 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r0, _022117C8 ; =0x04000050
	mov r1, #0
	strh r1, [r0]
	mov r0, #0x93
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022117B4: .word 0x00000748
_022117B8: .word 0x00000744
_022117BC: .word 0x0000074C
_022117C0: .word 0x0000081C
_022117C4: .word gMain + 0x60
_022117C8: .word 0x04000050
	thumb_func_end ov96_022116C8

	thumb_func_start ov96_022117CC
ov96_022117CC: ; 0x022117CC
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _022117E8 ; =0x0221D380
	add r3, sp, #0
	mov r2, #5
_022117D6:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _022117D6
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_022117E8: .word 0x0221D380
	thumb_func_end ov96_022117CC

	thumb_func_start ov96_022117EC
ov96_022117EC: ; 0x022117EC
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _0221180A
	cmp r0, #1
	beq _0221181C
	cmp r0, #2
	beq _02211834
	b _0221186A
_0221180A:
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _0221186A
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _0221186A
_0221181C:
	add r0, r5, #0
	bl ov96_02211B94
	add r0, r5, #0
	bl ov96_02211AF0
	cmp r0, #0
	beq _0221186A
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _0221186A
_02211834:
	add r0, r5, #0
	bl ov96_02211B94
	add r0, r5, #0
	bl ov96_0221236C
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _0221186A
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #0x58]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
_0221186A:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	thumb_func_end ov96_022117EC

	thumb_func_start ov96_02211870
ov96_02211870: ; 0x02211870
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r5, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	bne _02211892
	bl sub_0200FB5C
	cmp r0, #0
	beq _0221188E
	mov r0, #1
	strb r0, [r4]
_0221188E:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02211892:
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	beq _022118A0
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_022118A0:
	ldr r7, _022118C0 ; =0x000006F4
	mov r4, #0
_022118A4:
	ldr r2, [r5, r7]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _022118A4
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022118C0: .word 0x000006F4
	thumb_func_end ov96_02211870

	thumb_func_start ov96_022118C4
ov96_022118C4: ; 0x022118C4
	push {r4, r5, lr}
	sub sp, #0xd4
	ldr r5, _02211A04 ; =0x0221D28C
	add r3, sp, #0xc4
	add r4, r0, #0
	add r2, r3, #0
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r5, _02211A08 ; =0x0221D30C
	add r3, sp, #0xa8
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #0
	str r0, [r3]
	add r0, r4, #0
	add r3, r1, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #0
	bl sub_0201CAE0
	ldr r5, _02211A0C ; =0x0221D328
	add r3, sp, #0x8c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #1
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #1
	bl sub_0201CAE0
	ldr r5, _02211A10 ; =0x0221D344
	add r3, sp, #0x70
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #2
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #2
	bl sub_0201CAE0
	ldr r5, _02211A14 ; =0x0221D29C
	add r3, sp, #0x54
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #3
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #3
	bl sub_0201CAE0
	ldr r5, _02211A18 ; =0x0221D2B8
	add r3, sp, #0x38
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #4
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #4
	bl sub_0201CAE0
	ldr r5, _02211A1C ; =0x0221D2D4
	add r3, sp, #0x1c
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #5
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #5
	bl sub_0201CAE0
	ldr r5, _02211A20 ; =0x0221D2F0
	add r3, sp, #0
	ldmia r5!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	mov r1, #6
	str r0, [r3]
	add r0, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	add r0, r4, #0
	mov r1, #6
	bl sub_0201CAE0
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xd4
	pop {r4, r5, pc}
	nop
_02211A04: .word 0x0221D28C
_02211A08: .word 0x0221D30C
_02211A0C: .word 0x0221D328
_02211A10: .word 0x0221D344
_02211A14: .word 0x0221D29C
_02211A18: .word 0x0221D2B8
_02211A1C: .word 0x0221D2D4
_02211A20: .word 0x0221D2F0
	thumb_func_end ov96_022118C4

	thumb_func_start ov96_02211A24
ov96_02211A24: ; 0x02211A24
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #1
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	add r3, r1, #0
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #3
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	mov r3, #2
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	mov r3, #5
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #7
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	mov r3, #6
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	mov r3, #1
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4, #0x58]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xec
	mov r3, #2
	bl GfGfxLoader_LoadScrnData
	mov r0, #0x75
	lsl r0, r0, #4
	ldr r0, [r4, r0]
	bl ov96_022146C0
	mov r1, #0
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r4, #0x58]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xec
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r0, #0x40
	str r0, [sp]
	ldr r0, [r4, #0x58]
	mov r1, #5
	str r0, [sp, #4]
	mov r0, #0xec
	mov r2, #4
	mov r3, #0
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_02211A24

	thumb_func_start ov96_02211AF0
ov96_02211AF0: ; 0x02211AF0
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r7, r0, #0
	bl ov96_021E8A20
	add r4, r0, #0
	mov r0, #0
	add r7, #0xf0
	str r0, [r4]
	add r0, r7, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x20]
	mov r1, #1
	asr r0, r0, #0x18
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _02211B44
	ldr r0, [r6]
	bl ov96_021EB63C
	ldr r0, _02211B88 ; =0x00000748
	mov r1, #1
	ldr r0, [r6, r0]
	bl ov96_021EB144
	add r0, r5, #0
	bl ov96_021E65A4
	ldr r1, _02211B8C ; =ov96_02214618
	add r0, r5, #0
	bl ov96_021E8324
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02211B44:
	bl sub_02025358
	cmp r0, #0
	beq _02211B66
	add r0, r5, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_02211B66:
	bl sub_0202534C
	cmp r0, #0
	beq _02211B7C
	ldr r0, _02211B90 ; =gMain + 0x40
	ldrh r1, [r0, #0x20]
	strb r1, [r4, #4]
	ldrh r0, [r0, #0x22]
	strb r0, [r4, #5]
	mov r0, #1
	str r0, [r4]
_02211B7C:
	add r0, r5, #0
	bl ov96_02211F38
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02211B88: .word 0x00000748
_02211B8C: .word ov96_02214618
_02211B90: .word gMain + 0x40
	thumb_func_end ov96_02211AF0

	thumb_func_start ov96_02211B94
ov96_02211B94: ; 0x02211B94
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp, #4]
	bl ov96_021E5F54
	str r0, [sp, #0xc]
	ldr r0, [sp, #4]
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r0, _02211DC8 ; =0x00000738
	ldr r1, [r4, r0]
	cmp r1, #0
	ble _02211BB4
	sub r1, r1, #1
	str r1, [r4, r0]
_02211BB4:
	ldr r0, [sp, #4]
	bl ov96_021E5F24
	cmp r0, #0
	beq _02211BC0
	b _02211DC4
_02211BC0:
	ldr r0, _02211DCC ; =0x0000073E
	ldrb r0, [r4, r0]
	cmp r0, #0
	beq _02211BDE
	ldr r0, [sp, #0xc]
	add r0, #0x28
	str r0, [sp, #0xc]
	bl ov96_021E8A20
	add r1, r0, #0
	add r0, r4, #0
	bl ov96_02211DE4
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
_02211BDE:
	ldr r0, [sp, #0xc]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	add r0, #0x50
	bl ov96_021E8A20
	add r5, r0, #0
	ldr r0, [sp, #0xc]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_02211BFC:
	ldmia r3!, {r0, r1}
	stmia r5!, {r0, r1}
	sub r2, r2, #1
	bne _02211BFC
	ldr r0, [r3]
	mov r6, #0
	str r0, [r5]
	ldr r0, [sp, #0xc]
	add r5, r4, #0
	add r0, #0x50
	str r0, [sp, #0xc]
	add r0, r4, #0
	str r0, [sp, #8]
	add r0, #0x5c
	str r0, [sp, #8]
_02211C1A:
	ldr r0, [sp, #0xc]
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r0, [r7]
	cmp r0, #0
	ldr r0, _02211DD0 ; =0x00000704
	beq _02211C58
	ldr r1, [r5, r0]
	cmp r1, #0
	beq _02211C40
	add r0, r0, #4
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02211C40
	ldr r0, _02211DD0 ; =0x00000704
	mov r1, #0
	str r1, [r5, r0]
	b _02211C60
_02211C40:
	cmp r1, #0
	bne _02211C60
	ldr r0, _02211DD4 ; =0x00000708
	ldr r0, [r5, r0]
	cmp r0, #0
	bne _02211C60
	ldr r0, _02211DD0 ; =0x00000704
	mov r1, #1
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
	b _02211C60
_02211C58:
	mov r1, #0
	str r1, [r5, r0]
	add r0, r0, #4
	str r1, [r5, r0]
_02211C60:
	ldr r0, _02211DD0 ; =0x00000704
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02211CAA
	ldrb r2, [r7, #4]
	lsl r1, r6, #0x18
	ldrb r3, [r7, #5]
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_02213364
	add r7, r0, #0
	cmp r7, #0xc
	beq _02211D68
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x7c
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #8]
	add r1, r0, r2
	ldr r0, [r1, #0x78]
	cmp r0, #2
	beq _02211D68
	cmp r0, #1
	beq _02211D68
	ldr r0, [r1, #0x48]
	cmp r0, #0
	bne _02211D68
	ldr r0, _02211DD8 ; =0x00000734
	add r1, r4, r6
	strb r7, [r1, r0]
	mov r1, #0
	add r0, #0xe
	strb r1, [r4, r0]
	b _02211D68
_02211CAA:
	ldr r0, _02211DD4 ; =0x00000708
	ldr r0, [r5, r0]
	cmp r0, #0
	beq _02211CF2
	ldr r1, _02211DD8 ; =0x00000734
	add r0, r4, r6
	ldrb r1, [r0, r1]
	cmp r1, #0xc
	beq _02211D68
	ldr r1, _02211DDC ; =0x00000742
	ldrb r1, [r4, r1]
	cmp r1, #0x14
	bhs _02211CCE
	ldr r1, _02211DDC ; =0x00000742
	ldrb r1, [r4, r1]
	add r2, r1, #1
	ldr r1, _02211DDC ; =0x00000742
	strb r2, [r4, r1]
_02211CCE:
	ldr r1, _02211DD8 ; =0x00000734
	ldrb r0, [r0, r1]
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	lsl r2, r2, #0x18
	lsr r2, r2, #0x18
	mov r3, #0x7c
	mul r3, r2
	ldr r2, [sp, #8]
	ldrb r0, [r7, #4]
	add r2, r2, r3
	ldrb r1, [r7, #5]
	add r2, #0x24
	bl ov96_02213354
	b _02211D68
_02211CF2:
	ldr r0, _02211DD8 ; =0x00000734
	add r7, r4, r6
	ldrb r0, [r7, r0]
	cmp r0, #0xc
	beq _02211D68
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	mov r0, #0x7c
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #8]
	add r0, r0, r2
	ldr r1, [r0, #0x78]
	cmp r1, #3
	beq _02211D5C
	cmp r1, #2
	beq _02211D5C
	ldr r1, _02211DDC ; =0x00000742
	ldrb r1, [r4, r1]
	cmp r1, #8
	bhi _02211D58
	ldr r2, [r0, #0x24]
	ldr r1, [r0, #0x30]
	cmp r2, r1
	bne _02211D32
	ldr r2, [r0, #0x28]
	ldr r1, [r0, #0x34]
	cmp r2, r1
	beq _02211D5C
_02211D32:
	mov r1, #1
	str r1, [r0, #0x78]
	ldr r0, _02211DD8 ; =0x00000734
	mov r1, #3
	ldrb r0, [r7, r0]
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r6, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #6
	bl ov96_021E8228
	b _02211D5C
_02211D58:
	mov r1, #0
	str r1, [r0, #0x78]
_02211D5C:
	ldr r0, _02211DDC ; =0x00000742
	mov r1, #0
	strb r1, [r4, r0]
	mov r1, #0xc
	sub r0, #0xe
	strb r1, [r7, r0]
_02211D68:
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	add r0, #0x28
	str r0, [sp, #0xc]
	mov r0, #0x5d
	lsl r0, r0, #2
	add r0, r1, r0
	add r6, r6, #1
	add r5, #0xc
	str r0, [sp, #8]
	cmp r6, #4
	bge _02211D82
	b _02211C1A
_02211D82:
	ldr r1, _02211DE0 ; =0x0000074C
	ldr r0, [sp, #4]
	ldr r1, [r4, r1]
	bl ov96_02214B84
	ldr r0, [sp, #4]
	bl ov96_022124F8
	ldr r0, [sp, #4]
	bl ov96_02212B94
	ldr r0, [sp, #4]
	bl ov96_022127F4
	ldr r0, [sp, #4]
	bl ov96_022130EC
	ldr r0, [sp, #4]
	bl ov96_022132FC
	ldr r0, _02211DC8 ; =0x00000738
	ldr r1, [r4, r0]
	cmp r1, #0
	bgt _02211DB6
	mov r1, #1
	b _02211DB8
_02211DB6:
	mov r1, #0
_02211DB8:
	add r0, r0, #6
	strb r1, [r4, r0]
	ldr r1, [sp, #0x10]
	add r0, r4, #0
	bl ov96_02211DE4
_02211DC4:
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02211DC8: .word 0x00000738
_02211DCC: .word 0x0000073E
_02211DD0: .word 0x00000704
_02211DD4: .word 0x00000708
_02211DD8: .word 0x00000734
_02211DDC: .word 0x00000742
_02211DE0: .word 0x0000074C
	thumb_func_end ov96_02211B94

	thumb_func_start ov96_02211DE4
ov96_02211DE4: ; 0x02211DE4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #0xc]
	str r0, [sp, #8]
	str r0, [sp, #4]
	add r4, r0, #0
	add r6, r0, #0
	ldr r0, [sp]
	add r5, r1, #0
	str r0, [sp, #0x10]
	add r0, #0x5c
	str r0, [sp, #0x10]
_02211E00:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	add r2, r7, #0
	mul r2, r0
	ldr r0, [sp, #0x10]
	add r2, r0, r2
	mov r0, #0x7c
	mul r0, r1
	add r0, r2, r0
	add r3, r0, #0
	add r3, #0x5c
	ldrh r3, [r3]
	ldr r2, [r0, #0x34]
	sub r3, r3, #1
	lsl r3, r3, #0x18
	asr r1, r2, #0xb
	lsr r7, r3, #0x18
	add r3, r5, r4
	lsr r1, r1, #0x14
	mov ip, r3
	add r1, r2, r1
	asr r2, r1, #0xc
	ldr r1, [r0, #0x78]
	ldr r3, [r0, #0x30]
	lsl r1, r1, #0x18
	asr r0, r3, #0xb
	lsr r0, r0, #0x14
	add r0, r3, r0
	asr r0, r0, #0xc
	strb r0, [r5, r4]
	mov r0, ip
	strb r2, [r0, #0xc]
	add r2, r7, #0
	lsr r1, r1, #0x18
	lsl r2, r6
	ldr r0, [sp, #0xc]
	lsl r1, r6
	add r0, r0, r2
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r4, r4, #1
	add r0, r0, r1
	add r6, r6, #2
	str r0, [sp, #8]
	cmp r4, #0xc
	blt _02211E00
	ldr r1, _02211F2C ; =0x0000062C
	ldr r0, [sp]
	mov r6, #0
	add r4, r0, r1
	add r7, r6, #0
_02211E78:
	ldr r1, [r4, #8]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x14]
	add r0, r4, #0
	bl ov96_02213EC4
	add r2, r5, r6
	ldr r1, [sp, #0x14]
	add r6, r6, #1
	strb r1, [r2, #0x18]
	strb r0, [r2, #0x1a]
	add r0, r4, #0
	add r0, #0x39
	ldrb r0, [r0]
	add r4, #0x4c
	add r1, r0, #0
	lsl r1, r7
	ldr r0, [sp, #4]
	add r7, r7, #2
	add r0, r0, r1
	str r0, [sp, #4]
	cmp r6, #2
	blt _02211E78
	ldr r0, _02211F30 ; =0x0000073C
	ldr r1, [sp]
	ldrb r2, [r1, r0]
	lsl r3, r2, #2
	add r3, r1, r3
	add r1, r0, #0
	sub r1, #0x48
	ldr r1, [r3, r1]
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	add r1, r2, #1
	lsr r6, r1, #0x1f
	lsl r4, r1, #0x1e
	sub r4, r4, r6
	mov r1, #0x1e
	ror r4, r1
	ldr r1, [sp]
	add r4, r6, r4
	strb r4, [r1, r0]
	ldr r4, [sp, #4]
	lsl r2, r2, #0x1c
	lsl r6, r4, #0x18
	ldr r4, [sp, #0xc]
	add r1, r5, #0
	add r4, r4, r6
	add r2, r4, r2
	str r2, [r5, #0x1c]
	ldr r2, [sp]
	sub r0, #0xd8
	ldrb r0, [r2, r0]
	add r1, #0x1c
	cmp r0, #2
	bne _02211EF8
	mov r0, #1
	ldr r2, [r1]
	lsl r0, r0, #0x1e
	add r0, r2, r0
	str r0, [r1]
_02211EF8:
	mov r1, #0x6b
	ldr r0, [sp]
	lsl r1, r1, #4
	ldrb r0, [r0, r1]
	cmp r0, #0
	beq _02211F0E
	mov r0, #2
	ldr r1, [r5, #0x1c]
	lsl r0, r0, #0x1e
	sub r0, r1, r0
	str r0, [r5, #0x1c]
_02211F0E:
	ldr r0, [sp, #8]
	mov r1, #0
	add r2, r1, r0
	ldr r1, _02211F34 ; =0x0000073E
	ldr r0, [sp]
	str r2, [r5, #0x20]
	ldrb r0, [r0, r1]
	lsl r0, r0, #0x18
	add r1, r2, r0
	lsl r0, r3, #0x19
	add r0, r1, r0
	str r0, [r5, #0x20]
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02211F2C: .word 0x0000062C
_02211F30: .word 0x0000073C
_02211F34: .word 0x0000073E
	thumb_func_end ov96_02211DE4

	thumb_func_start ov96_02211F38
ov96_02211F38: ; 0x02211F38
	push {r4, r5, r6, r7, lr}
	sub sp, #0x74
	str r0, [sp, #8]
	bl ov96_021E5DC4
	str r0, [sp, #0x38]
	ldr r0, [sp, #8]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
	ldr r0, [sp, #8]
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r6, r0, #0
	ldr r0, [sp, #0x38]
	bl ov96_02214418
	ldr r0, [sp, #0x38]
	mov r4, #0
	str r0, [sp, #0x40]
	add r0, #0x5c
	add r7, r4, #0
	str r0, [sp, #0x40]
_02211F70:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x18]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	ldr r2, [sp, #0x18]
	mov r0, #0x5d
	add r3, r2, #0
	lsl r0, r0, #2
	mul r3, r0
	ldr r0, [sp, #0x40]
	mov r2, #0x7c
	add r0, r0, r3
	mul r2, r1
	add r5, r0, r2
	ldr r0, [r0, r2]
	bl ov96_021EAA20
	bl ov96_021E8BAC
	ldr r0, [r6, #0x20]
	add r1, r0, #0
	asr r1, r7
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x28]
	cmp r0, #3
	bne _02211FC8
	mov r1, #1
	ldr r0, [r5, #4]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #4]
	mov r1, #0xc
	bl ov96_021EB570
	b _02211FFE
_02211FC8:
	ldr r0, [sp, #0x28]
	cmp r0, #2
	ldr r0, [r5, #4]
	bne _02211FF6
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [r5, #4]
	mov r1, #0x10
	bl ov96_021EB570
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _02211FFE
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
	b _02211FFE
_02211FF6:
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_02211FFE:
	add r0, r6, r4
	str r0, [sp, #0xc]
	ldrb r0, [r6, r4]
	str r0, [sp, #0x34]
	ldr r0, [sp, #0xc]
	ldrb r0, [r0, #0xc]
	str r0, [sp, #0x30]
	ldr r0, [r6, #0x1c]
	add r1, r0, #0
	asr r1, r7
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x2c]
	mov r1, #0
	add r0, sp, #0x68
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [sp, #0x34]
	mov r1, #3
	lsl r0, r0, #0xc
	str r0, [sp, #0x68]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #0xc
	str r0, [sp, #0x6c]
	add r0, r4, #0
	bl _s32_div_f
	str r0, [sp, #0x44]
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	ldr r0, [sp, #8]
	ldr r1, [sp, #0x44]
	bl ov96_021E60C0
	ldrb r0, [r0, #7]
	cmp r0, #1
	beq _0221205E
	cmp r0, #2
	beq _0221206A
	cmp r0, #3
	beq _02212076
	b _02212082
_0221205E:
	mov r0, #2
	ldr r1, [sp, #0x6c]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0x6c]
	b _02212086
_0221206A:
	mov r0, #2
	ldr r1, [sp, #0x6c]
	lsl r0, r0, #0xe
	sub r0, r1, r0
	str r0, [sp, #0x6c]
	b _02212086
_02212076:
	mov r0, #1
	ldr r1, [sp, #0x6c]
	lsl r0, r0, #0x10
	sub r0, r1, r0
	str r0, [sp, #0x6c]
	b _02212086
_02212082:
	bl GF_AssertFail
_02212086:
	ldr r0, [r5, #4]
	add r1, sp, #0x68
	bl ov96_021EB588
	ldr r0, [sp, #0x28]
	cmp r0, #1
	bne _02212138
	add r0, r5, #0
	add r0, #0x63
	ldrb r0, [r0]
	cmp r0, #0
	bne _0221212C
	mov r1, #0
	add r0, sp, #0x5c
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r1, [sp, #0x38]
	ldr r0, _02212358 ; =0x00000748
	ldr r0, [r1, r0]
	lsl r1, r4, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r1, r5, #0
	add r1, #0x62
	ldrb r1, [r1]
	ldr r2, [sp, #0xc]
	add r3, sp, #0x4c
	str r1, [sp, #0x24]
	add r1, sp, #0x48
	str r1, [sp]
	ldr r1, [sp, #0xc]
	ldrb r2, [r2, #0xc]
	ldrb r1, [r1]
	bl ov96_021EB06C
	ldr r0, [sp, #0x4c]
	add r1, sp, #0x5c
	lsl r0, r0, #0xc
	str r0, [sp, #0x5c]
	ldr r0, [sp, #0x48]
	lsl r0, r0, #0xc
	str r0, [sp, #0x60]
	ldr r0, [sp, #0x24]
	lsl r0, r0, #2
	add r0, r5, r0
	str r0, [sp, #0x14]
	ldr r0, [r0, #8]
	bl ov96_021EB588
	ldr r0, [sp, #0x14]
	mov r1, #1
	ldr r0, [r0, #8]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp, #0x14]
	mov r1, #0xe
	ldr r0, [r0, #8]
	bl ov96_021EB564
	add r0, r5, #0
	add r0, #0x62
	ldrb r0, [r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	add r0, r5, #0
	add r0, #0x62
	strb r1, [r0]
	add r5, #0x63
	mov r0, #5
	strb r0, [r5]
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x10]
	cmp r1, r0
	bne _02212138
	ldr r0, _0221235C ; =0x000008CC
	bl PlaySE
	b _02212138
_0221212C:
	add r0, r5, #0
	add r0, #0x63
	ldrb r0, [r0]
	add r5, #0x63
	sub r0, r0, #1
	strb r0, [r5]
_02212138:
	ldr r1, [sp, #0x38]
	ldr r0, _02212358 ; =0x00000748
	ldr r0, [r1, r0]
	lsl r1, r4, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	ldr r1, [sp, #0x28]
	add r5, r0, #0
	cmp r1, #2
	bne _02212156
	mov r1, #0x14
	bl ov96_021EAC5C
	b _02212162
_02212156:
	ldr r1, [sp, #0x2c]
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAC0C
_02212162:
	ldr r1, [sp, #0x34]
	ldr r2, [sp, #0x30]
	add r0, r5, #0
	mov r3, #1
	bl ov96_021EB01C
	add r4, r4, #1
	add r7, r7, #2
	cmp r4, #0xc
	bge _02212178
	b _02211F70
_02212178:
	ldr r2, [sp, #0x38]
	mov r1, #0x5d
	ldr r0, [sp, #0x10]
	lsl r1, r1, #2
	add r2, #0x5c
	mul r1, r0
	add r0, r2, r1
	ldr r1, [sp, #0x10]
	add r3, r6, #0
	lsl r2, r1, #1
	add r3, #0xc
	add r1, r1, r2
	add r1, r3, r1
	bl ov96_022144C0
	ldr r0, [sp, #0x38]
	ldr r2, [sp, #0x10]
	add r1, r6, #0
	bl ov96_0221457C
	ldr r2, [r6, #0x1c]
	mov r5, #0
	asr r0, r2, #0x1e
	mov r1, #1
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x1c]
	asr r0, r2, #0x1f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x3c]
	ldr r1, _02212360 ; =0x0000062C
	ldr r0, [sp, #0x38]
	str r5, [sp, #0x20]
	add r4, r0, r1
_022121C2:
	mov r1, #0
	add r0, sp, #0x50
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r6, #0x1c]
	asr r0, r0, #0x18
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #0x20]
	asr r1, r0
	mov r0, #3
	and r0, r1
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #1
	bne _02212220
	ldr r0, [r4]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r4, #4]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	cmp r5, #0
	bne _02212206
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	beq _02212206
	mov r2, #1
	b _02212208
_02212206:
	mov r2, #0
_02212208:
	add r3, r6, r5
	ldrb r0, [r3, #0x1a]
	lsl r1, r5, #0x18
	lsr r1, r1, #0x18
	str r0, [sp]
	ldr r0, [sp, #0x10]
	str r0, [sp, #4]
	ldrb r3, [r3, #0x18]
	ldr r0, [sp, #0x38]
	bl ov96_022123B0
	b _02212296
_02212220:
	add r1, r4, #0
	add r1, #0x3f
	mov r0, #0
	strb r0, [r1]
	cmp r5, #1
	bne _02212248
	ldr r0, [sp, #0x3c]
	cmp r0, #0
	ldr r0, [r4]
	beq _0221223E
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	b _02212252
_0221223E:
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	b _02212252
_02212248:
	mov r1, #1
	ldr r0, [r4]
	add r2, r1, #0
	bl ov96_021EB52C
_02212252:
	cmp r7, #2
	ldr r0, [r4, #4]
	bne _02212272
	mov r1, #1
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r4, #0
	add r0, #0x44
	ldrb r0, [r0]
	cmp r0, #2
	beq _0221227A
	ldr r0, _02212364 ; =0x000008C7
	bl PlaySE
	b _0221227A
_02212272:
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_0221227A:
	cmp r5, #0
	bne _0221228E
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	beq _0221228E
	ldr r0, [r4]
	mov r1, #0xb
	bl ov96_021EB570
	b _02212296
_0221228E:
	ldr r0, [r4]
	mov r1, #0xa
	bl ov96_021EB570
_02212296:
	add r0, r4, #0
	add r0, #0x44
	strb r7, [r0]
	add r7, r6, r5
	ldrb r0, [r7, #0x18]
	lsl r0, r0, #0xc
	str r0, [sp, #0x50]
	ldrb r0, [r7, #0x1a]
	bl ov96_02213F5C
	str r0, [sp, #0x54]
	lsl r1, r5, #0x18
	ldrb r3, [r7, #0x1a]
	ldr r0, [sp, #0x38]
	ldr r2, [sp, #0x1c]
	lsr r1, r1, #0x18
	bl ov96_02213FF4
	ldr r0, [r4]
	add r1, sp, #0x50
	bl ov96_021EB588
	ldr r0, [r4, #4]
	add r1, sp, #0x50
	bl ov96_021EB588
	ldrb r0, [r7, #0x1a]
	cmp r0, #0xc0
	ldr r0, [r4]
	bhs _022122DA
	mov r1, #0x2e
	bl ov96_021EB630
	b _022122E0
_022122DA:
	mov r1, #4
	bl ov96_021EB630
_022122E0:
	ldr r0, [sp, #0x20]
	add r5, r5, #1
	add r0, r0, #2
	add r4, #0x4c
	str r0, [sp, #0x20]
	cmp r5, #2
	bge _022122F0
	b _022121C2
_022122F0:
	ldr r7, _02212368 ; =0x000006E4
	ldr r4, [sp, #0x38]
	add r6, r7, #0
	mov r5, #0
	sub r6, #0x10
_022122FA:
	ldr r0, [r4, r6]
	bl ov96_021EB57C
	cmp r0, #0
	bne _0221230E
	ldr r0, [r4, r7]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
_0221230E:
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #4
	blt _022122FA
	ldr r0, [sp, #8]
	bl ov96_0221236C
	mov r1, #0x75
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	bl ov96_02214904
	add r2, r0, #0
	mov r1, #0x75
	ldr r0, [sp, #0x38]
	lsl r1, r1, #4
	ldr r0, [r0, r1]
	lsl r1, r2, #0x18
	lsr r1, r1, #0x18
	bl ov96_0221497C
	mov r2, #0x75
	ldr r0, [sp, #0x38]
	lsl r2, r2, #4
	ldr r0, [r0, r2]
	ldr r1, [sp, #0x38]
	sub r2, #0x18
	ldr r1, [r1, r2]
	bl ov96_0221490C
	ldr r0, [sp, #0x38]
	bl ov96_02214490
	add sp, #0x74
	pop {r4, r5, r6, r7, pc}
	nop
_02212358: .word 0x00000748
_0221235C: .word 0x000008CC
_02212360: .word 0x0000062C
_02212364: .word 0x000008C7
_02212368: .word 0x000006E4
	thumb_func_end ov96_02211F38

	thumb_func_start ov96_0221236C
ov96_0221236C: ; 0x0221236C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	ldr r1, [r0, #0x1c]
	ldr r0, [r0, #0x20]
	asr r2, r1, #0x1c
	mov r1, #3
	and r1, r2
	lsl r1, r1, #0x18
	lsr r2, r1, #0x18
	asr r1, r0, #0x19
	mov r0, #0x7f
	and r0, r1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, _022123AC ; =0x00000814
	add r3, r4, r2
	strb r1, [r3, r0]
	sub r0, #0xc4
	ldr r0, [r4, r0]
	bl ov96_022148E8
	pop {r3, r4, r5, pc}
	nop
_022123AC: .word 0x00000814
	thumb_func_end ov96_0221236C

	thumb_func_start ov96_022123B0
ov96_022123B0: ; 0x022123B0
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r4, r0, #0
	add r0, sp, #0x10
	ldrb r3, [r0, #0x10]
	str r2, [sp]
	cmp r3, #0xd8
	blo _022123D2
	ldr r0, _022124E0 ; =0x0000062C
	add r2, r4, r0
	mov r0, #0x4c
	mul r0, r1
	add r1, r2, r0
	add r1, #0x3f
	ldrb r1, [r1]
	cmp r1, #0
	beq _022123D4
_022123D2:
	b _022124DA
_022123D4:
	add r0, r2, r0
	mov r1, #1
	add r0, #0x3f
	sub r3, #0xd8
	strb r1, [r0]
	lsl r0, r3, #0x18
	lsr r7, r0, #0x18
	cmp r7, #0x10
	blo _022123EA
	bl GF_AssertFail
_022123EA:
	lsl r0, r7, #0x16
	lsr r5, r0, #0x18
	lsl r6, r5, #2
	ldr r0, _022124E4 ; =0x000006C4
	add r1, r4, r6
	ldr r0, [r1, r0]
	mov r1, #0xf
	bl ov96_021EB564
	lsr r1, r7, #0x1f
	lsl r2, r7, #0x1e
	sub r2, r2, r1
	mov r0, #0x1e
	ror r2, r0
	add r0, r1, r2
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	cmp r0, r5
	beq _02212434
	ldr r0, [sp]
	mov r3, #0
	cmp r0, #0
	beq _0221241C
	mov r3, #1
_0221241C:
	ldr r1, [sp, #4]
	add r0, r4, #0
	mov r2, #1
	bl ov96_02214258
	mov r2, #0
	add r0, r4, #0
	add r1, r5, #0
	add r3, r2, #0
	bl ov96_02214258
	b _02212440
_02212434:
	mov r2, #0
	add r0, r4, #0
	add r1, r5, #0
	add r3, r2, #0
	bl ov96_02214258
_02212440:
	add r0, r7, #0
	mov r1, #5
	bl _s32_div_f
	cmp r1, #0
	bne _02212466
	add r0, r7, #0
	mov r1, #5
	bl _s32_div_f
	add r1, sp, #0x10
	ldrb r1, [r1, #0x14]
	cmp r1, r0
	bne _02212466
	ldr r0, _022124E8 ; =0x000008C6
	bl PlaySE
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
_02212466:
	add r0, sp, #0x10
	ldrb r1, [r0, #0x14]
	ldr r0, [sp, #4]
	cmp r1, r0
	bne _022124D4
	cmp r5, #3
	bhi _02212490
	add r0, r5, r5
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02212480: ; jump table
	.short _02212488 - _02212480 - 2 ; case 0
	.short _0221248C - _02212480 - 2 ; case 1
	.short _02212488 - _02212480 - 2 ; case 2
	.short _0221248C - _02212480 - 2 ; case 3
_02212488:
	mov r7, #0x11
	b _02212498
_0221248C:
	mov r7, #0x12
	b _02212498
_02212490:
	bl GF_AssertFail
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
_02212498:
	ldr r0, _022124EC ; =0x000006D4
	mov r1, #1
	add r0, r4, r0
	str r0, [sp, #8]
	ldr r0, [r0, r6]
	add r2, r1, #0
	bl ov96_021EB52C
	ldr r0, [sp, #8]
	add r1, r7, #0
	ldr r0, [r0, r6]
	bl ov96_021EB564
	ldr r0, _022124F0 ; =0x000006E4
	mov r1, #1
	add r4, r4, r0
	ldr r0, [r4, r6]
	add r2, r1, #0
	bl ov96_021EB52C
	add r5, #0x13
	ldr r0, [r4, r6]
	add r1, r5, #0
	bl ov96_021EB564
	ldr r0, _022124F4 ; =0x000008CB
	bl PlaySE
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
_022124D4:
	ldr r0, _022124E8 ; =0x000008C6
	bl PlaySE
_022124DA:
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_022124E0: .word 0x0000062C
_022124E4: .word 0x000006C4
_022124E8: .word 0x000008C6
_022124EC: .word 0x000006D4
_022124F0: .word 0x000006E4
_022124F4: .word 0x000008CB
	thumb_func_end ov96_022123B0

	thumb_func_start ov96_022124F8
ov96_022124F8: ; 0x022124F8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x10c
	bl ov96_021E5DC4
	str r0, [sp, #8]
	add r0, sp, #0x70
	mov r4, #0
	str r4, [r0]
	str r4, [r0, #4]
	ldr r3, _022127F0 ; =0x0221D25C
	str r4, [r0, #8]
	ldmia r3!, {r0, r1}
	add r2, sp, #0x10
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r7, sp, #0x7c
	str r0, [r2]
	ldr r0, [sp, #8]
	str r0, [sp, #0xc]
	add r0, #0x5c
	str r0, [sp, #0xc]
_02212522:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	add r2, r5, #0
	mul r2, r0
	ldr r0, [sp, #0xc]
	add r3, sp, #0x70
	add r2, r0, r2
	mov r0, #0x7c
	mul r0, r1
	add r5, r2, r0
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	add r2, #0x3c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r3, r5, #0
	str r0, [r2]
	add r3, #0x30
	ldmia r3!, {r0, r1}
	add r2, r7, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r3, r5, #0
	str r0, [r2]
	add r3, #0x30
	ldmia r3!, {r0, r1}
	add r2, sp, #0x4c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [r5, #0x48]
	cmp r0, #0
	beq _022125FC
	sub r0, r0, #2
	cmp r0, #1
	bhi _02212590
	mov r0, #0x5a
	ldrsh r0, [r5, r0]
	cmp r0, #0
	ble _02212590
	mov r0, #0x5a
	ldrsh r0, [r5, r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0x5a
	strh r1, [r0]
_02212590:
	mov r0, #0x58
	ldrsh r1, [r5, r0]
	cmp r1, #0
	bne _022125AC
	mov r0, #0x5a
	ldrsh r0, [r5, r0]
	cmp r0, #0
	bgt _022125AC
	mov r0, #0
	add r1, r5, #0
	str r0, [r5, #0x48]
	add r1, #0x5a
	strh r0, [r1]
	b _022125FC
_022125AC:
	lsl r0, r1, #0xc
	add r1, r5, #0
	add r2, sp, #0x4c
	add r1, #0x4c
	add r3, r2, #0
	bl VEC_MultAdd
	add r6, sp, #0x4c
	add r3, r5, #0
	add r3, #0x30
	ldmia r6!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	str r0, [r3]
	add r3, r5, #0
	ldmia r2!, {r0, r1}
	add r3, #0x24
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
	mov r0, #0x58
	ldrsh r0, [r5, r0]
	cmp r0, #0
	ble _022125EA
	mov r0, #0x58
	ldrsh r0, [r5, r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0x58
	strh r1, [r0]
_022125EA:
	ldr r0, [r5, #0x78]
	cmp r0, #2
	beq _022125FC
	ldr r0, [r5, #0x48]
	cmp r0, #3
	bne _022125FC
	add r0, r5, #0
	bl ov96_02213FB4
_022125FC:
	ldr r0, [r5, #0x78]
	cmp r0, #2
	beq _0221260C
	add r0, r5, #0
	add r0, #0x60
	ldrb r0, [r0]
	cmp r0, #0
	beq _02212634
_0221260C:
	add r0, r5, #0
	add r0, #0x60
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r5, #0
	add r0, #0x60
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0x60
	ldrb r0, [r0]
	cmp r0, #0
	bne _0221263A
	mov r0, #0
	str r0, [r5, #0x78]
	add r0, r5, #0
	add r0, #0x70
	ldrb r0, [r0]
	add r5, #0x71
	strb r0, [r5]
	b _02212742
_02212634:
	ldr r0, [r5, #0x48]
	cmp r0, #0
	beq _0221263C
_0221263A:
	b _02212742
_0221263C:
	add r0, r5, #0
	add r0, #0x24
	add r1, sp, #0x4c
	add r2, sp, #0x64
	bl VEC_Subtract
	add r0, sp, #0x64
	bl VEC_Mag
	add r6, r0, #0
	cmp r6, #0
	bgt _0221265C
	add r0, r5, #0
	bl ov96_02213558
	b _02212742
_0221265C:
	add r0, sp, #0x64
	add r1, sp, #0x58
	bl VEC_Normalize
	add r3, sp, #0x58
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	add r2, #0x3c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [r5, #0x78]
	cmp r0, #1
	bne _0221267C
	ldr r0, [r5, #0x68]
	b _02212688
_0221267C:
	cmp r0, #3
	bne _02212686
	mov r0, #2
	lsl r0, r0, #0xc
	b _02212688
_02212686:
	ldr r0, [r5, #0x64]
_02212688:
	cmp r6, r0
	bgt _0221269C
	add r3, r5, #0
	add r3, #0x24
	ldmia r3!, {r0, r1}
	add r2, sp, #0x4c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _022126BA
_0221269C:
	mov r2, #0
	add r1, sp, #0x40
	str r2, [r1]
	str r2, [r1, #4]
	str r2, [r1, #8]
	add r1, sp, #0x58
	add r2, sp, #0x40
	add r3, sp, #0x64
	bl VEC_MultAdd
	add r1, sp, #0x4c
	add r0, sp, #0x64
	add r2, r1, #0
	bl VEC_Add
_022126BA:
	cmp r6, #0
	beq _02212736
	add r6, sp, #0x10
	ldmia r6!, {r0, r1}
	add r3, sp, #0x34
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r6]
	add r1, sp, #0x28
	str r0, [r3]
	ldr r0, [sp, #0x5c]
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x58]
	str r0, [sp, #0x30]
	mov r0, #0
	str r0, [sp, #0x2c]
	add r0, r2, #0
	bl sub_02020C64
	mov r1, #2
	lsl r1, r1, #0xc
	cmp r0, r1
	bls _022126F0
	mov r1, #0xe
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _022126FA
_022126F0:
	add r1, r5, #0
	add r1, #0x5c
	mov r0, #4
	strh r0, [r1]
	b _02212736
_022126FA:
	mov r1, #2
	lsl r1, r1, #0xc
	cmp r0, r1
	bls _02212714
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	bhs _02212714
	add r1, r5, #0
	add r1, #0x5c
	mov r0, #2
	strh r0, [r1]
	b _02212736
_02212714:
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _0221272E
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	bhi _0221272E
	add r1, r5, #0
	add r1, #0x5c
	mov r0, #3
	strh r0, [r1]
	b _02212736
_0221272E:
	add r1, r5, #0
	add r1, #0x5c
	mov r0, #1
	strh r0, [r1]
_02212736:
	add r2, sp, #0x4c
	ldmia r2!, {r0, r1}
	add r5, #0x30
	stmia r5!, {r0, r1}
	ldr r0, [r2]
	str r0, [r5]
_02212742:
	add r4, r4, #1
	add r7, #0xc
	cmp r4, #0xc
	bge _0221274C
	b _02212522
_0221274C:
	ldr r0, [sp, #8]
	add r5, sp, #0x7c
	add r0, #0x5c
	mov r6, #0
	str r5, [sp, #4]
	str r0, [sp, #8]
_02212758:
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	add r2, r4, #0
	mul r2, r0
	ldr r0, [sp, #8]
	add r2, r0, r2
	mov r0, #0x7c
	mul r0, r1
	add r4, r2, r0
	ldr r1, [r4, #0x30]
	ldr r0, [r5]
	cmp r1, r0
	bne _0221278C
	ldr r1, [r4, #0x34]
	ldr r0, [r5, #4]
	cmp r1, r0
	beq _022127BE
_0221278C:
	add r0, sp, #0x1c
	str r0, [sp]
	add r0, r4, #0
	ldr r1, [sp, #4]
	ldr r2, [r4, #0x20]
	add r0, #0x30
	mov r3, #1
	bl ov96_02213728
	cmp r0, #0
	beq _022127BE
	add r7, sp, #0x1c
	add r3, r4, #0
	add r3, #0x30
	ldmia r7!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r7]
	str r0, [r3]
	add r3, r4, #0
	ldmia r2!, {r0, r1}
	add r3, #0x24
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
_022127BE:
	ldr r1, [r4, #0x30]
	ldr r0, [r4, #0x24]
	cmp r1, r0
	bne _022127DC
	ldr r1, [r4, #0x34]
	ldr r0, [r4, #0x28]
	cmp r1, r0
	bne _022127DC
	ldr r0, [r4, #0x78]
	cmp r0, #3
	beq _022127DC
	cmp r0, #2
	beq _022127DC
	mov r0, #0
	str r0, [r4, #0x78]
_022127DC:
	ldr r0, [sp, #4]
	add r6, r6, #1
	add r0, #0xc
	add r5, #0xc
	str r0, [sp, #4]
	cmp r6, #0xc
	blt _02212758
	add sp, #0x10c
	pop {r4, r5, r6, r7, pc}
	nop
_022127F0: .word 0x0221D25C
	thumb_func_end ov96_022124F8

	thumb_func_start ov96_022127F4
ov96_022127F4: ; 0x022127F4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x60
	str r0, [sp, #8]
	bl ov96_021E5DC4
	str r0, [sp, #0x1c]
	mov r0, #0
	str r0, [sp, #0x20]
	ldr r1, _02212B08 ; =0x0000062C
	ldr r0, [sp, #0x1c]
	add r5, r0, r1
_0221280A:
	add r0, r5, #0
	add r0, #0x38
	ldrb r1, [r0]
	cmp r1, #0
	beq _02212822
	add r0, r5, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #0
	beq _02212824
	cmp r0, #2
	beq _02212824
_02212822:
	b _02212B82
_02212824:
	cmp r1, #1
	bne _0221282E
	mov r0, #8
	str r0, [sp, #0x18]
	b _02212836
_0221282E:
	cmp r1, #2
	bne _02212836
	mov r0, #0xc
	str r0, [sp, #0x18]
_02212836:
	ldr r0, [sp, #0x18]
	mov r6, #0
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	add r0, r5, #0
	str r0, [sp, #0x28]
	add r0, #8
	str r0, [sp, #0x28]
	ldr r0, [sp, #0x1c]
	str r0, [sp, #0x24]
	add r0, #0x5c
	str r0, [sp, #0x24]
_0221284E:
	mov r1, #0
	add r0, sp, #0x54
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	str r1, [sp, #0x34]
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r1, #0x5d
	lsl r1, r1, #2
	str r0, [sp, #0x10]
	mul r1, r0
	ldr r0, [sp, #0x24]
	ldr r2, [sp, #0x34]
	add r1, r0, r1
	mov r0, #0x7c
	mul r0, r2
	add r2, sp, #0x58
	str r2, [sp]
	add r2, sp, #0x38
	add r4, r1, r0
	str r2, [sp, #4]
	ldr r0, [r1, r0]
	ldr r1, [r4, #0x30]
	ldr r2, [r4, #0x34]
	add r3, sp, #0x54
	bl ov96_021EAF78
	ldr r1, [sp, #0x38]
	ldr r2, [sp, #0x28]
	ldr r3, [sp, #0xc]
	add r0, sp, #0x54
	lsl r1, r1, #0xc
	bl ov96_0221341C
	cmp r0, #0
	bne _022128A6
	b _02212ADC
_022128A6:
	add r0, r5, r6
	add r0, #0x2c
	ldrb r0, [r0]
	cmp r0, #0
	beq _022128B6
	ldr r0, [r5, #0x48]
	cmp r0, #0
	bne _022128E6
_022128B6:
	ldr r0, [r4, #0x48]
	cmp r0, #3
	beq _022128E6
	cmp r0, #2
	beq _022128E6
	ldr r0, [sp, #0x28]
	add r1, sp, #0x54
	add r2, sp, #0x48
	bl VEC_Subtract
	add r0, sp, #0x48
	add r1, r0, #0
	bl VEC_Normalize
	add r0, r5, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #2
	bne _022129A6
	add r0, r5, #0
	add r0, #0x3b
	ldrb r0, [r0]
	cmp r0, r6
	bne _022128E8
_022128E6:
	b _02212AE4
_022128E8:
	add r0, r4, #0
	add r0, #0x71
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x45
	ldrb r0, [r0]
	sub r1, r1, r0
	cmp r1, #0
	bgt _02212966
	add r1, r4, #0
	add r1, #0x71
	mov r0, #0
	strb r0, [r1]
	mov r0, #2
	add r1, r4, #0
	str r0, [r4, #0x78]
	add r3, r4, #0
	add r3, #0x4c
	add r1, #0x60
	mov r0, #0x5a
	strb r0, [r1]
	mov r0, #3
	add r1, r4, #0
	str r0, [r4, #0x48]
	add r1, #0x5a
	mov r0, #0x1e
	strh r0, [r1]
	add r0, sp, #0x48
	add r2, r0, #0
	str r0, [sp, #0x2c]
	ldmia r2!, {r0, r1}
	add r7, r3, #0
	stmia r3!, {r0, r1}
	add r0, r2, #0
	ldr r0, [r0]
	str r2, [sp, #0x2c]
	str r0, [r3]
	mov r0, #0
	ldr r2, [sp, #0x34]
	ldr r1, [r7]
	mvn r0, r0
	mul r0, r1
	str r0, [r7]
	mov r0, #0
	lsl r2, r2, #0x18
	ldr r1, [r4, #0x50]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x50]
	ldr r1, [sp, #0x10]
	add r4, #0x58
	mov r0, #7
	strh r0, [r4]
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #1
	bl ov96_021E8228
	b _02212AD2
_02212966:
	add r0, r4, #0
	add r0, #0x71
	strb r1, [r0]
	mov r0, #3
	add r1, r4, #0
	str r0, [r4, #0x48]
	add r3, r4, #0
	add r3, #0x4c
	add r1, #0x5a
	mov r0, #0x1e
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0x58
	mov r0, #7
	add r7, sp, #0x48
	strh r0, [r1]
	ldmia r7!, {r0, r1}
	add r2, r3, #0
	stmia r3!, {r0, r1}
	ldr r0, [r7]
	str r0, [r3]
	mov r0, #0
	ldr r1, [r2]
	mvn r0, r0
	mul r0, r1
	str r0, [r2]
	mov r0, #0
	ldr r1, [r4, #0x50]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x50]
	b _02212AD2
_022129A6:
	add r0, r4, #0
	add r0, #0x3c
	bl VEC_Mag
	cmp r0, #0
	bne _022129B4
	b _02212AC2
_022129B4:
	add r0, r4, #0
	add r0, #0x6c
	ldrh r0, [r0]
	mov r1, #0x5a
	lsl r1, r1, #2
	lsl r0, r0, #0x10
	bl _s32_div_f
	add r2, r0, #0
	add r0, r4, #0
	lsl r2, r2, #0x10
	add r0, #0x3c
	add r1, sp, #0x48
	lsr r2, r2, #0x10
	bl ov96_02213534
	ldr r1, [r4, #0x78]
	cmp r1, #1
	bne _02212A86
	cmp r0, #0
	beq _02212A86
	add r1, r5, #0
	add r1, #0x39
	mov r0, #2
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3e
	strb r0, [r1]
	add r0, r4, #0
	add r0, #0x73
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x41
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x72
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x45
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x75
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x46
	strh r1, [r0]
	add r0, r5, #0
	add r0, #0x41
	ldrb r1, [r0]
	mov r0, #0x1e
	add r2, r1, #0
	mul r2, r0
	ldr r0, _02212B0C ; =0x0221D514
	ldrb r0, [r0, r2]
	add r2, r4, #0
	add r2, #0x4c
	str r0, [sp, #0x14]
	mov r0, #1
	str r0, [r4, #0x48]
	add r0, sp, #0x48
	mov ip, r0
	mov r3, ip
	ldmia r3!, {r0, r1}
	add r7, r2, #0
	stmia r2!, {r0, r1}
	add r0, r3, #0
	ldr r0, [r0]
	mov r3, #4
	str r0, [r2]
	mov r0, #0
	ldr r2, [sp, #0x34]
	ldr r1, [r7]
	mvn r0, r0
	mul r0, r1
	str r0, [r7]
	mov r0, #0
	lsl r2, r2, #0x18
	ldr r1, [r4, #0x50]
	mvn r0, r0
	mul r0, r1
	add r1, r4, #0
	str r0, [r4, #0x50]
	add r1, #0x58
	mov r0, #3
	strh r0, [r1]
	mov r0, #0
	add r1, r5, #0
	str r0, [r4, #0x78]
	add r1, #0x3c
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3d
	mov r0, #0x1e
	strb r0, [r1]
	ldr r1, [sp, #0x10]
	mov r0, #1
	str r0, [sp]
	lsl r1, r1, #0x18
	ldr r0, [sp, #8]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	b _02212ABA
_02212A86:
	add r1, r5, #0
	add r1, #0x3e
	mov r0, #1
	strb r0, [r1]
	add r4, #0x73
	add r0, r5, #0
	ldrb r1, [r4]
	add r0, #0x41
	strb r1, [r0]
	add r0, r5, #0
	add r0, #0x41
	ldrb r1, [r0]
	mov r0, #0x1e
	add r2, r1, #0
	mul r2, r0
	ldr r0, _02212B10 ; =0x0221D5AA
	add r1, r5, #0
	ldrb r0, [r0, r2]
	add r1, #0x3c
	str r0, [sp, #0x14]
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3d
	mov r0, #0x1e
	strb r0, [r1]
_02212ABA:
	add r1, r5, #0
	ldr r0, [sp, #0x14]
	add r1, #0x40
	strb r0, [r1]
_02212AC2:
	ldr r0, [sp, #0x1c]
	add r1, r5, #0
	add r2, sp, #0x48
	bl ov96_022134D4
	add r0, r5, #0
	add r0, #0x3b
	strb r6, [r0]
_02212AD2:
	add r1, r5, r6
	add r1, #0x2c
	mov r0, #1
	strb r0, [r1]
	b _02212AE4
_02212ADC:
	add r1, r5, r6
	add r1, #0x2c
	mov r0, #0
	strb r0, [r1]
_02212AE4:
	add r6, r6, #1
	cmp r6, #0xc
	bge _02212AEC
	b _0221284E
_02212AEC:
	add r7, r5, #0
	mov r4, #0
	add r7, #8
_02212AF2:
	lsr r2, r4, #0x1f
	lsl r1, r4, #0x1e
	sub r1, r1, r2
	mov r0, #0x1e
	ror r1, r0
	add r1, r2, r1
	mov r0, #0x18
	add r2, r1, #0
	mul r2, r0
	ldr r0, _02212B14 ; =0x0221D4B4
	b _02212B18
	.balign 4, 0
_02212B08: .word 0x0000062C
_02212B0C: .word 0x0221D514
_02212B10: .word 0x0221D5AA
_02212B14: .word 0x0221D4B4
_02212B18:
	ldr r3, [sp, #0xc]
	add r6, r0, r2
	asr r0, r4, #1
	lsr r0, r0, #0x1e
	add r0, r4, r0
	asr r1, r0, #2
	mov r0, #0xc
	mul r0, r1
	mov r1, #2
	str r0, [sp, #0x30]
	add r0, r6, r0
	lsl r1, r1, #0xe
	add r2, r7, #0
	bl ov96_0221341C
	cmp r0, #0
	beq _02212B7C
	ldr r0, [sp, #0x30]
	add r1, r5, #0
	add r0, r6, r0
	add r1, #8
	add r2, sp, #0x3c
	bl VEC_Subtract
	add r0, sp, #0x3c
	add r1, r0, #0
	bl VEC_Normalize
	add r0, r5, #0
	add r0, #0x14
	add r1, sp, #0x3c
	bl VEC_DotProduct
	cmp r0, #0
	ble _02212B82
	add r2, r5, #0
	lsl r0, r0, #1
	add r2, #0x14
	neg r0, r0
	add r1, sp, #0x3c
	add r3, r2, #0
	bl VEC_MultAdd
	add r0, r5, #0
	add r1, r5, #0
	add r0, #0x14
	add r1, #0x20
	bl VEC_Normalize
	b _02212B82
_02212B7C:
	add r4, r4, #1
	cmp r4, #8
	blt _02212AF2
_02212B82:
	ldr r0, [sp, #0x20]
	add r5, #0x4c
	add r0, r0, #1
	str r0, [sp, #0x20]
	cmp r0, #2
	bge _02212B90
	b _0221280A
_02212B90:
	add sp, #0x60
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022127F4

	thumb_func_start ov96_02212B94
ov96_02212B94: ; 0x02212B94
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	bl ov96_021E5DC4
	mov r1, #0x6b
	add r5, r0, #0
	lsl r1, r1, #4
	ldrb r0, [r5, r1]
	cmp r0, #0
	bne _02212BC0
	add r0, r1, #0
	add r0, #0x88
	ldr r2, [r5, r0]
	mov r0, #0xe1
	lsl r0, r0, #2
	cmp r2, r0
	bgt _02212BC0
	mov r2, #3
	add r0, r1, #1
	strb r2, [r5, r0]
	mov r0, #1
	strb r0, [r5, r1]
_02212BC0:
	ldr r0, _02212EC4 ; =0x0000062C
	mov r7, #0
	add r4, r5, r0
_02212BC6:
	add r0, r4, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #0
	beq _02212CB4
	add r0, r4, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #3
	bne _02212C02
	add r0, r4, #0
	add r0, #0x43
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x43
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x43
	ldrb r0, [r0]
	cmp r0, #8
	blo _02212CB4
	add r1, r4, #0
	add r1, #0x43
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x39
	strb r0, [r1]
	b _02212E70
_02212C02:
	cmp r0, #1
	bne _02212CAC
	add r0, r4, #0
	add r0, #0x3a
	ldrb r0, [r0]
	sub r1, r0, #1
	add r0, r4, #0
	add r0, #0x3a
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3a
	ldrb r0, [r0]
	cmp r0, #0
	bne _02212CB4
	add r0, r4, #0
	bl ov96_02213444
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_02213E60
	cmp r7, #0
	bne _02212CA2
	ldr r0, _02212EC8 ; =0x00000738
	mov r1, #0x4b
	ldr r0, [r5, r0]
	lsl r1, r1, #4
	cmp r0, r1
	blt _02212C40
	mov r6, #0
	b _02212C58
_02212C40:
	lsr r1, r1, #1
	cmp r0, r1
	blt _02212C4A
	mov r6, #5
	b _02212C58
_02212C4A:
	mov r1, #0x4b
	lsl r1, r1, #2
	cmp r0, r1
	blt _02212C56
	mov r6, #0xa
	b _02212C58
_02212C56:
	mov r6, #0x19
_02212C58:
	ldr r0, _02212ECC ; =0x00000743
	ldrb r0, [r5, r0]
	add r0, r6, r0
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	cmp r6, #0x64
	bls _02212C68
	mov r6, #0x64
_02212C68:
	bl LCRandom
	mov r1, #0x64
	bl _s32_div_f
	cmp r1, r6
	bge _02212C86
	add r1, r4, #0
	add r1, #0x38
	mov r0, #2
	strb r0, [r1]
	ldr r0, _02212ECC ; =0x00000743
	mov r1, #0
	strb r1, [r5, r0]
	b _02212E70
_02212C86:
	add r1, r4, #0
	add r1, #0x38
	mov r0, #1
	strb r0, [r1]
	ldr r0, _02212ECC ; =0x00000743
	ldrb r0, [r5, r0]
	cmp r0, #0x64
	bhs _02212CB4
	ldr r0, _02212ECC ; =0x00000743
	ldrb r0, [r5, r0]
	add r1, r0, #1
	ldr r0, _02212ECC ; =0x00000743
	strb r1, [r5, r0]
	b _02212E70
_02212CA2:
	add r1, r4, #0
	add r1, #0x38
	mov r0, #1
	strb r0, [r1]
	b _02212E70
_02212CAC:
	cmp r0, #0
	beq _02212CB6
	cmp r0, #2
	beq _02212CB6
_02212CB4:
	b _02212E70
_02212CB6:
	add r0, r4, #0
	add r0, #0x40
	ldrb r0, [r0]
	lsl r6, r0, #0xc
	bne _02212CC2
	b _02212E56
_02212CC2:
	add r3, r4, #0
	add r3, #8
	ldmia r3!, {r0, r1}
	add r2, sp, #0x1c
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [r4, #8]
	ldr r0, [r4, #0x14]
	add r0, r1, r0
	str r0, [r4, #8]
	ldr r1, [r4, #0xc]
	ldr r0, [r4, #0x18]
	add r0, r1, r0
	str r0, [r4, #0xc]
	add r0, r4, #0
	add r0, #0x46
	ldrh r1, [r0]
	ldr r0, _02212ED0 ; =0x0221D640
	ldrb r0, [r0, r1]
	lsl r0, r0, #0xc
	cmp r6, r0
	blt _02212D0E
	add r0, r4, #0
	add r0, #0x3e
	ldrb r0, [r0]
	cmp r0, #2
	bne _02212D04
	add r1, r4, #0
	add r1, #0x39
	mov r0, #2
	strb r0, [r1]
	b _02212D1C
_02212D04:
	add r1, r4, #0
	add r1, #0x39
	mov r0, #0
	strb r0, [r1]
	b _02212D1C
_02212D0E:
	add r1, r4, #0
	add r1, #0x39
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x45
	strb r0, [r1]
_02212D1C:
	mov r1, #0
	add r0, sp, #0x10
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r1, r4, #0
	add r1, #0x3e
	add r0, r4, #0
	add r0, #0x3c
	ldrb r1, [r1]
	ldrb r0, [r0]
	cmp r1, #2
	bne _02212D48
	add r1, r4, #0
	add r1, #0x41
	ldrb r1, [r1]
	mov r2, #0x1e
	mul r2, r1
	ldr r1, _02212ED4 ; =0x0221D514
	add r1, r1, r2
	ldrb r1, [r0, r1]
	b _02212D64
_02212D48:
	cmp r1, #1
	bne _02212D5E
	add r1, r4, #0
	add r1, #0x41
	ldrb r1, [r1]
	mov r2, #0x1e
	mul r2, r1
	ldr r1, _02212ED8 ; =0x0221D5AA
	add r1, r1, r2
	ldrb r1, [r0, r1]
	b _02212D64
_02212D5E:
	bl GF_AssertFail
	mov r1, #0
_02212D64:
	add r0, r4, #0
	add r0, #0x40
	strb r1, [r0]
	add r2, r4, #0
	add r0, r5, #0
	add r1, r4, #0
	add r2, #0x20
	bl ov96_022134D4
	add r0, r4, #0
	add r0, #0x3c
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x3c
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3c
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0x3d
	ldrb r0, [r0]
	cmp r1, r0
	blo _02212DB8
	mov r0, #0
	str r0, [r4, #0x14]
	add r2, r4, #0
	add r3, sp, #0x10
	str r0, [r4, #0x18]
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r4, #0
	str r0, [r2]
	add r1, #0x3e
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x40
	strb r0, [r1]
	b _02212DE4
_02212DB8:
	add r0, r4, #0
	add r0, #0x40
	ldrb r0, [r0]
	cmp r0, #0
	bne _02212DE4
	add r3, sp, #0x10
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r1, r4, #0
	str r0, [r2]
	add r1, #0x3c
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x3d
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x3e
	strb r0, [r1]
_02212DE4:
	mov r0, #0
	str r0, [r4, #0x48]
	add r0, sp, #4
	str r0, [sp]
	add r0, r4, #0
	add r0, #8
	add r1, sp, #0x1c
	mov r2, #8
	mov r3, #0
	bl ov96_02213728
	add r3, r0, #0
	beq _02212E10
	add r6, sp, #4
	add r2, r4, #0
	ldmia r6!, {r0, r1}
	add r2, #8
	stmia r2!, {r0, r1}
	ldr r0, [r6]
	str r0, [r2]
	mov r0, #1
	str r0, [r4, #0x48]
_02212E10:
	cmp r3, #4
	bhi _02212E70
	add r0, r3, r3
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02212E20: ; jump table
	.short _02212E70 - _02212E20 - 2 ; case 0
	.short _02212E40 - _02212E20 - 2 ; case 1
	.short _02212E40 - _02212E20 - 2 ; case 2
	.short _02212E2A - _02212E20 - 2 ; case 3
	.short _02212E2A - _02212E20 - 2 ; case 4
_02212E2A:
	mov r0, #0
	ldr r1, [r4, #0x24]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x24]
	mov r0, #0
	ldr r1, [r4, #0x18]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x18]
	b _02212E70
_02212E40:
	mov r0, #0
	ldr r1, [r4, #0x20]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x20]
	mov r0, #0
	ldr r1, [r4, #0x14]
	mvn r0, r0
	mul r0, r1
	str r0, [r4, #0x14]
	b _02212E70
_02212E56:
	add r1, r4, #0
	add r1, #0x39
	mov r0, #0
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x45
	strb r0, [r1]
	add r1, r4, #0
	add r1, #0x46
	strh r0, [r1]
	add r1, r4, #0
	add r1, #0x3e
	strb r0, [r1]
_02212E70:
	add r7, r7, #1
	add r4, #0x4c
	cmp r7, #2
	bge _02212E7A
	b _02212BC6
_02212E7A:
	ldr r4, _02212EDC ; =0x00000664
	ldrb r0, [r5, r4]
	cmp r0, #0
	beq _02212F06
	add r0, r4, #0
	add r0, #0x4c
	ldrb r0, [r5, r0]
	cmp r0, #0
	beq _02212F06
	add r6, r4, #0
	sub r6, #0x38
	add r0, r5, r6
	add r0, #0x39
	ldrb r0, [r0]
	add r4, #0x14
	cmp r0, #1
	beq _02212F06
	cmp r0, #3
	beq _02212F06
	add r0, r5, r4
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #1
	beq _02212F06
	cmp r0, #3
	beq _02212F06
	add r0, r5, r6
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #1
	bne _02212EBC
	mov r1, #8
	b _02212EE8
_02212EBC:
	cmp r0, #2
	bne _02212EE0
	mov r1, #0xc
	b _02212EE8
	.balign 4, 0
_02212EC4: .word 0x0000062C
_02212EC8: .word 0x00000738
_02212ECC: .word 0x00000743
_02212ED0: .word 0x0221D640
_02212ED4: .word 0x0221D514
_02212ED8: .word 0x0221D5AA
_02212EDC: .word 0x00000664
_02212EE0:
	bl GF_AssertFail
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
_02212EE8:
	add r0, r5, r6
	add r2, r5, r4
	mov r3, #2
	add r0, #8
	lsl r1, r1, #0xc
	add r2, #8
	lsl r3, r3, #0xe
	bl ov96_0221341C
	cmp r0, #0
	beq _02212F06
	add r0, r5, r6
	add r1, r5, r4
	bl ov96_02212F0C
_02212F06:
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02212B94

	thumb_func_start ov96_02212F0C
ov96_02212F0C: ; 0x02212F0C
	push {r4, r5, lr}
	sub sp, #0x4c
	add r2, r0, #0
	add r5, r2, #0
	add r5, #0x14
	add r4, r1, #0
	ldmia r5!, {r0, r1}
	add r3, sp, #0x14
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r5, r2, #0
	str r0, [r3]
	add r5, #0x20
	ldmia r5!, {r0, r1}
	add r3, sp, #0x20
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, sp, #0x20
	str r0, [r3]
	add r0, r2, #0
	add r0, #0x39
	ldrb r0, [r0]
	add r5, r2, #0
	add r5, #8
	strb r0, [r1, #0x19]
	add r0, r2, #0
	add r0, #0x3b
	ldrb r0, [r0]
	add r3, sp, #8
	strb r0, [r1, #0x1b]
	add r0, r2, #0
	add r0, #0x3c
	ldrb r0, [r0]
	strb r0, [r1, #0x1c]
	add r0, r2, #0
	add r0, #0x3d
	ldrb r0, [r0]
	strb r0, [r1, #0x1d]
	add r0, r2, #0
	add r0, #0x3e
	ldrb r0, [r0]
	strb r0, [r1, #0x1e]
	add r0, r2, #0
	add r0, #0x40
	ldrb r0, [r0]
	add r1, sp, #0x40
	strb r0, [r1]
	add r0, r2, #0
	add r0, #0x41
	ldrb r0, [r0]
	strb r0, [r1, #1]
	ldmia r5!, {r0, r1}
	stmia r3!, {r0, r1}
	ldr r0, [r5]
	add r1, r4, #0
	str r0, [r3]
	add r0, r2, #0
	mov r2, #0
	bl ov96_02212F94
	add r0, r4, #0
	add r1, sp, #0
	mov r2, #1
	bl ov96_02212F94
	add sp, #0x4c
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02212F0C

	thumb_func_start ov96_02212F94
ov96_02212F94: ; 0x02212F94
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	add r5, r0, #0
	add r4, r1, #0
	str r2, [sp]
	add r1, sp, #0x1c
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r1, r5, #0
	add r1, #0x40
	ldrb r1, [r1]
	cmp r1, #3
	bhi _02213032
	add r1, r4, #0
	add r1, #0x40
	ldrb r1, [r1]
	cmp r1, #3
	bls _02213006
	add r0, r4, #0
	add r0, #0x39
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x39
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3c
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x3c
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3d
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x3d
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3e
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x3e
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x40
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x40
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x41
	ldrb r1, [r0]
	add r0, r5, #0
	add r0, #0x41
	strb r1, [r0]
	b _0221305C
_02213006:
	add r1, r5, #0
	add r1, #0x39
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3c
	strb r0, [r1]
	add r1, r5, #0
	mov r2, #0x1e
	add r1, #0x3d
	strb r2, [r1]
	add r1, r5, #0
	mov r2, #1
	add r1, #0x3e
	strb r2, [r1]
	add r1, r5, #0
	mov r2, #3
	add r1, #0x40
	strb r2, [r1]
	add r1, r5, #0
	add r1, #0x41
	strb r0, [r1]
	b _0221305C
_02213032:
	add r1, r5, #0
	add r1, #0x39
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3c
	strb r0, [r1]
	add r1, r5, #0
	mov r2, #0x1e
	add r1, #0x3d
	strb r2, [r1]
	add r1, r5, #0
	mov r2, #1
	add r1, #0x3e
	strb r2, [r1]
	add r1, r5, #0
	mov r2, #3
	add r1, #0x40
	strb r2, [r1]
	add r1, r5, #0
	add r1, #0x41
	strb r0, [r1]
_0221305C:
	add r0, r5, #0
	add r1, r4, #0
	add r2, r5, #0
	add r0, #8
	add r1, #8
	add r2, #0x20
	bl VEC_Subtract
	add r0, r5, #0
	add r0, #0x20
	bl VEC_Mag
	cmp r0, #0
	bne _022130B4
	ldr r3, _022130E4 ; =0x0221D268
	add r2, sp, #0x10
	ldmia r3!, {r0, r1}
	add r6, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _022130E8 ; =0x0221D280
	str r0, [r2]
	add r7, sp, #4
	ldmia r3!, {r0, r1}
	add r2, r7, #0
	stmia r7!, {r0, r1}
	ldr r0, [r3]
	str r0, [r7]
	ldr r0, [sp]
	cmp r0, #0
	bne _022130A8
	add r2, r5, #0
	ldmia r6!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r6]
	str r0, [r2]
	b _022130B4
_022130A8:
	add r3, r5, #0
	ldmia r2!, {r0, r1}
	add r3, #0x20
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
_022130B4:
	add r0, r5, #0
	add r0, #0x20
	add r1, r0, #0
	bl VEC_Normalize
	add r0, r5, #0
	add r0, #0x40
	ldrb r0, [r0]
	add r1, r5, #0
	add r3, r5, #0
	lsl r0, r0, #0xc
	add r1, #0x20
	add r2, sp, #0x1c
	add r3, #0x14
	bl VEC_MultAdd
	add r4, #0x3b
	ldrb r0, [r4]
	cmp r0, #0xc
	bhs _022130E0
	add r5, #0x3b
	strb r0, [r5]
_022130E0:
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022130E4: .word 0x0221D268
_022130E8: .word 0x0221D280
	thumb_func_end ov96_02212F94

	thumb_func_start ov96_022130EC
ov96_022130EC: ; 0x022130EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	str r0, [sp, #4]
	bl ov96_021E5DC4
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	ldr r1, _022132F0 ; =0x0000062C
	str r0, [sp, #0x14]
	add r5, r0, r1
	add r0, #0x5c
	str r0, [sp, #0x14]
_02213108:
	add r0, r5, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #0
	beq _02213172
	add r0, r5, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #0
	beq _02213120
	cmp r0, #2
	bne _02213172
_02213120:
	ldr r1, [r5, #8]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x18]
	ldr r1, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x1c]
	add r0, r5, #0
	bl ov96_022143DC
	ldr r1, _022132F4 ; =0x0221D474
	lsl r2, r0, #4
	str r0, [sp, #8]
	ldr r0, _022132F4 ; =0x0221D474
	add r1, r1, r2
	add r0, r0, r2
	add r1, #8
	add r2, sp, #0x18
	bl sub_02020E80
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _02213172
	add r1, r5, #0
	add r1, #0x39
	mov r0, #1
	strb r0, [r1]
	add r1, r5, #0
	add r1, #0x3a
	mov r0, #0xa
	strb r0, [r1]
	add r0, r5, #0
	add r0, #0x3b
	ldrb r4, [r0]
	cmp r4, #0xc
	bne _02213174
_02213172:
	b _022132DC
_02213174:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	add r2, r7, #0
	mul r2, r0
	ldr r0, [sp, #0x14]
	add r6, r1, #0
	add r4, r0, r2
	mov r0, #0x7c
	mul r6, r0
	ldr r0, [sp, #8]
	cmp r0, r7
	bne _02213238
	add r0, r4, r6
	add r0, #0x5e
	ldrh r0, [r0]
	cmp r0, #0
	beq _022131B6
	add r0, r4, r6
	add r0, #0x5e
	ldrh r0, [r0]
	sub r1, r0, #1
	add r0, r4, r6
	add r0, #0x5e
	strh r1, [r0]
_022131B6:
	add r0, r5, #0
	add r0, #0x3b
	ldrb r0, [r0]
	mov r1, #3
	bl _s32_div_f
	lsl r1, r0, #2
	ldr r0, [sp, #0xc]
	add r0, r0, r1
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	cmp r1, #0
	beq _022131DA
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	sub r2, r1, #1
	ldr r1, _022132F8 ; =0x000006F4
	str r2, [r0, r1]
_022131DA:
	add r0, r5, #0
	add r0, #0x3b
	ldrb r6, [r0]
	mov r1, #3
	add r0, r6, #0
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #8
	bl ov96_021E8228
	add r0, r5, #0
	add r0, #0x3b
	ldrb r6, [r0]
	mov r1, #3
	add r0, r6, #0
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #1
	bl ov96_021E8228
	b _022132DC
_02213238:
	add r0, r5, #0
	add r0, #0x38
	ldrb r0, [r0]
	mov r7, #0
	cmp r0, #1
	bne _02213248
	mov r7, #1
	b _02213254
_02213248:
	cmp r0, #2
	bne _02213250
	mov r7, #2
	b _02213254
_02213250:
	bl GF_AssertFail
_02213254:
	add r0, r4, r6
	add r0, #0x5e
	ldrh r0, [r0]
	add r0, r0, r7
	cmp r0, #0x63
	bgt _0221326E
	add r0, r4, r6
	add r0, #0x5e
	ldrh r0, [r0]
	add r1, r0, r7
	add r0, r4, r6
	add r0, #0x5e
	strh r1, [r0]
_0221326E:
	add r0, r5, #0
	add r0, #0x3b
	ldrb r0, [r0]
	mov r1, #3
	bl _s32_div_f
	lsl r1, r0, #2
	ldr r0, [sp, #0xc]
	add r0, r0, r1
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	add r1, r7, r1
	cmp r1, #0x63
	bgt _02213294
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	add r2, r1, r7
	ldr r1, _022132F8 ; =0x000006F4
	str r2, [r0, r1]
_02213294:
	ldr r0, [sp, #8]
	lsl r1, r0, #2
	ldr r0, [sp, #0xc]
	add r0, r0, r1
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	cmp r1, #0
	beq _022132AE
	ldr r1, _022132F8 ; =0x000006F4
	ldr r1, [r0, r1]
	sub r2, r1, #1
	ldr r1, _022132F8 ; =0x000006F4
	str r2, [r0, r1]
_022132AE:
	add r0, r5, #0
	add r0, #0x3b
	ldrb r6, [r0]
	mov r1, #3
	add r0, r6, #0
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	add r2, r1, #0
	mov r0, #1
	str r0, [sp]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x18
	ldr r0, [sp, #4]
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #3
	bl ov96_021E8228
_022132DC:
	ldr r0, [sp, #0x10]
	add r5, #0x4c
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #2
	bge _022132EA
	b _02213108
_022132EA:
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022132F0: .word 0x0000062C
_022132F4: .word 0x0221D474
_022132F8: .word 0x000006F4
	thumb_func_end ov96_022130EC

	thumb_func_start ov96_022132FC
ov96_022132FC: ; 0x022132FC
	push {r3, r4, r5, r6, r7, lr}
	bl ov96_021E5DC4
	add r6, r0, #0
	mov r5, #0
	mov r7, #3
	add r6, #0x5c
_0221330A:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r4, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	lsl r0, r0, #2
	mul r0, r4
	add r2, r6, r0
	mov r0, #0x7c
	mul r0, r1
	add r0, r2, r0
	ldr r2, [r0, #0x78]
	cmp r2, #2
	beq _02213346
	add r1, r0, #0
	add r1, #0x71
	ldrb r1, [r1]
	cmp r1, #0x1e
	bhs _0221333E
	str r7, [r0, #0x78]
	b _02213346
_0221333E:
	cmp r2, #1
	beq _02213346
	mov r1, #0
	str r1, [r0, #0x78]
_02213346:
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #0xc
	blo _0221330A
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022132FC

	thumb_func_start ov96_02213354
ov96_02213354: ; 0x02213354
	lsl r0, r0, #0xc
	str r0, [r2]
	lsl r0, r1, #0xc
	str r0, [r2, #4]
	mov r0, #0
	str r0, [r2, #8]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02213354

	thumb_func_start ov96_02213364
ov96_02213364: ; 0x02213364
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	str r3, [sp, #0x10]
	add r7, r0, #0
	bl ov96_021E6104
	mov r1, #0x5d
	mov r5, #0
	str r0, [sp, #0x14]
	lsl r6, r0, #0xc
	ldr r0, [sp, #8]
	lsl r1, r1, #2
	add r7, #0x5c
	mul r1, r0
	add r4, r5, #0
	add r7, r7, r1
_02213388:
	mov r0, #0x7c
	mul r0, r4
	add r1, r7, r0
	ldr r0, [sp, #0x14]
	str r0, [sp]
	add r0, sp, #0x18
	str r0, [sp, #4]
	ldr r0, [r1, #0x30]
	ldr r1, [r1, #0x34]
	asr r2, r0, #0xb
	lsr r2, r2, #0x14
	add r2, r0, r2
	asr r0, r2, #0xc
	asr r2, r1, #0xb
	lsr r2, r2, #0x14
	add r2, r1, r2
	asr r1, r2, #0xc
	ldr r2, [sp, #0xc]
	ldr r3, [sp, #0x10]
	bl ov96_021E872C
	cmp r0, #0
	add r0, sp, #0x20
	beq _022133CC
	ldr r2, [sp, #0x18]
	lsl r1, r4, #2
	str r2, [r0, r1]
	mov r1, #1
	add r0, sp, #0x1c
	strb r1, [r0, r4]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	b _022133D6
_022133CC:
	lsl r2, r4, #2
	mov r1, #0
	str r1, [r0, r2]
	add r0, sp, #0x1c
	strb r1, [r0, r4]
_022133D6:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02213388
	cmp r5, #0
	bne _022133EA
	add sp, #0x2c
	mov r0, #0xc
	pop {r4, r5, r6, r7, pc}
_022133EA:
	mov r0, #3
	mov r3, #0
	add r1, sp, #0x20
	add r2, sp, #0x1c
_022133F2:
	ldrb r4, [r2, r3]
	cmp r4, #0
	beq _02213404
	lsl r4, r3, #2
	ldr r4, [r1, r4]
	cmp r4, r6
	bge _02213404
	add r0, r3, #0
	add r6, r4, #0
_02213404:
	add r3, r3, #1
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	cmp r3, #3
	blo _022133F2
	cmp r0, #3
	bne _02213418
	bl GF_AssertFail
	mov r0, #0xc
_02213418:
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02213364

	thumb_func_start ov96_0221341C
ov96_0221341C: ; 0x0221341C
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r1, r2, #0
	add r2, sp, #0
	add r4, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r1, r5, r4
	cmp r0, r1
	bgt _0221343E
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_0221343E:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_0221341C

	thumb_func_start ov96_02213444
ov96_02213444: ; 0x02213444
	push {r4, r5, r6}
	sub sp, #0xc
	add r2, sp, #0
	mov r3, #0
	str r3, [r2]
	str r3, [r2, #4]
	add r4, r0, #0
	add r5, r4, #0
	str r3, [r2, #8]
	add r6, r2, #0
	ldmia r6!, {r0, r1}
	add r5, #0x14
	stmia r5!, {r0, r1}
	ldr r0, [r6]
	str r0, [r5]
	add r5, r4, #0
	ldmia r2!, {r0, r1}
	add r5, #0x20
	stmia r5!, {r0, r1}
	ldr r0, [r2]
	mov r1, #3
	str r0, [r5]
	add r0, r4, #0
	add r0, #0x38
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x39
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3a
	strb r3, [r0]
	add r0, r4, #0
	mov r1, #0xc
	add r0, #0x3b
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x3c
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x3d
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x3e
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x40
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x41
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x43
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x45
	strb r3, [r0]
	add r0, r4, #0
	add r0, #0x46
	strh r3, [r0]
	add r1, r3, #0
_022134BC:
	add r0, r4, r3
	add r0, #0x2c
	strb r1, [r0]
	add r0, r3, #1
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	cmp r3, #0xc
	blo _022134BC
	add sp, #0xc
	pop {r4, r5, r6}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02213444

	thumb_func_start ov96_022134D4
ov96_022134D4: ; 0x022134D4
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r1, r4, #0
	add r0, r2, #0
	add r1, #0x20
	bl VEC_Normalize
	add r5, r4, #0
	add r2, r4, #0
	add r5, #0x20
	add r2, #0x14
	ldmia r5!, {r0, r1}
	add r3, r2, #0
	stmia r2!, {r0, r1}
	ldr r0, [r5]
	add r4, #0x40
	str r0, [r2]
	ldrb r0, [r4]
	add r1, r3, #0
	add r2, sp, #0
	lsl r0, r0, #0xc
	bl VEC_MultAdd
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_022134D4

	thumb_func_start ov96_02213514
ov96_02213514: ; 0x02213514
	push {r4, lr}
	sub sp, #0x18
	add r4, r1, #0
	add r1, sp, #0xc
	bl VEC_Normalize
	add r0, r4, #0
	add r1, sp, #0
	bl VEC_Normalize
	add r0, sp, #0xc
	add r1, sp, #0
	bl VEC_DotProduct
	add sp, #0x18
	pop {r4, pc}
	thumb_func_end ov96_02213514

	thumb_func_start ov96_02213534
ov96_02213534: ; 0x02213534
	push {r4, lr}
	add r4, r2, #0
	bl ov96_02213514
	asr r1, r4, #4
	lsl r1, r1, #1
	add r1, r1, #1
	lsl r2, r1, #1
	ldr r1, _02213554 ; =0x021094DC
	ldrsh r1, [r1, r2]
	cmp r0, r1
	blt _02213550
	mov r0, #1
	pop {r4, pc}
_02213550:
	mov r0, #0
	pop {r4, pc}
	.balign 4, 0
_02213554: .word 0x021094DC
	thumb_func_end ov96_02213534

	thumb_func_start ov96_02213558
ov96_02213558: ; 0x02213558
	add r1, r0, #0
	add r1, #0x61
	ldrb r1, [r1]
	add r2, r1, #1
	add r1, r0, #0
	add r1, #0x61
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x61
	ldrb r1, [r1]
	cmp r1, #0xa
	blo _0221359A
	add r1, r0, #0
	mov r2, #0
	add r1, #0x61
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x71
	ldrb r1, [r1]
	add r2, r1, #2
	add r1, r0, #0
	add r1, #0x71
	strb r2, [r1]
	add r1, r0, #0
	add r1, #0x70
	ldrb r2, [r1]
	add r1, r0, #0
	add r1, #0x71
	ldrb r1, [r1]
	cmp r1, r2
	bls _0221359A
	add r0, #0x71
	strb r2, [r0]
_0221359A:
	bx lr
	thumb_func_end ov96_02213558

	thumb_func_start ov96_0221359C
ov96_0221359C: ; 0x0221359C
	push {r4, r5, r6, lr}
	add r6, r1, #0
	add r1, r2, #0
	add r2, r3, #0
	ldr r5, [sp, #0x10]
	bl ov96_021E60D8
	add r4, r0, #0
	ldrb r0, [r4, #4]
	lsl r0, r0, #2
	ldr r1, [r6, r0]
	add r0, r5, #0
	add r0, #0x6c
	strh r1, [r0]
	ldrb r0, [r4, #4]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r1, [r0, #0x14]
	add r0, r5, #0
	add r0, #0x6e
	strh r1, [r0]
	ldrb r0, [r4, #3]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r1, [r0, #0x28]
	add r0, r5, #0
	add r0, #0x70
	strb r1, [r0]
	ldrb r0, [r4, #3]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r1, [r0, #0x28]
	add r0, r5, #0
	add r0, #0x71
	strb r1, [r0]
	ldrb r0, [r4, #1]
	mov r1, #0xa
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x3c]
	lsl r0, r0, #0xc
	bl _s32_div_f
	str r0, [r5, #0x64]
	ldrb r0, [r4, #1]
	mov r1, #0xa
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r0, [r0, #0x50]
	lsl r0, r0, #0xc
	bl _s32_div_f
	str r0, [r5, #0x68]
	ldrb r0, [r4]
	lsl r0, r0, #2
	add r0, r6, r0
	ldr r1, [r0, #0x64]
	add r0, r5, #0
	add r0, #0x72
	strb r1, [r0]
	add r0, r5, #0
	ldrb r1, [r4, #4]
	add r0, #0x73
	strb r1, [r0]
	add r0, r5, #0
	ldrb r1, [r4]
	add r0, #0x75
	add r5, #0x74
	strb r1, [r0]
	ldrb r0, [r4, #3]
	strb r0, [r5]
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0221359C

	thumb_func_start ov96_0221362C
ov96_0221362C: ; 0x0221362C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r7, r0, #0
	add r1, r7, #0
	ldr r0, [r7, #4]
	ldr r2, _0221369C ; =0x0221D1F8
	add r1, #8
	bl AddWindow
	add r5, r7, #0
	ldr r4, _022136A0 ; =0x0221D360
	mov r6, #0
	add r5, #0x18
_02213646:
	ldr r0, [r7, #4]
	add r1, r5, #0
	add r2, r4, #0
	bl AddWindow
	add r6, r6, #1
	add r4, #8
	add r5, #0x10
	cmp r6, #4
	blt _02213646
	mov r2, #0
	str r2, [sp]
	ldr r0, [r7, #4]
	mov r1, #3
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0
	str r1, [sp]
	ldr r0, [r7, #4]
	add r2, r1, #0
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r7, #0x58]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	mov r0, #0x20
	str r0, [sp]
	ldr r0, [r7, #0x58]
	mov r1, #0x13
	str r0, [sp, #4]
	mov r0, #0xec
	add r3, r0, #0
	mov r2, #0
	add r3, #0xd4
	bl GfGfxLoader_GXLoadPal
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0221369C: .word 0x0221D1F8
_022136A0: .word 0x0221D360
	thumb_func_end ov96_0221362C

	thumb_func_start ov96_022136A4
ov96_022136A4: ; 0x022136A4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r7, r1, #0
	add r0, #8
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r2, _02213720 ; =0x00000135
	ldr r3, [r5, #0x58]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	add r4, r0, #0
	ldr r0, [r5, #0x58]
	bl ScrStrBufs_new
	mov r1, #0
	str r1, [sp]
	mov r2, #1
	str r2, [sp, #4]
	add r2, r7, #0
	mov r3, #3
	add r6, r0, #0
	bl BufferIntegerAsString
	ldr r3, [r5, #0x58]
	add r0, r6, #0
	add r1, r4, #0
	mov r2, #0xa5
	bl ReadMsgData_ExpandPlaceholders
	add r7, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02213724 ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #8
	add r2, r7, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r7, #0
	bl String_dtor
	add r0, r6, #0
	bl ScrStrBufs_delete
	add r0, r4, #0
	bl DestroyMsgData
	add r5, #8
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02213720: .word 0x00000135
_02213724: .word 0x000F0E00
	thumb_func_end ov96_022136A4

	thumb_func_start ov96_02213728
ov96_02213728: ; 0x02213728
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xb8
	add r7, r0, #0
	str r2, [sp, #4]
	add r0, sp, #0xac
	mov r2, #0
	str r2, [r0]
	str r2, [r0, #4]
	str r2, [r0, #8]
	add r0, sp, #0xa0
	str r2, [r0]
	str r2, [r0, #4]
	str r2, [r0, #8]
	add r0, sp, #0x7c
	str r2, [r0]
	str r2, [r0, #4]
	str r2, [r0, #8]
	add r0, sp, #0x70
	str r3, [sp, #8]
	str r2, [r0]
	str r2, [r0, #4]
	ldr r3, _02213928 ; =0x0221D214
	add r5, r1, #0
	str r2, [r0, #8]
	ldmia r3!, {r0, r1}
	add r6, sp, #0x64
	stmia r6!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _0221392C ; =0x0221D274
	str r0, [r6]
	ldmia r3!, {r0, r1}
	add r6, sp, #0x58
	stmia r6!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _02213930 ; =0x0221D244
	str r0, [r6]
	ldmia r3!, {r0, r1}
	add r6, sp, #0x4c
	stmia r6!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _02213934 ; =0x0221D22C
	str r0, [r6]
	ldmia r3!, {r0, r1}
	add r6, sp, #0x40
	stmia r6!, {r0, r1}
	ldr r0, [r3]
	ldr r4, [sp, #0xd0]
	str r0, [r6]
	str r2, [r4]
	str r2, [r4, #4]
	str r2, [r4, #8]
	ldr r0, [r5]
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	str r0, [sp, #0x28]
	ldr r0, [r5, #4]
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	str r0, [sp, #0x2c]
	ldr r0, [r7]
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	str r0, [sp, #0x20]
	ldr r0, [r7, #4]
	asr r1, r0, #0xb
	lsr r1, r1, #0x14
	add r1, r0, r1
	asr r0, r1, #0xc
	str r0, [sp, #0x24]
	mov r0, #7
	ldr r1, [r7, #4]
	lsl r0, r0, #0x10
	cmp r1, r0
	ldr r1, [r7]
	bge _022137D6
	mov r0, #2
	lsl r0, r0, #0x12
	cmp r1, r0
	blt _022137E4
	mov r2, #1
	b _022137E4
_022137D6:
	mov r0, #2
	lsl r0, r0, #0x12
	cmp r1, r0
	bge _022137E2
	mov r2, #2
	b _022137E4
_022137E2:
	mov r2, #3
_022137E4:
	mov r6, #0
	ldr r0, [sp, #8]
	str r6, [sp, #0x14]
	str r6, [sp, #0x10]
	cmp r0, #0
	bne _022137F2
	b _02213942
_022137F2:
	cmp r2, #3
	bhi _0221388E
	add r0, r2, r2
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02213802: ; jump table
	.short _0221380A - _02213802 - 2 ; case 0
	.short _0221382A - _02213802 - 2 ; case 1
	.short _0221384C - _02213802 - 2 ; case 2
	.short _0221386A - _02213802 - 2 ; case 3
_0221380A:
	mov r0, #7
	lsl r0, r0, #0x10
	ldr r1, _02213938 ; =0xFFFE0000
	str r0, [sp, #0x80]
	mov r0, #6
	lsl r0, r0, #0x10
	str r0, [sp, #0x70]
	asr r0, r1, #1
	str r1, [sp, #0x7c]
	str r0, [sp, #0x74]
	add r0, sp, #0x64
	add r1, sp, #0x88
	bl VEC_Normalize
	mov r6, #5
	b _02213892
_0221382A:
	mov r0, #0xa
	lsl r0, r0, #0x10
	str r0, [sp, #0x7c]
	ldr r0, _0221393C ; =0xFFFF0000
	add r1, sp, #0x88
	str r0, [sp, #0x80]
	mov r0, #0x12
	lsl r0, r0, #0x10
	str r0, [sp, #0x70]
	mov r0, #7
	lsl r0, r0, #0x10
	str r0, [sp, #0x74]
	add r0, sp, #0x58
	bl VEC_Normalize
	mov r6, #6
	b _02213892
_0221384C:
	mov r0, #0xe
	lsl r0, r0, #0x10
	mov r1, #6
	lsl r1, r1, #0x10
	str r0, [sp, #0x80]
	ldr r0, _02213938 ; =0xFFFE0000
	str r1, [sp, #0x7c]
	str r0, [sp, #0x70]
	str r1, [sp, #0x74]
	add r0, sp, #0x4c
	add r1, sp, #0x88
	bl VEC_Normalize
	mov r6, #7
	b _02213892
_0221386A:
	mov r0, #0x12
	lsl r0, r0, #0x10
	str r0, [sp, #0x7c]
	mov r0, #6
	lsl r0, r0, #0x10
	str r0, [sp, #0x80]
	mov r0, #0xa
	lsl r0, r0, #0x10
	str r0, [sp, #0x70]
	mov r0, #0xe
	lsl r0, r0, #0x10
	str r0, [sp, #0x74]
	add r0, sp, #0x40
	add r1, sp, #0x88
	bl VEC_Normalize
	mov r6, #8
	b _02213892
_0221388E:
	bl GF_AssertFail
_02213892:
	cmp r6, #0
	beq _02213942
	ldr r0, [sp, #4]
	add r2, sp, #0x7c
	lsl r0, r0, #0xc
	str r0, [sp, #0xc]
	add r1, sp, #0x88
	add r3, r2, #0
	bl VEC_MultAdd
	add r2, sp, #0x70
	ldr r0, [sp, #0xc]
	add r1, sp, #0x88
	add r3, r2, #0
	bl VEC_MultAdd
	ldr r1, [sp, #0x7c]
	add r2, sp, #0x28
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [sp, #0x80]
	str r0, [sp, #0x38]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [sp, #0x70]
	str r0, [sp, #0x3c]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	ldr r1, [sp, #0x74]
	str r0, [sp, #0x30]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x34]
	add r0, sp, #0x18
	str r0, [sp]
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r3, sp, #0x20
	bl sub_02020F4C
	cmp r0, #0
	beq _02213940
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x18
	bl sub_02020E80
	cmp r0, #0
	bne _02213916
	add r2, r5, #0
	ldmia r2!, {r0, r1}
	add r3, r4, #0
	stmia r3!, {r0, r1}
	ldr r0, [r2]
	str r0, [r3]
	mov r0, #1
	str r0, [sp, #0x14]
	b _02213922
_02213916:
	ldr r0, [sp, #0x18]
	lsl r0, r0, #0xc
	str r0, [r4]
	ldr r0, [sp, #0x1c]
	lsl r0, r0, #0xc
	str r0, [r4, #4]
_02213922:
	mov r0, #1
	str r0, [sp, #0x10]
	b _02213942
	.balign 4, 0
_02213928: .word 0x0221D214
_0221392C: .word 0x0221D274
_02213930: .word 0x0221D244
_02213934: .word 0x0221D22C
_02213938: .word 0xFFFE0000
_0221393C: .word 0xFFFF0000
_02213940:
	mov r6, #0
_02213942:
	mov r1, #7
	ldr r0, [r7, #4]
	lsl r1, r1, #0x10
	cmp r0, r1
	blt _0221394E
	b _02213B28
_0221394E:
	ldr r1, [sp, #4]
	add r1, #0x10
	lsl r2, r1, #0xc
	cmp r0, r2
	bge _02213974
	ldr r0, [sp, #4]
	mov r1, #0x10
	sub r0, r1, r0
	ldr r3, [r5, #4]
	lsl r0, r0, #0xc
	cmp r3, r0
	bne _02213974
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #3
	pop {r3, r4, r5, r6, r7, pc}
_02213974:
	mov r0, #2
	lsl r0, r0, #0xe
	str r0, [sp, #0xac]
	mov r0, #0xf7
	lsl r0, r0, #0xc
	str r0, [sp, #0xa0]
	str r2, [sp, #0xb0]
	str r2, [sp, #0xa4]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	beq _022139EC
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _022139A4
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_022139A4:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _022139B8
	ldr r1, [r4, #4]
	ldr r0, [sp, #0x98]
	cmp r1, r0
	blt _022139B8
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_022139B8:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _022139DC
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _022139DC
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #3
	pop {r3, r4, r5, r6, r7, pc}
_022139DC:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #3
	pop {r3, r4, r5, r6, r7, pc}
_022139EC:
	mov r1, #2
	ldr r0, [r7]
	lsl r1, r1, #0x12
	cmp r0, r1
	bge _02213A8E
	ldr r1, [sp, #4]
	add r1, #8
	str r1, [sp, #4]
	lsl r1, r1, #0xc
	cmp r0, r1
	bge _02213A16
	ldr r0, [r5]
	cmp r0, r1
	bne _02213A16
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213A16:
	mov r0, #0xb7
	lsl r0, r0, #0xc
	str r0, [sp, #0xb0]
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0xa4]
	str r1, [sp, #0xac]
	str r1, [sp, #0xa0]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	beq _02213AD2
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02213A46
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213A46:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _02213A5A
	ldr r1, [r4]
	ldr r0, [sp, #0x94]
	cmp r1, r0
	blt _02213A5A
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213A5A:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02213A7E
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _02213A7E
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213A7E:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213A8E:
	ldr r1, [sp, #4]
	mov r2, #0xf7
	sub r1, r2, r1
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _02213AAE
	ldr r0, [r5]
	cmp r0, r1
	bne _02213AAE
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213AAE:
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0xb0]
	mov r0, #0xb7
	lsl r0, r0, #0xc
	str r0, [sp, #0xa4]
	str r1, [sp, #0xac]
	str r1, [sp, #0xa0]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	bne _02213AD4
_02213AD2:
	b _02213CFA
_02213AD4:
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02213AE0
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213AE0:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _02213AF4
	ldr r1, [r4]
	ldr r0, [sp, #0x94]
	cmp r1, r0
	bgt _02213AF4
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213AF4:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02213B18
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _02213B18
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213B18:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213B28:
	ldr r1, [sp, #4]
	mov r2, #0xb7
	sub r1, r2, r1
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _02213B48
	ldr r0, [r5, #4]
	cmp r0, r1
	bne _02213B48
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #4
	pop {r3, r4, r5, r6, r7, pc}
_02213B48:
	mov r0, #0xf7
	lsl r0, r0, #0xc
	str r0, [sp, #0xac]
	mov r0, #2
	lsl r0, r0, #0xe
	str r0, [sp, #0xa0]
	str r1, [sp, #0xb0]
	str r1, [sp, #0xa4]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	beq _02213BC0
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02213B78
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213B78:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _02213B8C
	ldr r1, [r4, #4]
	ldr r0, [sp, #0x98]
	cmp r1, r0
	bgt _02213B8C
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213B8C:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02213BB0
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _02213BB0
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #4
	pop {r3, r4, r5, r6, r7, pc}
_02213BB0:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #4
	pop {r3, r4, r5, r6, r7, pc}
_02213BC0:
	mov r1, #2
	ldr r0, [r7]
	lsl r1, r1, #0x12
	cmp r0, r1
	bge _02213C62
	ldr r1, [sp, #4]
	add r1, #8
	str r1, [sp, #4]
	lsl r1, r1, #0xc
	cmp r0, r1
	bge _02213BEA
	ldr r0, [r5]
	cmp r0, r1
	bne _02213BEA
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213BEA:
	mov r0, #0xb7
	lsl r0, r0, #0xc
	str r0, [sp, #0xb0]
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0xa4]
	str r1, [sp, #0xac]
	str r1, [sp, #0xa0]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	beq _02213CFA
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02213C1A
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213C1A:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _02213C2E
	ldr r1, [r4]
	ldr r0, [sp, #0x94]
	cmp r1, r0
	blt _02213C2E
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213C2E:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02213C52
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _02213C52
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213C52:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213C62:
	ldr r1, [sp, #4]
	mov r2, #0xf7
	sub r1, r2, r1
	lsl r1, r1, #0xc
	cmp r0, r1
	ble _02213C82
	ldr r0, [r5]
	cmp r0, r1
	bne _02213C82
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213C82:
	mov r0, #1
	lsl r0, r0, #0x10
	str r0, [sp, #0xb0]
	mov r0, #0xb7
	lsl r0, r0, #0xc
	str r0, [sp, #0xa4]
	str r1, [sp, #0xac]
	str r1, [sp, #0xa0]
	add r0, sp, #0x94
	str r0, [sp]
	add r0, sp, #0xac
	add r1, sp, #0xa0
	add r2, r5, #0
	add r3, r7, #0
	bl ov96_02213D2C
	cmp r0, #0
	beq _02213CFA
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02213CB2
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213CB2:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _02213CC6
	ldr r1, [r4]
	ldr r0, [sp, #0x94]
	cmp r1, r0
	bgt _02213CC6
	add sp, #0xb8
	add r0, r6, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213CC6:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _02213CEA
	add r0, sp, #0x38
	add r1, sp, #0x30
	add r2, sp, #0x28
	add r3, sp, #0x94
	bl ov96_02213D00
	cmp r0, #0
	beq _02213CEA
	ldmia r5!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213CEA:
	add r2, sp, #0x94
	ldmia r2!, {r0, r1}
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	add sp, #0xb8
	str r0, [r4]
	mov r0, #2
	pop {r3, r4, r5, r6, r7, pc}
_02213CFA:
	add r0, r6, #0
	add sp, #0xb8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02213728

	thumb_func_start ov96_02213D00
ov96_02213D00: ; 0x02213D00
	push {r4, r5, lr}
	sub sp, #0x14
	ldr r5, [r3]
	asr r4, r5, #0xb
	lsr r4, r4, #0x14
	add r4, r5, r4
	asr r4, r4, #0xc
	str r4, [sp, #0xc]
	ldr r4, [r3, #4]
	asr r3, r4, #0xb
	lsr r3, r3, #0x14
	add r3, r4, r3
	asr r3, r3, #0xc
	str r3, [sp, #0x10]
	add r3, sp, #4
	str r3, [sp]
	add r3, sp, #0xc
	bl sub_02020F4C
	add sp, #0x14
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02213D00

	thumb_func_start ov96_02213D2C
ov96_02213D2C: ; 0x02213D2C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	add r5, r0, #0
	add r6, r1, #0
	add r1, sp, #0x2c
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r1, [r5]
	add r4, r2, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x18]
	ldr r1, [r5, #4]
	add r7, r3, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x1c]
	ldr r1, [r6]
	add r2, sp, #8
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x10]
	ldr r1, [r6, #4]
	add r3, sp, #0
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0x14]
	ldr r1, [r4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #8]
	ldr r1, [r4, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #0xc]
	ldr r1, [r7]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp]
	ldr r1, [r7, #4]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	str r0, [sp, #4]
	add r0, sp, #0x18
	add r1, sp, #0x10
	bl sub_02020EB0
	cmp r0, #0
	bne _02213DB8
	add sp, #0x38
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213DB8:
	add r0, r6, #0
	add r1, r5, #0
	add r2, sp, #0x20
	bl VEC_Subtract
	add r0, sp, #0x20
	add r1, r0, #0
	bl VEC_Normalize
	ldr r1, [r5, #4]
	ldr r0, [r6, #4]
	cmp r1, r0
	bne _02213E10
	ldr r0, [r4, #4]
	sub r0, r1, r0
	bpl _02213DDE
	mov r2, #0
	mvn r2, r2
	mul r0, r2
_02213DDE:
	ldr r2, [r7, #4]
	sub r3, r1, r2
	bpl _02213DEA
	mov r2, #0
	mvn r2, r2
	mul r3, r2
_02213DEA:
	cmp r3, #0
	bne _02213DF4
	add sp, #0x38
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213DF4:
	ldr r2, [r4]
	str r1, [sp, #0x30]
	add r1, r0, r3
	str r2, [sp, #0x2c]
	bl FX_Div
	ldr r3, [sp, #0x50]
	add r1, sp, #0x20
	add r2, sp, #0x2c
	bl VEC_MultAdd
	add sp, #0x38
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213E10:
	ldr r1, [r5]
	ldr r0, [r6]
	cmp r1, r0
	bne _02213E56
	ldr r0, [r4]
	sub r0, r1, r0
	bpl _02213E24
	mov r2, #0
	mvn r2, r2
	mul r0, r2
_02213E24:
	ldr r2, [r7]
	sub r3, r1, r2
	bpl _02213E30
	mov r2, #0
	mvn r2, r2
	mul r3, r2
_02213E30:
	cmp r3, #0
	bne _02213E3A
	add sp, #0x38
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02213E3A:
	str r1, [sp, #0x2c]
	ldr r1, [r4, #4]
	str r1, [sp, #0x30]
	add r1, r0, r3
	bl FX_Div
	ldr r3, [sp, #0x50]
	add r1, sp, #0x20
	add r2, sp, #0x2c
	bl VEC_MultAdd
	add sp, #0x38
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02213E56:
	bl GF_AssertFail
	mov r0, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02213D2C

	thumb_func_start ov96_02213E60
ov96_02213E60: ; 0x02213E60
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r1, #0
	ldr r1, _02213EB8 ; =0x0000066E
	mov r4, #0
	ldrb r6, [r0, r1]
	add r3, r4, #0
	add r2, sp, #0
	add r1, #0x4c
_02213E72:
	cmp r6, r3
	beq _02213E86
	ldrb r5, [r0, r1]
	cmp r5, r3
	beq _02213E86
	add r5, r4, #0
	add r4, r4, #1
	lsl r4, r4, #0x18
	lsr r4, r4, #0x18
	strb r3, [r2, r5]
_02213E86:
	add r3, r3, #1
	cmp r3, #0xf
	blt _02213E72
	bl LCRandom
	add r1, r4, #0
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	add r0, sp, #0
	ldrb r0, [r0, r1]
	ldr r1, _02213EBC ; =0x0221D438
	lsl r2, r0, #2
	ldrsh r1, [r1, r2]
	lsl r1, r1, #0xc
	str r1, [r7, #8]
	ldr r1, _02213EC0 ; =0x0221D43A
	ldrsh r1, [r1, r2]
	lsl r1, r1, #0xc
	str r1, [r7, #0xc]
	add r7, #0x42
	strb r0, [r7]
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02213EB8: .word 0x0000066E
_02213EBC: .word 0x0221D438
_02213EC0: .word 0x0221D43A
	thumb_func_end ov96_02213E60

	thumb_func_start ov96_02213EC4
ov96_02213EC4: ; 0x02213EC4
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r1, r5, #0
	add r1, #0x39
	ldrb r1, [r1]
	cmp r1, #3
	bne _02213F14
	mov r0, #0x16
	ldr r1, [r5, #0xc]
	lsl r0, r0, #0xe
	cmp r1, r0
	bne _02213EE4
	add r5, #0x43
	ldrb r0, [r5]
	add r0, #0xc0
	b _02213F56
_02213EE4:
	mov r0, #0x1a
	lsl r0, r0, #0xe
	cmp r1, r0
	bne _02213EF4
	add r5, #0x43
	ldrb r0, [r5]
	add r0, #0xc8
	b _02213F56
_02213EF4:
	mov r0, #0x1e
	lsl r0, r0, #0xe
	cmp r1, r0
	bne _02213F04
	add r5, #0x43
	ldrb r0, [r5]
	add r0, #0xd0
	b _02213F56
_02213F04:
	bl GF_AssertFail
	ldr r1, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	b _02213F56
_02213F14:
	cmp r1, #1
	bne _02213F4C
	add r1, r5, #0
	add r1, #0x3b
	ldrb r1, [r1]
	cmp r1, #0xc
	bne _02213F2E
	ldr r1, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
	b _02213F56
_02213F2E:
	bl ov96_022143DC
	add r5, #0x3b
	add r4, r0, #0
	ldrb r0, [r5]
	mov r1, #3
	bl _s32_div_f
	add r1, r0, #0
	lsl r1, r1, #0x18
	add r0, r4, #0
	lsr r1, r1, #0x18
	bl ov96_02214394
	b _02213F56
_02213F4C:
	ldr r1, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r0, r0, #0xc
_02213F56:
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02213EC4

	thumb_func_start ov96_02213F5C
ov96_02213F5C: ; 0x02213F5C
	push {r4, lr}
	add r4, r0, #0
	cmp r4, #0xc0
	bge _02213F68
	lsl r0, r4, #0xc
	pop {r4, pc}
_02213F68:
	cmp r4, #0xd8
	bge _02213FA0
	sub r4, #0xc0
	lsr r2, r4, #0x1f
	lsl r1, r4, #0x1d
	sub r1, r1, r2
	mov r0, #0x1d
	ror r1, r0
	add r0, r2, r1
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	cmp r4, #8
	bge _02213F8A
	ldr r0, _02213FB0 ; =0x0221DC80
	ldrb r0, [r0, r1]
	add r0, #0x58
	b _02213F9C
_02213F8A:
	cmp r4, #0x10
	bge _02213F96
	ldr r0, _02213FB0 ; =0x0221DC80
	ldrb r0, [r0, r1]
	add r0, #0x68
	b _02213F9C
_02213F96:
	ldr r0, _02213FB0 ; =0x0221DC80
	ldrb r0, [r0, r1]
	add r0, #0x78
_02213F9C:
	lsl r0, r0, #0xc
	pop {r4, pc}
_02213FA0:
	cmp r4, #0xe8
	bge _02213FA8
	lsl r0, r4, #0xc
	pop {r4, pc}
_02213FA8:
	bl GF_AssertFail
	lsl r0, r4, #0xc
	pop {r4, pc}
	.balign 4, 0
_02213FB0: .word 0x0221DC80
	thumb_func_end ov96_02213F5C

	thumb_func_start ov96_02213FB4
ov96_02213FB4: ; 0x02213FB4
	add r1, r0, #0
	add r1, #0x5c
	ldrh r1, [r1]
	cmp r1, #4
	bhi _02213FF2
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_02213FCA: ; jump table
	.short _02213FF2 - _02213FCA - 2 ; case 0
	.short _02213FD4 - _02213FCA - 2 ; case 1
	.short _02213FE4 - _02213FCA - 2 ; case 2
	.short _02213FEC - _02213FCA - 2 ; case 3
	.short _02213FDC - _02213FCA - 2 ; case 4
_02213FD4:
	mov r1, #4
	add r0, #0x5c
	strh r1, [r0]
	bx lr
_02213FDC:
	mov r1, #2
	add r0, #0x5c
	strh r1, [r0]
	bx lr
_02213FE4:
	mov r1, #3
	add r0, #0x5c
	strh r1, [r0]
	bx lr
_02213FEC:
	mov r1, #1
	add r0, #0x5c
	strh r1, [r0]
_02213FF2:
	bx lr
	thumb_func_end ov96_02213FB4

	thumb_func_start ov96_02213FF4
ov96_02213FF4: ; 0x02213FF4
	push {r3, lr}
	cmp r3, #0xc0
	bge _02214004
	add r1, r0, r1
	ldr r0, _02214038 ; =0x000007B4
	mov r2, #0
	strb r2, [r1, r0]
	pop {r3, pc}
_02214004:
	cmp r3, #0xd8
	bge _0221402E
	ldr r3, _02214038 ; =0x000007B4
	add r3, r0, r3
	ldrb r0, [r3, r1]
	cmp r0, #0
	bne _02214036
	mov r0, #1
	strb r0, [r3, r1]
	cmp r1, #0
	bne _02214026
	cmp r2, #0
	beq _02214026
	ldr r0, _0221403C ; =0x000008CA
	bl PlaySE
	pop {r3, pc}
_02214026:
	ldr r0, _02214040 ; =0x000008C9
	bl PlaySE
	pop {r3, pc}
_0221402E:
	add r1, r0, r1
	ldr r0, _02214038 ; =0x000007B4
	mov r2, #0
	strb r2, [r1, r0]
_02214036:
	pop {r3, pc}
	.balign 4, 0
_02214038: .word 0x000007B4
_0221403C: .word 0x000008CA
_02214040: .word 0x000008C9
	thumb_func_end ov96_02213FF4

	thumb_func_start ov96_02214044
ov96_02214044: ; 0x02214044
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r1, [sp, #0x10]
	add r5, r0, #0
	ldr r0, [sp, #0x10]
	add r4, r5, #0
	add r4, #0x18
	lsl r7, r0, #4
	add r0, r4, r7
	mov r1, #0
	add r6, r2, #0
	bl FillWindowPixelBuffer
	cmp r6, #0
	beq _022140A2
	cmp r6, #2
	bne _0221406C
	ldr r0, _022140E0 ; =0x000007B8
	ldr r2, [r5, r0]
	b _0221408A
_0221406C:
	cmp r6, #1
	bne _02214076
	ldr r0, _022140E4 ; =0x000007BC
	ldr r2, [r5, r0]
	b _0221408A
_02214076:
	cmp r6, #3
	bne _02214082
	mov r0, #0x1f
	lsl r0, r0, #6
	ldr r2, [r5, r0]
	b _0221408A
_02214082:
	bl GF_AssertFail
	ldr r0, _022140E0 ; =0x000007B8
	ldr r2, [r5, r0]
_0221408A:
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _022140E8 ; =0x00010200
	mov r1, #4
	str r0, [sp, #8]
	add r0, r4, r7
	str r3, [sp, #0xc]
	bl sub_020200FC
	b _022140D4
_022140A2:
	ldr r0, [sp, #0x10]
	add r1, r5, r0
	ldr r0, _022140EC ; =0x00000818
	ldrb r0, [r1, r0]
	cmp r0, #0
	beq _022140B4
	mov r1, #0xc1
	lsl r1, r1, #0xa
	b _022140B6
_022140B4:
	ldr r1, _022140E8 ; =0x00010200
_022140B6:
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	str r1, [sp, #8]
	str r3, [sp, #0xc]
	ldr r2, [sp, #0x10]
	add r0, r4, r7
	lsl r2, r2, #2
	add r5, r5, r2
	ldr r2, _022140F0 ; =0x000007C4
	mov r1, #4
	ldr r2, [r5, r2]
	bl sub_020200FC
_022140D4:
	add r0, r4, r7
	bl CopyWindowToVram
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_022140E0: .word 0x000007B8
_022140E4: .word 0x000007BC
_022140E8: .word 0x00010200
_022140EC: .word 0x00000818
_022140F0: .word 0x000007C4
	thumb_func_end ov96_02214044

	thumb_func_start ov96_022140F4
ov96_022140F4: ; 0x022140F4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	str r0, [sp, #8]
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r2, _02214198 ; =0x00000135
	ldr r3, [r5, #0x58]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	str r0, [sp, #0xc]
	ldr r0, [r5, #0x58]
	bl ScrStrBufs_new
	add r7, r0, #0
	ldr r0, [sp, #0xc]
	ldr r1, _0221419C ; =0x00000133
	bl NewString_ReadMsgData
	ldr r1, _022141A0 ; =0x000007B8
	str r0, [r5, r1]
	mov r1, #0x4d
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	bl NewString_ReadMsgData
	ldr r1, _022141A4 ; =0x000007BC
	str r0, [r5, r1]
	ldr r0, [sp, #0xc]
	ldr r1, _02214198 ; =0x00000135
	bl NewString_ReadMsgData
	mov r1, #0x1f
	lsl r1, r1, #6
	str r0, [r5, r1]
	mov r4, #0
_02214140:
	ldr r0, [sp, #8]
	add r1, r4, #0
	bl ov96_021E5F34
	ldr r1, [r5, #0x58]
	bl sub_02028F68
	add r6, r0, #0
	mov r0, #1
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r0, r7, #0
	mov r1, #0
	add r2, r6, #0
	mov r3, #2
	bl BufferString
	ldr r1, [sp, #0xc]
	ldr r2, _022141A8 ; =0x00000132
	ldr r3, [r5, #0x58]
	add r0, r7, #0
	bl ReadMsgData_ExpandPlaceholders
	lsl r1, r4, #2
	add r2, r5, r1
	ldr r1, _022141AC ; =0x000007C4
	str r0, [r2, r1]
	add r0, r6, #0
	bl String_dtor
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _02214140
	add r0, r7, #0
	bl ScrStrBufs_delete
	ldr r0, [sp, #0xc]
	bl DestroyMsgData
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02214198: .word 0x00000135
_0221419C: .word 0x00000133
_022141A0: .word 0x000007B8
_022141A4: .word 0x000007BC
_022141A8: .word 0x00000132
_022141AC: .word 0x000007C4
	thumb_func_end ov96_022140F4

	thumb_func_start ov96_022141B0
ov96_022141B0: ; 0x022141B0
	push {r4, r5, r6, lr}
	bl ov96_021E5DC4
	add r5, r0, #0
	ldr r0, _022141EC ; =0x000007B8
	ldr r0, [r5, r0]
	bl String_dtor
	ldr r0, _022141F0 ; =0x000007BC
	ldr r0, [r5, r0]
	bl String_dtor
	mov r0, #0x1f
	lsl r0, r0, #6
	ldr r0, [r5, r0]
	bl String_dtor
	ldr r6, _022141F4 ; =0x000007C4
	mov r4, #0
_022141D6:
	lsl r0, r4, #2
	add r0, r5, r0
	ldr r0, [r0, r6]
	bl String_dtor
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _022141D6
	pop {r4, r5, r6, pc}
	.balign 4, 0
_022141EC: .word 0x000007B8
_022141F0: .word 0x000007BC
_022141F4: .word 0x000007C4
	thumb_func_end ov96_022141B0

	thumb_func_start ov96_022141F8
ov96_022141F8: ; 0x022141F8
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	ldr r0, _0221422C ; =0x000007D4
	mov r4, #0
	add r7, r6, r0
_02214202:
	lsl r1, r4, #4
	mov r0, #0
	add r5, r7, r1
	strb r0, [r7, r1]
	strb r4, [r5, #1]
	strb r0, [r5, #2]
	sub r0, r0, #1
	strb r0, [r5, #3]
	ldr r0, _02214230 ; =ov96_02214278
	str r6, [r5, #8]
	add r1, r5, #0
	mov r2, #1
	bl sub_0200E320
	str r0, [r5, #4]
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _02214202
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0221422C: .word 0x000007D4
_02214230: .word ov96_02214278
	thumb_func_end ov96_022141F8

	thumb_func_start ov96_02214234
ov96_02214234: ; 0x02214234
	push {r4, r5, r6, lr}
	ldr r6, _02214254 ; =0x000007D8
	add r5, r0, #0
	mov r4, #0
_0221423C:
	lsl r0, r4, #4
	add r0, r5, r0
	ldr r0, [r0, r6]
	bl sub_0200E390
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _0221423C
	pop {r4, r5, r6, pc}
	nop
_02214254: .word 0x000007D8
	thumb_func_end ov96_02214234

	thumb_func_start ov96_02214258
ov96_02214258: ; 0x02214258
	push {r4, r5}
	lsl r1, r1, #4
	add r4, r0, r1
	ldr r1, _02214274 ; =0x000007D4
	mov r5, #1
	add r0, r1, #0
	strb r5, [r4, r1]
	add r0, #0xe
	strb r2, [r4, r0]
	add r1, #0xf
	strb r3, [r4, r1]
	pop {r4, r5}
	bx lr
	nop
_02214274: .word 0x000007D4
	thumb_func_end ov96_02214258

	thumb_func_start ov96_02214278
ov96_02214278: ; 0x02214278
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r4, r1, #0
	ldrb r0, [r4]
	cmp r0, #0
	bne _02214286
	b _0221438C
_02214286:
	cmp r0, #1
	beq _02214292
	cmp r0, #2
	beq _022142CE
	add sp, #0x10
	pop {r3, r4, r5, pc}
_02214292:
	ldrb r0, [r4, #0xe]
	cmp r0, #0
	beq _022142B4
	ldrb r0, [r4, #0xf]
	cmp r0, #0
	ldr r0, [r4, #8]
	beq _022142AA
	ldrb r1, [r4, #1]
	mov r2, #1
	bl ov96_02214044
	b _022142BE
_022142AA:
	ldrb r1, [r4, #1]
	mov r2, #2
	bl ov96_02214044
	b _022142BE
_022142B4:
	ldrb r1, [r4, #1]
	ldr r0, [r4, #8]
	mov r2, #3
	bl ov96_02214044
_022142BE:
	mov r0, #0
	strb r0, [r4, #2]
	strb r0, [r4, #0xd]
	strb r0, [r4, #0xc]
	mov r0, #2
	add sp, #0x10
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_022142CE:
	ldrb r0, [r4, #2]
	add r0, r0, #1
	strb r0, [r4, #2]
	ldrb r0, [r4, #2]
	cmp r0, #0x1e
	bls _02214318
	mov r0, #8
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r1, #1
	str r1, [sp, #8]
	ldrb r2, [r4, #1]
	ldr r0, [r4, #8]
	mov r3, #0
	lsl r2, r2, #0x1b
	ldr r0, [r0, #4]
	lsr r2, r2, #0x18
	bl sub_0201CA4C
	ldr r0, [r4, #8]
	mov r1, #1
	ldr r0, [r0, #4]
	bl ScheduleBgTilemapBufferTransfer
	ldrb r1, [r4, #1]
	ldr r0, [r4, #8]
	mov r2, #0
	bl ov96_02214044
	mov r0, #0
	mvn r0, r0
	strb r0, [r4, #3]
	mov r0, #0
	add sp, #0x10
	strb r0, [r4]
	pop {r3, r4, r5, pc}
_02214318:
	ldrb r0, [r4, #0xc]
	cmp r0, #0
	bne _02214388
	ldr r3, _02214390 ; =0x0221D1F4
	add r1, sp, #0xc
	ldrb r0, [r3, #2]
	add r2, sp, #0xc
	add r1, #2
	strb r0, [r2, #2]
	ldrb r0, [r3, #3]
	strb r0, [r2, #3]
	ldrb r5, [r3]
	add r0, sp, #0xc
	strb r5, [r2]
	ldrb r3, [r3, #1]
	strb r3, [r2, #1]
	ldrb r2, [r4, #0xd]
	add r2, r2, #1
	lsr r5, r2, #0x1f
	lsl r3, r2, #0x1f
	sub r3, r3, r5
	mov r2, #0x1f
	ror r3, r2
	add r2, r5, r3
	strb r2, [r4, #0xd]
	mov r2, #5
	strb r2, [r4, #0xc]
	ldrb r2, [r4, #0xe]
	cmp r2, #0
	beq _0221435A
	ldrb r0, [r4, #0xd]
	ldrb r1, [r1, r0]
	b _0221435E
_0221435A:
	ldrb r1, [r4, #0xd]
	ldrb r1, [r0, r1]
_0221435E:
	mov r0, #8
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	str r1, [sp, #8]
	ldrb r2, [r4, #1]
	ldr r0, [r4, #8]
	mov r1, #1
	lsl r2, r2, #0x1b
	ldr r0, [r0, #4]
	lsr r2, r2, #0x18
	mov r3, #0
	bl sub_0201CA4C
	ldr r0, [r4, #8]
	mov r1, #1
	ldr r0, [r0, #4]
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x10
	pop {r3, r4, r5, pc}
_02214388:
	sub r0, r0, #1
	strb r0, [r4, #0xc]
_0221438C:
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02214390: .word 0x0221D1F4
	thumb_func_end ov96_02214278

	thumb_func_start ov96_02214394
ov96_02214394: ; 0x02214394
	push {r3, lr}
	cmp r0, #3
	bhi _022143BE
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_022143A6: ; jump table
	.short _022143AE - _022143A6 - 2 ; case 0
	.short _022143B2 - _022143A6 - 2 ; case 1
	.short _022143B6 - _022143A6 - 2 ; case 2
	.short _022143BA - _022143A6 - 2 ; case 3
_022143AE:
	mov r0, #0xd8
	b _022143C6
_022143B2:
	mov r0, #0xdc
	b _022143C6
_022143B6:
	mov r0, #0xe0
	b _022143C6
_022143BA:
	mov r0, #0xe4
	b _022143C6
_022143BE:
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
_022143C6:
	cmp r1, #4
	blo _022143D2
	bl GF_AssertFail
	mov r0, #0
	pop {r3, pc}
_022143D2:
	add r0, r0, r1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_02214394

	thumb_func_start ov96_022143DC
ov96_022143DC: ; 0x022143DC
	add r2, r0, #0
	ldr r1, [r2, #8]
	ldr r2, [r2, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r3, _022143F8 ; =ov96_022143FC
	asr r0, r0, #0xc
	asr r1, r1, #0xc
	bx r3
	nop
_022143F8: .word ov96_022143FC
	thumb_func_end ov96_022143DC

	thumb_func_start ov96_022143FC
ov96_022143FC: ; 0x022143FC
	cmp r0, #0x80
	bge _0221440C
	cmp r1, #0x70
	bge _02214408
	mov r0, #0
	bx lr
_02214408:
	mov r0, #2
	bx lr
_0221440C:
	cmp r1, #0x70
	bge _02214414
	mov r0, #1
	bx lr
_02214414:
	mov r0, #3
	bx lr
	thumb_func_end ov96_022143FC

	thumb_func_start ov96_02214418
ov96_02214418: ; 0x02214418
	push {r4, r5, r6, r7}
	ldr r1, _02214484 ; =0x00000738
	mov r5, #0
	ldr r2, [r0, r1]
	mov r1, #0x4b
	lsl r1, r1, #2
	cmp r2, r1
	bgt _0221443E
	ldr r1, _02214488 ; =0x00000818
	add r3, r5, #0
_0221442C:
	add r2, r0, r5
	strb r3, [r2, r1]
	add r2, r5, #1
	lsl r2, r2, #0x18
	lsr r5, r2, #0x18
	cmp r5, #4
	blo _0221442C
	pop {r4, r5, r6, r7}
	bx lr
_0221443E:
	ldr r2, _0221448C ; =0x00000814
	add r3, r5, #0
_02214442:
	add r1, r0, r3
	ldrb r1, [r1, r2]
	cmp r5, r1
	bhs _0221444C
	add r5, r1, #0
_0221444C:
	add r1, r3, #1
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
	cmp r3, #4
	blo _02214442
	mov r6, #0
	ldr r1, _0221448C ; =0x00000814
	add r2, r6, #0
	mov r3, #1
_0221445E:
	cmp r5, #0
	beq _02214470
	add r4, r0, r6
	ldrb r7, [r4, r1]
	cmp r5, r7
	bne _02214470
	ldr r7, _02214488 ; =0x00000818
	strb r3, [r4, r7]
	b _02214476
_02214470:
	ldr r4, _02214488 ; =0x00000818
	add r7, r0, r6
	strb r2, [r7, r4]
_02214476:
	add r4, r6, #1
	lsl r4, r4, #0x18
	lsr r6, r4, #0x18
	cmp r6, #4
	blo _0221445E
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
_02214484: .word 0x00000738
_02214488: .word 0x00000818
_0221448C: .word 0x00000814
	thumb_func_end ov96_02214418

	thumb_func_start ov96_02214490
ov96_02214490: ; 0x02214490
	push {r3, r4, r5, r6, r7, lr}
	mov r4, #0
	ldr r6, _022144BC ; =0x000007D4
	add r5, r0, #0
	add r7, r4, #0
_0221449A:
	lsl r0, r4, #4
	add r0, r5, r0
	ldrb r0, [r0, r6]
	cmp r0, #0
	bne _022144AE
	add r0, r5, #0
	add r1, r4, #0
	add r2, r7, #0
	bl ov96_02214044
_022144AE:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _0221449A
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022144BC: .word 0x000007D4
	thumb_func_end ov96_02214490

	thumb_func_start ov96_022144C0
ov96_022144C0: ; 0x022144C0
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	mov r5, #0
	add r4, sp, #0xc
	mov r7, #0x7c
_022144CC:
	lsl r2, r5, #3
	add r1, r6, r5
	str r1, [r4, r2]
	add r1, r5, #0
	mul r1, r7
	add r3, r4, r2
	add r1, r0, r1
	str r1, [r3, #4]
	add r1, r5, #1
	lsl r1, r1, #0x18
	lsr r5, r1, #0x18
	cmp r5, #3
	blo _022144CC
	ldr r0, [sp, #0xc]
	ldrb r1, [r0]
	ldr r0, [sp, #0x14]
	ldrb r0, [r0]
	cmp r1, r0
	blo _022144F8
	add r0, r4, #0
	add r4, sp, #0x14
	b _022144FA
_022144F8:
	add r0, sp, #0x14
_022144FA:
	ldr r1, [sp, #0x1c]
	ldrb r2, [r1]
	ldr r1, [r0]
	ldrb r1, [r1]
	cmp r1, r2
	blo _02214522
	ldr r1, [r4]
	ldrb r1, [r1]
	cmp r1, r2
	blo _02214518
	str r0, [sp]
	add r0, sp, #0x1c
	str r4, [sp, #4]
	str r0, [sp, #8]
	b _0221452A
_02214518:
	str r0, [sp]
	add r0, sp, #0x1c
	str r0, [sp, #4]
	str r4, [sp, #8]
	b _0221452A
_02214522:
	add r1, sp, #0x1c
	str r1, [sp]
	str r0, [sp, #4]
	str r4, [sp, #8]
_0221452A:
	mov r5, #0
	add r4, sp, #0
_0221452E:
	lsl r0, r5, #2
	ldr r0, [r4, r0]
	add r1, r5, #0
	ldr r0, [r0, #4]
	add r1, #8
	ldr r0, [r0]
	bl ov96_021EABA8
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #3
	blo _0221452E
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_022144C0

	thumb_func_start ov96_0221454C
ov96_0221454C: ; 0x0221454C
	ldrh r3, [r1, #2]
	ldrh r2, [r0, #2]
	cmp r2, r3
	bls _0221455A
	mov r0, #0
	mvn r0, r0
	bx lr
_0221455A:
	cmp r2, r3
	bhs _02214562
	mov r0, #1
	bx lr
_02214562:
	ldrh r1, [r1]
	ldrh r0, [r0]
	cmp r0, r1
	bhs _02214570
	mov r0, #0
	mvn r0, r0
	bx lr
_02214570:
	cmp r0, r1
	bls _02214578
	mov r0, #1
	bx lr
_02214578:
	mov r0, #0
	bx lr
	thumb_func_end ov96_0221454C

	thumb_func_start ov96_0221457C
ov96_0221457C: ; 0x0221457C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	mov r5, #0
	str r0, [sp, #4]
	add r6, r1, #0
	add r7, r2, #0
	add r4, r5, #0
_0221458A:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	cmp r0, r7
	beq _022145AC
	lsl r0, r5, #2
	add r1, sp, #8
	add r2, sp, #8
	add r1, r1, r0
	strh r4, [r2, r0]
	add r0, r6, r4
	ldrb r0, [r0, #0xc]
	strh r0, [r1, #2]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
_022145AC:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #0xc
	blo _0221458A
	ldr r1, _02214610 ; =0x0000081C
	ldr r0, [sp, #4]
	ldr r3, _02214614 ; =ov96_0221454C
	ldr r0, [r0, r1]
	mov r1, #9
	str r0, [sp]
	add r0, sp, #8
	mov r2, #4
	bl sub_020E3A84
	mov r5, #0
	add r7, sp, #8
_022145CE:
	lsl r0, r5, #2
	ldrh r0, [r7, r0]
	mov r1, #3
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	add r0, r6, #0
	bl _s32_div_f
	add r4, r0, #0
	add r0, r6, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0x5d
	mov r2, #0x7c
	lsl r0, r0, #2
	mul r2, r1
	ldr r1, [sp, #4]
	mul r0, r4
	add r0, r1, r0
	add r0, r2, r0
	add r1, r5, #0
	ldr r0, [r0, #0x5c]
	add r1, #0x10
	bl ov96_021EABA8
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #9
	blo _022145CE
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02214610: .word 0x0000081C
_02214614: .word ov96_0221454C
	thumb_func_end ov96_0221457C

	thumb_func_start ov96_02214618
ov96_02214618: ; 0x02214618
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r0, r5, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	mov r0, #0x75
	lsl r0, r0, #4
	ldr r0, [r6, r0]
	bl ov96_02214904
	add r4, r0, #0
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_021E8318
	add r0, r6, #0
	add r1, r4, #0
	bl ov96_022136A4
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02214618

	thumb_func_start ov96_0221464C
ov96_0221464C: ; 0x0221464C
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	mov r1, #0x50
	add r5, r0, #0
	add r7, r2, #0
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0x50
	bl MIi_CpuFill8
	str r5, [r4]
	str r6, [r4, #0x10]
	add r0, r4, #0
	str r7, [r4, #4]
	bl ov96_022148A4
	ldr r2, _0221468C ; =0x00000135
	mov r0, #1
	mov r1, #0x1b
	add r3, r5, #0
	bl NewMsgDataFromNarc
	str r0, [r4, #0x34]
	add r0, r5, #0
	bl ScrStrBufs_new
	str r0, [r4, #0x38]
	add r0, r4, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0221468C: .word 0x00000135
	thumb_func_end ov96_0221464C

	thumb_func_start ov96_02214690
ov96_02214690: ; 0x02214690
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x40]
	bl FreeToHeap
	ldr r0, [r4, #0x38]
	bl ScrStrBufs_delete
	ldr r0, [r4, #0x34]
	bl DestroyMsgData
	add r0, r4, #0
	add r0, #0x14
	bl RemoveWindow
	add r0, r4, #0
	add r0, #0x24
	bl RemoveWindow
	add r0, r4, #0
	bl FreeToHeap
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02214690

	thumb_func_start ov96_022146C0
ov96_022146C0: ; 0x022146C0
	push {r4, lr}
	sub sp, #0x10
	add r4, r0, #0
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #8
	str r0, [sp, #0xc]
	ldr r2, [r4, #0x10]
	mov r0, #0xec
	mov r3, #5
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #9
	str r0, [sp, #0xc]
	ldr r2, [r4, #0x10]
	mov r0, #0xec
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	ldr r0, [r4]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xec
	mov r1, #0xa
	mov r2, #0
	add r3, #0x3c
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x40]
	add r0, r4, #0
	mov r1, #0
	bl ov96_0221497C
	add sp, #0x10
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_022146C0

	thumb_func_start ov96_02214718
ov96_02214718: ; 0x02214718
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	ldr r3, _022147EC ; =0x0221D660
	str r2, [sp, #4]
	add r7, r0, #0
	add r6, r1, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	ldr r3, _022147F0 ; =0x0221D66C
	str r0, [r2]
	ldmia r3!, {r0, r1}
	add r2, sp, #0x14
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #0
	str r0, [r2]
	mov r0, #9
	str r0, [sp]
	add r0, r7, #0
	mov r2, #2
	mov r3, #0x66
	bl ov96_021EB3E4
	mov r1, #1
	add r4, r0, #0
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r4, #0
	add r1, sp, #0x20
	bl ov96_021EB588
	ldr r0, [r6, #4]
	bl ov96_021E5F24
	add r1, r0, #0
	add r0, r4, #0
	add r1, r1, #1
	bl ov96_021EB564
	mov r0, #0xa
	str r0, [sp]
	add r0, r7, #0
	mov r1, #0
	mov r2, #2
	mov r3, #0x66
	bl ov96_021EB3E4
	mov r1, #1
	add r4, r0, #0
	add r2, r1, #0
	bl ov96_021EB52C
	add r0, r4, #0
	add r1, sp, #0x14
	bl ov96_021EB588
	add r0, r4, #0
	mov r1, #5
	bl ov96_021EB564
	str r4, [r6, #0x4c]
	mov r4, #0
_0221479A:
	lsl r0, r4, #2
	add r5, r6, r0
	add r0, r7, #0
	bl ov96_021EB5E8
	add r1, r0, #0
	ldr r0, [sp, #4]
	ldr r3, [r6]
	mov r2, #0
	bl ov96_021EA2C4
	mov r1, #1
	str r0, [r5, #8]
	bl sub_02024830
	ldr r0, _022147F4 ; =0x0221D648
	add r1, sp, #8
	ldrb r0, [r0, r4]
	lsl r0, r0, #0xc
	str r0, [sp, #8]
	mov r0, #0xa
	lsl r0, r0, #0x12
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [r5, #8]
	bl sub_020247D4
	ldr r1, _022147F8 ; =0x0221D64C
	ldr r0, [r5, #8]
	ldrb r1, [r1, r4]
	bl sub_020248F0
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _0221479A
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	nop
_022147EC: .word 0x0221D660
_022147F0: .word 0x0221D66C
_022147F4: .word 0x0221D648
_022147F8: .word 0x0221D64C
	thumb_func_end ov96_02214718

	thumb_func_start ov96_022147FC
ov96_022147FC: ; 0x022147FC
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r0, #0x14
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r0, [r5, #4]
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	ldr r0, [r5, #4]
	bl ov96_021E5F34
	ldr r1, [r5]
	bl sub_02028F68
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02214850 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0x14
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r5, #0x14
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	nop
_02214850: .word 0x000F0E00
	thumb_func_end ov96_022147FC

	thumb_func_start ov96_02214854
ov96_02214854: ; 0x02214854
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r0, #0x24
	mov r1, #0
	bl FillWindowPixelBuffer
	ldr r0, [r5, #0x38]
	ldr r1, [r5, #0x34]
	ldr r2, _0221489C ; =0x00000137
	ldr r3, [r5]
	bl ReadMsgData_ExpandPlaceholders
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _022148A0 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r0, #0x24
	add r3, r1, #0
	str r1, [sp, #0xc]
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r5, #0x24
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_0221489C: .word 0x00000137
_022148A0: .word 0x000F0E00
	thumb_func_end ov96_02214854

	thumb_func_start ov96_022148A4
ov96_022148A4: ; 0x022148A4
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r1, r4, #0
	ldr r0, [r4, #0x10]
	ldr r2, _022148E0 ; =0x0221D650
	add r1, #0x14
	bl AddWindow
	add r1, r4, #0
	ldr r0, [r4, #0x10]
	ldr r2, _022148E4 ; =0x0221D658
	add r1, #0x24
	bl AddWindow
	mov r2, #0
	str r2, [sp]
	ldr r0, [r4, #0x10]
	mov r1, #4
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_022148E0: .word 0x0221D650
_022148E4: .word 0x0221D658
	thumb_func_end ov96_022148A4

	thumb_func_start ov96_022148E8
ov96_022148E8: ; 0x022148E8
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r4, r1, #0
	add r6, r2, #0
	bl ov96_021E5F24
	cmp r6, r0
	bne _02214902
	ldr r0, [r5, #0x44]
	cmp r0, r4
	beq _02214902
	str r4, [r5, #0x44]
_02214902:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_022148E8

	thumb_func_start ov96_02214904
ov96_02214904: ; 0x02214904
	ldr r0, [r0, #0x44]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	bx lr
	thumb_func_end ov96_02214904

	thumb_func_start ov96_0221490C
ov96_0221490C: ; 0x0221490C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	mov r0, #0xe1
	lsl r0, r0, #2
	cmp r1, r0
	bgt _02214944
	ldr r0, [r5, #8]
	mov r1, #0
	bl sub_02024830
	ldr r0, [r5, #0xc]
	mov r1, #0
	bl sub_02024830
	ldr r0, [r5, #0x4c]
	mov r1, #1
	mov r2, #0
	bl ov96_021EB52C
	ldr r0, [r5, #0x48]
	cmp r0, #0
	bne _0221497A
	add r0, r5, #0
	bl ov96_02214854
	mov r0, #1
	str r0, [r5, #0x48]
	pop {r3, r4, r5, pc}
_02214944:
	add r0, r1, #0
	mov r1, #0x1e
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	add r1, r0, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #8]
	add r1, r1, #1
	bl sub_020248F0
	add r0, r4, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r0, [r5, #0xc]
	add r1, r1, #1
	bl sub_020248F0
_0221497A:
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_0221490C

	thumb_func_start ov96_0221497C
ov96_0221497C: ; 0x0221497C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_022149DA:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x3c]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #2
	ldrb r0, [r0, r4]
	add r2, r2, #6
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r1, #6
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #0x10]
	mov r3, #0xa
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _022149DA
	ldr r0, [r5, #0x10]
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221497C

	thumb_func_start ov96_02214A24
ov96_02214A24: ; 0x02214A24
	push {r3, r4, r5, lr}
	add r5, r1, #0
	mov r1, #0xa0
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0xa0
	bl MIi_CpuFill8
	add r0, r4, #0
	add r0, #0x98
	strb r5, [r0]
	mov r0, #4
	sub r1, r0, r5
	add r0, r4, #0
	add r0, #0x9e
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x9e
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0x9d
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #3
	add r0, #0x9b
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x9b
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0x9a
	strb r1, [r0]
	add r0, r4, #0
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02214A24

	thumb_func_start ov96_02214A6C
ov96_02214A6C: ; 0x02214A6C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #3
	add r6, r2, #0
	bl _s32_div_f
	add r7, r0, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r7, #0x18
	lsr r2, r0, #0x18
	mov r0, #0x24
	mul r0, r2
	add r2, r5, r0
	lsl r0, r1, #0x18
	lsr r0, r0, #0x16
	add r0, r2, r0
	str r6, [r0, #0x18]
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02214A6C

	thumb_func_start ov96_02214A9C
ov96_02214A9C: ; 0x02214A9C
	push {r4, r5, r6, lr}
	add r5, r0, #0
	mov r4, #0
	mov r6, #0x24
_02214AA4:
	add r0, r4, #0
	mul r0, r6
	add r0, r5, r0
	bl ov96_02214ABC
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _02214AA4
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_02214A9C

	thumb_func_start ov96_02214ABC
ov96_02214ABC: ; 0x02214ABC
	push {r3, r4, r5, r6}
	sub sp, #8
	add r1, sp, #0
	add r5, r0, #0
	mov r4, #0
	add r1, #3
	add r0, sp, #0
_02214ACA:
	lsl r2, r4, #2
	add r2, r5, r2
	ldr r3, [r2, #0x18]
	add r2, r3, #0
	add r6, r3, #0
	add r2, #0x73
	add r6, #0x70
	ldrb r2, [r2]
	ldrb r6, [r6]
	add r3, #0x75
	add r6, r2, r6
	strb r6, [r1, r4]
	ldrb r3, [r3]
	add r2, r2, r3
	strb r2, [r0, r4]
	add r2, r4, #1
	lsl r2, r2, #0x18
	lsr r4, r2, #0x18
	cmp r4, #3
	blo _02214ACA
	add r3, sp, #0
	mov r0, #0
	mov r4, #1
	add r3, #3
_02214AFA:
	add r1, r3, r4
	sub r1, r1, #1
	ldrb r2, [r1]
	ldrb r1, [r3, r4]
	cmp r2, r1
	bhs _02214B08
	add r0, r4, #0
_02214B08:
	add r1, r4, #1
	lsl r1, r1, #0x18
	lsr r4, r1, #0x18
	cmp r4, #3
	blo _02214AFA
	cmp r0, #0
	add r1, sp, #0
	bne _02214B2C
	ldrb r2, [r1, #1]
	ldrb r1, [r1, #2]
	cmp r2, r1
	blo _02214B26
	mov r2, #1
	mov r1, #2
	b _02214B56
_02214B26:
	mov r2, #2
	mov r1, #1
	b _02214B56
_02214B2C:
	cmp r0, #1
	bne _02214B44
	ldrb r2, [r1]
	ldrb r1, [r1, #2]
	cmp r2, r1
	blo _02214B3E
	mov r2, #0
	mov r1, #2
	b _02214B56
_02214B3E:
	mov r2, #2
	mov r1, #0
	b _02214B56
_02214B44:
	ldrb r2, [r1]
	ldrb r1, [r1, #1]
	cmp r2, r1
	blo _02214B52
	mov r2, #0
	mov r1, #1
	b _02214B56
_02214B52:
	mov r2, #1
	mov r1, #0
_02214B56:
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x18]
	str r0, [r5, #4]
	lsl r0, r2, #2
	add r0, r5, r0
	ldr r0, [r0, #0x18]
	str r0, [r5, #0xc]
	lsl r0, r1, #2
	add r0, r5, r0
	ldr r0, [r0, #0x18]
	str r0, [r5, #0x14]
	add sp, #8
	pop {r3, r4, r5, r6}
	bx lr
	thumb_func_end ov96_02214ABC

	thumb_func_start ov96_02214B74
ov96_02214B74: ; 0x02214B74
	add r0, #0x90
	str r1, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02214B74

	thumb_func_start ov96_02214B7C
ov96_02214B7C: ; 0x02214B7C
	ldr r3, _02214B80 ; =FreeToHeap
	bx r3
	.balign 4, 0
_02214B80: .word FreeToHeap
	thumb_func_end ov96_02214B7C

	thumb_func_start ov96_02214B84
ov96_02214B84: ; 0x02214B84
	push {r4, lr}
	add r4, r1, #0
	add r1, #0x9e
	ldrb r1, [r1]
	cmp r1, #4
	beq _02214C38
	add r1, r4, #0
	add r1, #0x9a
	ldrb r1, [r1]
	add r2, r1, #1
	add r1, r4, #0
	add r1, #0x9a
	strb r2, [r1]
	add r1, r4, #0
	add r1, #0x9a
	ldrb r2, [r1]
	add r1, r4, #0
	add r1, #0x9b
	ldrb r1, [r1]
	cmp r2, r1
	blo _02214BBE
	add r1, r4, #0
	mov r2, #1
	add r1, #0x94
	str r2, [r1]
	add r1, r4, #0
	mov r2, #0
	add r1, #0x9a
	strb r2, [r1]
_02214BBE:
	add r1, r4, #0
	add r1, #0x94
	ldr r1, [r1]
	cmp r1, #0
	beq _02214C38
	add r1, r4, #0
	add r1, #0x9d
	ldrb r2, [r1]
	add r1, r4, #0
	add r1, #0x99
	ldrb r1, [r1]
	add r2, r2, r1
	mov r1, #0x24
	mul r1, r2
	add r2, r4, r1
	add r1, r4, #0
	add r1, #0x9c
	ldrb r1, [r1]
	lsl r3, r1, #3
	ldr r1, [r2, r3]
	cmp r1, #0
	bne _02214BF4
	add r1, r4, #0
	add r2, r2, r3
	bl ov96_022155A0
	b _02214BF8
_02214BF4:
	sub r0, r1, #1
	str r0, [r2, r3]
_02214BF8:
	add r0, r4, #0
	add r0, #0x99
	ldrb r0, [r0]
	add r1, r0, #1
	add r0, r4, #0
	add r0, #0x99
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x99
	ldrb r1, [r0]
	add r0, r4, #0
	add r0, #0x98
	ldrb r0, [r0]
	cmp r1, r0
	blo _02214C38
	add r0, r4, #0
	mov r1, #0
	add r0, #0x99
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x9c
	ldrb r0, [r0]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	add r0, r4, #0
	add r0, #0x9c
	strb r1, [r0]
	mov r0, #0
	add r4, #0x94
	str r0, [r4]
_02214C38:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02214B84

	thumb_func_start ov96_02214C3C
ov96_02214C3C: ; 0x02214C3C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	ldr r0, [sp, #0x38]
	str r2, [sp, #0x10]
	add r6, r3, #0
	str r0, [sp, #0x38]
	ldr r0, [r6, #0x78]
	cmp r0, #0
	beq _02214C58
	add sp, #0x24
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_02214C58:
	ldr r0, [r6, #0x48]
	cmp r0, #0
	beq _02214C64
	add sp, #0x24
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_02214C64:
	ldr r3, [r6, #0x30]
	ldr r4, [r6, #0x34]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r3, r4, #0xb
	lsr r3, r3, #0x14
	add r3, r4, r3
	mov r0, #0x80
	mov r1, #0x60
	asr r2, r2, #0xc
	asr r3, r3, #0xc
	bl ov96_02215614
	str r0, [sp, #0x14]
	add r0, r6, #0
	str r0, [sp, #0x1c]
	add r0, #0x30
	mov r4, #0
	str r0, [sp, #0x1c]
_02214C8C:
	mov r0, #0x4c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x38]
	add r5, r0, r1
	add r0, r5, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #0
	bne _02214CCA
	add r0, r5, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #0
	beq _02214CCA
	ldr r2, [r5, #8]
	ldr r7, [r5, #0xc]
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	asr r3, r7, #0xb
	lsr r3, r3, #0x14
	add r3, r7, r3
	mov r0, #0x80
	mov r1, #0x60
	asr r3, r3, #0xc
	bl ov96_02215614
	add r7, r0, #0
	b _02214CCC
_02214CCA:
	mov r7, #4
_02214CCC:
	cmp r7, #4
	beq _02214D68
	mov r0, #0
	str r0, [sp, #0x18]
	add r0, r5, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #1
	bne _02214CE4
	mov r0, #8
	str r0, [sp, #0x18]
	b _02214CF2
_02214CE4:
	cmp r0, #2
	bne _02214CEE
	mov r0, #0xc
	str r0, [sp, #0x18]
	b _02214CF2
_02214CEE:
	bl GF_AssertFail
_02214CF2:
	ldr r0, [r6]
	bl ov96_021EAF8C
	add r1, r0, #0
	ldr r3, [sp, #0x18]
	add r2, r5, #0
	ldr r0, [sp, #0x1c]
	lsl r1, r1, #0xc
	add r2, #8
	lsl r3, r3, #0xc
	bl ov96_022156E8
	cmp r0, #0
	beq _02214D16
	mov r1, #1
	add r0, sp, #0x20
	strb r1, [r0, r4]
	b _02214D6E
_02214D16:
	ldr r0, [sp, #0x14]
	cmp r0, r7
	bne _02214D60
	str r0, [sp]
	ldr r0, [sp, #0xc]
	str r0, [sp, #4]
	ldr r1, [r5, #8]
	ldr r2, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r3, [r6, #0x30]
	asr r0, r0, #0xc
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r3, [r6, #0x34]
	asr r1, r1, #0xc
	asr r5, r3, #0xb
	lsr r5, r5, #0x14
	add r5, r3, r5
	asr r2, r2, #0xc
	asr r3, r5, #0xc
	bl ov96_02215650
	cmp r0, #0
	add r0, sp, #0x20
	beq _02214D5A
	mov r1, #4
	strb r1, [r0, r4]
	b _02214D6E
_02214D5A:
	mov r1, #3
	strb r1, [r0, r4]
	b _02214D6E
_02214D60:
	mov r1, #2
	add r0, sp, #0x20
	strb r1, [r0, r4]
	b _02214D6E
_02214D68:
	mov r1, #0
	add r0, sp, #0x20
	strb r1, [r0, r4]
_02214D6E:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _02214C8C
	add r0, sp, #0x20
	ldrb r3, [r0, #1]
	ldrb r2, [r0]
	cmp r2, r3
	blo _02214D8E
	ldr r1, [sp, #0x38]
	ldr r3, [sp, #0x14]
	add r0, r6, #0
	bl ov96_02214DBC
	b _02214D9E
_02214D8E:
	ldr r1, [sp, #0x38]
	add r2, r3, #0
	add r1, #0x4c
	ldr r3, [sp, #0x14]
	add r0, r6, #0
	str r1, [sp, #0x38]
	bl ov96_02214DBC
_02214D9E:
	add r4, r0, #0
	ldr r0, [r6, #0x78]
	cmp r0, #1
	bne _02214DB6
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0x10]
	mov r3, #6
	bl ov96_021E8228
_02214DB6:
	add r0, r4, #0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02214C3C

	thumb_func_start ov96_02214DBC
ov96_02214DBC: ; 0x02214DBC
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	add r7, r3, #0
	bl LCRandom
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	cmp r6, #0xd
	bhi _02214EA2
	add r1, r6, r6
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_02214DE4: ; jump table
	.short _02214EA6 - _02214DE4 - 2 ; case 0
	.short _02214E78 - _02214DE4 - 2 ; case 1
	.short _02214E00 - _02214DE4 - 2 ; case 2
	.short _02214E32 - _02214DE4 - 2 ; case 3
	.short _02214E64 - _02214DE4 - 2 ; case 4
	.short _02214EA2 - _02214DE4 - 2 ; case 5
	.short _02214EA2 - _02214DE4 - 2 ; case 6
	.short _02214EA2 - _02214DE4 - 2 ; case 7
	.short _02214EA6 - _02214DE4 - 2 ; case 8
	.short _02214E78 - _02214DE4 - 2 ; case 9
	.short _02214EA2 - _02214DE4 - 2 ; case 10
	.short _02214EA2 - _02214DE4 - 2 ; case 11
	.short _02214EA2 - _02214DE4 - 2 ; case 12
	.short _02214E64 - _02214DE4 - 2 ; case 13
_02214E00:
	cmp r0, #0x3c
	bhs _02214E08
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02214E08:
	cmp r0, #0x50
	bhs _02214E1C
	add r4, #8
	ldmia r4!, {r0, r1}
	add r5, #0x24
	stmia r5!, {r0, r1}
	ldr r0, [r4]
	str r0, [r5]
	mov r0, #0xa
	pop {r3, r4, r5, r6, r7, pc}
_02214E1C:
	add r4, #8
	add r2, r5, #0
	ldmia r4!, {r0, r1}
	add r2, #0x24
	stmia r2!, {r0, r1}
	ldr r0, [r4]
	str r0, [r2]
	mov r0, #1
	str r0, [r5, #0x78]
	mov r0, #0xa
	pop {r3, r4, r5, r6, r7, pc}
_02214E32:
	cmp r0, #0x14
	bhs _02214E3A
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02214E3A:
	cmp r0, #0x5a
	bhs _02214E4E
	add r4, #8
	ldmia r4!, {r0, r1}
	add r5, #0x24
	stmia r5!, {r0, r1}
	ldr r0, [r4]
	str r0, [r5]
	mov r0, #3
	pop {r3, r4, r5, r6, r7, pc}
_02214E4E:
	add r4, #8
	add r2, r5, #0
	ldmia r4!, {r0, r1}
	add r2, #0x24
	stmia r2!, {r0, r1}
	ldr r0, [r4]
	str r0, [r2]
	mov r0, #1
	str r0, [r5, #0x78]
	mov r0, #3
	pop {r3, r4, r5, r6, r7, pc}
_02214E64:
	add r4, #8
	add r2, r5, #0
	ldmia r4!, {r0, r1}
	add r2, #0x24
	stmia r2!, {r0, r1}
	ldr r0, [r4]
	str r0, [r2]
	mov r0, #1
	str r0, [r5, #0x78]
	b _02214EA6
_02214E78:
	cmp r7, #4
	beq _02214E9C
	mov r0, #3
	sub r0, r0, r7
	lsl r0, r0, #0x18
	lsr r1, r0, #0x18
	mov r0, #0xc
	add r2, r1, #0
	mul r2, r0
	ldr r0, _02214EAC ; =0x0221D678
	ldrh r0, [r0, r2]
	lsl r0, r0, #0xc
	str r0, [r5, #0x24]
	ldr r0, _02214EB0 ; =0x0221D67A
	ldrh r0, [r0, r2]
	lsl r0, r0, #0xc
	str r0, [r5, #0x28]
	b _02214EA6
_02214E9C:
	bl GF_AssertFail
	b _02214EA6
_02214EA2:
	bl GF_AssertFail
_02214EA6:
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02214EAC: .word 0x0221D678
_02214EB0: .word 0x0221D67A
	thumb_func_end ov96_02214DBC

	thumb_func_start ov96_02214EB4
ov96_02214EB4: ; 0x02214EB4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	ldr r0, [sp, #0x40]
	str r2, [sp, #0x10]
	add r6, r3, #0
	str r0, [sp, #0x40]
	ldr r0, [r6, #0x78]
	cmp r0, #0
	beq _02214ED0
	add sp, #0x28
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02214ED0:
	ldr r0, [r6, #0x48]
	cmp r0, #0
	beq _02214EDC
	add sp, #0x28
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_02214EDC:
	ldr r3, [r6, #0x30]
	ldr r4, [r6, #0x34]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r3, r4, #0xb
	lsr r3, r3, #0x14
	add r3, r4, r3
	mov r0, #0x80
	mov r1, #0x60
	asr r2, r2, #0xc
	asr r3, r3, #0xc
	bl ov96_02215614
	str r0, [sp, #0x14]
	mov r4, #0
_02214EFC:
	mov r0, #0x4c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x40]
	add r5, r0, r1
	add r0, r5, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #0
	bne _02214F38
	add r0, r5, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #0
	beq _02214F38
	ldr r2, [r5, #8]
	ldr r7, [r5, #0xc]
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	asr r3, r7, #0xb
	lsr r3, r3, #0x14
	add r3, r7, r3
	mov r0, #0x80
	mov r1, #0x60
	asr r3, r3, #0xc
	bl ov96_02215614
	b _02214F3A
_02214F38:
	mov r0, #4
_02214F3A:
	cmp r0, #4
	beq _02214F92
	ldr r1, [sp, #0xc]
	cmp r1, r0
	bne _02214F8A
	ldr r0, [sp, #0x14]
	str r0, [sp]
	ldr r0, [sp, #0xc]
	str r0, [sp, #4]
	ldr r1, [r5, #8]
	ldr r2, [r5, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r3, [r6, #0x30]
	asr r0, r0, #0xc
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r3, [r6, #0x34]
	asr r1, r1, #0xc
	asr r5, r3, #0xb
	lsr r5, r5, #0x14
	add r5, r3, r5
	asr r2, r2, #0xc
	asr r3, r5, #0xc
	bl ov96_0221567C
	cmp r0, #0
	add r0, sp, #0x18
	beq _02214F84
	mov r1, #7
	strb r1, [r0, r4]
	b _02214F98
_02214F84:
	mov r1, #6
	strb r1, [r0, r4]
	b _02214F98
_02214F8A:
	mov r1, #6
	add r0, sp, #0x18
	strb r1, [r0, r4]
	b _02214F98
_02214F92:
	mov r1, #5
	add r0, sp, #0x18
	strb r1, [r0, r4]
_02214F98:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _02214EFC
	add r0, sp, #0x18
	ldrb r4, [r0, #1]
	ldrb r0, [r0]
	cmp r0, #7
	bne _02214FB0
	mov r0, #1
	b _02214FB2
_02214FB0:
	mov r0, #0
_02214FB2:
	cmp r4, #7
	bne _02214FBA
	mov r1, #1
	b _02214FBC
_02214FBA:
	mov r1, #0
_02214FBC:
	cmp r0, r1
	bne _02215014
	ldr r1, [sp, #0x40]
	add r0, r6, #0
	add r0, #0x30
	add r1, #8
	add r2, sp, #0x1c
	bl VEC_Subtract
	add r0, sp, #0x1c
	bl VEC_Mag
	ldr r1, [sp, #0x40]
	add r5, r0, #0
	add r0, r6, #0
	add r0, #0x30
	add r1, #0x54
	add r2, sp, #0x1c
	bl VEC_Subtract
	add r0, sp, #0x1c
	bl VEC_Mag
	cmp r5, r0
	blt _02215000
	add r2, sp, #0x18
	ldrb r2, [r2]
	ldr r1, [sp, #0x40]
	ldr r3, [sp, #0xc]
	add r0, r6, #0
	bl ov96_02215058
	add r4, r0, #0
	b _0221503C
_02215000:
	ldr r1, [sp, #0x40]
	ldr r3, [sp, #0xc]
	add r1, #0x4c
	add r0, r6, #0
	add r2, r4, #0
	str r1, [sp, #0x40]
	bl ov96_02215058
	add r4, r0, #0
	b _0221503C
_02215014:
	add r0, sp, #0x18
	ldrb r2, [r0]
	cmp r2, r4
	blo _0221502A
	ldr r1, [sp, #0x40]
	ldr r3, [sp, #0xc]
	add r0, r6, #0
	bl ov96_02215058
	add r4, r0, #0
	b _0221503C
_0221502A:
	ldr r1, [sp, #0x40]
	ldr r3, [sp, #0xc]
	add r1, #0x4c
	add r0, r6, #0
	add r2, r4, #0
	str r1, [sp, #0x40]
	bl ov96_02215058
	add r4, r0, #0
_0221503C:
	ldr r0, [r6, #0x78]
	cmp r0, #1
	bne _02215052
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0x10]
	mov r3, #6
	bl ov96_021E8228
_02215052:
	add r0, r4, #0
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02214EB4

	thumb_func_start ov96_02215058
ov96_02215058: ; 0x02215058
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r4, r0, #0
	cmp r2, #0xc
	bls _02215064
	b _0221516E
_02215064:
	add r0, r2, r2
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02215070: ; jump table
	.short _0221516E - _02215070 - 2 ; case 0
	.short _0221516E - _02215070 - 2 ; case 1
	.short _0221516E - _02215070 - 2 ; case 2
	.short _0221516E - _02215070 - 2 ; case 3
	.short _0221516E - _02215070 - 2 ; case 4
	.short _02215172 - _02215070 - 2 ; case 5
	.short _0221508A - _02215070 - 2 ; case 6
	.short _02215146 - _02215070 - 2 ; case 7
	.short _02215172 - _02215070 - 2 ; case 8
	.short _0221516E - _02215070 - 2 ; case 9
	.short _0221516E - _02215070 - 2 ; case 10
	.short _0221508A - _02215070 - 2 ; case 11
	.short _02215146 - _02215070 - 2 ; case 12
_0221508A:
	sub r1, r3, #1
	add r6, r1, #0
	mov r0, #0xc
	mul r6, r0
	ldr r0, _02215178 ; =0x0221D678
	ldr r1, [r4, #0x30]
	add r5, r0, r6
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	ldr r2, [r4, #0x34]
	asr r0, r0, #0xc
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	asr r1, r1, #0xc
	add r2, r5, #0
	bl ov96_022156A8
	cmp r0, #0
	beq _022150BA
	add sp, #4
	mov r0, #0
	pop {r3, r4, r5, r6, pc}
_022150BA:
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	bne _022150D8
	ldrh r1, [r5]
	add r0, sp, #0
	strh r1, [r0]
	ldrh r1, [r5, #2]
	strh r1, [r0, #2]
	b _02215108
_022150D8:
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1f
	sub r1, r1, r2
	mov r0, #0x1f
	ror r1, r0
	add r0, r2, r1
	bne _022150FA
	ldr r0, _0221517C ; =0x0221D67C
	ldrh r1, [r0, r6]
	add r2, r0, r6
	add r0, sp, #0
	strh r1, [r0]
	ldrh r1, [r2, #2]
	strh r1, [r0, #2]
	b _02215108
_022150FA:
	ldr r0, _02215180 ; =0x0221D680
	ldrh r1, [r0, r6]
	add r2, r0, r6
	add r0, sp, #0
	strh r1, [r0]
	ldrh r1, [r2, #2]
	strh r1, [r0, #2]
_02215108:
	bl LCRandom
	mov r1, #0x11
	bl _s32_div_f
	add r2, sp, #0
	mov r0, #8
	ldrh r3, [r2]
	sub r0, r0, r1
	add r0, r3, r0
	strh r0, [r2]
	bl LCRandom
	mov r1, #0x11
	bl _s32_div_f
	add r2, sp, #0
	mov r0, #8
	ldrh r3, [r2, #2]
	sub r0, r0, r1
	add sp, #4
	add r0, r3, r0
	strh r0, [r2, #2]
	ldrh r0, [r2]
	lsl r0, r0, #0xc
	str r0, [r4, #0x24]
	ldrh r0, [r2, #2]
	lsl r0, r0, #0xc
	str r0, [r4, #0x28]
	mov r0, #6
	pop {r3, r4, r5, r6, pc}
_02215146:
	add r3, r1, #0
	add r3, #8
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x24
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	bl LCRandom
	mov r1, #0x64
	bl _s32_div_f
	cmp r1, #0x50
	bge _02215168
	mov r0, #1
	str r0, [r4, #0x78]
_02215168:
	add sp, #4
	mov r0, #0xa
	pop {r3, r4, r5, r6, pc}
_0221516E:
	bl GF_AssertFail
_02215172:
	mov r0, #0
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	.balign 4, 0
_02215178: .word 0x0221D678
_0221517C: .word 0x0221D67C
_02215180: .word 0x0221D680
	thumb_func_end ov96_02215058

	thumb_func_start ov96_02215184
ov96_02215184: ; 0x02215184
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	str r0, [sp, #8]
	ldr r0, [sp, #0x48]
	str r1, [sp, #0xc]
	str r0, [sp, #0x48]
	ldr r0, [sp, #0x4c]
	str r2, [sp, #0x10]
	add r5, r3, #0
	str r0, [sp, #0x4c]
	ldr r0, [r5, #0x78]
	cmp r0, #0
	beq _022151A4
	add sp, #0x30
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_022151A4:
	ldr r0, [r5, #0x48]
	cmp r0, #0
	beq _022151B0
	add sp, #0x30
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
_022151B0:
	ldr r3, [r5, #0x30]
	ldr r4, [r5, #0x34]
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	asr r3, r4, #0xb
	lsr r3, r3, #0x14
	add r3, r4, r3
	mov r0, #0x80
	mov r1, #0x60
	asr r2, r2, #0xc
	asr r3, r3, #0xc
	bl ov96_02215614
	str r0, [sp, #0x14]
	mov r4, #0
	add r7, sp, #0x20
_022151D2:
	mov r0, #0x4c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x48]
	add r3, r0, r1
	add r0, r3, #0
	add r0, #0x39
	ldrb r0, [r0]
	cmp r0, #0
	bne _02215210
	add r0, r3, #0
	add r0, #0x38
	ldrb r0, [r0]
	cmp r0, #0
	beq _02215210
	ldr r2, [r3, #8]
	ldr r3, [r3, #0xc]
	asr r6, r2, #0xb
	lsr r6, r6, #0x14
	add r6, r2, r6
	asr r2, r6, #0xc
	asr r6, r3, #0xb
	lsr r6, r6, #0x14
	add r6, r3, r6
	mov r0, #0x80
	mov r1, #0x60
	asr r3, r6, #0xc
	bl ov96_02215614
	strb r0, [r7, r4]
	b _02215214
_02215210:
	mov r0, #4
	strb r0, [r7, r4]
_02215214:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _022151D2
	add r0, r5, #0
	str r0, [sp, #0x1c]
	add r0, #0x30
	mov r4, #0
	str r0, [sp, #0x1c]
_02215228:
	mov r0, #0x4c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x48]
	add r6, r0, r1
	add r0, sp, #0x20
	mov r1, #8
	add r0, #2
	strb r1, [r0, r4]
	add r0, sp, #0x20
	ldrb r0, [r0, r4]
	str r0, [sp, #0x18]
	cmp r0, #4
	beq _022152CC
	add r0, r6, #0
	add r0, #0x38
	ldrb r0, [r0]
	mov r7, #0
	cmp r0, #1
	bne _02215254
	add r7, r1, #0
	b _02215260
_02215254:
	cmp r0, #2
	bne _0221525C
	mov r7, #0xc
	b _02215260
_0221525C:
	bl GF_AssertFail
_02215260:
	ldr r0, [r5]
	bl ov96_021EAF8C
	add r1, r0, #0
	add r2, r6, #0
	ldr r0, [sp, #0x1c]
	lsl r1, r1, #0xc
	add r2, #8
	lsl r3, r7, #0xc
	bl ov96_022156E8
	cmp r0, #0
	beq _02215284
	add r0, sp, #0x20
	mov r1, #8
	add r0, #2
	strb r1, [r0, r4]
	b _022152CC
_02215284:
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0x18]
	cmp r1, r0
	bne _022152CC
	add r0, r1, #0
	str r0, [sp]
	ldr r0, [sp, #0xc]
	str r0, [sp, #4]
	ldr r1, [r6, #8]
	ldr r2, [r6, #0xc]
	asr r0, r1, #0xb
	lsr r0, r0, #0x14
	add r0, r1, r0
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r3, [r5, #0x30]
	asr r0, r0, #0xc
	asr r2, r3, #0xb
	lsr r2, r2, #0x14
	add r2, r3, r2
	ldr r3, [r5, #0x34]
	asr r1, r1, #0xc
	asr r6, r3, #0xb
	lsr r6, r6, #0x14
	add r6, r3, r6
	asr r2, r2, #0xc
	asr r3, r6, #0xc
	bl ov96_02215650
	cmp r0, #0
	beq _022152CC
	add r0, sp, #0x20
	mov r1, #0xd
	add r0, #2
	strb r1, [r0, r4]
_022152CC:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _02215228
	add r0, sp, #0x20
	ldrb r2, [r0, #2]
	cmp r2, #0xd
	bne _022152EC
	ldr r1, [sp, #0x48]
	ldr r3, [sp, #0x14]
	add r0, r5, #0
	bl ov96_02214DBC
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
_022152EC:
	ldrb r2, [r0, #3]
	cmp r2, #0xd
	bne _02215304
	ldr r1, [sp, #0x48]
	ldr r3, [sp, #0x14]
	add r1, #0x4c
	add r0, r5, #0
	str r1, [sp, #0x48]
	bl ov96_02214DBC
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
_02215304:
	ldr r0, [sp, #0xc]
	mov r1, #0x24
	mul r1, r0
	ldr r0, [sp, #0x4c]
	add r0, r0, r1
	ldr r0, [r0, #4]
	add r0, #0x71
	ldrb r0, [r0]
	cmp r0, #0x32
	blo _02215326
	ldr r1, [sp, #0x4c]
	ldr r2, [sp, #0xc]
	add r0, r5, #0
	bl ov96_02215478
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
_02215326:
	add r6, sp, #0x20
	mov r4, #0
	add r6, #2
_0221532C:
	mov r0, #0x4c
	add r1, r4, #0
	mul r1, r0
	ldr r0, [sp, #0x48]
	add r1, r0, r1
	add r0, sp, #0x20
	ldrb r2, [r0, r4]
	cmp r2, #4
	beq _0221538E
	ldr r0, [sp, #0xc]
	cmp r0, r2
	bne _02215388
	ldr r0, [sp, #0x14]
	str r0, [sp]
	ldr r0, [sp, #0xc]
	str r0, [sp, #4]
	ldr r2, [r1, #8]
	ldr r7, [r5, #0x34]
	asr r0, r2, #0xb
	lsr r0, r0, #0x14
	add r0, r2, r0
	ldr r2, [r1, #0xc]
	asr r0, r0, #0xc
	asr r1, r2, #0xb
	lsr r1, r1, #0x14
	add r1, r2, r1
	ldr r2, [r5, #0x30]
	asr r1, r1, #0xc
	asr r3, r2, #0xb
	lsr r3, r3, #0x14
	add r3, r2, r3
	asr r2, r3, #0xc
	asr r3, r7, #0xb
	lsr r3, r3, #0x14
	add r3, r7, r3
	asr r3, r3, #0xc
	bl ov96_02215650
	cmp r0, #0
	beq _02215382
	mov r0, #0xc
	strb r0, [r6, r4]
	b _02215392
_02215382:
	mov r0, #0xb
	strb r0, [r6, r4]
	b _02215392
_02215388:
	mov r0, #0xb
	strb r0, [r6, r4]
	b _02215392
_0221538E:
	mov r0, #0xa
	strb r0, [r6, r4]
_02215392:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #2
	blo _0221532C
	add r0, sp, #0x20
	ldrb r2, [r0, #2]
	ldrb r4, [r0, #3]
	cmp r2, #7
	bne _022153AA
	mov r0, #1
	b _022153AC
_022153AA:
	mov r0, #0
_022153AC:
	cmp r4, #7
	bne _022153B4
	mov r1, #1
	b _022153B6
_022153B4:
	mov r1, #0
_022153B6:
	cmp r0, r1
	bne _02215416
	ldr r1, [sp, #0x48]
	add r0, r5, #0
	add r0, #0x30
	add r1, #8
	add r2, sp, #0x24
	bl VEC_Subtract
	add r0, sp, #0x24
	bl VEC_Mag
	ldr r1, [sp, #0x48]
	add r6, r0, #0
	add r0, r5, #0
	add r0, #0x30
	add r1, #0x54
	add r2, sp, #0x24
	bl VEC_Subtract
	add r0, sp, #0x24
	bl VEC_Mag
	cmp r6, r0
	blt _022153FE
	ldr r0, [sp, #0x4c]
	add r2, sp, #0x20
	str r0, [sp]
	ldrb r2, [r2, #2]
	ldr r1, [sp, #0x48]
	ldr r3, [sp, #0xc]
	add r0, r5, #0
	bl ov96_02215460
	add r4, r0, #0
	b _02215442
_022153FE:
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x48]
	str r0, [sp]
	ldr r3, [sp, #0xc]
	add r1, #0x4c
	add r0, r5, #0
	add r2, r4, #0
	str r1, [sp, #0x48]
	bl ov96_02215460
	add r4, r0, #0
	b _02215442
_02215416:
	cmp r2, r4
	blo _0221542C
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x48]
	str r0, [sp]
	ldr r3, [sp, #0xc]
	add r0, r5, #0
	bl ov96_02215460
	add r4, r0, #0
	b _02215442
_0221542C:
	ldr r0, [sp, #0x4c]
	ldr r1, [sp, #0x48]
	str r0, [sp]
	ldr r3, [sp, #0xc]
	add r1, #0x4c
	add r0, r5, #0
	add r2, r4, #0
	str r1, [sp, #0x48]
	bl ov96_02215460
	add r4, r0, #0
_02215442:
	ldr r0, [r5, #0x78]
	cmp r0, #1
	bne _02215458
	mov r0, #1
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	ldr r2, [sp, #0x10]
	mov r3, #6
	bl ov96_021E8228
_02215458:
	add r0, r4, #0
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02215184

	thumb_func_start ov96_02215460
ov96_02215460: ; 0x02215460
	push {r3, lr}
	cmp r2, #0xa
	bne _02215470
	ldr r1, [sp, #8]
	add r2, r3, #0
	bl ov96_02215478
	pop {r3, pc}
_02215470:
	bl ov96_02215058
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_02215460

	thumb_func_start ov96_02215478
ov96_02215478: ; 0x02215478
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp]
	str r2, [sp, #8]
	mov r0, #0
	add r7, sp, #0x10
	str r0, [sp, #0xc]
	strb r0, [r7]
	ldr r0, [sp, #0xc]
	str r1, [sp, #4]
	strb r0, [r7, #1]
	ldr r0, [sp, #0xc]
	strb r0, [r7, #2]
	ldr r0, [sp, #0xc]
	strb r0, [r7, #3]
_02215496:
	ldr r1, [sp, #0xc]
	mov r0, #0x24
	add r2, r1, #0
	mul r2, r0
	ldr r0, [sp, #4]
	mov r4, #0
	add r6, r0, r2
_022154A4:
	lsl r0, r4, #3
	add r0, r6, r0
	ldr r3, [r0, #4]
	mov r0, #0x80
	ldr r2, [r3, #0x30]
	ldr r3, [r3, #0x34]
	asr r5, r2, #0xb
	lsr r5, r5, #0x14
	add r5, r2, r5
	asr r2, r5, #0xc
	asr r5, r3, #0xb
	lsr r5, r5, #0x14
	add r5, r3, r5
	mov r1, #0x60
	asr r3, r5, #0xc
	bl ov96_02215614
	cmp r0, #4
	beq _022154D0
	ldrb r1, [r7, r0]
	add r1, r1, #1
	strb r1, [r7, r0]
_022154D0:
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _022154A4
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	cmp r0, #4
	blo _02215496
	mov r4, #0
	mov r1, #1
	add r0, sp, #0x10
_022154EE:
	add r2, r0, r1
	sub r2, r2, #1
	ldrb r3, [r2]
	ldrb r2, [r0, r1]
	cmp r3, r2
	bls _02215502
	ldr r2, [sp, #8]
	cmp r1, r2
	beq _02215502
	add r4, r1, #0
_02215502:
	add r1, r1, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	cmp r1, #4
	blo _022154EE
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1a
	sub r1, r1, r2
	mov r0, #0x1a
	ror r1, r0
	add r5, r2, r1
	bl LCRandom
	lsr r2, r0, #0x1f
	lsl r1, r0, #0x1b
	sub r1, r1, r2
	mov r0, #0x1b
	ror r1, r0
	add r0, r2, r1
	cmp r4, #3
	bhi _02215594
	add r1, r4, r4
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_0221553C: ; jump table
	.short _02215544 - _0221553C - 2 ; case 0
	.short _0221555A - _0221553C - 2 ; case 1
	.short _0221556E - _0221553C - 2 ; case 2
	.short _02215582 - _0221553C - 2 ; case 3
_02215544:
	mov r1, #0x80
	sub r1, r1, r5
	lsl r2, r1, #0xc
	ldr r1, [sp]
	str r2, [r1, #0x24]
	mov r1, #0x60
	sub r0, r1, r0
	lsl r1, r0, #0xc
	ldr r0, [sp]
	str r1, [r0, #0x28]
	b _02215598
_0221555A:
	add r5, #0x80
	ldr r1, [sp]
	lsl r2, r5, #0xc
	str r2, [r1, #0x24]
	mov r1, #0x60
	sub r0, r1, r0
	lsl r1, r0, #0xc
	ldr r0, [sp]
	str r1, [r0, #0x28]
	b _02215598
_0221556E:
	mov r1, #0x80
	sub r1, r1, r5
	lsl r2, r1, #0xc
	ldr r1, [sp]
	add r0, #0x60
	str r2, [r1, #0x24]
	lsl r1, r0, #0xc
	ldr r0, [sp]
	str r1, [r0, #0x28]
	b _02215598
_02215582:
	add r5, #0x80
	ldr r1, [sp]
	lsl r2, r5, #0xc
	add r0, #0x60
	str r2, [r1, #0x24]
	lsl r1, r0, #0xc
	ldr r0, [sp]
	str r1, [r0, #0x28]
	b _02215598
_02215594:
	bl GF_AssertFail
_02215598:
	mov r0, #0xa
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02215478

	thumb_func_start ov96_022155A0
ov96_022155A0: ; 0x022155A0
	push {r3, r4, r5, lr}
	sub sp, #8
	add r4, r2, #0
	add r2, r1, #0
	add r2, #0x9d
	ldrb r3, [r2]
	add r2, r1, #0
	add r2, #0x99
	ldrb r2, [r2]
	add r2, r3, r2
	lsl r2, r2, #0x18
	lsr r3, r2, #0x18
	add r2, r1, #0
	add r2, #0x9c
	ldrb r2, [r2]
	cmp r2, #0
	beq _022155CC
	cmp r2, #1
	beq _022155E0
	cmp r2, #2
	beq _022155F4
	b _0221560C
_022155CC:
	add r1, #0x90
	ldr r1, [r1]
	str r1, [sp]
	add r1, r3, #0
	ldr r3, [r4, #4]
	bl ov96_02214EB4
	add sp, #8
	str r0, [r4]
	pop {r3, r4, r5, pc}
_022155E0:
	add r1, #0x90
	ldr r1, [r1]
	str r1, [sp]
	add r1, r3, #0
	ldr r3, [r4, #4]
	bl ov96_02214C3C
	add sp, #8
	str r0, [r4]
	pop {r3, r4, r5, pc}
_022155F4:
	add r5, r1, #0
	add r5, #0x90
	ldr r5, [r5]
	str r5, [sp]
	str r1, [sp, #4]
	add r1, r3, #0
	ldr r3, [r4, #4]
	bl ov96_02215184
	add sp, #8
	str r0, [r4]
	pop {r3, r4, r5, pc}
_0221560C:
	bl GF_AssertFail
	add sp, #8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_022155A0

	thumb_func_start ov96_02215614
ov96_02215614: ; 0x02215614
	push {r3, lr}
	cmp r2, r0
	bge _02215622
	cmp r3, r1
	bge _02215622
	mov r0, #0
	pop {r3, pc}
_02215622:
	cmp r2, r0
	blt _0221562E
	cmp r3, r1
	bge _0221562E
	mov r0, #1
	pop {r3, pc}
_0221562E:
	cmp r2, r0
	bge _0221563A
	cmp r3, r1
	blt _0221563A
	mov r0, #2
	pop {r3, pc}
_0221563A:
	cmp r2, r0
	blt _02215646
	cmp r3, r1
	blt _02215646
	mov r0, #3
	pop {r3, pc}
_02215646:
	bl GF_AssertFail
	mov r0, #4
	pop {r3, pc}
	.balign 4, 0
	thumb_func_end ov96_02215614

	thumb_func_start ov96_02215650
ov96_02215650: ; 0x02215650
	push {r3, lr}
	bl ov96_02215614
	ldr r1, _02215678 ; =0xFFFFFFF8
	add r1, sp
	ldrb r3, [r1, #0x14]
	ldrb r2, [r1, #0x10]
	cmp r3, r2
	beq _0221566A
	mov r1, #3
	sub r1, r1, r2
	lsl r1, r1, #0x18
	lsr r3, r1, #0x18
_0221566A:
	cmp r0, r3
	bne _02215672
	mov r0, #1
	pop {r3, pc}
_02215672:
	mov r0, #0
	pop {r3, pc}
	nop
_02215678: .word 0xFFFFFFF8
	thumb_func_end ov96_02215650

	thumb_func_start ov96_0221567C
ov96_0221567C: ; 0x0221567C
	push {r3, lr}
	bl ov96_02215614
	ldr r1, _022156A4 ; =0xFFFFFFF8
	add r1, sp
	ldrb r2, [r1, #0x14]
	ldrb r1, [r1, #0x10]
	cmp r2, r1
	bne _0221569E
	mov r1, #3
	sub r1, r1, r2
	cmp r1, r0
	beq _0221569A
	mov r0, #1
	pop {r3, pc}
_0221569A:
	mov r0, #0
	pop {r3, pc}
_0221569E:
	mov r0, #0
	pop {r3, pc}
	nop
_022156A4: .word 0xFFFFFFF8
	thumb_func_end ov96_0221567C

	thumb_func_start ov96_022156A8
ov96_022156A8: ; 0x022156A8
	push {r4, r5, r6, r7}
	mov r7, #0
	add r3, r7, #0
	add r4, r7, #0
	sub r3, #8
	sub r4, #8
_022156B4:
	lsl r5, r7, #2
	add r6, r2, r5
	ldrh r5, [r2, r5]
	ldrh r6, [r6, #2]
	sub r5, r0, r5
	sub r6, r1, r6
	cmp r5, r4
	blt _022156D6
	cmp r5, #8
	bgt _022156D6
	cmp r6, r3
	blt _022156D6
	cmp r6, #8
	bgt _022156D6
	mov r0, #1
	pop {r4, r5, r6, r7}
	bx lr
_022156D6:
	add r5, r7, #1
	lsl r5, r5, #0x18
	lsr r7, r5, #0x18
	cmp r7, #3
	blo _022156B4
	mov r0, #0
	pop {r4, r5, r6, r7}
	bx lr
	.balign 4, 0
	thumb_func_end ov96_022156A8

	thumb_func_start ov96_022156E8
ov96_022156E8: ; 0x022156E8
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r1, r2, #0
	add r2, sp, #0
	add r4, r3, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	add r1, r5, r4
	cmp r0, r1
	bge _0221570A
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, pc}
_0221570A:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	thumb_func_end ov96_022156E8

	thumb_func_start ov96_02215710
ov96_02215710: ; 0x02215710
	push {r3, r4, r5, r6, r7, lr}
	add r5, r1, #0
	add r7, r0, #0
	ldr r0, [r5, #0x18]
	cmp r0, #0
	bne _02215720
	mov r1, #1
	b _02215724
_02215720:
	mov r1, #0
	mvn r1, r1
_02215724:
	ldr r0, [r5, #0xc]
	asr r0, r0, #0xc
	add r6, r0, #0
	mul r6, r1
	lsr r0, r6, #0x1f
	add r0, r6, r0
	asr r4, r0, #1
	mov r0, #0x14
	ldrsb r0, [r5, r0]
	mov r1, #3
	bl _s32_div_f
	cmp r1, #0
	beq _0221574A
	cmp r1, #1
	beq _02215752
	cmp r1, #2
	beq _0221575A
	b _02215756
_0221574A:
	mov r0, #0
	mvn r0, r0
	mul r4, r0
	b _0221575A
_02215752:
	mov r4, #0
	b _0221575A
_02215756:
	bl GF_AssertFail
_0221575A:
	mov r1, #0
	ldr r0, [r5, #4]
	add r2, r1, #0
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #1
	mov r2, #0
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #2
	mov r2, #0
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #3
	mov r2, #0
	add r3, r4, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #0
	mov r2, #3
	add r3, r6, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #1
	mov r2, #3
	add r3, r6, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #2
	mov r2, #3
	add r3, r6, #0
	bl sub_0201F238
	mov r1, #3
	ldr r0, [r5, #4]
	add r2, r1, #0
	add r3, r6, #0
	bl sub_0201F238
	ldr r0, [r5]
	bl sub_0200CF6C
	lsl r1, r4, #0xc
	lsl r2, r6, #0xc
	bl sub_02009FA8
	ldr r1, [r5, #0xc]
	ldr r0, [r5, #0x10]
	sub r0, r1, r0
	str r0, [r5, #0xc]
	ldr r1, [r5, #0x18]
	mov r0, #1
	eor r0, r1
	str r0, [r5, #0x18]
	mov r0, #0x14
	ldrsb r1, [r5, r0]
	add r1, r1, #1
	strb r1, [r5, #0x14]
	ldrsb r1, [r5, r0]
	ldrb r0, [r5, #0x15]
	cmp r1, r0
	blt _02215860
	mov r1, #0
	ldr r0, [r5, #4]
	add r2, r1, #0
	add r3, r1, #0
	bl sub_0201F238
	mov r2, #0
	ldr r0, [r5, #4]
	mov r1, #1
	add r3, r2, #0
	bl sub_0201F238
	mov r2, #0
	ldr r0, [r5, #4]
	mov r1, #2
	add r3, r2, #0
	bl sub_0201F238
	mov r2, #0
	ldr r0, [r5, #4]
	mov r1, #3
	add r3, r2, #0
	bl sub_0201F238
	mov r1, #0
	ldr r0, [r5, #4]
	mov r2, #3
	add r3, r1, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #1
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	ldr r0, [r5, #4]
	mov r1, #2
	mov r2, #3
	mov r3, #0
	bl sub_0201F238
	mov r1, #3
	ldr r0, [r5, #4]
	add r2, r1, #0
	mov r3, #0
	bl sub_0201F238
	ldr r0, [r5]
	bl sub_0200CF6C
	mov r1, #0
	add r2, r1, #0
	bl sub_02009FA8
	mov r0, #0
	str r0, [r5, #8]
	add r0, r7, #0
	bl sub_0200E390
_02215860:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02215710

	thumb_func_start ov96_02215864
ov96_02215864: ; 0x02215864
	push {r4, lr}
	add r4, r0, #0
	bne _0221586E
	bl GF_AssertFail
_0221586E:
	ldr r0, [r4, #8]
	cmp r0, #0
	bne _02215878
	mov r0, #1
	pop {r4, pc}
_02215878:
	mov r0, #0
	pop {r4, pc}
	thumb_func_end ov96_02215864

	thumb_func_start ov96_0221587C
ov96_0221587C: ; 0x0221587C
	str r1, [r0, #4]
	str r2, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0221587C

	thumb_func_start ov96_02215884
ov96_02215884: ; 0x02215884
	push {r4, r5, r6, lr}
	add r5, r0, #0
	ldr r0, [r5, #4]
	add r6, r1, #0
	add r4, r2, #0
	cmp r0, #0
	bne _02215896
	bl GF_AssertFail
_02215896:
	ldr r0, [r5]
	cmp r0, #0
	bne _022158A0
	bl GF_AssertFail
_022158A0:
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _022158AA
	bl sub_0200E390
_022158AA:
	mov r0, #0
	str r0, [r5, #0x18]
	strb r0, [r5, #0x14]
	strb r4, [r5, #0x15]
	lsl r0, r6, #0xc
	str r0, [r5, #0xc]
	strb r6, [r5, #0x16]
	lsl r1, r4, #0xc
	bl FX_Div
	str r0, [r5, #0x10]
	ldr r0, _022158D0 ; =ov96_02215710
	add r1, r5, #0
	mov r2, #2
	bl sub_0200E320
	str r0, [r5, #8]
	pop {r4, r5, r6, pc}
	nop
_022158D0: .word ov96_02215710
	thumb_func_end ov96_02215884

	thumb_func_start ov96_022158D4
ov96_022158D4: ; 0x022158D4
	cmp r0, #0x68
	blt _022158E8
	cmp r0, #0xa0
	bge _022158E8
	cmp r1, #0
	blt _022158E8
	cmp r1, #0x20
	bge _022158E8
	mov r0, #1
	bx lr
_022158E8:
	mov r0, #0
	bx lr
	thumb_func_end ov96_022158D4

	thumb_func_start ov96_022158EC
ov96_022158EC: ; 0x022158EC
	push {r3, r4, lr}
	sub sp, #0xc
	add r3, r0, #0
	add r4, r2, #0
	add r0, r1, #0
	add r1, r3, #0
	add r2, sp, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	cmp r0, r4
	bgt _0221590E
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_0221590E:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	thumb_func_end ov96_022158EC

	thumb_func_start ov96_02215914
ov96_02215914: ; 0x02215914
	ldr r2, [r0]
	cmp r2, #0
	beq _02215940
	bge _02215920
	neg r3, r2
	b _02215922
_02215920:
	add r3, r2, #0
_02215922:
	cmp r3, r1
	bge _0221592C
	mov r1, #0
	str r1, [r0]
	bx lr
_0221592C:
	cmp r2, #0
	ble _02215934
	mov r2, #1
	b _02215938
_02215934:
	mov r2, #0
	mvn r2, r2
_02215938:
	ldr r3, [r0]
	mul r2, r1
	sub r1, r3, r2
	str r1, [r0]
_02215940:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02215914

	thumb_func_start ov96_02215944
ov96_02215944: ; 0x02215944
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r2, #0
	bl ov96_02215914
	add r0, r5, #4
	add r1, r4, #0
	bl ov96_02215914
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02215944

	thumb_func_start ov96_02215958
ov96_02215958: ; 0x02215958
	ldr r2, [r0]
	neg r3, r1
	cmp r2, #0
	ble _02215968
	cmp r2, r1
	ble _0221596E
	str r1, [r0]
	b _0221596E
_02215968:
	cmp r2, r3
	bge _0221596E
	str r3, [r0]
_0221596E:
	ldr r2, [r0, #4]
	cmp r2, #0
	ble _0221597C
	cmp r2, r1
	ble _02215982
	str r1, [r0, #4]
	bx lr
_0221597C:
	cmp r2, r3
	bge _02215982
	str r3, [r0, #4]
_02215982:
	bx lr
	thumb_func_end ov96_02215958

	thumb_func_start ov96_02215984
ov96_02215984: ; 0x02215984
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	ldrb r1, [r4]
	cmp r1, #0
	beq _022159A0
	cmp r1, #1
	beq _022159BC
	cmp r1, #2
	beq _022159CC
	b _022159E0
_022159A0:
	mov r1, #6
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	ldr r0, [r0]
	ldr r3, _022159EC ; =0x00007FFF
	str r0, [sp, #8]
	mov r0, #0
	add r2, r1, #0
	bl sub_0200FA24
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
_022159BC:
	bl sub_0200FB5C
	cmp r0, #0
	beq _022159E4
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _022159E4
_022159CC:
	add r0, r5, #0
	bl ov96_021E637C
	cmp r0, #0
	beq _022159E4
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5FC8
	b _022159E4
_022159E0:
	bl GF_AssertFail
_022159E4:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, pc}
	nop
_022159EC: .word 0x00007FFF
	thumb_func_end ov96_02215984

	thumb_func_start ov96_022159F0
ov96_022159F0: ; 0x022159F0
	push {r3, r4, r5, r6, lr}
	sub sp, #0xc
	add r4, r1, #0
	add r5, r0, #0
	bl ov96_021E5DC4
	add r6, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	beq _02215A0A
	cmp r0, #1
	beq _02215A22
	b _02215A60
_02215A0A:
	add r0, r5, #0
	bl ov96_02215FC8
	add r0, r5, #0
	bl ov96_02216234
	cmp r0, #0
	beq _02215A64
	ldrb r0, [r4]
	add r0, r0, #1
	strb r0, [r4]
	b _02215A64
_02215A22:
	add r0, r5, #0
	bl ov96_02215FC8
	add r0, r5, #0
	bl ov96_021E667C
	cmp r0, #0
	beq _02215A64
	ldr r0, _02215A6C ; =0x000007F8
	add r0, r6, r0
	bl ov96_02215864
	cmp r0, #0
	beq _02215A64
	mov r0, #6
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6]
	str r0, [sp, #8]
	mov r0, #0
	add r1, r0, #0
	add r2, r0, #0
	add r3, r0, #0
	bl sub_0200FA24
	add r0, r5, #0
	mov r1, #2
	bl ov96_021E5FC8
	b _02215A64
_02215A60:
	bl GF_AssertFail
_02215A64:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, r5, r6, pc}
	nop
_02215A6C: .word 0x000007F8
	thumb_func_end ov96_022159F0

	thumb_func_start ov96_02215A70
ov96_02215A70: ; 0x02215A70
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r6, r0, #0
	bl ov96_021E5DC4
	add r5, r0, #0
	ldrb r0, [r4]
	cmp r0, #0
	bne _02215ABC
	bl sub_0200FB5C
	cmp r0, #0
	beq _02215AC0
	add r0, r6, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02215AB8
	mov r0, #0x81
	lsl r0, r0, #2
	mov r4, #0
	add r5, r5, r0
_02215A9C:
	ldr r2, [r5]
	lsl r1, r4, #0x18
	lsl r2, r2, #0x14
	lsr r2, r2, #0x14
	lsl r2, r2, #0x10
	add r0, r6, #0
	lsr r1, r1, #0x18
	lsr r2, r2, #0x10
	bl ov96_021E5FB0
	add r4, r4, #1
	add r5, #0xa8
	cmp r4, #4
	blt _02215A9C
_02215AB8:
	mov r0, #1
	pop {r4, r5, r6, pc}
_02215ABC:
	bl GF_AssertFail
_02215AC0:
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02215A70

	thumb_func_start ov96_02215AC4
ov96_02215AC4: ; 0x02215AC4
	push {r3, r4, r5, r6, lr}
	sub sp, #0x14
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r5, #0
	bl ov96_021E5DD4
	cmp r0, #4
	bls _02215ADC
	b _02215CA0
_02215ADC:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02215AE8: ; jump table
	.short _02215AF2 - _02215AE8 - 2 ; case 0
	.short _02215B5C - _02215AE8 - 2 ; case 1
	.short _02215B94 - _02215AE8 - 2 ; case 2
	.short _02215BC8 - _02215AE8 - 2 ; case 3
	.short _02215C0A - _02215AE8 - 2 ; case 4
_02215AF2:
	mov r2, #6
	mov r0, #0x5c
	mov r1, #0x91
	lsl r2, r2, #0x10
	bl sub_0201A910
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	bl sub_02022C54
	bl sub_02022CBC
	mov r2, #1
	lsl r2, r2, #0x1a
	ldr r1, [r2]
	ldr r0, _02215CAC ; =0xFFFFE0FF
	and r1, r0
	str r1, [r2]
	ldr r2, _02215CB0 ; =0x04001000
	ldr r1, [r2]
	and r0, r1
	str r0, [r2]
	bl ov96_02215FA8
	ldr r0, _02215CB4 ; =gMain + 0x60
	mov r1, #1
	strb r1, [r0, #9]
	bl sub_02022D3C
	ldr r1, _02215CB8 ; =0x00000814
	add r0, r5, #0
	bl ov96_021E5D94
	ldr r2, _02215CB8 ; =0x00000814
	mov r1, #0
	add r4, r0, #0
	bl MIi_CpuFill8
	mov r0, #0x91
	str r0, [r4]
	ldr r1, _02215CBC ; =0x00000708
	ldr r0, _02215CC0 ; =0x00000438
	str r1, [r4, r0]
	add r0, r5, #0
	bl ov96_021E5DEC
	b _02215CA4
_02215B5C:
	ldr r0, [r4]
	bl sub_0201AC88
	str r0, [r4, #4]
	add r0, r5, #0
	mov r1, #8
	bl ov96_021E6670
	add r0, r4, #0
	bl ov96_0221654C
	add r0, r4, #0
	bl ov96_0221663C
	add r0, r4, #0
	bl ov96_022193E4
	add r0, r4, #0
	bl ov96_022162F4
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_02217AE4
	add r0, r5, #0
	bl ov96_021E5DEC
	b _02215CA4
_02215B94:
	ldr r0, [r4, #0x1c]
	bl ov96_021EAA00
	cmp r0, #0
	bne _02215BA0
	b _02215CA4
_02215BA0:
	add r0, r4, #0
	bl ov96_022163AC
	ldr r0, [r4, #0xc]
	bl sub_0200E2B0
	add r3, r0, #0
	ldr r2, [r4, #0x18]
	add r0, r5, #0
	mov r1, #0
	bl ov96_021E61D8
	ldr r0, [r0]
	mov r1, #0
	bl sub_02024ADC
	add r0, r5, #0
	bl ov96_021E5DEC
	b _02215CA4
_02215BC8:
	add r0, r5, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	ldr r1, [r4]
	add r0, r5, #0
	bl ov96_02219F7C
	mov r1, #0x61
	lsl r1, r1, #2
	str r0, [r4, r1]
	ldr r0, [r4, #0x14]
	str r0, [sp]
	ldr r0, [r4, #0x10]
	str r0, [sp, #4]
	str r6, [sp, #8]
	ldr r0, [r4]
	str r0, [sp, #0xc]
	str r5, [sp, #0x10]
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	ldr r2, [r4, #0x18]
	ldr r3, [r4, #4]
	bl ov96_022194C4
	mov r1, #6
	lsl r1, r1, #6
	str r0, [r4, r1]
	add r0, r5, #0
	bl ov96_021E5DEC
	b _02215CA4
_02215C0A:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_02217B84
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	bl ov96_022195C8
	ldr r0, [r4, #0x1c]
	mov r3, #6
	str r0, [sp]
	ldr r0, [r4]
	lsl r3, r3, #6
	str r0, [sp, #4]
	ldr r0, _02215CC4 ; =0x0000043C
	ldr r1, [r4, #8]
	ldr r2, [r4, #0xc]
	ldr r3, [r4, r3]
	add r0, r4, r0
	bl ov96_02217544
	ldr r0, [r4, #4]
	bl ov96_021E6030
	ldr r0, _02215CC8 ; =0x000007F8
	ldr r1, [r4, #4]
	ldr r2, [r4, #8]
	add r0, r4, r0
	bl ov96_0221587C
	add r0, r5, #0
	mov r1, #1
	bl ov96_021E5DFC
	add r0, r5, #0
	bl ov96_021E5F24
	cmp r0, #0
	bne _02215C84
	add r0, r5, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	ldr r2, [r0, #0x20]
	ldr r1, _02215CCC ; =0xFFF80007
	and r1, r2
	ldr r2, _02215CC0 ; =0x00000438
	ldr r2, [r4, r2]
	lsl r2, r2, #0x10
	lsr r2, r2, #0xd
	orr r1, r2
	str r1, [r0, #0x20]
	mov r0, #0x62
	lsl r0, r0, #2
	add r0, r4, r0
	add r1, r5, #0
	bl ov96_02218330
_02215C84:
	mov r0, #2
	bl sub_0203A994
	mov r0, #0x10
	mov r1, #1
	bl GX_EngineAToggleLayers
	mov r0, #0x10
	mov r1, #1
	bl sub_02022CC8
	add sp, #0x14
	mov r0, #1
	pop {r3, r4, r5, r6, pc}
_02215CA0:
	bl GF_AssertFail
_02215CA4:
	mov r0, #0
	add sp, #0x14
	pop {r3, r4, r5, r6, pc}
	nop
_02215CAC: .word 0xFFFFE0FF
_02215CB0: .word 0x04001000
_02215CB4: .word gMain + 0x60
_02215CB8: .word 0x00000814
_02215CBC: .word 0x00000708
_02215CC0: .word 0x00000438
_02215CC4: .word 0x0000043C
_02215CC8: .word 0x000007F8
_02215CCC: .word 0xFFF80007
	thumb_func_end ov96_02215AC4

	thumb_func_start ov96_02215CD0
ov96_02215CD0: ; 0x02215CD0
	push {r4, lr}
	bl ov96_021E5DC4
	add r4, r0, #0
	bne _02215CDE
	bl GF_AssertFail
_02215CDE:
	ldr r0, [r4, #0xc]
	bl sub_0200D020
	mov r0, #1
	pop {r4, pc}
	thumb_func_end ov96_02215CD0

	thumb_func_start ov96_02215CE8
ov96_02215CE8: ; 0x02215CE8
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	bl ov96_021E6040
	add r6, r0, #0
	bl ov96_021E9510
	mov r4, #0
	add r7, r4, #0
_02215CFC:
	lsl r1, r4, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021E5FBC
	add r3, r0, #0
	str r7, [sp]
	mov r0, #3
	str r0, [sp, #4]
	ldr r0, _02215D48 ; =0x0000012A
	add r1, r6, #0
	str r0, [sp, #8]
	add r0, r5, #0
	add r2, r4, #0
	bl ov96_021E95F8
	add r4, r4, #1
	cmp r4, #4
	blt _02215CFC
	add r0, r6, #0
	mov r1, #1
	bl ov96_021E93B4
	add r0, r6, #0
	mov r1, #7
	bl ov96_0221A56C
	add r0, r6, #0
	bl ov96_021E952C
	add r0, r6, #0
	mov r1, #7
	bl ov96_021E9570
	mov r0, #1
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	nop
_02215D48: .word 0x0000012A
	thumb_func_end ov96_02215CE8

	thumb_func_start ov96_02215D4C
ov96_02215D4C: ; 0x02215D4C
	push {r3, r4, r5, lr}
	add r5, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	mov r0, #0x61
	lsl r0, r0, #2
	ldr r0, [r4, r0]
	bl ov96_02219FDC
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	bl ov96_022195E8
	ldr r0, _02215DB4 ; =0x0000043C
	add r0, r4, r0
	bl ov96_022177D8
	add r0, r4, #0
	bl ov96_02217DBC
	add r0, r4, #0
	bl ov96_02216390
	add r0, r4, #0
	bl ov96_022165FC
	bl sub_0203A914
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A0FC
	mov r0, #0
	add r1, r0, #0
	bl sub_0201A120
	add r0, r5, #0
	bl ov96_021E5DAC
	ldr r0, _02215DB8 ; =gMain + 0x60
	mov r1, #0
	strb r1, [r0, #9]
	bl sub_02022D3C
	mov r0, #0x91
	bl sub_0201A9C4
	mov r0, #1
	pop {r3, r4, r5, pc}
	nop
_02215DB4: .word 0x0000043C
_02215DB8: .word gMain + 0x60
	thumb_func_end ov96_02215D4C

	thumb_func_start ov96_02215DBC
ov96_02215DBC: ; 0x02215DBC
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x6e
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215DBC

	thumb_func_start ov96_02215DD4
ov96_02215DD4: ; 0x02215DD4
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0x69
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r4
	add r0, r1, r0
	add r0, #0x2c
	pop {r4, pc}
	thumb_func_end ov96_02215DD4

	thumb_func_start ov96_02215DEC
ov96_02215DEC: ; 0x02215DEC
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r1, #0
	add r4, r2, #0
	bl ov96_021E5DC4
	mov r1, #0x69
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r5
	add r2, r1, r0
	add r0, sp, #4
	str r0, [sp]
	ldr r0, [r2, #4]
	ldr r1, [r2, #0x2c]
	ldr r2, [r2, #0x30]
	ldr r0, [r0]
	asr r1, r1, #0xc
	asr r2, r2, #0xc
	add r3, sp, #8
	bl ov96_021EB06C
	ldr r0, [sp, #8]
	lsl r0, r0, #0xc
	str r0, [r4]
	ldr r0, [sp, #4]
	lsl r0, r0, #0xc
	str r0, [r4, #4]
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02215DEC

	thumb_func_start ov96_02215E2C
ov96_02215E2C: ; 0x02215E2C
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x81
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r0, r0, #0xc
	lsr r0, r0, #0x1c
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215E2C

	thumb_func_start ov96_02215E48
ov96_02215E48: ; 0x02215E48
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x6a
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	ldr r0, [r0, #8]
	asr r0, r0, #0xc
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215E48

	thumb_func_start ov96_02215E68
ov96_02215E68: ; 0x02215E68
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x6a
	lsl r0, r0, #2
	ldr r1, [r1, r0]
	ldr r0, [r1, #8]
	ldr r1, [r1, #4]
	ldr r1, [r1, #8]
	bl FX_Div
	mov r1, #0x64
	mul r1, r0
	asr r0, r1, #0xc
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215E68

	thumb_func_start ov96_02215E94
ov96_02215E94: ; 0x02215E94
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x81
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215E94

	thumb_func_start ov96_02215EB0
ov96_02215EB0: ; 0x02215EB0
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0xa8
	mul r1, r4
	add r1, r0, r1
	mov r0, #0x81
	lsl r0, r0, #2
	ldr r0, [r1, r0]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215EB0

	thumb_func_start ov96_02215ECC
ov96_02215ECC: ; 0x02215ECC
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0x69
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r4
	add r0, r1, r0
	bl ov96_02218688
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215ECC

	thumb_func_start ov96_02215EE8
ov96_02215EE8: ; 0x02215EE8
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	add r7, r0, #0
	mov r0, #0xa8
	add r5, r4, #0
	mul r5, r0
	mov r0, #0x81
	lsl r0, r0, #2
	add r4, r7, r0
	ldr r0, [r4, r5]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _02215F0C
	bl GF_AssertFail
_02215F0C:
	mov r0, #1
	ldr r1, [r4, r5]
	lsl r0, r0, #0x1e
	orr r0, r1
	str r0, [r4, r5]
	mov r0, #0
	ldrsh r1, [r6, r0]
	mov r0, #7
	add r2, r7, r5
	lsl r0, r0, #6
	strh r1, [r2, r0]
	mov r1, #2
	ldrsh r1, [r6, r1]
	add r0, r0, #2
	strh r1, [r2, r0]
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02215EE8

	thumb_func_start ov96_02215F2C
ov96_02215F2C: ; 0x02215F2C
	push {r4, r5, r6, lr}
	add r6, r1, #0
	bl ov96_021E5DC4
	mov r1, #0x81
	lsl r1, r1, #2
	add r5, r0, r1
	mov r0, #0xa8
	add r4, r6, #0
	mul r4, r0
	ldr r0, [r5, r4]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _02215F4C
	bl GF_AssertFail
_02215F4C:
	ldr r0, [r5, r4]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _02215F58
	bl GF_AssertFail
_02215F58:
	mov r0, #2
	ldr r1, [r5, r4]
	lsl r0, r0, #0x1c
	orr r0, r1
	str r0, [r5, r4]
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02215F2C

	thumb_func_start ov96_02215F64
ov96_02215F64: ; 0x02215F64
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0x69
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r4
	add r0, r1, r0
	bl ov96_0221910C
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02215F64

	thumb_func_start ov96_02215F80
ov96_02215F80: ; 0x02215F80
	push {r3, r4, r5, lr}
	add r5, r1, #0
	add r4, r2, #0
	bl ov96_021E5DC4
	mov r1, #0x69
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r5
	add r0, r1, r0
	add r1, r4, #0
	bl ov96_022186B8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02215F80

	thumb_func_start ov96_02215FA0
ov96_02215FA0: ; 0x02215FA0
	ldr r3, _02215FA4 ; =ov96_022186CC
	bx r3
	.balign 4, 0
_02215FA4: .word ov96_022186CC
	thumb_func_end ov96_02215FA0

	thumb_func_start ov96_02215FA8
ov96_02215FA8: ; 0x02215FA8
	push {r4, lr}
	sub sp, #0x28
	ldr r4, _02215FC4 ; =0x0221D774
	add r3, sp, #0
	mov r2, #5
_02215FB2:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02215FB2
	add r0, sp, #0
	bl GX_SetBanks
	add sp, #0x28
	pop {r4, pc}
	.balign 4, 0
_02215FC4: .word 0x0221D774
	thumb_func_end ov96_02215FA8

	thumb_func_start ov96_02215FC8
ov96_02215FC8: ; 0x02215FC8
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	str r0, [sp]
	bl ov96_021E5DC4
	str r0, [sp, #0xc]
	ldr r0, [sp]
	bl ov96_021E5F54
	str r0, [sp, #4]
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #8]
	ldr r0, [sp]
	bl ov96_021E5F24
	cmp r0, #0
	beq _02215FF0
	b _022161C4
_02215FF0:
	ldr r0, [sp, #8]
	ldr r0, [r0, #0x20]
	lsr r0, r0, #0x1f
	beq _0221600A
	mov r1, #0x62
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r1, [sp]
	bl ov96_02218330
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
_0221600A:
	ldr r1, _022161D4 ; =0x00000438
	ldr r0, [sp, #0xc]
	ldr r0, [r0, r1]
	cmp r0, #0
	ble _02216032
	sub r2, r0, #1
	ldr r0, [sp, #0xc]
	str r2, [r0, r1]
	ldr r0, [sp, #8]
	ldr r2, [r0, #0x20]
	ldr r0, _022161D8 ; =0xFFF80007
	and r2, r0
	ldr r0, [sp, #0xc]
	ldr r0, [r0, r1]
	add r1, r2, #0
	lsl r0, r0, #0x10
	lsr r0, r0, #0xd
	orr r1, r0
	ldr r0, [sp, #8]
	str r1, [r0, #0x20]
_02216032:
	ldr r0, [sp, #4]
	add r0, #0x50
	bl ov96_021E8A20
	add r4, r0, #0
	ldr r0, [sp, #4]
	bl ov96_021E8A20
	add r3, r0, #0
	mov r2, #4
_02216046:
	ldmia r3!, {r0, r1}
	stmia r4!, {r0, r1}
	sub r2, r2, #1
	bne _02216046
	ldr r0, [r3]
	mov r1, #0x66
	str r0, [r4]
	mov r0, #0
	str r0, [sp, #0x10]
	ldr r0, [sp, #4]
	lsl r1, r1, #2
	add r0, #0x50
	str r0, [sp, #4]
	ldr r0, [sp, #0xc]
	add r6, r0, r1
_02216064:
	ldr r0, [sp, #4]
	bl ov96_021E8A20
	add r7, r0, #0
	ldr r0, [r7]
	add r4, r6, #0
	add r5, r6, #0
	lsl r0, r0, #0xf
	add r4, #8
	add r5, #0xc
	lsr r0, r0, #0x1f
	beq _022160E0
	ldr r0, [r4]
	lsl r1, r0, #0x11
	lsr r1, r1, #0x1f
	beq _02216092
	lsl r2, r0, #0x10
	lsr r2, r2, #0x1f
	beq _02216092
	ldr r1, _022161DC ; =0xFFFFBFFF
	and r0, r1
	str r0, [r4]
	b _022160BA
_02216092:
	cmp r1, #0
	bne _022160BA
	ldr r1, [r4]
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	bne _022160BA
	mov r0, #1
	lsl r0, r0, #0xe
	orr r1, r0
	lsl r0, r0, #1
	orr r0, r1
	str r0, [r4]
	ldr r0, [r7]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	strh r0, [r6, #4]
	ldr r0, [r7]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x18
	strh r0, [r6, #6]
_022160BA:
	ldr r0, [r7]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	strh r0, [r6]
	ldr r0, [r7]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x18
	strh r0, [r6, #2]
	ldr r1, [r4]
	ldr r0, _022161E0 ; =0xFFFFC000
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x12
	add r2, r1, #1
	ldr r1, _022161E4 ; =0x00003FFF
	and r1, r2
	orr r0, r1
	str r0, [r4]
	b _02216104
_022160E0:
	ldr r1, [r4]
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	beq _02216104
	ldr r0, _022161E8 ; =0xE000FFFF
	and r0, r1
	lsl r1, r1, #0x12
	lsr r1, r1, #0x12
	lsl r1, r1, #0x13
	lsr r1, r1, #3
	orr r1, r0
	ldr r0, _022161E0 ; =0xFFFFC000
	and r1, r0
	sub r0, r0, #1
	and r1, r0
	ldr r0, _022161EC ; =0xFFFF7FFF
	and r0, r1
	str r0, [r4]
_02216104:
	mov r0, #0
	mov r1, #2
	ldrsh r0, [r6, r0]
	ldrsh r1, [r6, r1]
	bl ov96_022158D4
	add r2, r0, #0
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_02219460
	ldr r0, [r5, #0x60]
	lsl r1, r0, #5
	lsr r1, r1, #0x1f
	beq _02216172
	lsl r0, r0, #6
	lsr r1, r0, #0x1e
	cmp r1, #1
	bne _02216150
	ldr r0, [r7]
	lsl r0, r0, #0xd
	lsr r0, r0, #0x1e
	cmp r0, #1
	bne _02216150
	add r0, r5, #0
	bl ov96_02219398
	add r0, r5, #0
	bl ov96_02218A68
	ldr r1, [r5, #0x60]
	ldr r0, _022161F0 ; =0xFCFFFFFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x18
	orr r0, r1
	str r0, [r5, #0x60]
	b _02216172
_02216150:
	cmp r1, #2
	bne _02216172
	ldr r0, [r7]
	lsl r0, r0, #0xd
	lsr r0, r0, #0x1e
	cmp r0, #2
	bne _02216172
	ldr r1, [r5, #0x60]
	ldr r0, _022161F4 ; =0xFBFFFFFF
	and r1, r0
	ldr r0, _022161F0 ; =0xFCFFFFFF
	and r0, r1
	str r0, [r5, #0x60]
	add r0, r5, #0
	mov r1, #4
	bl ov96_02218578
_02216172:
	ldr r0, [sp, #4]
	add r6, #0xa8
	add r0, #0x28
	str r0, [sp, #4]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	bge _02216186
	b _02216064
_02216186:
	mov r1, #0x61
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	ldr r0, [r0, r1]
	bl ov96_02219FE4
	mov r1, #0x66
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r1, [sp]
	bl ov96_022180CC
	ldr r0, [sp, #8]
	ldr r1, [r0, #0x20]
	lsl r0, r1, #0xd
	lsr r0, r0, #0x10
	bne _022161B6
	ldr r0, _022161F8 ; =0x7FFFFFFF
	and r1, r0
	add r0, r0, #1
	orr r1, r0
	ldr r0, [sp, #8]
	str r1, [r0, #0x20]
_022161B6:
	mov r1, #0x62
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	add r0, r0, r1
	ldr r1, [sp]
	bl ov96_02218330
_022161C4:
	ldr r1, _022161FC ; =0x0000043C
	ldr r0, [sp, #0xc]
	add r0, r0, r1
	ldr r1, [sp]
	bl ov96_0221768C
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022161D4: .word 0x00000438
_022161D8: .word 0xFFF80007
_022161DC: .word 0xFFFFBFFF
_022161E0: .word 0xFFFFC000
_022161E4: .word 0x00003FFF
_022161E8: .word 0xE000FFFF
_022161EC: .word 0xFFFF7FFF
_022161F0: .word 0xFCFFFFFF
_022161F4: .word 0xFBFFFFFF
_022161F8: .word 0x7FFFFFFF
_022161FC: .word 0x0000043C
	thumb_func_end ov96_02215FC8

	thumb_func_start ov96_02216200
ov96_02216200: ; 0x02216200
	push {r3, r4, r5, lr}
	add r4, r0, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	add r0, r4, #0
	bl ov96_021E5DC4
	mov r1, #6
	lsl r1, r1, #6
	ldr r0, [r0, r1]
	bl ov96_0221978C
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_021E8318
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_022193F8
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02216200

	thumb_func_start ov96_02216234
ov96_02216234: ; 0x02216234
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	add r0, r6, #0
	bl ov96_021E5F54
	add r7, r0, #0
	bl ov96_021E8A20
	add r7, #0xf0
	add r5, r0, #0
	add r0, r7, #0
	bl ov96_021E8A20
	ldr r0, [r0, #0x20]
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _02216282
	ldr r0, _022162E0 ; =0x0000043C
	add r0, r4, r0
	bl ov96_02217820
	ldr r0, [r4, #0x1c]
	mov r1, #1
	bl ov96_021EB144
	mov r0, #6
	lsl r0, r0, #6
	ldr r0, [r4, r0]
	bl ov96_0221964C
	ldr r1, _022162E4 ; =ov96_02216200
	add r0, r6, #0
	bl ov96_021E8324
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02216282:
	bl sub_02025358
	cmp r0, #0
	beq _022162A4
	add r0, r6, #0
	bl ov96_021E5F24
	add r1, r0, #0
	mov r0, #1
	lsl r1, r1, #0x18
	str r0, [sp]
	add r0, r6, #0
	lsr r1, r1, #0x18
	mov r2, #3
	mov r3, #0
	bl ov96_021E8228
_022162A4:
	bl sub_0202534C
	cmp r0, #0
	beq _022162D4
	ldr r2, [r5]
	mov r0, #0xff
	ldr r1, _022162E8 ; =gMain + 0x40
	bic r2, r0
	ldrh r0, [r1, #0x20]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	orr r2, r0
	ldr r0, _022162EC ; =0xFFFF00FF
	str r2, [r5]
	and r2, r0
	ldrh r0, [r1, #0x22]
	add r1, r2, #0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x10
	orr r1, r0
	mov r0, #1
	lsl r0, r0, #0x10
	orr r0, r1
	b _022162DA
_022162D4:
	ldr r1, [r5]
	ldr r0, _022162F0 ; =0xFFFEFFFF
	and r0, r1
_022162DA:
	str r0, [r5]
	mov r0, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022162E0: .word 0x0000043C
_022162E4: .word ov96_02216200
_022162E8: .word gMain + 0x40
_022162EC: .word 0xFFFF00FF
_022162F0: .word 0xFFFEFFFF
	thumb_func_end ov96_02216234

	thumb_func_start ov96_022162F4
ov96_022162F4: ; 0x022162F4
	push {r3, r4, lr}
	sub sp, #0x4c
	ldr r3, _02216380 ; =0x0221D720
	add r4, r0, #0
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _02216384 ; =0x0221D754
	add r2, sp, #0x14
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r3, _02216388 ; =0x0221D6F4
	add r2, sp, #0
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	mov r0, #0x80
	str r0, [sp]
	ldr r0, [r4]
	bl sub_0200CF18
	str r0, [r4, #8]
	bl sub_0200CF38
	str r0, [r4, #0xc]
	ldr r0, [r4, #8]
	add r1, sp, #0x14
	add r2, sp, #0
	mov r3, #0x20
	bl sub_0200CF70
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	mov r2, #0x80
	bl sub_0200CFF4
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	add r2, sp, #0x34
	bl sub_0200D3F8
	ldr r0, [r4, #8]
	bl sub_0200CF6C
	mov r2, #0x1e
	mov r1, #0
	lsl r2, r2, #0x10
	bl sub_02009FC8
	ldr r0, [r4]
	ldr r1, _0221638C ; =0x000002E7
	mov r2, #1
	bl ov96_021E9A78
	str r0, [r4, #0x18]
	add sp, #0x4c
	pop {r3, r4, pc}
	.balign 4, 0
_02216380: .word 0x0221D720
_02216384: .word 0x0221D754
_02216388: .word 0x0221D6F4
_0221638C: .word 0x000002E7
	thumb_func_end ov96_022162F4

	thumb_func_start ov96_02216390
ov96_02216390: ; 0x02216390
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x18]
	bl ov96_021E9C0C
	ldr r0, [r4, #8]
	ldr r1, [r4, #0xc]
	bl sub_0200D998
	ldr r0, [r4, #8]
	bl sub_0200D108
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02216390

	thumb_func_start ov96_022163AC
ov96_022163AC: ; 0x022163AC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	ldr r6, [r0, #8]
	ldr r5, [r0, #0xc]
	cmp r6, #0
	bne _022163BC
	bl GF_AssertFail
_022163BC:
	cmp r5, #0
	bne _022163C4
	bl GF_AssertFail
_022163C4:
	mov r4, #1
	str r4, [sp]
	ldr r0, _022164E0 ; =0x00002710
	str r4, [sp, #4]
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0x10
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	ldr r0, _022164E0 ; =0x00002710
	str r4, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0xd
	bl sub_0200D564
	add r0, r4, #0
	str r0, [sp]
	ldr r0, _022164E0 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0xf
	bl sub_0200D6D4
	add r0, r4, #0
	str r0, [sp]
	ldr r0, _022164E0 ; =0x00002710
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0xe
	bl sub_0200D704
	mov r0, #1
	str r0, [sp]
	mov r4, #2
	ldr r0, _022164E4 ; =0x00002711
	str r4, [sp, #4]
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0x14
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	add r0, r4, #0
	str r0, [sp, #4]
	ldr r0, _022164E4 ; =0x00002711
	str r4, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0x11
	bl sub_0200D564
	mov r0, #1
	str r0, [sp]
	ldr r0, _022164E4 ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0x13
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _022164E4 ; =0x00002711
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0x12
	bl sub_0200D704
	add r7, r4, #0
	mov r4, #0
_0221647A:
	mov r0, #1
	str r0, [sp]
	ldr r0, _022164E8 ; =0x00002712
	str r7, [sp, #4]
	add r0, r4, r0
	str r0, [sp, #8]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0x18
	bl sub_0200D4A4
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, _022164E8 ; =0x00002712
	str r7, [sp, #8]
	add r0, r4, r0
	str r0, [sp, #0xc]
	add r0, r6, #0
	add r1, r5, #0
	mov r2, #0xf2
	mov r3, #0x15
	bl sub_0200D564
	add r4, r4, #1
	cmp r4, #2
	blt _0221647A
	mov r0, #1
	str r0, [sp]
	ldr r0, _022164E8 ; =0x00002712
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0x17
	bl sub_0200D6D4
	mov r0, #1
	str r0, [sp]
	ldr r0, _022164E8 ; =0x00002712
	add r1, r5, #0
	str r0, [sp, #4]
	add r0, r6, #0
	mov r2, #0xf2
	mov r3, #0x16
	bl sub_0200D704
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_022164E0: .word 0x00002710
_022164E4: .word 0x00002711
_022164E8: .word 0x00002712
	thumb_func_end ov96_022163AC

	thumb_func_start ov96_022164EC
ov96_022164EC: ; 0x022164EC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _02216548 ; =0x0221D79C
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_022164FE:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _022164FE
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _02216512
	bl GF_AssertFail
_02216512:
	cmp r4, #0
	bne _0221651A
	bl GF_AssertFail
_0221651A:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x10
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02216548: .word 0x0221D79C
	thumb_func_end ov96_022164EC

	thumb_func_start ov96_0221654C
ov96_0221654C: ; 0x0221654C
	push {r4, r5, r6, r7, lr}
	sub sp, #0xdc
	str r0, [sp]
	ldr r6, [r0, #4]
	ldr r0, [r0]
	add r3, sp, #8
	ldr r4, _022165EC ; =0x0221D6C4
	str r0, [sp, #4]
	add r2, r3, #0
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	add r0, r2, #0
	bl sub_0201ACB0
	ldr r4, _022165F0 ; =0x0221D834
	add r3, sp, #0x18
	mov r2, #0x18
_02216572:
	ldmia r4!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02216572
	ldr r0, [r4]
	ldr r5, _022165F4 ; =0x0221D738
	str r0, [r3]
	mov r7, #0
	add r4, sp, #0x18
_02216584:
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r2, r4, #0
	mov r3, #0
	bl sub_0201B1E4
	ldr r1, [r5]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201CAE0
	ldr r0, [r5]
	ldr r3, [sp, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r1, #0x20
	mov r2, #0
	bl sub_0201C1C4
	add r7, r7, #1
	add r4, #0x1c
	add r5, r5, #4
	cmp r7, #7
	blt _02216584
	ldr r3, [sp]
	ldr r2, _022165F8 ; =0x00000135
	ldr r3, [r3]
	mov r0, #1
	mov r1, #0x1b
	bl NewMsgDataFromNarc
	ldr r1, [sp]
	str r0, [r1, #0x14]
	add r0, r1, #0
	ldr r0, [r0]
	bl ScrStrBufs_new
	ldr r1, [sp]
	str r0, [r1, #0x10]
	ldr r1, [r1]
	mov r0, #4
	bl sub_02002CEC
	mov r0, #8
	mov r1, #0
	bl GX_EngineAToggleLayers
	add sp, #0xdc
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_022165EC: .word 0x0221D6C4
_022165F0: .word 0x0221D834
_022165F4: .word 0x0221D738
_022165F8: .word 0x00000135
	thumb_func_end ov96_0221654C

	thumb_func_start ov96_022165FC
ov96_022165FC: ; 0x022165FC
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r0, #0x20
	bl RemoveWindow
	ldr r0, [r6, #0x10]
	bl ScrStrBufs_delete
	ldr r0, [r6, #0x14]
	bl DestroyMsgData
	ldr r5, _02216638 ; =0x0221D738
	mov r4, #0
_02216616:
	ldr r1, [r5]
	ldr r0, [r6, #4]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl sub_0201BB4C
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #7
	blt _02216616
	mov r0, #4
	bl sub_02002DB4
	ldr r0, [r6, #4]
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	.balign 4, 0
_02216638: .word 0x0221D738
	thumb_func_end ov96_022165FC

	thumb_func_start ov96_0221663C
ov96_0221663C: ; 0x0221663C
	push {r4, lr}
	sub sp, #0x10
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r1, #1
	add r4, r0, #0
	str r1, [sp, #8]
	ldr r0, [r4]
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r3, #1
	str r3, [sp, #8]
	ldr r0, [r4]
	mov r1, #3
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #5
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #2
	bl GfGfxLoader_LoadCharData
	mov r3, #0
	str r3, [sp]
	str r3, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #2
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r3, #1
	str r3, [sp, #8]
	ldr r0, [r4]
	mov r1, #4
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #6
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #2
	bl GfGfxLoader_LoadScrnData
	mov r1, #0
	str r1, [sp]
	ldr r0, [r4]
	add r2, r1, #0
	str r0, [sp, #4]
	mov r0, #0xf2
	add r3, r1, #0
	bl GfGfxLoader_GXLoadPal
	mov r1, #0x1e
	ldr r2, [r4]
	mov r0, #0
	lsl r1, r1, #4
	bl sub_02003030
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #9
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #6
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xb
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #4
	bl GfGfxLoader_LoadCharData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xc
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #4
	bl GfGfxLoader_LoadScrnData
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp, #8]
	ldr r0, [r4]
	mov r1, #0xa
	str r0, [sp, #0xc]
	ldr r2, [r4, #4]
	mov r0, #0xf2
	mov r3, #6
	bl GfGfxLoader_LoadScrnData
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4]
	mov r1, #8
	str r0, [sp, #4]
	mov r0, #0xf2
	mov r2, #4
	bl GfGfxLoader_GXLoadPal
	add sp, #0x10
	pop {r4, pc}
	thumb_func_end ov96_0221663C

	thumb_func_start ov96_02216770
ov96_02216770: ; 0x02216770
	push {r3, r4, r5, r6, lr}
	sub sp, #4
	add r4, r0, #0
	add r5, r1, #0
	add r0, #0xe4
	add r1, r2, #0
	ldr r2, [r0]
	add r6, r3, #0
	lsl r0, r2, #0x14
	lsr r0, r0, #0x1c
	cmp r0, #3
	bls _0221678A
	b _0221691E
_0221678A:
	add r3, r0, r0
	add r3, pc
	ldrh r3, [r3, #6]
	lsl r3, r3, #0x10
	asr r3, r3, #0x10
	add pc, r3
_02216796: ; jump table
	.short _0221679E - _02216796 - 2 ; case 0
	.short _02216810 - _02216796 - 2 ; case 1
	.short _02216870 - _02216796 - 2 ; case 2
	.short _02216922 - _02216796 - 2 ; case 3
_0221679E:
	mov r1, #0
	mov r2, #2
	mov r3, #0x1e
	ldrsh r1, [r5, r1]
	ldrsh r2, [r5, r2]
	ldr r0, [r4, #0x10]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r4, #0x10]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x10]
	bl sub_0200DCAC
	mov r1, #0
	mov r2, #2
	mov r3, #0x1e
	ldrsh r1, [r5, r1]
	ldrsh r2, [r5, r2]
	ldr r0, [r4, #0xc]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r4, #0xc]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4]
	mov r1, #0
	bl ov96_021EAB38
	add r0, r4, #0
	mov r1, #0
	add r0, #0xe2
	strb r1, [r0]
	ldr r0, _02216928 ; =0x000008B4
	ldr r1, [sp, #0x20]
	bl ov96_022193CC
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _0221692C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, r5, r6, pc}
_02216810:
	add r1, sp, #0
	ldr r0, [r4, #0xc]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	add r3, sp, #0
	mov r2, #0
	ldrsh r0, [r3, r2]
	mov r1, #2
	sub r0, #0x28
	strh r0, [r3]
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	mov r3, #0x1e
	ldr r0, [r4, #0xc]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	mov r1, #0xe2
	ldrsb r0, [r4, r1]
	add r2, r0, #1
	add r0, r4, #0
	add r0, #0xe2
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0xa
	blt _02216922
	ldr r0, [r4, #0xc]
	mov r1, #0
	bl sub_0200DCE8
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _0221692C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, r5, r6, pc}
_02216870:
	ldr r3, [sp, #0x20]
	cmp r3, #0
	beq _022168BA
	lsl r2, r2, #0x10
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	add r0, r1, #0
	add r1, r6, #0
	lsr r2, r2, #0x18
	bl ov96_02219794
	cmp r0, #0
	beq _02216922
	ldr r2, [sp, #0x18]
	ldr r0, _02216930 ; =0xFFF9FFFF
	ldr r1, [r2]
	add sp, #4
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x10
	orr r0, r1
	str r0, [r2]
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _0221692C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	str r0, [r4]
	pop {r3, r4, r5, r6, pc}
_022168BA:
	ldr r3, [sp, #0x1c]
	cmp r3, #0
	beq _02216904
	lsl r2, r2, #0x10
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	add r0, r1, #0
	add r1, r6, #0
	lsr r2, r2, #0x18
	bl ov96_02219940
	cmp r0, #0
	beq _02216922
	ldr r2, [sp, #0x18]
	ldr r0, _02216930 ; =0xFFF9FFFF
	ldr r1, [r2]
	add sp, #4
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x10
	orr r0, r1
	str r0, [r2]
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _0221692C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	str r0, [r4]
	pop {r3, r4, r5, r6, pc}
_02216904:
	add r1, r4, #0
	add r1, #0xe4
	ldr r2, [r1]
	ldr r1, _0221692C ; =0xFFFFF0FF
	add r0, r0, #1
	lsl r0, r0, #0x1c
	and r1, r2
	lsr r0, r0, #0x14
	orr r0, r1
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, r5, r6, pc}
_0221691E:
	bl GF_AssertFail
_02216922:
	add sp, #4
	pop {r3, r4, r5, r6, pc}
	nop
_02216928: .word 0x000008B4
_0221692C: .word 0xFFFFF0FF
_02216930: .word 0xFFF9FFFF
	thumb_func_end ov96_02216770

	thumb_func_start ov96_02216934
ov96_02216934: ; 0x02216934
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	add r0, #0xe4
	ldr r0, [r0]
	add r2, r1, #0
	lsl r0, r0, #0x14
	lsr r0, r0, #0x1c
	cmp r0, #3
	bhi _02216A3E
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02216954: ; jump table
	.short _0221695C - _02216954 - 2 ; case 0
	.short _022169B0 - _02216954 - 2 ; case 1
	.short _02216A08 - _02216954 - 2 ; case 2
	.short _02216A42 - _02216954 - 2 ; case 3
_0221695C:
	mov r3, #2
	mov r1, #0
	ldrsh r3, [r2, r3]
	ldrsh r1, [r2, r1]
	mov r2, #0x19
	lsl r2, r2, #4
	sub r2, r3, r2
	lsl r2, r2, #0x10
	mov r3, #0x1e
	ldr r0, [r4, #0xc]
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r4, #0xc]
	mov r1, #1
	bl sub_0200DCE8
	add r0, r4, #0
	mov r1, #0
	add r0, #0xe2
	strb r1, [r0]
	ldr r0, _02216A48 ; =0x000008B5
	ldr r1, [sp, #0x18]
	bl ov96_022193CC
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216A4C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, pc}
_022169B0:
	add r1, sp, #0
	ldr r0, [r4, #0xc]
	add r1, #2
	add r2, sp, #0
	bl sub_0200DE44
	add r3, sp, #0
	mov r2, #0
	ldrsh r0, [r3, r2]
	mov r1, #2
	add r0, #0x28
	strh r0, [r3]
	ldrsh r1, [r3, r1]
	ldrsh r2, [r3, r2]
	mov r3, #0x1e
	ldr r0, [r4, #0xc]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	mov r1, #0xe2
	ldrsb r0, [r4, r1]
	add r2, r0, #1
	add r0, r4, #0
	add r0, #0xe2
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0xa
	blt _02216A42
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216A4C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, pc}
_02216A08:
	ldr r0, [sp, #0x14]
	cmp r0, #0
	beq _02216A1E
	ldr r2, [sp, #0x10]
	ldr r0, _02216A50 ; =0xFFF9FFFF
	ldr r1, [r2]
	and r1, r0
	mov r0, #1
	lsl r0, r0, #0x12
	orr r0, r1
	str r0, [r2]
_02216A1E:
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216A4C ; =0xFFFFF0FF
	add r2, r1, #0
	and r2, r0
	lsl r0, r1, #0x14
	lsr r0, r0, #0x1c
	add r0, r0, #1
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x14
	orr r0, r2
	add r4, #0xe4
	add sp, #4
	str r0, [r4]
	pop {r3, r4, pc}
_02216A3E:
	bl GF_AssertFail
_02216A42:
	add sp, #4
	pop {r3, r4, pc}
	nop
_02216A48: .word 0x000008B5
_02216A4C: .word 0xFFFFF0FF
_02216A50: .word 0xFFF9FFFF
	thumb_func_end ov96_02216934

	thumb_func_start ov96_02216A54
ov96_02216A54: ; 0x02216A54
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r1, #0
	mov r1, #1
	add r6, r2, #0
	add r7, r3, #0
	bl ov96_021EAB38
	mov r1, #0
	mov r2, #2
	mov r3, #0x1e
	ldrsh r1, [r4, r1]
	ldrsh r2, [r4, r2]
	ldr r0, [r5, #0x10]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r5, #0x10]
	bl sub_0200DCAC
	ldr r0, [r5, #0xc]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, _02216A9C ; =0x000008B6
	ldr r1, [sp, #0x18]
	bl ov96_022193CC
	cmp r7, #0
	beq _02216A9A
	ldr r1, [r6]
	ldr r0, _02216AA0 ; =0xFFF9FFFF
	and r0, r1
	str r0, [r6]
_02216A9A:
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02216A9C: .word 0x000008B6
_02216AA0: .word 0xFFF9FFFF
	thumb_func_end ov96_02216A54

	thumb_func_start ov96_02216AA4
ov96_02216AA4: ; 0x02216AA4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x28
	add r5, r0, #0
	mov r0, #0
	str r0, [sp, #0x18]
	add r0, r3, #0
	add r7, r1, #0
	str r2, [sp, #0xc]
	str r3, [sp, #0x10]
	ldr r4, [sp, #0x40]
	bl ov96_021E5F54
	add r6, r0, #0
	ldrb r1, [r5]
	add r0, sp, #0x24
	strh r1, [r0]
	ldrb r1, [r5, #1]
	strh r1, [r0, #2]
	ldr r0, [sp, #0x10]
	bl ov96_021E5D34
	cmp r0, r4
	bhi _02216AE6
	mov r0, #1
	str r0, [sp, #0x1c]
	mov r0, #0x28
	add r6, #0x50
	mul r0, r4
	add r0, r6, r0
	bl ov96_021E8A20
	str r0, [sp, #0x20]
	b _02216AF2
_02216AE6:
	mov r0, #0
	str r0, [sp, #0x1c]
	add r0, r6, #0
	bl ov96_021E8A20
	str r0, [sp, #0x20]
_02216AF2:
	ldr r0, [sp, #0x10]
	bl ov96_021E5F24
	cmp r0, #0
	bne _02216B00
	mov r0, #1
	b _02216B02
_02216B00:
	mov r0, #0
_02216B02:
	cmp r0, #0
	beq _02216B12
	ldr r0, [sp, #0x1c]
	cmp r0, #0
	beq _02216B12
	mov r0, #1
	str r0, [sp, #0x14]
	b _02216B16
_02216B12:
	mov r0, #0
	str r0, [sp, #0x14]
_02216B16:
	ldr r0, [sp, #0x10]
	bl ov96_021E5F24
	cmp r4, r0
	bne _02216B24
	mov r6, #1
	b _02216B26
_02216B24:
	mov r6, #0
_02216B26:
	ldr r0, [sp, #0x14]
	add r1, r7, #0
	add r3, r0, #0
	ldrb r0, [r5, #5]
	add r1, #0xe4
	ldr r1, [r1]
	lsl r0, r0, #0x19
	lsl r1, r1, #0x12
	lsr r0, r0, #0x1e
	lsr r1, r1, #0x1e
	orr r3, r6
	cmp r0, r1
	beq _02216B70
	add r0, r7, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216BF8 ; =0xFFFFF0FF
	and r1, r0
	add r0, r7, #0
	add r0, #0xe4
	str r1, [r0]
	add r0, r7, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216BFC ; =0xFFFFCFFF
	and r0, r1
	ldrb r1, [r5, #5]
	lsl r1, r1, #0x19
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x12
	orr r1, r0
	add r0, r7, #0
	add r0, #0xe4
	str r1, [r0]
	mov r0, #1
	str r0, [sp, #0x18]
_02216B70:
	add r0, r7, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #0x12
	lsr r0, r0, #0x1e
	beq _02216BD0
	cmp r0, #1
	beq _02216B88
	cmp r0, #2
	beq _02216BB8
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
_02216B88:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _02216B9E
	ldrb r2, [r5, #4]
	ldr r0, [sp, #0xc]
	add r1, r4, #0
	lsl r2, r2, #0x18
	lsr r2, r2, #0x1e
	mov r3, #1
	bl ov96_0221996C
_02216B9E:
	ldr r0, [sp, #0x20]
	ldr r2, [sp, #0xc]
	str r0, [sp]
	ldr r0, [sp, #0x14]
	add r1, sp, #0x24
	str r0, [sp, #4]
	add r0, r7, #0
	add r3, r4, #0
	str r6, [sp, #8]
	bl ov96_02216770
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
_02216BB8:
	ldr r0, [sp, #0x20]
	ldr r2, [sp, #0xc]
	str r0, [sp]
	str r3, [sp, #4]
	add r0, r7, #0
	add r1, sp, #0x24
	add r3, r4, #0
	str r6, [sp, #8]
	bl ov96_02216934
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
_02216BD0:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _02216BF2
	ldr r2, [sp, #0x20]
	str r6, [sp]
	add r0, r7, #0
	add r1, sp, #0x24
	bl ov96_02216A54
	ldrb r2, [r5, #4]
	ldr r0, [sp, #0xc]
	add r1, r4, #0
	lsl r2, r2, #0x18
	lsr r2, r2, #0x1e
	mov r3, #0
	bl ov96_0221996C
_02216BF2:
	add sp, #0x28
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02216BF8: .word 0xFFFFF0FF
_02216BFC: .word 0xFFFFCFFF
	thumb_func_end ov96_02216AA4

	thumb_func_start ov96_02216C00
ov96_02216C00: ; 0x02216C00
	ldrb r1, [r1]
	ldrb r0, [r0]
	cmp r0, r1
	bne _02216C0C
	mov r0, #0
	bx lr
_02216C0C:
	cmp r0, r1
	bhs _02216C14
	mov r0, #1
	bx lr
_02216C14:
	mov r0, #0
	mvn r0, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02216C00

	thumb_func_start ov96_02216C1C
ov96_02216C1C: ; 0x02216C1C
	ldrb r1, [r1]
	ldrb r0, [r0]
	cmp r0, r1
	bne _02216C28
	mov r0, #0
	bx lr
_02216C28:
	cmp r0, r1
	bhs _02216C30
	mov r0, #1
	bx lr
_02216C30:
	mov r0, #0
	mvn r0, r0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02216C1C

	thumb_func_start ov96_02216C38
ov96_02216C38: ; 0x02216C38
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0xa8
	str r0, [sp, #4]
	str r2, [sp, #0xc]
	mov r0, #0
	str r1, [sp, #8]
	add r2, sp, #0x88
	add r1, r0, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [sp, #0xc]
	bl ov96_021E5DC4
	str r0, [sp, #0x58]
	ldr r0, [sp, #8]
	ldr r0, [r0, #0x1c]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1f
	beq _02216C74
	ldr r1, _02216F60 ; =0x000003B9
	ldr r0, [sp, #4]
	ldrb r0, [r0, r1]
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x1f
	bne _02216C74
	ldr r0, _02216F64 ; =0x000008D4
	bl PlaySE
_02216C74:
	ldr r0, _02216F60 ; =0x000003B9
	ldr r1, [sp, #4]
	mov r6, #0
	ldrb r1, [r1, r0]
	mov r2, #1
	ldr r5, [sp, #8]
	bic r1, r2
	ldr r2, [sp, #8]
	str r6, [sp, #0x3c]
	ldr r2, [r2, #0x1c]
	lsl r2, r2, #0x18
	lsr r2, r2, #0x1f
	lsl r2, r2, #0x18
	lsr r3, r2, #0x18
	mov r2, #1
	and r2, r3
	orr r2, r1
	ldr r1, [sp, #4]
	strb r2, [r1, r0]
	mov r0, #0xff
	add r4, r1, #0
	add r4, #0x10
	str r0, [sp, #0x68]
	str r0, [sp, #0x6c]
	str r0, [sp, #0x70]
_02216CA6:
	ldr r0, [sp, #0xc]
	bl ov96_021E5D34
	cmp r0, r6
	bgt _02216CB4
	mov r7, #1
	b _02216CB6
_02216CB4:
	mov r7, #0
_02216CB6:
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r0, #0
	bne _02216CC4
	mov r1, #1
	b _02216CC6
_02216CC4:
	mov r1, #0
_02216CC6:
	mov r0, #0
	str r0, [sp, #0x48]
	cmp r1, #0
	beq _02216CD6
	cmp r7, #0
	beq _02216CD6
	mov r0, #1
	str r0, [sp, #0x48]
_02216CD6:
	cmp r5, #0
	bne _02216CDE
	bl GF_AssertFail
_02216CDE:
	cmp r4, #0
	bne _02216CE6
	bl GF_AssertFail
_02216CE6:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1e
	str r0, [sp, #0x34]
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216F68 ; =0xFFFF3FFF
	and r1, r0
	ldr r0, [sp, #0x34]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x10
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x18
	lsr r1, r0, #0x1e
	ldr r0, [sp, #0x3c]
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x30]
	ldr r0, [sp, #0x58]
	ldr r1, [sp, #0x30]
	ldr r0, [r0, #0x1c]
	bl ov96_021EAA04
	str r0, [sp, #0x54]
	str r0, [r4]
	cmp r0, #0
	bne _02216D2C
	bl GF_AssertFail
_02216D2C:
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r6, r0
	bne _02216D9A
	ldrb r0, [r5, #4]
	mov r1, #3
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1e
	str r0, [sp, #0x38]
	ldr r0, [sp, #8]
	ldr r0, [r0, #0x1c]
	lsr r7, r0, #8
	ldr r0, [sp, #0x38]
	add r0, r0, #2
	bl _s32_div_f
	ldr r0, [sp, #0x3c]
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x17
	add r1, r7, #0
	lsr r1, r0
	mov r0, #3
	and r0, r1
	cmp r0, #1
	bne _02216D68
	mov r0, #1
	str r0, [sp, #0x28]
	b _02216D6C
_02216D68:
	mov r0, #0
	str r0, [sp, #0x28]
_02216D6C:
	ldr r0, [sp, #0x38]
	mov r1, #3
	add r0, r0, #1
	bl _s32_div_f
	ldr r0, [sp, #0x3c]
	add r0, r1, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x17
	add r1, r7, #0
	lsr r1, r0
	mov r0, #3
	and r0, r1
	cmp r0, #1
	bne _02216D8E
	mov r2, #1
	b _02216D90
_02216D8E:
	mov r2, #0
_02216D90:
	ldr r0, [sp, #4]
	ldr r1, [sp, #0x28]
	ldr r0, [r0]
	bl ov96_02219770
_02216D9A:
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #7
	lsr r0, r0, #0x1e
	beq _02216E82
	ldrb r0, [r5, #2]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x1e
	beq _02216E82
	ldrb r1, [r5, #4]
	lsl r1, r1, #0x1a
	lsr r7, r1, #0x1e
	mov r1, #0
	str r1, [sp, #0x50]
	cmp r7, r6
	bgt _02216DBE
	sub r7, r7, #1
_02216DBE:
	cmp r0, #1
	bne _02216DE8
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r7, r0
	bne _02216DDA
	ldr r1, [sp, #0x58]
	ldr r0, _02216F6C ; =0x000007F8
	mov r2, #0xa
	add r0, r1, r0
	mov r1, #4
	bl ov96_02215884
_02216DDA:
	mov r0, #1
	str r0, [sp, #0x50]
	mov r0, #0x8d
	lsl r0, r0, #4
	bl PlaySE
	b _02216E0E
_02216DE8:
	cmp r0, #2
	bne _02216E0E
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r7, r0
	bne _02216E04
	ldr r1, [sp, #0x58]
	ldr r0, _02216F6C ; =0x000007F8
	mov r2, #0xf
	add r0, r1, r0
	mov r1, #0xa
	bl ov96_02215884
_02216E04:
	mov r0, #1
	str r0, [sp, #0x50]
	ldr r0, _02216F70 ; =0x000008D2
	bl PlaySE
_02216E0E:
	ldr r0, [sp, #0x50]
	cmp r0, #0
	beq _02216E82
	mov r0, #6
	mul r0, r7
	ldr r1, [sp, #8]
	ldrb r7, [r5]
	add r1, r1, r0
	ldrb r2, [r1, #1]
	ldr r1, [sp, #8]
	ldrb r3, [r5, #1]
	ldrb r0, [r1, r0]
	str r0, [sp, #0x74]
	sub r1, r7, r0
	bpl _02216E2E
	neg r1, r1
_02216E2E:
	lsr r0, r1, #0x1f
	str r0, [sp, #0x64]
	add r0, r1, r0
	str r0, [sp, #0x64]
	lsl r0, r0, #0xf
	asr r0, r0, #0x10
	str r0, [sp, #0x44]
	sub r1, r3, r2
	bpl _02216E42
	neg r1, r1
_02216E42:
	lsr r0, r1, #0x1f
	add r0, r1, r0
	lsl r0, r0, #0xf
	asr r0, r0, #0x10
	str r0, [sp, #0x40]
	ldr r0, [sp, #0x74]
	cmp r7, r0
	ble _02216E54
	add r7, r0, #0
_02216E54:
	ldr r0, [sp, #0x44]
	add r0, r0, r7
	lsl r0, r0, #0x10
	asr r1, r0, #0x10
	cmp r3, r2
	ble _02216E62
	add r3, r2, #0
_02216E62:
	ldr r2, [sp, #0x40]
	ldr r0, [r4, #0x14]
	add r2, r2, r3
	lsl r2, r2, #0x10
	mov r3, #0x1e
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r4, #0x14]
	bl sub_0200DCAC
	ldr r0, [r4, #0x14]
	mov r1, #1
	bl sub_0200DCE8
_02216E82:
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216F74 ; =0xFE7FFFFF
	and r0, r1
	ldrb r1, [r5, #2]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x1e
	lsr r1, r1, #7
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02216F78 ; =0xFFFCFFFF
	and r0, r1
	ldrb r1, [r5, #4]
	lsl r1, r1, #0x1a
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x1e
	lsr r1, r1, #0xe
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	ldrb r1, [r5, #5]
	ldr r0, [sp, #0x54]
	lsl r1, r1, #0x1b
	lsr r1, r1, #0x1e
	add r1, r1, #1
	bl ov96_021EAC0C
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r1, r0, #0x1c
	cmp r1, #4
	bne _02216EF0
	ldr r0, [r4, #0x18]
	cmp r0, #4
	beq _02216EF0
	ldr r0, [sp, #0x58]
	ldr r3, [sp, #0x34]
	add r7, r4, #0
	ldr r0, [r0, #0x1c]
	ldr r1, [sp, #0x30]
	add r7, #0x3c
	lsl r3, r3, #6
	mov r2, #1
	add r3, r7, r3
	bl ov96_021EAF60
	b _02216F10
_02216EF0:
	ldr r0, [r4, #0x18]
	cmp r0, #4
	bne _02216F10
	cmp r1, #4
	beq _02216F10
	ldr r0, [sp, #0x58]
	ldr r3, [sp, #0x34]
	add r7, r4, #0
	ldr r0, [r0, #0x1c]
	ldr r1, [sp, #0x30]
	add r7, #0x1c
	lsl r3, r3, #6
	mov r2, #1
	add r3, r7, r3
	bl ov96_021EAF60
_02216F10:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r1, r0, #0x1c
	cmp r1, #5
	bne _02216F40
	ldr r0, [r4, #0x18]
	cmp r0, #5
	beq _02216F40
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r6, r0
	bne _02216F36
	mov r1, #1
	ldr r0, _02216F7C ; =0x000008D1
	lsl r1, r1, #8
	bl sub_02006134
	b _02216F8C
_02216F36:
	ldr r0, _02216F80 ; =0x000008D5
	mov r1, #0x40
	bl sub_02006118
	b _02216F8C
_02216F40:
	cmp r1, #0xc
	bne _02216F8C
	ldr r0, [r4, #0x18]
	cmp r0, #0xc
	beq _02216F8C
	lsl r1, r6, #0x18
	ldr r0, [sp, #0xc]
	ldr r2, [sp, #0x34]
	lsr r1, r1, #0x18
	bl ov96_0221935C
	ldrb r0, [r0, #0x18]
	cmp r0, #0
	beq _02216F8C
	ldr r0, _02216F84 ; =0x000008D3
	b _02216F88
	.balign 4, 0
_02216F60: .word 0x000003B9
_02216F64: .word 0x000008D4
_02216F68: .word 0xFFFF3FFF
_02216F6C: .word 0x000007F8
_02216F70: .word 0x000008D2
_02216F74: .word 0xFE7FFFFF
_02216F78: .word 0xFFFCFFFF
_02216F7C: .word 0x000008D1
_02216F80: .word 0x000008D5
_02216F84: .word 0x000008D3
_02216F88:
	bl PlaySE
_02216F8C:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r1, r0, #0x1c
	cmp r1, #6
	bne _02216FB8
	ldr r0, [r4, #0x18]
	cmp r0, #6
	beq _02216FB8
	ldrb r1, [r5, #5]
	ldr r0, [r4, #4]
	lsl r1, r1, #0x1b
	lsr r1, r1, #0x1e
	add r1, #0xb
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	bl sub_0200DC58
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0200DCE8
	b _02216FE6
_02216FB8:
	cmp r1, #6
	beq _02216FC2
	ldr r0, [r4, #0x18]
	cmp r0, #6
	beq _02216FCC
_02216FC2:
	cmp r1, #7
	bne _02216FE6
	ldr r0, [r4, #0x18]
	cmp r0, #5
	bne _02216FE6
_02216FCC:
	ldrb r1, [r5, #5]
	ldr r0, [r4, #4]
	lsl r1, r1, #0x1b
	lsr r1, r1, #0x1e
	add r1, #0xf
	lsl r1, r1, #0x10
	lsr r1, r1, #0x10
	bl sub_0200DC4C
	ldr r0, [r4, #4]
	mov r1, #1
	bl sub_0200DCE8
_02216FE6:
	ldr r0, [r4, #4]
	bl sub_0200DCA0
	cmp r0, #1
	bne _02216FFE
	ldrb r1, [r5]
	mov r3, #0x1e
	ldrb r2, [r5, #1]
	ldr r0, [r4, #4]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
_02216FFE:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #6
	bne _02217010
	ldr r0, [sp, #0x54]
	mov r1, #0xc
	bl ov96_021EAC5C
_02217010:
	ldrb r1, [r5]
	cmp r1, #0
	beq _02217024
	cmp r1, #0xff
	beq _02217024
	ldrb r3, [r5, #1]
	cmp r3, #0
	beq _02217024
	cmp r3, #0xff
	bne _0221703E
_02217024:
	ldr r0, [sp, #0x54]
	mov r1, #0
	bl ov96_021EAB38
	ldr r0, [r4, #4]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [r4, #8]
	mov r1, #0
	bl sub_0200DCE8
	b _022170DE
_0221703E:
	ldrb r0, [r5, #5]
	lsl r0, r0, #0x19
	lsr r0, r0, #0x1e
	beq _0221704C
	mov r0, #1
	str r0, [sp, #0x24]
	b _02217050
_0221704C:
	mov r0, #0
	str r0, [sp, #0x24]
_02217050:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #3
	bne _02217060
	mov r0, #1
	str r0, [sp, #0x20]
	b _02217064
_02217060:
	mov r0, #0
	str r0, [sp, #0x20]
_02217064:
	ldr r0, [sp, #8]
	ldr r0, [r0, #0x1c]
	lsr r2, r0, #8
	ldr r0, [sp, #0x30]
	lsl r0, r0, #1
	lsr r2, r0
	mov r0, #3
	and r0, r2
	ldrb r2, [r5, #2]
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	lsl r2, r2, #0x1a
	lsr r2, r2, #0x1a
	sub r2, r3, r2
	sub r2, #0x18
	lsl r2, r2, #0x10
	mov r3, #0x1e
	ldr r0, [r4, #8]
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [sp, #0x20]
	cmp r0, #0
	bne _0221709C
	ldr r0, [sp, #0x24]
	cmp r0, #0
	beq _022170A0
_0221709C:
	mov r7, #0
	b _022170CE
_022170A0:
	cmp r7, #2
	bne _022170C2
	ldr r0, [r4, #8]
	mov r1, #1
	bl sub_0200DC58
	mov r0, #0x89
	lsl r0, r0, #4
	bl sub_02006184
	cmp r0, #0
	bne _022170CE
	mov r0, #0x89
	lsl r0, r0, #4
	bl PlaySE
	b _022170CE
_022170C2:
	cmp r7, #1
	bne _022170CE
	ldr r0, [r4, #8]
	mov r1, #9
	bl sub_0200DC58
_022170CE:
	cmp r7, #0
	beq _022170D6
	mov r1, #1
	b _022170D8
_022170D6:
	mov r1, #0
_022170D8:
	ldr r0, [r4, #8]
	bl sub_0200DCE8
_022170DE:
	lsl r0, r6, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	ldr r2, [sp, #4]
	ldr r3, [sp, #0xc]
	ldr r2, [r2]
	add r0, r5, #0
	add r1, r4, #0
	bl ov96_02216AA4
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #3
	bne _02217100
	mov r0, #1
	b _02217102
_02217100:
	mov r0, #0
_02217102:
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	cmp r7, #1
	bne _02217174
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #0xb
	lsr r0, r0, #0x1f
	bne _02217174
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	mov r0, #2
	lsl r0, r0, #0x12
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	add r1, r4, #0
	add r1, #0xe1
	mov r0, #6
	strb r0, [r1]
	add r1, r4, #0
	mov r0, #1
	add r1, #0xdc
	lsl r0, r0, #0xc
	str r0, [r1]
	ldr r0, _02217468 ; =0x0000089E
	bl PlaySE
	ldr r0, [sp, #4]
	lsl r1, r6, #0x18
	ldr r0, [r0]
	ldr r2, [sp, #0x34]
	lsr r1, r1, #0x18
	mov r3, #1
	bl ov96_0221996C
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r6, r0
	beq _02217160
	ldr r0, [sp, #0x48]
	cmp r0, #0
	beq _022171E0
_02217160:
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	mov r0, #2
	lsl r0, r0, #0x14
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	b _022171E0
_02217174:
	cmp r7, #0
	bne _022171E0
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #0xb
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _022171E0
	ldrb r1, [r5]
	mov r3, #0x1e
	ldrb r2, [r5, #1]
	ldr r0, [r4, #0x10]
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	ldr r0, [r4, #0x10]
	mov r1, #1
	bl sub_0200DCE8
	ldr r0, [r4, #0x10]
	bl sub_0200DCAC
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r6, r0
	bne _022171B0
	mov r1, #1
	b _022171B2
_022171B0:
	mov r1, #0
_022171B2:
	ldr r0, _0221746C ; =0x000008B6
	bl ov96_022193CC
	ldr r0, [sp, #4]
	lsl r1, r6, #0x18
	ldr r0, [r0]
	ldr r2, [sp, #0x34]
	lsr r1, r1, #0x18
	mov r3, #0
	bl ov96_0221996C
	ldr r0, [sp, #0x54]
	mov r1, #1
	bl ov96_021EAB38
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02217470 ; =0xFFF7FFFF
	and r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
_022171E0:
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02217474 ; =0xFFEFFFFF
	mov r3, #1
	and r1, r0
	lsl r0, r7, #0x1f
	lsr r0, r0, #0xb
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	ldrb r1, [r5]
	ldrb r2, [r5, #1]
	ldr r0, [sp, #0x54]
	bl ov96_021EB01C
	ldrb r3, [r5, #2]
	ldrb r2, [r5, #1]
	ldrb r1, [r5]
	lsl r3, r3, #0x1a
	lsr r3, r3, #0x1a
	sub r2, r2, r3
	ldr r0, [sp, #0x54]
	mov r3, #0
	bl ov96_021EB01C
	add r0, r4, #0
	add r0, #0xe4
	ldr r2, [r0]
	lsl r0, r2, #0xc
	lsr r0, r0, #0x1f
	beq _0221730A
	lsl r0, r2, #0xa
	lsr r0, r0, #0x1f
	beq _02217288
	ldr r0, [sp, #0x48]
	cmp r0, #0
	beq _0221725C
	mov r0, #6
	lsl r2, r2, #0x10
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	ldr r1, [sp, #0x58]
	lsl r0, r0, #6
	ldr r0, [r1, r0]
	lsl r1, r6, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_02219940
	cmp r0, #0
	beq _02217288
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02217478 ; =0xFFDFFFFF
	and r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	b _02217288
_0221725C:
	mov r0, #6
	lsl r2, r2, #0x10
	lsr r2, r2, #0x1e
	lsl r2, r2, #0x18
	ldr r1, [sp, #0x58]
	lsl r0, r0, #6
	ldr r0, [r1, r0]
	lsl r1, r6, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_02219794
	cmp r0, #0
	beq _02217288
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, _02217478 ; =0xFFDFFFFF
	and r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
_02217288:
	mov r0, #0xe1
	ldrsb r0, [r4, r0]
	sub r1, r0, #1
	add r0, r4, #0
	add r0, #0xe1
	strb r1, [r0]
	mov r0, #0xe1
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _022172A6
	ldr r0, [sp, #0x54]
	mov r1, #0
	bl ov96_021EAB38
	b _022174AE
_022172A6:
	ldrb r0, [r5]
	str r0, [sp, #0x84]
	ldrb r0, [r5, #1]
	str r0, [sp, #0x80]
	add r0, r4, #0
	add r0, #0xdc
	ldr r1, [r0]
	ldr r0, _0221747C ; =0x0000019A
	sub r1, r1, r0
	add r0, r4, #0
	add r0, #0xdc
	str r1, [r0]
	add r0, r4, #0
	add r0, #0xdc
	ldr r0, [r0]
	bl _itof
	ldr r1, _02217480 ; =0x45800000
	bl _fdiv
	add r1, r0, #0
	ldr r0, [sp, #0x54]
	add r2, r1, #0
	bl ov96_021EB10C
	add r0, sp, #0x80
	str r0, [sp]
	ldr r0, [sp, #0x54]
	ldr r1, [sp, #0x84]
	ldr r2, [sp, #0x80]
	add r3, sp, #0x84
	bl ov96_021EB06C
	ldr r0, [sp, #0x80]
	cmp r0, #0xa0
	bge _022172F0
	b _022174AE
_022172F0:
	mov r0, #0xe1
	ldrsb r1, [r4, r0]
	mov r0, #6
	ldrb r3, [r5, #1]
	sub r0, r0, r1
	lsl r2, r0, #2
	add r2, r3, r2
	ldrb r1, [r5]
	ldr r0, [sp, #0x54]
	mov r3, #1
	bl ov96_021EB01C
	b _022174AE
_0221730A:
	ldrb r1, [r5, #1]
	mov r0, #0xa0
	sub r1, r0, r1
	mov r0, #0xc
	mul r0, r1
	bl _itof
	ldr r1, _02217480 ; =0x45800000
	bl _fdiv
	add r1, r0, #0
	ldr r0, _02217484 ; =0x3F99999A
	bl _fsub
	ldrb r1, [r5, #4]
	str r0, [sp, #0x4c]
	str r0, [sp, #0x2c]
	lsl r1, r1, #0x1c
	lsr r1, r1, #0x1c
	cmp r1, #5
	bne _02217392
	add r1, r4, #0
	add r1, #0xe4
	ldr r1, [r1]
	lsl r1, r1, #0x18
	lsr r7, r1, #0x18
	bl _f2d
	str r0, [sp, #0x5c]
	add r0, r7, #0
	str r1, [sp, #0x1c]
	bl _dfltu
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02217488 ; =0x9999999A
	ldr r1, _0221748C ; =0x3FB99999
	bl _dmul
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02217488 ; =0x9999999A
	ldr r1, _02217490 ; =0x3FE99999
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x5c]
	ldr r1, [sp, #0x1c]
	bl _dmul
	bl _d2f
	str r0, [sp, #0x4c]
	cmp r7, #4
	bhs _02217392
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	ldr r1, [sp, #0x68]
	bic r0, r1
	add r1, r7, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
_02217392:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #8
	bne _02217432
	lsl r1, r6, #0x18
	ldr r0, [sp, #0xc]
	ldr r2, [sp, #0x34]
	lsr r1, r1, #0x18
	bl ov96_0221935C
	add r1, r4, #0
	add r1, #0xe4
	ldr r1, [r1]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bne _022173D2
	ldrb r0, [r0, #0x18]
	cmp r0, #0
	bne _022173CC
	ldr r0, [sp, #0xc]
	bl ov96_021E5F24
	cmp r6, r0
	bne _022173D2
	ldr r0, _02217494 ; =0x000005F3
	bl PlaySE
	b _022173D2
_022173CC:
	ldr r0, _02217498 ; =0x0000060A
	bl PlaySE
_022173D2:
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	ldr r0, [sp, #0x2c]
	bl _f2d
	str r0, [sp, #0x60]
	add r0, r7, #0
	str r1, [sp, #0x14]
	bl _dfltu
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02217488 ; =0x9999999A
	ldr r1, _0221748C ; =0x3FB99999
	bl _dmul
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, _02217488 ; =0x9999999A
	ldr r1, _02217490 ; =0x3FE99999
	bl _dsub
	add r2, r0, #0
	add r3, r1, #0
	ldr r0, [sp, #0x60]
	ldr r1, [sp, #0x14]
	bl _dmul
	bl _d2f
	str r0, [sp, #0x2c]
	cmp r7, #5
	bhs _02217432
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	ldr r1, [sp, #0x6c]
	bic r0, r1
	add r1, r7, #1
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	orr r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
_02217432:
	ldrb r0, [r5, #4]
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	cmp r0, #8
	beq _0221749C
	cmp r0, #5
	beq _0221749C
	add r0, r4, #0
	add r0, #0xe4
	ldr r0, [r0]
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	beq _022174A4
	ldr r0, [sp, #0x54]
	mov r1, #1
	bl ov96_02218510
	add r0, r4, #0
	add r0, #0xe4
	ldr r1, [r0]
	ldr r0, [sp, #0x70]
	bic r1, r0
	add r0, r4, #0
	add r0, #0xe4
	str r1, [r0]
	b _022174A4
	nop
_02217468: .word 0x0000089E
_0221746C: .word 0x000008B6
_02217470: .word 0xFFF7FFFF
_02217474: .word 0xFFEFFFFF
_02217478: .word 0xFFDFFFFF
_0221747C: .word 0x0000019A
_02217480: .word 0x45800000
_02217484: .word 0x3F99999A
_02217488: .word 0x9999999A
_0221748C: .word 0x3FB99999
_02217490: .word 0x3FE99999
_02217494: .word 0x000005F3
_02217498: .word 0x0000060A
_0221749C:
	ldr r0, [sp, #0x54]
	mov r1, #0
	bl ov96_02218510
_022174A4:
	ldr r0, [sp, #0x54]
	ldr r1, [sp, #0x4c]
	ldr r2, [sp, #0x2c]
	bl ov96_021EB10C
_022174AE:
	ldrb r0, [r5, #4]
	add r6, r6, #1
	add r5, r5, #6
	lsl r0, r0, #0x1c
	lsr r0, r0, #0x1c
	str r0, [r4, #0x18]
	ldr r0, [sp, #0x3c]
	add r4, #0xe8
	add r0, r0, #3
	str r0, [sp, #0x3c]
	cmp r6, #4
	bge _022174CA
	bl _02216CA6
_022174CA:
	mov r6, #0
	add r4, r6, #0
	add r5, sp, #0x88
_022174D0:
	ldr r1, [sp, #8]
	ldr r0, [sp, #0x58]
	ldrb r1, [r1, #4]
	ldr r0, [r0, #0x1c]
	lsl r1, r1, #0x18
	lsr r1, r1, #0x1e
	add r1, r1, r4
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	ldr r1, [sp, #8]
	add r3, sp, #0x7c
	ldrb r1, [r1]
	add r7, r0, #0
	str r1, [sp, #0x7c]
	ldr r1, [sp, #8]
	ldrb r1, [r1, #1]
	str r1, [sp, #0x78]
	add r1, sp, #0x78
	str r1, [sp]
	ldr r1, [sp, #0x7c]
	ldr r2, [sp, #0x78]
	bl ov96_021EB06C
	ldr r0, [sp, #0x78]
	add r6, r6, #1
	strb r0, [r5]
	ldr r0, [sp, #8]
	str r7, [r5, #4]
	add r0, r0, #6
	str r0, [sp, #8]
	add r4, r4, #3
	add r5, #8
	cmp r6, #4
	blt _022174D0
	mov r0, #0
	str r0, [sp]
	ldr r3, _02217540 ; =ov96_02216C00
	add r0, sp, #0x88
	mov r1, #4
	mov r2, #8
	bl sub_020E3A84
	mov r5, #0
	add r4, sp, #0x88
_0221752C:
	ldr r0, [r4, #4]
	add r1, r5, #7
	bl ov96_021EABA8
	add r5, r5, #1
	add r4, #8
	cmp r5, #4
	blt _0221752C
	add sp, #0xa8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02217540: .word ov96_02216C00
	thumb_func_end ov96_02216C38

	thumb_func_start ov96_02217544
ov96_02217544: ; 0x02217544
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x20
	str r0, [sp, #8]
	ldr r0, [sp, #0x38]
	str r1, [sp, #0xc]
	str r0, [sp, #0x38]
	ldr r0, [sp, #8]
	str r2, [sp, #0x10]
	str r3, [r0]
	str r1, [r0, #4]
	add r1, r2, #0
	str r1, [r0, #8]
	mov r0, #3
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [sp, #0xc]
	mov r2, #0x80
	mov r3, #0x10
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #0xc]
	mov r0, #0
	str r0, [sp, #0x1c]
	add r0, r1, #0
	add r0, #0x10
	str r0, [sp, #8]
	ldr r0, [sp, #0x1c]
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x3c]
	str r0, [sp, #0x14]
_02217584:
	ldr r0, [sp, #0x18]
	lsl r0, r0, #0x18
	lsr r6, r0, #0x18
	ldr r0, [sp, #0x38]
	add r1, r6, #0
	bl ov96_021EAA04
	ldr r1, [sp, #8]
	mov r7, #0
	add r4, r1, #0
	add r5, r1, #0
	str r0, [r1]
	add r4, #0x1c
	add r5, #0x3c
_022175A0:
	lsl r1, r6, #0x18
	ldr r0, [sp, #0x38]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	bl ov96_021EAA20
	bl ov96_021E8BB0
	ldr r1, [sp, #0x14]
	add r2, r4, #0
	bl ov96_021E8BB4
	add r0, r4, #0
	add r1, r5, #0
	mov r2, #0x20
	bl MIi_CpuCopy8
	add r0, r5, #0
	mov r1, #0x10
	bl sub_02003F04
	add r7, r7, #1
	add r6, r6, #1
	add r4, #0x40
	add r5, #0x40
	cmp r7, #3
	blt _022175A0
	mov r0, #7
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r2, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r3, r2, #0
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #0x14]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #1
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	mov r2, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r3, r2, #0
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #8]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #0xb
	str r0, [sp]
	mov r0, #4
	str r0, [sp, #4]
	mov r2, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r3, r2, #0
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #4]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #0x15
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	mov r2, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r3, r2, #0
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #0xc]
	mov r1, #0
	bl sub_0200DCE8
	mov r0, #8
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	mov r2, #0
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r3, r2, #0
	bl ov96_022164EC
	ldr r1, [sp, #8]
	str r0, [r1, #0x10]
	mov r1, #0
	bl sub_0200DCE8
	ldr r0, [sp, #8]
	add r0, #0xe8
	str r0, [sp, #8]
	ldr r0, [sp, #0x18]
	add r0, r0, #3
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x1c]
	add r0, r0, #1
	str r0, [sp, #0x1c]
	cmp r0, #4
	bge _02217686
	b _02217584
_02217686:
	add sp, #0x20
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02217544

	thumb_func_start ov96_0221768C
ov96_0221768C: ; 0x0221768C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r4, r1, #0
	add r7, r0, #0
	add r0, r4, #0
	bl ov96_021E5F54
	add r0, #0xf0
	bl ov96_021E8A20
	str r0, [sp, #8]
	add r0, r4, #0
	bl ov96_021E5DC4
	str r0, [sp, #4]
	ldr r1, [sp, #8]
	add r0, r7, #0
	add r2, r4, #0
	bl ov96_02216C38
	ldr r1, [sp, #8]
	add r0, r4, #0
	ldr r1, [r1, #0x20]
	lsl r1, r1, #0xd
	lsr r1, r1, #0x10
	bl ov96_021E6454
	ldr r0, [sp, #8]
	ldr r0, [r0, #0x20]
	lsl r0, r0, #0xd
	lsr r1, r0, #0x10
	ldr r0, _022177C4 ; =0x000001C2
	cmp r1, r0
	bne _022176D6
	ldr r0, _022177C8 ; =0x000006D7
	bl PlaySE
_022176D6:
	add r0, r4, #0
	bl ov96_021E5F24
	add r2, r0, #0
	mov r1, #6
	ldr r0, [sp, #8]
	mul r2, r1
	add r0, r0, r2
	ldrb r0, [r0, #5]
	lsl r0, r0, #0x1d
	lsr r4, r0, #0x1d
	cmp r4, #4
	bhi _0221771A
	add r0, r4, r4
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_022176FC: ; jump table
	.short _02217706 - _022176FC - 2 ; case 0
	.short _02217716 - _022176FC - 2 ; case 1
	.short _0221770E - _022176FC - 2 ; case 2
	.short _0221770A - _022176FC - 2 ; case 3
	.short _02217712 - _022176FC - 2 ; case 4
_02217706:
	mov r5, #2
	b _0221771E
_0221770A:
	mov r5, #3
	b _0221771E
_0221770E:
	mov r5, #4
	b _0221771E
_02217712:
	mov r5, #5
	b _0221771E
_02217716:
	add r5, r1, #0
	b _0221771E
_0221771A:
	bl GF_AssertFail
_0221771E:
	ldr r0, [r7, #0xc]
	add r1, r5, #0
	bl sub_0200DC58
	mov r0, #0xee
	lsl r0, r0, #2
	ldrb r0, [r7, r0]
	cmp r4, r0
	beq _02217746
	cmp r4, #2
	bne _0221773C
	ldr r0, _022177CC ; =0x0000089B
	bl PlaySE
	b _02217746
_0221773C:
	cmp r4, #4
	bne _02217746
	ldr r0, _022177D0 ; =0x0000089C
	bl PlaySE
_02217746:
	mov r0, #0xee
	lsl r0, r0, #2
	ldr r3, [sp, #8]
	strb r4, [r7, r0]
	mov r1, #0
	add r2, sp, #0xc
_02217752:
	strb r1, [r2, #1]
	ldrb r0, [r3, #3]
	add r1, r1, #1
	add r3, r3, #6
	strb r0, [r2]
	add r2, r2, #2
	cmp r1, #4
	blt _02217752
	mov r0, #0
	str r0, [sp]
	ldr r3, _022177D4 ; =ov96_02216C1C
	add r0, sp, #0xc
	mov r1, #4
	mov r2, #2
	bl sub_020E3A84
	ldr r5, [sp, #8]
	mov r6, #0
	add r4, r7, #0
_02217778:
	mov r0, #0x3b
	lsl r0, r0, #4
	ldrb r2, [r5, #3]
	ldrh r0, [r4, r0]
	cmp r2, r0
	beq _02217790
	lsl r1, r6, #0x18
	ldr r0, [r7]
	lsr r1, r1, #0x18
	add r3, sp, #0xc
	bl ov96_0221966C
_02217790:
	ldrb r1, [r5, #3]
	mov r0, #0x3b
	lsl r0, r0, #4
	strh r1, [r4, r0]
	add r6, r6, #1
	add r4, r4, #2
	add r5, r5, #6
	cmp r6, #4
	blt _02217778
	ldr r0, [sp, #8]
	mov r1, #0x1e
	ldr r0, [r0, #0x20]
	lsl r0, r0, #0xd
	lsr r0, r0, #0x10
	bl _u32_div_f
	add r1, r0, #0
	mov r2, #6
	ldr r0, [sp, #4]
	lsl r2, r2, #6
	ldr r0, [r0, r2]
	bl ov96_022196E4
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_022177C4: .word 0x000001C2
_022177C8: .word 0x000006D7
_022177CC: .word 0x0000089B
_022177D0: .word 0x0000089C
_022177D4: .word ov96_02216C1C
	thumb_func_end ov96_0221768C

	thumb_func_start ov96_022177D8
ov96_022177D8: ; 0x022177D8
	push {r3, r4, r5, r6, r7, lr}
	add r6, r0, #0
	ldr r0, [r6, #4]
	cmp r0, #0
	bne _022177E6
	bl GF_AssertFail
_022177E6:
	ldr r0, [r6, #8]
	cmp r0, #0
	bne _022177F0
	bl GF_AssertFail
_022177F0:
	ldr r0, [r6, #0xc]
	cmp r0, #0
	bne _022177FA
	bl GF_AssertFail
_022177FA:
	ldr r0, [r6, #0xc]
	bl sub_0200D9DC
	mov r7, #0
	add r6, #0x10
_02217804:
	mov r4, #0
	add r5, r6, #0
_02217808:
	ldr r0, [r5, #4]
	bl sub_0200D9DC
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #5
	blt _02217808
	add r7, r7, #1
	add r6, #0xe8
	cmp r7, #4
	blt _02217804
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_022177D8

	thumb_func_start ov96_02217820
ov96_02217820: ; 0x02217820
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r0, [sp]
	mov r0, #0
	ldr r7, [sp]
	str r0, [sp, #4]
	add r6, r0, #0
_0221782E:
	mov r4, #0
	add r5, r7, #0
_02217832:
	ldr r0, [r5, #0x14]
	add r1, r6, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #5
	blt _02217832
	ldr r0, [sp, #4]
	add r7, #0xe8
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #4
	blt _0221782E
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	bl sub_0200DC78
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02217820

	thumb_func_start ov96_0221785C
ov96_0221785C: ; 0x0221785C
	cmp r0, #0xb
	bne _02217864
	mov r0, #0
	bx lr
_02217864:
	mov r0, #1
	bx lr
	thumb_func_end ov96_0221785C

	thumb_func_start ov96_02217868
ov96_02217868: ; 0x02217868
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x14]
	cmp r0, #6
	beq _0221788A
	cmp r0, #0xb
	beq _0221788A
	add r0, r1, #0
	bl ov96_022186CC
	lsl r0, r0, #0x1c
	ldr r2, [r4, #0x60]
	ldr r1, _0221788C ; =0xFFF0FFFF
	lsr r0, r0, #0xc
	and r1, r2
	orr r0, r1
	str r0, [r4, #0x60]
_0221788A:
	pop {r4, pc}
	.balign 4, 0
_0221788C: .word 0xFFF0FFFF
	thumb_func_end ov96_02217868

	thumb_func_start ov96_02217890
ov96_02217890: ; 0x02217890
	cmp r0, #6
	beq _02217898
	cmp r0, #0xb
	bne _0221789C
_02217898:
	mov r0, #1
	bx lr
_0221789C:
	mov r0, #0
	bx lr
	thumb_func_end ov96_02217890

	thumb_func_start ov96_022178A0
ov96_022178A0: ; 0x022178A0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r1, #0
	add r5, r0, #0
	ldr r0, [r4, #4]
	ldr r1, [r4, #0x14]
	ldr r0, [r0, #4]
	str r2, [sp, #4]
	ldr r7, [r0]
	ldr r6, [r0, #4]
	ldr r0, [r5, #0x14]
	bl ov96_0221785C
	cmp r0, #0
	bne _022178C0
	b _02217AC6
_022178C0:
	ldr r0, [r4, #0x14]
	cmp r0, #6
	bne _0221794A
	add r0, r7, #0
	bl _itof
	add r1, r0, #0
	ldr r0, _02217ACC ; =0x40400000
	bl _fmul
	bl _ftoi
	add r7, r0, #0
	add r0, r6, #0
	bl _itof
	add r1, r0, #0
	mov r0, #1
	lsl r0, r0, #0x1e
	bl _fmul
	bl _ftoi
	add r6, r0, #0
	ldr r0, [r4, #0x60]
	lsl r0, r0, #0x14
	lsr r0, r0, #0x14
	add r1, r0, #1
	cmp r1, #0xc8
	ble _022178FE
	mov r1, #0xc8
_022178FE:
	ldr r0, [r4, #0x60]
	ldr r2, _02217AD0 ; =0xFFFFF000
	mov r3, #3
	and r0, r2
	lsr r2, r2, #0x14
	and r1, r2
	orr r0, r1
	str r0, [r4, #0x60]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #4
	bl ov96_021E8228
	b _022179B4
_0221794A:
	cmp r0, #0xb
	bne _022179B0
	ldr r0, [r4, #4]
	ldr r0, [r0, #4]
	ldr r7, [r0, #0x10]
	ldr r6, [r0, #0x14]
	ldr r0, [r4, #0x60]
	lsl r0, r0, #0x14
	lsr r0, r0, #0x14
	add r1, r0, #2
	cmp r1, #0xc8
	ble _02217964
	mov r1, #0xc8
_02217964:
	ldr r0, [r4, #0x60]
	ldr r2, _02217AD0 ; =0xFFFFF000
	mov r3, #3
	and r0, r2
	lsr r2, r2, #0x14
	and r1, r2
	orr r0, r1
	str r0, [r4, #0x60]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #4
	bl ov96_021E8228
	b _022179B4
_022179B0:
	mov r7, #3
	lsl r7, r7, #0xc
_022179B4:
	add r2, r5, #0
	add r2, #0x44
	ldr r1, [sp, #4]
	add r0, r7, #0
	add r3, r2, #0
	bl VEC_MultAdd
	add r0, r5, #0
	mov r1, #3
	add r0, #0x44
	lsl r1, r1, #0xe
	bl ov96_02215958
	ldr r1, [sp, #4]
	add r0, r4, #0
	bl ov96_02217868
	ldr r0, [r4, #0x14]
	bl ov96_02217890
	cmp r0, #0
	beq _022179F6
	add r0, r5, #0
	mov r1, #4
	add r0, #0x5d
	strb r1, [r0]
	add r0, r4, #0
	add r0, #0x5d
	strb r1, [r0]
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_02219174
_022179F6:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _02217A06
	ldr r0, [r4, #0x14]
	bl ov96_02217890
	cmp r0, #0
	beq _02217A14
_02217A06:
	str r4, [r5, #0x10]
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _02217A14
	cmp r0, r5
	beq _02217A14
	str r0, [r5, #0x10]
_02217A14:
	mov r0, #2
	ldr r1, [r5, #0x60]
	lsl r0, r0, #0x1a
	orr r0, r1
	str r0, [r5, #0x60]
	ldr r0, [r4, #0x14]
	str r0, [r5, #0x18]
	ldr r0, [r4, #0x14]
	bl ov96_02217890
	cmp r0, #0
	ldr r1, [r5, #0x60]
	beq _02217A82
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1e
	cmp r0, #2
	beq _02217A5C
	ldr r0, [r4, #0x14]
	cmp r0, #6
	beq _02217A42
	cmp r0, #0xb
	beq _02217A50
	b _02217A5C
_02217A42:
	ldr r0, _02217AD4 ; =0xFFFF3FFF
	and r1, r0
	mov r0, #1
	lsl r0, r0, #0xe
	orr r0, r1
	str r0, [r5, #0x60]
	b _02217A5C
_02217A50:
	ldr r0, _02217AD4 ; =0xFFFF3FFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0xe
	orr r0, r1
	str r0, [r5, #0x60]
_02217A5C:
	ldr r0, [r4, #0x60]
	ldr r1, [r5, #0x60]
	lsl r0, r0, #0xa
	lsl r1, r1, #0xa
	lsr r0, r0, #0x1e
	lsr r1, r1, #0x1e
	cmp r0, r1
	bhs _02217A6E
	add r0, r0, #1
_02217A6E:
	ldr r2, [r5, #0x60]
	ldr r1, _02217AD8 ; =0xFFFFCFFF
	lsl r0, r0, #0x1e
	and r1, r2
	lsr r0, r0, #0x12
	orr r0, r1
	str r0, [r5, #0x60]
	mov r0, #4
	str r0, [r5, #0x64]
	b _02217A8C
_02217A82:
	ldr r0, _02217ADC ; =0x7FFFFFFF
	and r1, r0
	add r0, r0, #1
	orr r0, r1
	str r0, [r5, #0x60]
_02217A8C:
	ldr r0, [r4, #0x14]
	mov r1, #0
	cmp r0, #3
	beq _02217A9A
	cmp r0, #4
	beq _02217A9A
	mov r1, #1
_02217A9A:
	cmp r1, #0
	bne _02217AA2
	bl GF_AssertFail
_02217AA2:
	ldr r0, [r5, #0x14]
	mov r2, #1
	sub r0, r0, #3
	cmp r0, #8
	bhi _02217AB8
	add r1, r2, #0
	lsl r1, r0
	ldr r0, _02217AE0 ; =0x00000103
	tst r0, r1
	beq _02217AB8
	mov r2, #0
_02217AB8:
	cmp r2, #0
	bne _02217AC0
	bl GF_AssertFail
_02217AC0:
	add sp, #8
	mov r0, #1
	pop {r3, r4, r5, r6, r7, pc}
_02217AC6:
	mov r0, #0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02217ACC: .word 0x40400000
_02217AD0: .word 0xFFFFF000
_02217AD4: .word 0xFFFF3FFF
_02217AD8: .word 0xFFFFCFFF
_02217ADC: .word 0x7FFFFFFF
_02217AE0: .word 0x00000103
	thumb_func_end ov96_022178A0

	thumb_func_start ov96_02217AE4
ov96_02217AE4: ; 0x02217AE4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x118
	str r0, [sp, #8]
	ldr r0, [r0, #0xc]
	str r1, [sp, #0xc]
	bl sub_0200E2B0
	str r0, [sp]
	ldr r0, [sp, #8]
	ldr r3, [sp, #8]
	ldr r0, [r0]
	ldr r3, [r3, #0x18]
	mov r1, #0xc
	mov r2, #7
	bl ov96_021EA854
	ldr r1, [sp, #8]
	add r5, sp, #0x14
	mov r4, #0
	str r0, [r1, #0x1c]
	add r2, r5, #0
	add r0, r4, #0
	add r1, r4, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	add r6, sp, #0x58
_02217B26:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r1, #0
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	str r0, [sp, #0x10]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	add r3, r6, #0
	bl ov96_021E6168
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #0x10]
	add r2, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6108
	str r0, [r5, #0x14]
	add r4, r4, #1
	add r6, #0x10
	add r5, r5, #4
	cmp r4, #0xc
	blt _02217B26
	mov r0, #3
	str r0, [sp, #0x18]
	mov r0, #1
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	mov r1, #0xc
	ldr r0, [r0, #0x1c]
	add r2, sp, #0x58
	add r3, sp, #0x14
	bl ov96_021EA8A8
	add sp, #0x118
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02217AE4

	thumb_func_start ov96_02217B84
ov96_02217B84: ; 0x02217B84
	push {r4, r5, r6, r7, lr}
	sub sp, #0x5c
	str r0, [sp, #0xc]
	str r1, [sp, #0x10]
	add r0, sp, #0x44
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	str r1, [r0, #0xc]
	str r1, [r0, #0x10]
	str r1, [r0, #0x14]
	mov r1, #0xaa
	mov r2, #0x13
	bl ReadWholeNarcMemberByIdPair
	ldr r0, [sp, #0xc]
	cmp r0, #0
	bne _02217BAE
	bl GF_AssertFail
_02217BAE:
	ldr r0, [sp, #0x10]
	bl ov96_0221918C
	mov r1, #0x83
	ldr r0, [sp, #0xc]
	lsl r1, r1, #2
	add r0, r0, r1
	str r0, [sp, #0x28]
	mov r0, #0xf
	mov r4, #0
	str r0, [sp, #0x2c]
_02217BC4:
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	add r0, r4, #0
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x24]
	mov r0, #0xa8
	add r1, r7, #0
	mul r1, r0
	ldr r0, [sp, #0x28]
	add r1, r0, r1
	ldr r0, [sp, #0x24]
	lsl r0, r0, #4
	add r6, r1, r0
	ldr r0, [sp, #0xc]
	lsl r1, r4, #0x18
	ldr r0, [r0, #0x1c]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r5, r0, #0
	ldr r0, [sp, #0x24]
	cmp r0, #0
	bne _02217C06
	mov r1, #1
	b _02217C08
_02217C06:
	mov r1, #0
_02217C08:
	lsl r1, r1, #0x18
	add r0, r5, #0
	lsr r1, r1, #0x18
	bl ov96_021EAB38
	ldr r0, [sp, #0x10]
	ldr r2, [sp, #0x24]
	add r1, r7, #0
	bl ov96_021E60C0
	bl ov96_021E6138
	lsl r1, r0, #3
	add r0, sp, #0x44
	add r2, r0, r1
	add r1, r2, #0
	sub r1, #8
	sub r2, r2, #4
	ldr r1, [r1]
	ldr r2, [r2]
	add r0, r5, #0
	bl ov96_021EAF70
	ldr r0, [sp, #0xc]
	lsl r1, r4, #0x18
	ldr r0, [r0, #0x1c]
	lsr r1, r1, #0x18
	bl ov96_021EAA04
	add r5, r0, #0
	bl ov96_021EAA20
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EABE0
	add r0, r5, #0
	mov r1, #1
	bl ov96_02218510
	ldr r1, _02217DB0 ; =0x0221D6E4
	lsl r0, r7, #2
	ldr r2, _02217DB0 ; =0x0221D6E4
	add r1, r1, r0
	ldrsh r0, [r2, r0]
	str r0, [sp, #0x20]
	mov r0, #2
	ldrsh r0, [r1, r0]
	str r0, [sp, #0x1c]
	ldr r0, [sp, #0x10]
	bl ov96_021E5F24
	cmp r7, r0
	bne _02217C7E
	ldr r1, [sp, #0x20]
	add r0, sp, #0x30
	strh r1, [r0, #0x10]
	ldr r1, [sp, #0x1c]
	strh r1, [r0, #0x12]
_02217C7E:
	add r0, r5, #0
	mov r1, #2
	bl ov96_021EAC0C
	add r0, r5, #0
	mov r1, #7
	bl ov96_021EABA8
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x1c]
	add r0, r5, #0
	bl ov96_021EAF94
	bl ov96_021E6104
	add r1, r0, #0
	add r0, r5, #0
	bl ov96_021EAF6C
	add r0, sp, #0x38
	str r0, [sp]
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x1c]
	add r0, r5, #0
	add r3, sp, #0x3c
	bl ov96_021EB0A4
	ldr r0, [r6, #0xc]
	ldr r1, [sp, #0x2c]
	bic r0, r1
	mov r1, #0xf
	and r1, r4
	orr r0, r1
	str r0, [r6, #0xc]
	str r5, [r6]
	ldr r0, [sp, #0x10]
	ldr r2, [sp, #0x24]
	add r1, r7, #0
	bl ov96_0221935C
	str r0, [r6, #4]
	ldr r0, [r0, #8]
	add r4, r4, #1
	str r0, [r6, #8]
	cmp r4, #0xc
	bge _02217CDC
	b _02217BC4
_02217CDC:
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0xc]
	bl sub_0200E2B0
	add r3, r0, #0
	mov r0, #1
	str r0, [sp]
	str r0, [sp, #4]
	add r0, sp, #0x40
	str r0, [sp, #8]
	ldr r2, [sp, #0xc]
	ldr r0, [sp, #0x10]
	ldr r2, [r2, #0x18]
	mov r1, #0
	bl ov96_021E62AC
	mov r0, #0x69
	lsl r0, r0, #2
	ldr r1, [sp, #0xc]
	add r2, r0, #0
	add r4, r1, r0
	sub r2, #0xc
	add r1, r1, r2
	str r1, [sp, #0x18]
	ldr r1, [sp, #0xc]
	add r0, #0x68
	add r7, r1, r0
	add r0, r1, #0
	ldr r6, _02217DB0 ; =0x0221D6E4
	mov r5, #0
	str r0, [sp, #0x14]
_02217D1A:
	ldr r0, [sp, #0x18]
	ldr r1, [sp, #0xc]
	str r0, [r4, #8]
	mov r0, #6
	str r7, [r4, #4]
	lsl r0, r0, #6
	ldr r0, [r1, r0]
	mov r1, #0
	str r0, [r4, #0xc]
	ldr r0, [sp, #0x10]
	mov r2, #2
	str r0, [r4]
	add r0, sp, #0x30
	str r0, [sp]
	ldr r0, [r4, #4]
	ldrsh r1, [r6, r1]
	ldrsh r2, [r6, r2]
	ldr r0, [r0]
	add r3, sp, #0x34
	bl ov96_021EB0A4
	add r0, r4, #0
	mov r1, #1
	bl ov96_02218578
	ldr r1, [r4, #0x60]
	ldr r0, _02217DB4 ; =0xFFF0FFFF
	add r7, #0xa8
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x10
	orr r0, r1
	str r0, [r4, #0x60]
	ldr r0, [sp, #0x34]
	add r6, r6, #4
	lsl r0, r0, #0xc
	str r0, [r4, #0x2c]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #0xc
	str r0, [r4, #0x30]
	ldr r0, [sp, #0x34]
	lsl r0, r0, #0xc
	str r0, [r4, #0x20]
	ldr r0, [sp, #0x30]
	lsl r0, r0, #0xc
	str r0, [r4, #0x24]
	ldr r1, [r4, #0x60]
	ldr r0, _02217DB8 ; =0xFFCFFFFF
	and r1, r0
	lsl r0, r5, #0x1e
	lsr r0, r0, #0xa
	orr r0, r1
	str r0, [r4, #0x60]
	mov r0, #0
	add r1, r4, #0
	str r0, [r4, #0x54]
	add r1, #0x5f
	mov r0, #3
	strb r0, [r1]
	mov r0, #0x8f
	ldr r1, [sp, #0x14]
	lsl r0, r0, #2
	str r5, [r1, r0]
	ldr r0, [sp, #0x18]
	add r5, r5, #1
	add r0, #0xa8
	str r0, [sp, #0x18]
	add r0, r1, #0
	add r0, #0xa8
	add r4, #0xa8
	str r0, [sp, #0x14]
	cmp r5, #4
	blt _02217D1A
	add sp, #0x5c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02217DB0: .word 0x0221D6E4
_02217DB4: .word 0xFFF0FFFF
_02217DB8: .word 0xFFCFFFFF
	thumb_func_end ov96_02217B84

	thumb_func_start ov96_02217DBC
ov96_02217DBC: ; 0x02217DBC
	ldr r3, _02217DC4 ; =ov96_021EA894
	ldr r0, [r0, #0x1c]
	bx r3
	nop
_02217DC4: .word ov96_021EA894
	thumb_func_end ov96_02217DBC

	thumb_func_start ov96_02217DC8
ov96_02217DC8: ; 0x02217DC8
	push {r4, lr}
	add r4, r0, #0
	cmp r1, #3
	bhi _02217E00
	add r1, r1, r1
	add r1, pc
	ldrh r1, [r1, #6]
	lsl r1, r1, #0x10
	asr r1, r1, #0x10
	add pc, r1
_02217DDC: ; jump table
	.short _02217E04 - _02217DDC - 2 ; case 0
	.short _02217DE4 - _02217DDC - 2 ; case 1
	.short _02217DEC - _02217DDC - 2 ; case 2
	.short _02217DFA - _02217DDC - 2 ; case 3
_02217DE4:
	mov r1, #1
	bl ov96_02218578
	pop {r4, pc}
_02217DEC:
	mov r1, #7
	bl ov96_02218578
	mov r0, #1
	add r4, #0x59
	strb r0, [r4]
	pop {r4, pc}
_02217DFA:
	bl ov96_02218FFC
	pop {r4, pc}
_02217E00:
	bl GF_AssertFail
_02217E04:
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02217DC8

	thumb_func_start ov96_02217E08
ov96_02217E08: ; 0x02217E08
	push {r4, lr}
	ldr r2, [r0, #0x14]
	ldr r1, [r0, #0x18]
	ldr r0, [r0, #0x60]
	mov r4, #0
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	bne _02217E1C
	add r0, r4, #0
	pop {r4, pc}
_02217E1C:
	cmp r2, #0xc
	bhi _02217E72
	add r0, r2, r2
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02217E2C: ; jump table
	.short _02217E6C - _02217E2C - 2 ; case 0
	.short _02217E60 - _02217E2C - 2 ; case 1
	.short _02217E60 - _02217E2C - 2 ; case 2
	.short _02217E6C - _02217E2C - 2 ; case 3
	.short _02217E6C - _02217E2C - 2 ; case 4
	.short _02217E48 - _02217E2C - 2 ; case 5
	.short _02217E48 - _02217E2C - 2 ; case 6
	.short _02217E48 - _02217E2C - 2 ; case 7
	.short _02217E48 - _02217E2C - 2 ; case 8
	.short _02217E60 - _02217E2C - 2 ; case 9
	.short _02217E6C - _02217E2C - 2 ; case 10
	.short _02217E46 - _02217E2C - 2 ; case 11
	.short _02217E48 - _02217E2C - 2 ; case 12
_02217E46:
	b _02217E76
_02217E48:
	cmp r1, #0xb
	beq _02217E50
	cmp r1, #6
	bne _02217E54
_02217E50:
	mov r4, #3
	b _02217E76
_02217E54:
	cmp r2, #6
	bne _02217E5C
	mov r4, #2
	b _02217E76
_02217E5C:
	mov r4, #1
	b _02217E76
_02217E60:
	cmp r1, #0xb
	beq _02217E68
	cmp r1, #6
	bne _02217E76
_02217E68:
	mov r4, #3
	b _02217E76
_02217E6C:
	bl GF_AssertFail
	b _02217E76
_02217E72:
	bl GF_AssertFail
_02217E76:
	add r0, r4, #0
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02217E08

	thumb_func_start ov96_02217E7C
ov96_02217E7C: ; 0x02217E7C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x30
	bl ov96_021E5DC4
	mov r1, #0x62
	lsl r1, r1, #2
	str r0, [sp, #8]
	add r0, r0, r1
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [sp, #8]
	add r1, #0x1c
	ldr r7, [sp, #4]
	add r4, r0, r1
_02217E9A:
	add r0, r4, #0
	bl ov96_02218744
	cmp r0, #0
	beq _02217EB4
	mov r0, #0x5d
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _02217EB4
	ldr r0, [sp, #0xc]
	add r6, r0, #1
	cmp r6, #4
	blt _02217EB6
_02217EB4:
	b _02217FBC
_02217EB6:
	mov r1, #0x69
	ldr r0, [sp, #8]
	lsl r1, r1, #2
	add r1, r0, r1
	mov r0, #0xa8
	mul r0, r6
	add r5, r1, r0
	ldr r1, [sp, #4]
	ldr r0, [sp, #0xc]
	add r1, r1, r0
	lsl r0, r6, #2
	add r0, r1, r0
	str r0, [sp]
	add r0, r4, #0
	str r0, [sp, #0x10]
	add r0, #0x2c
	str r0, [sp, #0x10]
_02217ED8:
	add r0, r5, #0
	bl ov96_02218744
	cmp r0, #0
	beq _02217FAE
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_02218598
	cmp r0, #0
	beq _02217FAE
	mov r1, #0
	add r0, sp, #0x24
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldrb r0, [r7, r6]
	cmp r0, #0
	beq _02217F0E
	ldr r0, [r4, #0x60]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	bne _02217F0E
	ldr r0, [sp]
	strb r1, [r0]
	ldrb r0, [r0]
	strb r0, [r7, r6]
_02217F0E:
	ldrb r0, [r7, r6]
	cmp r0, #0
	bne _02217FAE
	add r1, r5, #0
	ldr r0, [sp, #0x10]
	add r1, #0x2c
	add r2, sp, #0x24
	bl VEC_Subtract
	ldr r0, [sp, #0x24]
	cmp r0, #0
	bne _02217F44
	ldr r0, [sp, #0x28]
	cmp r0, #0
	bne _02217F44
	bl MTRandom
	mov r1, #0x3f
	and r0, r1
	sub r0, #0x20
	str r0, [sp, #0x24]
	bl MTRandom
	mov r1, #0x3f
	and r0, r1
	sub r0, #0x20
	str r0, [sp, #0x28]
_02217F44:
	add r0, sp, #0x24
	add r1, r0, #0
	bl VEC_Normalize
	add r0, r4, #0
	add r1, r5, #0
	add r2, sp, #0x24
	bl ov96_022178A0
	str r0, [sp, #0x14]
	mov r0, #0
	ldr r1, [sp, #0x24]
	mvn r0, r0
	mul r0, r1
	str r0, [sp, #0x24]
	mov r0, #0
	ldr r1, [sp, #0x28]
	mvn r0, r0
	mul r0, r1
	str r0, [sp, #0x28]
	add r0, r5, #0
	add r1, r4, #0
	add r2, sp, #0x24
	bl ov96_022178A0
	str r0, [sp, #0x18]
	add r0, r4, #0
	bl ov96_02217E08
	str r0, [sp, #0x1c]
	add r0, r5, #0
	bl ov96_02217E08
	str r0, [sp, #0x20]
	ldr r1, [sp, #0x1c]
	add r0, r4, #0
	bl ov96_02217DC8
	ldr r1, [sp, #0x20]
	add r0, r5, #0
	bl ov96_02217DC8
	ldr r0, [sp, #0x14]
	cmp r0, #0
	bne _02217FA4
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _02217FAE
_02217FA4:
	ldr r0, [sp]
	mov r1, #1
	strb r1, [r0]
	ldrb r0, [r0]
	strb r0, [r7, r6]
_02217FAE:
	ldr r0, [sp]
	add r6, r6, #1
	add r0, r0, #4
	add r5, #0xa8
	str r0, [sp]
	cmp r6, #4
	blt _02217ED8
_02217FBC:
	ldr r0, [sp, #0xc]
	add r4, #0xa8
	add r0, r0, #1
	add r7, r7, #4
	str r0, [sp, #0xc]
	cmp r0, #4
	bge _02217FCC
	b _02217E9A
_02217FCC:
	add sp, #0x30
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02217E7C

	thumb_func_start ov96_02217FD0
ov96_02217FD0: ; 0x02217FD0
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x18
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #0x10]
_02217FDA:
	ldr r6, [sp, #4]
	ldr r5, [sp, #4]
	add r6, #0xc
	add r0, r6, #0
	add r4, r6, #0
	str r0, [sp, #0x14]
	add r0, #0x5c
	mov r7, #0
	add r5, #0x74
	add r4, #0x60
	str r0, [sp, #0x14]
_02217FF0:
	mov r0, #0
	str r0, [sp, #8]
	ldr r0, [r5, #4]
	ldr r0, [r0, #8]
	str r0, [sp, #0xc]
	ldr r0, [r6, #0x60]
	lsl r1, r0, #8
	lsr r1, r1, #0x1e
	cmp r1, r7
	bne _0221807E
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _0221803E
	ldr r1, [sp, #0x14]
	mov r0, #0
	ldrsb r0, [r1, r0]
	sub r1, r0, #1
	ldr r0, [sp, #0x14]
	strb r1, [r0]
	mov r0, #0x5c
	ldrsb r0, [r6, r0]
	cmp r0, #0
	bgt _02218082
	mov r0, #5
	add r3, r6, #0
	lsl r0, r0, #0xe
	add r2, r6, #0
	add r3, #0x2c
	str r0, [r5, #8]
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [r4]
	ldr r0, _022180BC ; =0xEFFFFFFF
	and r0, r1
	str r0, [r4]
	b _02218082
_0221803E:
	ldr r0, [r5, #8]
	cmp r0, #0
	bgt _02218082
	add r1, r6, #0
	add r1, #0x5c
	mov r0, #0x3c
	strb r0, [r1]
	mov r0, #1
	ldr r1, [r4]
	lsl r0, r0, #0x1c
	orr r1, r0
	ldr r0, _022180C0 ; =0xDFFFFFFF
	mov r3, #1
	and r1, r0
	ldr r0, _022180C4 ; =0xBFFFFFFF
	and r0, r1
	str r0, [r4]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r6, #0x60]
	ldr r0, [r6]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	b _02218082
_0221807E:
	ldr r0, _022180C8 ; =0x444CC000
	str r0, [sp, #8]
_02218082:
	ldr r0, [r5, #8]
	bl _itof
	ldr r1, [sp, #8]
	bl _fadd
	bl _ftoi
	ldr r1, [sp, #0xc]
	str r0, [r5, #8]
	cmp r0, r1
	ble _0221809E
	add r0, r1, #0
	str r0, [r5, #8]
_0221809E:
	add r7, r7, #1
	add r5, #0x10
	cmp r7, #3
	blt _02217FF0
	ldr r0, [sp, #4]
	add r0, #0xa8
	str r0, [sp, #4]
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	str r0, [sp, #0x10]
	cmp r0, #4
	blt _02217FDA
	add sp, #0x18
	pop {r3, r4, r5, r6, r7, pc}
	nop
_022180BC: .word 0xEFFFFFFF
_022180C0: .word 0xDFFFFFFF
_022180C4: .word 0xBFFFFFFF
_022180C8: .word 0x444CC000
	thumb_func_end ov96_02217FD0

	thumb_func_start ov96_022180CC
ov96_022180CC: ; 0x022180CC
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	str r0, [sp]
	mov r0, #0
	mov r7, #0x3f
	ldr r5, [sp]
	str r1, [sp, #4]
	str r0, [sp, #8]
	lsl r7, r7, #0x18
_022180DE:
	mov r1, #0
	add r0, sp, #0x18
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, sp, #0xc
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	add r0, r1, #0
	add r6, r5, #0
	add r4, r5, #0
	ldrsh r0, [r5, r0]
	add r6, #8
	add r4, #0xc
	cmp r0, #0
	ble _02218110
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r7, #0
	bl _fadd
	b _0221811C
_02218110:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r7, #0
	bl _fsub
_0221811C:
	bl _ftoi
	str r0, [sp, #0x18]
	mov r0, #2
	ldrsh r0, [r5, r0]
	cmp r0, #0
	ble _0221813A
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r7, #0
	bl _fadd
	b _02218146
_0221813A:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r7, #0
	bl _fsub
_02218146:
	bl _ftoi
	str r0, [sp, #0x1c]
	mov r0, #4
	ldrsh r0, [r5, r0]
	cmp r0, #0
	ble _02218164
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r7, #0
	bl _fadd
	b _02218170
_02218164:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r7, #0
	bl _fsub
_02218170:
	bl _ftoi
	str r0, [sp, #0xc]
	mov r0, #6
	ldrsh r0, [r5, r0]
	cmp r0, #0
	ble _0221818E
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r7, #0
	bl _fadd
	b _0221819A
_0221818E:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r7, #0
	bl _fsub
_0221819A:
	bl _ftoi
	str r0, [sp, #0x10]
	ldr r1, [r6]
	lsl r0, r1, #0x11
	lsr r0, r0, #0x1f
	beq _02218226
	mov r0, #0
	mov r1, #2
	ldrsh r0, [r5, r0]
	ldrsh r1, [r5, r1]
	bl ov96_022158D4
	cmp r0, #0
	beq _022181CC
	add r0, r4, #0
	bl ov96_0221862C
	cmp r0, #0
	bne _022181C4
	b _022182FC
_022181C4:
	add r0, r4, #0
	bl ov96_0221910C
	b _022182FC
_022181CC:
	bl ov96_021E6104
	cmp r0, #0
	ble _022181E8
	bl ov96_021E6104
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r7, #0
	bl _fadd
	b _022181F8
_022181E8:
	bl ov96_021E6104
	lsl r0, r0, #0xc
	bl _itof
	add r1, r7, #0
	bl _fsub
_022181F8:
	bl _ftoi
	add r2, r0, #0
	ldr r0, [r4, #0x60]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	bne _022182FC
	ldr r0, [r4, #0x14]
	cmp r0, #3
	beq _022182FC
	add r4, #0x2c
	add r0, r4, #0
	add r1, sp, #0x18
	bl ov96_022158EC
	cmp r0, #0
	beq _022182FC
	mov r0, #2
	ldr r1, [r6]
	lsl r0, r0, #0x1c
	orr r0, r1
	str r0, [r6]
	b _022182FC
_02218226:
	lsl r0, r1, #0x10
	lsr r0, r0, #0x1f
	beq _02218274
	lsl r0, r1, #2
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _022182FC
	ldr r0, [r4, #0x2c]
	lsl r0, r0, #4
	asr r3, r0, #0x10
	ldr r0, [r4, #0x30]
	lsl r0, r0, #4
	asr r2, r0, #0x10
	ldr r0, [r4, #0x14]
	cmp r0, #3
	bne _0221824E
	ldr r0, _02218328 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r6]
	b _022182FC
_0221824E:
	mov r0, #0
	ldrsh r0, [r5, r0]
	sub r0, r0, r3
	bpl _02218258
	neg r0, r0
_02218258:
	cmp r0, #1
	bgt _0221826A
	mov r0, #2
	ldrsh r0, [r5, r0]
	sub r0, r0, r2
	bpl _02218266
	neg r0, r0
_02218266:
	cmp r0, #1
	ble _022182FC
_0221826A:
	add r0, r4, #0
	add r1, r5, #0
	bl ov96_022186B8
	b _022182FC
_02218274:
	lsl r0, r1, #3
	lsr r0, r0, #0x13
	beq _022182FC
	lsl r0, r1, #2
	lsr r0, r0, #0x1f
	cmp r0, #1
	bne _022182F4
	ldr r0, [r4, #0x14]
	cmp r0, #1
	beq _0221828C
	cmp r0, #4
	bne _022182F4
_0221828C:
	ldr r0, [r4, #0x60]
	lsl r1, r0, #3
	lsr r1, r1, #0x1f
	bne _022182F4
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	bne _022182F4
	mov r2, #1
	add r0, sp, #0xc
	add r1, sp, #0x18
	lsl r2, r2, #0xe
	bl ov96_022158EC
	cmp r0, #0
	beq _022182C4
	ldr r0, [r6]
	lsl r0, r0, #3
	lsr r0, r0, #0x13
	cmp r0, #7
	bhi _022182F4
	ldr r1, [r4, #0x60]
	ldr r0, _0221832C ; =0xBFFFFFFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x1c
	orr r0, r1
	str r0, [r4, #0x60]
	b _022182F4
_022182C4:
	mov r2, #3
	add r0, sp, #0xc
	add r1, sp, #0x18
	lsl r2, r2, #0xe
	bl ov96_022158EC
	cmp r0, #0
	bne _022182F4
	ldr r0, [r6]
	lsl r0, r0, #3
	lsr r0, r0, #0x13
	cmp r0, #7
	bhi _022182F4
	mov r0, #1
	ldr r1, [r4, #0x60]
	lsl r0, r0, #0x1e
	orr r1, r0
	ldr r0, _02218328 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r4, #0x60]
	ldrh r0, [r5]
	strh r0, [r4, #0x1c]
	ldrh r0, [r5, #2]
	strh r0, [r4, #0x1e]
_022182F4:
	ldr r1, [r6]
	ldr r0, _02218328 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r6]
_022182FC:
	add r0, r5, #0
	ldr r1, [sp, #4]
	add r0, #0xc
	bl ov96_02218B1C
	ldr r0, [sp, #8]
	add r5, #0xa8
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	bge _02218314
	b _022180DE
_02218314:
	ldr r0, [sp, #4]
	bl ov96_02217E7C
	ldr r0, [sp]
	ldr r1, [sp, #4]
	bl ov96_02217FD0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_02218328: .word 0xDFFFFFFF
_0221832C: .word 0xBFFFFFFF
	thumb_func_end ov96_022180CC

	thumb_func_start ov96_02218330
ov96_02218330: ; 0x02218330
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	add r0, r1, #0
	bl ov96_021E5F54
	add r0, #0x28
	bl ov96_021E8A20
	str r0, [sp, #8]
	mov r2, #0x30
	str r2, [sp, #0x14]
	mov r2, #0xc0
	ldr r0, [sp]
	str r2, [sp, #0x10]
	str r2, [sp, #0xc]
	mov r2, #0x3f
	mov ip, r2
	mov r2, #0xf
	str r2, [sp, #0x20]
	mov r2, #0x60
	str r2, [sp, #0x1c]
	mov r2, #7
	ldr r1, [sp, #8]
	mov r6, #0
	add r0, #0x1c
	mov r7, #0x18
	str r2, [sp, #0x18]
_0221836C:
	ldr r2, [r0, #0x2c]
	ldr r3, [r0, #0x30]
	lsl r2, r2, #4
	lsl r3, r3, #4
	ldr r4, [r0, #0x64]
	asr r2, r2, #0x10
	asr r3, r3, #0x10
	cmp r4, #0
	beq _02218384
	sub r4, r4, #1
	str r4, [r0, #0x64]
	b _02218392
_02218384:
	bne _02218392
	ldr r5, [r0, #0x60]
	ldr r4, _02218504 ; =0xFFFFCFFF
	and r5, r4
	ldr r4, _02218508 ; =0xFFFF3FFF
	and r4, r5
	str r4, [r0, #0x60]
_02218392:
	ldrb r4, [r1, #4]
	ldr r5, [sp, #0x14]
	bic r4, r5
	ldr r5, [r0, #0x60]
	lsl r5, r5, #0x12
	lsr r5, r5, #0x1e
	lsl r5, r5, #0x18
	lsr r5, r5, #0x18
	lsl r5, r5, #0x1e
	lsr r5, r5, #0x1a
	orr r4, r5
	strb r4, [r1, #4]
	ldrb r4, [r1, #2]
	ldr r5, [sp, #0x10]
	bic r4, r5
	ldr r5, [r0, #0x60]
	lsl r5, r5, #0x10
	lsr r5, r5, #0x1e
	lsl r5, r5, #0x18
	lsr r5, r5, #0x18
	lsl r5, r5, #0x1e
	lsr r5, r5, #0x18
	orr r4, r5
	strb r4, [r1, #2]
	ldrb r4, [r1, #4]
	ldr r5, [sp, #0xc]
	bic r4, r5
	ldr r5, [r0, #0x60]
	lsl r5, r5, #8
	lsr r5, r5, #0x1e
	lsl r5, r5, #0x18
	lsr r5, r5, #0x18
	lsl r5, r5, #0x1e
	lsr r5, r5, #0x18
	orr r4, r5
	strb r4, [r1, #4]
	ldr r5, [r0, #0x60]
	ldrb r4, [r1, #5]
	lsl r5, r5, #0xc
	lsr r5, r5, #0x1c
	sub r5, r5, #1
	lsl r5, r5, #0x18
	lsr r5, r5, #0x18
	lsl r5, r5, #0x1e
	bic r4, r7
	lsr r5, r5, #0x1b
	orr r4, r5
	strb r4, [r1, #5]
	cmp r2, #0xff
	ble _022183FA
	mov r2, #0xff
	b _02218400
_022183FA:
	cmp r2, #0
	bge _02218400
	mov r2, #0
_02218400:
	strb r2, [r1]
	cmp r3, #0xff
	ble _0221840A
	mov r3, #0xff
	b _02218410
_0221840A:
	cmp r3, #0
	bge _02218410
	mov r3, #0
_02218410:
	strb r3, [r1, #1]
	ldrb r4, [r1, #2]
	mov r2, ip
	bic r4, r2
	ldr r2, [r0, #0x50]
	asr r2, r2, #0xc
	lsl r2, r2, #0x18
	lsr r3, r2, #0x18
	mov r2, #0x3f
	and r2, r3
	orr r2, r4
	strb r2, [r1, #2]
	ldrb r4, [r1, #4]
	ldr r2, [sp, #0x20]
	bic r4, r2
	ldr r2, [r0, #0x14]
	lsl r2, r2, #0x18
	lsr r3, r2, #0x18
	mov r2, #0xf
	and r2, r3
	orr r2, r4
	strb r2, [r1, #4]
	ldr r2, [r0, #0x60]
	ldr r3, [sp, #0x1c]
	lsl r2, r2, #0x14
	lsr r2, r2, #0x14
	strb r2, [r1, #3]
	ldrb r2, [r1, #5]
	bic r2, r3
	ldr r3, [r0, #0x60]
	lsl r3, r3, #6
	lsr r3, r3, #0x1e
	lsl r3, r3, #0x18
	lsr r3, r3, #0x18
	lsl r3, r3, #0x1e
	lsr r3, r3, #0x19
	orr r2, r3
	strb r2, [r1, #5]
	ldrb r4, [r1, #5]
	ldr r2, [sp, #0x18]
	bic r4, r2
	add r2, r0, #0
	add r2, #0x5f
	ldrb r3, [r2]
	mov r2, #7
	and r2, r3
	orr r2, r4
	strb r2, [r1, #5]
	ldr r2, [r0, #0x60]
	lsr r3, r2, #0x1f
	beq _02218480
	mov r3, #1
	str r3, [sp, #4]
	ldr r3, _0221850C ; =0x7FFFFFFF
	and r2, r3
	str r2, [r0, #0x60]
_02218480:
	add r6, r6, #1
	add r0, #0xa8
	add r1, r1, #6
	cmp r6, #4
	bge _0221848C
	b _0221836C
_0221848C:
	ldr r0, [sp, #8]
	ldr r6, [sp, #8]
	ldr r1, [r0, #0x1c]
	mov r0, #0x80
	bic r1, r0
	ldr r0, [sp, #4]
	mov r5, #0
	lsl r0, r0, #0x1f
	lsr r0, r0, #0x18
	orr r1, r0
	ldr r0, [sp, #8]
	add r6, #0x1c
	str r1, [r0, #0x1c]
	lsl r0, r1, #0x18
	lsr r1, r0, #0x18
	ldr r0, [sp, #8]
	add r4, r5, #0
	str r1, [r0, #0x1c]
_022184B0:
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	add r7, r0, #0
	add r0, r5, #0
	mov r1, #3
	bl _s32_div_f
	mov r0, #0xa8
	lsl r2, r1, #4
	ldr r1, [sp]
	mul r0, r7
	add r0, r1, r0
	add r0, r2, r0
	add r0, #0x8c
	ldr r0, [r0]
	asr r0, r0, #0xc
	bne _022184DA
	mov r1, #2
	b _022184E4
_022184DA:
	cmp r0, #0x1e
	bge _022184E2
	mov r1, #1
	b _022184E4
_022184E2:
	mov r1, #0
_022184E4:
	ldr r2, [r6]
	lsl r1, r4
	lsl r0, r2, #0x18
	lsr r2, r2, #8
	add r1, r2, r1
	lsr r0, r0, #0x18
	lsl r1, r1, #8
	orr r0, r1
	add r5, r5, #1
	add r4, r4, #2
	str r0, [r6]
	cmp r5, #0xc
	blt _022184B0
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	nop
_02218504: .word 0xFFFFCFFF
_02218508: .word 0xFFFF3FFF
_0221850C: .word 0x7FFFFFFF
	thumb_func_end ov96_02218330

	thumb_func_start ov96_02218510
ov96_02218510: ; 0x02218510
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r6, r0, #0
	add r5, r1, #0
	bl ov96_021EAA20
	add r7, r0, #0
	bl ov96_021E90FC
	add r4, r0, #0
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	add r0, r7, #0
	bl ov96_021E8BB0
	ldrh r0, [r0, #4]
	cmp r0, #0
	beq _0221853E
	mov r0, #0x40
	b _02218540
_0221853E:
	mov r0, #0x20
_02218540:
	cmp r5, #0
	beq _0221855E
	lsr r1, r0, #0x1f
	add r1, r0, r1
	asr r1, r1, #1
	lsl r1, r1, #0xc
	str r1, [sp]
	sub r1, r0, r4
	lsr r0, r1, #0x1f
	add r0, r1, r0
	asr r0, r0, #1
	add r0, r4, r0
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	b _0221856C
_0221855E:
	lsr r1, r0, #0x1f
	add r1, r0, r1
	asr r1, r1, #1
	lsl r1, r1, #0xc
	lsl r0, r0, #0xc
	str r1, [sp]
	str r0, [sp, #4]
_0221856C:
	add r0, r6, #0
	add r1, sp, #0
	bl ov96_021EABF4
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02218510

	thumb_func_start ov96_02218578
ov96_02218578: ; 0x02218578
	cmp r1, #4
	bne _02218580
	mov r3, #0x3c
	b _02218582
_02218580:
	mov r3, #0
_02218582:
	add r2, r0, #0
	add r2, #0x5e
	strb r3, [r2]
	cmp r1, #7
	bne _02218594
	add r2, r0, #0
	mov r3, #0x10
	add r2, #0x59
	strb r3, [r2]
_02218594:
	str r1, [r0, #0x14]
	bx lr
	thumb_func_end ov96_02218578

	thumb_func_start ov96_02218598
ov96_02218598: ; 0x02218598
	push {r4, r5, lr}
	sub sp, #0x34
	add r5, r0, #0
	add r4, r1, #0
	ldr r1, [r5, #0x50]
	ldr r0, [r4, #0x50]
	sub r1, r1, r0
	bpl _022185AA
	neg r1, r1
_022185AA:
	mov r0, #5
	lsl r0, r0, #0xc
	cmp r1, r0
	ble _022185B8
	add sp, #0x34
	mov r0, #0
	pop {r4, r5, pc}
_022185B8:
	add r0, sp, #0x20
	str r0, [sp]
	add r0, sp, #0xc
	str r0, [sp, #4]
	ldr r0, [r5, #4]
	ldr r1, [r5, #0x2c]
	ldr r0, [r0]
	ldr r2, [r5, #0x30]
	add r3, sp, #0x1c
	bl ov96_021EAF78
	add r0, sp, #0x14
	str r0, [sp]
	add r0, sp, #8
	str r0, [sp, #4]
	ldr r0, [r4, #4]
	ldr r1, [r4, #0x2c]
	ldr r0, [r0]
	ldr r2, [r4, #0x30]
	add r3, sp, #0x10
	bl ov96_021EAF78
	ldr r0, [r5, #0x14]
	cmp r0, #6
	bne _022185F0
	ldr r0, [sp, #0xc]
	add r0, #8
	str r0, [sp, #0xc]
_022185F0:
	ldr r0, [r4, #0x14]
	cmp r0, #6
	bne _022185FC
	ldr r0, [sp, #8]
	add r0, #8
	str r0, [sp, #8]
_022185FC:
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #8]
	add r2, sp, #0x28
	add r0, r1, r0
	lsl r4, r0, #0xc
	mov r0, #0
	str r0, [sp, #0x24]
	str r0, [sp, #0x18]
	add r0, sp, #0x1c
	add r1, sp, #0x10
	bl VEC_Subtract
	add r0, sp, #0x28
	bl VEC_Mag
	cmp r0, r4
	bgt _02218624
	add sp, #0x34
	mov r0, #1
	pop {r4, r5, pc}
_02218624:
	mov r0, #0
	add sp, #0x34
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02218598

	thumb_func_start ov96_0221862C
ov96_0221862C: ; 0x0221862C
	push {r3, r4, lr}
	sub sp, #0xc
	add r4, r0, #0
	bl ov96_02218688
	cmp r0, #0
	beq _02218676
	add r1, sp, #0
	mov r0, #0
	str r0, [r1]
	str r0, [r1, #4]
	str r0, [r1, #8]
	ldr r0, [r4, #0x60]
	add r4, #0x2c
	lsl r0, r0, #0xa
	lsr r0, r0, #0x1e
	lsl r0, r0, #0x18
	lsr r3, r0, #0x18
	add r2, r3, #0
	mov r0, #6
	mul r2, r0
	ldr r0, _0221867C ; =0x0221D708
	ldr r3, _02218680 ; =0x0221D70C
	ldrsh r0, [r0, r2]
	lsl r0, r0, #0xc
	str r0, [sp]
	ldr r0, _02218684 ; =0x0221D70A
	ldrsh r0, [r0, r2]
	ldrsh r2, [r3, r2]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	add r0, r4, #0
	lsl r2, r2, #0xc
	bl ov96_022158EC
	add sp, #0xc
	pop {r3, r4, pc}
_02218676:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
_0221867C: .word 0x0221D708
_02218680: .word 0x0221D70C
_02218684: .word 0x0221D70A
	thumb_func_end ov96_0221862C

	thumb_func_start ov96_02218688
ov96_02218688: ; 0x02218688
	ldr r2, [r0, #0x60]
	lsl r1, r2, #4
	lsr r1, r1, #0x1f
	beq _02218694
	mov r0, #0
	bx lr
_02218694:
	lsl r1, r2, #3
	lsr r1, r1, #0x1f
	beq _0221869E
	mov r0, #0
	bx lr
_0221869E:
	lsl r1, r2, #5
	lsr r1, r1, #0x1f
	beq _022186A8
	mov r0, #0
	bx lr
_022186A8:
	ldr r0, [r0, #0x14]
	cmp r0, #1
	bne _022186B2
	mov r0, #1
	bx lr
_022186B2:
	mov r0, #0
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02218688

	thumb_func_start ov96_022186B8
ov96_022186B8: ; 0x022186B8
	mov r2, #0
	ldrsh r2, [r1, r2]
	lsl r2, r2, #0xc
	str r2, [r0, #0x20]
	mov r2, #2
	ldrsh r1, [r1, r2]
	lsl r1, r1, #0xc
	str r1, [r0, #0x24]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_022186B8

	thumb_func_start ov96_022186CC
ov96_022186CC: ; 0x022186CC
	push {r3, r4, r5, lr}
	sub sp, #0x18
	ldr r5, _02218740 ; =0x0221D6B8
	add r3, r0, #0
	ldmia r5!, {r0, r1}
	add r4, sp, #0xc
	add r2, r4, #0
	stmia r4!, {r0, r1}
	ldr r0, [r5]
	add r1, sp, #0
	str r0, [r4]
	mov r4, #0
	str r4, [r1]
	str r4, [r1, #4]
	str r4, [r1, #8]
	ldr r0, [r3, #4]
	str r0, [sp]
	ldr r0, [r3]
	str r0, [sp, #8]
	add r0, r2, #0
	str r4, [sp, #4]
	bl sub_02020C64
	mov r2, #2
	lsl r2, r2, #0xc
	cmp r0, r2
	bls _0221870A
	mov r1, #0xe
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _02218710
_0221870A:
	add sp, #0x18
	mov r0, #4
	pop {r3, r4, r5, pc}
_02218710:
	cmp r0, r2
	bls _02218722
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	bhs _02218722
	add sp, #0x18
	mov r0, #2
	pop {r3, r4, r5, pc}
_02218722:
	mov r1, #6
	lsl r1, r1, #0xc
	cmp r0, r1
	blo _02218738
	mov r1, #0xa
	lsl r1, r1, #0xc
	cmp r0, r1
	bhi _02218738
	add sp, #0x18
	mov r0, #3
	pop {r3, r4, r5, pc}
_02218738:
	mov r0, #1
	add sp, #0x18
	pop {r3, r4, r5, pc}
	nop
_02218740: .word 0x0221D6B8
	thumb_func_end ov96_022186CC

	thumb_func_start ov96_02218744
ov96_02218744: ; 0x02218744
	push {r3, r4, r5, lr}
	add r4, r0, #0
	bne _0221874E
	bl GF_AssertFail
_0221874E:
	ldr r0, [r4, #0x14]
	cmp r0, #0
	bne _02218758
	bl GF_AssertFail
_02218758:
	ldr r5, [r4, #0x14]
	mov r0, #0
	add r2, r0, #0
	add r3, r0, #0
	cmp r5, #0xa
	beq _0221876E
	ldr r1, [r4, #0x60]
	lsl r1, r1, #5
	lsr r1, r1, #0x1f
	bne _0221876E
	mov r3, #1
_0221876E:
	cmp r3, #0
	beq _02218778
	cmp r5, #4
	beq _02218778
	mov r2, #1
_02218778:
	cmp r2, #0
	beq _02218782
	cmp r5, #3
	beq _02218782
	mov r0, #1
_02218782:
	pop {r3, r4, r5, pc}
	thumb_func_end ov96_02218744

	thumb_func_start ov96_02218784
ov96_02218784: ; 0x02218784
	push {r4, lr}
	add r4, r1, #0
	bl ov96_021E5DC4
	mov r1, #0x62
	lsl r1, r1, #2
	add r1, r0, r1
	lsl r0, r4, #2
	mov r2, #0
	add r1, r1, r0
	add r0, r2, #0
_0221879A:
	add r2, r2, #1
	strb r0, [r1]
	add r1, r1, #1
	cmp r2, #4
	blt _0221879A
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02218784

	thumb_func_start ov96_022187A8
ov96_022187A8: ; 0x022187A8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x58
	add r5, r0, #0
	str r1, [sp]
	add r1, r5, #0
	add r0, #0x20
	add r1, #0x2c
	add r2, sp, #0x4c
	bl VEC_Subtract
	add r0, sp, #0x4c
	bl VEC_Mag
	add r7, r0, #0
	cmp r7, #0
	ble _022187CC
	mov r4, #1
	b _022187CE
_022187CC:
	mov r4, #0
_022187CE:
	ldr r0, [r5, #0x60]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	beq _02218884
	ldr r0, [r5, #0x18]
	cmp r0, #0
	bne _022187E0
	bl GF_AssertFail
_022187E0:
	ldr r0, [r5, #0x18]
	cmp r0, #6
	beq _022187EA
	cmp r0, #9
	bne _022187F0
_022187EA:
	mov r6, #1
	lsl r6, r6, #0xc
	b _022187F2
_022187F0:
	ldr r6, _02218928 ; =0x00000B33
_022187F2:
	mov r0, #0x58
	ldrsb r0, [r5, r0]
	cmp r0, #0
	bgt _0221883E
	mov r2, #0
	add r0, sp, #0x10
	str r2, [r0]
	add r1, sp, #0x1c
	str r2, [r0, #4]
	str r2, [r1]
	str r2, [r0, #8]
	add r0, r5, #0
	str r2, [r1, #4]
	add r0, #0x44
	str r2, [r1, #8]
	bl VEC_Normalize
	add r0, r6, #0
	add r1, sp, #0x1c
	add r2, sp, #0x10
	add r3, sp, #0x28
	bl VEC_MultAdd
	ldr r0, [sp, #0x28]
	cmp r0, #0
	bge _02218828
	neg r0, r0
_02218828:
	ldr r2, [sp, #0x2c]
	str r0, [sp, #0x28]
	cmp r2, #0
	bge _02218832
	neg r2, r2
_02218832:
	add r0, r5, #0
	ldr r1, [sp, #0x28]
	add r0, #0x44
	str r2, [sp, #0x2c]
	bl ov96_02215944
_0221883E:
	add r0, r5, #0
	add r0, #0x2c
	add r1, r5, #0
	add r1, #0x44
	add r2, r0, #0
	bl VEC_Add
	add r3, r5, #0
	add r3, #0x2c
	add r2, r5, #0
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r0, [r5, #0x44]
	cmp r0, #0
	bne _02218922
	ldr r0, [r5, #0x48]
	cmp r0, #0
	bne _02218922
	ldr r1, [r5, #0x60]
	ldr r0, [sp]
	lsl r1, r1, #0xa
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02218784
	mov r0, #0
	str r0, [r5, #0x10]
	ldr r1, [r5, #0x60]
	ldr r0, _0221892C ; =0xF7FFFFFF
	and r0, r1
	str r0, [r5, #0x60]
_02218884:
	ldr r0, [r5, #0x60]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	bne _02218922
	mov r0, #0x58
	ldrsb r0, [r5, r0]
	cmp r0, #0
	bgt _02218922
	cmp r4, #0
	beq _02218922
	add r0, sp, #0x4c
	add r1, sp, #0x40
	bl VEC_Normalize
	ldr r0, [r5, #0x60]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	bne _022188BC
	add r0, sp, #0x40
	bl ov96_022186CC
	lsl r0, r0, #0x1c
	ldr r2, [r5, #0x60]
	ldr r1, _02218930 ; =0xFFF0FFFF
	lsr r0, r0, #0xc
	and r1, r2
	orr r0, r1
	str r0, [r5, #0x60]
_022188BC:
	ldr r1, [r5, #4]
	ldr r0, [r1, #4]
	ldr r2, [r1, #8]
	mov r1, #0x1e
	lsl r1, r1, #0xc
	ldr r0, [r0, #0xc]
	cmp r2, r1
	bge _022188E6
	asr r1, r0, #0x1f
	lsr r2, r0, #0x15
	lsl r1, r1, #0xb
	lsl r3, r0, #0xb
	mov r0, #2
	orr r1, r2
	mov r2, #0
	lsl r0, r0, #0xa
	add r0, r3, r0
	adc r1, r2
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
_022188E6:
	cmp r7, r0
	bgt _022188F8
	add r3, sp, #0x4c
	ldmia r3!, {r0, r1}
	add r2, sp, #0x34
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	b _0221890A
_022188F8:
	add r2, sp, #4
	mov r1, #0
	str r1, [r2]
	str r1, [r2, #4]
	str r1, [r2, #8]
	add r1, sp, #0x40
	add r3, sp, #0x34
	bl VEC_MultAdd
_0221890A:
	add r0, r5, #0
	add r0, #0x2c
	add r1, sp, #0x34
	add r2, r0, #0
	bl VEC_Add
	add r2, sp, #0x40
	ldmia r2!, {r0, r1}
	add r5, #0x38
	stmia r5!, {r0, r1}
	ldr r0, [r2]
	str r0, [r5]
_02218922:
	add sp, #0x58
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02218928: .word 0x00000B33
_0221892C: .word 0xF7FFFFFF
_02218930: .word 0xFFF0FFFF
	thumb_func_end ov96_022187A8

	thumb_func_start ov96_02218934
ov96_02218934: ; 0x02218934
	push {r4, r5, r6, r7, lr}
	sub sp, #0x3c
	ldr r3, [r0, #0x2c]
	cmp r3, #0
	ble _02218944
	ldr r2, [r0, #0x30]
	cmp r2, #0
	bgt _0221894A
_02218944:
	add sp, #0x3c
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_0221894A:
	add r1, sp, #4
	str r1, [sp]
	ldr r0, [r0, #4]
	asr r1, r3, #0xc
	ldr r0, [r0]
	asr r2, r2, #0xc
	add r3, sp, #8
	bl ov96_021EB06C
	ldr r4, [sp, #4]
	cmp r4, #0x40
	blt _02218A46
	cmp r4, #0xa0
	bgt _02218A46
	ldr r0, [sp, #8]
	cmp r0, #0
	ble _0221897E
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _0221898C
_0221897E:
	lsl r0, r0, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_0221898C:
	bl _ftoi
	add r7, r0, #0
	cmp r4, #0
	ble _022189A8
	lsl r0, r4, #0xc
	bl _itof
	add r1, r0, #0
	mov r0, #0x3f
	lsl r0, r0, #0x18
	bl _fadd
	b _022189B6
_022189A8:
	lsl r0, r4, #0xc
	bl _itof
	mov r1, #0x3f
	lsl r1, r1, #0x18
	bl _fsub
_022189B6:
	bl _ftoi
	add r4, r0, #0
	mov r0, #0
	ldr r1, _02218A4C ; =0x0221D6D4
	add r2, sp, #0xc
	add r3, r0, #0
	mov r5, #2
_022189C6:
	ldrsh r6, [r1, r3]
	add r0, r0, #1
	lsl r6, r6, #0xc
	str r6, [r2]
	ldrsh r6, [r1, r5]
	add r1, r1, #4
	lsl r6, r6, #0xc
	str r6, [r2, #4]
	add r2, #0xc
	cmp r0, #4
	blt _022189C6
	ldr r5, [sp, #0xc]
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #0x10]
	sub r2, r7, r5
	sub r0, r1, r0
	asr r1, r0, #0x1f
	asr r3, r2, #0x1f
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r0, r0, r2
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	ldr r1, [sp, #0x18]
	sub r1, r1, r5
	bl FX_Div
	ldr r1, [sp, #0x10]
	ldr r5, [sp, #0x24]
	add r6, r0, r1
	sub r2, r7, r5
	ldr r1, [sp, #0x34]
	ldr r0, [sp, #0x28]
	asr r3, r2, #0x1f
	sub r0, r1, r0
	asr r1, r0, #0x1f
	bl _ll_mul
	mov r2, #2
	mov r3, #0
	lsl r2, r2, #0xa
	add r0, r0, r2
	adc r1, r3
	lsl r1, r1, #0x14
	lsr r0, r0, #0xc
	orr r0, r1
	ldr r1, [sp, #0x30]
	sub r1, r1, r5
	bl FX_Div
	ldr r1, [sp, #0x28]
	add r0, r0, r1
	cmp r4, r6
	blt _02218A46
	cmp r4, r0
	blt _02218A46
	add sp, #0x3c
	mov r0, #0
	pop {r4, r5, r6, r7, pc}
_02218A46:
	mov r0, #1
	add sp, #0x3c
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_02218A4C: .word 0x0221D6D4
	thumb_func_end ov96_02218934

	thumb_func_start ov96_02218A50
ov96_02218A50: ; 0x02218A50
	push {r4, lr}
	add r4, r0, #0
	ldr r2, [r4, #4]
	ldr r1, [r2, #4]
	ldr r1, [r1, #8]
	str r1, [r2, #8]
	bl ov96_02219398
	add r0, r4, #0
	bl ov96_02218A68
	pop {r4, pc}
	thumb_func_end ov96_02218A50

	thumb_func_start ov96_02218A68
ov96_02218A68: ; 0x02218A68
	push {r4, lr}
	sub sp, #0x18
	add r4, r0, #0
	ldr r0, [r4, #0x60]
	ldr r1, _02218AD8 ; =0x0221D6E4
	lsl r0, r0, #0xa
	lsr r0, r0, #0x1e
	lsl r2, r0, #2
	add r0, sp, #4
	str r0, [sp]
	ldr r0, [r4, #4]
	ldr r3, _02218ADC ; =0x0221D6E6
	ldrsh r1, [r1, r2]
	ldrsh r2, [r3, r2]
	ldr r0, [r0]
	add r3, sp, #8
	bl ov96_021EB0A4
	ldr r0, [sp, #8]
	add r2, r4, #0
	lsl r0, r0, #0xc
	str r0, [r4, #0x2c]
	ldr r0, [sp, #4]
	add r3, sp, #0xc
	lsl r0, r0, #0xc
	str r0, [r4, #0x30]
	ldr r0, [sp, #8]
	add r2, #0x44
	lsl r0, r0, #0xc
	str r0, [r4, #0x20]
	ldr r0, [sp, #4]
	lsl r0, r0, #0xc
	str r0, [r4, #0x24]
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	str r0, [r3, #8]
	ldmia r3!, {r0, r1}
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	str r0, [r2]
	ldr r1, [r4, #0x60]
	ldr r0, _02218AE0 ; =0xFFF0FFFF
	and r1, r0
	mov r0, #2
	lsl r0, r0, #0x10
	orr r1, r0
	ldr r0, _02218AE4 ; =0xF7FFFFFF
	and r1, r0
	ldr r0, _02218AE8 ; =0xDFFFFFFF
	and r1, r0
	ldr r0, _02218AEC ; =0xBFFFFFFF
	and r0, r1
	str r0, [r4, #0x60]
	add sp, #0x18
	pop {r4, pc}
	.balign 4, 0
_02218AD8: .word 0x0221D6E4
_02218ADC: .word 0x0221D6E6
_02218AE0: .word 0xFFF0FFFF
_02218AE4: .word 0xF7FFFFFF
_02218AE8: .word 0xDFFFFFFF
_02218AEC: .word 0xBFFFFFFF
	thumb_func_end ov96_02218A68

	thumb_func_start ov96_02218AF0
ov96_02218AF0: ; 0x02218AF0
	ldr r1, [r0, #0x14]
	sub r1, #9
	cmp r1, #2
	bls _02218B1A
	ldr r2, [r0, #0x50]
	cmp r2, #0
	bgt _02218B04
	mov r1, #0
	str r1, [r0, #0x54]
	bx lr
_02218B04:
	ldr r1, [r0, #0x54]
	sub r1, r2, r1
	str r1, [r0, #0x50]
	bpl _02218B10
	mov r1, #0
	str r1, [r0, #0x50]
_02218B10:
	mov r1, #2
	ldr r2, [r0, #0x54]
	lsl r1, r1, #0xc
	add r1, r2, r1
	str r1, [r0, #0x54]
_02218B1A:
	bx lr
	thumb_func_end ov96_02218AF0

	thumb_func_start ov96_02218B1C
ov96_02218B1C: ; 0x02218B1C
	push {r4, r5, lr}
	sub sp, #0xc
	add r4, r0, #0
	mov r2, #0x5d
	ldrsb r0, [r4, r2]
	cmp r0, #0
	ble _02218B3A
	sub r3, r0, #1
	add r0, r4, #0
	add r0, #0x5d
	strb r3, [r0]
	ldrsb r0, [r4, r2]
	cmp r0, #0
	ble _02218B3A
	b _02218DEA
_02218B3A:
	ldr r0, [r4, #0x14]
	cmp r0, #0xc
	bhi _02218B6E
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02218B4C: ; jump table
	.short _02218B6E - _02218B4C - 2 ; case 0
	.short _02218B6E - _02218B4C - 2 ; case 1
	.short _02218B6E - _02218B4C - 2 ; case 2
	.short _02218B6E - _02218B4C - 2 ; case 3
	.short _02218B6E - _02218B4C - 2 ; case 4
	.short _02218B74 - _02218B4C - 2 ; case 5
	.short _02218B66 - _02218B4C - 2 ; case 6
	.short _02218B74 - _02218B4C - 2 ; case 7
	.short _02218B74 - _02218B4C - 2 ; case 8
	.short _02218B6E - _02218B4C - 2 ; case 9
	.short _02218B74 - _02218B4C - 2 ; case 10
	.short _02218B74 - _02218B4C - 2 ; case 11
	.short _02218B74 - _02218B4C - 2 ; case 12
_02218B66:
	add r0, r4, #0
	bl ov96_02218F18
	b _02218B74
_02218B6E:
	add r0, r4, #0
	bl ov96_022187A8
_02218B74:
	ldr r0, [r4, #0x14]
	cmp r0, #0xc
	bls _02218B7C
	b _02218DE0
_02218B7C:
	add r0, r0, r0
	add r0, pc
	ldrh r0, [r0, #6]
	lsl r0, r0, #0x10
	asr r0, r0, #0x10
	add pc, r0
_02218B88: ; jump table
	.short _02218DE0 - _02218B88 - 2 ; case 0
	.short _02218C4E - _02218B88 - 2 ; case 1
	.short _02218C20 - _02218B88 - 2 ; case 2
	.short _02218BFE - _02218B88 - 2 ; case 3
	.short _02218BA2 - _02218B88 - 2 ; case 4
	.short _02218D62 - _02218B88 - 2 ; case 5
	.short _02218D84 - _02218B88 - 2 ; case 6
	.short _02218DC6 - _02218B88 - 2 ; case 7
	.short _02218C88 - _02218B88 - 2 ; case 8
	.short _02218CAC - _02218B88 - 2 ; case 9
	.short _02218CEA - _02218B88 - 2 ; case 10
	.short _02218D0E - _02218B88 - 2 ; case 11
	.short _02218D46 - _02218B88 - 2 ; case 12
_02218BA2:
	ldr r0, [r4, #0x60]
	lsl r0, r0, #4
	lsr r0, r0, #0x1f
	beq _02218BAE
	bl GF_AssertFail
_02218BAE:
	add r0, r4, #0
	bl ov96_02218934
	cmp r0, #0
	beq _02218BC0
	add r0, r4, #0
	bl ov96_02219030
	b _02218DE4
_02218BC0:
	ldr r0, [r4, #0x60]
	lsl r1, r0, #2
	lsr r1, r1, #0x1f
	beq _02218BD0
	add r0, r4, #0
	bl ov96_02218F58
	b _02218DE4
_02218BD0:
	lsl r0, r0, #1
	lsr r0, r0, #0x1f
	beq _02218BE2
	add r1, r4, #0
	add r0, r4, #0
	add r1, #0x1c
	bl ov96_02218DF8
	b _02218DE4
_02218BE2:
	mov r1, #0x5e
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x5e
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218CD8
	add r0, r4, #0
	mov r1, #1
	bl ov96_02218578
	b _02218DE4
_02218BFE:
	mov r1, #0x5b
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x5b
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218CD8
	add r0, r4, #0
	bl ov96_02218A50
	add r0, r4, #0
	mov r1, #4
	bl ov96_02218578
	b _02218DE4
_02218C20:
	add r0, r4, #0
	bl ov96_02218934
	cmp r0, #0
	beq _02218C32
	add r0, r4, #0
	bl ov96_02219030
	b _02218DE4
_02218C32:
	mov r1, #0x58
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x58
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218CD8
	add r0, r4, #0
	mov r1, #1
	bl ov96_02218578
	b _02218DE4
_02218C4E:
	add r0, r4, #0
	bl ov96_02218934
	cmp r0, #0
	beq _02218C60
	add r0, r4, #0
	bl ov96_02219030
	b _02218DE4
_02218C60:
	ldr r1, [r4, #0x60]
	lsl r0, r1, #4
	lsr r0, r0, #0x1f
	bne _02218CD8
	lsl r0, r1, #2
	lsr r0, r0, #0x1f
	beq _02218C76
	add r0, r4, #0
	bl ov96_02218F58
	b _02218DE4
_02218C76:
	lsl r0, r1, #1
	lsr r0, r0, #0x1f
	beq _02218CD8
	add r1, r4, #0
	add r0, r4, #0
	add r1, #0x1c
	bl ov96_02218DF8
	b _02218DE4
_02218C88:
	mov r1, #0x5a
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x5a
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218CD8
	add r0, r4, #0
	mov r1, #0
	add r0, #0x5a
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #9
	bl ov96_02218578
	b _02218DE4
_02218CAC:
	ldr r0, [r4, #4]
	ldr r3, _02218DF0 ; =0x0221D7D0
	ldr r0, [r0, #4]
	ldrb r1, [r0, #0x18]
	mov r0, #0x14
	add r5, r1, #0
	mov r1, #0x5a
	mul r5, r0
	ldrsb r0, [r4, r1]
	lsl r2, r0, #1
	add r0, r3, r5
	ldrsh r0, [r2, r0]
	lsl r0, r0, #0xc
	str r0, [r4, #0x50]
	ldrsb r0, [r4, r1]
	add r2, r0, #1
	add r0, r4, #0
	add r0, #0x5a
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0xa
	bge _02218CDA
_02218CD8:
	b _02218DE4
_02218CDA:
	add r0, r4, #0
	mov r1, #0xa
	add r0, #0x5a
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_02218578
	b _02218DE4
_02218CEA:
	mov r1, #0x5a
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x5a
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218DE4
	add r0, r4, #0
	mov r1, #0
	add r0, #0x5a
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #0xb
	bl ov96_02218578
	b _02218DE4
_02218D0E:
	ldr r0, [r4, #0x50]
	cmp r0, #0
	bne _02218D2C
	add r0, r4, #0
	bl ov96_02218FD4
	add r0, r4, #0
	bl ov96_02218934
	cmp r0, #0
	beq _02218DE4
	add r0, r4, #0
	bl ov96_02219030
	b _02218DE4
_02218D2C:
	ldr r1, [r4, #4]
	ldr r1, [r1, #4]
	ldrb r2, [r1, #0x18]
	ldr r1, _02218DF4 ; =0x0221D69C
	ldrb r1, [r1, r2]
	lsl r1, r1, #0xc
	sub r0, r0, r1
	str r0, [r4, #0x50]
	cmp r0, #0
	bgt _02218DE4
	mov r0, #0
	str r0, [r4, #0x50]
	b _02218DE4
_02218D46:
	mov r1, #0x5a
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x5a
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218DE4
	add r0, r4, #0
	mov r1, #1
	bl ov96_02218578
	b _02218DE4
_02218D62:
	mov r1, #0x59
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x59
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218DE4
	add r0, r4, #0
	mov r1, #6
	add r0, #0x59
	strb r1, [r0]
	add r0, r4, #0
	bl ov96_02218578
	b _02218DE4
_02218D84:
	mov r1, #0x59
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x59
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218DE4
	add r3, r4, #0
	add r3, #0x2c
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r3, sp, #0
	str r0, [r2]
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	str r0, [r3, #8]
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x44
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #7
	str r0, [r2]
	add r0, r4, #0
	bl ov96_02218578
	b _02218DE4
_02218DC6:
	mov r1, #0x59
	ldrsb r0, [r4, r1]
	sub r2, r0, #1
	add r0, r4, #0
	add r0, #0x59
	strb r2, [r0]
	ldrsb r0, [r4, r1]
	cmp r0, #0
	bgt _02218DE4
	add r0, r4, #0
	bl ov96_02218EB8
	b _02218DE4
_02218DE0:
	bl GF_AssertFail
_02218DE4:
	add r0, r4, #0
	bl ov96_02218AF0
_02218DEA:
	add sp, #0xc
	pop {r4, r5, pc}
	nop
_02218DF0: .word 0x0221D7D0
_02218DF4: .word 0x0221D69C
	thumb_func_end ov96_02218B1C

	thumb_func_start ov96_02218DF8
ov96_02218DF8: ; 0x02218DF8
	push {r4, r5, lr}
	sub sp, #0xc
	add r5, r0, #0
	add r4, r1, #0
	add r0, sp, #0
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r5, #0x14]
	mov r2, #1
	cmp r0, #1
	beq _02218E18
	cmp r0, #4
	beq _02218E18
	add r2, r1, #0
_02218E18:
	cmp r2, #0
	bne _02218E20
	bl GF_AssertFail
_02218E20:
	ldr r0, [r5, #0x60]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _02218E2C
	bl GF_AssertFail
_02218E2C:
	ldr r0, [r5, #0x60]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _02218E38
	bl GF_AssertFail
_02218E38:
	ldr r1, [r5, #0x60]
	ldr r0, _02218EB0 ; =0xBFFFFFFF
	add r2, r5, #0
	and r0, r1
	str r0, [r5, #0x60]
	mov r0, #0
	ldrsh r0, [r4, r0]
	add r1, r5, #0
	add r1, #0x2c
	lsl r0, r0, #0xc
	str r0, [sp]
	mov r0, #2
	ldrsh r0, [r4, r0]
	add r2, #0x38
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	add r0, sp, #0
	bl VEC_Subtract
	add r0, r5, #0
	add r0, #0x38
	add r1, r0, #0
	bl VEC_Normalize
	add r1, r5, #0
	mov r0, #1
	add r1, #0x38
	add r3, r5, #0
	lsl r0, r0, #0xe
	add r2, r1, #0
	add r3, #0x44
	bl VEC_MultAdd
	ldr r0, [r5, #0x44]
	cmp r0, #0
	bne _02218E86
	ldr r0, [r5, #0x48]
	cmp r0, #0
	beq _02218EAC
_02218E86:
	add r0, r5, #0
	add r0, #0x38
	bl ov96_022186CC
	lsl r0, r0, #0x1c
	ldr r2, [r5, #0x60]
	ldr r1, _02218EB4 ; =0xFFF0FFFF
	lsr r0, r0, #0xc
	and r1, r2
	orr r0, r1
	str r0, [r5, #0x60]
	add r0, r5, #0
	mov r1, #4
	add r0, #0x59
	strb r1, [r0]
	add r0, r5, #0
	mov r1, #5
	bl ov96_02218578
_02218EAC:
	add sp, #0xc
	pop {r4, r5, pc}
	.balign 4, 0
_02218EB0: .word 0xBFFFFFFF
_02218EB4: .word 0xFFF0FFFF
	thumb_func_end ov96_02218DF8

	thumb_func_start ov96_02218EB8
ov96_02218EB8: ; 0x02218EB8
	push {r3, r4, lr}
	sub sp, #0xc
	add r4, r0, #0
	ldr r0, [r4, #0x14]
	mov r1, #1
	cmp r0, #7
	beq _02218ECC
	cmp r0, #6
	beq _02218ECC
	mov r1, #0
_02218ECC:
	cmp r1, #0
	bne _02218ED4
	bl GF_AssertFail
_02218ED4:
	add r3, sp, #0
	mov r0, #0
	str r0, [r3]
	str r0, [r3, #4]
	str r0, [r3, #8]
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x44
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	add r3, r4, #0
	str r0, [r2]
	add r3, #0x2c
	add r2, r4, #0
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r1, #1
	str r0, [r2]
	add r0, r4, #0
	bl ov96_02218578
	add r0, r4, #0
	bl ov96_02218934
	cmp r0, #0
	beq _02218F12
	add r0, r4, #0
	bl ov96_02219030
_02218F12:
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02218EB8

	thumb_func_start ov96_02218F18
ov96_02218F18: ; 0x02218F18
	push {r4, lr}
	sub sp, #0x18
	add r4, r0, #0
	add r2, sp, #0
	mov r0, #0
	str r0, [r2]
	str r0, [r2, #4]
	str r0, [r2, #8]
	add r1, r4, #0
	ldr r0, _02218F54 ; =0x00000B33
	add r1, #0x38
	add r3, sp, #0xc
	bl VEC_MultAdd
	add r0, r4, #0
	add r0, #0x44
	add r1, sp, #0xc
	add r2, r0, #0
	bl VEC_Add
	add r0, r4, #0
	add r0, #0x2c
	add r4, #0x44
	add r1, r4, #0
	add r2, r0, #0
	bl VEC_Add
	add sp, #0x18
	pop {r4, pc}
	nop
_02218F54: .word 0x00000B33
	thumb_func_end ov96_02218F18

	thumb_func_start ov96_02218F58
ov96_02218F58: ; 0x02218F58
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r0, [r4, #0x14]
	mov r1, #1
	cmp r0, #1
	beq _02218F6C
	cmp r0, #4
	beq _02218F6C
	mov r1, #0
_02218F6C:
	cmp r1, #0
	bne _02218F74
	bl GF_AssertFail
_02218F74:
	ldr r0, [r4, #0x60]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _02218F80
	bl GF_AssertFail
_02218F80:
	ldr r0, [r4, #0x60]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _02218F8C
	bl GF_AssertFail
_02218F8C:
	ldr r1, [r4, #0x60]
	ldr r0, _02218FD0 ; =0xDFFFFFFF
	and r0, r1
	str r0, [r4, #0x60]
	add r0, r4, #0
	mov r1, #5
	add r0, #0x5a
	strb r1, [r0]
	ldr r0, [r4, #4]
	ldr r0, [r0, #4]
	ldrb r0, [r0, #0x18]
	cmp r0, #0
	beq _02218FC4
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #2
	bl ov96_021E8228
_02218FC4:
	add r0, r4, #0
	mov r1, #8
	bl ov96_02218578
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_02218FD0: .word 0xDFFFFFFF
	thumb_func_end ov96_02218F58

	thumb_func_start ov96_02218FD4
ov96_02218FD4: ; 0x02218FD4
	push {r4, lr}
	add r4, r0, #0
	mov r1, #0xc
	bl ov96_02218578
	add r0, r4, #0
	add r2, r4, #0
	mov r1, #0xa
	add r0, #0x5a
	strb r1, [r0]
	mov r0, #0
	str r0, [r4, #0x50]
	add r2, #0x2c
	ldmia r2!, {r0, r1}
	add r4, #0x20
	stmia r4!, {r0, r1}
	ldr r0, [r2]
	str r0, [r4]
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02218FD4

	thumb_func_start ov96_02218FFC
ov96_02218FFC: ; 0x02218FFC
	push {r4, lr}
	add r4, r0, #0
	ldr r1, [r4, #4]
	ldr r0, [r1, #8]
	ldr r1, [r1, #4]
	ldr r1, [r1, #8]
	bl FX_Div
	mov r1, #1
	lsl r1, r1, #0xc
	sub r1, r1, r0
	mov r0, #0xa
	mul r0, r1
	sub r0, r0, #3
	bpl _0221901C
	mov r0, #0
_0221901C:
	asr r1, r0, #0xc
	add r0, r4, #0
	add r0, #0x58
	strb r1, [r0]
	add r0, r4, #0
	mov r1, #2
	bl ov96_02218578
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02218FFC

	thumb_func_start ov96_02219030
ov96_02219030: ; 0x02219030
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	mov r1, #0x3c
	add r0, #0x5b
	strb r1, [r0]
	add r0, r4, #0
	mov r2, #0
	add r0, #0x58
	strb r2, [r0]
	ldr r1, [r4, #0x10]
	cmp r1, #0
	bne _02219084
	ldr r0, [r4, #0x60]
	lsl r0, r0, #0x14
	lsr r3, r0, #0x14
	sub r3, #0xa
	bpl _02219056
	add r3, r2, #0
_02219056:
	ldr r1, [r4, #0x60]
	ldr r0, _02219108 ; =0xFFFFF000
	and r1, r0
	lsr r0, r0, #0x14
	and r0, r3
	orr r0, r1
	str r0, [r4, #0x60]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #8
	bl ov96_021E8228
	b _022190C2
_02219084:
	ldr r0, [r1, #0x60]
	lsl r0, r0, #0x14
	lsr r3, r0, #0x14
	add r3, #0xa
	cmp r3, #0xc8
	ble _02219092
	mov r3, #0xc8
_02219092:
	ldr r2, [r1, #0x60]
	ldr r0, _02219108 ; =0xFFFFF000
	and r2, r0
	lsr r0, r0, #0x14
	and r0, r3
	orr r0, r2
	str r0, [r1, #0x60]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r1, #0x60]
	ldr r0, [r1]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #3
	bl ov96_021E8228
	mov r0, #0
	str r0, [r4, #0x10]
_022190C2:
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	mov r3, #5
	bl ov96_021E8228
	mov r3, #1
	str r3, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	add r0, r4, #0
	mov r1, #3
	bl ov96_02218578
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_02219108: .word 0xFFFFF000
	thumb_func_end ov96_02219030

	thumb_func_start ov96_0221910C
ov96_0221910C: ; 0x0221910C
	push {r3, r4, lr}
	sub sp, #4
	add r4, r0, #0
	ldr r0, [r4, #0x60]
	lsl r0, r0, #5
	lsr r0, r0, #0x1f
	beq _0221911E
	bl GF_AssertFail
_0221911E:
	ldr r0, [r4, #0x60]
	lsl r0, r0, #3
	lsr r0, r0, #0x1f
	beq _0221912A
	bl GF_AssertFail
_0221912A:
	ldr r1, [r4, #0x60]
	mov r0, #1
	add r2, r1, #0
	lsl r0, r0, #0x1a
	orr r2, r0
	ldr r1, _02219170 ; =0xFCFFFFFF
	add r3, r4, #0
	and r1, r2
	lsr r0, r0, #2
	orr r0, r1
	add r2, r4, #0
	add r3, #0x2c
	str r0, [r4, #0x60]
	ldmia r3!, {r0, r1}
	add r2, #0x20
	stmia r2!, {r0, r1}
	ldr r0, [r3]
	mov r3, #7
	str r0, [r2]
	mov r0, #1
	str r0, [sp]
	ldr r2, [r4, #0x60]
	ldr r0, [r4]
	lsl r1, r2, #0xa
	lsl r2, r2, #8
	lsr r1, r1, #0x1e
	lsr r2, r2, #0x1e
	lsl r1, r1, #0x18
	lsl r2, r2, #0x18
	lsr r1, r1, #0x18
	lsr r2, r2, #0x18
	bl ov96_021E8228
	add sp, #4
	pop {r3, r4, pc}
	.balign 4, 0
_02219170: .word 0xFCFFFFFF
	thumb_func_end ov96_0221910C

	thumb_func_start ov96_02219174
ov96_02219174: ; 0x02219174
	ldr r3, [r0, #4]
	ldr r2, [r3, #8]
	sub r1, r2, r1
	str r1, [r3, #8]
	ldr r1, [r0, #4]
	ldr r0, [r1, #8]
	cmp r0, #0
	bge _02219188
	mov r0, #0
	str r0, [r1, #8]
_02219188:
	bx lr
	.balign 4, 0
	thumb_func_end ov96_02219174

	thumb_func_start ov96_0221918C
ov96_0221918C: ; 0x0221918C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x84
	str r0, [sp]
	mov r0, #0
	add r3, sp, #0xc
	add r1, r0, #0
	mov r2, #7
_0221919A:
	stmia r3!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _0221919A
	stmia r3!, {r0, r1}
	add r0, sp, #0xc
	mov r1, #0xaa
	mov r2, #9
	bl ReadWholeNarcMemberByIdPair
	mov r0, #0
	str r0, [sp, #4]
_022191B2:
	ldr r0, [sp, #4]
	mov r6, #0x3f
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r7, #0
	lsl r6, r6, #0x18
	str r0, [sp, #8]
_022191C0:
	ldr r0, [sp]
	ldr r1, [sp, #4]
	add r2, r7, #0
	bl ov96_021E60D8
	add r4, r0, #0
	lsl r2, r7, #0x18
	ldr r0, [sp]
	ldr r1, [sp, #8]
	lsr r2, r2, #0x18
	bl ov96_0221935C
	add r5, r0, #0
	ldrb r0, [r4]
	cmp r0, #5
	blo _022191E4
	bl GF_AssertFail
_022191E4:
	ldrb r0, [r4, #3]
	cmp r0, #5
	blo _022191EE
	bl GF_AssertFail
_022191EE:
	ldrb r0, [r4, #1]
	cmp r0, #5
	blo _022191F8
	bl GF_AssertFail
_022191F8:
	ldrb r0, [r4, #2]
	cmp r0, #5
	blo _02219202
	bl GF_AssertFail
_02219202:
	ldrb r0, [r4]
	lsl r1, r0, #2
	add r0, sp, #0xc
	ldr r0, [r0, r1]
	cmp r0, #0
	ble _0221921E
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _0221922A
_0221921E:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_0221922A:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5]
	ldrb r0, [r4]
	lsl r1, r0, #2
	add r0, sp, #0xc
	add r0, r0, r1
	ldr r0, [r0, #0x14]
	cmp r0, #0
	ble _02219254
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _02219260
_02219254:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_02219260:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5, #4]
	ldrb r0, [r4, #3]
	lsl r1, r0, #2
	add r0, sp, #0xc
	add r0, r0, r1
	ldr r0, [r0, #0x28]
	cmp r0, #0
	ble _0221928A
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _02219296
_0221928A:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_02219296:
	bl _ftoi
	str r0, [r5, #8]
	ldrb r0, [r4, #1]
	lsl r1, r0, #2
	add r0, sp, #0xc
	add r0, r0, r1
	ldr r0, [r0, #0x3c]
	cmp r0, #0
	ble _022192BA
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _022192C6
_022192BA:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_022192C6:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5, #0xc]
	ldrb r0, [r4, #2]
	lsl r1, r0, #2
	add r0, sp, #0xc
	add r0, r0, r1
	ldr r0, [r0, #0x64]
	cmp r0, #0
	ble _022192F0
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _022192FC
_022192F0:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_022192FC:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5, #0x10]
	ldrb r0, [r4, #2]
	lsl r1, r0, #2
	add r0, sp, #0xc
	add r0, r0, r1
	ldr r0, [r0, #0x64]
	cmp r0, #0
	ble _02219326
	lsl r0, r0, #0xc
	bl _itof
	add r1, r0, #0
	add r0, r6, #0
	bl _fadd
	b _02219332
_02219326:
	lsl r0, r0, #0xc
	bl _itof
	add r1, r6, #0
	bl _fsub
_02219332:
	bl _ftoi
	mov r1, #0xa
	bl _s32_div_f
	str r0, [r5, #0x14]
	ldrb r0, [r4, #2]
	add r7, r7, #1
	cmp r7, #3
	strb r0, [r5, #0x18]
	bge _0221934A
	b _022191C0
_0221934A:
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #4
	bge _02219356
	b _022191B2
_02219356:
	add sp, #0x84
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221918C

	thumb_func_start ov96_0221935C
ov96_0221935C: ; 0x0221935C
	push {r4, r5, r6, lr}
	add r5, r1, #0
	add r6, r2, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	bne _0221936E
	bl GF_AssertFail
_0221936E:
	cmp r5, #4
	blo _02219376
	bl GF_AssertFail
_02219376:
	cmp r6, #3
	blo _0221937E
	bl GF_AssertFail
_0221937E:
	lsl r0, r5, #1
	add r0, r5, r0
	add r1, r6, r0
	mov r0, #0x1c
	add r4, #0x30
	mul r0, r1
	add r4, r4, r0
	bne _02219392
	bl GF_AssertFail
_02219392:
	add r0, r4, #0
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0221935C

	thumb_func_start ov96_02219398
ov96_02219398: ; 0x02219398
	push {r4, lr}
	add r4, r0, #0
	ldr r0, [r4, #0x60]
	mov r1, #3
	lsl r0, r0, #8
	lsr r0, r0, #0x1e
	add r0, r0, #1
	bl _u32_div_f
	ldr r2, [r4, #0x60]
	ldr r0, _022193C8 ; =0xFF3FFFFF
	and r2, r0
	lsl r0, r1, #0x1e
	lsr r0, r0, #8
	orr r0, r2
	str r0, [r4, #0x60]
	ldr r1, [r4, #8]
	lsl r0, r0, #8
	lsr r0, r0, #0x1e
	add r1, #0x74
	lsl r0, r0, #4
	add r0, r1, r0
	str r0, [r4, #4]
	pop {r4, pc}
	.balign 4, 0
_022193C8: .word 0xFF3FFFFF
	thumb_func_end ov96_02219398

	thumb_func_start ov96_022193CC
ov96_022193CC: ; 0x022193CC
	cmp r1, #0
	beq _022193D4
	mov r1, #3
	b _022193D6
_022193D4:
	mov r1, #4
_022193D6:
	ldr r3, _022193E0 ; =sub_0200606C
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	bx r3
	nop
_022193E0: .word sub_0200606C
	thumb_func_end ov96_022193CC

	thumb_func_start ov96_022193E4
ov96_022193E4: ; 0x022193E4
	ldr r3, _022193F0 ; =AddWindow
	add r1, r0, #0
	ldr r0, [r1, #4]
	add r1, #0x20
	ldr r2, _022193F4 ; =0x0221D6A4
	bx r3
	.balign 4, 0
_022193F0: .word AddWindow
_022193F4: .word 0x0221D6A4
	thumb_func_end ov96_022193E4

	thumb_func_start ov96_022193F8
ov96_022193F8: ; 0x022193F8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r7, r1, #0
	bl ov96_021E5DC4
	add r4, r0, #0
	ldr r5, [r4, #0x10]
	ldr r6, [r4, #0x14]
	add r0, #0x20
	mov r1, #0
	bl FillWindowPixelBuffer
	mov r1, #0
	str r1, [sp]
	mov r0, #1
	str r0, [sp, #4]
	add r0, r5, #0
	add r2, r7, #0
	mov r3, #3
	bl BufferIntegerAsString
	ldr r3, [r4]
	add r0, r5, #0
	add r1, r6, #0
	mov r2, #0xa3
	bl ReadMsgData_ExpandPlaceholders
	add r5, r0, #0
	mov r3, #0
	str r3, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _0221945C ; =0x000F0E00
	mov r1, #4
	str r0, [sp, #8]
	add r0, r4, #0
	add r0, #0x20
	add r2, r5, #0
	str r3, [sp, #0xc]
	bl sub_020200FC
	add r0, r5, #0
	bl String_dtor
	add r4, #0x20
	add r0, r4, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_0221945C: .word 0x000F0E00
	thumb_func_end ov96_022193F8

	thumb_func_start ov96_02219460
ov96_02219460: ; 0x02219460
	push {r3, r4, r5, r6, r7, lr}
	add r6, r1, #0
	ldr r1, [r0, #4]
	add r4, r0, #0
	ldr r1, [r1, #8]
	add r7, r2, #0
	asr r1, r1, #0xc
	add r4, #0x5f
	cmp r1, #0x1e
	bge _02219478
	mov r5, #1
	b _0221947A
_02219478:
	mov r5, #0
_0221947A:
	bl ov96_0221862C
	cmp r0, #0
	beq _0221948E
	cmp r5, #0
	beq _0221948A
	mov r0, #1
	b _02219490
_0221948A:
	mov r0, #0
	b _02219490
_0221948E:
	mov r0, #3
_02219490:
	cmp r7, #0
	bne _02219498
	strb r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
_02219498:
	ldr r1, [r6]
	lsl r2, r1, #0x11
	lsr r2, r2, #0x1f
	beq _022194BA
	cmp r0, #1
	bhi _022194AA
	mov r0, #2
	strb r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
_022194AA:
	cmp r0, #3
	bne _022194B4
	mov r0, #4
	strb r0, [r4]
	pop {r3, r4, r5, r6, r7, pc}
_022194B4:
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
_022194BA:
	lsl r1, r1, #0x10
	lsr r1, r1, #0x1f
	bne _022194C2
	strb r0, [r4]
_022194C2:
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02219460

	thumb_func_start ov96_022194C4
ov96_022194C4: ; 0x022194C4
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r5, r0, #0
	add r6, r1, #0
	add r7, r2, #0
	str r3, [sp, #0x10]
	cmp r5, #0
	bne _022194D8
	bl GF_AssertFail
_022194D8:
	cmp r6, #0
	bne _022194E0
	bl GF_AssertFail
_022194E0:
	cmp r7, #0
	bne _022194E8
	bl GF_AssertFail
_022194E8:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	bne _022194F2
	bl GF_AssertFail
_022194F2:
	ldr r0, [sp, #0x28]
	cmp r0, #0
	bne _022194FC
	bl GF_AssertFail
_022194FC:
	ldr r0, [sp, #0x2c]
	cmp r0, #0
	bne _02219506
	bl GF_AssertFail
_02219506:
	ldr r0, [sp, #0x34]
	mov r1, #0xc8
	bl AllocFromHeap
	add r4, r0, #0
	mov r1, #0
	mov r2, #0xc8
	bl MIi_CpuFill8
	str r5, [r4, #8]
	str r6, [r4, #0xc]
	str r7, [r4, #0x10]
	add r0, sp, #0x18
	ldrb r1, [r0, #0x18]
	add r0, r4, #0
	add r0, #0x22
	strb r1, [r0]
	ldr r0, [sp, #0x34]
	str r0, [r4, #4]
	ldr r0, [sp, #0x10]
	str r0, [r4, #0x14]
	ldr r0, [sp, #0x28]
	str r0, [r4, #0x18]
	ldr r0, [sp, #0x2c]
	str r0, [r4, #0x1c]
	ldr r0, [sp, #0x38]
	str r0, [r4]
	ldr r1, [r4, #4]
	mov r0, #0x14
	bl NARC_ctor
	str r0, [r4, #0x24]
	ldr r0, [r4, #4]
	add r3, r4, #0
	str r0, [sp]
	mov r0, #0xf2
	mov r1, #7
	mov r2, #1
	add r3, #0x2c
	bl GfGfxLoader_GetScrnData
	str r0, [r4, #0x28]
	bl sub_02074490
	add r3, r0, #0
	mov r0, #0
	str r0, [sp]
	mov r0, #3
	str r0, [sp, #4]
	mov r0, #2
	str r0, [sp, #8]
	ldr r0, _022195C4 ; =0x00002714
	add r1, r6, #0
	str r0, [sp, #0xc]
	add r0, r5, #0
	mov r2, #0x14
	bl sub_0200D564
	strh r0, [r4, #0x20]
	ldr r0, [sp, #0x38]
	bl ov96_021E5F24
	add r1, r0, #0
	ldr r0, [sp, #0x38]
	bl ov96_021E5D50
	add r6, r0, #0
	mov r7, #0
	add r5, r4, #0
_02219590:
	ldr r1, [r4, #4]
	mov r0, #0xb
	bl String_ctor
	add r1, r5, #0
	add r1, #0xb0
	str r0, [r1]
	add r0, r5, #0
	add r0, #0xb0
	add r1, r6, #0
	ldr r0, [r0]
	add r1, #0x12
	bl CopyU16ArrayToString
	add r7, r7, #1
	add r5, r5, #4
	add r6, #0x28
	cmp r7, #3
	blt _02219590
	add r0, r4, #0
	bl ov96_02219A08
	add r0, r4, #0
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	nop
_022195C4: .word 0x00002714
	thumb_func_end ov96_022194C4

	thumb_func_start ov96_022195C8
ov96_022195C8: ; 0x022195C8
	push {r4, lr}
	add r4, r0, #0
	bl ov96_02219C30
	add r0, r4, #0
	mov r1, #0x3c
	bl ov96_022196E4
	add r0, r4, #0
	mov r1, #0
	bl ov96_02219A5C
	add r0, r4, #0
	bl ov96_02219B30
	pop {r4, pc}
	thumb_func_end ov96_022195C8

	thumb_func_start ov96_022195E8
ov96_022195E8: ; 0x022195E8
	push {r4, r5, r6, lr}
	add r6, r0, #0
	bne _022195F2
	bl GF_AssertFail
_022195F2:
	ldr r0, [r6, #0x24]
	bl NARC_dtor
	mov r4, #0
	add r5, r6, #0
_022195FC:
	add r0, r5, #0
	add r0, #0xb0
	ldr r0, [r0]
	bl String_dtor
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #3
	blt _022195FC
	ldr r0, [r6, #0x28]
	bl FreeToHeap
	add r4, r6, #0
	mov r5, #0
	add r4, #0x30
_0221961A:
	add r0, r4, #0
	bl RemoveWindow
	add r5, r5, #1
	add r4, #0x10
	cmp r5, #3
	blt _0221961A
	mov r5, #0
	add r4, r6, #0
_0221962C:
	ldr r0, [r4, #0x60]
	cmp r0, #0
	bne _02219636
	bl GF_AssertFail
_02219636:
	ldr r0, [r4, #0x60]
	bl sub_0200D9DC
	add r5, r5, #1
	add r4, r4, #4
	cmp r5, #0x12
	blt _0221962C
	add r0, r6, #0
	bl FreeToHeap
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_022195E8

	thumb_func_start ov96_0221964C
ov96_0221964C: ; 0x0221964C
	push {r4, r5, r6, lr}
	mov r4, #0
	add r5, r0, #0
	add r6, r4, #0
_02219654:
	add r0, r5, #0
	add r0, #0xa0
	ldr r0, [r0]
	add r1, r6, #0
	bl sub_0200DC78
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #2
	blt _02219654
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0221964C

	thumb_func_start ov96_0221966C
ov96_0221966C: ; 0x0221966C
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	str r1, [sp]
	add r6, r0, #0
	add r5, r3, #0
	str r2, [sp, #4]
	cmp r6, #0
	bne _02219680
	bl GF_AssertFail
_02219680:
	ldr r0, [sp]
	cmp r0, #4
	blo _0221968A
	bl GF_AssertFail
_0221968A:
	mov r7, #0
	add r4, r7, #0
_0221968E:
	ldrb r0, [r5, #1]
	add r1, r7, #6
	lsl r0, r0, #2
	add r0, r6, r0
	add r0, #0x88
	ldr r0, [r0]
	bl sub_0200DC58
	cmp r4, #3
	beq _022196AC
	ldrb r1, [r5]
	ldrb r0, [r5, #2]
	cmp r1, r0
	beq _022196AC
	add r7, r4, #1
_022196AC:
	add r4, r4, #1
	add r5, r5, #2
	cmp r4, #4
	blt _0221968E
	ldr r0, [r6]
	bl ov96_021E5F24
	ldr r1, [sp]
	cmp r1, r0
	bne _022196DE
	add r0, r6, #0
	add r0, #0xc2
	ldrh r1, [r0]
	ldr r0, [sp, #4]
	cmp r0, r1
	beq _022196DE
	ldr r1, [sp, #4]
	add r0, r6, #0
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02219A5C
	ldr r0, [sp, #4]
	add r6, #0xc2
	strh r0, [r6]
_022196DE:
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_0221966C

	thumb_func_start ov96_022196E4
ov96_022196E4: ; 0x022196E4
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #8
	add r4, r1, #0
	add r6, r0, #0
	add r0, r4, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r5, r0, #0x18
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #4]
	add r0, r5, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	cmp r4, #0xa
	blt _0221971C
	cmp r4, #0x37
	ble _02219720
_0221971C:
	mov r1, #1
	b _02219722
_02219720:
	mov r1, #0
_02219722:
	add r0, r6, #0
	add r0, #0xc4
	str r1, [r0]
	mov r4, #0
	add r5, r6, #0
	mov r7, #1
_0221972E:
	add r0, r6, #0
	add r0, #0xc4
	ldr r0, [r0]
	cmp r0, #0
	bne _0221973C
	add r1, r7, #0
	b _0221973E
_0221973C:
	mov r1, #0
_0221973E:
	add r0, r5, #0
	add r0, #0x88
	ldr r0, [r0]
	bl sub_0200DCE8
	add r4, r4, #1
	add r5, r5, #4
	cmp r4, #4
	blt _0221972E
	add r0, r6, #0
	add r0, #0xa8
	ldr r1, [sp, #4]
	ldr r0, [r0]
	add r1, r1, #1
	bl sub_020248F0
	add r6, #0xac
	ldr r1, [sp]
	ldr r0, [r6]
	add r1, r1, #1
	bl sub_020248F0
	add sp, #8
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_022196E4

	thumb_func_start ov96_02219770
ov96_02219770: ; 0x02219770
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r0, #0xa0
	ldr r0, [r0]
	add r4, r2, #0
	bl sub_0200DCE8
	add r5, #0xa4
	ldr r0, [r5]
	add r1, r4, #0
	bl sub_0200DCE8
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02219770

	thumb_func_start ov96_0221978C
ov96_0221978C: ; 0x0221978C
	add r0, #0xc2
	ldrh r0, [r0]
	bx lr
	.balign 4, 0
	thumb_func_end ov96_0221978C

	thumb_func_start ov96_02219794
ov96_02219794: ; 0x02219794
	push {r4, r5, r6, r7, lr}
	sub sp, #0xc
	add r5, r0, #0
	ldr r0, [r5]
	add r4, r2, #0
	bl ov96_021E5F24
	lsl r0, r0, #0x18
	lsr r7, r0, #0x18
	add r0, r4, #1
	mov r1, #3
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r6, r0, #0x18
	add r0, r5, #0
	add r0, #0xc0
	ldrb r0, [r0]
	cmp r0, #0
	beq _022197C8
	cmp r0, #1
	beq _02219856
	cmp r0, #2
	bne _022197C6
	b _0221992A
_022197C6:
	b _02219936
_022197C8:
	add r0, r5, #0
	add r0, #0x9c
	add r1, sp, #8
	mov r3, #0x1e
	ldr r0, [r0]
	add r1, #2
	add r2, sp, #8
	lsl r3, r3, #0x10
	bl sub_0200DE94
	add r0, sp, #4
	mov r1, #4
	ldrsh r1, [r0, r1]
	cmp r1, #0xd8
	bge _0221981C
	mov r0, #0x11
	lsl r0, r0, #4
	sub r0, r0, r1
	bpl _022197F0
	neg r0, r0
_022197F0:
	add r2, sp, #4
	mov r1, #4
	lsl r0, r0, #0xe
	ldrsh r3, [r2, r1]
	asr r0, r0, #0x10
	add r0, r3, r0
	strh r0, [r2, #4]
	ldrsh r0, [r2, r1]
	cmp r0, #0xd8
	ble _02219808
	mov r0, #0xd8
	strh r0, [r2, #4]
_02219808:
	add r4, sp, #4
	mov r2, #6
	mov r3, #4
	ldrsh r2, [r4, r2]
	ldrsh r3, [r4, r3]
	add r0, r5, #0
	mov r1, #0xf
	bl ov96_02219F20
	b _0221993A
_0221981C:
	mov r2, #0x28
	add r3, r2, #0
	strh r2, [r0, #6]
	sub r3, #0x50
	strh r3, [r0, #4]
	add r0, r5, #0
	mov r1, #0xf
	bl ov96_02219F20
	str r4, [sp]
	add r2, r5, #0
	add r2, #0x9c
	ldr r0, [r5]
	ldr r1, [r5, #4]
	ldr r2, [r2]
	add r3, r7, #0
	bl ov96_02219DA8
	add r0, r5, #0
	add r1, r6, #0
	bl ov96_02219EE0
	add r0, r5, #0
	add r0, #0xc0
	ldrb r0, [r0]
	add r5, #0xc0
	add r0, r0, #1
	strb r0, [r5]
	b _0221993A
_02219856:
	add r0, r5, #0
	add r0, #0x98
	add r1, sp, #4
	mov r3, #0x1e
	ldr r0, [r0]
	add r1, #2
	add r2, sp, #4
	lsl r3, r3, #0x10
	bl sub_0200DE94
	add r1, sp, #4
	mov r0, #0
	ldrsh r0, [r1, r0]
	mov r1, #0x88
	sub r2, r1, r0
	bpl _02219878
	neg r2, r2
_02219878:
	lsl r1, r2, #1
	add r2, r2, r1
	asr r1, r2, #1
	lsr r1, r1, #0x1e
	add r1, r2, r1
	lsl r1, r1, #0xe
	asr r4, r1, #0x10
	cmp r0, #0x88
	bgt _022198D4
	cmp r4, #0
	bne _02219890
	mov r4, #1
_02219890:
	add r6, sp, #4
	mov r3, #0
	ldrsh r0, [r6, r3]
	mov r2, #2
	mov r1, #0xe
	add r0, r0, r4
	strh r0, [r6]
	ldrsh r2, [r6, r2]
	ldrsh r3, [r6, r3]
	add r0, r5, #0
	bl ov96_02219F20
	add r0, r5, #0
	add r0, #0x9c
	add r1, sp, #4
	mov r3, #0x1e
	ldr r0, [r0]
	add r1, #2
	add r2, sp, #4
	lsl r3, r3, #0x10
	bl sub_0200DE94
	mov r3, #0
	ldrsh r0, [r6, r3]
	mov r2, #2
	mov r1, #0xf
	add r0, r0, r4
	strh r0, [r6]
	ldrsh r2, [r6, r2]
	ldrsh r3, [r6, r3]
	add r0, r5, #0
	bl ov96_02219F20
	b _0221993A
_022198D4:
	add r0, r5, #0
	add r0, #0x98
	ldr r2, [r0]
	add r0, r5, #0
	add r0, #0x9c
	ldr r1, [r0]
	add r0, r5, #0
	add r0, #0x98
	str r1, [r0]
	add r0, r5, #0
	add r0, #0x9c
	str r2, [r0]
	add r0, r5, #0
	add r0, #0xa0
	ldr r2, [r0]
	add r0, r5, #0
	add r0, #0xa4
	ldr r1, [r0]
	add r0, r5, #0
	add r0, #0xa0
	str r1, [r0]
	add r0, r5, #0
	add r0, #0xa4
	str r2, [r0]
	add r0, r5, #0
	mov r1, #0xe
	mov r2, #0x28
	mov r3, #0x30
	bl ov96_02219F20
	add r0, r5, #0
	mov r1, #0xf
	mov r2, #0x28
	mov r3, #0x88
	bl ov96_02219F20
	add r0, r5, #0
	add r0, #0xc0
	ldrb r0, [r0]
	add r5, #0xc0
	add r0, r0, #1
	strb r0, [r5]
	b _0221993A
_0221992A:
	mov r0, #0
	add r5, #0xc0
	strb r0, [r5]
	add sp, #0xc
	mov r0, #1
	pop {r4, r5, r6, r7, pc}
_02219936:
	bl GF_AssertFail
_0221993A:
	mov r0, #0
	add sp, #0xc
	pop {r4, r5, r6, r7, pc}
	thumb_func_end ov96_02219794

	thumb_func_start ov96_02219940
ov96_02219940: ; 0x02219940
	push {r3, r4, r5, lr}
	add r5, r0, #0
	add r4, r1, #0
	beq _0221994C
	cmp r4, #4
	blo _02219950
_0221994C:
	bl GF_AssertFail
_02219950:
	add r5, #0xbc
	ldrsb r0, [r5, r4]
	add r0, r0, #1
	strb r0, [r5, r4]
	ldrsb r0, [r5, r4]
	cmp r0, #0xc
	ble _02219966
	mov r0, #0
	strb r0, [r5, r4]
	mov r0, #1
	pop {r3, r4, r5, pc}
_02219966:
	mov r0, #0
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02219940

	thumb_func_start ov96_0221996C
ov96_0221996C: ; 0x0221996C
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	add r7, r3, #0
	cmp r5, #0
	bne _0221997E
	bl GF_AssertFail
_0221997E:
	cmp r4, #4
	blo _02219986
	bl GF_AssertFail
_02219986:
	cmp r6, #3
	blo _0221998E
	bl GF_AssertFail
_0221998E:
	cmp r7, #0
	bne _0221999C
	add r0, r5, #0
	add r1, r4, #0
	add r2, r6, #0
	bl ov96_02219DD0
_0221999C:
	add r0, r5, #0
	add r1, r4, #0
	add r2, r7, #0
	bl ov96_02219F50
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_0221996C

	thumb_func_start ov96_022199A8
ov96_022199A8: ; 0x022199A8
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _02219A04 ; =0x0221D910
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_022199BA:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _022199BA
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _022199CE
	bl GF_AssertFail
_022199CE:
	cmp r4, #0
	bne _022199D6
	bl GF_AssertFail
_022199D6:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x10
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02219A04: .word 0x0221D910
	thumb_func_end ov96_022199A8

	thumb_func_start ov96_02219A08
ov96_02219A08: ; 0x02219A08
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	bne _02219A12
	bl GF_AssertFail
_02219A12:
	ldr r0, [r5, #0x14]
	cmp r0, #0
	bne _02219A1C
	bl GF_AssertFail
_02219A1C:
	add r6, r5, #0
	ldr r7, _02219A58 ; =0x0221D8F8
	mov r4, #0
	add r6, #0x30
_02219A24:
	lsl r1, r4, #4
	lsl r2, r4, #3
	ldr r0, [r5, #0x14]
	add r1, r6, r1
	add r2, r7, r2
	bl AddWindow
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02219A24
	mov r2, #0
	str r2, [sp]
	ldr r0, [r5, #0x14]
	mov r1, #5
	mov r3, #1
	bl sub_0201C1F4
	mov r1, #0x1e
	ldr r2, [r5, #4]
	mov r0, #4
	lsl r1, r1, #4
	bl sub_02003030
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02219A58: .word 0x0221D8F8
	thumb_func_end ov96_02219A08

	thumb_func_start ov96_02219A5C
ov96_02219A5C: ; 0x02219A5C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x24
	add r6, r1, #0
	add r5, r0, #0
	add r0, r6, #0
	mov r1, #0x64
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #3]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0]
	mov r0, #0x64
	mul r0, r4
	sub r0, r6, r0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #4]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #1]
	add r0, r6, #0
	mov r1, #0xa
	bl _s32_div_f
	lsl r0, r1, #0x18
	lsr r4, r0, #0x18
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r1, #2
	add r0, sp, #0x1c
	strb r1, [r0, #5]
	add r0, r4, #0
	mov r1, #5
	bl _s32_div_f
	lsl r1, r0, #3
	add r0, sp, #0x1c
	strb r1, [r0, #2]
	mov r4, #0
	mov r6, #4
	mov r7, #8
_02219AE6:
	str r6, [sp]
	str r7, [sp, #4]
	ldr r0, [r5, #0x2c]
	lsl r2, r4, #2
	add r0, #0xc
	str r0, [sp, #8]
	add r0, sp, #0x1c
	add r0, #3
	ldrb r0, [r0, r4]
	add r2, #0x10
	lsl r2, r2, #0x18
	str r0, [sp, #0xc]
	add r0, sp, #0x1c
	ldrb r0, [r0, r4]
	mov r1, #6
	lsr r2, r2, #0x18
	str r0, [sp, #0x10]
	mov r0, #0x14
	str r0, [sp, #0x14]
	mov r0, #0x10
	str r0, [sp, #0x18]
	ldr r0, [r5, #0x14]
	mov r3, #0xb
	bl sub_0201C568
	add r0, r4, #1
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
	cmp r4, #3
	blo _02219AE6
	ldr r0, [r5, #0x14]
	mov r1, #6
	bl ScheduleBgTilemapBufferTransfer
	add sp, #0x24
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02219A5C

	thumb_func_start ov96_02219B30
ov96_02219B30: ; 0x02219B30
	push {r3, r4, r5, lr}
	sub sp, #0x10
	add r5, r0, #0
	add r0, #0x30
	mov r1, #0
	bl FillWindowPixelBuffer
	add r1, r5, #0
	add r1, #0x22
	ldrb r1, [r1]
	ldr r0, [r5]
	bl ov96_021E5F34
	ldr r1, [r5, #4]
	bl sub_02028F68
	mov r1, #0
	add r4, r0, #0
	str r1, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02219BC0 ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	add r0, r5, #0
	str r1, [sp, #0xc]
	add r0, #0x30
	add r3, r1, #0
	bl sub_020200FC
	ldr r0, [r5, #4]
	mov r3, #0x13
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	str r0, [sp, #8]
	add r0, r5, #0
	ldr r1, [r5, #0x1c]
	ldr r2, [r5, #0x18]
	add r0, #0x50
	lsl r3, r3, #4
	bl ov96_02219BDC
	add r0, r4, #0
	bl String_dtor
	add r0, r5, #0
	add r0, #0x30
	bl CopyWindowToVram
	mov r0, #1
	add r2, r5, #0
	str r0, [sp]
	mov r3, #2
	str r3, [sp, #4]
	add r2, #0xb4
	ldr r0, [r5, #0x1c]
	ldr r2, [r2]
	mov r1, #0
	bl BufferString
	ldr r0, [r5, #4]
	mov r3, #0x9a
	str r0, [sp]
	add r0, r5, #0
	ldr r1, [r5, #0x1c]
	ldr r2, [r5, #0x18]
	add r0, #0x40
	bl ov96_02219BC4
	add sp, #0x10
	pop {r3, r4, r5, pc}
	.balign 4, 0
_02219BC0: .word 0x000F0E00
	thumb_func_end ov96_02219B30

	thumb_func_start ov96_02219BC4
ov96_02219BC4: ; 0x02219BC4
	push {r3, r4, lr}
	sub sp, #0xc
	ldr r4, [sp, #0x18]
	str r4, [sp]
	mov r4, #0
	str r4, [sp, #4]
	str r4, [sp, #8]
	bl ov96_02219BDC
	add sp, #0xc
	pop {r3, r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02219BC4

	thumb_func_start ov96_02219BDC
ov96_02219BDC: ; 0x02219BDC
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x10
	add r4, r1, #0
	mov r1, #0
	add r5, r0, #0
	add r6, r2, #0
	add r7, r3, #0
	bl FillWindowPixelBuffer
	ldr r3, [sp, #0x28]
	add r0, r4, #0
	add r1, r6, #0
	add r2, r7, #0
	bl ReadMsgData_ExpandPlaceholders
	add r4, r0, #0
	add r3, sp, #0x18
	mov r0, #0x18
	ldrsh r0, [r3, r0]
	mov r1, #0
	mov r6, #0x14
	str r0, [sp]
	mov r0, #0xff
	str r0, [sp, #4]
	ldr r0, _02219C2C ; =0x000F0E00
	add r2, r4, #0
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	ldrsh r3, [r3, r6]
	add r0, r5, #0
	bl sub_020200FC
	add r0, r4, #0
	bl String_dtor
	add r0, r5, #0
	bl CopyWindowToVram
	add sp, #0x10
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02219C2C: .word 0x000F0E00
	thumb_func_end ov96_02219BDC

	thumb_func_start ov96_02219C30
ov96_02219C30: ; 0x02219C30
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x40
	add r5, r0, #0
	mov r0, #0
	add r2, sp, #0xc
	add r1, r0, #0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	str r0, [r2]
	add r0, r5, #0
	add r0, #0x22
	ldrb r0, [r0]
	mov r2, #0x86
	mov r3, #0xa0
	add r0, #0xc
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #6
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	bl ov96_022199A8
	mov r1, #1
	str r0, [r5, #0x60]
	bl sub_0200DD10
	mov r7, #0
	mov r6, #0x78
	add r4, r5, #0
_02219C76:
	lsl r0, r6, #0x10
	asr r0, r0, #0x10
	str r0, [sp, #8]
	add r0, r7, #1
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	str r0, [sp]
	mov r0, #5
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	ldr r2, [sp, #8]
	mov r3, #0x24
	bl ov96_022199A8
	lsl r1, r7, #0x18
	str r0, [r4, #0x68]
	add r0, r5, #0
	lsr r1, r1, #0x18
	mov r2, #0
	bl ov96_02219DD0
	mov r0, #0xa
	str r0, [sp]
	mov r0, #4
	str r0, [sp, #4]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	ldr r2, [sp, #8]
	mov r3, #0x24
	bl ov96_022199A8
	mov r1, #0
	str r0, [r4, #0x78]
	bl sub_0200DCE8
	mov r0, #6
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	lsl r2, r6, #0x10
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	asr r2, r2, #0x10
	mov r3, #0x18
	bl ov96_022199A8
	add r1, r4, #0
	add r1, #0x88
	str r0, [r1]
	add r0, r4, #0
	add r0, #0x88
	ldr r0, [r0]
	mov r1, #0
	bl sub_0200DCE8
	add r7, r7, #1
	add r6, #0x20
	add r4, r4, #4
	cmp r7, #4
	blt _02219C76
	mov r4, #0
	mov r7, #0x30
	add r6, r5, #0
_02219CF6:
	ldr r0, _02219DA4 ; =0x00002712
	mov r3, #0x1e
	add r0, r4, r0
	str r0, [sp, #0x20]
	str r0, [sp, #0x24]
	ldr r0, _02219DA4 ; =0x00002712
	mov r1, #0x28
	str r0, [sp, #0x28]
	str r0, [sp, #0x2c]
	mov r0, #2
	str r0, [sp, #0x1c]
	add r0, sp, #0xc
	strh r1, [r0]
	strh r7, [r0, #2]
	add r0, r4, #2
	str r0, [sp, #0x14]
	mov r0, #2
	str r0, [sp, #0x38]
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	add r2, sp, #0xc
	lsl r3, r3, #0x10
	bl sub_0200D740
	add r1, r6, #0
	add r1, #0x98
	str r0, [r1]
	add r0, r6, #0
	add r0, #0x98
	ldr r0, [r0]
	mov r1, #1
	bl sub_0200DC78
	add r4, r4, #1
	add r7, #0x58
	add r6, r6, #4
	cmp r4, #2
	blt _02219CF6
	mov r6, #0
	add r4, r5, #0
	mov r7, #0x18
_02219D48:
	mov r0, #2
	sub r0, r0, r6
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp]
	add r3, r5, #0
	add r2, r4, #0
	add r3, #0x22
	add r2, #0x98
	ldrb r3, [r3]
	ldr r0, [r5]
	ldr r1, [r5, #4]
	ldr r2, [r2]
	bl ov96_02219DA8
	mov r0, #5
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	lsl r3, r7, #0x10
	ldr r0, [r5, #8]
	ldr r1, [r5, #0xc]
	mov r2, #0x28
	asr r3, r3, #0x10
	bl ov96_022199A8
	add r1, r4, #0
	add r1, #0xa0
	str r0, [r1]
	add r0, r4, #0
	add r0, #0xa0
	ldr r0, [r0]
	mov r1, #0
	bl sub_0200DCE8
	add r6, r6, #1
	add r4, r4, #4
	add r7, #0x58
	cmp r6, #2
	blt _02219D48
	add r0, r5, #0
	bl ov96_02219E60
	add sp, #0x40
	pop {r3, r4, r5, r6, r7, pc}
	nop
_02219DA4: .word 0x00002712
	thumb_func_end ov96_02219C30

	thumb_func_start ov96_02219DA8
ov96_02219DA8: ; 0x02219DA8
	push {r4, r5, lr}
	sub sp, #0x14
	add r4, r2, #0
	add r2, sp, #0x10
	ldrb r2, [r2, #0x10]
	add r5, r1, #0
	add r1, r3, #0
	add r3, sp, #4
	bl ov96_021E6168
	mov r2, #0
	add r0, r4, #0
	add r1, sp, #4
	add r3, r2, #0
	str r5, [sp]
	bl ov96_021EEBE4
	add sp, #0x14
	pop {r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_02219DA8

	thumb_func_start ov96_02219DD0
ov96_02219DD0: ; 0x02219DD0
	push {r4, r5, r6, lr}
	sub sp, #0x18
	add r4, r1, #0
	add r5, r0, #0
	add r0, r4, #2
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r6, [r0, #0x60]
	ldr r0, [r5]
	add r3, sp, #8
	bl ov96_021E6168
	lsl r0, r4, #9
	str r0, [sp]
	ldr r0, [r5, #4]
	add r1, sp, #8
	str r0, [sp, #4]
	ldrh r2, [r5, #0x20]
	ldr r3, [r5, #0x24]
	add r0, r6, #0
	bl ov96_021EECB8
	add sp, #0x18
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02219DD0

	thumb_func_start ov96_02219E00
ov96_02219E00: ; 0x02219E00
	push {r3, r4, r5, r6, r7, lr}
	sub sp, #0x38
	ldr r6, _02219E5C ; =0x0221D944
	add r7, r2, #0
	str r3, [sp]
	add r5, r0, #0
	add r4, r1, #0
	add r3, sp, #4
	mov r2, #6
_02219E12:
	ldmia r6!, {r0, r1}
	stmia r3!, {r0, r1}
	sub r2, r2, #1
	bne _02219E12
	ldr r0, [r6]
	cmp r5, #0
	str r0, [r3]
	bne _02219E26
	bl GF_AssertFail
_02219E26:
	cmp r4, #0
	bne _02219E2E
	bl GF_AssertFail
_02219E2E:
	add r1, sp, #4
	strh r7, [r1]
	ldr r0, [sp]
	mov r3, #0x1e
	strh r0, [r1, #2]
	add r0, sp, #0x40
	ldrh r2, [r0, #0x10]
	lsl r3, r3, #0x10
	strh r2, [r1, #6]
	ldrh r0, [r0, #0x14]
	add r1, r4, #0
	add r2, sp, #4
	str r0, [sp, #0xc]
	add r0, r5, #0
	bl sub_0200D740
	mov r1, #1
	add r4, r0, #0
	bl sub_0200DC78
	add r0, r4, #0
	add sp, #0x38
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
_02219E5C: .word 0x0221D944
	thumb_func_end ov96_02219E00

	thumb_func_start ov96_02219E60
ov96_02219E60: ; 0x02219E60
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	add r6, r0, #0
	mov r0, #0x14
	str r0, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldr r0, [r6, #8]
	ldr r1, [r6, #0xc]
	mov r2, #0x72
	mov r3, #0xb4
	bl ov96_02219E00
	mov r1, #0xe
	str r0, [r6, #0x64]
	bl sub_0200DD10
	mov r7, #0
	add r4, r6, #0
	mov r5, #0x86
_02219E88:
	mov r1, #0
	add r0, sp, #8
	str r1, [r0]
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldr r0, [r6, #0xc]
	bl sub_0200E2B0
	add r1, r0, #0
	ldr r0, [r6, #0x10]
	ldr r3, [r6, #4]
	mov r2, #1
	bl ov96_021EA374
	add r1, r4, #0
	add r1, #0xa8
	str r0, [r1]
	lsl r0, r5, #0xc
	str r0, [sp, #8]
	mov r0, #0x2d
	lsl r0, r0, #0xe
	str r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp, #0x10]
	add r0, r4, #0
	add r0, #0xa8
	ldr r0, [r0]
	add r1, sp, #8
	bl sub_020247D4
	add r0, r4, #0
	add r0, #0xa8
	ldr r0, [r0]
	mov r1, #1
	bl sub_02024830
	add r7, r7, #1
	add r4, r4, #4
	add r5, #0x10
	cmp r7, #2
	blt _02219E88
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02219E60

	thumb_func_start ov96_02219EE0
ov96_02219EE0: ; 0x02219EE0
	push {r4, lr}
	sub sp, #8
	add r4, r0, #0
	add r0, r1, #1
	mov r1, #3
	bl _s32_div_f
	lsl r2, r1, #0x18
	mov r0, #1
	lsr r2, r2, #0x16
	add r2, r4, r2
	str r0, [sp]
	mov r3, #2
	str r3, [sp, #4]
	add r2, #0xb0
	ldr r0, [r4, #0x1c]
	ldr r2, [r2]
	mov r1, #0
	bl BufferString
	ldr r0, [r4, #4]
	mov r3, #0x9a
	str r0, [sp]
	add r0, r4, #0
	ldr r1, [r4, #0x1c]
	ldr r2, [r4, #0x18]
	add r0, #0x40
	bl ov96_02219BC4
	add sp, #8
	pop {r4, pc}
	.balign 4, 0
	thumb_func_end ov96_02219EE0

	thumb_func_start ov96_02219F20
ov96_02219F20: ; 0x02219F20
	push {r3, r4, r5, r6, r7, lr}
	add r5, r0, #0
	lsl r6, r1, #2
	add r0, r5, r6
	add r7, r2, #0
	add r4, r3, #0
	mov r3, #0x1e
	ldr r0, [r0, #0x60]
	add r1, r7, #0
	add r2, r4, #0
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	add r0, r5, r6
	sub r4, #0x18
	lsl r2, r4, #0x10
	mov r3, #0x1e
	ldr r0, [r0, #0x68]
	add r1, r7, #0
	asr r2, r2, #0x10
	lsl r3, r3, #0x10
	bl sub_0200DDF4
	pop {r3, r4, r5, r6, r7, pc}
	thumb_func_end ov96_02219F20

	thumb_func_start ov96_02219F50
ov96_02219F50: ; 0x02219F50
	push {r4, r5, r6, lr}
	add r5, r0, #0
	add r4, r1, #0
	add r6, r2, #0
	bne _02219F5E
	mov r1, #1
	b _02219F60
_02219F5E:
	mov r1, #0
_02219F60:
	add r0, r4, #2
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x60]
	bl sub_0200DCE8
	add r0, r4, #6
	lsl r0, r0, #2
	add r0, r5, r0
	ldr r0, [r0, #0x60]
	add r1, r6, #0
	bl sub_0200DCE8
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02219F50

	thumb_func_start ov96_02219F7C
ov96_02219F7C: ; 0x02219F7C
	push {r3, r4, r5, r6, r7, lr}
	add r4, r1, #0
	str r0, [sp]
	bl ov96_021E5D34
	add r5, r0, #0
	add r0, r4, #0
	mov r1, #0x30
	bl AllocFromHeap
	mov r1, #0
	mov r2, #0x30
	add r7, r0, #0
	bl MIi_CpuFill8
	str r4, [r7]
	ldr r0, [sp]
	mov r4, #0
	str r0, [r7, #4]
	mov r0, #4
	sub r1, r0, r5
	add r0, r7, #0
	add r0, #0x2c
	strb r1, [r0]
	add r0, r7, #0
	add r0, #0x2c
	ldrb r0, [r0]
	cmp r0, #0
	ble _02219FD6
	add r6, r7, #0
	add r6, #8
_02219FBA:
	lsl r1, r5, #0x18
	ldr r2, [sp]
	add r0, r6, #0
	lsr r1, r1, #0x18
	bl ov96_0221A00C
	add r0, r7, #0
	add r0, #0x2c
	ldrb r0, [r0]
	add r4, r4, #1
	add r5, r5, #1
	add r6, #0xc
	cmp r4, r0
	blt _02219FBA
_02219FD6:
	add r0, r7, #0
	pop {r3, r4, r5, r6, r7, pc}
	.balign 4, 0
	thumb_func_end ov96_02219F7C

	thumb_func_start ov96_02219FDC
ov96_02219FDC: ; 0x02219FDC
	ldr r3, _02219FE0 ; =FreeToHeap
	bx r3
	.balign 4, 0
_02219FE0: .word FreeToHeap
	thumb_func_end ov96_02219FDC

	thumb_func_start ov96_02219FE4
ov96_02219FE4: ; 0x02219FE4
	push {r4, r5, r6, lr}
	add r6, r0, #0
	add r0, #0x2c
	ldrb r0, [r0]
	mov r4, #0
	cmp r0, #0
	ble _0221A00A
	add r5, r6, #0
	add r5, #8
_02219FF6:
	add r0, r5, #0
	bl ov96_0221A400
	add r0, r6, #0
	add r0, #0x2c
	ldrb r0, [r0]
	add r4, r4, #1
	add r5, #0xc
	cmp r4, r0
	blt _02219FF6
_0221A00A:
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_02219FE4

	thumb_func_start ov96_0221A00C
ov96_0221A00C: ; 0x0221A00C
	push {r4, r5, r6, lr}
	add r4, r1, #0
	add r6, r2, #0
	add r5, r0, #0
	mov r1, #0
	mov r2, #0xc
	bl MIi_CpuFill8
	str r6, [r5]
	ldr r1, [r5, #8]
	mov r0, #3
	bic r1, r0
	mov r0, #3
	and r0, r4
	orr r1, r0
	mov r0, #0xc
	bic r1, r0
	str r1, [r5, #8]
	pop {r4, r5, r6, pc}
	.balign 4, 0
	thumb_func_end ov96_0221A00C

	thumb_func_start ov96_0221A034
ov96_0221A034: ; 0x0221A034
	push {r3, r4, lr}
	sub sp, #0xc
	add r3, r0, #0
	add r4, r2, #0
	add r0, r1, #0
	add r1, r3, #0
	add r2, sp, #0
	bl VEC_Subtract
	add r0, sp, #0
	bl VEC_Mag
	cmp r0, r4
	bgt _0221A056
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_0221A056:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	thumb_func_end ov96_0221A034

	thumb_func_start ov96_0221A05C
ov96_0221A05C: ; 0x0221A05C
	push {r3, r4, lr}
	sub sp, #0xc
	add r3, r0, #0
	add r4, r2, #0
	add r0, r1, #0
	add r1, r3, #0
	add r2, sp, #0
	bl VEC_Subtract
	add r0, sp, #0
	add r1, r0, #0
	bl VEC_Normalize
	add r0, sp, #0
	bl ov96_02215FA0
	cmp r4, r0
	bne _0221A086
	add sp, #0xc
	mov r0, #1
	pop {r3, r4, pc}
_0221A086:
	mov r0, #0
	add sp, #0xc
	pop {r3, r4, pc}
	thumb_func_end ov96_0221A05C

	thumb_func_start ov96_0221A08C
ov96_0221A08C: ; 0x0221A08C
	push {r4, r5, r6, r7, lr}
	sub sp, #0x2c
	add r5, r0, #0
	mov r0, #0
	str r0, [sp, #0x10]
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x10]
	add r1, sp, #0x28
	strb r0, [r1]
	ldr r0, [sp, #0x10]
	strb r0, [r1, #1]
	ldr r0, [sp, #0x10]
	strb r0, [r1, #2]
	ldr r0, [sp, #0x10]
	strb r0, [r1, #3]
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215DD4
	ldr r1, [r5, #8]
	add r6, r0, #0
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	bl ov96_02215E2C
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	mov r7, #0
	add r4, sp, #0x28
	str r0, [sp, #0x18]
_0221A0D6:
	ldr r0, [r5, #8]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	cmp r7, r0
	beq _0221A14A
	lsl r1, r7, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	bl ov96_02215DD4
	str r0, [sp, #0x14]
	mov r2, #2
	ldr r1, [sp, #0x14]
	add r0, r6, #0
	lsl r2, r2, #0x10
	bl ov96_0221A034
	cmp r0, #0
	beq _0221A11E
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x18]
	add r0, r6, #0
	bl ov96_0221A05C
	cmp r0, #0
	beq _0221A10E
	mov r0, #3
	b _0221A110
_0221A10E:
	mov r0, #1
_0221A110:
	strb r0, [r4]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0xc]
	b _0221A14A
_0221A11E:
	mov r2, #3
	ldr r1, [sp, #0x14]
	add r0, r6, #0
	lsl r2, r2, #0x10
	bl ov96_0221A034
	cmp r0, #0
	beq _0221A14A
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x18]
	add r0, r6, #0
	bl ov96_0221A05C
	cmp r0, #0
	beq _0221A140
	mov r0, #2
	strb r0, [r4]
_0221A140:
	ldr r0, [sp, #0x10]
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	str r0, [sp, #0x10]
_0221A14A:
	add r7, r7, #1
	add r4, r4, #1
	cmp r7, #4
	blt _0221A0D6
	mov r4, #0
	add r0, sp, #0x24
	strb r4, [r0]
	strb r4, [r0, #1]
	strb r4, [r0, #2]
	strb r4, [r0, #3]
	add r1, r4, #0
	add r0, sp, #0x28
	add r2, sp, #0x1c
_0221A164:
	ldr r3, [r5, #8]
	lsl r3, r3, #0x1e
	lsr r3, r3, #0x1e
	cmp r1, r3
	beq _0221A17C
	ldrb r6, [r2, #9]
	ldrb r3, [r0]
	cmp r6, r3
	bhs _0221A17C
	strb r1, [r2, #8]
	ldrb r3, [r0]
	strb r3, [r2, #9]
_0221A17C:
	add r1, r1, #1
	add r0, r0, #1
	cmp r1, #4
	blt _0221A164
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	add r2, sp, #0x1c
	ldrb r3, [r2, #9]
	ldr r0, _0221A308 ; =0x0221D97C
	ldrb r0, [r0, r3]
	add r0, r4, r0
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r1, r0
	bge _0221A1D0
	ldrb r1, [r2, #8]
	ldr r0, [r5]
	bl ov96_02215DD4
	ldr r1, [r0]
	asr r2, r1, #0xc
	add r1, sp, #0x1c
	strh r2, [r1, #4]
	ldr r0, [r0, #4]
	add r2, sp, #0x20
	asr r0, r0, #0xc
	strh r0, [r1, #6]
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215EE8
	mov r0, #0x10
	add sp, #0x2c
	strb r0, [r5, #4]
	pop {r4, r5, r6, r7, pc}
_0221A1D0:
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _0221A1E6
	add r0, r4, #5
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_0221A1E6:
	ldr r0, [sp, #0xc]
	cmp r0, #0
	beq _0221A1F8
	sub r2, r0, #1
	ldr r0, _0221A30C ; =0x0221D978
	ldrb r0, [r0, r2]
	add r0, r4, r0
	lsl r0, r0, #0x18
	lsr r4, r0, #0x18
_0221A1F8:
	cmp r1, r4
	bge _0221A214
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215F2C
	mov r0, #0x14
	add sp, #0x2c
	strb r0, [r5, #4]
	pop {r4, r5, r6, r7, pc}
_0221A214:
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	cmp r1, #0x3c
	bge _0221A2BC
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	ldr r0, [r5, #8]
	str r1, [sp]
	lsl r0, r0, #0x1a
	lsr r0, r0, #0x1f
	bne _0221A302
	mov r7, #0
	mvn r7, r7
	ldr r0, _0221A310 ; =0x000003E7
	str r7, [sp, #8]
	str r0, [sp, #4]
	mov r4, #0
_0221A242:
	lsl r1, r4, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	bl ov96_02215E48
	add r6, r0, #0
	lsl r1, r4, #0x18
	ldr r0, [r5]
	lsr r1, r1, #0x18
	bl ov96_02215DBC
	ldr r1, [r5, #8]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	cmp r4, r1
	beq _0221A284
	cmp r0, #3
	beq _0221A284
	cmp r0, #4
	beq _0221A284
	ldrb r1, [r5, #7]
	ldr r0, [r5]
	bl ov96_02215E94
	cmp r0, #0
	bne _0221A284
	ldr r0, [sp, #4]
	cmp r0, r6
	ble _0221A284
	str r7, [sp, #8]
	lsl r0, r4, #0x18
	asr r7, r0, #0x18
	str r6, [sp, #4]
_0221A284:
	add r4, r4, #1
	cmp r4, #4
	blt _0221A242
	ldr r0, [sp]
	cmp r0, #0x3c
	bge _0221A294
	strb r7, [r5, #7]
	b _0221A2A2
_0221A294:
	cmp r0, #0x64
	bge _0221A29E
	ldr r0, [sp, #8]
	strb r0, [r5, #7]
	b _0221A2A2
_0221A29E:
	bl GF_AssertFail
_0221A2A2:
	mov r0, #7
	ldrsb r1, [r5, r0]
	sub r0, #8
	cmp r1, r0
	beq _0221A302
	ldr r1, [r5, #8]
	mov r0, #0x20
	orr r0, r1
	str r0, [r5, #8]
	mov r0, #0
	add sp, #0x2c
	strb r0, [r5, #4]
	pop {r4, r5, r6, r7, pc}
_0221A2BC:
	cmp r1, #0x50
	bge _0221A2C8
	mov r0, #0xa
	add sp, #0x2c
	strb r0, [r5, #4]
	pop {r4, r5, r6, r7, pc}
_0221A2C8:
	cmp r1, #0x64
	bge _0221A302
	bl MTRandom
	mov r1, #0x91
	bl _u32_div_f
	add r1, #0x38
	add r0, sp, #0x1c
	strh r1, [r0]
	bl MTRandom
	mov r1, #0x50
	bl _u32_div_f
	add r1, #0x48
	add r0, sp, #0x1c
	strh r1, [r0, #2]
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	add r2, sp, #0x1c
	bl ov96_02215F80
	mov r0, #0xa
	strb r0, [r5, #4]
_0221A302:
	add sp, #0x2c
	pop {r4, r5, r6, r7, pc}
	nop
_0221A308: .word 0x0221D97C
_0221A30C: .word 0x0221D978
_0221A310: .word 0x000003E7
	thumb_func_end ov96_0221A08C

	thumb_func_start ov96_0221A314
ov96_0221A314: ; 0x0221A314
	push {r4, r5, r6, lr}
	sub sp, #0x18
	add r5, r0, #0
	ldr r0, [r5, #8]
	add r2, sp, #0xc
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r4, r0, #2
	mov r1, #0
	add r0, sp, #0
	str r1, [r2]
	str r1, [r0]
	str r1, [r2, #4]
	str r1, [r0, #4]
	str r1, [r2, #8]
	str r1, [r0, #8]
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	ldr r6, _0221A3A4 ; =0x0221D98C
	bl ov96_02215DEC
	ldr r0, [r5, #8]
	add r2, r6, r4
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r1, r0, #2
	add r0, r6, #0
	ldrsh r0, [r0, r1]
	lsl r0, r0, #0xc
	str r0, [sp]
	ldr r0, [r5, #8]
	lsl r0, r0, #0x1e
	lsr r0, r0, #0x1e
	lsl r1, r0, #2
	ldr r0, _0221A3A8 ; =0x0221D98E
	ldrsh r0, [r0, r1]
	lsl r0, r0, #0xc
	str r0, [sp, #4]
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215F80
	mov r2, #1
	add r0, sp, #0xc
	add r1, sp, #0
	lsl r2, r2, #0x12
	bl ov96_0221A034
	cmp r0, #0
	beq _0221A3A0
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215F64
	ldr r1, [r5, #8]
	mov r0, #0x10
	bic r1, r0
	str r1, [r5, #8]
_0221A3A0:
	add sp, #0x18
	pop {r4, r5, r6, pc}
	.balign 4, 0
_0221A3A4: .word 0x0221D98C
_0221A3A8: .word 0x0221D98E
	thumb_func_end ov96_0221A314

	thumb_func_start ov96_0221A3AC
ov96_0221A3AC: ; 0x0221A3AC
	push {r4, r5, r6, lr}
	add r5, r0, #0
	bl MTRandom
	mov r1, #0x64
	bl _u32_div_f
	add r6, r1, #0
	ldr r1, [r5, #8]
	ldr r0, [r5]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	mov r4, #0
	bl ov96_02215E68
	cmp r0, #0xa
	bhs _0221A3D6
	mov r4, #0x64
	b _0221A3F4
_0221A3D6:
	cmp r0, #0x14
	bhs _0221A3DE
	mov r4, #0x46
	b _0221A3F4
_0221A3DE:
	cmp r0, #0x1e
	bhs _0221A3E6
	mov r4, #0x32
	b _0221A3F4
_0221A3E6:
	cmp r0, #0x28
	bhs _0221A3EE
	mov r4, #0x1e
	b _0221A3F4
_0221A3EE:
	cmp r0, #0x32
	bhs _0221A3F4
	mov r4, #0xa
_0221A3F4:
	cmp r6, r4
	bge _0221A3FC
	mov r0, #1
	pop {r4, r5, r6, pc}
_0221A3FC:
	mov r0, #0
	pop {r4, r5, r6, pc}
	thumb_func_end ov96_0221A3AC

	thumb_func_start ov96_0221A400
ov96_0221A400: ; 0x0221A400
	push {r3, r4, r5, lr}
	add r4, r0, #0
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215E94
	cmp r0, #0
	beq _0221A41A
	b _0221A568
_0221A41A:
	ldr r1, [r4, #8]
	lsl r0, r1, #0x1a
	lsr r0, r0, #0x1f
	beq _0221A4C4
	lsl r0, r1, #0x1b
	lsr r0, r0, #0x1f
	bne _0221A4C4
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	ldr r0, [r4]
	lsr r1, r1, #0x18
	bl ov96_02215DBC
	ldrb r1, [r4, #7]
	ldr r0, [r4]
	bl ov96_02215DBC
	cmp r0, #3
	beq _0221A462
	ldrb r1, [r4, #7]
	ldr r0, [r4]
	bl ov96_02215E94
	cmp r0, #0
	bne _0221A462
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215EB0
	cmp r0, #0
	beq _0221A49C
_0221A462:
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215DD4
	ldr r1, [r0]
	asr r2, r1, #0xc
	add r1, sp, #0
	strh r2, [r1]
	ldr r0, [r0, #4]
	add r2, sp, #0
	asr r0, r0, #0xc
	strh r0, [r1, #2]
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215F80
	ldr r1, [r4, #8]
	mov r0, #0x20
	bic r1, r0
	str r1, [r4, #8]
	b _0221A4C4
_0221A49C:
	ldrb r1, [r4, #7]
	ldr r0, [r4]
	bl ov96_02215DD4
	ldr r1, [r0]
	asr r2, r1, #0xc
	add r1, sp, #0
	strh r2, [r1]
	ldr r0, [r0, #4]
	add r2, sp, #0
	asr r0, r0, #0xc
	strh r0, [r1, #2]
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215F80
_0221A4C4:
	ldr r1, [r4, #8]
	lsl r0, r1, #0x1b
	lsr r0, r0, #0x1f
	beq _0221A504
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	ldr r0, [r4]
	lsr r1, r1, #0x18
	bl ov96_02215ECC
	cmp r0, #0
	beq _0221A568
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215DBC
	add r5, r0, #0
	add r0, r4, #0
	bl ov96_0221A314
	cmp r5, #3
	bne _0221A568
	ldr r1, [r4, #8]
	mov r0, #0x10
	bic r1, r0
	str r1, [r4, #8]
	pop {r3, r4, r5, pc}
_0221A504:
	mov r0, #4
	ldrsb r1, [r4, r0]
	sub r1, r1, #1
	strb r1, [r4, #4]
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _0221A568
	bge _0221A518
	mov r0, #0
	strb r0, [r4, #4]
_0221A518:
	mov r0, #6
	ldrsb r1, [r4, r0]
	sub r1, r1, #1
	strb r1, [r4, #6]
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _0221A568
	mov r0, #3
	strb r0, [r4, #6]
	ldr r1, [r4, #8]
	ldr r0, [r4]
	lsl r1, r1, #0x1e
	lsr r1, r1, #0x1e
	lsl r1, r1, #0x18
	lsr r1, r1, #0x18
	bl ov96_02215ECC
	cmp r0, #0
	beq _0221A568
	add r0, r4, #0
	bl ov96_0221A08C
	mov r0, #5
	ldrsb r1, [r4, r0]
	sub r1, r1, #1
	strb r1, [r4, #5]
	ldrsb r0, [r4, r0]
	cmp r0, #0
	bgt _0221A568
	add r0, r4, #0
	bl ov96_0221A3AC
	cmp r0, #0
	beq _0221A564
	ldr r1, [r4, #8]
	mov r0, #0x10
	orr r0, r1
	str r0, [r4, #8]
_0221A564:
	mov r0, #0
	strb r0, [r4, #5]
_0221A568:
	pop {r3, r4, r5, pc}
	.balign 4, 0
	thumb_func_end ov96_0221A400

	thumb_func_start ov96_0221A56C
ov96_0221A56C: ; 0x0221A56C
	push {r3, lr}
	ldr r2, _0221A578 ; =0x0221D9A0
	lsl r3, r1, #2
	ldr r2, [r2, r3]
	blx r2
	pop {r3, pc}
	.balign 4, 0
_0221A578: .word 0x0221D9A0
	thumb_func_end ov96_0221A56C

	thumb_func_start ov96_0221A57C
ov96_0221A57C: ; 0x0221A57C
	push {r3, r4, r5, r6, r7, lr}
	add r7, r0, #0
	ldr r0, _0221A5B4 ; =0x0221D9C8
	lsl r1, r1, #2
	ldr r6, [r0, r1]
	cmp r6, #0
	beq _0221A5AC
	mov r5, #0
_0221A58C:
	add r0, r7, #0
	add r1, r5, #0
	bl ov96_021E94EC
	add r4, r0, #0
	ldr r0, [r4, #0xc]
	lsl r0, r0, #0x10
	lsr r0, r0, #0x10
	blx r6
	strh r0, [r4, #0xa]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #4
	blo _0221A58C
	pop {r3, r4, r5, r6, r7, pc}
_0221A5AC:
	bl GF_AssertFail
	pop {r3, r4, r5, r6, r7, pc}
	nop
_0221A5B4: .word 0x0221D9C8
	thumb_func_end ov96_0221A57C

	thumb_func_start ov96_0221A5B8
ov96_0221A5B8: ; 0x0221A5B8
	push {r3, lr}
	lsl r2, r1, #2
	ldr r1, _0221A5D0 ; =0x0221D9C8
	ldr r1, [r1, r2]
	cmp r1, #0
	bne _0221A5CA
	bl ov96_0221A730
	pop {r3, pc}
_0221A5CA:
	bl GF_AssertFail
	pop {r3, pc}
	.balign 4, 0
_0221A5D0: .word 0x0221D9C8
	thumb_func_end ov96_0221A5B8

	thumb_func_start ov96_0221A5D4
ov96_0221A5D4: ; 0x0221A5D4
	push {r4, lr}
	add r4, r1, #0
	bl _utof
	add r1, r4, #0
	bl _fmul
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0221A610 ; =0x3FF00000
	mov r0, #0
	bl _dadd
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0221A614 ; =0x405E0000
	mov r0, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0221A618 ; =0x4062C000
	mov r0, #0
	bl _dsub
	bl _d2f
	pop {r4, pc}
	.balign 4, 0
_0221A610: .word 0x3FF00000
_0221A614: .word 0x405E0000
_0221A618: .word 0x4062C000
	thumb_func_end ov96_0221A5D4

	thumb_func_start ov96_0221A61C
ov96_0221A61C: ; 0x0221A61C
	push {r4, lr}
	bl _ftou
	add r4, r0, #0
	bl _dfltu
	ldr r3, _0221A63C ; =0x40690000
	mov r2, #0
	bl _dgr
	bls _0221A634
	mov r4, #0xc8
_0221A634:
	lsl r0, r4, #0x18
	lsr r0, r0, #0x18
	pop {r4, pc}
	nop
_0221A63C: .word 0x40690000
	thumb_func_end ov96_0221A61C

	thumb_func_start ov96_0221A640
ov96_0221A640: ; 0x0221A640
	push {r3, lr}
	bl _utof
	ldr r1, _0221A668 ; =0x41F00000
	bl _fdiv
	bl _f2d
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0221A66C ; =0x40C67600
	mov r0, #0
	bl _ddiv
	bl _d2f
	bl ov96_0221A61C
	pop {r3, pc}
	nop
_0221A668: .word 0x41F00000
_0221A66C: .word 0x40C67600
	thumb_func_end ov96_0221A640

	thumb_func_start ov96_0221A670
ov96_0221A670: ; 0x0221A670
	push {r3, lr}
	lsl r1, r0, #1
	add r0, r0, r1
	bl _itof
	bl ov96_0221A61C
	pop {r3, pc}
	thumb_func_end ov96_0221A670

	thumb_func_start ov96_0221A680
ov96_0221A680: ; 0x0221A680
	push {r3, lr}
	lsl r1, r0, #1
	add r0, r0, r1
	bl _itof
	bl ov96_0221A61C
	pop {r3, pc}
	thumb_func_end ov96_0221A680

	thumb_func_start ov96_0221A690
ov96_0221A690: ; 0x0221A690
	push {r3, lr}
	bl _utof
	bl ov96_0221A61C
	pop {r3, pc}
	thumb_func_end ov96_0221A690

	thumb_func_start ov96_0221A69C
ov96_0221A69C: ; 0x0221A69C
	push {r3, lr}
	ldr r1, _0221A6AC ; =0x3DA3D70A
	bl ov96_0221A5D4
	bl ov96_0221A61C
	pop {r3, pc}
	nop
_0221A6AC: .word 0x3DA3D70A
	thumb_func_end ov96_0221A69C

	thumb_func_start ov96_0221A6B0
ov96_0221A6B0: ; 0x0221A6B0
	push {r3, lr}
	bl _utof
	bl _f2d
	ldr r3, _0221A6CC ; =0x400C0000
	mov r2, #0
	bl _ddiv
	bl _d2f
	bl ov96_0221A61C
	pop {r3, pc}
	.balign 4, 0
_0221A6CC: .word 0x400C0000
	thumb_func_end ov96_0221A6B0

	thumb_func_start ov96_0221A6D0
ov96_0221A6D0: ; 0x0221A6D0
	push {r3, lr}
	bl _utof
	bl _f2d
	ldr r3, _0221A6F8 ; =0x40900000
	mov r2, #0
	bl _ddiv
	add r3, r1, #0
	add r2, r0, #0
	ldr r1, _0221A6FC ; =0x40240000
	mov r0, #0
	bl _dmul
	bl _d2f
	bl ov96_0221A61C
	pop {r3, pc}
	.balign 4, 0
_0221A6F8: .word 0x40900000
_0221A6FC: .word 0x40240000
	thumb_func_end ov96_0221A6D0

	thumb_func_start ov96_0221A700
ov96_0221A700: ; 0x0221A700
	push {r3, lr}
	bl _utof
	bl _f2d
	ldr r3, _0221A71C ; =0x3FF80000
	mov r2, #0
	bl _dmul
	bl _d2f
	bl ov96_0221A61C
	pop {r3, pc}
	.balign 4, 0
_0221A71C: .word 0x3FF80000
	thumb_func_end ov96_0221A700

	thumb_func_start ov96_0221A720
ov96_0221A720: ; 0x0221A720
	push {r3, lr}
	lsl r1, r0, #1
	add r0, r0, r1
	bl _itof
	bl ov96_0221A61C
	pop {r3, pc}
	thumb_func_end ov96_0221A720

	thumb_func_start ov96_0221A730
ov96_0221A730: ; 0x0221A730
	push {r4, r5, r6, r7, lr}
	sub sp, #0x14
	ldr r1, _0221A7D0 ; =0x0221D99C
	str r0, [sp]
	ldrb r2, [r1]
	add r0, sp, #8
	mov r4, #0
	strb r2, [r0]
	ldrb r2, [r1, #1]
	add r6, sp, #0x10
	add r5, r4, #0
	strb r2, [r0, #1]
	ldrb r2, [r1, #2]
	ldrb r1, [r1, #3]
	add r7, sp, #0xc
	strb r2, [r0, #2]
	strb r1, [r0, #3]
_0221A752:
	ldr r0, [sp]
	add r1, r4, #0
	bl ov96_021E94EC
	ldrb r0, [r0, #9]
	strb r0, [r6, r4]
	add r0, r4, #1
	lsl r0, r0, #0x18
	strb r5, [r7, r4]
	lsr r4, r0, #0x18
	cmp r4, #4
	blo _0221A752
	add r7, sp, #0x10
	add r6, sp, #0xc
_0221A76E:
	ldr r0, [sp]
	add r1, r5, #0
	ldrb r4, [r7, r5]
	bl ov96_021E94EC
	str r0, [sp, #4]
	mov r0, #0
_0221A77C:
	cmp r5, r0
	beq _0221A78C
	ldrb r1, [r7, r0]
	cmp r4, r1
	bne _0221A78C
	ldrb r1, [r6, r5]
	add r1, r1, #1
	strb r1, [r6, r5]
_0221A78C:
	add r0, r0, #1
	lsl r0, r0, #0x18
	lsr r0, r0, #0x18
	cmp r0, #4
	blo _0221A77C
	ldrb r1, [r6, r5]
	add r0, sp, #8
	add r0, r0, r4
	ldrb r0, [r1, r0]
	ldr r1, [sp, #4]
	ldr r2, [r1, #0xc]
	lsl r1, r2, #2
	add r1, r2, r1
	add r0, r0, r1
	lsl r0, r0, #0x10
	lsr r4, r0, #0x10
	add r0, r4, #0
	bl _dfltu
	ldr r3, _0221A7D4 ; =0x40690000
	mov r2, #0
	bl _dgr
	bls _0221A7BE
	mov r4, #0xc8
_0221A7BE:
	ldr r0, [sp, #4]
	strh r4, [r0, #0xa]
	add r0, r5, #1
	lsl r0, r0, #0x18
	lsr r5, r0, #0x18
	cmp r5, #4
	blo _0221A76E
	add sp, #0x14
	pop {r4, r5, r6, r7, pc}
	.balign 4, 0
_0221A7D0: .word 0x0221D99C
_0221A7D4: .word 0x40690000
	thumb_func_end ov96_0221A730

	.rodata

_0221A7D8:
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0xC1, 0xE5, 0x21, 0x02, 0xD5, 0xE5, 0x21, 0x02, 0x9D, 0xE6, 0x21, 0x02
	.byte 0x61, 0x00, 0x00, 0x00, 0x0D, 0x01, 0x1F, 0x02, 0xE5, 0x08, 0x1F, 0x02, 0xF5, 0x08, 0x1F, 0x02
	.byte 0x5D, 0x09, 0x1F, 0x02, 0x00, 0x00, 0x00, 0x00, 0x79, 0xB6, 0x1E, 0x02, 0x81, 0xB6, 0x1E, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0x89, 0xB6, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0x99, 0x0C, 0x21, 0x02
	.byte 0x51, 0x16, 0x21, 0x02, 0x61, 0x16, 0x21, 0x02, 0xC9, 0x16, 0x21, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0x49, 0x94, 0x20, 0x02, 0x39, 0x97, 0x20, 0x02, 0x49, 0x97, 0x20, 0x02, 0xAD, 0x97, 0x20, 0x02
	.byte 0x01, 0x00, 0x00, 0x00, 0x91, 0xB6, 0x1E, 0x02, 0x99, 0xB6, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0xA1, 0xB6, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0x59, 0x15, 0x20, 0x02, 0x19, 0x1B, 0x20, 0x02
	.byte 0x35, 0x1B, 0x20, 0x02, 0x99, 0x1B, 0x20, 0x02, 0x00, 0x00, 0x00, 0x00, 0x35, 0x79, 0x1F, 0x02
	.byte 0x4D, 0x7C, 0x1F, 0x02, 0x00, 0x00, 0x00, 0x00, 0x71, 0x7C, 0x1F, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0xC5, 0x5A, 0x21, 0x02, 0xD1, 0x5C, 0x21, 0x02, 0xE9, 0x5C, 0x21, 0x02, 0x4D, 0x5D, 0x21, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0xB8, 0x0B, 0x23, 0x00, 0x28, 0x00, 0x50, 0x00, 0x28, 0x00, 0x5E, 0x01
	.byte 0x00, 0x30, 0x46, 0x00, 0x1E, 0x00, 0x03, 0x00, 0xF1, 0xE3, 0x20, 0x02, 0xF5, 0xE5, 0x20, 0x02
	.byte 0x0D, 0xE6, 0x20, 0x02, 0x71, 0xE6, 0x20, 0x02, 0x00, 0x00, 0x00, 0x00, 0x0D, 0xEE, 0x1E, 0x02
	.byte 0xBD, 0xEE, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0xC1, 0xEE, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0xED, 0x47, 0x20, 0x02, 0xE9, 0x4D, 0x20, 0x02, 0xF9, 0x4D, 0x20, 0x02, 0x59, 0x4E, 0x20, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0xFD, 0xF0, 0x1E, 0x02, 0x8D, 0xF1, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0x9D, 0xF1, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0x69, 0xC7, 0x1F, 0x02, 0x75, 0xCD, 0x1F, 0x02
	.byte 0x85, 0xCD, 0x1F, 0x02, 0x11, 0xCE, 0x1F, 0x02, 0x00, 0x00, 0x00, 0x00, 0xA9, 0x94, 0x1F, 0x02
	.byte 0xA5, 0x9C, 0x1F, 0x02, 0xC5, 0x9C, 0x1F, 0x02, 0x59, 0x9D, 0x1F, 0x02, 0x01, 0x00, 0x00, 0x00
	.byte 0x19, 0x50, 0x1F, 0x02, 0xC1, 0x54, 0x1F, 0x02, 0xD5, 0x54, 0x1F, 0x02, 0x3D, 0x55, 0x1F, 0x02
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0x0A, 0x03, 0x02, 0x09, 0x0A, 0x08, 0x09, 0x01, 0x0A
	.byte 0x07, 0x06, 0x03, 0x0A, 0x05, 0x04, 0x00, 0x0A, 0x00, 0x05, 0x04, 0x06, 0x05, 0x04, 0x01, 0x08
	.byte 0x09, 0x08, 0x01, 0x03, 0x03, 0x02, 0x09, 0x07, 0x06, 0x07, 0x00, 0x02, 0x04, 0x02, 0x09, 0x07
	.byte 0x07, 0x02, 0x03, 0x08, 0x05, 0x00, 0x09, 0x07, 0x03, 0x06, 0x08, 0x05, 0x08, 0x05, 0x03, 0x00
	.byte 0x01, 0x02, 0x09, 0x04, 0x02, 0x06, 0x05, 0x03, 0x00, 0x07, 0x03, 0x09, 0x09, 0x08, 0x04, 0x01
	.byte 0x06, 0x03, 0x07, 0x00, 0xC5, 0x67, 0x1E, 0x02, 0x15, 0x68, 0x1E, 0x02, 0x71, 0x68, 0x1E, 0x02
	.byte 0x5D, 0x69, 0x1E, 0x02, 0x91, 0x69, 0x1E, 0x02, 0xC5, 0x69, 0x1E, 0x02, 0x01, 0x6A, 0x1E, 0x02
	.byte 0x55, 0x6A, 0x1E, 0x02, 0x95, 0x6A, 0x1E, 0x02, 0xE9, 0x6A, 0x1E, 0x02, 0xC1, 0x6B, 0x1E, 0x02
	.byte 0xED, 0x6B, 0x1E, 0x02, 0x21, 0x6C, 0x1E, 0x02, 0x41, 0x6C, 0x1E, 0x02, 0xB9, 0x6C, 0x1E, 0x02
	.byte 0xE5, 0x6C, 0x1E, 0x02, 0x55, 0x6D, 0x1E, 0x02, 0xE9, 0x6D, 0x1E, 0x02, 0x39, 0x6E, 0x1E, 0x02
	.byte 0x19, 0x6F, 0x1E, 0x02, 0x2D, 0x6F, 0x1E, 0x02, 0xFD, 0x6F, 0x1E, 0x02, 0x31, 0x70, 0x1E, 0x02
	.byte 0x81, 0x70, 0x1E, 0x02, 0xF1, 0x70, 0x1E, 0x02, 0x1D, 0x71, 0x1E, 0x02, 0x51, 0x71, 0x1E, 0x02
	.byte 0x91, 0x71, 0x1E, 0x02, 0x69, 0x72, 0x1E, 0x02, 0xAD, 0x74, 0x1E, 0x02, 0xE1, 0x74, 0x1E, 0x02
	.byte 0x95, 0x72, 0x1E, 0x02, 0xCD, 0x72, 0x1E, 0x02, 0x21, 0x73, 0x1E, 0x02, 0xF9, 0x73, 0x1E, 0x02
	.byte 0x15, 0x75, 0x1E, 0x02, 0x45, 0x75, 0x1E, 0x02, 0x91, 0x75, 0x1E, 0x02, 0xB9, 0x75, 0x1E, 0x02
	.byte 0x40, 0x01, 0x3F, 0x01, 0x42, 0x01, 0x43, 0x01, 0x3D, 0x01, 0x45, 0x01, 0x47, 0x01, 0x58, 0x01
	.byte 0x55, 0x01, 0x4C, 0x01, 0x41, 0x01, 0x46, 0x01, 0x3E, 0x01, 0x4A, 0x01, 0x43, 0x01, 0x5A, 0x01
	.byte 0x47, 0x01, 0x4D, 0x01, 0x58, 0x01, 0x79, 0x01, 0x49, 0x01, 0x40, 0x01, 0x5C, 0x01, 0x5A, 0x01
	.byte 0x59, 0x01, 0x40, 0x01, 0x3F, 0x01, 0x42, 0x01, 0x5A, 0x01, 0x59, 0x01, 0x49, 0x01, 0x40, 0x01
	.byte 0x5C, 0x01, 0x4A, 0x01, 0x43, 0x01, 0x41, 0x01, 0x46, 0x01, 0x3E, 0x01, 0x55, 0x01, 0x4C, 0x01
	.byte 0x45, 0x01, 0x47, 0x01, 0x58, 0x01, 0x58, 0x01, 0x79, 0x01, 0x5A, 0x01, 0x47, 0x01, 0x4D, 0x01
	.byte 0x43, 0x01, 0x3D, 0x01, 0x44, 0x01, 0x62, 0x01, 0x40, 0x01, 0x58, 0x01, 0x59, 0x01, 0x80, 0x01
	.byte 0x81, 0x00, 0x45, 0x01, 0x4C, 0x01, 0x4D, 0x01, 0x55, 0x01, 0x3D, 0x01, 0x46, 0x01, 0xE8, 0x00
	.byte 0x7A, 0x01, 0x65, 0x01, 0x41, 0x01, 0x79, 0x01, 0x58, 0x01, 0x3E, 0x01, 0x42, 0x01, 0x3F, 0x01
	.byte 0x60, 0x01, 0x5A, 0x01, 0x55, 0x01, 0x44, 0x01, 0x62, 0x01, 0x40, 0x01, 0x5A, 0x01, 0x55, 0x01
	.byte 0x42, 0x01, 0x3F, 0x01, 0x60, 0x01, 0xE8, 0x00, 0x7A, 0x01, 0x55, 0x01, 0x3D, 0x01, 0x46, 0x01
	.byte 0x4C, 0x01, 0x4D, 0x01, 0x80, 0x01, 0x81, 0x00, 0x45, 0x01, 0x58, 0x01, 0x3E, 0x01, 0x65, 0x01
	.byte 0x41, 0x01, 0x79, 0x01, 0x59, 0x01, 0x58, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00
	.byte 0x03, 0x00, 0x04, 0x00, 0x05, 0x00, 0x06, 0x00, 0x07, 0x00, 0x08, 0x00, 0x09, 0x00, 0x0A, 0x00
	.byte 0x0B, 0x00, 0x0C, 0x00, 0x0D, 0x00, 0x0E, 0x00, 0x0F, 0x00, 0x10, 0x00, 0x11, 0x00, 0x12, 0x00
	.byte 0x13, 0x00, 0x14, 0x00, 0x15, 0x00, 0x16, 0x00, 0x17, 0x00, 0x18, 0x00, 0x19, 0x00, 0x1A, 0x00
	.byte 0x1B, 0x00, 0x1C, 0x00, 0x1D, 0x00, 0x1E, 0x00, 0x1F, 0x00, 0x20, 0x00, 0x21, 0x00, 0x22, 0x00
	.byte 0x23, 0x00, 0x24, 0x00, 0x25, 0x00, 0x26, 0x00, 0x27, 0x00, 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00
	.byte 0x2B, 0x00, 0x2C, 0x00, 0x2D, 0x00, 0x2E, 0x00, 0x2F, 0x00, 0x30, 0x00, 0x31, 0x00, 0x32, 0x00
	.byte 0x33, 0x00, 0x34, 0x00, 0x35, 0x00, 0x36, 0x00, 0x37, 0x00, 0x38, 0x00, 0x39, 0x00, 0x3A, 0x00
	.byte 0x3B, 0x00, 0x3C, 0x00, 0x3D, 0x00, 0x3E, 0x00, 0x3F, 0x00, 0x40, 0x00, 0x41, 0x00, 0x42, 0x00
	.byte 0x43, 0x00, 0x44, 0x00, 0x45, 0x00, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00, 0x49, 0x00, 0x4A, 0x00
	.byte 0x4B, 0x00, 0x4C, 0x00, 0x4D, 0x00, 0x4E, 0x00, 0x4F, 0x00, 0x50, 0x00, 0x51, 0x00, 0x52, 0x00
	.byte 0x53, 0x00, 0x54, 0x00, 0x55, 0x00, 0x56, 0x00, 0x57, 0x00, 0x58, 0x00, 0x59, 0x00, 0x5A, 0x00
	.byte 0x5B, 0x00, 0x5C, 0x00, 0x5D, 0x00, 0x5E, 0x00, 0x5F, 0x00, 0x60, 0x00, 0x61, 0x00, 0x62, 0x00
	.byte 0x63, 0x00, 0x64, 0x00, 0x65, 0x00, 0x66, 0x00, 0x67, 0x00, 0x68, 0x00, 0x69, 0x00, 0x6A, 0x00
	.byte 0x6B, 0x00, 0x6C, 0x00, 0x6D, 0x00, 0x6E, 0x00, 0x6F, 0x00, 0x70, 0x00, 0x71, 0x00, 0x72, 0x00
	.byte 0x73, 0x00, 0x74, 0x00, 0x75, 0x00, 0x76, 0x00, 0x77, 0x00, 0x78, 0x00, 0x79, 0x00, 0x7A, 0x00
	.byte 0x7B, 0x00, 0x7C, 0x00, 0x7D, 0x00, 0x7E, 0x00, 0x7F, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00
	.byte 0x83, 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, 0x00, 0x8A, 0x00
	.byte 0x8B, 0x00, 0x8C, 0x00, 0x8D, 0x00, 0x8E, 0x00, 0x8F, 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00
	.byte 0x93, 0x00, 0x94, 0x00, 0x95, 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9A, 0x00
	.byte 0x9B, 0x00, 0x9C, 0x00, 0x9D, 0x00, 0x9E, 0x00, 0x9F, 0x00, 0xA0, 0x00, 0xA1, 0x00, 0xA2, 0x00
	.byte 0xA3, 0x00, 0xA4, 0x00, 0xA5, 0x00, 0xA6, 0x00, 0xA7, 0x00, 0xA8, 0x00, 0xA9, 0x00, 0xAA, 0x00
	.byte 0xAB, 0x00, 0xAD, 0x00, 0xAE, 0x00, 0xAF, 0x00, 0xB0, 0x00, 0xB1, 0x00, 0xB2, 0x00, 0xB3, 0x00
	.byte 0xB4, 0x00, 0xB5, 0x00, 0xB6, 0x00, 0xB7, 0x00, 0xB8, 0x00, 0xB9, 0x00, 0xBA, 0x00, 0xBB, 0x00
	.byte 0xBC, 0x00, 0xBD, 0x00, 0xBE, 0x00, 0xBF, 0x00, 0xC0, 0x00, 0xC1, 0x00, 0xC2, 0x00, 0xC3, 0x00
	.byte 0xC4, 0x00, 0xC5, 0x00, 0xC6, 0x00, 0xC7, 0x00, 0xC8, 0x00, 0xC9, 0x00, 0xE5, 0x00, 0xE6, 0x00
	.byte 0xE7, 0x00, 0xE8, 0x00, 0xE9, 0x00, 0xEA, 0x00, 0xEB, 0x00, 0xEC, 0x00, 0xED, 0x00, 0xEE, 0x00
	.byte 0xEF, 0x00, 0xF0, 0x00, 0xF1, 0x00, 0xF2, 0x00, 0xF3, 0x00, 0xF4, 0x00, 0xF5, 0x00, 0xF6, 0x00
	.byte 0xF7, 0x00, 0xF8, 0x00, 0xF9, 0x00, 0xFA, 0x00, 0xFB, 0x00, 0xFC, 0x00, 0xFD, 0x00, 0xFE, 0x00
	.byte 0xFF, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x01, 0x03, 0x01, 0x04, 0x01, 0x05, 0x01, 0x06, 0x01
	.byte 0x07, 0x01, 0x08, 0x01, 0x09, 0x01, 0x0A, 0x01, 0x0B, 0x01, 0x0C, 0x01, 0x0D, 0x01, 0x0E, 0x01
	.byte 0x0F, 0x01, 0x10, 0x01, 0x11, 0x01, 0x12, 0x01, 0x13, 0x01, 0x14, 0x01, 0x15, 0x01, 0x16, 0x01
	.byte 0x17, 0x01, 0x18, 0x01, 0x19, 0x01, 0x1A, 0x01, 0x1B, 0x01, 0x1C, 0x01, 0x1D, 0x01, 0x1E, 0x01
	.byte 0x1F, 0x01, 0x20, 0x01, 0x21, 0x01, 0x22, 0x01, 0x23, 0x01, 0x24, 0x01, 0x25, 0x01, 0x26, 0x01
	.byte 0x27, 0x01, 0x28, 0x01, 0x29, 0x01, 0x2A, 0x01, 0x2B, 0x01, 0x2C, 0x01, 0x2D, 0x01, 0x2E, 0x01
	.byte 0x2F, 0x01, 0x30, 0x01, 0x31, 0x01, 0x32, 0x01, 0x33, 0x01, 0x34, 0x01, 0x35, 0x01, 0x36, 0x01
	.byte 0x37, 0x01, 0x38, 0x01, 0x39, 0x01, 0x3A, 0x01, 0x3B, 0x01, 0x3C, 0x01, 0x3D, 0x01, 0x3E, 0x01
	.byte 0x3F, 0x01, 0x40, 0x01, 0x41, 0x01, 0x42, 0x01, 0x43, 0x01, 0x44, 0x01, 0x45, 0x01, 0x46, 0x01
	.byte 0x47, 0x01, 0x48, 0x01, 0x49, 0x01, 0x4A, 0x01, 0x4B, 0x01, 0x4C, 0x01, 0x4D, 0x01, 0x4E, 0x01
	.byte 0x4F, 0x01, 0x50, 0x01, 0x51, 0x01, 0x52, 0x01, 0x53, 0x01, 0x54, 0x01, 0x55, 0x01, 0x56, 0x01
	.byte 0x57, 0x01, 0x58, 0x01, 0x59, 0x01, 0x5A, 0x01, 0x5B, 0x01, 0x5C, 0x01, 0x5D, 0x01, 0x5E, 0x01
	.byte 0x5F, 0x01, 0x60, 0x01, 0x61, 0x01, 0x62, 0x01, 0x63, 0x01, 0x64, 0x01, 0x65, 0x01, 0x66, 0x01
	.byte 0x67, 0x01, 0x68, 0x01, 0x69, 0x01, 0x6A, 0x01, 0x6B, 0x01, 0x6C, 0x01, 0x6D, 0x01, 0x6E, 0x01
	.byte 0x6F, 0x01, 0x70, 0x01, 0x71, 0x01, 0x72, 0x01, 0x73, 0x01, 0x74, 0x01, 0x75, 0x01, 0x76, 0x01
	.byte 0x77, 0x01, 0x78, 0x01, 0x79, 0x01, 0x7A, 0x01, 0x7B, 0x01, 0x7C, 0x01, 0x7D, 0x01, 0x7E, 0x01
	.byte 0x7F, 0x01, 0x80, 0x01, 0x81, 0x01, 0x82, 0x01, 0x83, 0x01, 0x84, 0x01, 0x85, 0x01, 0x86, 0x01
	.byte 0x87, 0x01, 0x88, 0x01, 0x89, 0x01, 0x8A, 0x01, 0x8B, 0x01, 0x8C, 0x01, 0x8D, 0x01, 0x8E, 0x01
	.byte 0x8F, 0x01, 0x90, 0x01, 0x91, 0x01, 0x92, 0x01, 0x93, 0x01, 0x94, 0x01, 0x95, 0x01, 0x96, 0x01
	.byte 0x97, 0x01, 0x98, 0x01, 0x99, 0x01, 0x9A, 0x01, 0x9B, 0x01, 0x9C, 0x01, 0x9D, 0x01, 0xA1, 0x01
	.byte 0xA2, 0x01, 0xA3, 0x01, 0xA4, 0x01, 0xA5, 0x01, 0xA6, 0x01, 0xA7, 0x01, 0xA8, 0x01, 0xA9, 0x01
	.byte 0xAA, 0x01, 0xAB, 0x01, 0xAC, 0x01, 0xAD, 0x01, 0xAE, 0x01, 0xAF, 0x01, 0xB0, 0x01, 0xB1, 0x01
	.byte 0xB2, 0x01, 0xB3, 0x01, 0xB4, 0x01, 0xB5, 0x01, 0xB6, 0x01, 0xB7, 0x01, 0xB8, 0x01, 0xB9, 0x01
	.byte 0xBA, 0x01, 0xBD, 0x01, 0xC0, 0x01, 0xC1, 0x01, 0xC2, 0x01, 0xC3, 0x01, 0xC4, 0x01, 0xC5, 0x01
	.byte 0xC6, 0x01, 0xC7, 0x01, 0xC8, 0x01, 0xCA, 0x01, 0xCC, 0x01, 0xCD, 0x01, 0xCE, 0x01, 0xCF, 0x01
	.byte 0xD0, 0x01, 0xD1, 0x01, 0xD2, 0x01, 0xD3, 0x01, 0xD4, 0x01, 0xD5, 0x01, 0xD6, 0x01, 0xD7, 0x01
	.byte 0xD8, 0x01, 0xD9, 0x01, 0xDA, 0x01, 0xDB, 0x01, 0xDC, 0x01, 0xDD, 0x01, 0xDE, 0x01, 0xDF, 0x01
	.byte 0xE0, 0x01, 0xE1, 0x01, 0xE2, 0x01, 0xE3, 0x01, 0xE4, 0x01, 0xE5, 0x01, 0xE6, 0x01, 0xE7, 0x01
	.byte 0xE8, 0x01, 0xE9, 0x01, 0xEA, 0x01, 0xEB, 0x01, 0xEC, 0x01, 0xED, 0x01, 0xEE, 0x01, 0xEF, 0x01
	.byte 0xF0, 0x01, 0xF1, 0x01, 0xF2, 0x01, 0xF3, 0x01, 0xF4, 0x01, 0xF5, 0x01, 0xF6, 0x01, 0xF7, 0x01
	.byte 0xF8, 0x01, 0xF9, 0x01, 0xFA, 0x01, 0xFB, 0x01, 0xFC, 0x01, 0xFD, 0x01, 0xFE, 0x01, 0xFF, 0x01
	.byte 0x00, 0x02, 0x01, 0x02, 0x02, 0x02, 0x03, 0x02, 0x09, 0x02, 0x0A, 0x02, 0x0B, 0x02, 0x0C, 0x02
	.byte 0x0D, 0x02, 0x0E, 0x02, 0x0F, 0x02, 0x10, 0x02, 0x12, 0x02, 0x13, 0x02, 0x14, 0x02, 0x15, 0x02
	.byte 0x16, 0x02, 0x18, 0x02, 0xF9, 0x96, 0x1E, 0x02, 0xF5, 0x99, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0x19, 0x97, 0x1E, 0x02, 0xF9, 0x99, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0x85, 0x97, 0x1E, 0x02
	.byte 0xFD, 0x99, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0xB9, 0x97, 0x1E, 0x02, 0x05, 0x9A, 0x1E, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0xED, 0x97, 0x1E, 0x02, 0x11, 0x9A, 0x1E, 0x02, 0x39, 0x9A, 0x1E, 0x02
	.byte 0x21, 0x98, 0x1E, 0x02, 0x15, 0x9A, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00, 0x59, 0x98, 0x1E, 0x02
	.byte 0xB9, 0x42, 0x03, 0x02, 0x2D, 0x9A, 0x1E, 0x02, 0x71, 0x98, 0x1E, 0x02, 0x15, 0x9A, 0x1E, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0xD1, 0x98, 0x1E, 0x02, 0x15, 0x9A, 0x1E, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0xF5, 0x98, 0x1E, 0x02, 0x19, 0x9A, 0x1E, 0x02, 0x55, 0x9A, 0x1E, 0x02, 0x95, 0x99, 0x1E, 0x02
	.byte 0x1D, 0x9A, 0x1E, 0x02, 0x49, 0x9A, 0x1E, 0x02, 0xB9, 0x99, 0x1E, 0x02, 0x25, 0x9A, 0x1E, 0x02
	.byte 0x69, 0x9A, 0x1E, 0x02, 0x0B, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, 0x00, 0x00
	.byte 0x10, 0x00, 0x30, 0x00, 0x10, 0x00, 0x10, 0x00, 0x70, 0x00, 0x00, 0x00, 0x6E, 0x00, 0x00, 0x00
	.byte 0x69, 0x00, 0x00, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x02, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1B, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00
	.byte 0x33, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0xC9, 0x00, 0x00, 0x00, 0xF5, 0x01, 0x00, 0x00
	.byte 0xE9, 0x03, 0x00, 0x00, 0xD1, 0x07, 0x00, 0x00, 0x89, 0x13, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00
	.byte 0x21, 0x4E, 0x00, 0x00, 0x51, 0xC3, 0x00, 0x00, 0xC0, 0xFF, 0xFF, 0xFF, 0xE0, 0xFF, 0xFF, 0xFF
	.byte 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00
	.byte 0xE0, 0xFF, 0xFF, 0xFF, 0xF0, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x69, 0x00, 0x00, 0x00, 0x69, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x6A, 0x00, 0x00, 0x00, 0x6A, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00
	.byte 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x0F, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0xB8, 0x0B, 0x00, 0x00
	.byte 0xF0, 0x00, 0x00, 0x00, 0x68, 0x01, 0x00, 0x00, 0xC0, 0x03, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00
	.byte 0x0C, 0x00, 0x00, 0x00, 0x84, 0x03, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x09, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x07, 0x00, 0x06, 0x07, 0x08, 0x12, 0x04, 0x00
	.byte 0x01, 0x00, 0x06, 0x04, 0x0D, 0x18, 0x02, 0x00, 0x49, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x63, 0x00, 0x00, 0x00
	.byte 0x64, 0x00, 0x00, 0x00, 0xBD, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x05, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00
	.byte 0x07, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00
	.byte 0x09, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00
	.byte 0x0C, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00
	.byte 0x0E, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00
	.byte 0x11, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00
	.byte 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00
	.byte 0x23, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00
	.byte 0x1F, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00
	.byte 0x17, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00
	.byte 0x19, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00
	.byte 0x24, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00
	.byte 0x25, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00
	.byte 0x27, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00
	.byte 0x14, 0x00, 0x00, 0x00, 0x27, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00
	.byte 0x29, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x00
	.byte 0x2B, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00
	.byte 0x2D, 0x00, 0x00, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00
	.byte 0x2F, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00
	.byte 0x31, 0x00, 0x00, 0x00, 0x35, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x00
	.byte 0x33, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00
	.byte 0x35, 0x00, 0x00, 0x00, 0x3B, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00
	.byte 0x1E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00
	.byte 0x1C, 0x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x45, 0x00, 0x00, 0x00
	.byte 0x0F, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00
	.byte 0x44, 0x00, 0x00, 0x00, 0x54, 0x00, 0x00, 0x00, 0x5B, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00
	.byte 0x5C, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00, 0x5D, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, 0x00
	.byte 0x5E, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, 0x62, 0x00, 0x00, 0x00
	.byte 0x48, 0x00, 0x00, 0x00, 0x63, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x00, 0x8D, 0x00, 0x00, 0x00
	.byte 0x3E, 0x00, 0x00, 0x00, 0x8E, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x8F, 0x00, 0x00, 0x00
	.byte 0x40, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x41, 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00
	.byte 0x42, 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x43, 0x00, 0x00, 0x00, 0x94, 0x00, 0x00, 0x00
	.byte 0x3A, 0x00, 0x00, 0x00, 0xA8, 0x00, 0x00, 0x00, 0x39, 0x00, 0x00, 0x00, 0xA9, 0x00, 0x00, 0x00
	.byte 0x3D, 0x00, 0x00, 0x00, 0xAF, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00
	.byte 0x4B, 0x00, 0x00, 0x00, 0xB1, 0x00, 0x00, 0x00, 0x4C, 0x00, 0x00, 0x00, 0xB4, 0x00, 0x00, 0x00
	.byte 0x4D, 0x00, 0x00, 0x00, 0xB5, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x00, 0xB2, 0x00, 0x00, 0x00
	.byte 0x49, 0x00, 0x00, 0x00, 0xB3, 0x00, 0x00, 0x00, 0x4A, 0x00, 0x00, 0x00, 0xBC, 0x00, 0x00, 0x00
	.byte 0x4F, 0x00, 0x00, 0x00, 0xBD, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00
	.byte 0x51, 0x00, 0x00, 0x00, 0xF9, 0x00, 0x00, 0x00, 0x52, 0x00, 0x00, 0x00, 0xC1, 0x00, 0x00, 0x00
	.byte 0x38, 0x00, 0x00, 0x00, 0xC4, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00, 0xC5, 0x00, 0x00, 0x00
	.byte 0x56, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, 0x00, 0xC7, 0x00, 0x00, 0x00
	.byte 0x58, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x59, 0x00, 0x00, 0x00, 0xC9, 0x00, 0x00, 0x00
	.byte 0x5A, 0x00, 0x00, 0x00, 0xD3, 0x00, 0x00, 0x00, 0xAA, 0x00, 0x00, 0x00, 0xDA, 0x00, 0x00, 0x00
	.byte 0xAB, 0x00, 0x00, 0x00, 0xDB, 0x00, 0x00, 0x00, 0x53, 0x00, 0x00, 0x00, 0xDC, 0x00, 0x00, 0x00
	.byte 0xAC, 0x00, 0x00, 0x00, 0xDD, 0x00, 0x00, 0x00, 0xAD, 0x00, 0x00, 0x00, 0xDE, 0x00, 0x00, 0x00
	.byte 0xAE, 0x00, 0x00, 0x00, 0xDF, 0x00, 0x00, 0x00, 0xAF, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00
	.byte 0xB0, 0x00, 0x00, 0x00, 0xE1, 0x00, 0x00, 0x00, 0xB1, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00
	.byte 0xB2, 0x00, 0x00, 0x00, 0xE5, 0x00, 0x00, 0x00, 0xB3, 0x00, 0x00, 0x00, 0xE8, 0x00, 0x00, 0x00
	.byte 0xB4, 0x00, 0x00, 0x00, 0xEB, 0x00, 0x00, 0x00, 0xB5, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00
	.byte 0xB6, 0x00, 0x00, 0x00, 0xED, 0x00, 0x00, 0x00, 0xB7, 0x00, 0x00, 0x00, 0xEE, 0x00, 0x00, 0x00
	.byte 0xD5, 0x00, 0x00, 0x00, 0xEF, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x00
	.byte 0x54, 0x00, 0x00, 0x00, 0x3B, 0x01, 0x00, 0x00, 0x71, 0x00, 0x00, 0x00, 0x3C, 0x01, 0x00, 0x00
	.byte 0x72, 0x00, 0x00, 0x00, 0x3D, 0x01, 0x00, 0x00, 0x73, 0x00, 0x00, 0x00, 0x3E, 0x01, 0x00, 0x00
	.byte 0x74, 0x00, 0x00, 0x00, 0x3F, 0x01, 0x00, 0x00, 0x75, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00
	.byte 0x76, 0x00, 0x00, 0x00, 0x41, 0x01, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x42, 0x01, 0x00, 0x00
	.byte 0x78, 0x00, 0x00, 0x00, 0x43, 0x01, 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, 0x44, 0x01, 0x00, 0x00
	.byte 0x7A, 0x00, 0x00, 0x00, 0x45, 0x01, 0x00, 0x00, 0x7B, 0x00, 0x00, 0x00, 0x46, 0x01, 0x00, 0x00
	.byte 0x7C, 0x00, 0x00, 0x00, 0x47, 0x01, 0x00, 0x00, 0x7D, 0x00, 0x00, 0x00, 0x48, 0x01, 0x00, 0x00
	.byte 0x7E, 0x00, 0x00, 0x00, 0x49, 0x01, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x4A, 0x01, 0x00, 0x00
	.byte 0x80, 0x00, 0x00, 0x00, 0x4B, 0x01, 0x00, 0x00, 0x81, 0x00, 0x00, 0x00, 0x4C, 0x01, 0x00, 0x00
	.byte 0x82, 0x00, 0x00, 0x00, 0x4D, 0x01, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00, 0x4E, 0x01, 0x00, 0x00
	.byte 0x84, 0x00, 0x00, 0x00, 0x4F, 0x01, 0x00, 0x00, 0x85, 0x00, 0x00, 0x00, 0x50, 0x01, 0x00, 0x00
	.byte 0x86, 0x00, 0x00, 0x00, 0x51, 0x01, 0x00, 0x00, 0x87, 0x00, 0x00, 0x00, 0x52, 0x01, 0x00, 0x00
	.byte 0x88, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x89, 0x00, 0x00, 0x00, 0x56, 0x01, 0x00, 0x00
	.byte 0x8A, 0x00, 0x00, 0x00, 0x57, 0x01, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x00, 0x58, 0x01, 0x00, 0x00
	.byte 0x8C, 0x00, 0x00, 0x00, 0x59, 0x01, 0x00, 0x00, 0x8D, 0x00, 0x00, 0x00, 0x5A, 0x01, 0x00, 0x00
	.byte 0x8E, 0x00, 0x00, 0x00, 0x5B, 0x01, 0x00, 0x00, 0x8F, 0x00, 0x00, 0x00, 0x5C, 0x01, 0x00, 0x00
	.byte 0x90, 0x00, 0x00, 0x00, 0x5F, 0x01, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x60, 0x01, 0x00, 0x00
	.byte 0x92, 0x00, 0x00, 0x00, 0x61, 0x01, 0x00, 0x00, 0x93, 0x00, 0x00, 0x00, 0x62, 0x01, 0x00, 0x00
	.byte 0x94, 0x00, 0x00, 0x00, 0x63, 0x01, 0x00, 0x00, 0x95, 0x00, 0x00, 0x00, 0x64, 0x01, 0x00, 0x00
	.byte 0x96, 0x00, 0x00, 0x00, 0x65, 0x01, 0x00, 0x00, 0x97, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x00
	.byte 0x98, 0x00, 0x00, 0x00, 0x67, 0x01, 0x00, 0x00, 0x99, 0x00, 0x00, 0x00, 0x68, 0x01, 0x00, 0x00
	.byte 0x9A, 0x00, 0x00, 0x00, 0x69, 0x01, 0x00, 0x00, 0x9B, 0x00, 0x00, 0x00, 0x6A, 0x01, 0x00, 0x00
	.byte 0x9C, 0x00, 0x00, 0x00, 0x6B, 0x01, 0x00, 0x00, 0x9D, 0x00, 0x00, 0x00, 0x6C, 0x01, 0x00, 0x00
	.byte 0x9E, 0x00, 0x00, 0x00, 0x6D, 0x01, 0x00, 0x00, 0x9F, 0x00, 0x00, 0x00, 0x6E, 0x01, 0x00, 0x00
	.byte 0xA0, 0x00, 0x00, 0x00, 0x6F, 0x01, 0x00, 0x00, 0xA1, 0x00, 0x00, 0x00, 0x70, 0x01, 0x00, 0x00
	.byte 0xA2, 0x00, 0x00, 0x00, 0x71, 0x01, 0x00, 0x00, 0xA3, 0x00, 0x00, 0x00, 0x72, 0x01, 0x00, 0x00
	.byte 0xA4, 0x00, 0x00, 0x00, 0x73, 0x01, 0x00, 0x00, 0xA5, 0x00, 0x00, 0x00, 0x74, 0x01, 0x00, 0x00
	.byte 0xA6, 0x00, 0x00, 0x00, 0x75, 0x01, 0x00, 0x00, 0xA7, 0x00, 0x00, 0x00, 0x76, 0x01, 0x00, 0x00
	.byte 0xA8, 0x00, 0x00, 0x00, 0x77, 0x01, 0x00, 0x00, 0xA9, 0x00, 0x00, 0x00, 0x79, 0x01, 0x00, 0x00
	.byte 0xB8, 0x00, 0x00, 0x00, 0x7A, 0x01, 0x00, 0x00, 0xB9, 0x00, 0x00, 0x00, 0x7D, 0x01, 0x00, 0x00
	.byte 0xBA, 0x00, 0x00, 0x00, 0x7E, 0x01, 0x00, 0x00, 0xBB, 0x00, 0x00, 0x00, 0x7F, 0x01, 0x00, 0x00
	.byte 0xBC, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0xBD, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00, 0x00
	.byte 0xBE, 0x00, 0x00, 0x00, 0x88, 0x01, 0x00, 0x00, 0xBF, 0x00, 0x00, 0x00, 0x89, 0x01, 0x00, 0x00
	.byte 0xC0, 0x00, 0x00, 0x00, 0x8A, 0x01, 0x00, 0x00, 0xC1, 0x00, 0x00, 0x00, 0x8B, 0x01, 0x00, 0x00
	.byte 0xC2, 0x00, 0x00, 0x00, 0x96, 0x01, 0x00, 0x00, 0xC3, 0x00, 0x00, 0x00, 0x99, 0x01, 0x00, 0x00
	.byte 0xC8, 0x00, 0x00, 0x00, 0x9A, 0x01, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x9B, 0x01, 0x00, 0x00
	.byte 0xC5, 0x00, 0x00, 0x00, 0x9C, 0x01, 0x00, 0x00, 0xC7, 0x00, 0x00, 0x00, 0x9D, 0x01, 0x00, 0x00
	.byte 0xC4, 0x00, 0x00, 0x00, 0x5D, 0x01, 0x00, 0x00, 0xF3, 0x00, 0x00, 0x00, 0xEA, 0x00, 0x00, 0x00
	.byte 0xF2, 0x00, 0x00, 0x00, 0x5E, 0x01, 0x00, 0x00, 0xE5, 0x00, 0x00, 0x00, 0x78, 0x01, 0x00, 0x00
	.byte 0xE6, 0x00, 0x00, 0x00, 0x7B, 0x01, 0x00, 0x00, 0xE7, 0x00, 0x00, 0x00, 0xD2, 0x00, 0x00, 0x00
	.byte 0xEF, 0x00, 0x00, 0x00, 0x8C, 0x01, 0x00, 0x00, 0xF1, 0x00, 0x00, 0x00, 0x8D, 0x01, 0x00, 0x00
	.byte 0xF0, 0x00, 0x00, 0x00, 0x8E, 0x01, 0x00, 0x00, 0xED, 0x00, 0x00, 0x00, 0x8F, 0x01, 0x00, 0x00
	.byte 0xEA, 0x00, 0x00, 0x00, 0x90, 0x01, 0x00, 0x00, 0xEB, 0x00, 0x00, 0x00, 0x91, 0x01, 0x00, 0x00
	.byte 0xEC, 0x00, 0x00, 0x00, 0x92, 0x01, 0x00, 0x00, 0xEE, 0x00, 0x00, 0x00, 0x93, 0x01, 0x00, 0x00
	.byte 0xE8, 0x00, 0x00, 0x00, 0x94, 0x01, 0x00, 0x00, 0xE9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x45, 0x00, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00
	.byte 0x60, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x05, 0x01, 0x00, 0x00
	.byte 0x62, 0x00, 0x00, 0x00, 0x97, 0x01, 0x00, 0x00, 0x63, 0x00, 0x00, 0x00, 0x98, 0x01, 0x00, 0x00
	.byte 0x64, 0x00, 0x00, 0x00, 0x06, 0x01, 0x00, 0x00, 0xFB, 0x00, 0x00, 0x00, 0x07, 0x01, 0x00, 0x00
	.byte 0xFF, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x09, 0x01, 0x00, 0x00
	.byte 0xFC, 0x00, 0x00, 0x00, 0x0A, 0x01, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x0B, 0x01, 0x00, 0x00
	.byte 0x01, 0x01, 0x00, 0x00, 0x0C, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0D, 0x01, 0x00, 0x00
	.byte 0xFD, 0x00, 0x00, 0x00, 0x0E, 0x01, 0x00, 0x00, 0x06, 0x01, 0x00, 0x00, 0x0F, 0x01, 0x00, 0x00
	.byte 0x09, 0x01, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x11, 0x01, 0x00, 0x00
	.byte 0x05, 0x01, 0x00, 0x00, 0x12, 0x01, 0x00, 0x00, 0x08, 0x01, 0x00, 0x00, 0x13, 0x01, 0x00, 0x00
	.byte 0x07, 0x01, 0x00, 0x00, 0x14, 0x01, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x15, 0x01, 0x00, 0x00
	.byte 0x67, 0x00, 0x00, 0x00, 0x16, 0x01, 0x00, 0x00, 0x68, 0x00, 0x00, 0x00, 0x17, 0x01, 0x00, 0x00
	.byte 0x69, 0x00, 0x00, 0x00, 0x18, 0x01, 0x00, 0x00, 0x6A, 0x00, 0x00, 0x00, 0x19, 0x01, 0x00, 0x00
	.byte 0x6B, 0x00, 0x00, 0x00, 0x1A, 0x01, 0x00, 0x00, 0x6C, 0x00, 0x00, 0x00, 0x1B, 0x01, 0x00, 0x00
	.byte 0x6D, 0x00, 0x00, 0x00, 0x1C, 0x01, 0x00, 0x00, 0x6E, 0x00, 0x00, 0x00, 0x1D, 0x01, 0x00, 0x00
	.byte 0x65, 0x00, 0x00, 0x00, 0x1E, 0x01, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x1F, 0x01, 0x00, 0x00
	.byte 0x6F, 0x00, 0x00, 0x00, 0x9E, 0x01, 0x00, 0x00, 0xD1, 0x00, 0x00, 0x00, 0xA5, 0x01, 0x00, 0x00
	.byte 0x3B, 0x00, 0x00, 0x00, 0xA6, 0x01, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0xA7, 0x01, 0x00, 0x00
	.byte 0xCF, 0x00, 0x00, 0x00, 0xA8, 0x01, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0xA9, 0x01, 0x00, 0x00
	.byte 0xD2, 0x00, 0x00, 0x00, 0xAA, 0x01, 0x00, 0x00, 0xD3, 0x00, 0x00, 0x00, 0xAB, 0x01, 0x00, 0x00
	.byte 0xD4, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0xD7, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00
	.byte 0xD8, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x00
	.byte 0xDA, 0x00, 0x00, 0x00, 0x82, 0x00, 0x00, 0x00, 0xDB, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00
	.byte 0xDC, 0x00, 0x00, 0x00, 0x84, 0x00, 0x00, 0x00, 0xDD, 0x00, 0x00, 0x00, 0x85, 0x00, 0x00, 0x00
	.byte 0xDE, 0x00, 0x00, 0x00, 0xE9, 0x00, 0x00, 0x00, 0xDF, 0x00, 0x00, 0x00, 0x7C, 0x01, 0x00, 0x00
	.byte 0xE0, 0x00, 0x00, 0x00, 0x81, 0x01, 0x00, 0x00, 0xE1, 0x00, 0x00, 0x00, 0x82, 0x01, 0x00, 0x00
	.byte 0xE2, 0x00, 0x00, 0x00, 0x83, 0x01, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x86, 0x01, 0x00, 0x00
	.byte 0xE4, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x04, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x00, 0x00, 0x01, 0x02, 0x04, 0x05, 0x06, 0x07, 0x00
	.byte 0x00, 0x28, 0xB8, 0x00, 0x98, 0xB8, 0xC0, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x28, 0x90, 0xC8
	.byte 0x00, 0x28, 0xC8, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x28, 0x90, 0xC8, 0x00, 0x28, 0xC8, 0x00
	.byte 0xFF, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x40, 0x00, 0x00
	.byte 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x30, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x18, 0x00, 0x20, 0x00, 0x70, 0x00, 0xD0, 0x00, 0x70, 0x00, 0xE2, 0x00, 0xB4, 0x00
	.byte 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0xC8, 0x00, 0xA0, 0x00, 0xE2, 0x00, 0xB4, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00
	.byte 0x09, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00
	.byte 0x0B, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00
	.byte 0x0D, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00
	.byte 0x0F, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x02, 0x07, 0x02, 0x0E, 0x02, 0x0C, 0x01, 0x00
	.byte 0x02, 0x04, 0x06, 0x18, 0x02, 0x0C, 0x1D, 0x00, 0x02, 0x07, 0x0D, 0x0E, 0x02, 0x0C, 0x4D, 0x00
	.byte 0x02, 0x04, 0x11, 0x18, 0x06, 0x0C, 0x69, 0x00, 0x02, 0x18, 0x01, 0x07, 0x02, 0x03, 0xF9, 0x00
	.byte 0x05, 0x09, 0x03, 0x0E, 0x02, 0x0C, 0x01, 0x00, 0x05, 0x05, 0x12, 0x16, 0x02, 0x0C, 0x1D, 0x00
	.byte 0x05, 0x05, 0x14, 0x16, 0x02, 0x0C, 0x49, 0x00, 0x02, 0x05, 0x01, 0x0C, 0x02, 0x0C, 0x01, 0x00
	.byte 0x02, 0x13, 0x01, 0x05, 0x02, 0x03, 0x19, 0x00, 0x02, 0x1A, 0x01, 0x05, 0x02, 0x03, 0x23, 0x00
	.byte 0x02, 0x02, 0x05, 0x1C, 0x12, 0x0C, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01
	.byte 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x02, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x01, 0x03, 0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x14, 0x20
	.byte 0x02, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x5C, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x05, 0x05, 0x05, 0x05, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x01, 0x23, 0x01
	.byte 0x24, 0x01, 0x25, 0x01, 0x42, 0x01, 0x43, 0x01, 0x44, 0x01, 0x45, 0x01, 0x00, 0x00, 0x80, 0x3F
	.byte 0x66, 0x66, 0x66, 0x3F, 0xCD, 0xCC, 0x4C, 0x3F, 0x33, 0x33, 0x33, 0x3F, 0x9A, 0x99, 0x19, 0x3F
	.byte 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x0A, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x1D, 0x00
	.byte 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1D, 0x00, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1C, 0x02, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x01
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1B, 0x02, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1F, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1E, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x48, 0x00, 0x58, 0x00, 0x28, 0x00
	.byte 0xD8, 0x00, 0x28, 0x00, 0xA8, 0x00, 0x28, 0x00, 0xD8, 0x00, 0x48, 0x00, 0x28, 0x00, 0xA8, 0x00
	.byte 0x58, 0x00, 0xA8, 0x00, 0x28, 0x00, 0x92, 0x00, 0xD8, 0x00, 0xA8, 0x00, 0xD8, 0x00, 0x92, 0x00
	.byte 0xA8, 0x00, 0xA8, 0x00, 0x18, 0x00, 0x03, 0x00, 0x10, 0x00, 0x05, 0x00, 0x20, 0x00, 0x02, 0x00
	.byte 0x38, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x90, 0x00, 0x38, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x60, 0x00, 0x88, 0x00, 0x04, 0x00, 0x00, 0x00, 0xB8, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x30, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x80, 0x00, 0x60, 0x00, 0x04, 0x00, 0x00, 0x00, 0x30, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x68, 0x00, 0x30, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0xA8, 0x00, 0x70, 0x00, 0x04, 0x00, 0x00, 0x00, 0x30, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x58, 0x00, 0x50, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0xC8, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0xC0, 0x00, 0x40, 0x00, 0x04, 0x00, 0x00, 0x00, 0x38, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x40, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x88, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x80, 0x00, 0x38, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x40, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x60, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x90, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x80, 0x00, 0x38, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x80, 0x00, 0x60, 0x00, 0x04, 0x00, 0x00, 0x00, 0x80, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x48, 0x00, 0x60, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x90, 0x00, 0x60, 0x00, 0x04, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x80, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x40, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x40, 0x00, 0x60, 0x00, 0x04, 0x00, 0x00, 0x00, 0xB8, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x30, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x48, 0x00, 0x60, 0x00, 0x04, 0x00, 0x00, 0x00, 0xB8, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x30, 0x00, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0xD0, 0x00, 0x30, 0x00, 0x03, 0x00, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x88, 0x48, 0x68, 0x88, 0x20, 0x98, 0x98, 0x98, 0x66, 0x00, 0x00, 0x00
	.byte 0x67, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x06, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 0x00, 0x80, 0xFD, 0xFF
	.byte 0x00, 0x80, 0x07, 0x00, 0x00, 0x80, 0x12, 0x00, 0x04, 0x06, 0x10, 0x0A, 0x02, 0x0F, 0x01, 0x00
	.byte 0x04, 0x15, 0x08, 0x0A, 0x02, 0x0F, 0x15, 0x00, 0x04, 0x15, 0x0C, 0x0A, 0x02, 0x0F, 0x29, 0x00
	.byte 0x04, 0x15, 0x10, 0x0A, 0x02, 0x0F, 0x3D, 0x00, 0x04, 0x12, 0x14, 0x0E, 0x02, 0x0F, 0x51, 0x00
	.byte 0x00, 0x80, 0x12, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0A, 0x00
	.byte 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x07, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x06, 0x00, 0x00, 0x80, 0xFE, 0xFF, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x80, 0x02, 0x00, 0x00, 0x80, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x06, 0x00
	.byte 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x80, 0x08, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0A, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0xC0, 0xD0, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0xD1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x01, 0x01, 0x01, 0x01, 0x00, 0x80, 0x0A, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x60, 0x0A, 0x00, 0x00, 0x80, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x01, 0x00
	.byte 0x00, 0x80, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00
	.byte 0xC0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1E, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1A, 0x01
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04, 0x08, 0x0A
	.byte 0x02, 0x0F, 0x01, 0x00, 0x06, 0x16, 0x04, 0x0A, 0x02, 0x0F, 0x15, 0x00, 0x06, 0x16, 0x06, 0x0A
	.byte 0x02, 0x0F, 0x29, 0x00, 0x06, 0x16, 0x08, 0x0A, 0x02, 0x0F, 0x3D, 0x00, 0x03, 0x00, 0x14, 0x20
	.byte 0x02, 0x0F, 0x51, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x08, 0x00
	.byte 0x04, 0x00, 0x0B, 0x00, 0x0C, 0x00, 0x0B, 0x00, 0x14, 0x00, 0x0B, 0x00, 0x1C, 0x00, 0x0B, 0x00
	.byte 0x08, 0x00, 0x0E, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x18, 0x00, 0x0E, 0x00, 0x04, 0x00, 0x11, 0x00
	.byte 0x0C, 0x00, 0x11, 0x00, 0x14, 0x00, 0x11, 0x00, 0x1C, 0x00, 0x11, 0x00, 0x08, 0x00, 0x14, 0x00
	.byte 0x10, 0x00, 0x14, 0x00, 0x18, 0x00, 0x14, 0x00, 0x04, 0x00, 0x17, 0x00, 0x0C, 0x00, 0x17, 0x00
	.byte 0x14, 0x00, 0x17, 0x00, 0x1C, 0x00, 0x17, 0x00, 0x08, 0x00, 0x19, 0x00, 0x10, 0x00, 0x19, 0x00
	.byte 0x18, 0x00, 0x19, 0x00, 0x04, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x1C, 0x00, 0x14, 0x00, 0x1C, 0x00
	.byte 0x1C, 0x00, 0x1C, 0x00, 0x08, 0x00, 0x1F, 0x00, 0x10, 0x00, 0x1F, 0x00, 0x18, 0x00, 0x1F, 0x00
	.byte 0x00, 0x01, 0x04, 0x05, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x00, 0x00
	.byte 0x01, 0x08, 0x01, 0x10, 0x02, 0x0F, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x03, 0x03, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x40, 0x00, 0x00
	.byte 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0xE9, 0x03, 0x00, 0x00, 0xE9, 0x03, 0x00, 0x00
	.byte 0xE9, 0x03, 0x00, 0x00, 0xE9, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x04, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x03, 0x05, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0C, 0x01, 0x01
	.byte 0x0B, 0x01, 0x00, 0x00, 0xB0, 0xB8, 0xC8, 0xD8, 0xE0, 0xF0, 0x00, 0x00, 0x03, 0x00, 0x14, 0x20
	.byte 0x02, 0x0F, 0x01, 0x00, 0x6B, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x06, 0x06, 0x06
	.byte 0x30, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00
	.byte 0x80, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00
	.byte 0xD0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x80, 0x3F
	.byte 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x1A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x1C, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x1A, 0x00
	.byte 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x1C, 0x00, 0x00, 0x02, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x1E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x19, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x19, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x1E, 0x00, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFC, 0xFC, 0xFC, 0xFC
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFD, 0x06, 0x0C, 0x10, 0x11, 0x12, 0x12, 0x12, 0xFE, 0xFD
	.byte 0x06, 0x0B, 0x0F, 0x11, 0x12, 0x13, 0x14, 0xFE, 0xFD, 0x06, 0x0B, 0x0F, 0x11, 0x12, 0x13, 0x14
	.byte 0xFE, 0xFD, 0x06, 0x0A, 0x0E, 0x11, 0x12, 0x13, 0x14, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x12, 0x12, 0x11, 0x10, 0x0D, 0x0A, 0x06, 0x00, 0x00, 0x14, 0x14, 0x13, 0x12, 0x11
	.byte 0x0F, 0x0B, 0x06, 0x00, 0x14, 0x14, 0x13, 0x12, 0x11, 0x0F, 0x0B, 0x06, 0x00, 0x14, 0x14, 0x13
	.byte 0x12, 0x11, 0x0F, 0x0B, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xFF, 0xFF
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x07, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x00
	.byte 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x1E, 0x00, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1B, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x1C, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1A, 0x01
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1F, 0x03, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x98, 0xA8, 0xB8, 0xC0, 0xD0, 0x00, 0x00
	.byte 0x01, 0x0C, 0x01, 0x01, 0x0B, 0x01, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00
	.byte 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00
	.byte 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x04, 0x00, 0x16, 0x10, 0x02, 0x0F, 0x01, 0x00, 0x04, 0x18, 0x10, 0x06, 0x02, 0x0F, 0x21, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x01, 0x00, 0x73, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x03, 0x03, 0x03, 0x03, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x02, 0x08
	.byte 0x02, 0x0F, 0x01, 0x00, 0x00, 0x0D, 0x02, 0x08, 0x02, 0x0F, 0x11, 0x00, 0x00, 0x02, 0x02, 0x08
	.byte 0x02, 0x0F, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1D, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x02
	.byte 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1B, 0x00, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1A, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1F, 0x03
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF6, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00
	.byte 0xF9, 0x00, 0x00, 0x00, 0xC7, 0x00, 0x00, 0x00, 0xAF, 0x00, 0x00, 0x00, 0x96, 0x00, 0x00, 0x00
	.byte 0x52, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0xAA, 0x00, 0x00, 0x00
	.byte 0x82, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00
	.byte 0x46, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x82, 0x00, 0x00, 0x00, 0xAA, 0x00, 0x00, 0x00
	.byte 0x00, 0x80, 0x0B, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00
	.byte 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x0A, 0x09, 0x08
	.byte 0x07, 0x06, 0x03, 0x04, 0x05, 0x02, 0x01, 0x00, 0x02, 0x01, 0x00, 0x0B, 0x0A, 0x09, 0x08, 0x07
	.byte 0x06, 0x03, 0x04, 0x05, 0x03, 0x04, 0x05, 0x02, 0x01, 0x00, 0x0B, 0x0A, 0x09, 0x08, 0x07, 0x06
	.byte 0x08, 0x07, 0x06, 0x03, 0x04, 0x05, 0x02, 0x01, 0x00, 0x0B, 0x0A, 0x09, 0x00, 0x90, 0x01, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x03, 0x00, 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0xD0, 0x03, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x03, 0x00
	.byte 0x00, 0xD0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0xD0, 0x03, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x02, 0x00, 0x00, 0xD0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x90, 0x01, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00
	.byte 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x90, 0x01, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x90, 0x01, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x02, 0x00
	.byte 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x02, 0x04, 0x06
	.byte 0x07, 0x08, 0x05, 0x03, 0x01, 0x00, 0x00, 0x00, 0x04, 0x05, 0x13, 0x08, 0x02, 0x0F, 0x01, 0x00
	.byte 0x00, 0x90, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x03, 0x00, 0x00, 0x10, 0x02, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x03, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0xD0, 0x03, 0x00, 0x00, 0xD0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00
	.byte 0x00, 0xD0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x02, 0x00, 0x00, 0xD0, 0x03, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x01, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00
	.byte 0x00, 0x90, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x01, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x02, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00
	.byte 0x03, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0xBE, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04
	.byte 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1F, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x00
	.byte 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x01, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x1A, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x10, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x80, 0x90, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00
	.byte 0x67, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x05, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 0x04, 0x00, 0x16, 0x10
	.byte 0x02, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x40, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x78, 0x00, 0x84, 0x00, 0x08, 0x20, 0x00, 0x40, 0xFF, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, 0x00, 0x00, 0x10, 0x00, 0x30, 0x00, 0x10, 0x00, 0x30, 0x00
	.byte 0x09, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x01, 0x06, 0x16, 0x04, 0x02, 0x0F, 0x01, 0x00, 0x01, 0x19, 0x16, 0x07, 0x02, 0x0F, 0x09, 0x00
	.byte 0x02, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x17, 0x00, 0x06, 0x00, 0x16, 0x0F, 0x02, 0x0F, 0x01, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x07, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00
	.byte 0x0B, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01
	.byte 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x03, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x03, 0x03, 0x00, 0xFE, 0x02, 0xFD, 0x03, 0xFD, 0x03, 0xFE, 0x02, 0xFF, 0x00, 0x00, 0x00
	.byte 0xFE, 0x02, 0xFE, 0x02, 0xFF, 0x01, 0xFD, 0x03, 0xFF, 0x00, 0x00, 0x00, 0xFE, 0x02, 0xFF, 0x01
	.byte 0xFF, 0x01, 0xFE, 0x02, 0xFF, 0x00, 0x00, 0x00, 0xF4, 0xFF, 0xF4, 0xFF, 0x02, 0x00, 0xF3, 0xFF
	.byte 0xF0, 0xFF, 0xFC, 0xFF, 0xFE, 0xFF, 0xFC, 0xFF, 0xE2, 0xFF, 0x0C, 0x00, 0xF0, 0xFF, 0xEE, 0xFF
	.byte 0x10, 0x00, 0x0C, 0x00, 0x1E, 0x00, 0xEE, 0xFF, 0x5A, 0x00, 0x50, 0x00, 0x46, 0x00, 0xCE, 0xFF
	.byte 0xEC, 0xFF, 0xF6, 0xFF, 0x05, 0x00, 0x0A, 0x00, 0x0F, 0x00, 0x14, 0x00, 0x1E, 0x00, 0x55, 0x00
	.byte 0x4B, 0x00, 0x0A, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00
	.byte 0x46, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00
	.byte 0x0A, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00
	.byte 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00
	.byte 0x64, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00
	.byte 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00
	.byte 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x14, 0x20
	.byte 0x02, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00
	.byte 0x28, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, 0x00, 0x00, 0x10, 0x00, 0x30, 0x00, 0x10, 0x00, 0x30, 0x00
	.byte 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x28, 0x00
	.byte 0x28, 0x00, 0x58, 0x00, 0x28, 0x00, 0x98, 0x00, 0x60, 0x00, 0x28, 0x00, 0x60, 0x00, 0x58, 0x00
	.byte 0x60, 0x00, 0x98, 0x00, 0xA0, 0x00, 0x28, 0x00, 0xA0, 0x00, 0x58, 0x00, 0xA0, 0x00, 0x98, 0x00
	.byte 0xD8, 0x00, 0x28, 0x00, 0xD8, 0x00, 0x58, 0x00, 0xD8, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x13, 0x27, 0x00, 0x00, 0x13, 0x27, 0x00, 0x00, 0x12, 0x27, 0x00, 0x00, 0x12, 0x27, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x12, 0x27, 0x00, 0x00, 0x12, 0x27, 0x00, 0x00, 0x12, 0x27, 0x00, 0x00
	.byte 0x12, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00
	.byte 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01
	.byte 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02, 0x00, 0x02, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x04, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x03, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA8, 0x00, 0x10, 0x00
	.byte 0xA8, 0x00, 0x20, 0x00, 0xA8, 0x00, 0x30, 0x00, 0x08, 0x00, 0x48, 0x00, 0x07, 0x03, 0x08, 0x08
	.byte 0x02, 0x0F, 0x01, 0x00, 0x07, 0x17, 0x01, 0x08, 0x02, 0x0F, 0x11, 0x00, 0x07, 0x17, 0x03, 0x08
	.byte 0x02, 0x0F, 0x21, 0x00, 0x07, 0x17, 0x05, 0x08, 0x02, 0x0F, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x05, 0x07, 0x06, 0x0F, 0x06, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00
	.byte 0x24, 0x00, 0x00, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x58, 0x00, 0x28, 0x00, 0x98, 0x00
	.byte 0x60, 0x00, 0x28, 0x00, 0x60, 0x00, 0x58, 0x00, 0x60, 0x00, 0x98, 0x00, 0xA0, 0x00, 0x28, 0x00
	.byte 0xA0, 0x00, 0x58, 0x00, 0xA0, 0x00, 0x98, 0x00, 0xD8, 0x00, 0x28, 0x00, 0xD8, 0x00, 0x58, 0x00
	.byte 0xD8, 0x00, 0x98, 0x00, 0x01, 0x03, 0x01, 0x02, 0x03, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x01, 0x00
	.byte 0x00, 0x00, 0x00, 0x40, 0x00, 0xC0, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF
	.byte 0x00, 0xF0, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00
	.byte 0x02, 0x02, 0x02, 0x02, 0x00, 0x10, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1A, 0x03
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1E, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1D, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1D, 0x00
	.byte 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x01, 0x00, 0x02, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1B, 0x02, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x08, 0x02, 0x0E, 0x01, 0x00, 0x00, 0x08, 0x00, 0x08, 0x02, 0x0E, 0x11, 0x00
	.byte 0x00, 0x10, 0x00, 0x08, 0x02, 0x0E, 0x21, 0x00, 0x00, 0x18, 0x00, 0x08, 0x02, 0x0E, 0x31, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x80, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00
	.byte 0x00, 0x80, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00
	.byte 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x50, 0x00, 0x30, 0x00, 0x50, 0x00
	.byte 0x48, 0x00, 0x38, 0x00, 0xA8, 0x00, 0x50, 0x00, 0xD0, 0x00, 0x50, 0x00, 0xB8, 0x00, 0x38, 0x00
	.byte 0x58, 0x00, 0x80, 0x00, 0x30, 0x00, 0x80, 0x00, 0x48, 0x00, 0x98, 0x00, 0xA8, 0x00, 0x80, 0x00
	.byte 0xD0, 0x00, 0x80, 0x00, 0xB8, 0x00, 0x98, 0x00, 0x50, 0x00, 0x58, 0x00, 0x68, 0x00, 0x58, 0x00
	.byte 0x80, 0x00, 0x58, 0x00, 0x98, 0x00, 0x58, 0x00, 0xB0, 0x00, 0x58, 0x00, 0x50, 0x00, 0x68, 0x00
	.byte 0x68, 0x00, 0x68, 0x00, 0x80, 0x00, 0x68, 0x00, 0x98, 0x00, 0x68, 0x00, 0xB0, 0x00, 0x68, 0x00
	.byte 0x50, 0x00, 0x78, 0x00, 0x68, 0x00, 0x78, 0x00, 0x80, 0x00, 0x78, 0x00, 0x98, 0x00, 0x78, 0x00
	.byte 0xB0, 0x00, 0x78, 0x00, 0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x50, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00
	.byte 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00
	.byte 0xC0, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00
	.byte 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0F, 0x00, 0x00, 0x00, 0x05, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x80, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00
	.byte 0x00, 0x80, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0F, 0x00, 0x00, 0x00, 0x08, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x06, 0x05, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04, 0x04, 0x04
	.byte 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x07, 0x07, 0x06, 0x06, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04
	.byte 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x07, 0x07, 0x06, 0x06, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x04
	.byte 0x04, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07
	.byte 0x07, 0x07, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x05, 0x05, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04
	.byte 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x07, 0x07
	.byte 0x07, 0x07, 0x07, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x05, 0x05, 0x05, 0x05, 0x05, 0x04
	.byte 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04
	.byte 0x04, 0x03, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04, 0x04, 0x03
	.byte 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x05, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03
	.byte 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x07, 0x07, 0x06, 0x05, 0x04, 0x00, 0x00, 0x00, 0xC0, 0xD0, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00
	.byte 0x04, 0x08, 0x12, 0x0A, 0x02, 0x0F, 0x01, 0x00, 0x04, 0x13, 0x0E, 0x0A, 0x04, 0x0F, 0x15, 0x00
	.byte 0x00, 0x60, 0x03, 0x00, 0x00, 0x80, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00
	.byte 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x40, 0x00, 0xB8, 0x00, 0x30, 0x00
	.byte 0xE0, 0x00, 0x58, 0x00, 0x30, 0x00, 0x90, 0x00, 0x48, 0x00, 0xA0, 0x00, 0x20, 0x00, 0x78, 0x00
	.byte 0xD0, 0x00, 0x90, 0x00, 0xB8, 0x00, 0xA0, 0x00, 0xE0, 0x00, 0x78, 0x00, 0x00, 0x08, 0x08, 0x08
	.byte 0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x14, 0x20, 0x02, 0x0F, 0x01, 0x00, 0x33, 0x0B, 0x00, 0x00
	.byte 0x33, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x10, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0xA0, 0x00, 0x30, 0x00, 0x40, 0x00, 0xD0, 0x00, 0x40, 0x00
	.byte 0xE0, 0x00, 0xA0, 0x00, 0x48, 0x00, 0x60, 0x00, 0xB8, 0x00, 0x60, 0x00, 0x40, 0x00, 0x88, 0x00
	.byte 0xC0, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, 0x00, 0x00
	.byte 0x10, 0x00, 0x30, 0x00, 0x10, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x40, 0x00, 0xD0, 0x00
	.byte 0x30, 0x00, 0x40, 0x00, 0x20, 0x00, 0x90, 0x00, 0x40, 0x00, 0xE0, 0x00, 0x90, 0x00, 0x40, 0x00
	.byte 0x06, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00
	.byte 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x0E, 0x00, 0x12, 0x00, 0x14, 0x00, 0x15, 0x00, 0x16, 0x00
	.byte 0x16, 0x00, 0x17, 0x00, 0x17, 0x00, 0x18, 0x00, 0x0A, 0x00, 0x12, 0x00, 0x18, 0x00, 0x1C, 0x00
	.byte 0x1D, 0x00, 0x1E, 0x00, 0x1E, 0x00, 0x1F, 0x00, 0x1F, 0x00, 0x20, 0x00, 0x0A, 0x00, 0x13, 0x00
	.byte 0x1B, 0x00, 0x21, 0x00, 0x25, 0x00, 0x26, 0x00, 0x26, 0x00, 0x27, 0x00, 0x27, 0x00, 0x28, 0x00
	.byte 0x0A, 0x00, 0x13, 0x00, 0x1B, 0x00, 0x22, 0x00, 0x28, 0x00, 0x2C, 0x00, 0x2D, 0x00, 0x2E, 0x00
	.byte 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1F, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x1E, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1D, 0x02
	.byte 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x03
	.byte 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x12, 0x13, 0x0A, 0x02, 0x0F, 0x01, 0x00
	.byte 0x05, 0x00, 0x16, 0x0F, 0x02, 0x0F, 0x15, 0x00, 0x05, 0x0E, 0x09, 0x0A, 0x02, 0x0F, 0x33, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00, 0x11, 0x27, 0x00, 0x00
	.byte 0x11, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00
	.byte 0x10, 0x27, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0A, 0x1E, 0x00, 0x00, 0x0A, 0x32, 0x50
	.byte 0x3C, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x30, 0x00, 0x40, 0x00
	.byte 0xD0, 0x00, 0x40, 0x00, 0x20, 0x00, 0xA0, 0x00, 0xE0, 0x00, 0xA0, 0x00, 0x64, 0x50, 0x46, 0x3C
	.byte 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02
	.byte 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02, 0x7D, 0xA5, 0x21, 0x02
	.byte 0x7D, 0xA5, 0x21, 0x02, 0xB9, 0xA5, 0x21, 0x02, 0x41, 0xA6, 0x21, 0x02, 0x71, 0xA6, 0x21, 0x02
	.byte 0x81, 0xA6, 0x21, 0x02, 0x91, 0xA6, 0x21, 0x02, 0x9D, 0xA6, 0x21, 0x02, 0xB1, 0xA6, 0x21, 0x02
	.byte 0xD1, 0xA6, 0x21, 0x02, 0x01, 0xA7, 0x21, 0x02, 0x21, 0xA7, 0x21, 0x02, 0x00, 0x00, 0x00, 0x00

	.data

_0221DA00:
	.byte 0x30, 0xDC, 0x21, 0x02, 0x50, 0xDC, 0x21, 0x02, 0x50, 0xDB, 0x21, 0x02, 0x5C, 0xDC, 0x21, 0x02
	.byte 0x74, 0xDC, 0x21, 0x02, 0x1C, 0xDC, 0x21, 0x02, 0x3C, 0xDC, 0x21, 0x02, 0x90, 0xDC, 0x21, 0x02
	.byte 0x48, 0xDC, 0x21, 0x02, 0x88, 0xDC, 0x21, 0x02, 0x0C, 0xA9, 0x21, 0x02, 0xD0, 0xA8, 0x21, 0x02
	.byte 0xF4, 0xA7, 0x21, 0x02, 0x30, 0xA8, 0x21, 0x02, 0xA8, 0xA8, 0x21, 0x02, 0x20, 0xA9, 0x21, 0x02
	.byte 0xF8, 0xA8, 0x21, 0x02, 0x80, 0xA8, 0x21, 0x02, 0x58, 0xA8, 0x21, 0x02, 0x1C, 0xA8, 0x21, 0x02
	.byte 0xC9, 0xB6, 0x1E, 0x02, 0x31, 0xB7, 0x1E, 0x02, 0x99, 0xBA, 0x1E, 0x02, 0xFD, 0xBA, 0x1E, 0x02
	.byte 0x65, 0xBB, 0x1E, 0x02, 0xB1, 0xC1, 0x1E, 0x02, 0x95, 0xF0, 0x1E, 0x02, 0x9D, 0xFD, 0x1E, 0x02
	.byte 0xB9, 0xFE, 0x1E, 0x02, 0x3D, 0xFF, 0x1E, 0x02, 0xE5, 0xFF, 0x1E, 0x02, 0x8D, 0x00, 0x1F, 0x02
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00
	.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
	.byte 0x7D, 0x0A, 0x1F, 0x02, 0xE1, 0x0A, 0x1F, 0x02, 0x59, 0x0B, 0x1F, 0x02, 0xFC, 0xFF, 0xFF, 0xFF
	.byte 0xFE, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00
	.byte 0xFD, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0xFD, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF
	.byte 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0xFD, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00
	.byte 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10, 0xBE, 0x21, 0x02, 0x0C, 0xBE, 0x21, 0x02
	.byte 0x04, 0xBE, 0x21, 0x02, 0x08, 0xBE, 0x21, 0x02, 0x74, 0xBF, 0x21, 0x02, 0x14, 0xBF, 0x21, 0x02
	.byte 0xF4, 0xBE, 0x21, 0x02, 0xD4, 0xBE, 0x21, 0x02, 0xB4, 0xBE, 0x21, 0x02, 0x74, 0xBE, 0x21, 0x02
	.byte 0x94, 0xBE, 0x21, 0x02, 0x54, 0xBF, 0x21, 0x02, 0x94, 0xBF, 0x21, 0x02, 0x14, 0xBE, 0x21, 0x02
	.byte 0x34, 0xBE, 0x21, 0x02, 0x34, 0xBF, 0x21, 0x02, 0xB4, 0xBF, 0x21, 0x02, 0x54, 0xBE, 0x21, 0x02
	.byte 0xD4, 0xBF, 0x21, 0x02, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
	.byte 0x14, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x03, 0x04, 0x05, 0x06, 0x51, 0x56, 0x1F, 0x02
	.byte 0x31, 0x57, 0x1F, 0x02, 0x75, 0x7E, 0x1F, 0x02, 0x94, 0x00, 0x6B, 0x00, 0x03, 0x04, 0x05, 0x00
	.byte 0x35, 0x92, 0x1F, 0x02, 0x41, 0x92, 0x1F, 0x02, 0x81, 0x93, 0x1F, 0x02, 0xE1, 0xD2, 0x1F, 0x02
	.byte 0xED, 0xD3, 0x1F, 0x02, 0x6D, 0xD4, 0x1F, 0x02, 0x55, 0x21, 0x20, 0x02, 0xD5, 0x21, 0x20, 0x02
	.byte 0xB1, 0x52, 0x20, 0x02, 0x9D, 0x54, 0x20, 0x02, 0x21, 0x55, 0x20, 0x02, 0x31, 0x91, 0x20, 0x02
	.byte 0x5D, 0x93, 0x20, 0x02, 0xD1, 0x93, 0x20, 0x02, 0xBC, 0xCD, 0x21, 0x02, 0xB0, 0xCD, 0x21, 0x02
	.byte 0xA4, 0xCD, 0x21, 0x02, 0x2D, 0xE2, 0x20, 0x02, 0xDD, 0xE2, 0x20, 0x02, 0x95, 0xE3, 0x20, 0x02
	.byte 0x00, 0x04, 0x02, 0x01, 0x00, 0x01, 0x00, 0x01, 0xED, 0x17, 0x21, 0x02, 0x71, 0x18, 0x21, 0x02
	.byte 0x85, 0x59, 0x21, 0x02, 0xF1, 0x59, 0x21, 0x02, 0x71, 0x5A, 0x21, 0x02, 0x00, 0x00, 0x00, 0x00

	.bss

_0221DCA0:
	.space 0x920