Update diff.py

This commit is contained in:
Seeky 2022-07-07 20:27:59 +01:00
parent effa1b7f6a
commit eecf07e5d8

14
diff.py
View File

@ -3,7 +3,7 @@
##############################################################
# Imported from https://github.com/simonlindholm/asm-differ/ #
# on commit 3b9cfa5a18cab2d11107790a17719642488cdb9d #
# on commit 291173ed30e8a6dc91c28334aa1275a555d725b1 #
##############################################################
import argparse
@ -1488,13 +1488,16 @@ class AsmProcessorPPC(AsmProcessor):
def process_reloc(self, row: str, prev: str) -> Tuple[str, Optional[str]]:
arch = self.config.arch
assert any(
r in row for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21"]
r in row
for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21", "R_PPC_REL14"]
), f"unknown relocation type '{row}' for line '{prev}'"
before, imm, after = parse_relocated_line(prev)
repl = row.split()[-1]
if "R_PPC_REL24" in row:
# function calls
pass
if "R_PPC_REL14" in row:
pass
elif "R_PPC_ADDR16_HI" in row:
# absolute hi of addr
repl = f"{repl}@h"
@ -1808,7 +1811,8 @@ PPC_SETTINGS = ArchSettings(
name="ppc",
re_int=re.compile(r"[0-9]+"),
re_comment=re.compile(r"(<.*>|//.*$)"),
re_reg=re.compile(r"\$?\b([rf][0-9]+)\b"),
# r1 not included
re_reg=re.compile(r"\$?\b([rf](?:[02-9]|[1-9][0-9]+)|f1)\b"),
re_sprel=re.compile(r"(?<=,)(-?[0-9]+|-?0x[0-9a-f]+)\(r1\)"),
re_large_imm=re.compile(r"-?[1-9][0-9]{2,}|-?0x[0-9a-f]{3,}"),
re_imm=re.compile(
@ -2133,6 +2137,10 @@ def field_matches_any_symbol(field: str, arch: ArchSettings) -> bool:
if arch.name == "mips":
return "." in field
# Example: ".text+0x34"
if arch.name == "arm32":
return "." in field
return False