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Hardware Def/RAM Code
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1
.gitignore
vendored
1
.gitignore
vendored
@ -1,3 +1,4 @@
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*.gbc
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*.gb
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*.sav
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*.o
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5
constants.asm
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5
constants.asm
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;INCLUDE "charmap.asm"
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INCLUDE "macros.asm"
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INCLUDE "constants/hardware/hardware.inc"
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116
constants/hardware/LICENSE
Normal file
116
constants/hardware/LICENSE
Normal file
@ -0,0 +1,116 @@
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||||
CC0 1.0 Universal
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|
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21
constants/hardware/README.md
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21
constants/hardware/README.md
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@ -0,0 +1,21 @@
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# `hardware.inc`
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### Gameboy Hardware definitions
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`hardware.inc` has been the standard include file containing Game Boy hardware definitions for use in [rgbds](https://github.com/rednex/rgbds) projects for over 20 years.
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||||
|
||||
This repo is an attempt at version control. This is simply a kind of git mirror of the various flatfiles out there. I haven't written any of the actual code myself.
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## Version history
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The file was originally created by Jeff Frohwein in 1997, who still hosts [his latest version (2.3)](http://www.devrs.com/gb/files/hardware.zip) on his great [Dev'rs](http://devrs.com) website.
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|
||||
Although Jeff Frohwein tried to version control the file with a rudimentary change log at the top of the file, people have added small changes throughout the years, often without bumping the version number.
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|
||||
The most notable fork is by [@AntonioND](http://github.com/AntonioND), which is the one I've used as the mainline in this repo. Other forks will be added as branches, although I rarely know who made them.
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## Contributors
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* Jones (created the original `hardware.inc`, now lost)
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* Carsten Sorenson (whose ideas Jeff based his file on)
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* Jeff Frohwein
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||||
* AntonioND
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||||
* Probably lots of other people who have added to the file throughout the years
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843
constants/hardware/hardware.inc
Normal file
843
constants/hardware/hardware.inc
Normal file
@ -0,0 +1,843 @@
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;*
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;* Gameboy Hardware definitions
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||||
;*
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||||
;* Based on Jones' hardware.inc
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;* And based on Carsten Sorensen's ideas.
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||||
;*
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||||
;* Rev 1.1 - 15-Jul-97 : Added define check
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;* Rev 1.2 - 18-Jul-97 : Added revision check macro
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;* Rev 1.3 - 19-Jul-97 : Modified for RGBASM V1.05
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;* Rev 1.4 - 27-Jul-97 : Modified for new subroutine prefixes
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;* Rev 1.5 - 15-Aug-97 : Added _HRAM, PAD, CART defines
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;* : and Nintendo Logo
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;* Rev 1.6 - 30-Nov-97 : Added rDIV, rTIMA, rTMA, & rTAC
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;* Rev 1.7 - 31-Jan-98 : Added _SCRN0, _SCRN1
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;* Rev 1.8 - 15-Feb-98 : Added rSB, rSC
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;* Rev 1.9 - 16-Feb-98 : Converted I/O registers to $FFXX format
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;* Rev 2.0 - : Added GBC registers
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;* Rev 2.1 - : Added MBC5 & cart RAM enable/disable defines
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;* Rev 2.2 - : Fixed NR42,NR43, & NR44 equates
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;* Rev 2.3 - : Fixed incorrect _HRAM equate
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;* Rev 2.4 - 27-Apr-13 : Added some cart defines (AntonioND)
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;* Rev 2.5 - 03-May-15 : Fixed format (AntonioND)
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;* Rev 2.6 - 09-Apr-16 : Added GBC OAM and cart defines (AntonioND)
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;* Rev 2.7 - 19-Jan-19 : Added rPCMXX (ISSOtm)
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;* Rev 2.8 - 03-Feb-19 : Added audio registers flags (Álvaro Cuesta)
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;* Rev 2.9 - 28-Feb-20 : Added utility rP1 constants
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; If all of these are already defined, don't do it again.
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IF !DEF(HARDWARE_INC)
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HARDWARE_INC SET 1
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rev_Check_hardware_inc : MACRO
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;NOTE: REVISION NUMBER CHANGES MUST BE ADDED
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;TO SECOND PARAMETER IN FOLLOWING LINE.
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IF \1 > 2.9 ;PUT REVISION NUMBER HERE
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WARN "Version \1 or later of 'hardware.inc' is required."
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ENDC
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ENDM
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_HW EQU $FF00
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_VRAM EQU $8000 ; $8000->$9FFF
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_SCRN0 EQU $9800 ; $9800->$9BFF
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_SCRN1 EQU $9C00 ; $9C00->$9FFF
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_SRAM EQU $A000 ; $A000->$BFFF
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_RAM EQU $C000 ; $C000->$DFFF
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_OAMRAM EQU $FE00 ; $FE00->$FE9F
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_AUD3WAVERAM EQU $FF30 ; $FF30->$FF3F
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_HRAM EQU $FF80 ; $FF80->$FFFE
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; *** MBC5 Equates ***
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rRAMG EQU $0000 ; $0000->$1fff
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rROMB0 EQU $2000 ; $2000->$2fff
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rROMB1 EQU $3000 ; $3000->$3fff - If more than 256 ROM banks are present.
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rRAMB EQU $4000 ; $4000->$5fff - Bit 3 enables rumble (if present)
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; --
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; -- OAM flags
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; --
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OAMF_PRI EQU %10000000 ; Priority
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OAMF_YFLIP EQU %01000000 ; Y flip
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OAMF_XFLIP EQU %00100000 ; X flip
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OAMF_PAL0 EQU %00000000 ; Palette number; 0,1 (DMG)
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OAMF_PAL1 EQU %00010000 ; Palette number; 0,1 (DMG)
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OAMF_BANK0 EQU %00000000 ; Bank number; 0,1 (GBC)
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OAMF_BANK1 EQU %00001000 ; Bank number; 0,1 (GBC)
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OAMF_PALMASK EQU %00000111 ; Palette (GBC)
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OAMB_PRI EQU 7 ; Priority
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OAMB_YFLIP EQU 6 ; Y flip
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OAMB_XFLIP EQU 5 ; X flip
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OAMB_PAL1 EQU 4 ; Palette number; 0,1 (DMG)
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OAMB_BANK1 EQU 3 ; Bank number; 0,1 (GBC)
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;***************************************************************************
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;*
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;* Custom registers
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;*
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;***************************************************************************
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; --
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; -- P1 ($FF00)
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; -- Register for reading joy pad info. (R/W)
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; --
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rP1 EQU $FF00
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P1F_5 EQU %00100000 ; P15 out port, set to 0 to get buttons
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P1F_4 EQU %00010000 ; P14 out port, set to 0 to get dpad
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P1F_3 EQU %00001000 ; P13 in port
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P1F_2 EQU %00000100 ; P12 in port
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P1F_1 EQU %00000010 ; P11 in port
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P1F_0 EQU %00000001 ; P10 in port
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P1F_GET_DPAD EQU P1F_5
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P1F_GET_BTN EQU P1F_4
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P1F_GET_NONE EQU P1F_4 | P1F_5
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; --
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; -- SB ($FF01)
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; -- Serial Transfer Data (R/W)
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; --
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rSB EQU $FF01
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; --
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; -- SC ($FF02)
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; -- Serial I/O Control (R/W)
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; --
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rSC EQU $FF02
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; --
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; -- DIV ($FF04)
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; -- Divider register (R/W)
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; --
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rDIV EQU $FF04
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; --
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; -- TIMA ($FF05)
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; -- Timer counter (R/W)
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; --
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rTIMA EQU $FF05
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; --
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; -- TMA ($FF06)
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; -- Timer modulo (R/W)
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; --
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rTMA EQU $FF06
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; --
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; -- TAC ($FF07)
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; -- Timer control (R/W)
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; --
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rTAC EQU $FF07
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TACF_START EQU %00000100
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TACF_STOP EQU %00000000
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TACF_4KHZ EQU %00000000
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TACF_16KHZ EQU %00000011
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TACF_65KHZ EQU %00000010
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TACF_262KHZ EQU %00000001
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; --
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; -- IF ($FF0F)
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; -- Interrupt Flag (R/W)
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; --
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rIF EQU $FF0F
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; --
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; -- LCDC ($FF40)
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; -- LCD Control (R/W)
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; --
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rLCDC EQU $FF40
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LCDCF_OFF EQU %00000000 ; LCD Control Operation
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LCDCF_ON EQU %10000000 ; LCD Control Operation
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LCDCF_WIN9800 EQU %00000000 ; Window Tile Map Display Select
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LCDCF_WIN9C00 EQU %01000000 ; Window Tile Map Display Select
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LCDCF_WINOFF EQU %00000000 ; Window Display
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||||
LCDCF_WINON EQU %00100000 ; Window Display
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||||
LCDCF_BG8800 EQU %00000000 ; BG & Window Tile Data Select
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LCDCF_BG8000 EQU %00010000 ; BG & Window Tile Data Select
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||||
LCDCF_BG9800 EQU %00000000 ; BG Tile Map Display Select
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LCDCF_BG9C00 EQU %00001000 ; BG Tile Map Display Select
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LCDCF_OBJ8 EQU %00000000 ; OBJ Construction
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||||
LCDCF_OBJ16 EQU %00000100 ; OBJ Construction
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LCDCF_OBJOFF EQU %00000000 ; OBJ Display
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||||
LCDCF_OBJON EQU %00000010 ; OBJ Display
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||||
LCDCF_BGOFF EQU %00000000 ; BG Display
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||||
LCDCF_BGON EQU %00000001 ; BG Display
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||||
; "Window Character Data Select" follows BG
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||||
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||||
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||||
; --
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||||
; -- STAT ($FF41)
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||||
; -- LCDC Status (R/W)
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||||
; --
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||||
rSTAT EQU $FF41
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||||
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||||
STATF_LYC EQU %01000000 ; LYCEQULY Coincidence (Selectable)
|
||||
STATF_MODE10 EQU %00100000 ; Mode 10
|
||||
STATF_MODE01 EQU %00010000 ; Mode 01 (V-Blank)
|
||||
STATF_MODE00 EQU %00001000 ; Mode 00 (H-Blank)
|
||||
STATF_LYCF EQU %00000100 ; Coincidence Flag
|
||||
STATF_HB EQU %00000000 ; H-Blank
|
||||
STATF_VB EQU %00000001 ; V-Blank
|
||||
STATF_OAM EQU %00000010 ; OAM-RAM is used by system
|
||||
STATF_LCD EQU %00000011 ; Both OAM and VRAM used by system
|
||||
STATF_BUSY EQU %00000010 ; When set, VRAM access is unsafe
|
||||
|
||||
|
||||
; --
|
||||
; -- SCY ($FF42)
|
||||
; -- Scroll Y (R/W)
|
||||
; --
|
||||
rSCY EQU $FF42
|
||||
|
||||
|
||||
; --
|
||||
; -- SCY ($FF43)
|
||||
; -- Scroll X (R/W)
|
||||
; --
|
||||
rSCX EQU $FF43
|
||||
|
||||
|
||||
; --
|
||||
; -- LY ($FF44)
|
||||
; -- LCDC Y-Coordinate (R)
|
||||
; --
|
||||
; -- Values range from 0->153. 144->153 is the VBlank period.
|
||||
; --
|
||||
rLY EQU $FF44
|
||||
|
||||
|
||||
; --
|
||||
; -- LYC ($FF45)
|
||||
; -- LY Compare (R/W)
|
||||
; --
|
||||
; -- When LYEQUEQULYC, STATF_LYCF will be set in STAT
|
||||
; --
|
||||
rLYC EQU $FF45
|
||||
|
||||
|
||||
; --
|
||||
; -- DMA ($FF46)
|
||||
; -- DMA Transfer and Start Address (W)
|
||||
; --
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||||
rDMA EQU $FF46
|
||||
|
||||
|
||||
; --
|
||||
; -- BGP ($FF47)
|
||||
; -- BG Palette Data (W)
|
||||
; --
|
||||
; -- Bit 7-6 - Intensity for %11
|
||||
; -- Bit 5-4 - Intensity for %10
|
||||
; -- Bit 3-2 - Intensity for %01
|
||||
; -- Bit 1-0 - Intensity for %00
|
||||
; --
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||||
rBGP EQU $FF47
|
||||
|
||||
|
||||
; --
|
||||
; -- OBP0 ($FF48)
|
||||
; -- Object Palette 0 Data (W)
|
||||
; --
|
||||
; -- See BGP for info
|
||||
; --
|
||||
rOBP0 EQU $FF48
|
||||
|
||||
|
||||
; --
|
||||
; -- OBP1 ($FF49)
|
||||
; -- Object Palette 1 Data (W)
|
||||
; --
|
||||
; -- See BGP for info
|
||||
; --
|
||||
rOBP1 EQU $FF49
|
||||
|
||||
|
||||
; --
|
||||
; -- WY ($FF4A)
|
||||
; -- Window Y Position (R/W)
|
||||
; --
|
||||
; -- 0 <EQU WY <EQU 143
|
||||
; --
|
||||
rWY EQU $FF4A
|
||||
|
||||
|
||||
; --
|
||||
; -- WX ($FF4B)
|
||||
; -- Window X Position (R/W)
|
||||
; --
|
||||
; -- 7 <EQU WX <EQU 166
|
||||
; --
|
||||
rWX EQU $FF4B
|
||||
|
||||
|
||||
; --
|
||||
; -- KEY 1 ($FF4D)
|
||||
; -- Select CPU Speed (R/W)
|
||||
; --
|
||||
rKEY1 EQU $FF4D
|
||||
|
||||
|
||||
; --
|
||||
; -- VBK ($FF4F)
|
||||
; -- Select Video RAM Bank (R/W)
|
||||
; --
|
||||
rVBK EQU $FF4F
|
||||
|
||||
|
||||
; --
|
||||
; -- HDMA1 ($FF51)
|
||||
; -- Horizontal Blanking, General Purpose DMA (W)
|
||||
; --
|
||||
rHDMA1 EQU $FF51
|
||||
|
||||
|
||||
; --
|
||||
; -- HDMA2 ($FF52)
|
||||
; -- Horizontal Blanking, General Purpose DMA (W)
|
||||
; --
|
||||
rHDMA2 EQU $FF52
|
||||
|
||||
|
||||
; --
|
||||
; -- HDMA3 ($FF53)
|
||||
; -- Horizontal Blanking, General Purpose DMA (W)
|
||||
; --
|
||||
rHDMA3 EQU $FF53
|
||||
|
||||
|
||||
; --
|
||||
; -- HDMA4 ($FF54)
|
||||
; -- Horizontal Blanking, General Purpose DMA (W)
|
||||
; --
|
||||
rHDMA4 EQU $FF54
|
||||
|
||||
|
||||
; --
|
||||
; -- HDMA5 ($FF55)
|
||||
; -- Horizontal Blanking, General Purpose DMA (R/W)
|
||||
; --
|
||||
rHDMA5 EQU $FF55
|
||||
|
||||
|
||||
; --
|
||||
; -- RP ($FF56)
|
||||
; -- Infrared Communications Port (R/W)
|
||||
; --
|
||||
rRP EQU $FF56
|
||||
|
||||
|
||||
; --
|
||||
; -- BCPS ($FF68)
|
||||
; -- Background Color Palette Specification (R/W)
|
||||
; --
|
||||
rBCPS EQU $FF68
|
||||
|
||||
|
||||
; --
|
||||
; -- BCPD ($FF69)
|
||||
; -- Background Color Palette Data (R/W)
|
||||
; --
|
||||
rBCPD EQU $FF69
|
||||
|
||||
|
||||
; --
|
||||
; -- BCPS ($FF6A)
|
||||
; -- Object Color Palette Specification (R/W)
|
||||
; --
|
||||
rOCPS EQU $FF6A
|
||||
|
||||
|
||||
; --
|
||||
; -- BCPD ($FF6B)
|
||||
; -- Object Color Palette Data (R/W)
|
||||
; --
|
||||
rOCPD EQU $FF6B
|
||||
|
||||
|
||||
; --
|
||||
; -- SVBK ($FF4F)
|
||||
; -- Select Main RAM Bank (R/W)
|
||||
; --
|
||||
rSVBK EQU $FF70
|
||||
|
||||
|
||||
; --
|
||||
; -- IE ($FFFF)
|
||||
; -- Interrupt Enable (R/W)
|
||||
; --
|
||||
rIE EQU $FFFF
|
||||
|
||||
|
||||
IEF_HILO EQU %00010000 ; Transition from High to Low of Pin number P10-P13
|
||||
IEF_SERIAL EQU %00001000 ; Serial I/O transfer end
|
||||
IEF_TIMER EQU %00000100 ; Timer Overflow
|
||||
IEF_LCDC EQU %00000010 ; LCDC (see STAT)
|
||||
IEF_VBLANK EQU %00000001 ; V-Blank
|
||||
|
||||
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Sound control registers
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- AUDVOL/NR50 ($FF24)
|
||||
; -- Channel control / ON-OFF / Volume (R/W)
|
||||
; --
|
||||
; -- Bit 7 - Vin->SO2 ON/OFF (Vin??)
|
||||
; -- Bit 6-4 - SO2 output level (volume) (# 0-7)
|
||||
; -- Bit 3 - Vin->SO1 ON/OFF (Vin??)
|
||||
; -- Bit 2-0 - SO1 output level (volume) (# 0-7)
|
||||
; --
|
||||
rNR50 EQU $FF24
|
||||
rAUDVOL EQU rNR50
|
||||
|
||||
AUDVOL_VIN_LEFT EQU %10000000 ; SO2
|
||||
AUDVOL_VIN_RIGHT EQU %00001000 ; SO1
|
||||
|
||||
|
||||
; --
|
||||
; -- AUDTERM/NR51 ($FF25)
|
||||
; -- Selection of Sound output terminal (R/W)
|
||||
; --
|
||||
; -- Bit 7 - Output sound 4 to SO2 terminal
|
||||
; -- Bit 6 - Output sound 3 to SO2 terminal
|
||||
; -- Bit 5 - Output sound 2 to SO2 terminal
|
||||
; -- Bit 4 - Output sound 1 to SO2 terminal
|
||||
; -- Bit 3 - Output sound 4 to SO1 terminal
|
||||
; -- Bit 2 - Output sound 3 to SO1 terminal
|
||||
; -- Bit 1 - Output sound 2 to SO1 terminal
|
||||
; -- Bit 0 - Output sound 0 to SO1 terminal
|
||||
; --
|
||||
rNR51 EQU $FF25
|
||||
rAUDTERM EQU rNR51
|
||||
|
||||
; SO2
|
||||
AUDTERM_4_LEFT EQU %10000000
|
||||
AUDTERM_3_LEFT EQU %01000000
|
||||
AUDTERM_2_LEFT EQU %00100000
|
||||
AUDTERM_1_LEFT EQU %00010000
|
||||
; SO1
|
||||
AUDTERM_4_RIGHT EQU %00001000
|
||||
AUDTERM_3_RIGHT EQU %00000100
|
||||
AUDTERM_2_RIGHT EQU %00000010
|
||||
AUDTERM_1_RIGHT EQU %00000001
|
||||
|
||||
|
||||
; --
|
||||
; -- AUDENA/NR52 ($FF26)
|
||||
; -- Sound on/off (R/W)
|
||||
; --
|
||||
; -- Bit 7 - All sound on/off (sets all audio regs to 0!)
|
||||
; -- Bit 3 - Sound 4 ON flag (read only)
|
||||
; -- Bit 2 - Sound 3 ON flag (read only)
|
||||
; -- Bit 1 - Sound 2 ON flag (read only)
|
||||
; -- Bit 0 - Sound 1 ON flag (read only)
|
||||
; --
|
||||
rNR52 EQU $FF26
|
||||
rAUDENA EQU rNR52
|
||||
|
||||
AUDENA_ON EQU %10000000
|
||||
AUDENA_OFF EQU %00000000 ; sets all audio regs to 0!
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* SoundChannel #1 registers
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- AUD1SWEEP/NR10 ($FF10)
|
||||
; -- Sweep register (R/W)
|
||||
; --
|
||||
; -- Bit 6-4 - Sweep Time
|
||||
; -- Bit 3 - Sweep Increase/Decrease
|
||||
; -- 0: Addition (frequency increases???)
|
||||
; -- 1: Subtraction (frequency increases???)
|
||||
; -- Bit 2-0 - Number of sweep shift (# 0-7)
|
||||
; -- Sweep Time: (n*7.8ms)
|
||||
; --
|
||||
rNR10 EQU $FF10
|
||||
rAUD1SWEEP EQU rNR10
|
||||
|
||||
AUD1SWEEP_UP EQU %00000000
|
||||
AUD1SWEEP_DOWN EQU %00001000
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD1LEN/NR11 ($FF11)
|
||||
; -- Sound length/Wave pattern duty (R/W)
|
||||
; --
|
||||
; -- Bit 7-6 - Wave Pattern Duty (00:12.5% 01:25% 10:50% 11:75%)
|
||||
; -- Bit 5-0 - Sound length data (# 0-63)
|
||||
; --
|
||||
rNR11 EQU $FF11
|
||||
rAUD1LEN EQU rNR11
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD1ENV/NR12 ($FF12)
|
||||
; -- Envelope (R/W)
|
||||
; --
|
||||
; -- Bit 7-4 - Initial value of envelope
|
||||
; -- Bit 3 - Envelope UP/DOWN
|
||||
; -- 0: Decrease
|
||||
; -- 1: Range of increase
|
||||
; -- Bit 2-0 - Number of envelope sweep (# 0-7)
|
||||
; --
|
||||
rNR12 EQU $FF12
|
||||
rAUD1ENV EQU rNR12
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD1LOW/NR13 ($FF13)
|
||||
; -- Frequency lo (W)
|
||||
; --
|
||||
rNR13 EQU $FF13
|
||||
rAUD1LOW EQU rNR13
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD1HIGH/NR14 ($FF14)
|
||||
; -- Frequency hi (W)
|
||||
; --
|
||||
; -- Bit 7 - Initial (when set, sound restarts)
|
||||
; -- Bit 6 - Counter/consecutive selection
|
||||
; -- Bit 2-0 - Frequency's higher 3 bits
|
||||
; --
|
||||
rNR14 EQU $FF14
|
||||
rAUD1HIGH EQU rNR14
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* SoundChannel #2 registers
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- AUD2LEN/NR21 ($FF16)
|
||||
; -- Sound Length; Wave Pattern Duty (R/W)
|
||||
; --
|
||||
; -- see AUD1LEN for info
|
||||
; --
|
||||
rNR21 EQU $FF16
|
||||
rAUD2LEN EQU rNR21
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD2ENV/NR22 ($FF17)
|
||||
; -- Envelope (R/W)
|
||||
; --
|
||||
; -- see AUD1ENV for info
|
||||
; --
|
||||
rNR22 EQU $FF17
|
||||
rAUD2ENV EQU rNR22
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD2LOW/NR23 ($FF18)
|
||||
; -- Frequency lo (W)
|
||||
; --
|
||||
rNR23 EQU $FF18
|
||||
rAUD2LOW EQU rNR23
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD2HIGH/NR24 ($FF19)
|
||||
; -- Frequency hi (W)
|
||||
; --
|
||||
; -- see AUD1HIGH for info
|
||||
; --
|
||||
rNR24 EQU $FF19
|
||||
rAUD2HIGH EQU rNR24
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* SoundChannel #3 registers
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- AUD3ENA/NR30 ($FF1A)
|
||||
; -- Sound on/off (R/W)
|
||||
; --
|
||||
; -- Bit 7 - Sound ON/OFF (1EQUON,0EQUOFF)
|
||||
; --
|
||||
rNR30 EQU $FF1A
|
||||
rAUD3ENA EQU rNR30
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LEN/NR31 ($FF1B)
|
||||
; -- Sound length (R/W)
|
||||
; --
|
||||
; -- Bit 7-0 - Sound length
|
||||
; --
|
||||
rNR31 EQU $FF1B
|
||||
rAUD3LEN EQU rNR31
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LEVEL/NR32 ($FF1C)
|
||||
; -- Select output level
|
||||
; --
|
||||
; -- Bit 6-5 - Select output level
|
||||
; -- 00: 0/1 (mute)
|
||||
; -- 01: 1/1
|
||||
; -- 10: 1/2
|
||||
; -- 11: 1/4
|
||||
; --
|
||||
rNR32 EQU $FF1C
|
||||
rAUD3LEVEL EQU rNR32
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LOW/NR33 ($FF1D)
|
||||
; -- Frequency lo (W)
|
||||
; --
|
||||
; -- see AUD1LOW for info
|
||||
; --
|
||||
rNR33 EQU $FF1D
|
||||
rAUD3LOW EQU rNR33
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3HIGH/NR34 ($FF1E)
|
||||
; -- Frequency hi (W)
|
||||
; --
|
||||
; -- see AUD1HIGH for info
|
||||
; --
|
||||
rNR34 EQU $FF1E
|
||||
rAUD3HIGH EQU rNR34
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4LEN/NR41 ($FF20)
|
||||
; -- Sound length (R/W)
|
||||
; --
|
||||
; -- Bit 5-0 - Sound length data (# 0-63)
|
||||
; --
|
||||
rNR41 EQU $FF20
|
||||
rAUD4LEN EQU rNR41
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4ENV/NR42 ($FF21)
|
||||
; -- Envelope (R/W)
|
||||
; --
|
||||
; -- see AUD1ENV for info
|
||||
; --
|
||||
rNR42 EQU $FF21
|
||||
rAUD4ENV EQU rNR42
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4POLY/NR43 ($FF22)
|
||||
; -- Polynomial counter (R/W)
|
||||
; --
|
||||
; -- Bit 7-4 - Selection of the shift clock frequency of the (scf)
|
||||
; -- polynomial counter (0000-1101)
|
||||
; -- freqEQUdrf*1/2^scf (not sure)
|
||||
; -- Bit 3 - Selection of the polynomial counter's step
|
||||
; -- 0: 15 steps
|
||||
; -- 1: 7 steps
|
||||
; -- Bit 2-0 - Selection of the dividing ratio of frequencies (drf)
|
||||
; -- 000: f/4 001: f/8 010: f/16 011: f/24
|
||||
; -- 100: f/32 101: f/40 110: f/48 111: f/56 (fEQU4.194304 Mhz)
|
||||
; --
|
||||
rNR43 EQU $FF22
|
||||
rAUD4POLY EQU rNR43
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4GO/NR44 ($FF23)
|
||||
; -- (has wrong name and value (ff30) in Dr.Pan's doc!)
|
||||
; --
|
||||
; -- Bit 7 - Inital
|
||||
; -- Bit 6 - Counter/consecutive selection
|
||||
; --
|
||||
rNR44 EQU $FF23
|
||||
rAUD4GO EQU rNR44 ; silly name!
|
||||
|
||||
|
||||
; --
|
||||
; -- PCM12 ($FF76)
|
||||
; -- Sound channel 1&2 PCM amplitude (R)
|
||||
; --
|
||||
; -- Bit 7-4 - Copy of sound channel 2's PCM amplitude
|
||||
; -- Bit 3-0 - Copy of sound channel 1's PCM amplitude
|
||||
; --
|
||||
rPCM12 EQU $FF76
|
||||
|
||||
|
||||
; --
|
||||
; -- PCM34 ($FF77)
|
||||
; -- Sound channel 3&4 PCM amplitude (R)
|
||||
; --
|
||||
; -- Bit 7-4 - Copy of sound channel 4's PCM amplitude
|
||||
; -- Bit 3-0 - Copy of sound channel 3's PCM amplitude
|
||||
; --
|
||||
rPCM34 EQU $FF77
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Flags common to multiple sound channels
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- Square wave duty cycle
|
||||
; --
|
||||
; -- Can be used with AUD1LEN and AUD2LEN
|
||||
; -- See AUD1LEN for more info
|
||||
; --
|
||||
AUDLEN_DUTY_12_5 EQU %00000000 ; 12.5%
|
||||
AUDLEN_DUTY_25 EQU %01000000 ; 25%
|
||||
AUDLEN_DUTY_50 EQU %10000000 ; 50%
|
||||
AUDLEN_DUTY_75 EQU %11000000 ; 75%
|
||||
|
||||
|
||||
; --
|
||||
; -- Audio envelope flags
|
||||
; --
|
||||
; -- Can be used with AUD1ENV, AUD2ENV, AUD4ENV
|
||||
; -- See AUD1ENV for more info
|
||||
; --
|
||||
AUDENV_UP EQU %00001000
|
||||
AUDENV_DOWN EQU %00000000
|
||||
|
||||
|
||||
; --
|
||||
; -- Audio trigger flags
|
||||
; --
|
||||
; -- Can be used with AUD1HIGH, AUD2HIGH, AUD3HIGH
|
||||
; -- See AUD1HIGH for more info
|
||||
; --
|
||||
|
||||
AUDHIGH_RESTART EQU %10000000
|
||||
AUDHIGH_LENGTH_ON EQU %01000000
|
||||
AUDHIGH_LENGTH_OFF EQU %00000000
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Cart related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
CART_COMPATIBLE_DMG EQU $00
|
||||
CART_COMPATIBLE_DMG_GBC EQU $80
|
||||
CART_COMPATIBLE_GBC EQU $C0
|
||||
|
||||
CART_ROM EQU $00
|
||||
CART_ROM_MBC1 EQU $01
|
||||
CART_ROM_MBC1_RAM EQU $02
|
||||
CART_ROM_MBC1_RAM_BAT EQU $03
|
||||
CART_ROM_MBC2 EQU $05
|
||||
CART_ROM_MBC2_BAT EQU $06
|
||||
CART_ROM_RAM EQU $08
|
||||
CART_ROM_RAM_BAT EQU $09
|
||||
CART_ROM_MBC3_BAT_RTC EQU $0F
|
||||
CART_ROM_MBC3_RAM_BAT_RTC EQU $10
|
||||
CART_ROM_MBC3 EQU $11
|
||||
CART_ROM_MBC3_RAM EQU $12
|
||||
CART_ROM_MBC3_RAM_BAT EQU $13
|
||||
CART_ROM_MBC5 EQU $19
|
||||
CART_ROM_MBC5_BAT EQU $1A
|
||||
CART_ROM_MBC5_RAM_BAT EQU $1B
|
||||
CART_ROM_MBC5_RUMBLE EQU $1C
|
||||
CART_ROM_MBC5_RAM_RUMBLE EQU $1D
|
||||
CART_ROM_MBC5_RAM_BAT_RUMBLE EQU $1E
|
||||
CART_ROM_MBC7_RAM_BAT_GYRO EQU $22
|
||||
CART_ROM_POCKET_CAMERA EQU $FC
|
||||
|
||||
CART_ROM_256K EQU 0 ; 2 banks
|
||||
CART_ROM_512K EQU 1 ; 4 banks
|
||||
CART_ROM_1M EQU 2 ; 8 banks
|
||||
CART_ROM_2M EQU 3 ; 16 banks
|
||||
CART_ROM_4M EQU 4 ; 32 banks
|
||||
CART_ROM_8M EQU 5 ; 64 banks
|
||||
CART_ROM_16M EQU 6 ; 128 banks
|
||||
CART_ROM_32M EQU 7 ; 256 banks
|
||||
CART_ROM_64M EQU 8 ; 512 banks
|
||||
|
||||
CART_RAM_NONE EQU 0
|
||||
CART_RAM_16K EQU 1 ; 1 incomplete bank
|
||||
CART_RAM_64K EQU 2 ; 1 bank
|
||||
CART_RAM_256K EQU 3 ; 4 banks
|
||||
CART_RAM_1M EQU 4 ; 16 banks
|
||||
|
||||
CART_RAM_ENABLE EQU $0A
|
||||
CART_RAM_DISABLE EQU $00
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Keypad related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
PADF_DOWN EQU $80
|
||||
PADF_UP EQU $40
|
||||
PADF_LEFT EQU $20
|
||||
PADF_RIGHT EQU $10
|
||||
PADF_START EQU $08
|
||||
PADF_SELECT EQU $04
|
||||
PADF_B EQU $02
|
||||
PADF_A EQU $01
|
||||
|
||||
PADB_DOWN EQU $7
|
||||
PADB_UP EQU $6
|
||||
PADB_LEFT EQU $5
|
||||
PADB_RIGHT EQU $4
|
||||
PADB_START EQU $3
|
||||
PADB_SELECT EQU $2
|
||||
PADB_B EQU $1
|
||||
PADB_A EQU $0
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Screen related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
SCRN_X EQU 160 ; Width of screen in pixels
|
||||
SCRN_Y EQU 144 ; Height of screen in pixels
|
||||
SCRN_X_B EQU 20 ; Width of screen in bytes
|
||||
SCRN_Y_B EQU 18 ; Height of screen in bytes
|
||||
|
||||
SCRN_VX EQU 256 ; Virtual width of screen in pixels
|
||||
SCRN_VY EQU 256 ; Virtual height of screen in pixels
|
||||
SCRN_VX_B EQU 32 ; Virtual width of screen in bytes
|
||||
SCRN_VY_B EQU 32 ; Virtual height of screen in bytes
|
||||
|
||||
;*
|
||||
;* Nintendo scrolling logo
|
||||
;* (Code won't work on a real GameBoy)
|
||||
;* (if next lines are altered.)
|
||||
NINTENDO_LOGO : MACRO
|
||||
DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
|
||||
DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
|
||||
DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
|
||||
ENDM
|
||||
|
||||
ENDC ;HARDWARE_INC
|
||||
Loading…
Reference in New Issue
Block a user